3000 ciTypeEntries::valid_ciklass(current_klass) != exact_klass, "inconsistent");
3001
3002 // Already unknown. Nothing to do anymore.
3003 __ andi_(R0, tmp, TypeEntries::type_unknown);
3004 __ bne(CR0, Lnext);
3005
3006 // Different than before. Cannot keep accurate profile.
3007 __ ori(R0, tmp, TypeEntries::type_unknown);
3008 }
3009 }
3010
3011 __ bind(Ldo_update);
3012 __ std(R0, index_or_disp(mdo_addr), mdo_addr->base()->as_pointer_register());
3013
3014 __ bind(Lnext);
3015 if (klass_reg_used) { __ load_const_optimized(R29_TOC, MacroAssembler::global_toc(), R0); } // reinit
3016 }
3017 __ bind(Ldone);
3018 }
3019
3020
3021 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
3022 assert(op->crc()->is_single_cpu(), "crc must be register");
3023 assert(op->val()->is_single_cpu(), "byte value must be register");
3024 assert(op->result_opr()->is_single_cpu(), "result must be register");
3025 Register crc = op->crc()->as_register();
3026 Register val = op->val()->as_register();
3027 Register res = op->result_opr()->as_register();
3028
3029 assert_different_registers(val, crc, res);
3030
3031 __ load_const_optimized(res, StubRoutines::crc_table_addr(), R0);
3032 __ kernel_crc32_singleByteReg(crc, val, res, true);
3033 __ mr(res, crc);
3034 }
3035
3036 #undef __
|
3000 ciTypeEntries::valid_ciklass(current_klass) != exact_klass, "inconsistent");
3001
3002 // Already unknown. Nothing to do anymore.
3003 __ andi_(R0, tmp, TypeEntries::type_unknown);
3004 __ bne(CR0, Lnext);
3005
3006 // Different than before. Cannot keep accurate profile.
3007 __ ori(R0, tmp, TypeEntries::type_unknown);
3008 }
3009 }
3010
3011 __ bind(Ldo_update);
3012 __ std(R0, index_or_disp(mdo_addr), mdo_addr->base()->as_pointer_register());
3013
3014 __ bind(Lnext);
3015 if (klass_reg_used) { __ load_const_optimized(R29_TOC, MacroAssembler::global_toc(), R0); } // reinit
3016 }
3017 __ bind(Ldone);
3018 }
3019
3020 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
3021 Unimplemented();
3022 }
3023
3024 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
3025 assert(op->crc()->is_single_cpu(), "crc must be register");
3026 assert(op->val()->is_single_cpu(), "byte value must be register");
3027 assert(op->result_opr()->is_single_cpu(), "result must be register");
3028 Register crc = op->crc()->as_register();
3029 Register val = op->val()->as_register();
3030 Register res = op->result_opr()->as_register();
3031
3032 assert_different_registers(val, crc, res);
3033
3034 __ load_const_optimized(res, StubRoutines::crc_table_addr(), R0);
3035 __ kernel_crc32_singleByteReg(crc, val, res, true);
3036 __ mr(res, crc);
3037 }
3038
3039 // Valhalla support
3040
3041 void LIR_Assembler::check_orig_pc() {
3042 Unimplemented();
3043 }
3044
3045 int LIR_Assembler::store_inline_type_fields_to_buf(ciInlineKlass* vk) {
3046 Unimplemented();
3047 return 0;
3048 }
3049
3050 void LIR_Assembler::emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op) {
3051 Unimplemented();
3052 }
3053
3054 void LIR_Assembler::emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op) {
3055 Unimplemented();
3056 }
3057
3058 void LIR_Assembler::emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op) {
3059 Unimplemented();
3060 }
3061 #undef __
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