src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp

@@ -1,7 +1,7 @@
  /*
-  * Copyright (c) 2000, 2025, Oracle and/or its affiliates. All rights reserved.
+  * Copyright (c) 2000, 2026, Oracle and/or its affiliates. All rights reserved.
   * Copyright (c) 2012, 2025 SAP SE. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as

@@ -3124,10 +3124,13 @@
      if (klass_reg_used) { __ load_const_optimized(R29_TOC, MacroAssembler::global_toc(), R0); } // reinit
    }
    __ bind(Ldone);
  }
  
+ void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
+   Unimplemented();
+ }
  
  void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
    assert(op->crc()->is_single_cpu(), "crc must be register");
    assert(op->val()->is_single_cpu(), "byte value must be register");
    assert(op->result_opr()->is_single_cpu(), "result must be register");

@@ -3140,6 +3143,28 @@
    __ load_const_optimized(res, StubRoutines::crc_table_addr(), R0);
    __ kernel_crc32_singleByteReg(crc, val, res, true);
    __ mr(res, crc);
  }
  
+ // Valhalla support
+ 
+ void LIR_Assembler::check_orig_pc() {
+   Unimplemented();
+ }
+ 
+ int LIR_Assembler::store_inline_type_fields_to_buf(ciInlineKlass* vk) {
+   Unimplemented();
+   return 0;
+ }
+ 
+ void LIR_Assembler::emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op) {
+   Unimplemented();
+ }
+ 
+ void LIR_Assembler::emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op) {
+   Unimplemented();
+ }
+ 
+ void LIR_Assembler::emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op) {
+   Unimplemented();
+ }
  #undef __