1 /*
   2  * Copyright (c) 2005, 2026, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2012, 2026 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "asm/macroAssembler.inline.hpp"
  27 #include "c1/c1_Compilation.hpp"
  28 #include "c1/c1_FrameMap.hpp"
  29 #include "c1/c1_Instruction.hpp"
  30 #include "c1/c1_LIRAssembler.hpp"
  31 #include "c1/c1_LIRGenerator.hpp"
  32 #include "c1/c1_Runtime1.hpp"
  33 #include "c1/c1_ValueStack.hpp"
  34 #include "ci/ciArray.hpp"
  35 #include "ci/ciInlineKlass.hpp"
  36 #include "ci/ciObjArrayKlass.hpp"
  37 #include "ci/ciTypeArrayKlass.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 #include "runtime/stubRoutines.hpp"
  40 #include "runtime/vm_version.hpp"
  41 #include "utilities/powerOfTwo.hpp"
  42 #include "vmreg_ppc.inline.hpp"
  43 #include <stdint.h>
  44 
  45 #ifdef ASSERT
  46 #define __ gen()->lir(__FILE__, __LINE__)->
  47 #else
  48 #define __ gen()->lir()->
  49 #endif
  50 
  51 void LIRItem::load_byte_item() {
  52   // Byte loads use same registers as other loads.
  53   load_item();
  54 }
  55 
  56 
  57 void LIRItem::load_nonconstant() {
  58   LIR_Opr r = value()->operand();
  59   if (_gen->can_inline_as_constant(value())) {
  60     if (!r->is_constant()) {
  61       r = LIR_OprFact::value_type(value()->type());
  62     }
  63     _result = r;
  64   } else {
  65     load_item();
  66   }
  67 }
  68 
  69 
  70 //--------------------------------------------------------------
  71 //               LIRGenerator
  72 //--------------------------------------------------------------
  73 
  74 LIR_Opr LIRGenerator::exceptionOopOpr()              { return FrameMap::R3_oop_opr; }
  75 LIR_Opr LIRGenerator::exceptionPcOpr()               { return FrameMap::R4_opr; }
  76 LIR_Opr LIRGenerator::syncLockOpr()                  { return FrameMap::R5_opr; }     // Need temp effect for MonitorEnterStub.
  77 LIR_Opr LIRGenerator::syncTempOpr()                  { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
  78 LIR_Opr LIRGenerator::getThreadTemp()                { return LIR_OprFact::illegalOpr; } // not needed
  79 
  80 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  81   LIR_Opr opr;
  82   switch (type->tag()) {
  83   case intTag:     opr = FrameMap::R3_opr;         break;
  84   case objectTag:  opr = FrameMap::R3_oop_opr;     break;
  85   case longTag:    opr = FrameMap::R3_long_opr;    break;
  86   case floatTag:   opr = FrameMap::F1_opr;         break;
  87   case doubleTag:  opr = FrameMap::F1_double_opr;  break;
  88 
  89   case addressTag:
  90   default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  91   }
  92 
  93   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  94   return opr;
  95 }
  96 
  97 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
  98   ShouldNotReachHere();
  99   return LIR_OprFact::illegalOpr;
 100 }
 101 
 102 
 103 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 104   return new_register(T_INT);
 105 }
 106 
 107 
 108 //--------- loading items into registers --------------------------------
 109 
 110 // PPC cannot inline all constants.
 111 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 112   if (v->type()->as_IntConstant() != nullptr) {
 113     return Assembler::is_simm16(v->type()->as_IntConstant()->value());
 114   } else if (v->type()->as_LongConstant() != nullptr) {
 115     return Assembler::is_simm16(v->type()->as_LongConstant()->value());
 116   } else if (v->type()->as_ObjectConstant() != nullptr) {
 117     return v->type()->as_ObjectConstant()->value()->is_null_object();
 118   } else {
 119     return false;
 120   }
 121 }
 122 
 123 
 124 // Only simm16 constants can be inlined.
 125 bool LIRGenerator::can_inline_as_constant(Value i) const {
 126   return can_store_as_constant(i, as_BasicType(i->type()));
 127 }
 128 
 129 
 130 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 131   if (c->type() == T_INT) {
 132     return Assembler::is_simm16(c->as_jint());
 133   }
 134   if (c->type() == T_LONG) {
 135     return Assembler::is_simm16(c->as_jlong());
 136   }
 137   if (c->type() == T_OBJECT) {
 138     return c->as_jobject() == nullptr;
 139   }
 140   return false;
 141 }
 142 
 143 
 144 LIR_Opr LIRGenerator::safepoint_poll_register() {
 145   return new_register(T_INT);
 146 }
 147 
 148 
 149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 150                                             int shift, int disp, BasicType type) {
 151   assert(base->is_register(), "must be");
 152   intx large_disp = disp;
 153 
 154   // Accumulate fixed displacements.
 155   if (index->is_constant()) {
 156     LIR_Const *constant = index->as_constant_ptr();
 157     if (constant->type() == T_LONG) {
 158       large_disp += constant->as_jlong() << shift;
 159     } else {
 160       large_disp += (intx)(constant->as_jint()) << shift;
 161     }
 162     index = LIR_OprFact::illegalOpr;
 163   }
 164 
 165   if (index->is_register()) {
 166     // Apply the shift and accumulate the displacement.
 167     if (shift > 0) {
 168       // Use long register to avoid overflow when shifting large index values left.
 169       LIR_Opr tmp = new_register(T_LONG);
 170       __ convert(Bytecodes::_i2l, index, tmp);
 171       __ shift_left(tmp, shift, tmp);
 172       index = tmp;
 173     }
 174     if (large_disp != 0) {
 175       LIR_Opr tmp = new_pointer_register();
 176       if (Assembler::is_simm16(large_disp)) {
 177         __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
 178         index = tmp;
 179       } else {
 180         __ move(LIR_OprFact::intptrConst(large_disp), tmp);
 181         __ add(tmp, index, tmp);
 182         index = tmp;
 183       }
 184       large_disp = 0;
 185     }
 186   } else if (!Assembler::is_simm16(large_disp)) {
 187     // Index is illegal so replace it with the displacement loaded into a register.
 188     index = new_pointer_register();
 189     __ move(LIR_OprFact::intptrConst(large_disp), index);
 190     large_disp = 0;
 191   }
 192 
 193   // At this point we either have base + index or base + displacement.
 194   if (large_disp == 0) {
 195     return new LIR_Address(base, index, type);
 196   } else {
 197     assert(Assembler::is_simm16(large_disp), "must be");
 198     return new LIR_Address(base, large_disp, type);
 199   }
 200 }
 201 
 202 
 203 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 204                                               BasicType type) {
 205   int elem_size = type2aelembytes(type);
 206   int shift = exact_log2(elem_size);
 207 
 208   LIR_Opr base_opr;
 209   intx offset = arrayOopDesc::base_offset_in_bytes(type);
 210 
 211   if (index_opr->is_constant()) {
 212     intx i = index_opr->as_constant_ptr()->as_jint();
 213     intx array_offset = i * elem_size;
 214     if (Assembler::is_simm16(array_offset + offset)) {
 215       base_opr = array_opr;
 216       offset = array_offset + offset;
 217     } else {
 218       base_opr = new_pointer_register();
 219       if (Assembler::is_simm16(array_offset)) {
 220         __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
 221       } else {
 222         __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
 223         __ add(base_opr, array_opr, base_opr);
 224       }
 225     }
 226   } else {
 227 #ifdef _LP64
 228     if (index_opr->type() == T_INT) {
 229       LIR_Opr tmp = new_register(T_LONG);
 230       __ convert(Bytecodes::_i2l, index_opr, tmp);
 231       index_opr = tmp;
 232     }
 233 #endif
 234 
 235     base_opr = new_pointer_register();
 236     assert (index_opr->is_register(), "Must be register");
 237     if (shift > 0) {
 238       __ shift_left(index_opr, shift, base_opr);
 239       __ add(base_opr, array_opr, base_opr);
 240     } else {
 241       __ add(index_opr, array_opr, base_opr);
 242     }
 243   }
 244   return new LIR_Address(base_opr, offset, type);
 245 }
 246 
 247 
 248 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
 249   LIR_Opr r;
 250   if (type == T_LONG) {
 251     r = LIR_OprFact::longConst(x);
 252   } else if (type == T_INT) {
 253     r = LIR_OprFact::intConst(checked_cast<jint>(x));
 254   } else {
 255     ShouldNotReachHere();
 256   }
 257   if (!Assembler::is_simm16(x)) {
 258     LIR_Opr tmp = new_register(type);
 259     __ move(r, tmp);
 260     return tmp;
 261   }
 262   return r;
 263 }
 264 
 265 
 266 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 267   LIR_Opr pointer = new_pointer_register();
 268   __ move(LIR_OprFact::intptrConst(counter), pointer);
 269   LIR_Address* addr = new LIR_Address(pointer, type);
 270   increment_counter(addr, step);
 271 }
 272 
 273 
 274 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 275   LIR_Opr temp = new_register(addr->type());
 276   __ move(addr, temp);
 277   __ add(temp, load_immediate(step, addr->type()), temp);
 278   __ move(temp, addr);
 279 }
 280 
 281 
 282 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 283   LIR_Opr tmp = FrameMap::R0_opr;
 284   __ load(new LIR_Address(base, disp, T_INT), tmp, info);
 285   __ cmp(condition, tmp, c);
 286 }
 287 
 288 
 289 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
 290                                int disp, BasicType type, CodeEmitInfo* info) {
 291   LIR_Opr tmp = FrameMap::R0_opr;
 292   __ load(new LIR_Address(base, disp, type), tmp, info);
 293   __ cmp(condition, reg, tmp);
 294 }
 295 
 296 
 297 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 298   assert(left != result, "should be different registers");
 299   // Using unsigned arithmetics to avoid undefined behavior due to integer overflow.
 300   // The involved operations are not sensitive to signedness.
 301   juint u_value = (juint)c;
 302   if (is_power_of_2(u_value + 1)) {
 303     __ shift_left(left, log2i_exact(u_value + 1), result);
 304     __ sub(result, left, result);
 305     return true;
 306   } else if (is_power_of_2(u_value - 1)) {
 307     __ shift_left(left, log2i_exact(u_value - 1), result);
 308     __ add(result, left, result);
 309     return true;
 310   } else if (c == -1) {
 311     __ negate(left, result);
 312     return true;
 313   }
 314   return false;
 315 }
 316 
 317 
 318 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
 319   BasicType t = item->type();
 320   LIR_Opr sp_opr = FrameMap::SP_opr;
 321   __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
 322 }
 323 
 324 
 325 //----------------------------------------------------------------------
 326 //             visitor functions
 327 //----------------------------------------------------------------------
 328 
 329 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
 330   // Following registers are used by slow_subtype_check:
 331   LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
 332   LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
 333   LIR_Opr tmp3 = FrameMap::R6_opr; // temp
 334   __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
 335 }
 336 
 337 
 338 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 339   assert(x->is_pinned(),"");
 340   LIRItem obj(x->obj(), this);
 341   obj.load_item();
 342 
 343   set_no_result(x);
 344 
 345   // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
 346   LIR_Opr lock    = FrameMap::R5_opr;
 347   LIR_Opr scratch = FrameMap::R4_opr;
 348   LIR_Opr hdr     = FrameMap::R6_opr;
 349 
 350   CodeEmitInfo* info_for_exception = nullptr;
 351   if (x->needs_null_check()) {
 352     info_for_exception = state_for(x);
 353   }
 354 
 355   CodeStub* throw_ie_stub =
 356       x->maybe_inlinetype() ?
 357       new SimpleExceptionStub(StubId::c1_throw_identity_exception_id, obj.result(), state_for(x)) :
 358       nullptr;
 359 
 360   // This CodeEmitInfo must not have the xhandlers because here the
 361   // object is already locked (xhandlers expects object to be unlocked).
 362   CodeEmitInfo* info = state_for(x, x->state(), true);
 363   monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info, throw_ie_stub);
 364 }
 365 
 366 
 367 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 368   assert(x->is_pinned(),"");
 369   LIRItem obj(x->obj(), this);
 370   obj.dont_load_item();
 371 
 372   set_no_result(x);
 373   LIR_Opr lock     = FrameMap::R5_opr;
 374   LIR_Opr hdr      = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
 375   LIR_Opr obj_temp = FrameMap::R6_opr;
 376   monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
 377 }
 378 
 379 
 380 // _ineg, _lneg, _fneg, _dneg
 381 void LIRGenerator::do_NegateOp(NegateOp* x) {
 382   LIRItem value(x->x(), this);
 383   value.load_item();
 384   LIR_Opr reg = rlock_result(x);
 385   __ negate(value.result(), reg);
 386 }
 387 
 388 
 389 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 390 //      _dadd, _dmul, _dsub, _ddiv, _drem
 391 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 392   switch (x->op()) {
 393   case Bytecodes::_fadd:
 394   case Bytecodes::_fmul:
 395   case Bytecodes::_fsub:
 396   case Bytecodes::_fdiv:
 397   case Bytecodes::_dadd:
 398   case Bytecodes::_dmul:
 399   case Bytecodes::_dsub:
 400   case Bytecodes::_ddiv: {
 401     LIRItem left(x->x(), this);
 402     LIRItem right(x->y(), this);
 403     left.load_item();
 404     right.load_item();
 405     rlock_result(x);
 406     arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result());
 407   }
 408   break;
 409 
 410   case Bytecodes::_frem:
 411   case Bytecodes::_drem: {
 412     address entry = nullptr;
 413     switch (x->op()) {
 414     case Bytecodes::_frem:
 415       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 416       break;
 417     case Bytecodes::_drem:
 418       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 419       break;
 420     default:
 421       ShouldNotReachHere();
 422     }
 423     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), nullptr);
 424     set_result(x, result);
 425   }
 426   break;
 427 
 428   default: ShouldNotReachHere();
 429   }
 430 }
 431 
 432 
 433 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 434 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 435   bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
 436 
 437   LIRItem right(x->y(), this);
 438   // Missing test if instr is commutative and if we should swap.
 439   if (right.value()->type()->as_LongConstant() &&
 440       (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == INT16_MIN) ) {
 441     // Sub is implemented by addi and can't support min_simm16 as constant..
 442     right.load_item();
 443   } else {
 444     right.load_nonconstant();
 445   }
 446   assert(right.is_constant() || right.is_register(), "wrong state of right");
 447 
 448   if (is_div_rem) {
 449     LIR_Opr divisor = right.result();
 450     if (divisor->is_register()) {
 451       CodeEmitInfo* null_check_info = state_for(x);
 452       __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
 453       __ branch(lir_cond_equal, new DivByZeroStub(null_check_info));
 454     } else {
 455       jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
 456       if (const_divisor == 0) {
 457         CodeEmitInfo* null_check_info = state_for(x);
 458         __ jump(new DivByZeroStub(null_check_info));
 459         rlock_result(x);
 460         __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
 461         return;
 462       }
 463       if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
 464         // Remainder computation would need additional tmp != R0.
 465         right.load_item();
 466       }
 467     }
 468   }
 469 
 470   LIRItem left(x->x(), this);
 471   left.load_item();
 472   rlock_result(x);
 473   if (is_div_rem) {
 474     CodeEmitInfo* info = nullptr; // Null check already done above.
 475     LIR_Opr tmp = FrameMap::R0_opr;
 476     if (x->op() == Bytecodes::_lrem) {
 477       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 478     } else if (x->op() == Bytecodes::_ldiv) {
 479       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 480     }
 481   } else {
 482     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
 483   }
 484 }
 485 
 486 
 487 // for: _iadd, _imul, _isub, _idiv, _irem
 488 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 489   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
 490 
 491   LIRItem right(x->y(), this);
 492   // Missing test if instr is commutative and if we should swap.
 493   if (right.value()->type()->as_IntConstant() &&
 494       (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == INT16_MIN) ) {
 495     // Sub is implemented by addi and can't support min_simm16 as constant.
 496     right.load_item();
 497   } else {
 498     right.load_nonconstant();
 499   }
 500   assert(right.is_constant() || right.is_register(), "wrong state of right");
 501 
 502   if (is_div_rem) {
 503     LIR_Opr divisor = right.result();
 504     if (divisor->is_register()) {
 505       CodeEmitInfo* null_check_info = state_for(x);
 506       __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
 507       __ branch(lir_cond_equal, new DivByZeroStub(null_check_info));
 508     } else {
 509       jint const_divisor = divisor->as_constant_ptr()->as_jint();
 510       if (const_divisor == 0) {
 511         CodeEmitInfo* null_check_info = state_for(x);
 512         __ jump(new DivByZeroStub(null_check_info));
 513         rlock_result(x);
 514         __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
 515         return;
 516       }
 517       if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
 518         // Remainder computation would need additional tmp != R0.
 519         right.load_item();
 520       }
 521     }
 522   }
 523 
 524   LIRItem left(x->x(), this);
 525   left.load_item();
 526   rlock_result(x);
 527   if (is_div_rem) {
 528     CodeEmitInfo* info = nullptr; // Null check already done above.
 529     LIR_Opr tmp = FrameMap::R0_opr;
 530     if (x->op() == Bytecodes::_irem) {
 531       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 532     } else if (x->op() == Bytecodes::_idiv) {
 533       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 534     }
 535   } else {
 536     arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
 537   }
 538 }
 539 
 540 
 541 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 542   ValueTag tag = x->type()->tag();
 543   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 544   switch (tag) {
 545     case floatTag:
 546     case doubleTag: do_ArithmeticOp_FPU(x);  return;
 547     case longTag:   do_ArithmeticOp_Long(x); return;
 548     case intTag:    do_ArithmeticOp_Int(x);  return;
 549     default: ShouldNotReachHere();
 550   }
 551 }
 552 
 553 
 554 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 555 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 556   LIRItem value(x->x(), this);
 557   LIRItem count(x->y(), this);
 558   value.load_item();
 559   LIR_Opr reg = rlock_result(x);
 560   LIR_Opr mcount;
 561   if (count.result()->is_register()) {
 562     mcount = FrameMap::R0_opr;
 563   } else {
 564     mcount = LIR_OprFact::illegalOpr;
 565   }
 566   shift_op(x->op(), reg, value.result(), count.result(), mcount);
 567 }
 568 
 569 
 570 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
 571   jlong int_or_long_const;
 572   if (type->as_IntConstant()) {
 573     int_or_long_const = type->as_IntConstant()->value();
 574   } else if (type->as_LongConstant()) {
 575     int_or_long_const = type->as_LongConstant()->value();
 576   } else if (type->as_ObjectConstant()) {
 577     return type->as_ObjectConstant()->value()->is_null_object();
 578   } else {
 579     return false;
 580   }
 581 
 582   if (Assembler::is_uimm(int_or_long_const, 16)) return true;
 583   if ((int_or_long_const & 0xFFFF) == 0 &&
 584       Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
 585 
 586   // see Assembler::andi
 587   if ((bc == Bytecodes::_iand || bc == Bytecodes::_land))
 588     return Assembler::andi_supports(int_or_long_const);
 589 
 590   // special case: xor -1
 591   if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor))
 592     return (int_or_long_const == -1);
 593 
 594   return false;
 595 }
 596 
 597 
 598 // _iand, _land, _ior, _lor, _ixor, _lxor
 599 void LIRGenerator::do_LogicOp(LogicOp* x) {
 600   LIRItem left(x->x(), this);
 601   LIRItem right(x->y(), this);
 602 
 603   left.load_item();
 604 
 605   Value rval = right.value();
 606   LIR_Opr r = rval->operand();
 607   ValueType *type = rval->type();
 608   // Logic instructions use unsigned immediate values.
 609   if (can_handle_logic_op_as_uimm(type, x->op())) {
 610     if (!r->is_constant()) {
 611       r = LIR_OprFact::value_type(type);
 612       rval->set_operand(r);
 613     }
 614     right.set_result(r);
 615   } else {
 616     right.load_item();
 617   }
 618 
 619   LIR_Opr reg = rlock_result(x);
 620 
 621   logic_op(x->op(), reg, left.result(), right.result());
 622 }
 623 
 624 
 625 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 626 void LIRGenerator::do_CompareOp(CompareOp* x) {
 627   LIRItem left(x->x(), this);
 628   LIRItem right(x->y(), this);
 629   left.load_item();
 630   right.load_item();
 631   LIR_Opr reg = rlock_result(x);
 632   if (x->x()->type()->is_float_kind()) {
 633     Bytecodes::Code code = x->op();
 634     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 635   } else if (x->x()->type()->tag() == longTag) {
 636     __ lcmp2int(left.result(), right.result(), reg);
 637   } else {
 638     Unimplemented();
 639   }
 640 }
 641 
 642 
 643 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 644   LIR_Opr result = new_register(T_INT);
 645   LIR_Opr t1 = LIR_OprFact::illegalOpr;
 646   LIR_Opr t2 = LIR_OprFact::illegalOpr;
 647   cmp_value.load_item();
 648   new_value.load_item();
 649 
 650   if (is_reference_type(type)) {
 651     if (UseCompressedOops) {
 652       t1 = new_register(T_OBJECT);
 653       t2 = new_register(T_OBJECT);
 654     }
 655     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
 656   } else if (type == T_INT) {
 657     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
 658   } else if (type == T_LONG) {
 659     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
 660   } else {
 661     Unimplemented();
 662   }
 663   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 664            result, type);
 665   return result;
 666 }
 667 
 668 
 669 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 670   LIR_Opr result = new_register(type);
 671   LIR_Opr tmp = FrameMap::R0_opr;
 672 
 673   value.load_item();
 674   __ xchg(addr, value.result(), result, tmp);
 675   return result;
 676 }
 677 
 678 
 679 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 680   LIR_Opr result = new_register(type);
 681   LIR_Opr tmp = FrameMap::R0_opr;
 682 
 683   value.load_item();
 684   __ xadd(addr, value.result(), result, tmp);
 685   return result;
 686 }
 687 
 688 
 689 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 690   switch (x->id()) {
 691     case vmIntrinsics::_dabs: {
 692       assert(x->number_of_arguments() == 1, "wrong type");
 693       LIRItem value(x->argument_at(0), this);
 694       value.load_item();
 695       LIR_Opr dst = rlock_result(x);
 696       __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
 697       break;
 698     }
 699     case vmIntrinsics::_floatToFloat16: {
 700       assert(x->number_of_arguments() == 1, "wrong type");
 701       LIRItem value(x->argument_at(0), this);
 702       value.load_item();
 703       LIR_Opr dst = rlock_result(x);
 704       LIR_Opr tmp = new_register(T_FLOAT);
 705       __ f2hf(value.result(), dst, tmp);
 706       break;
 707     }
 708     case vmIntrinsics::_float16ToFloat: {
 709       assert(x->number_of_arguments() == 1, "wrong type");
 710       LIRItem value(x->argument_at(0), this);
 711       value.load_item();
 712       LIR_Opr dst = rlock_result(x);
 713       __ hf2f(value.result(), dst, LIR_OprFact::illegalOpr);
 714       break;
 715     }
 716     case vmIntrinsics::_dsqrt:
 717     case vmIntrinsics::_dsqrt_strict: {
 718       assert(x->number_of_arguments() == 1, "wrong type");
 719       LIRItem value(x->argument_at(0), this);
 720       value.load_item();
 721       LIR_Opr dst = rlock_result(x);
 722       __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
 723       break;
 724     }
 725     case vmIntrinsics::_dsin:   // fall through
 726     case vmIntrinsics::_dcos:   // fall through
 727     case vmIntrinsics::_dtan:   // fall through
 728     case vmIntrinsics::_dlog:   // fall through
 729     case vmIntrinsics::_dlog10: // fall through
 730     case vmIntrinsics::_dexp: {
 731       assert(x->number_of_arguments() == 1, "wrong type");
 732 
 733       address runtime_entry = nullptr;
 734       switch (x->id()) {
 735         case vmIntrinsics::_dsin:
 736           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
 737           break;
 738         case vmIntrinsics::_dcos:
 739           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
 740           break;
 741         case vmIntrinsics::_dtan:
 742           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
 743           break;
 744         case vmIntrinsics::_dlog:
 745           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
 746           break;
 747         case vmIntrinsics::_dlog10:
 748           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
 749           break;
 750         case vmIntrinsics::_dexp:
 751           runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
 752           break;
 753         default:
 754           ShouldNotReachHere();
 755       }
 756 
 757       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), nullptr);
 758       set_result(x, result);
 759       break;
 760     }
 761     case vmIntrinsics::_dpow: {
 762       assert(x->number_of_arguments() == 2, "wrong type");
 763       address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
 764       LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), nullptr);
 765       set_result(x, result);
 766       break;
 767     }
 768     default:
 769       break;
 770   }
 771 }
 772 
 773 
 774 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 775   assert(x->number_of_arguments() == 5, "wrong type");
 776 
 777   // Make all state_for calls early since they can emit code.
 778   CodeEmitInfo* info = nullptr;
 779   if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
 780     info = state_for(x, x->state_before());
 781     info->set_force_reexecute();
 782   } else {
 783     info = state_for(x, x->state());
 784   }
 785 
 786   LIRItem src     (x->argument_at(0), this);
 787   LIRItem src_pos (x->argument_at(1), this);
 788   LIRItem dst     (x->argument_at(2), this);
 789   LIRItem dst_pos (x->argument_at(3), this);
 790   LIRItem length  (x->argument_at(4), this);
 791 
 792   // Load all values in callee_save_registers (C calling convention),
 793   // as this makes the parameter passing to the fast case simpler.
 794   src.load_item_force     (FrameMap::R14_oop_opr);
 795   src_pos.load_item_force (FrameMap::R15_opr);
 796   dst.load_item_force     (FrameMap::R17_oop_opr);
 797   dst_pos.load_item_force (FrameMap::R18_opr);
 798   length.load_item_force  (FrameMap::R19_opr);
 799   LIR_Opr tmp =            FrameMap::R20_opr;
 800 
 801   int flags;
 802   ciArrayKlass* expected_type;
 803   arraycopy_helper(x, &flags, &expected_type);
 804   if (x->check_flag(Instruction::OmitChecksFlag)) {
 805     flags = 0;
 806   }
 807   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
 808                length.result(), tmp,
 809                expected_type, flags, info);
 810   set_no_result(x);
 811 }
 812 
 813 
 814 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 815 // _i2b, _i2c, _i2s
 816 void LIRGenerator::do_Convert(Convert* x) {
 817 
 818   // Register conversion.
 819   LIRItem value(x->value(), this);
 820   LIR_Opr reg = rlock_result(x);
 821   value.load_item();
 822   switch (x->op()) {
 823     case Bytecodes::_f2l:
 824     case Bytecodes::_d2l:
 825     case Bytecodes::_f2i:
 826     case Bytecodes::_d2i: value.set_destroys_register(); break; // USE_KILL
 827     default: break;
 828   }
 829   __ convert(x->op(), value.result(), reg);
 830 }
 831 
 832 
 833 void LIRGenerator::do_NewInstance(NewInstance* x) {
 834   // This instruction can be deoptimized in the slow path.
 835   const LIR_Opr reg = result_register_for(x->type());
 836 #ifndef PRODUCT
 837   if (PrintNotLoaded && !x->klass()->is_loaded()) {
 838     tty->print_cr("   ###class not loaded at new bci %d", x->printable_bci());
 839   }
 840 #endif
 841   CodeEmitInfo* info = state_for(x, x->needs_state_before() ? x->state_before() : x->state());
 842   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
 843   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 844   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 845   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 846   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 847   new_instance(reg, x->klass(), x->is_unresolved(), !x->is_unresolved() && x->klass()->is_inlinetype(),
 848                tmp1, tmp2, tmp3, tmp4, klass_reg, info);
 849 
 850   // Must prevent reordering of stores for object initialization
 851   // with stores that publish the new object.
 852   __ membar_storestore();
 853   LIR_Opr result = rlock_result(x);
 854   __ move(reg, result);
 855 }
 856 
 857 
 858 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 859   // Evaluate state_for early since it may emit code.
 860   CodeEmitInfo* info = nullptr;
 861   if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
 862     info = state_for(x, x->state_before());
 863     info->set_force_reexecute();
 864   } else {
 865     info = state_for(x, x->state());
 866   }
 867 
 868   LIRItem length(x->length(), this);
 869   length.load_item();
 870 
 871   LIR_Opr reg = result_register_for(x->type());
 872   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
 873   // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
 874   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 875   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 876   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 877   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 878   LIR_Opr len = length.result();
 879   BasicType elem_type = x->elt_type();
 880 
 881   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
 882 
 883   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
 884   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
 885 
 886   // Must prevent reordering of stores for object initialization
 887   // with stores that publish the new object.
 888   __ membar_storestore();
 889   LIR_Opr result = rlock_result(x);
 890   __ move(reg, result);
 891 }
 892 
 893 
 894 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
 895   // Evaluate state_for early since it may emit code.
 896   CodeEmitInfo* info = state_for(x, x->state());
 897   // In case of patching (i.e., object class is not yet loaded),
 898   // we need to reexecute the instruction and therefore provide
 899   // the state before the parameters have been consumed.
 900   CodeEmitInfo* patching_info = nullptr;
 901   if (!x->klass()->is_loaded() || PatchALot) {
 902     patching_info = state_for(x, x->state_before());
 903   }
 904 
 905   LIRItem length(x->length(), this);
 906   length.load_item();
 907 
 908   const LIR_Opr reg = result_register_for(x->type());
 909   LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
 910   // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
 911   LIR_Opr tmp1 = FrameMap::R5_oop_opr;
 912   LIR_Opr tmp2 = FrameMap::R6_oop_opr;
 913   LIR_Opr tmp3 = FrameMap::R7_oop_opr;
 914   LIR_Opr tmp4 = FrameMap::R8_oop_opr;
 915   LIR_Opr len = length.result();
 916 
 917   ciKlass* obj = ciObjArrayKlass::make(x->klass());
 918 
 919   // TODO 8265122 Implement a fast path for this
 920   bool is_flat = obj->is_loaded() && obj->is_flat_array_klass();
 921   bool is_null_free = obj->is_loaded() && obj->as_array_klass()->is_elem_null_free();
 922 
 923   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, is_null_free);
 924   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
 925     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
 926   }
 927   klass2reg_with_patching(klass_reg, obj, patching_info);
 928   bool always_slow_path = is_null_free || is_flat;
 929   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path, true /*zero_array*/, always_slow_path);
 930 
 931   // Must prevent reordering of stores for object initialization
 932   // with stores that publish the new object.
 933   __ membar_storestore();
 934   LIR_Opr result = rlock_result(x);
 935   __ move(reg, result);
 936 }
 937 
 938 
 939 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
 940   Values* dims = x->dims();
 941   int i = dims->length();
 942   LIRItemList* items = new LIRItemList(i, i, nullptr);
 943   while (i-- > 0) {
 944     LIRItem* size = new LIRItem(dims->at(i), this);
 945     items->at_put(i, size);
 946   }
 947 
 948   // Evaluate state_for early since it may emit code.
 949   CodeEmitInfo* patching_info = nullptr;
 950   if (!x->klass()->is_loaded() || PatchALot) {
 951     patching_info = state_for(x, x->state_before());
 952 
 953     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
 954     // clone all handlers (NOTE: Usually this is handled transparently
 955     // by the CodeEmitInfo cloning logic in CodeStub constructors but
 956     // is done explicitly here because a stub isn't being used).
 957     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
 958   }
 959   CodeEmitInfo* info = state_for(x, x->state());
 960 
 961   i = dims->length();
 962   while (i-- > 0) {
 963     LIRItem* size = items->at(i);
 964     size->load_nonconstant();
 965     // FrameMap::_reserved_argument_area_size includes the dimensions
 966     // varargs, because it's initialized to hir()->max_stack() when the
 967     // FrameMap is created.
 968     store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
 969   }
 970 
 971   const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
 972   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
 973 
 974   LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
 975   __ move(LIR_OprFact::intConst(x->rank()), rank);
 976 
 977   LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
 978   __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
 979           varargs);
 980 
 981   // Note: This instruction can be deoptimized in the slow path.
 982   LIR_OprList* args = new LIR_OprList(3);
 983   args->append(klass_reg);
 984   args->append(rank);
 985   args->append(varargs);
 986   const LIR_Opr reg = result_register_for(x->type());
 987   __ call_runtime(Runtime1::entry_for(StubId::c1_new_multi_array_id),
 988                   LIR_OprFact::illegalOpr,
 989                   reg, args, info);
 990 
 991   // Must prevent reordering of stores for object initialization
 992   // with stores that publish the new object.
 993   __ membar_storestore();
 994   LIR_Opr result = rlock_result(x);
 995   __ move(reg, result);
 996 }
 997 
 998 
 999 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1000   // nothing to do for now
1001 }
1002 
1003 
1004 void LIRGenerator::do_CheckCast(CheckCast* x) {
1005   LIRItem obj(x->obj(), this);
1006   CodeEmitInfo* patching_info = nullptr;
1007   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1008     // Must do this before locking the destination register as
1009     // an oop register, and before the obj is loaded (so x->obj()->item()
1010     // is valid for creating a debug info location).
1011     patching_info = state_for(x, x->state_before());
1012   }
1013   obj.load_item();
1014   LIR_Opr out_reg = rlock_result(x);
1015   CodeStub* stub;
1016   CodeEmitInfo* info_for_exception =
1017       (x->needs_exception_state() ? state_for(x) :
1018                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1019 
1020   if (x->is_incompatible_class_change_check()) {
1021     assert(patching_info == nullptr, "can't patch this");
1022     stub = new SimpleExceptionStub(StubId::c1_throw_incompatible_class_change_error_id,
1023                                    LIR_OprFact::illegalOpr, info_for_exception);
1024   } else if (x->is_invokespecial_receiver_check()) {
1025     assert(patching_info == nullptr, "can't patch this");
1026     stub = new DeoptimizeStub(info_for_exception,
1027                               Deoptimization::Reason_class_check,
1028                               Deoptimization::Action_none);
1029   } else {
1030     stub = new SimpleExceptionStub(StubId::c1_throw_class_cast_exception_id, obj.result(), info_for_exception);
1031   }
1032   // Following registers are used by slow_subtype_check:
1033   LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1034   LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1035   LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1036   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1037                x->direct_compare(), info_for_exception, patching_info, stub,
1038                x->profiled_method(), x->profiled_bci(), x->is_null_free());
1039 }
1040 
1041 
1042 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1043   LIRItem obj(x->obj(), this);
1044   CodeEmitInfo* patching_info = nullptr;
1045   if (!x->klass()->is_loaded() || PatchALot) {
1046     patching_info = state_for(x, x->state_before());
1047   }
1048   // Ensure the result register is not the input register because the
1049   // result is initialized before the patching safepoint.
1050   obj.load_item();
1051   LIR_Opr out_reg = rlock_result(x);
1052   // Following registers are used by slow_subtype_check:
1053   LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1054   LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1055   LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1056   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1057                 x->direct_compare(), patching_info,
1058                 x->profiled_method(), x->profiled_bci());
1059 }
1060 
1061 
1062 // Intrinsic for Class::isInstance
1063 address LIRGenerator::isInstance_entry() {
1064   return Runtime1::entry_for(StubId::c1_is_instance_of_id);
1065 }
1066 
1067 
1068 void LIRGenerator::do_If(If* x) {
1069   assert(x->number_of_sux() == 2, "inconsistency");
1070   ValueTag tag = x->x()->type()->tag();
1071   LIRItem xitem(x->x(), this);
1072   LIRItem yitem(x->y(), this);
1073   LIRItem* xin = &xitem;
1074   LIRItem* yin = &yitem;
1075   If::Condition cond = x->cond();
1076 
1077   LIR_Opr left = LIR_OprFact::illegalOpr;
1078   LIR_Opr right = LIR_OprFact::illegalOpr;
1079 
1080   xin->load_item();
1081   left = xin->result();
1082 
1083   if (yin->result()->is_constant() && !x->substitutability_check()) {
1084     if (yin->result()->type() == T_INT &&
1085         Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1086       // Inline int constants which are small enough to be immediate operands.
1087       right = LIR_OprFact::value_type(yin->value()->type());
1088     } else if (tag == longTag && yin->get_jlong_constant() == 0 &&
1089                (cond == If::eql || cond == If::neq)) {
1090       // Inline long zero.
1091       right = LIR_OprFact::value_type(yin->value()->type());
1092     } else if (tag == objectTag && (yin->get_jobject_constant()->is_null_object())) {
1093       right = LIR_OprFact::value_type(yin->value()->type());
1094     }
1095   }
1096 
1097   if (right == LIR_OprFact::illegalOpr) {
1098     yin->load_item();
1099     right = yin->result();
1100   }
1101   set_no_result(x);
1102 
1103   // Add safepoint before generating condition code so it can be recomputed.
1104   if (x->is_safepoint()) {
1105     // Increment backedge counter if needed.
1106     increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1107         x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1108     __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1109   }
1110 
1111   if (x->substitutability_check()) {
1112     substitutability_check(x, *xin, *yin);
1113   } else {
1114     __ cmp(lir_cond(cond), left, right);
1115   }
1116 
1117   // Generate branch profiling. Profiling code doesn't kill flags.
1118   profile_branch(x, cond);
1119   move_to_phi(x->state());
1120   if (x->x()->type()->is_float_kind()) {
1121     __ branch(lir_cond(cond), x->tsux(), x->usux());
1122   } else {
1123     __ branch(lir_cond(cond), x->tsux());
1124   }
1125   assert(x->default_sux() == x->fsux(), "wrong destination above");
1126   __ jump(x->default_sux());
1127 }
1128 
1129 
1130 LIR_Opr LIRGenerator::getThreadPointer() {
1131   return FrameMap::as_pointer_opr(R16_thread);
1132 }
1133 
1134 
1135 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1136   LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1137   __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1138   LIR_OprList* args = new LIR_OprList(1);
1139   args->append(arg1);
1140   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1141   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1142 }
1143 
1144 
1145 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1146                                         CodeEmitInfo* info) {
1147 #ifdef _LP64
1148   __ store(value, address, info);
1149 #else
1150   Unimplemented();
1151 //  __ volatile_store_mem_reg(value, address, info);
1152 #endif
1153 }
1154 
1155 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1156                                        CodeEmitInfo* info) {
1157 #ifdef _LP64
1158   __ load(address, result, info);
1159 #else
1160   Unimplemented();
1161 //  __ volatile_load_mem_reg(address, result, info);
1162 #endif
1163   __ membar_acquire();
1164 }
1165 
1166 
1167 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1168   assert(UseCRC32Intrinsics, "or should not be here");
1169   LIR_Opr result = rlock_result(x);
1170 
1171   switch (x->id()) {
1172     case vmIntrinsics::_updateCRC32: {
1173       LIRItem crc(x->argument_at(0), this);
1174       LIRItem val(x->argument_at(1), this);
1175       // Registers destroyed by update_crc32.
1176       crc.set_destroys_register();
1177       val.set_destroys_register();
1178       crc.load_item();
1179       val.load_item();
1180       __ update_crc32(crc.result(), val.result(), result);
1181       break;
1182     }
1183     case vmIntrinsics::_updateBytesCRC32:
1184     case vmIntrinsics::_updateByteBufferCRC32: {
1185       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1186 
1187       LIRItem crc(x->argument_at(0), this);
1188       LIRItem buf(x->argument_at(1), this);
1189       LIRItem off(x->argument_at(2), this);
1190       LIRItem len(x->argument_at(3), this);
1191       buf.load_item();
1192       off.load_nonconstant();
1193 
1194       LIR_Opr index = off.result();
1195       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1196       if (off.result()->is_constant()) {
1197         index = LIR_OprFact::illegalOpr;
1198         offset += off.result()->as_jint();
1199       }
1200       LIR_Opr base_op = buf.result();
1201       LIR_Address* a = nullptr;
1202 
1203       if (index->is_valid()) {
1204         LIR_Opr tmp = new_register(T_LONG);
1205         __ convert(Bytecodes::_i2l, index, tmp);
1206         index = tmp;
1207         __ add(index, LIR_OprFact::intptrConst(offset), index);
1208         a = new LIR_Address(base_op, index, T_BYTE);
1209       } else {
1210         a = new LIR_Address(base_op, offset, T_BYTE);
1211       }
1212 
1213       BasicTypeList signature(3);
1214       signature.append(T_INT);
1215       signature.append(T_ADDRESS);
1216       signature.append(T_INT);
1217       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1218       const LIR_Opr result_reg = result_register_for(x->type());
1219 
1220       LIR_Opr arg1 = cc->at(0),
1221               arg2 = cc->at(1),
1222               arg3 = cc->at(2);
1223 
1224       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1225       __ leal(LIR_OprFact::address(a), arg2);
1226       len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1227 
1228       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1229       __ move(result_reg, result);
1230       break;
1231     }
1232     default: {
1233       ShouldNotReachHere();
1234     }
1235   }
1236 }
1237 
1238 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1239   assert(UseCRC32CIntrinsics, "or should not be here");
1240   LIR_Opr result = rlock_result(x);
1241 
1242   switch (x->id()) {
1243     case vmIntrinsics::_updateBytesCRC32C:
1244     case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1245       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1246 
1247       LIRItem crc(x->argument_at(0), this);
1248       LIRItem buf(x->argument_at(1), this);
1249       LIRItem off(x->argument_at(2), this);
1250       LIRItem end(x->argument_at(3), this);
1251       buf.load_item();
1252       off.load_nonconstant();
1253       end.load_nonconstant();
1254 
1255       // len = end - off
1256       LIR_Opr len  = end.result();
1257       LIR_Opr tmpA = new_register(T_INT);
1258       LIR_Opr tmpB = new_register(T_INT);
1259       __ move(end.result(), tmpA);
1260       __ move(off.result(), tmpB);
1261       __ sub(tmpA, tmpB, tmpA);
1262       len = tmpA;
1263 
1264       LIR_Opr index = off.result();
1265       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1266       if (off.result()->is_constant()) {
1267         index = LIR_OprFact::illegalOpr;
1268         offset += off.result()->as_jint();
1269       }
1270       LIR_Opr base_op = buf.result();
1271       LIR_Address* a = nullptr;
1272 
1273       if (index->is_valid()) {
1274         LIR_Opr tmp = new_register(T_LONG);
1275         __ convert(Bytecodes::_i2l, index, tmp);
1276         index = tmp;
1277         __ add(index, LIR_OprFact::intptrConst(offset), index);
1278         a = new LIR_Address(base_op, index, T_BYTE);
1279       } else {
1280         a = new LIR_Address(base_op, offset, T_BYTE);
1281       }
1282 
1283       BasicTypeList signature(3);
1284       signature.append(T_INT);
1285       signature.append(T_ADDRESS);
1286       signature.append(T_INT);
1287       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1288       const LIR_Opr result_reg = result_register_for(x->type());
1289 
1290       LIR_Opr arg1 = cc->at(0),
1291               arg2 = cc->at(1),
1292               arg3 = cc->at(2);
1293 
1294       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1295       __ leal(LIR_OprFact::address(a), arg2);
1296       __ move(len, cc->at(2));   // We skip int->long conversion here, because CRC32C stub expects int.
1297 
1298       __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1299       __ move(result_reg, result);
1300       break;
1301     }
1302     default: {
1303       ShouldNotReachHere();
1304     }
1305   }
1306 }
1307 
1308 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1309   assert(x->number_of_arguments() == 3, "wrong type");
1310   assert(UseFMA, "Needs FMA instructions support.");
1311   LIRItem value(x->argument_at(0), this);
1312   LIRItem value1(x->argument_at(1), this);
1313   LIRItem value2(x->argument_at(2), this);
1314 
1315   value.load_item();
1316   value1.load_item();
1317   value2.load_item();
1318 
1319   LIR_Opr calc_input = value.result();
1320   LIR_Opr calc_input1 = value1.result();
1321   LIR_Opr calc_input2 = value2.result();
1322   LIR_Opr calc_result = rlock_result(x);
1323 
1324   switch (x->id()) {
1325   case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1326   case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1327   default:                  ShouldNotReachHere();
1328   }
1329 }
1330 
1331 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1332   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1333 }