1 /*
2 * Copyright (c) 2005, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2026 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/macroAssembler.inline.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_Instruction.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_LIRGenerator.hpp"
32 #include "c1/c1_Runtime1.hpp"
33 #include "c1/c1_ValueStack.hpp"
34 #include "ci/ciArray.hpp"
35 #include "ci/ciInlineKlass.hpp"
36 #include "ci/ciObjArrayKlass.hpp"
37 #include "ci/ciTypeArrayKlass.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "runtime/vm_version.hpp"
41 #include "utilities/powerOfTwo.hpp"
42 #include "vmreg_ppc.inline.hpp"
43 #include <stdint.h>
44
45 #ifdef ASSERT
46 #define __ gen()->lir(__FILE__, __LINE__)->
47 #else
48 #define __ gen()->lir()->
49 #endif
50
51 void LIRItem::load_byte_item() {
52 // Byte loads use same registers as other loads.
53 load_item();
54 }
55
56
57 void LIRItem::load_nonconstant() {
58 LIR_Opr r = value()->operand();
59 if (_gen->can_inline_as_constant(value())) {
60 if (!r->is_constant()) {
61 r = LIR_OprFact::value_type(value()->type());
62 }
63 _result = r;
64 } else {
65 load_item();
66 }
67 }
68
69
70 //--------------------------------------------------------------
71 // LIRGenerator
72 //--------------------------------------------------------------
73
74 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::R3_oop_opr; }
75 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::R4_opr; }
76 LIR_Opr LIRGenerator::syncLockOpr() { return FrameMap::R5_opr; } // Need temp effect for MonitorEnterStub.
77 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
78 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } // not needed
79
80 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
81 LIR_Opr opr;
82 switch (type->tag()) {
83 case intTag: opr = FrameMap::R3_opr; break;
84 case objectTag: opr = FrameMap::R3_oop_opr; break;
85 case longTag: opr = FrameMap::R3_long_opr; break;
86 case floatTag: opr = FrameMap::F1_opr; break;
87 case doubleTag: opr = FrameMap::F1_double_opr; break;
88
89 case addressTag:
90 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
91 }
92
93 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
94 return opr;
95 }
96
97 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
98 ShouldNotReachHere();
99 return LIR_OprFact::illegalOpr;
100 }
101
102
103 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
104 return new_register(T_INT);
105 }
106
107
108 //--------- loading items into registers --------------------------------
109
110 // PPC cannot inline all constants.
111 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
112 if (v->type()->as_IntConstant() != nullptr) {
113 return Assembler::is_simm16(v->type()->as_IntConstant()->value());
114 } else if (v->type()->as_LongConstant() != nullptr) {
115 return Assembler::is_simm16(v->type()->as_LongConstant()->value());
116 } else if (v->type()->as_ObjectConstant() != nullptr) {
117 return v->type()->as_ObjectConstant()->value()->is_null_object();
118 } else {
119 return false;
120 }
121 }
122
123
124 // Only simm16 constants can be inlined.
125 bool LIRGenerator::can_inline_as_constant(Value i) const {
126 return can_store_as_constant(i, as_BasicType(i->type()));
127 }
128
129
130 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
131 if (c->type() == T_INT) {
132 return Assembler::is_simm16(c->as_jint());
133 }
134 if (c->type() == T_LONG) {
135 return Assembler::is_simm16(c->as_jlong());
136 }
137 if (c->type() == T_OBJECT) {
138 return c->as_jobject() == nullptr;
139 }
140 return false;
141 }
142
143
144 LIR_Opr LIRGenerator::safepoint_poll_register() {
145 return new_register(T_INT);
146 }
147
148
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
150 int shift, int disp, BasicType type) {
151 assert(base->is_register(), "must be");
152 intx large_disp = disp;
153
154 // Accumulate fixed displacements.
155 if (index->is_constant()) {
156 LIR_Const *constant = index->as_constant_ptr();
157 if (constant->type() == T_LONG) {
158 large_disp += constant->as_jlong() << shift;
159 } else {
160 large_disp += (intx)(constant->as_jint()) << shift;
161 }
162 index = LIR_OprFact::illegalOpr;
163 }
164
165 if (index->is_register()) {
166 // Apply the shift and accumulate the displacement.
167 if (shift > 0) {
168 // Use long register to avoid overflow when shifting large index values left.
169 LIR_Opr tmp = new_register(T_LONG);
170 __ convert(Bytecodes::_i2l, index, tmp);
171 __ shift_left(tmp, shift, tmp);
172 index = tmp;
173 }
174 if (large_disp != 0) {
175 LIR_Opr tmp = new_pointer_register();
176 if (Assembler::is_simm16(large_disp)) {
177 __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
178 index = tmp;
179 } else {
180 __ move(LIR_OprFact::intptrConst(large_disp), tmp);
181 __ add(tmp, index, tmp);
182 index = tmp;
183 }
184 large_disp = 0;
185 }
186 } else if (!Assembler::is_simm16(large_disp)) {
187 // Index is illegal so replace it with the displacement loaded into a register.
188 index = new_pointer_register();
189 __ move(LIR_OprFact::intptrConst(large_disp), index);
190 large_disp = 0;
191 }
192
193 // At this point we either have base + index or base + displacement.
194 if (large_disp == 0) {
195 return new LIR_Address(base, index, type);
196 } else {
197 assert(Assembler::is_simm16(large_disp), "must be");
198 return new LIR_Address(base, large_disp, type);
199 }
200 }
201
202
203 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
204 BasicType type) {
205 int elem_size = type2aelembytes(type);
206 int shift = exact_log2(elem_size);
207
208 LIR_Opr base_opr;
209 intx offset = arrayOopDesc::base_offset_in_bytes(type);
210
211 if (index_opr->is_constant()) {
212 intx i = index_opr->as_constant_ptr()->as_jint();
213 intx array_offset = i * elem_size;
214 if (Assembler::is_simm16(array_offset + offset)) {
215 base_opr = array_opr;
216 offset = array_offset + offset;
217 } else {
218 base_opr = new_pointer_register();
219 if (Assembler::is_simm16(array_offset)) {
220 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
221 } else {
222 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
223 __ add(base_opr, array_opr, base_opr);
224 }
225 }
226 } else {
227 #ifdef _LP64
228 if (index_opr->type() == T_INT) {
229 LIR_Opr tmp = new_register(T_LONG);
230 __ convert(Bytecodes::_i2l, index_opr, tmp);
231 index_opr = tmp;
232 }
233 #endif
234
235 base_opr = new_pointer_register();
236 assert (index_opr->is_register(), "Must be register");
237 if (shift > 0) {
238 __ shift_left(index_opr, shift, base_opr);
239 __ add(base_opr, array_opr, base_opr);
240 } else {
241 __ add(index_opr, array_opr, base_opr);
242 }
243 }
244 return new LIR_Address(base_opr, offset, type);
245 }
246
247
248 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
249 LIR_Opr r;
250 if (type == T_LONG) {
251 r = LIR_OprFact::longConst(x);
252 } else if (type == T_INT) {
253 r = LIR_OprFact::intConst(checked_cast<jint>(x));
254 } else {
255 ShouldNotReachHere();
256 }
257 if (!Assembler::is_simm16(x)) {
258 LIR_Opr tmp = new_register(type);
259 __ move(r, tmp);
260 return tmp;
261 }
262 return r;
263 }
264
265
266 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
267 LIR_Opr pointer = new_pointer_register();
268 __ move(LIR_OprFact::intptrConst(counter), pointer);
269 LIR_Address* addr = new LIR_Address(pointer, type);
270 increment_counter(addr, step);
271 }
272
273
274 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
275 LIR_Opr temp = new_register(addr->type());
276 __ move(addr, temp);
277 __ add(temp, load_immediate(step, addr->type()), temp);
278 __ move(temp, addr);
279 }
280
281
282 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
283 LIR_Opr tmp = FrameMap::R0_opr;
284 __ load(new LIR_Address(base, disp, T_INT), tmp, info);
285 __ cmp(condition, tmp, c);
286 }
287
288
289 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
290 int disp, BasicType type, CodeEmitInfo* info) {
291 LIR_Opr tmp = FrameMap::R0_opr;
292 __ load(new LIR_Address(base, disp, type), tmp, info);
293 __ cmp(condition, reg, tmp);
294 }
295
296
297 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
298 assert(left != result, "should be different registers");
299 // Using unsigned arithmetics to avoid undefined behavior due to integer overflow.
300 // The involved operations are not sensitive to signedness.
301 juint u_value = (juint)c;
302 if (is_power_of_2(u_value + 1)) {
303 __ shift_left(left, log2i_exact(u_value + 1), result);
304 __ sub(result, left, result);
305 return true;
306 } else if (is_power_of_2(u_value - 1)) {
307 __ shift_left(left, log2i_exact(u_value - 1), result);
308 __ add(result, left, result);
309 return true;
310 } else if (c == -1) {
311 __ negate(left, result);
312 return true;
313 }
314 return false;
315 }
316
317
318 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
319 BasicType t = item->type();
320 LIR_Opr sp_opr = FrameMap::SP_opr;
321 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
322 }
323
324
325 //----------------------------------------------------------------------
326 // visitor functions
327 //----------------------------------------------------------------------
328
329 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
330 // Following registers are used by slow_subtype_check:
331 LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
332 LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
333 LIR_Opr tmp3 = FrameMap::R6_opr; // temp
334 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
335 }
336
337
338 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
339 assert(x->is_pinned(),"");
340 LIRItem obj(x->obj(), this);
341 obj.load_item();
342
343 set_no_result(x);
344
345 // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
346 LIR_Opr lock = FrameMap::R5_opr;
347 LIR_Opr scratch = FrameMap::R4_opr;
348 LIR_Opr hdr = FrameMap::R6_opr;
349
350 CodeEmitInfo* info_for_exception = nullptr;
351 if (x->needs_null_check()) {
352 info_for_exception = state_for(x);
353 }
354
355 CodeStub* throw_ie_stub =
356 x->maybe_inlinetype() ?
357 new SimpleExceptionStub(StubId::c1_throw_identity_exception_id, obj.result(), state_for(x)) :
358 nullptr;
359
360 // This CodeEmitInfo must not have the xhandlers because here the
361 // object is already locked (xhandlers expects object to be unlocked).
362 CodeEmitInfo* info = state_for(x, x->state(), true);
363 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info, throw_ie_stub);
364 }
365
366
367 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
368 assert(x->is_pinned(),"");
369 LIRItem obj(x->obj(), this);
370 obj.dont_load_item();
371
372 set_no_result(x);
373 LIR_Opr lock = FrameMap::R5_opr;
374 LIR_Opr hdr = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
375 LIR_Opr obj_temp = FrameMap::R6_opr;
376 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
377 }
378
379
380 // _ineg, _lneg, _fneg, _dneg
381 void LIRGenerator::do_NegateOp(NegateOp* x) {
382 LIRItem value(x->x(), this);
383 value.load_item();
384 LIR_Opr reg = rlock_result(x);
385 __ negate(value.result(), reg);
386 }
387
388
389 // for _fadd, _fmul, _fsub, _fdiv, _frem
390 // _dadd, _dmul, _dsub, _ddiv, _drem
391 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
392 switch (x->op()) {
393 case Bytecodes::_fadd:
394 case Bytecodes::_fmul:
395 case Bytecodes::_fsub:
396 case Bytecodes::_fdiv:
397 case Bytecodes::_dadd:
398 case Bytecodes::_dmul:
399 case Bytecodes::_dsub:
400 case Bytecodes::_ddiv: {
401 LIRItem left(x->x(), this);
402 LIRItem right(x->y(), this);
403 left.load_item();
404 right.load_item();
405 rlock_result(x);
406 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result());
407 }
408 break;
409
410 case Bytecodes::_frem:
411 case Bytecodes::_drem: {
412 address entry = nullptr;
413 switch (x->op()) {
414 case Bytecodes::_frem:
415 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
416 break;
417 case Bytecodes::_drem:
418 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
419 break;
420 default:
421 ShouldNotReachHere();
422 }
423 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), nullptr);
424 set_result(x, result);
425 }
426 break;
427
428 default: ShouldNotReachHere();
429 }
430 }
431
432
433 // for _ladd, _lmul, _lsub, _ldiv, _lrem
434 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
435 bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
436
437 LIRItem right(x->y(), this);
438 // Missing test if instr is commutative and if we should swap.
439 if (right.value()->type()->as_LongConstant() &&
440 (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == INT16_MIN) ) {
441 // Sub is implemented by addi and can't support min_simm16 as constant..
442 right.load_item();
443 } else {
444 right.load_nonconstant();
445 }
446 assert(right.is_constant() || right.is_register(), "wrong state of right");
447
448 if (is_div_rem) {
449 LIR_Opr divisor = right.result();
450 if (divisor->is_register()) {
451 CodeEmitInfo* null_check_info = state_for(x);
452 __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
453 __ branch(lir_cond_equal, new DivByZeroStub(null_check_info));
454 } else {
455 jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
456 if (const_divisor == 0) {
457 CodeEmitInfo* null_check_info = state_for(x);
458 __ jump(new DivByZeroStub(null_check_info));
459 rlock_result(x);
460 __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
461 return;
462 }
463 if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
464 // Remainder computation would need additional tmp != R0.
465 right.load_item();
466 }
467 }
468 }
469
470 LIRItem left(x->x(), this);
471 left.load_item();
472 rlock_result(x);
473 if (is_div_rem) {
474 CodeEmitInfo* info = nullptr; // Null check already done above.
475 LIR_Opr tmp = FrameMap::R0_opr;
476 if (x->op() == Bytecodes::_lrem) {
477 __ irem(left.result(), right.result(), x->operand(), tmp, info);
478 } else if (x->op() == Bytecodes::_ldiv) {
479 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
480 }
481 } else {
482 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
483 }
484 }
485
486
487 // for: _iadd, _imul, _isub, _idiv, _irem
488 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
489 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
490
491 LIRItem right(x->y(), this);
492 // Missing test if instr is commutative and if we should swap.
493 if (right.value()->type()->as_IntConstant() &&
494 (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == INT16_MIN) ) {
495 // Sub is implemented by addi and can't support min_simm16 as constant.
496 right.load_item();
497 } else {
498 right.load_nonconstant();
499 }
500 assert(right.is_constant() || right.is_register(), "wrong state of right");
501
502 if (is_div_rem) {
503 LIR_Opr divisor = right.result();
504 if (divisor->is_register()) {
505 CodeEmitInfo* null_check_info = state_for(x);
506 __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
507 __ branch(lir_cond_equal, new DivByZeroStub(null_check_info));
508 } else {
509 jint const_divisor = divisor->as_constant_ptr()->as_jint();
510 if (const_divisor == 0) {
511 CodeEmitInfo* null_check_info = state_for(x);
512 __ jump(new DivByZeroStub(null_check_info));
513 rlock_result(x);
514 __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
515 return;
516 }
517 if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
518 // Remainder computation would need additional tmp != R0.
519 right.load_item();
520 }
521 }
522 }
523
524 LIRItem left(x->x(), this);
525 left.load_item();
526 rlock_result(x);
527 if (is_div_rem) {
528 CodeEmitInfo* info = nullptr; // Null check already done above.
529 LIR_Opr tmp = FrameMap::R0_opr;
530 if (x->op() == Bytecodes::_irem) {
531 __ irem(left.result(), right.result(), x->operand(), tmp, info);
532 } else if (x->op() == Bytecodes::_idiv) {
533 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
534 }
535 } else {
536 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
537 }
538 }
539
540
541 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
542 ValueTag tag = x->type()->tag();
543 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
544 switch (tag) {
545 case floatTag:
546 case doubleTag: do_ArithmeticOp_FPU(x); return;
547 case longTag: do_ArithmeticOp_Long(x); return;
548 case intTag: do_ArithmeticOp_Int(x); return;
549 default: ShouldNotReachHere();
550 }
551 }
552
553
554 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
555 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
556 LIRItem value(x->x(), this);
557 LIRItem count(x->y(), this);
558 value.load_item();
559 LIR_Opr reg = rlock_result(x);
560 LIR_Opr mcount;
561 if (count.result()->is_register()) {
562 mcount = FrameMap::R0_opr;
563 } else {
564 mcount = LIR_OprFact::illegalOpr;
565 }
566 shift_op(x->op(), reg, value.result(), count.result(), mcount);
567 }
568
569
570 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
571 jlong int_or_long_const;
572 if (type->as_IntConstant()) {
573 int_or_long_const = type->as_IntConstant()->value();
574 } else if (type->as_LongConstant()) {
575 int_or_long_const = type->as_LongConstant()->value();
576 } else if (type->as_ObjectConstant()) {
577 return type->as_ObjectConstant()->value()->is_null_object();
578 } else {
579 return false;
580 }
581
582 if (Assembler::is_uimm(int_or_long_const, 16)) return true;
583 if ((int_or_long_const & 0xFFFF) == 0 &&
584 Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
585
586 // see Assembler::andi
587 if (bc == Bytecodes::_iand &&
588 (is_power_of_2(int_or_long_const+1) ||
589 is_power_of_2(int_or_long_const) ||
590 is_power_of_2(-int_or_long_const))) return true;
591 if (bc == Bytecodes::_land &&
592 (is_power_of_2((unsigned long)int_or_long_const+1) ||
593 (Assembler::is_uimm(int_or_long_const, 32) && is_power_of_2(int_or_long_const)) ||
594 (int_or_long_const != min_jlong && is_power_of_2(-int_or_long_const)))) return true;
595
596 // special case: xor -1
597 if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor) &&
598 int_or_long_const == -1) return true;
599 return false;
600 }
601
602
603 // _iand, _land, _ior, _lor, _ixor, _lxor
604 void LIRGenerator::do_LogicOp(LogicOp* x) {
605 LIRItem left(x->x(), this);
606 LIRItem right(x->y(), this);
607
608 left.load_item();
609
610 Value rval = right.value();
611 LIR_Opr r = rval->operand();
612 ValueType *type = rval->type();
613 // Logic instructions use unsigned immediate values.
614 if (can_handle_logic_op_as_uimm(type, x->op())) {
615 if (!r->is_constant()) {
616 r = LIR_OprFact::value_type(type);
617 rval->set_operand(r);
618 }
619 right.set_result(r);
620 } else {
621 right.load_item();
622 }
623
624 LIR_Opr reg = rlock_result(x);
625
626 logic_op(x->op(), reg, left.result(), right.result());
627 }
628
629
630 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
631 void LIRGenerator::do_CompareOp(CompareOp* x) {
632 LIRItem left(x->x(), this);
633 LIRItem right(x->y(), this);
634 left.load_item();
635 right.load_item();
636 LIR_Opr reg = rlock_result(x);
637 if (x->x()->type()->is_float_kind()) {
638 Bytecodes::Code code = x->op();
639 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
640 } else if (x->x()->type()->tag() == longTag) {
641 __ lcmp2int(left.result(), right.result(), reg);
642 } else {
643 Unimplemented();
644 }
645 }
646
647
648 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
649 LIR_Opr result = new_register(T_INT);
650 LIR_Opr t1 = LIR_OprFact::illegalOpr;
651 LIR_Opr t2 = LIR_OprFact::illegalOpr;
652 cmp_value.load_item();
653 new_value.load_item();
654
655 if (is_reference_type(type)) {
656 if (UseCompressedOops) {
657 t1 = new_register(T_OBJECT);
658 t2 = new_register(T_OBJECT);
659 }
660 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
661 } else if (type == T_INT) {
662 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
663 } else if (type == T_LONG) {
664 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
665 } else {
666 Unimplemented();
667 }
668 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
669 result, type);
670 return result;
671 }
672
673
674 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
675 LIR_Opr result = new_register(type);
676 LIR_Opr tmp = FrameMap::R0_opr;
677
678 value.load_item();
679 __ xchg(addr, value.result(), result, tmp);
680 return result;
681 }
682
683
684 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
685 LIR_Opr result = new_register(type);
686 LIR_Opr tmp = FrameMap::R0_opr;
687
688 value.load_item();
689 __ xadd(addr, value.result(), result, tmp);
690 return result;
691 }
692
693
694 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
695 switch (x->id()) {
696 case vmIntrinsics::_dabs: {
697 assert(x->number_of_arguments() == 1, "wrong type");
698 LIRItem value(x->argument_at(0), this);
699 value.load_item();
700 LIR_Opr dst = rlock_result(x);
701 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
702 break;
703 }
704 case vmIntrinsics::_floatToFloat16: {
705 assert(x->number_of_arguments() == 1, "wrong type");
706 LIRItem value(x->argument_at(0), this);
707 value.load_item();
708 LIR_Opr dst = rlock_result(x);
709 LIR_Opr tmp = new_register(T_FLOAT);
710 __ f2hf(value.result(), dst, tmp);
711 break;
712 }
713 case vmIntrinsics::_float16ToFloat: {
714 assert(x->number_of_arguments() == 1, "wrong type");
715 LIRItem value(x->argument_at(0), this);
716 value.load_item();
717 LIR_Opr dst = rlock_result(x);
718 __ hf2f(value.result(), dst, LIR_OprFact::illegalOpr);
719 break;
720 }
721 case vmIntrinsics::_dsqrt:
722 case vmIntrinsics::_dsqrt_strict: {
723 assert(x->number_of_arguments() == 1, "wrong type");
724 LIRItem value(x->argument_at(0), this);
725 value.load_item();
726 LIR_Opr dst = rlock_result(x);
727 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
728 break;
729 }
730 case vmIntrinsics::_dsin: // fall through
731 case vmIntrinsics::_dcos: // fall through
732 case vmIntrinsics::_dtan: // fall through
733 case vmIntrinsics::_dlog: // fall through
734 case vmIntrinsics::_dlog10: // fall through
735 case vmIntrinsics::_dexp: {
736 assert(x->number_of_arguments() == 1, "wrong type");
737
738 address runtime_entry = nullptr;
739 switch (x->id()) {
740 case vmIntrinsics::_dsin:
741 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
742 break;
743 case vmIntrinsics::_dcos:
744 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
745 break;
746 case vmIntrinsics::_dtan:
747 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
748 break;
749 case vmIntrinsics::_dlog:
750 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
751 break;
752 case vmIntrinsics::_dlog10:
753 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
754 break;
755 case vmIntrinsics::_dexp:
756 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
757 break;
758 default:
759 ShouldNotReachHere();
760 }
761
762 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), nullptr);
763 set_result(x, result);
764 break;
765 }
766 case vmIntrinsics::_dpow: {
767 assert(x->number_of_arguments() == 2, "wrong type");
768 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
769 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), nullptr);
770 set_result(x, result);
771 break;
772 }
773 default:
774 break;
775 }
776 }
777
778
779 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
780 assert(x->number_of_arguments() == 5, "wrong type");
781
782 // Make all state_for calls early since they can emit code.
783 CodeEmitInfo* info = nullptr;
784 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
785 info = state_for(x, x->state_before());
786 info->set_force_reexecute();
787 } else {
788 info = state_for(x, x->state());
789 }
790
791 LIRItem src (x->argument_at(0), this);
792 LIRItem src_pos (x->argument_at(1), this);
793 LIRItem dst (x->argument_at(2), this);
794 LIRItem dst_pos (x->argument_at(3), this);
795 LIRItem length (x->argument_at(4), this);
796
797 // Load all values in callee_save_registers (C calling convention),
798 // as this makes the parameter passing to the fast case simpler.
799 src.load_item_force (FrameMap::R14_oop_opr);
800 src_pos.load_item_force (FrameMap::R15_opr);
801 dst.load_item_force (FrameMap::R17_oop_opr);
802 dst_pos.load_item_force (FrameMap::R18_opr);
803 length.load_item_force (FrameMap::R19_opr);
804 LIR_Opr tmp = FrameMap::R20_opr;
805
806 int flags;
807 ciArrayKlass* expected_type;
808 arraycopy_helper(x, &flags, &expected_type);
809 if (x->check_flag(Instruction::OmitChecksFlag)) {
810 flags = 0;
811 }
812 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
813 length.result(), tmp,
814 expected_type, flags, info);
815 set_no_result(x);
816 }
817
818
819 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
820 // _i2b, _i2c, _i2s
821 void LIRGenerator::do_Convert(Convert* x) {
822
823 // Register conversion.
824 LIRItem value(x->value(), this);
825 LIR_Opr reg = rlock_result(x);
826 value.load_item();
827 switch (x->op()) {
828 case Bytecodes::_f2l:
829 case Bytecodes::_d2l:
830 case Bytecodes::_f2i:
831 case Bytecodes::_d2i: value.set_destroys_register(); break; // USE_KILL
832 default: break;
833 }
834 __ convert(x->op(), value.result(), reg);
835 }
836
837
838 void LIRGenerator::do_NewInstance(NewInstance* x) {
839 // This instruction can be deoptimized in the slow path.
840 const LIR_Opr reg = result_register_for(x->type());
841 #ifndef PRODUCT
842 if (PrintNotLoaded && !x->klass()->is_loaded()) {
843 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
844 }
845 #endif
846 CodeEmitInfo* info = state_for(x, x->needs_state_before() ? x->state_before() : x->state());
847 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
848 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
849 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
850 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
851 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
852 new_instance(reg, x->klass(), x->is_unresolved(), !x->is_unresolved() && x->klass()->is_inlinetype(),
853 tmp1, tmp2, tmp3, tmp4, klass_reg, info);
854
855 // Must prevent reordering of stores for object initialization
856 // with stores that publish the new object.
857 __ membar_storestore();
858 LIR_Opr result = rlock_result(x);
859 __ move(reg, result);
860 }
861
862
863 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
864 // Evaluate state_for early since it may emit code.
865 CodeEmitInfo* info = nullptr;
866 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
867 info = state_for(x, x->state_before());
868 info->set_force_reexecute();
869 } else {
870 info = state_for(x, x->state());
871 }
872
873 LIRItem length(x->length(), this);
874 length.load_item();
875
876 LIR_Opr reg = result_register_for(x->type());
877 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
878 // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
879 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
880 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
881 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
882 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
883 LIR_Opr len = length.result();
884 BasicType elem_type = x->elt_type();
885
886 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
887
888 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
889 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
890
891 // Must prevent reordering of stores for object initialization
892 // with stores that publish the new object.
893 __ membar_storestore();
894 LIR_Opr result = rlock_result(x);
895 __ move(reg, result);
896 }
897
898
899 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
900 // Evaluate state_for early since it may emit code.
901 CodeEmitInfo* info = state_for(x, x->state());
902 // In case of patching (i.e., object class is not yet loaded),
903 // we need to reexecute the instruction and therefore provide
904 // the state before the parameters have been consumed.
905 CodeEmitInfo* patching_info = nullptr;
906 if (!x->klass()->is_loaded() || PatchALot) {
907 patching_info = state_for(x, x->state_before());
908 }
909
910 LIRItem length(x->length(), this);
911 length.load_item();
912
913 const LIR_Opr reg = result_register_for(x->type());
914 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
915 // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
916 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
917 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
918 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
919 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
920 LIR_Opr len = length.result();
921
922 ciKlass* obj = ciObjArrayKlass::make(x->klass());
923
924 // TODO 8265122 Implement a fast path for this
925 bool is_flat = obj->is_loaded() && obj->is_flat_array_klass();
926 bool is_null_free = obj->is_loaded() && obj->as_array_klass()->is_elem_null_free();
927
928 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, is_null_free);
929 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
930 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
931 }
932 klass2reg_with_patching(klass_reg, obj, patching_info);
933 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path, true, is_null_free || is_flat);
934
935 // Must prevent reordering of stores for object initialization
936 // with stores that publish the new object.
937 __ membar_storestore();
938 LIR_Opr result = rlock_result(x);
939 __ move(reg, result);
940 }
941
942
943 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
944 Values* dims = x->dims();
945 int i = dims->length();
946 LIRItemList* items = new LIRItemList(i, i, nullptr);
947 while (i-- > 0) {
948 LIRItem* size = new LIRItem(dims->at(i), this);
949 items->at_put(i, size);
950 }
951
952 // Evaluate state_for early since it may emit code.
953 CodeEmitInfo* patching_info = nullptr;
954 if (!x->klass()->is_loaded() || PatchALot) {
955 patching_info = state_for(x, x->state_before());
956
957 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
958 // clone all handlers (NOTE: Usually this is handled transparently
959 // by the CodeEmitInfo cloning logic in CodeStub constructors but
960 // is done explicitly here because a stub isn't being used).
961 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
962 }
963 CodeEmitInfo* info = state_for(x, x->state());
964
965 i = dims->length();
966 while (i-- > 0) {
967 LIRItem* size = items->at(i);
968 size->load_nonconstant();
969 // FrameMap::_reserved_argument_area_size includes the dimensions
970 // varargs, because it's initialized to hir()->max_stack() when the
971 // FrameMap is created.
972 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
973 }
974
975 const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
976 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
977
978 LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
979 __ move(LIR_OprFact::intConst(x->rank()), rank);
980
981 LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
982 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
983 varargs);
984
985 // Note: This instruction can be deoptimized in the slow path.
986 LIR_OprList* args = new LIR_OprList(3);
987 args->append(klass_reg);
988 args->append(rank);
989 args->append(varargs);
990 const LIR_Opr reg = result_register_for(x->type());
991 __ call_runtime(Runtime1::entry_for(StubId::c1_new_multi_array_id),
992 LIR_OprFact::illegalOpr,
993 reg, args, info);
994
995 // Must prevent reordering of stores for object initialization
996 // with stores that publish the new object.
997 __ membar_storestore();
998 LIR_Opr result = rlock_result(x);
999 __ move(reg, result);
1000 }
1001
1002
1003 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1004 // nothing to do for now
1005 }
1006
1007
1008 void LIRGenerator::do_CheckCast(CheckCast* x) {
1009 LIRItem obj(x->obj(), this);
1010 CodeEmitInfo* patching_info = nullptr;
1011 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1012 // Must do this before locking the destination register as
1013 // an oop register, and before the obj is loaded (so x->obj()->item()
1014 // is valid for creating a debug info location).
1015 patching_info = state_for(x, x->state_before());
1016 }
1017 obj.load_item();
1018 LIR_Opr out_reg = rlock_result(x);
1019 CodeStub* stub;
1020 CodeEmitInfo* info_for_exception =
1021 (x->needs_exception_state() ? state_for(x) :
1022 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1023
1024 if (x->is_incompatible_class_change_check()) {
1025 assert(patching_info == nullptr, "can't patch this");
1026 stub = new SimpleExceptionStub(StubId::c1_throw_incompatible_class_change_error_id,
1027 LIR_OprFact::illegalOpr, info_for_exception);
1028 } else if (x->is_invokespecial_receiver_check()) {
1029 assert(patching_info == nullptr, "can't patch this");
1030 stub = new DeoptimizeStub(info_for_exception,
1031 Deoptimization::Reason_class_check,
1032 Deoptimization::Action_none);
1033 } else {
1034 stub = new SimpleExceptionStub(StubId::c1_throw_class_cast_exception_id, obj.result(), info_for_exception);
1035 }
1036 // Following registers are used by slow_subtype_check:
1037 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1038 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1039 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1040 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1041 x->direct_compare(), info_for_exception, patching_info, stub,
1042 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1043 }
1044
1045
1046 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1047 LIRItem obj(x->obj(), this);
1048 CodeEmitInfo* patching_info = nullptr;
1049 if (!x->klass()->is_loaded() || PatchALot) {
1050 patching_info = state_for(x, x->state_before());
1051 }
1052 // Ensure the result register is not the input register because the
1053 // result is initialized before the patching safepoint.
1054 obj.load_item();
1055 LIR_Opr out_reg = rlock_result(x);
1056 // Following registers are used by slow_subtype_check:
1057 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1058 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1059 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1060 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1061 x->direct_compare(), patching_info,
1062 x->profiled_method(), x->profiled_bci());
1063 }
1064
1065
1066 // Intrinsic for Class::isInstance
1067 address LIRGenerator::isInstance_entry() {
1068 return Runtime1::entry_for(StubId::c1_is_instance_of_id);
1069 }
1070
1071
1072 void LIRGenerator::do_If(If* x) {
1073 assert(x->number_of_sux() == 2, "inconsistency");
1074 ValueTag tag = x->x()->type()->tag();
1075 LIRItem xitem(x->x(), this);
1076 LIRItem yitem(x->y(), this);
1077 LIRItem* xin = &xitem;
1078 LIRItem* yin = &yitem;
1079 If::Condition cond = x->cond();
1080
1081 LIR_Opr left = LIR_OprFact::illegalOpr;
1082 LIR_Opr right = LIR_OprFact::illegalOpr;
1083
1084 xin->load_item();
1085 left = xin->result();
1086
1087 if (yin->result()->is_constant() && !x->substitutability_check()) {
1088 if (yin->result()->type() == T_INT &&
1089 Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1090 // Inline int constants which are small enough to be immediate operands.
1091 right = LIR_OprFact::value_type(yin->value()->type());
1092 } else if (tag == longTag && yin->get_jlong_constant() == 0 &&
1093 (cond == If::eql || cond == If::neq)) {
1094 // Inline long zero.
1095 right = LIR_OprFact::value_type(yin->value()->type());
1096 } else if (tag == objectTag && (yin->get_jobject_constant()->is_null_object())) {
1097 right = LIR_OprFact::value_type(yin->value()->type());
1098 }
1099 }
1100
1101 if (right == LIR_OprFact::illegalOpr) {
1102 yin->load_item();
1103 right = yin->result();
1104 }
1105 set_no_result(x);
1106
1107 // Add safepoint before generating condition code so it can be recomputed.
1108 if (x->is_safepoint()) {
1109 // Increment backedge counter if needed.
1110 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1111 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1112 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1113 }
1114
1115 if (x->substitutability_check()) {
1116 substitutability_check(x, *xin, *yin);
1117 } else {
1118 __ cmp(lir_cond(cond), left, right);
1119 }
1120
1121 // Generate branch profiling. Profiling code doesn't kill flags.
1122 profile_branch(x, cond);
1123 move_to_phi(x->state());
1124 if (x->x()->type()->is_float_kind()) {
1125 __ branch(lir_cond(cond), x->tsux(), x->usux());
1126 } else {
1127 __ branch(lir_cond(cond), x->tsux());
1128 }
1129 assert(x->default_sux() == x->fsux(), "wrong destination above");
1130 __ jump(x->default_sux());
1131 }
1132
1133
1134 LIR_Opr LIRGenerator::getThreadPointer() {
1135 return FrameMap::as_pointer_opr(R16_thread);
1136 }
1137
1138
1139 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1140 LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1141 __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1142 LIR_OprList* args = new LIR_OprList(1);
1143 args->append(arg1);
1144 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1145 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1146 }
1147
1148
1149 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1150 CodeEmitInfo* info) {
1151 #ifdef _LP64
1152 __ store(value, address, info);
1153 #else
1154 Unimplemented();
1155 // __ volatile_store_mem_reg(value, address, info);
1156 #endif
1157 }
1158
1159 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1160 CodeEmitInfo* info) {
1161 #ifdef _LP64
1162 __ load(address, result, info);
1163 #else
1164 Unimplemented();
1165 // __ volatile_load_mem_reg(address, result, info);
1166 #endif
1167 __ membar_acquire();
1168 }
1169
1170
1171 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1172 assert(UseCRC32Intrinsics, "or should not be here");
1173 LIR_Opr result = rlock_result(x);
1174
1175 switch (x->id()) {
1176 case vmIntrinsics::_updateCRC32: {
1177 LIRItem crc(x->argument_at(0), this);
1178 LIRItem val(x->argument_at(1), this);
1179 // Registers destroyed by update_crc32.
1180 crc.set_destroys_register();
1181 val.set_destroys_register();
1182 crc.load_item();
1183 val.load_item();
1184 __ update_crc32(crc.result(), val.result(), result);
1185 break;
1186 }
1187 case vmIntrinsics::_updateBytesCRC32:
1188 case vmIntrinsics::_updateByteBufferCRC32: {
1189 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1190
1191 LIRItem crc(x->argument_at(0), this);
1192 LIRItem buf(x->argument_at(1), this);
1193 LIRItem off(x->argument_at(2), this);
1194 LIRItem len(x->argument_at(3), this);
1195 buf.load_item();
1196 off.load_nonconstant();
1197
1198 LIR_Opr index = off.result();
1199 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1200 if (off.result()->is_constant()) {
1201 index = LIR_OprFact::illegalOpr;
1202 offset += off.result()->as_jint();
1203 }
1204 LIR_Opr base_op = buf.result();
1205 LIR_Address* a = nullptr;
1206
1207 if (index->is_valid()) {
1208 LIR_Opr tmp = new_register(T_LONG);
1209 __ convert(Bytecodes::_i2l, index, tmp);
1210 index = tmp;
1211 __ add(index, LIR_OprFact::intptrConst(offset), index);
1212 a = new LIR_Address(base_op, index, T_BYTE);
1213 } else {
1214 a = new LIR_Address(base_op, offset, T_BYTE);
1215 }
1216
1217 BasicTypeList signature(3);
1218 signature.append(T_INT);
1219 signature.append(T_ADDRESS);
1220 signature.append(T_INT);
1221 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1222 const LIR_Opr result_reg = result_register_for(x->type());
1223
1224 LIR_Opr arg1 = cc->at(0),
1225 arg2 = cc->at(1),
1226 arg3 = cc->at(2);
1227
1228 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1229 __ leal(LIR_OprFact::address(a), arg2);
1230 len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1231
1232 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1233 __ move(result_reg, result);
1234 break;
1235 }
1236 default: {
1237 ShouldNotReachHere();
1238 }
1239 }
1240 }
1241
1242 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1243 assert(UseCRC32CIntrinsics, "or should not be here");
1244 LIR_Opr result = rlock_result(x);
1245
1246 switch (x->id()) {
1247 case vmIntrinsics::_updateBytesCRC32C:
1248 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1249 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1250
1251 LIRItem crc(x->argument_at(0), this);
1252 LIRItem buf(x->argument_at(1), this);
1253 LIRItem off(x->argument_at(2), this);
1254 LIRItem end(x->argument_at(3), this);
1255 buf.load_item();
1256 off.load_nonconstant();
1257 end.load_nonconstant();
1258
1259 // len = end - off
1260 LIR_Opr len = end.result();
1261 LIR_Opr tmpA = new_register(T_INT);
1262 LIR_Opr tmpB = new_register(T_INT);
1263 __ move(end.result(), tmpA);
1264 __ move(off.result(), tmpB);
1265 __ sub(tmpA, tmpB, tmpA);
1266 len = tmpA;
1267
1268 LIR_Opr index = off.result();
1269 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1270 if (off.result()->is_constant()) {
1271 index = LIR_OprFact::illegalOpr;
1272 offset += off.result()->as_jint();
1273 }
1274 LIR_Opr base_op = buf.result();
1275 LIR_Address* a = nullptr;
1276
1277 if (index->is_valid()) {
1278 LIR_Opr tmp = new_register(T_LONG);
1279 __ convert(Bytecodes::_i2l, index, tmp);
1280 index = tmp;
1281 __ add(index, LIR_OprFact::intptrConst(offset), index);
1282 a = new LIR_Address(base_op, index, T_BYTE);
1283 } else {
1284 a = new LIR_Address(base_op, offset, T_BYTE);
1285 }
1286
1287 BasicTypeList signature(3);
1288 signature.append(T_INT);
1289 signature.append(T_ADDRESS);
1290 signature.append(T_INT);
1291 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1292 const LIR_Opr result_reg = result_register_for(x->type());
1293
1294 LIR_Opr arg1 = cc->at(0),
1295 arg2 = cc->at(1),
1296 arg3 = cc->at(2);
1297
1298 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1299 __ leal(LIR_OprFact::address(a), arg2);
1300 __ move(len, cc->at(2)); // We skip int->long conversion here, because CRC32C stub expects int.
1301
1302 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1303 __ move(result_reg, result);
1304 break;
1305 }
1306 default: {
1307 ShouldNotReachHere();
1308 }
1309 }
1310 }
1311
1312 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1313 assert(x->number_of_arguments() == 3, "wrong type");
1314 assert(UseFMA, "Needs FMA instructions support.");
1315 LIRItem value(x->argument_at(0), this);
1316 LIRItem value1(x->argument_at(1), this);
1317 LIRItem value2(x->argument_at(2), this);
1318
1319 value.load_item();
1320 value1.load_item();
1321 value2.load_item();
1322
1323 LIR_Opr calc_input = value.result();
1324 LIR_Opr calc_input1 = value1.result();
1325 LIR_Opr calc_input2 = value2.result();
1326 LIR_Opr calc_result = rlock_result(x);
1327
1328 switch (x->id()) {
1329 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1330 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1331 default: ShouldNotReachHere();
1332 }
1333 }
1334
1335 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1336 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1337 }