diff a/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp b/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp --- a/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp +++ b/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp @@ -915,25 +915,25 @@ Unimplemented(); return 0; } static address gen_c2i_adapter(MacroAssembler *masm, - int total_args_passed, - int comp_args_on_stack, - const BasicType *sig_bt, - const VMRegPair *regs, - Label& call_interpreter, - const Register& ientry) { + int comp_args_on_stack, + const GrowableArray* sig, + const VMRegPair *regs, + Label& call_interpreter, + const Register& ientry) { address c2i_entrypoint; const Register sender_SP = R21_sender_SP; // == R21_tmp1 const Register code = R22_tmp2; //const Register ientry = R23_tmp3; const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 }; const int num_value_regs = sizeof(value_regs) / sizeof(Register); int value_regs_index = 0; + int total_args_passed = sig->length(); const Register return_pc = R27_tmp7; const Register tmp = R28_tmp8; assert_different_registers(sender_SP, code, ientry, return_pc, tmp); @@ -978,10 +978,12 @@ int st_off = adapter_size - wordSize; // Write the args into the outgoing interpreter space. for (int i = 0; i < total_args_passed; i++) { + BasicType bt = sig->at(i)._bt; + VMReg r_1 = regs[i].first(); VMReg r_2 = regs[i].second(); if (!r_1->is_valid()) { assert(!r_2->is_valid(), ""); continue; @@ -1007,11 +1009,11 @@ __ stw(r, st_off, R1_SP); st_off-=wordSize; } else { // Longs are given 2 64-bit slots in the interpreter, but the // data is passed in only 1 slot. - if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { + if (bt == T_LONG || bt == T_DOUBLE) { DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); ) st_off-=wordSize; } __ std(r, st_off, R1_SP); st_off-=wordSize; @@ -1046,15 +1048,11 @@ __ bctr(); return c2i_entrypoint; } -void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, - int total_args_passed, - int comp_args_on_stack, - const BasicType *sig_bt, - const VMRegPair *regs) { +void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, int comp_args_on_stack, const GrowableArray* sig, const VMRegPair *regs) { // Load method's entry-point from method. __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method); __ mtctr(R12_scratch2); @@ -1076,10 +1074,11 @@ const Register ld_ptr = R15_esp; const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 }; const int num_value_regs = sizeof(value_regs) / sizeof(Register); int value_regs_index = 0; + int total_args_passed = sig->length(); int ld_offset = total_args_passed*wordSize; // Cut-out for having no stack args. Since up to 2 int/oop args are passed // in registers, we will occasionally have no stack args. int comp_words_on_stack = 0; @@ -1096,13 +1095,15 @@ } // Now generate the shuffle code. Pick up all register args and move the // rest through register value=Z_R12. BLOCK_COMMENT("Shuffle arguments"); + for (int i = 0; i < total_args_passed; i++) { - if (sig_bt[i] == T_VOID) { - assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); + BasicType bt = sig->at(i)._bt; + if (bt == T_VOID) { + assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half"); continue; } // Pick up 0, 1 or 2 words from ld_ptr. assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), @@ -1131,33 +1132,33 @@ } else { r = r_1->as_Register(); } if (!r_2->is_valid()) { // Not sure we need to do this but it shouldn't hurt. - if (is_reference_type(sig_bt[i]) || sig_bt[i] == T_ADDRESS) { + if (is_reference_type(bt) || bt == T_ADDRESS) { __ ld(r, ld_offset, ld_ptr); ld_offset-=wordSize; } else { __ lwz(r, ld_offset, ld_ptr); ld_offset-=wordSize; } } else { // In 64bit, longs are given 2 64-bit slots in the interpreter, but the // data is passed in only 1 slot. - if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { + if (bt == T_LONG || bt == T_DOUBLE) { ld_offset-=wordSize; } __ ld(r, ld_offset, ld_ptr); ld_offset-=wordSize; } if (r_1->is_stack()) { // Now store value where the compiler expects it int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size; - if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN || - sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) { + if (bt == T_INT || bt == T_FLOAT || bt == T_BOOLEAN || + bt == T_SHORT || bt == T_CHAR || bt == T_BYTE) { __ stw(r, st_off, R1_SP); } else { __ std(r, st_off, R1_SP); } } @@ -1180,21 +1181,26 @@ // Jump to the compiled code just as if compiled code was doing it. __ bctr(); } -void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, - int total_args_passed, +void SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm, int comp_args_on_stack, - const BasicType *sig_bt, - const VMRegPair *regs, - address entry_address[AdapterBlob::ENTRY_COUNT]) { + const GrowableArray* sig, + const VMRegPair* regs, + const GrowableArray* sig_cc, + const VMRegPair* regs_cc, + const GrowableArray* sig_cc_ro, + const VMRegPair* regs_cc_ro, + address entry_address[AdapterBlob::ENTRY_COUNT], + AdapterBlob*& new_adapter, + bool allocate_code_blob) { // entry: i2c __ align(CodeEntryAlignment); entry_address[AdapterBlob::I2C] = __ pc(); - gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); + gen_i2c_adapter(masm, comp_args_on_stack, sig, regs); // entry: c2i unverified __ align(CodeEntryAlignment); @@ -1251,11 +1257,11 @@ entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc(); BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); bs->c2i_entry_barrier(masm, /* tmp register*/ ic_klass, /* tmp register*/ receiver_klass, /* tmp register*/ code); - gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry); + gen_c2i_adapter(masm, comp_args_on_stack, sig, regs, call_interpreter, ientry); return; } // An oop arg. Must pass a handle not the oop itself. static void object_move(MacroAssembler* masm, @@ -3821,7 +3827,20 @@ RuntimeStub::new_runtime_stub(name, &code, frame_complete, (framesize >> (LogBytesPerWord - LogBytesPerInt)), oop_maps, false); return stub; } - #endif // INCLUDE_JFR + +const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j; +const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j; + +int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) { + Unimplemented(); + return 0; +} + +BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) { + Unimplemented(); + return nullptr; +} +