1689 __ mr(R4_ARG2/*issuing_pc*/, return_pc);
1690
1691 // Return to exception handler.
1692 __ blr();
1693
1694 //=============================================================================
1695 // Counter overflow.
1696
1697 if (inc_counter) {
1698 // Handle invocation counter overflow.
1699 __ bind(invocation_counter_overflow);
1700
1701 generate_counter_overflow(continue_after_compile);
1702 }
1703
1704 return entry;
1705 }
1706
1707 // Generic interpreted method entry to (asm) interpreter.
1708 //
1709 address TemplateInterpreterGenerator::generate_normal_entry(bool synchronized) {
1710 bool inc_counter = UseCompiler || CountCompiledCalls;
1711 address entry = __ pc();
1712 // Generate the code to allocate the interpreter stack frame.
1713 Register Rsize_of_parameters = R4_ARG2, // Written by generate_fixed_frame.
1714 Rsize_of_locals = R5_ARG3; // Written by generate_fixed_frame.
1715
1716 // Does also a stack check to assure this frame fits on the stack.
1717 generate_fixed_frame(false, Rsize_of_parameters, Rsize_of_locals);
1718
1719 // --------------------------------------------------------------------------
1720 // Zero out non-parameter locals.
1721 // Note: *Always* zero out non-parameter locals as Sparc does. It's not
1722 // worth to ask the flag, just do it.
1723 Register Rslot_addr = R6_ARG4,
1724 Rnum = R7_ARG5;
1725 Label Lno_locals, Lzero_loop;
1726
1727 // Set up the zeroing loop.
1728 __ subf(Rnum, Rsize_of_parameters, Rsize_of_locals);
1729 __ subf(Rslot_addr, Rsize_of_parameters, R18_locals);
1784 // --------------------------------------------------------------------------
1785 // Locking of synchronized methods. Must happen AFTER invocation_counter
1786 // check and stack overflow check, so method is not locked if overflows.
1787 if (synchronized) {
1788 lock_method(R3_ARG1, R4_ARG2, R5_ARG3);
1789 }
1790 #ifdef ASSERT
1791 else {
1792 Label Lok;
1793 __ lhz(R0, in_bytes(Method::access_flags_offset()), R19_method);
1794 __ andi_(R0, R0, JVM_ACC_SYNCHRONIZED);
1795 __ asm_assert_eq("method needs synchronization");
1796 __ bind(Lok);
1797 }
1798 #endif // ASSERT
1799
1800 // --------------------------------------------------------------------------
1801 // JVMTI support
1802 __ notify_method_entry();
1803
1804 // --------------------------------------------------------------------------
1805 // Start executing instructions.
1806 __ dispatch_next(vtos);
1807
1808 // --------------------------------------------------------------------------
1809 if (inc_counter) {
1810 // Handle invocation counter overflow.
1811 __ bind(invocation_counter_overflow);
1812 generate_counter_overflow(continue_after_compile);
1813 }
1814 return entry;
1815 }
1816
1817 // CRC32 Intrinsics.
1818 //
1819 // Contract on scratch and work registers.
1820 // =======================================
1821 //
1822 // On ppc, the register set {R2..R12} is available in the interpreter as scratch/work registers.
1823 // You should, however, keep in mind that {R3_ARG1..R10_ARG8} is the C-ABI argument register set.
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1689 __ mr(R4_ARG2/*issuing_pc*/, return_pc);
1690
1691 // Return to exception handler.
1692 __ blr();
1693
1694 //=============================================================================
1695 // Counter overflow.
1696
1697 if (inc_counter) {
1698 // Handle invocation counter overflow.
1699 __ bind(invocation_counter_overflow);
1700
1701 generate_counter_overflow(continue_after_compile);
1702 }
1703
1704 return entry;
1705 }
1706
1707 // Generic interpreted method entry to (asm) interpreter.
1708 //
1709 address TemplateInterpreterGenerator::generate_normal_entry(bool synchronized, bool object_init) {
1710 bool inc_counter = UseCompiler || CountCompiledCalls;
1711 address entry = __ pc();
1712 // Generate the code to allocate the interpreter stack frame.
1713 Register Rsize_of_parameters = R4_ARG2, // Written by generate_fixed_frame.
1714 Rsize_of_locals = R5_ARG3; // Written by generate_fixed_frame.
1715
1716 // Does also a stack check to assure this frame fits on the stack.
1717 generate_fixed_frame(false, Rsize_of_parameters, Rsize_of_locals);
1718
1719 // --------------------------------------------------------------------------
1720 // Zero out non-parameter locals.
1721 // Note: *Always* zero out non-parameter locals as Sparc does. It's not
1722 // worth to ask the flag, just do it.
1723 Register Rslot_addr = R6_ARG4,
1724 Rnum = R7_ARG5;
1725 Label Lno_locals, Lzero_loop;
1726
1727 // Set up the zeroing loop.
1728 __ subf(Rnum, Rsize_of_parameters, Rsize_of_locals);
1729 __ subf(Rslot_addr, Rsize_of_parameters, R18_locals);
1784 // --------------------------------------------------------------------------
1785 // Locking of synchronized methods. Must happen AFTER invocation_counter
1786 // check and stack overflow check, so method is not locked if overflows.
1787 if (synchronized) {
1788 lock_method(R3_ARG1, R4_ARG2, R5_ARG3);
1789 }
1790 #ifdef ASSERT
1791 else {
1792 Label Lok;
1793 __ lhz(R0, in_bytes(Method::access_flags_offset()), R19_method);
1794 __ andi_(R0, R0, JVM_ACC_SYNCHRONIZED);
1795 __ asm_assert_eq("method needs synchronization");
1796 __ bind(Lok);
1797 }
1798 #endif // ASSERT
1799
1800 // --------------------------------------------------------------------------
1801 // JVMTI support
1802 __ notify_method_entry();
1803
1804 // --------------------------------------------------------------------------
1805 // Issue a StoreStore barrier on entry to Object_init if the
1806 // class has strict field fields. Be lazy, always do it.
1807 if (object_init) {
1808 __ membar(Assembler::StoreStore);
1809 }
1810
1811 // --------------------------------------------------------------------------
1812 // Start executing instructions.
1813 __ dispatch_next(vtos);
1814
1815 // --------------------------------------------------------------------------
1816 if (inc_counter) {
1817 // Handle invocation counter overflow.
1818 __ bind(invocation_counter_overflow);
1819 generate_counter_overflow(continue_after_compile);
1820 }
1821 return entry;
1822 }
1823
1824 // CRC32 Intrinsics.
1825 //
1826 // Contract on scratch and work registers.
1827 // =======================================
1828 //
1829 // On ppc, the register set {R2..R12} is available in the interpreter as scratch/work registers.
1830 // You should, however, keep in mind that {R3_ARG1..R10_ARG8} is the C-ABI argument register set.
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