1 /*
2 * Copyright (c) 1999, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "c1/c1_Runtime1.hpp"
30 #include "classfile/systemDictionary.hpp"
31 #include "gc/shared/barrierSetAssembler.hpp"
32 #include "gc/shared/collectedHeap.hpp"
33 #include "interpreter/interpreter.hpp"
34 #include "oops/arrayOop.hpp"
35 #include "oops/markWord.hpp"
36 #include "runtime/basicLock.hpp"
37 #include "runtime/os.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40
41 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
42 FloatRegister freg0, FloatRegister freg1,
43 Register result) {
44 if (is_float) {
45 float_compare(result, freg0, freg1, unordered_result);
46 } else {
47 double_compare(result, freg0, freg1, unordered_result);
48 }
49 }
50
51 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
52 assert_different_registers(hdr, obj, basic_lock, temp, t0, t1);
53 int null_check_offset = -1;
54
55 verify_oop(obj);
56
57 // save object being locked into the BasicObjectLock
58 sd(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
59
60 null_check_offset = offset();
61
62 fast_lock(basic_lock, obj, hdr, temp, t1, slow_case);
63
64 return null_check_offset;
65 }
66
67 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
68 assert_different_registers(hdr, obj, basic_lock, temp, t0, t1);
69
70 // load object
71 ld(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
72 verify_oop(obj);
73
74 fast_unlock(obj, hdr, temp, t1, slow_case);
75 }
76
77 // Defines obj, preserves var_size_in_bytes
78 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
79 if (UseTLAB) {
80 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
81 } else {
82 j(slow_case);
83 }
84 }
85
86 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
87 assert_different_registers(obj, klass, len, tmp1, tmp2);
88 if (UseCompactObjectHeaders) {
89 ld(tmp1, Address(klass, Klass::prototype_header_offset()));
90 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
91 } else {
92 // This assumes that all prototype bits fitr in an int32_t
93 mv(tmp1, checked_cast<int32_t>(markWord::prototype().value()));
94 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
95 encode_klass_not_null(tmp1, klass, tmp2);
96 sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
97 }
98
99 if (len->is_valid()) {
100 sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
101 int base_offset = arrayOopDesc::length_offset_in_bytes() + BytesPerInt;
102 if (!is_aligned(base_offset, BytesPerWord)) {
103 assert(is_aligned(base_offset, BytesPerInt), "must be 4-byte aligned");
104 // Clear gap/first 4 bytes following the length field.
105 sw(zr, Address(obj, base_offset));
106 }
107 } else if (!UseCompactObjectHeaders) {
108 store_klass_gap(obj, zr);
109 }
110 }
111
112 // preserves obj, destroys len_in_bytes
113 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp) {
114 assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
115 Label done;
116
117 // len_in_bytes is positive and ptr sized
118 subi(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
119 beqz(len_in_bytes, done);
120
121 // Preserve obj
122 if (hdr_size_in_bytes) {
123 addi(obj, obj, hdr_size_in_bytes);
124 }
125 zero_memory(obj, len_in_bytes, tmp);
126 if (hdr_size_in_bytes) {
127 subi(obj, obj, hdr_size_in_bytes);
128 }
129
130 bind(done);
131 }
132
133 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
134 assert_different_registers(obj, tmp1, tmp2);
135 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
136
137 try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
138
139 initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
140 }
141
142 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
143 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
144 "con_size_in_bytes is not multiple of alignment");
145 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
146
147 initialize_header(obj, klass, noreg, tmp1, tmp2);
148
149 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
150 // clear rest of allocated space
151 const Register index = tmp2;
152 // 16: multiplier for threshold
153 const int threshold = 16 * BytesPerWord; // approximate break even point for code size (see comments below)
154 if (var_size_in_bytes != noreg) {
155 mv(index, var_size_in_bytes);
156 initialize_body(obj, index, hdr_size_in_bytes, tmp1);
157 } else if (con_size_in_bytes <= threshold) {
158 // use explicit null stores
159 int i = hdr_size_in_bytes;
160 if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multiplier for BytesPerWord
161 sd(zr, Address(obj, i));
162 i += BytesPerWord;
163 }
164 for (; i < con_size_in_bytes; i += BytesPerWord) {
165 sd(zr, Address(obj, i));
166 }
167 } else if (con_size_in_bytes > hdr_size_in_bytes) {
168 block_comment("zero memory");
169 // use loop to null out the fields
170 int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
171 mv(index, words / 8); // 8: byte size
172
173 const int unroll = 8; // Number of sd(zr) instructions we'll unroll
174 int remainder = words % unroll;
175 la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
176
177 Label entry_point, loop;
178 j(entry_point);
179
180 bind(loop);
181 subi(index, index, 1);
182 for (int i = -unroll; i < 0; i++) {
183 if (-i == remainder) {
184 bind(entry_point);
185 }
186 sd(zr, Address(t0, i * wordSize));
187 }
188 if (remainder == 0) {
189 bind(entry_point);
190 }
191 addi(t0, t0, unroll * wordSize);
192 bnez(index, loop);
193 }
194 }
195
196 membar(MacroAssembler::StoreStore);
197
198 if (CURRENT_ENV->dtrace_alloc_probes()) {
199 assert(obj == x10, "must be");
200 far_call(RuntimeAddress(Runtime1::entry_for(StubId::c1_dtrace_object_alloc_id)));
201 }
202
203 verify_oop(obj);
204 }
205
206 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case, bool zero_array) {
207 assert_different_registers(obj, len, tmp1, tmp2, klass);
208
209 // determine alignment mask
210 assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
211
212 // check for negative or excessive length
213 mv(t0, (int32_t)max_array_allocation_length);
214 bgeu(len, t0, slow_case, /* is_far */ true);
215
216 const Register arr_size = tmp2; // okay to be the same
217 // align object end
218 mv(arr_size, (int32_t)base_offset_in_bytes + MinObjAlignmentInBytesMask);
219 shadd(arr_size, len, arr_size, t0, f);
220 andi(arr_size, arr_size, ~MinObjAlignmentInBytesMask);
221
222 try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
223
224 initialize_header(obj, klass, len, tmp1, tmp2);
225
226 // Align-up to word boundary, because we clear the 4 bytes potentially
227 // following the length field in initialize_header().
228 int base_offset = align_up(base_offset_in_bytes, BytesPerWord);
229
230 // clear rest of allocated space
231 const Register len_zero = len;
232 if (zero_array) {
233 initialize_body(obj, arr_size, base_offset, len_zero);
234 }
235
236 membar(MacroAssembler::StoreStore);
237
238 if (CURRENT_ENV->dtrace_alloc_probes()) {
239 assert(obj == x10, "must be");
240 far_call(RuntimeAddress(Runtime1::entry_for(StubId::c1_dtrace_object_alloc_id)));
241 }
242
243 verify_oop(obj);
244 }
245
246 void C1_MacroAssembler::build_frame(int framesize, int bang_size_in_bytes) {
247 assert(bang_size_in_bytes >= framesize, "stack bang size incorrect");
248 // Make sure there is enough stack space for this method's activation.
249 // Note that we do this before creating a frame.
250 generate_stack_overflow_check(bang_size_in_bytes);
251 MacroAssembler::build_frame(framesize);
252
253 // Insert nmethod entry barrier into frame.
254 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
255 bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
256 }
257
258 void C1_MacroAssembler::remove_frame(int framesize) {
259 MacroAssembler::remove_frame(framesize);
260 }
261
262
263 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
264 // If we have to make this method not-entrant we'll overwrite its
265 // first instruction with a jump. For this action to be legal we
266 // must ensure that this first instruction is a J, JAL or NOP.
267 // Make it a NOP.
268 IncompressibleScope scope(this); // keep the nop as 4 bytes for patching.
269 assert_alignment(pc());
270 nop(); // 4 bytes
271 }
272
273 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
274 // fp + -2: link
275 // + -1: return address
276 // + 0: argument with offset 0
277 // + 1: argument with offset 1
278 // + 2: ...
279 ld(reg, Address(fp, offset_in_words * BytesPerWord));
280 }
281
282 #ifndef PRODUCT
283
284 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
285 if (!VerifyOops) {
286 return;
287 }
288 verify_oop_addr(Address(sp, stack_offset));
289 }
290
291 void C1_MacroAssembler::verify_not_null_oop(Register r) {
292 if (!VerifyOops) return;
293 Label not_null;
294 bnez(r, not_null);
295 stop("non-null oop required");
296 bind(not_null);
297 verify_oop(r);
298 }
299
300 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
301 #ifdef ASSERT
302 static int nn;
303 if (inv_x10) { mv(x10, 0xDEAD); }
304 if (inv_x9) { mv(x9, 0xDEAD); }
305 if (inv_x12) { mv(x12, nn++); }
306 if (inv_x13) { mv(x13, 0xDEAD); }
307 if (inv_x14) { mv(x14, 0xDEAD); }
308 if (inv_x15) { mv(x15, 0xDEAD); }
309 #endif // ASSERT
310 }
311 #endif // ifndef PRODUCT
312
313 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
314 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
315 Label& label, bool is_far, bool is_unordered);
316
317 static c1_cond_branch_insn c1_cond_branch[] =
318 {
319 /* SHORT branches */
320 (c1_cond_branch_insn)&MacroAssembler::beq,
321 (c1_cond_branch_insn)&MacroAssembler::bne,
322 (c1_cond_branch_insn)&MacroAssembler::blt,
323 (c1_cond_branch_insn)&MacroAssembler::ble,
324 (c1_cond_branch_insn)&MacroAssembler::bge,
325 (c1_cond_branch_insn)&MacroAssembler::bgt,
326 (c1_cond_branch_insn)&MacroAssembler::bleu, // lir_cond_belowEqual
327 (c1_cond_branch_insn)&MacroAssembler::bgeu // lir_cond_aboveEqual
328 };
329
330 static c1_float_cond_branch_insn c1_float_cond_branch[] =
331 {
332 /* FLOAT branches */
333 (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
334 (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
335 (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
336 (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
337 (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
338 (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
339 nullptr, // lir_cond_belowEqual
340 nullptr, // lir_cond_aboveEqual
341
342 /* DOUBLE branches */
343 (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
344 (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
345 (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
346 (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
347 (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
348 (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
349 nullptr, // lir_cond_belowEqual
350 nullptr // lir_cond_aboveEqual
351 };
352
353 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
354 BasicType type, bool is_far) {
355 if (type == T_OBJECT || type == T_ARRAY) {
356 assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
357 if (cmpFlag == lir_cond_equal) {
358 beq(op1, op2, label, is_far);
359 } else {
360 bne(op1, op2, label, is_far);
361 }
362 } else {
363 assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
364 "invalid c1 conditional branch index");
365 (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
366 }
367 }
368
369 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
370 bool is_far, bool is_unordered) {
371 assert(cmpFlag >= 0 &&
372 cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
373 "invalid c1 float conditional branch index");
374 (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
375 }