1 /*
2 * Copyright (c) 1999, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "c1/c1_Runtime1.hpp"
30 #include "classfile/systemDictionary.hpp"
31 #include "gc/shared/barrierSet.hpp"
32 #include "gc/shared/barrierSetAssembler.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "oops/arrayOop.hpp"
36 #include "oops/markWord.hpp"
37 #include "runtime/arguments.hpp"
38 #include "runtime/basicLock.hpp"
39 #include "runtime/os.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/stubRoutines.hpp"
42
43 void C1_MacroAssembler::float_cmp(bool is_float, int unordered_result,
44 FloatRegister freg0, FloatRegister freg1,
45 Register result) {
46 if (is_float) {
47 float_compare(result, freg0, freg1, unordered_result);
48 } else {
49 double_compare(result, freg0, freg1, unordered_result);
50 }
51 }
52
53 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
54 assert_different_registers(hdr, obj, basic_lock, temp, t0, t1);
55 int null_check_offset = -1;
56
57 verify_oop(obj);
58
59 // save object being locked into the BasicObjectLock
60 sd(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
61
62 null_check_offset = offset();
63
64 fast_lock(basic_lock, obj, hdr, temp, t1, slow_case);
65
66 return null_check_offset;
67 }
68
69 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register basic_lock, Register temp, Label& slow_case) {
70 assert_different_registers(hdr, obj, basic_lock, temp, t0, t1);
71
72 // load object
73 ld(obj, Address(basic_lock, BasicObjectLock::obj_offset()));
74 verify_oop(obj);
75
76 fast_unlock(obj, hdr, temp, t1, slow_case);
77 }
78
79 // Defines obj, preserves var_size_in_bytes
80 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, Label& slow_case) {
81 if (UseTLAB) {
82 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, tmp1, tmp2, slow_case, /* is_far */ true);
83 } else {
84 j(slow_case);
85 }
86 }
87
88 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register tmp1, Register tmp2) {
89 assert_different_registers(obj, klass, len, tmp1, tmp2);
90 if (UseCompactObjectHeaders || Arguments::is_valhalla_enabled()) {
91 // COH: Markword contains class pointer which is only known at runtime.
92 // Valhalla: Could have value class which has a different prototype header to a normal object.
93 // In both cases, we need to fetch dynamically.
94 ld(tmp1, Address(klass, Klass::prototype_header_offset()));
95 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
96 } else {
97 // Otherwise: Can use the statically computed prototype header which is the same for every object.
98 mv(tmp1, checked_cast<int32_t>(markWord::prototype().value()));
99 sd(tmp1, Address(obj, oopDesc::mark_offset_in_bytes()));
100 }
101
102 if (!UseCompactObjectHeaders) {
103 // COH: Markword already contains class pointer. Nothing else to do.
104 // Otherwise: Fetch klass pointer following the markword
105 encode_klass_not_null(tmp1, klass, tmp2); // Take care not to kill klass
106 sw(tmp1, Address(obj, oopDesc::klass_offset_in_bytes()));
107 }
108
109 if (len->is_valid()) {
110 sw(len, Address(obj, arrayOopDesc::length_offset_in_bytes()));
111 int base_offset = arrayOopDesc::length_offset_in_bytes() + BytesPerInt;
112 if (!is_aligned(base_offset, BytesPerWord)) {
113 assert(is_aligned(base_offset, BytesPerInt), "must be 4-byte aligned");
114 // Clear gap/first 4 bytes following the length field.
115 sw(zr, Address(obj, base_offset));
116 }
117 } else if (!UseCompactObjectHeaders) {
118 store_klass_gap(obj, zr);
119 }
120 }
121
122 // preserves obj, destroys len_in_bytes
123 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register tmp) {
124 assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
125 Label done;
126
127 // len_in_bytes is positive and ptr sized
128 subi(len_in_bytes, len_in_bytes, hdr_size_in_bytes);
129 beqz(len_in_bytes, done);
130
131 // Preserve obj
132 if (hdr_size_in_bytes) {
133 addi(obj, obj, hdr_size_in_bytes);
134 }
135 zero_memory(obj, len_in_bytes, tmp);
136 if (hdr_size_in_bytes) {
137 subi(obj, obj, hdr_size_in_bytes);
138 }
139
140 bind(done);
141 }
142
143 void C1_MacroAssembler::allocate_object(Register obj, Register tmp1, Register tmp2, int header_size, int object_size, Register klass, Label& slow_case) {
144 assert_different_registers(obj, tmp1, tmp2);
145 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
146
147 try_allocate(obj, noreg, object_size * BytesPerWord, tmp1, tmp2, slow_case);
148
149 initialize_object(obj, klass, noreg, object_size * HeapWordSize, tmp1, tmp2, UseTLAB);
150 }
151
152 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register tmp1, Register tmp2, bool is_tlab_allocated) {
153 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
154 "con_size_in_bytes is not multiple of alignment");
155 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
156
157 initialize_header(obj, klass, noreg, tmp1, tmp2);
158
159 if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
160 // clear rest of allocated space
161 const Register index = tmp2;
162 // 16: multiplier for threshold
163 const int threshold = 16 * BytesPerWord; // approximate break even point for code size (see comments below)
164 if (var_size_in_bytes != noreg) {
165 mv(index, var_size_in_bytes);
166 initialize_body(obj, index, hdr_size_in_bytes, tmp1);
167 } else if (con_size_in_bytes <= threshold) {
168 // use explicit null stores
169 int i = hdr_size_in_bytes;
170 if (i < con_size_in_bytes && (con_size_in_bytes % (2 * BytesPerWord))) { // 2: multiplier for BytesPerWord
171 sd(zr, Address(obj, i));
172 i += BytesPerWord;
173 }
174 for (; i < con_size_in_bytes; i += BytesPerWord) {
175 sd(zr, Address(obj, i));
176 }
177 } else if (con_size_in_bytes > hdr_size_in_bytes) {
178 block_comment("zero memory");
179 // use loop to null out the fields
180 int words = (con_size_in_bytes - hdr_size_in_bytes) / BytesPerWord;
181 mv(index, words / 8); // 8: byte size
182
183 const int unroll = 8; // Number of sd(zr) instructions we'll unroll
184 int remainder = words % unroll;
185 la(t0, Address(obj, hdr_size_in_bytes + remainder * BytesPerWord));
186
187 Label entry_point, loop;
188 j(entry_point);
189
190 bind(loop);
191 subi(index, index, 1);
192 for (int i = -unroll; i < 0; i++) {
193 if (-i == remainder) {
194 bind(entry_point);
195 }
196 sd(zr, Address(t0, i * wordSize));
197 }
198 if (remainder == 0) {
199 bind(entry_point);
200 }
201 addi(t0, t0, unroll * wordSize);
202 bnez(index, loop);
203 }
204 }
205
206 membar(MacroAssembler::StoreStore);
207
208 if (CURRENT_ENV->dtrace_alloc_probes()) {
209 assert(obj == x10, "must be");
210 far_call(RuntimeAddress(Runtime1::entry_for(StubId::c1_dtrace_object_alloc_id)));
211 }
212
213 verify_oop(obj);
214 }
215
216 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register tmp1, Register tmp2, int base_offset_in_bytes, int f, Register klass, Label& slow_case, bool zero_array) {
217 assert_different_registers(obj, len, tmp1, tmp2, klass);
218
219 // determine alignment mask
220 assert(!(BytesPerWord & 1), "must be multiple of 2 for masking code to work");
221
222 // check for negative or excessive length
223 mv(t0, (int32_t)max_array_allocation_length);
224 bgeu(len, t0, slow_case, /* is_far */ true);
225
226 const Register arr_size = tmp2; // okay to be the same
227 // align object end
228 mv(arr_size, (int32_t)base_offset_in_bytes + MinObjAlignmentInBytesMask);
229 shadd(arr_size, len, arr_size, t0, f);
230 andi(arr_size, arr_size, ~MinObjAlignmentInBytesMask);
231
232 try_allocate(obj, arr_size, 0, tmp1, tmp2, slow_case);
233
234 initialize_header(obj, klass, len, tmp1, tmp2);
235
236 // Align-up to word boundary, because we clear the 4 bytes potentially
237 // following the length field in initialize_header().
238 int base_offset = align_up(base_offset_in_bytes, BytesPerWord);
239
240 // clear rest of allocated space
241 const Register len_zero = len;
242 if (zero_array) {
243 initialize_body(obj, arr_size, base_offset, len_zero);
244 }
245
246 membar(MacroAssembler::StoreStore);
247
248 if (CURRENT_ENV->dtrace_alloc_probes()) {
249 assert(obj == x10, "must be");
250 far_call(RuntimeAddress(Runtime1::entry_for(StubId::c1_dtrace_object_alloc_id)));
251 }
252
253 verify_oop(obj);
254 }
255
256 void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes,
257 int sp_offset_for_orig_pc,
258 bool needs_stack_repair, bool has_scalarized_args,
259 Label* verified_inline_entry_label) {
260 assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
261
262 assert(!needs_stack_repair && !has_scalarized_args, "");
263
264 // Make sure there is enough stack space for this method's activation.
265 // Note that we do this before creating a frame.
266 generate_stack_overflow_check(bang_size_in_bytes);
267 MacroAssembler::build_frame(frame_size_in_bytes);
268
269 // Insert nmethod entry barrier into frame.
270 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
271 bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
272
273 if (verified_inline_entry_label != nullptr) {
274 // Jump here from the scalarized entry points that already created the frame.
275 bind(*verified_inline_entry_label);
276 }
277 }
278
279 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
280 // If we have to make this method not-entrant we'll overwrite its
281 // first instruction with a jump. For this action to be legal we
282 // must ensure that this first instruction is a J, JAL or NOP.
283 // Make it a NOP.
284 IncompressibleScope scope(this); // keep the nop as 4 bytes for patching.
285 assert_alignment(pc());
286 nop(); // 4 bytes
287 }
288
289 int C1_MacroAssembler::scalarized_entry(const CompiledEntrySignature* ces, int frame_size_in_bytes, int bang_size_in_bytes,
290 int sp_offset_for_orig_pc, Label& verified_inline_entry_label, bool is_inline_ro_entry) {
291 Unimplemented();
292 return 0;
293 }
294
295 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
296 // fp + -2: link
297 // + -1: return address
298 // + 0: argument with offset 0
299 // + 1: argument with offset 1
300 // + 2: ...
301 ld(reg, Address(fp, offset_in_words * BytesPerWord));
302 }
303
304 #ifndef PRODUCT
305
306 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
307 if (!VerifyOops) {
308 return;
309 }
310 verify_oop_addr(Address(sp, stack_offset));
311 }
312
313 void C1_MacroAssembler::verify_not_null_oop(Register r) {
314 if (!VerifyOops) return;
315 Label not_null;
316 bnez(r, not_null);
317 stop("non-null oop required");
318 bind(not_null);
319 verify_oop(r);
320 }
321
322 void C1_MacroAssembler::invalidate_registers(bool inv_x10, bool inv_x9, bool inv_x12, bool inv_x13, bool inv_x14, bool inv_x15) {
323 #ifdef ASSERT
324 static int nn;
325 if (inv_x10) { mv(x10, 0xDEAD); }
326 if (inv_x9) { mv(x9, 0xDEAD); }
327 if (inv_x12) { mv(x12, nn++); }
328 if (inv_x13) { mv(x13, 0xDEAD); }
329 if (inv_x14) { mv(x14, 0xDEAD); }
330 if (inv_x15) { mv(x15, 0xDEAD); }
331 #endif // ASSERT
332 }
333 #endif // ifndef PRODUCT
334
335 typedef void (C1_MacroAssembler::*c1_cond_branch_insn)(Register op1, Register op2, Label& label, bool is_far);
336 typedef void (C1_MacroAssembler::*c1_float_cond_branch_insn)(FloatRegister op1, FloatRegister op2,
337 Label& label, bool is_far, bool is_unordered);
338
339 static c1_cond_branch_insn c1_cond_branch[] =
340 {
341 /* SHORT branches */
342 (c1_cond_branch_insn)&MacroAssembler::beq,
343 (c1_cond_branch_insn)&MacroAssembler::bne,
344 (c1_cond_branch_insn)&MacroAssembler::blt,
345 (c1_cond_branch_insn)&MacroAssembler::ble,
346 (c1_cond_branch_insn)&MacroAssembler::bge,
347 (c1_cond_branch_insn)&MacroAssembler::bgt,
348 (c1_cond_branch_insn)&MacroAssembler::bleu, // lir_cond_belowEqual
349 (c1_cond_branch_insn)&MacroAssembler::bgeu // lir_cond_aboveEqual
350 };
351
352 static c1_float_cond_branch_insn c1_float_cond_branch[] =
353 {
354 /* FLOAT branches */
355 (c1_float_cond_branch_insn)&MacroAssembler::float_beq,
356 (c1_float_cond_branch_insn)&MacroAssembler::float_bne,
357 (c1_float_cond_branch_insn)&MacroAssembler::float_blt,
358 (c1_float_cond_branch_insn)&MacroAssembler::float_ble,
359 (c1_float_cond_branch_insn)&MacroAssembler::float_bge,
360 (c1_float_cond_branch_insn)&MacroAssembler::float_bgt,
361 nullptr, // lir_cond_belowEqual
362 nullptr, // lir_cond_aboveEqual
363
364 /* DOUBLE branches */
365 (c1_float_cond_branch_insn)&MacroAssembler::double_beq,
366 (c1_float_cond_branch_insn)&MacroAssembler::double_bne,
367 (c1_float_cond_branch_insn)&MacroAssembler::double_blt,
368 (c1_float_cond_branch_insn)&MacroAssembler::double_ble,
369 (c1_float_cond_branch_insn)&MacroAssembler::double_bge,
370 (c1_float_cond_branch_insn)&MacroAssembler::double_bgt,
371 nullptr, // lir_cond_belowEqual
372 nullptr // lir_cond_aboveEqual
373 };
374
375 void C1_MacroAssembler::c1_cmp_branch(int cmpFlag, Register op1, Register op2, Label& label,
376 BasicType type, bool is_far) {
377 if (type == T_OBJECT || type == T_ARRAY) {
378 assert(cmpFlag == lir_cond_equal || cmpFlag == lir_cond_notEqual, "Should be equal or notEqual");
379 if (cmpFlag == lir_cond_equal) {
380 beq(op1, op2, label, is_far);
381 } else {
382 bne(op1, op2, label, is_far);
383 }
384 } else {
385 assert(cmpFlag >= 0 && cmpFlag < (int)(sizeof(c1_cond_branch) / sizeof(c1_cond_branch[0])),
386 "invalid c1 conditional branch index");
387 (this->*c1_cond_branch[cmpFlag])(op1, op2, label, is_far);
388 }
389 }
390
391 void C1_MacroAssembler::c1_float_cmp_branch(int cmpFlag, FloatRegister op1, FloatRegister op2, Label& label,
392 bool is_far, bool is_unordered) {
393 assert(cmpFlag >= 0 &&
394 cmpFlag < (int)(sizeof(c1_float_cond_branch) / sizeof(c1_float_cond_branch[0])),
395 "invalid c1 float conditional branch index");
396 (this->*c1_float_cond_branch[cmpFlag])(op1, op2, label, is_far, is_unordered);
397 }