1 /*
  2  * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
  4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  5  *
  6  * This code is free software; you can redistribute it and/or modify it
  7  * under the terms of the GNU General Public License version 2 only, as
  8  * published by the Free Software Foundation.
  9  *
 10  * This code is distributed in the hope that it will be useful, but WITHOUT
 11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 13  * version 2 for more details (a copy is included in the LICENSE file that
 14  * accompanied this code).
 15  *
 16  * You should have received a copy of the GNU General Public License version
 17  * 2 along with this work; if not, write to the Free Software Foundation,
 18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 19  *
 20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 21  * or visit www.oracle.com if you need additional information or have any
 22  * questions.
 23  *
 24  */
 25 
 26 #include "asm/macroAssembler.inline.hpp"
 27 #include "gc/g1/g1BarrierSet.hpp"
 28 #include "gc/g1/g1BarrierSetAssembler.hpp"
 29 #include "gc/g1/g1BarrierSetRuntime.hpp"
 30 #include "gc/g1/g1CardTable.hpp"
 31 #include "gc/g1/g1HeapRegion.hpp"
 32 #include "gc/g1/g1ThreadLocalData.hpp"
 33 #include "gc/shared/collectedHeap.hpp"
 34 #include "interpreter/interp_masm.hpp"
 35 #include "runtime/javaThread.hpp"
 36 #include "runtime/sharedRuntime.hpp"
 37 #ifdef COMPILER1
 38 #include "c1/c1_LIRAssembler.hpp"
 39 #include "c1/c1_MacroAssembler.hpp"
 40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 41 #endif // COMPILER1
 42 #ifdef COMPILER2
 43 #include "gc/g1/c2/g1BarrierSetC2.hpp"
 44 #endif // COMPILER2
 45 
 46 #define __ masm->
 47 
 48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
 49                                                             Register addr, Register count, RegSet saved_regs) {
 50   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 51   if (!dest_uninitialized) {
 52     Label done;
 53     Address in_progress(xthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
 54 
 55     // Is marking active?
 56     if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 57       __ lwu(t0, in_progress);
 58     } else {
 59       assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
 60       __ lbu(t0, in_progress);
 61     }
 62     __ beqz(t0, done);
 63 
 64     __ push_reg(saved_regs, sp);
 65     if (count == c_rarg0) {
 66       if (addr == c_rarg1) {
 67         // exactly backwards!!
 68         __ mv(t0, c_rarg0);
 69         __ mv(c_rarg0, c_rarg1);
 70         __ mv(c_rarg1, t0);
 71       } else {
 72         __ mv(c_rarg1, count);
 73         __ mv(c_rarg0, addr);
 74       }
 75     } else {
 76       __ mv(c_rarg0, addr);
 77       __ mv(c_rarg1, count);
 78     }
 79     if (UseCompressedOops) {
 80       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 81     } else {
 82       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
 83     }
 84     __ pop_reg(saved_regs, sp);
 85 
 86     __ bind(done);
 87   }
 88 }
 89 
 90 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
 91                                                              DecoratorSet decorators,
 92                                                              Register start,
 93                                                              Register count,
 94                                                              Register tmp) {
 95   assert_different_registers(start, count, tmp);
 96 
 97   Label loop, next, done;
 98 
 99   // Zero count? Nothing to do.
100   __ beqz(count, done);
101 
102   // Calculate the number of card marks to set. Since the object might start and
103   // end within a card, we need to calculate this via the card table indexes of
104   // the actual start and last addresses covered by the object.
105   // Temporarily use the count register for the last element address.
106   __ shadd(count, count, start, tmp, LogBytesPerHeapOop); // end = start + count << LogBytesPerHeapOop
107   __ subi(count, count, BytesPerHeapOop);                 // Use last element address for end.
108 
109   __ srli(start, start, CardTable::card_shift());
110   __ srli(count, count, CardTable::card_shift());
111   __ sub(count, count, start);                            // Number of bytes to mark - 1.
112 
113   // Add card table base offset to start.
114   Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
115   __ ld(tmp, card_table_address);
116   __ add(start, start, tmp);
117 
118   __ bind(loop);
119   if (UseCondCardMark) {
120     __ add(tmp, start, count);
121     __ lbu(tmp, Address(tmp, 0));
122     static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123     __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124                                                       // against zero to avoid use of an extra temp.
125     __ bnez(tmp, next);
126   }
127 
128   __ add(tmp, start, count);
129   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
130   __ sb(zr, Address(tmp, 0));
131 
132   __ bind(next);
133   __ subi(count, count, 1);
134   __ bgez(count, loop);
135 
136   __ bind(done);
137 }
138 
139 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
140                                               const Register thread, const Register value, const Register tmp1, const Register tmp2) {
141   // Can we store a value in the given thread's buffer?
142   // (The index field is typed as size_t.)
143   __ ld(tmp1, Address(thread, in_bytes(index_offset)));   // tmp1 := *(index address)
144   __ beqz(tmp1, runtime);                                 // jump to runtime if index == 0 (full buffer)
145   // The buffer is not full, store value into it.
146   __ subi(tmp1, tmp1, wordSize);                           // tmp1 := next index
147   __ sd(tmp1, Address(thread, in_bytes(index_offset)));   // *(index address) := next index
148   __ ld(tmp2, Address(thread, in_bytes(buffer_offset)));  // tmp2 := buffer address
149   __ add(tmp2, tmp2, tmp1);
150   __ sd(value, Address(tmp2));                            // *(buffer address + next index) := value
151 }
152 
153 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
154                                            const Register thread,
155                                            const Register tmp1) {
156   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
157   // Is marking active?
158   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
159     __ lwu(tmp1, in_progress);
160   } else {
161     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
162     __ lbu(tmp1, in_progress);
163   }
164 }
165 
166 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
167                                            const Register obj,
168                                            const Register pre_val,
169                                            const Register thread,
170                                            const Register tmp1,
171                                            const Register tmp2,
172                                            Label& done,
173                                            Label& runtime) {
174   // Do we need to load the previous value?
175   if (obj != noreg) {
176     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
177   }
178   // Is the previous value null?
179   __ beqz(pre_val, done, true);
180   generate_queue_test_and_insertion(masm,
181                                     G1ThreadLocalData::satb_mark_queue_index_offset(),
182                                     G1ThreadLocalData::satb_mark_queue_buffer_offset(),
183                                     runtime,
184                                     thread, pre_val, tmp1, tmp2);
185   __ j(done);
186 }
187 
188 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
189                                                  Register obj,
190                                                  Register pre_val,
191                                                  Register thread,
192                                                  Register tmp1,
193                                                  Register tmp2,
194                                                  bool tosca_live,
195                                                  bool expand_call) {
196   // If expand_call is true then we expand the call_VM_leaf macro
197   // directly to skip generating the check by
198   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
199 
200   assert(thread == xthread, "must be");
201 
202   Label done;
203   Label runtime;
204 
205   assert_different_registers(obj, pre_val, tmp1, tmp2);
206   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
207 
208   generate_pre_barrier_fast_path(masm, thread, tmp1);
209   // If marking is not active (*(mark queue active address) == 0), jump to done
210   __ beqz(tmp1, done);
211   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
212 
213   __ bind(runtime);
214 
215   __ push_call_clobbered_registers();
216 
217   if (expand_call) {
218     assert(pre_val != c_rarg1, "smashed arg");
219     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
220   } else {
221     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
222   }
223 
224   __ pop_call_clobbered_registers();
225 
226   __ bind(done);
227 
228 }
229 
230 static void generate_post_barrier(MacroAssembler* masm,
231                                   const Register store_addr,
232                                   const Register new_val,
233                                   const Register thread,
234                                   const Register tmp1,
235                                   const Register tmp2,
236                                   Label& done,
237                                   bool new_val_may_be_null) {
238   assert(thread == xthread, "must be");
239   assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
240   // Does store cross heap regions?
241   __ xorr(tmp1, store_addr, new_val);                    // tmp1 := store address ^ new value
242   __ srli(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);  // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
243   __ beqz(tmp1, done);
244 
245   // Crosses regions, storing null?
246   if (new_val_may_be_null) {
247     __ beqz(new_val, done);
248   }
249   // Storing region crossing non-null, is card clean?
250   __ srli(tmp1, store_addr, CardTable::card_shift());    // tmp1 := card address relative to card table base
251 
252   Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
253   __ ld(tmp2, card_table_address);                       // tmp2 := card table base address
254   __ add(tmp1, tmp1, tmp2);                              // tmp1 := card address
255   if (UseCondCardMark) {
256     static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
257     __ lbu(tmp2, Address(tmp1, 0));                      // tmp2 := card
258     __ subi(tmp2, tmp2, G1CardTable::clean_card_val());  // Convert to clean_card_value() to a comparison
259                                                          // against zero to avoid use of an extra temp.
260     __ bnez(tmp2, done);
261   }
262   static_assert((uint)G1CardTable::dirty_card_val() == 0, "must be to use zr");
263   __ sb(zr, Address(tmp1, 0));
264 }
265 
266 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
267                                                   Register store_addr,
268                                                   Register new_val,
269                                                   Register thread,
270                                                   Register tmp1,
271                                                   Register tmp2) {
272   Label done;
273   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
274   __ bind(done);
275 }
276 
277 #if defined(COMPILER2)
278 
279 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
280   SaveLiveRegisters save_registers(masm, stub);
281   if (c_rarg0 != arg) {
282     __ mv(c_rarg0, arg);
283   }
284   __ mv(c_rarg1, xthread);
285   __ mv(t1, runtime_path);
286   __ jalr(t1);
287 }
288 
289 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
290                                                     Register obj,
291                                                     Register pre_val,
292                                                     Register thread,
293                                                     Register tmp1,
294                                                     Register tmp2,
295                                                     G1PreBarrierStubC2* stub) {
296   assert(thread == xthread, "must be");
297   assert_different_registers(obj, pre_val, tmp1, tmp2);
298   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
299 
300   stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
301 
302   generate_pre_barrier_fast_path(masm, thread, tmp1);
303   // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
304   __ bnez(tmp1, *stub->entry(), true);
305 
306   __ bind(*stub->continuation());
307 }
308 
309 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
310                                                          G1PreBarrierStubC2* stub) const {
311   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
312   Label runtime;
313   Register obj = stub->obj();
314   Register pre_val = stub->pre_val();
315   Register thread = stub->thread();
316   Register tmp1 = stub->tmp1();
317   Register tmp2 = stub->tmp2();
318 
319   __ bind(*stub->entry());
320   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
321 
322   __ bind(runtime);
323   generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
324   __ j(*stub->continuation());
325 }
326 
327 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
328                                                      Register store_addr,
329                                                      Register new_val,
330                                                      Register thread,
331                                                      Register tmp1,
332                                                      Register tmp2,
333                                                      bool new_val_may_be_null) {
334   Label done;
335   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
336   __ bind(done);
337 }
338 
339 #endif // COMPILER2
340 
341 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
342                                     Register dst, Address src, Register tmp1, Register tmp2) {
343   bool on_oop = is_reference_type(type);
344   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
345   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
346   bool on_reference = on_weak || on_phantom;
347   CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
348   if (on_oop && on_reference) {
349     // RA is live.  It must be saved around calls.
350     __ enter(); // barrier may call runtime
351     // Generate the G1 pre-barrier code to log the value of
352     // the referent field in an SATB buffer.
353     g1_write_barrier_pre(masm /* masm */,
354                          noreg /* obj */,
355                          dst /* pre_val */,
356                          xthread /* thread */,
357                          tmp1 /* tmp1 */,
358                          tmp2 /* tmp2 */,
359                          true /* tosca_live */,
360                          true /* expand_call */);
361     __ leave();
362   }
363 }
364 
365 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
366                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
367   // flatten object address if needed
368   if (dst.offset() == 0) {
369     if (dst.base() != tmp3) {
370       __ mv(tmp3, dst.base());
371     }
372   } else {
373     __ la(tmp3, dst);
374   }
375 
376   g1_write_barrier_pre(masm,
377                        tmp3 /* obj */,
378                        tmp2 /* pre_val */,
379                        xthread /* thread */,
380                        tmp1 /* tmp1 */,
381                        t1 /* tmp2 */,
382                        val != noreg /* tosca_live */,
383                        false /* expand_call */);
384 
385   if (val == noreg) {
386     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
387   } else {
388     // G1 barrier needs uncompressed oop for region cross check.
389     Register new_val = val;
390     if (UseCompressedOops) {
391       new_val = t1;
392       __ mv(new_val, val);
393     }
394     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
395     g1_write_barrier_post(masm,
396                           tmp3 /* store_adr */,
397                           new_val /* new_val */,
398                           xthread /* thread */,
399                           tmp1 /* tmp1 */,
400                           tmp2 /* tmp2 */);
401   }
402 }
403 
404 #ifdef COMPILER1
405 
406 #undef __
407 #define __ ce->masm()->
408 
409 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
410   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
411 
412   // At this point we know that marking is in progress.
413   // If do_load() is true then we have to emit the
414   // load of the previous value; otherwise it has already
415   // been loaded into _pre_val.
416   __ bind(*stub->entry());
417 
418   assert(stub->pre_val()->is_register(), "Precondition.");
419 
420   Register pre_val_reg = stub->pre_val()->as_register();
421 
422   if (stub->do_load()) {
423     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /* wide */);
424   }
425   __ beqz(pre_val_reg, *stub->continuation(), /* is_far */ true);
426   ce->store_parameter(stub->pre_val()->as_register(), 0);
427   __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
428   __ j(*stub->continuation());
429 }
430 
431 #undef __
432 
433 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
434                                                      Register store_addr,
435                                                      Register new_val,
436                                                      Register thread,
437                                                      Register tmp1,
438                                                      Register tmp2) {
439   Label done;
440   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
441   masm->bind(done);
442 }
443 
444 #define __ sasm->
445 
446 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
447   __ prologue("g1_pre_barrier", false);
448 
449   BarrierSet* bs = BarrierSet::barrier_set();
450 
451   // arg0 : previous value of memory
452   const Register pre_val = x10;
453   const Register thread = xthread;
454   const Register tmp = t0;
455 
456   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
457   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
458   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
459 
460   Label done;
461   Label runtime;
462 
463   // Is marking still active?
464   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {  // 4-byte width
465     __ lwu(tmp, in_progress);
466   } else {
467     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
468     __ lbu(tmp, in_progress);
469   }
470   __ beqz(tmp, done);
471 
472   // Can we store original value in the thread's buffer?
473   __ ld(tmp, queue_index);
474   __ beqz(tmp, runtime);
475 
476   __ subi(tmp, tmp, wordSize);
477   __ sd(tmp, queue_index);
478   __ ld(t1, buffer);
479   __ add(tmp, tmp, t1);
480   __ load_parameter(0, t1);
481   __ sd(t1, Address(tmp, 0));
482   __ j(done);
483 
484   __ bind(runtime);
485   __ push_call_clobbered_registers();
486   __ load_parameter(0, pre_val);
487   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
488   __ pop_call_clobbered_registers();
489   __ bind(done);
490 
491   __ epilogue();
492 }
493 
494 #undef __
495 
496 #endif // COMPILER1