1 /*
2 * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/g1/g1BarrierSet.hpp"
28 #include "gc/g1/g1BarrierSetAssembler.hpp"
29 #include "gc/g1/g1BarrierSetRuntime.hpp"
30 #include "gc/g1/g1CardTable.hpp"
31 #include "gc/g1/g1HeapRegion.hpp"
32 #include "gc/g1/g1ThreadLocalData.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interp_masm.hpp"
35 #include "runtime/javaThread.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_LIRAssembler.hpp"
39 #include "c1/c1_MacroAssembler.hpp"
40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
41 #endif // COMPILER1
42 #ifdef COMPILER2
43 #include "gc/g1/c2/g1BarrierSetC2.hpp"
44 #endif // COMPILER2
45
46 #define __ masm->
47
48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
49 Register addr, Register count, RegSet saved_regs) {
50 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
51 if (!dest_uninitialized) {
52 Label done;
53 Address in_progress(xthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
54
55 // Is marking active?
56 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
57 __ lwu(t0, in_progress);
58 } else {
59 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
60 __ lbu(t0, in_progress);
61 }
62 __ beqz(t0, done);
63
64 __ push_reg(saved_regs, sp);
65 if (count == c_rarg0) {
66 if (addr == c_rarg1) {
67 // exactly backwards!!
68 __ mv(t0, c_rarg0);
69 __ mv(c_rarg0, c_rarg1);
70 __ mv(c_rarg1, t0);
71 } else {
72 __ mv(c_rarg1, count);
73 __ mv(c_rarg0, addr);
74 }
75 } else {
76 __ mv(c_rarg0, addr);
77 __ mv(c_rarg1, count);
78 }
79 if (UseCompressedOops) {
80 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
81 } else {
82 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
83 }
84 __ pop_reg(saved_regs, sp);
85
86 __ bind(done);
87 }
88 }
89
90 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
91 DecoratorSet decorators,
92 Register start,
93 Register count,
94 Register tmp) {
95 assert_different_registers(start, count, tmp);
96
97 Label loop, next, done;
98
99 // Zero count? Nothing to do.
100 __ beqz(count, done);
101
102 // Calculate the number of card marks to set. Since the object might start and
103 // end within a card, we need to calculate this via the card table indexes of
104 // the actual start and last addresses covered by the object.
105 // Temporarily use the count register for the last element address.
106 __ shadd(count, count, start, tmp, LogBytesPerHeapOop); // end = start + count << LogBytesPerHeapOop
107 __ subi(count, count, BytesPerHeapOop); // Use last element address for end.
108
109 __ srli(start, start, CardTable::card_shift());
110 __ srli(count, count, CardTable::card_shift());
111
112 // Add card table base offset to get card addresses directly.
113 Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
114 __ ld(tmp, card_table_address);
115 __ add(start, start, tmp); // start := first card address
116 __ add(count, count, tmp); // count := last card address
117
118 // Iterate from start card to end card (inclusive).
119 __ bind(loop);
120 if (UseCondCardMark) {
121 __ lbu(tmp, Address(start, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
129 __ sb(zr, Address(start, 0));
130
131 __ bind(next);
132 __ addi(start, start, 1);
133 __ ble(start, count, loop);
134
135 __ bind(done);
136 }
137
138 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
139 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
140 // Can we store a value in the given thread's buffer?
141 // (The index field is typed as size_t.)
142 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
143 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
144 // The buffer is not full, store value into it.
145 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
146 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
147 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
148 __ add(tmp2, tmp2, tmp1);
149 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
150 }
151
152 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
153 const Register thread,
154 const Register tmp1) {
155 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
156 // Is marking active?
157 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
158 __ lwu(tmp1, in_progress);
159 } else {
160 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
161 __ lbu(tmp1, in_progress);
162 }
163 }
164
165 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
166 const Register obj,
167 const Register pre_val,
168 const Register thread,
169 const Register tmp1,
170 const Register tmp2,
171 Label& done,
172 Label& runtime) {
173 // Do we need to load the previous value?
174 if (obj != noreg) {
175 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
176 }
177 // Is the previous value null?
178 __ beqz(pre_val, done, true);
179 generate_queue_test_and_insertion(masm,
180 G1ThreadLocalData::satb_mark_queue_index_offset(),
181 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
182 runtime,
183 thread, pre_val, tmp1, tmp2);
184 __ j(done);
185 }
186
187 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
188 Register obj,
189 Register pre_val,
190 Register thread,
191 Register tmp1,
192 Register tmp2,
193 bool tosca_live,
194 bool expand_call) {
195 // If expand_call is true then we expand the call_VM_leaf macro
196 // directly to skip generating the check by
197 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
198
199 assert(thread == xthread, "must be");
200
201 Label done;
202 Label runtime;
203
204 assert_different_registers(obj, pre_val, tmp1, tmp2);
205 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
206
207 generate_pre_barrier_fast_path(masm, thread, tmp1);
208 // If marking is not active (*(mark queue active address) == 0), jump to done
209 __ beqz(tmp1, done);
210 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
211
212 __ bind(runtime);
213
214 __ push_call_clobbered_registers();
215
216 if (expand_call) {
217 assert(pre_val != c_rarg1, "smashed arg");
218 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
219 } else {
220 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
221 }
222
223 __ pop_call_clobbered_registers();
224
225 __ bind(done);
226
227 }
228
229 static void generate_post_barrier(MacroAssembler* masm,
230 const Register store_addr,
231 const Register new_val,
232 const Register thread,
233 const Register tmp1,
234 const Register tmp2,
235 Label& done,
236 bool new_val_may_be_null) {
237 assert(thread == xthread, "must be");
238 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
239 // Does store cross heap regions?
240 __ xorr(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
241 __ srli(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
242 __ beqz(tmp1, done);
243
244 // Crosses regions, storing null?
245 if (new_val_may_be_null) {
246 __ beqz(new_val, done);
247 }
248 // Storing region crossing non-null, is card clean?
249 __ srli(tmp1, store_addr, CardTable::card_shift()); // tmp1 := card address relative to card table base
250
251 Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
252 __ ld(tmp2, card_table_address); // tmp2 := card table base address
253 __ add(tmp1, tmp1, tmp2); // tmp1 := card address
254 if (UseCondCardMark) {
255 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
256 __ lbu(tmp2, Address(tmp1, 0)); // tmp2 := card
257 __ subi(tmp2, tmp2, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
258 // against zero to avoid use of an extra temp.
259 __ bnez(tmp2, done);
260 }
261 static_assert((uint)G1CardTable::dirty_card_val() == 0, "must be to use zr");
262 __ sb(zr, Address(tmp1, 0));
263 }
264
265 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
266 Register store_addr,
267 Register new_val,
268 Register thread,
269 Register tmp1,
270 Register tmp2) {
271 Label done;
272 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
273 __ bind(done);
274 }
275
276 #if defined(COMPILER2)
277
278 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
279 SaveLiveRegisters save_registers(masm, stub);
280 if (c_rarg0 != arg) {
281 __ mv(c_rarg0, arg);
282 }
283 __ mv(c_rarg1, xthread);
284 __ mv(t1, runtime_path);
285 __ jalr(t1);
286 }
287
288 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
289 Register obj,
290 Register pre_val,
291 Register thread,
292 Register tmp1,
293 Register tmp2,
294 G1PreBarrierStubC2* stub) {
295 assert(thread == xthread, "must be");
296 assert_different_registers(obj, pre_val, tmp1, tmp2);
297 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
298
299 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
300
301 generate_pre_barrier_fast_path(masm, thread, tmp1);
302 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
303 __ bnez(tmp1, *stub->entry(), true);
304
305 __ bind(*stub->continuation());
306 }
307
308 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
309 G1PreBarrierStubC2* stub) const {
310 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
311 Label runtime;
312 Register obj = stub->obj();
313 Register pre_val = stub->pre_val();
314 Register thread = stub->thread();
315 Register tmp1 = stub->tmp1();
316 Register tmp2 = stub->tmp2();
317
318 __ bind(*stub->entry());
319 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
320
321 __ bind(runtime);
322 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
323 __ j(*stub->continuation());
324 }
325
326 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
327 Register store_addr,
328 Register new_val,
329 Register thread,
330 Register tmp1,
331 Register tmp2,
332 bool new_val_may_be_null) {
333 Label done;
334 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
335 __ bind(done);
336 }
337
338 #endif // COMPILER2
339
340 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
341 Register dst, Address src, Register tmp1, Register tmp2) {
342 bool on_oop = is_reference_type(type);
343 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
344 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
345 bool on_reference = on_weak || on_phantom;
346 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
347 if (on_oop && on_reference) {
348 // RA is live. It must be saved around calls.
349 __ enter(); // barrier may call runtime
350 // Generate the G1 pre-barrier code to log the value of
351 // the referent field in an SATB buffer.
352 g1_write_barrier_pre(masm /* masm */,
353 noreg /* obj */,
354 dst /* pre_val */,
355 xthread /* thread */,
356 tmp1 /* tmp1 */,
357 tmp2 /* tmp2 */,
358 true /* tosca_live */,
359 true /* expand_call */);
360 __ leave();
361 }
362 }
363
364 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
365 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
366 // flatten object address if needed
367 if (dst.offset() == 0) {
368 if (dst.base() != tmp3) {
369 __ mv(tmp3, dst.base());
370 }
371 } else {
372 __ la(tmp3, dst);
373 }
374
375 g1_write_barrier_pre(masm,
376 tmp3 /* obj */,
377 tmp2 /* pre_val */,
378 xthread /* thread */,
379 tmp1 /* tmp1 */,
380 t1 /* tmp2 */,
381 val != noreg /* tosca_live */,
382 false /* expand_call */);
383
384 if (val == noreg) {
385 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
386 } else {
387 // G1 barrier needs uncompressed oop for region cross check.
388 Register new_val = val;
389 if (UseCompressedOops) {
390 new_val = t1;
391 __ mv(new_val, val);
392 }
393 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
394 g1_write_barrier_post(masm,
395 tmp3 /* store_adr */,
396 new_val /* new_val */,
397 xthread /* thread */,
398 tmp1 /* tmp1 */,
399 tmp2 /* tmp2 */);
400 }
401 }
402
403 #ifdef COMPILER1
404
405 #undef __
406 #define __ ce->masm()->
407
408 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
409 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
410
411 // At this point we know that marking is in progress.
412 // If do_load() is true then we have to emit the
413 // load of the previous value; otherwise it has already
414 // been loaded into _pre_val.
415 __ bind(*stub->entry());
416
417 assert(stub->pre_val()->is_register(), "Precondition.");
418
419 Register pre_val_reg = stub->pre_val()->as_register();
420
421 if (stub->do_load()) {
422 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /* wide */);
423 }
424 __ beqz(pre_val_reg, *stub->continuation(), /* is_far */ true);
425 ce->store_parameter(stub->pre_val()->as_register(), 0);
426 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
427 __ j(*stub->continuation());
428 }
429
430 #undef __
431
432 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
433 Register store_addr,
434 Register new_val,
435 Register thread,
436 Register tmp1,
437 Register tmp2) {
438 Label done;
439 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
440 masm->bind(done);
441 }
442
443 #define __ sasm->
444
445 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
446 __ prologue("g1_pre_barrier", false);
447
448 BarrierSet* bs = BarrierSet::barrier_set();
449
450 // arg0 : previous value of memory
451 const Register pre_val = x10;
452 const Register thread = xthread;
453 const Register tmp = t0;
454
455 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
456 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
457 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
458
459 Label done;
460 Label runtime;
461
462 // Is marking still active?
463 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { // 4-byte width
464 __ lwu(tmp, in_progress);
465 } else {
466 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
467 __ lbu(tmp, in_progress);
468 }
469 __ beqz(tmp, done);
470
471 // Can we store original value in the thread's buffer?
472 __ ld(tmp, queue_index);
473 __ beqz(tmp, runtime);
474
475 __ subi(tmp, tmp, wordSize);
476 __ sd(tmp, queue_index);
477 __ ld(t1, buffer);
478 __ add(tmp, tmp, t1);
479 __ load_parameter(0, t1);
480 __ sd(t1, Address(tmp, 0));
481 __ j(done);
482
483 __ bind(runtime);
484 __ push_call_clobbered_registers();
485 __ load_parameter(0, pre_val);
486 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
487 __ pop_call_clobbered_registers();
488 __ bind(done);
489
490 __ epilogue();
491 }
492
493 #undef __
494
495 #endif // COMPILER1