1 /*
2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/g1/g1BarrierSet.hpp"
28 #include "gc/g1/g1BarrierSetAssembler.hpp"
29 #include "gc/g1/g1BarrierSetRuntime.hpp"
30 #include "gc/g1/g1CardTable.hpp"
31 #include "gc/g1/g1HeapRegion.hpp"
32 #include "gc/g1/g1ThreadLocalData.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interp_masm.hpp"
35 #include "runtime/javaThread.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_LIRAssembler.hpp"
39 #include "c1/c1_MacroAssembler.hpp"
40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
41 #endif // COMPILER1
42 #ifdef COMPILER2
43 #include "gc/g1/c2/g1BarrierSetC2.hpp"
44 #endif // COMPILER2
45
46 #define __ masm->
47
48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
49 Register addr, Register count, RegSet saved_regs) {
50 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
51 if (!dest_uninitialized) {
52 Label done;
53 Address in_progress(xthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
54
55 // Is marking active?
56 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
57 __ lwu(t0, in_progress);
58 } else {
59 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
60 __ lbu(t0, in_progress);
61 }
62 __ beqz(t0, done);
63
64 __ push_reg(saved_regs, sp);
65 if (count == c_rarg0) {
66 if (addr == c_rarg1) {
67 // exactly backwards!!
68 __ mv(t0, c_rarg0);
69 __ mv(c_rarg0, c_rarg1);
70 __ mv(c_rarg1, t0);
71 } else {
72 __ mv(c_rarg1, count);
73 __ mv(c_rarg0, addr);
74 }
75 } else {
76 __ mv(c_rarg0, addr);
77 __ mv(c_rarg1, count);
78 }
79 if (UseCompressedOops) {
80 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
81 } else {
82 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
83 }
84 __ pop_reg(saved_regs, sp);
85
86 __ bind(done);
87 }
88 }
89
90 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
91 DecoratorSet decorators,
92 Register start,
93 Register count,
94 Register tmp) {
95 assert_different_registers(start, count, tmp);
96
97 Label loop, next, done;
98
99 // Zero count? Nothing to do.
100 __ beqz(count, done);
101
102 // Calculate the number of card marks to set. Since the object might start and
103 // end within a card, we need to calculate this via the card table indexes of
104 // the actual start and last addresses covered by the object.
105 // Temporarily use the count register for the last element address.
106 __ shadd(count, count, start, tmp, LogBytesPerHeapOop); // end = start + count << LogBytesPerHeapOop
107 __ subi(count, count, BytesPerHeapOop); // Use last element address for end.
108
109 __ srli(start, start, CardTable::card_shift());
110 __ srli(count, count, CardTable::card_shift());
111
112 // Add card table base offset to get card addresses directly.
113 Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
114 __ ld(tmp, card_table_address);
115 __ add(start, start, tmp); // start := first card address
116 __ add(count, count, tmp); // count := last card address
117
118 // Iterate from start card to end card (inclusive).
119 __ bind(loop);
120 if (UseCondCardMark) {
121 __ lbu(tmp, Address(start, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
129 __ sb(zr, Address(start, 0));
130
131 __ bind(next);
132 __ addi(start, start, 1);
133 __ ble(start, count, loop);
134
135 __ bind(done);
136 }
137
138 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
139 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
140 assert_different_registers(value, tmp1, tmp2);
141 // Can we store a value in the given thread's buffer?
142 // (The index field is typed as size_t.)
143 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
144 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
145 // The buffer is not full, store value into it.
146 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
147 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
148 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
149 __ add(tmp2, tmp2, tmp1);
150 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
151 }
152
153 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
154 const Register thread,
155 const Register tmp1) {
156 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
157 // Is marking active?
158 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
159 __ lwu(tmp1, in_progress);
160 } else {
161 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
162 __ lbu(tmp1, in_progress);
163 }
164 }
165
166 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
167 const Register obj,
168 const Register pre_val,
169 const Register thread,
170 const Register tmp1,
171 const Register tmp2,
172 Label& done,
173 Label& runtime) {
174 // Do we need to load the previous value?
175 if (obj != noreg) {
176 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
177 }
178 // Is the previous value null?
179 __ beqz(pre_val, done, /* is_far */ true);
180 generate_queue_test_and_insertion(masm,
181 G1ThreadLocalData::satb_mark_queue_index_offset(),
182 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
183 runtime,
184 thread, pre_val, tmp1, tmp2);
185 __ j(done);
186 }
187
188 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
189 Register obj,
190 Register pre_val,
191 Register thread,
192 Register tmp1,
193 Register tmp2,
194 bool tosca_live,
195 bool expand_call) {
196 // If expand_call is true then we expand the call_VM_leaf macro
197 // directly to skip generating the check by
198 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
199
200 assert(thread == xthread, "must be");
201
202 Label done;
203 Label runtime;
204
205 assert_different_registers(obj, pre_val, tmp1, tmp2);
206 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
207
208 generate_pre_barrier_fast_path(masm, thread, tmp1);
209 // If marking is not active (*(mark queue active address) == 0), jump to done
210 __ beqz(tmp1, done);
211 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
212
213 __ bind(runtime);
214
215 __ push_call_clobbered_registers();
216
217 // Calling the runtime using the regular call_VM_leaf mechanism generates
218 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
219 // that checks that the *(fp+frame::interpreter_frame_last_sp) == nullptr.
220 //
221 // If we care generating the pre-barrier without a frame (e.g. in the
222 // intrinsified Reference.get() routine) then fp might be pointing to
223 // the caller frame and so this check will most likely fail at runtime.
224 //
225 // Expanding the call directly bypasses the generation of the check.
226 // So when we do not have have a full interpreter frame on the stack
227 // expand_call should be passed true.
228
229 if (expand_call) {
230 assert(pre_val != c_rarg1, "smashed arg");
231 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
232 } else {
233 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
234 }
235
236 __ pop_call_clobbered_registers();
237
238 __ bind(done);
239
240 }
241
242 static void generate_post_barrier(MacroAssembler* masm,
243 const Register store_addr,
244 const Register new_val,
245 const Register thread,
246 const Register tmp1,
247 const Register tmp2,
248 Label& done,
249 bool new_val_may_be_null) {
250 assert(thread == xthread, "must be");
251 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
252 // Does store cross heap regions?
253 __ xorr(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
254 __ srli(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
255 __ beqz(tmp1, done);
256
257 // Crosses regions, storing null?
258 if (new_val_may_be_null) {
259 __ beqz(new_val, done);
260 }
261 // Storing region crossing non-null, is card clean?
262 __ srli(tmp1, store_addr, CardTable::card_shift()); // tmp1 := card address relative to card table base
263
264 Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
265 __ ld(tmp2, card_table_address); // tmp2 := card table base address
266 __ add(tmp1, tmp1, tmp2); // tmp1 := card address
267 if (UseCondCardMark) {
268 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
269 __ lbu(tmp2, Address(tmp1, 0)); // tmp2 := card
270 __ subi(tmp2, tmp2, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
271 // against zero to avoid use of an extra temp.
272 __ bnez(tmp2, done);
273 }
274 static_assert((uint)G1CardTable::dirty_card_val() == 0, "must be to use zr");
275 __ sb(zr, Address(tmp1, 0));
276 }
277
278 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
279 Register store_addr,
280 Register new_val,
281 Register thread,
282 Register tmp1,
283 Register tmp2) {
284 Label done;
285 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
286 __ bind(done);
287 }
288
289 #if defined(COMPILER2)
290
291 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
292 SaveLiveRegisters save_registers(masm, stub);
293 if (c_rarg0 != arg) {
294 __ mv(c_rarg0, arg);
295 }
296 __ mv(c_rarg1, xthread);
297 __ mv(t1, runtime_path);
298 __ jalr(t1);
299 }
300
301 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
302 Register obj,
303 Register pre_val,
304 Register thread,
305 Register tmp1,
306 Register tmp2,
307 G1PreBarrierStubC2* stub) {
308 assert(thread == xthread, "must be");
309 assert_different_registers(obj, pre_val, tmp1, tmp2);
310 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
311
312 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
313
314 generate_pre_barrier_fast_path(masm, thread, tmp1);
315 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
316 __ bnez(tmp1, *stub->entry(), /* is_far */ true);
317
318 __ bind(*stub->continuation());
319 }
320
321 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
322 G1PreBarrierStubC2* stub) const {
323 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
324 Label runtime;
325 Register obj = stub->obj();
326 Register pre_val = stub->pre_val();
327 Register thread = stub->thread();
328 Register tmp1 = stub->tmp1();
329 Register tmp2 = stub->tmp2();
330
331 __ bind(*stub->entry());
332 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
333
334 __ bind(runtime);
335 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
336 __ j(*stub->continuation());
337 }
338
339 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
340 Register store_addr,
341 Register new_val,
342 Register thread,
343 Register tmp1,
344 Register tmp2,
345 bool new_val_may_be_null) {
346 Label done;
347 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
348 __ bind(done);
349 }
350
351 #endif // COMPILER2
352
353 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
354 Register dst, Address src, Register tmp1, Register tmp2) {
355 bool on_oop = is_reference_type(type);
356 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
357 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
358 bool on_reference = on_weak || on_phantom;
359 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
360 if (on_oop && on_reference) {
361 // RA is live. It must be saved around calls.
362 __ enter(); // barrier may call runtime
363 // Generate the G1 pre-barrier code to log the value of
364 // the referent field in an SATB buffer.
365 g1_write_barrier_pre(masm /* masm */,
366 noreg /* obj */,
367 dst /* pre_val */,
368 xthread /* thread */,
369 tmp1 /* tmp1 */,
370 tmp2 /* tmp2 */,
371 true /* tosca_live */,
372 true /* expand_call */);
373 __ leave();
374 }
375 }
376
377 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
378 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
379
380 bool in_heap = (decorators & IN_HEAP) != 0;
381 bool as_normal = (decorators & AS_NORMAL) != 0;
382 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
383
384 bool needs_pre_barrier = as_normal && !dest_uninitialized;
385 bool needs_post_barrier = (val != noreg && in_heap);
386
387 assert_different_registers(val, tmp1, tmp2, tmp3);
388
389 // flatten object address if needed
390 if (dst.offset() == 0) {
391 if (dst.base() != tmp3) {
392 __ mv(tmp3, dst.base());
393 }
394 } else {
395 __ la(tmp3, dst);
396 }
397
398 if (needs_pre_barrier) {
399 g1_write_barrier_pre(masm,
400 tmp3 /* obj */,
401 tmp2 /* pre_val */,
402 xthread /* thread */,
403 tmp1 /* tmp1 */,
404 t1 /* tmp2 */,
405 val != noreg /* tosca_live */,
406 false /* expand_call */);
407 }
408
409 if (val == noreg) {
410 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
411 } else {
412 // G1 barrier needs uncompressed oop for region cross check.
413 Register new_val = val;
414 if (needs_post_barrier) {
415 if (UseCompressedOops) {
416 new_val = t1;
417 __ mv(new_val, val);
418 }
419 }
420 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
421 if (needs_post_barrier) {
422 g1_write_barrier_post(masm,
423 tmp3 /* store_adr */,
424 new_val /* new_val */,
425 xthread /* thread */,
426 tmp1 /* tmp1 */,
427 tmp2 /* tmp2 */);
428 }
429 }
430 }
431
432 #ifdef COMPILER1
433
434 #undef __
435 #define __ ce->masm()->
436
437 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
438 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
439
440 // At this point we know that marking is in progress.
441 // If do_load() is true then we have to emit the
442 // load of the previous value; otherwise it has already
443 // been loaded into _pre_val.
444 __ bind(*stub->entry());
445
446 assert(stub->pre_val()->is_register(), "Precondition.");
447
448 Register pre_val_reg = stub->pre_val()->as_register();
449
450 if (stub->do_load()) {
451 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /* wide */);
452 }
453 __ beqz(pre_val_reg, *stub->continuation(), /* is_far */ true);
454 ce->store_parameter(stub->pre_val()->as_register(), 0);
455 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
456 __ j(*stub->continuation());
457 }
458
459 #undef __
460
461 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
462 Register store_addr,
463 Register new_val,
464 Register thread,
465 Register tmp1,
466 Register tmp2) {
467 Label done;
468 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
469 masm->bind(done);
470 }
471
472 #define __ sasm->
473
474 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
475 __ prologue("g1_pre_barrier", false);
476
477 BarrierSet* bs = BarrierSet::barrier_set();
478
479 // arg0 : previous value of memory
480 const Register pre_val = x10;
481 const Register thread = xthread;
482 const Register tmp = t0;
483
484 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
485 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
486 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
487
488 Label done;
489 Label runtime;
490
491 // Is marking still active?
492 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { // 4-byte width
493 __ lwu(tmp, in_progress);
494 } else {
495 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
496 __ lbu(tmp, in_progress);
497 }
498 __ beqz(tmp, done);
499
500 // Can we store original value in the thread's buffer?
501 __ ld(tmp, queue_index);
502 __ beqz(tmp, runtime);
503
504 __ subi(tmp, tmp, wordSize);
505 __ sd(tmp, queue_index);
506 __ ld(t1, buffer);
507 __ add(tmp, tmp, t1);
508 __ load_parameter(0, t1);
509 __ sd(t1, Address(tmp, 0));
510 __ j(done);
511
512 __ bind(runtime);
513 __ push_call_clobbered_registers();
514 __ load_parameter(0, pre_val);
515 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
516 __ pop_call_clobbered_registers();
517 __ bind(done);
518
519 __ epilogue();
520 }
521
522 #undef __
523
524 #endif // COMPILER1