1 /*
2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/g1/g1BarrierSet.hpp"
28 #include "gc/g1/g1BarrierSetAssembler.hpp"
29 #include "gc/g1/g1BarrierSetRuntime.hpp"
30 #include "gc/g1/g1CardTable.hpp"
31 #include "gc/g1/g1HeapRegion.hpp"
32 #include "gc/g1/g1ThreadLocalData.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interp_masm.hpp"
35 #include "runtime/javaThread.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_LIRAssembler.hpp"
39 #include "c1/c1_MacroAssembler.hpp"
40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
41 #endif // COMPILER1
42 #ifdef COMPILER2
43 #include "gc/g1/c2/g1BarrierSetC2.hpp"
44 #endif // COMPILER2
45
46 #define __ masm->
47
48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
49 Register addr, Register count, RegSet saved_regs) {
50 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
51 if (!dest_uninitialized) {
52 Label done;
53 Address in_progress(xthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
54
55 // Is marking active?
56 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
57 __ lwu(t0, in_progress);
58 } else {
59 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
60 __ lbu(t0, in_progress);
61 }
62 __ beqz(t0, done);
63
64 __ push_reg(saved_regs, sp);
65 if (count == c_rarg0) {
66 if (addr == c_rarg1) {
67 // exactly backwards!!
68 __ mv(t0, c_rarg0);
69 __ mv(c_rarg0, c_rarg1);
70 __ mv(c_rarg1, t0);
71 } else {
72 __ mv(c_rarg1, count);
73 __ mv(c_rarg0, addr);
74 }
75 } else {
76 __ mv(c_rarg0, addr);
77 __ mv(c_rarg1, count);
78 }
79 if (UseCompressedOops) {
80 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
81 } else {
82 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
83 }
84 __ pop_reg(saved_regs, sp);
85
86 __ bind(done);
87 }
88 }
89
90 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
91 DecoratorSet decorators,
92 Register start,
93 Register count,
94 Register tmp) {
95 assert_different_registers(start, count, tmp);
96
97 Label loop, next, done;
98
99 // Zero count? Nothing to do.
100 __ beqz(count, done);
101
102 // Calculate the number of card marks to set. Since the object might start and
103 // end within a card, we need to calculate this via the card table indexes of
104 // the actual start and last addresses covered by the object.
105 // Temporarily use the count register for the last element address.
106 __ shadd(count, count, start, tmp, LogBytesPerHeapOop); // end = start + count << LogBytesPerHeapOop
107 __ subi(count, count, BytesPerHeapOop); // Use last element address for end.
108
109 __ srli(start, start, CardTable::card_shift());
110 __ srli(count, count, CardTable::card_shift());
111 __ sub(count, count, start); // Number of bytes to mark - 1.
112
113 // Add card table base offset to start.
114 Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
115 __ ld(tmp, card_table_address);
116 __ add(start, start, tmp);
117
118 __ bind(loop);
119 if (UseCondCardMark) {
120 __ add(tmp, start, count);
121 __ lbu(tmp, Address(tmp, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 __ add(tmp, start, count);
129 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
130 __ sb(zr, Address(tmp, 0));
131
132 __ bind(next);
133 __ subi(count, count, 1);
134 __ bgez(count, loop);
135
136 __ bind(done);
137 }
138
139 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
140 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
141 assert_different_registers(value, tmp1, tmp2);
142 // Can we store a value in the given thread's buffer?
143 // (The index field is typed as size_t.)
144 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
145 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
146 // The buffer is not full, store value into it.
147 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
148 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
149 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
150 __ add(tmp2, tmp2, tmp1);
151 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
152 }
153
154 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
155 const Register thread,
156 const Register tmp1) {
157 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
158 // Is marking active?
159 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
160 __ lwu(tmp1, in_progress);
161 } else {
162 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
163 __ lbu(tmp1, in_progress);
164 }
165 }
166
167 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
168 const Register obj,
169 const Register pre_val,
170 const Register thread,
171 const Register tmp1,
172 const Register tmp2,
173 Label& done,
174 Label& runtime) {
175 // Do we need to load the previous value?
176 if (obj != noreg) {
177 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
178 }
179 // Is the previous value null?
180 __ beqz(pre_val, done, /* is_far */ true);
181 generate_queue_test_and_insertion(masm,
182 G1ThreadLocalData::satb_mark_queue_index_offset(),
183 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
184 runtime,
185 thread, pre_val, tmp1, tmp2);
186 __ j(done);
187 }
188
189 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
190 Register obj,
191 Register pre_val,
192 Register thread,
193 Register tmp1,
194 Register tmp2,
195 bool tosca_live,
196 bool expand_call) {
197 // If expand_call is true then we expand the call_VM_leaf macro
198 // directly to skip generating the check by
199 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
200
201 assert(thread == xthread, "must be");
202
203 Label done;
204 Label runtime;
205
206 assert_different_registers(obj, pre_val, tmp1, tmp2);
207 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
208
209 generate_pre_barrier_fast_path(masm, thread, tmp1);
210 // If marking is not active (*(mark queue active address) == 0), jump to done
211 __ beqz(tmp1, done);
212 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
213
214 __ bind(runtime);
215
216 __ push_call_clobbered_registers();
217
218 // Calling the runtime using the regular call_VM_leaf mechanism generates
219 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
220 // that checks that the *(fp+frame::interpreter_frame_last_sp) == nullptr.
221 //
222 // If we care generating the pre-barrier without a frame (e.g. in the
223 // intrinsified Reference.get() routine) then fp might be pointing to
224 // the caller frame and so this check will most likely fail at runtime.
225 //
226 // Expanding the call directly bypasses the generation of the check.
227 // So when we do not have have a full interpreter frame on the stack
228 // expand_call should be passed true.
229
230 if (expand_call) {
231 assert(pre_val != c_rarg1, "smashed arg");
232 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
233 } else {
234 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
235 }
236
237 __ pop_call_clobbered_registers();
238
239 __ bind(done);
240
241 }
242
243 static void generate_post_barrier(MacroAssembler* masm,
244 const Register store_addr,
245 const Register new_val,
246 const Register thread,
247 const Register tmp1,
248 const Register tmp2,
249 Label& done,
250 bool new_val_may_be_null) {
251 assert(thread == xthread, "must be");
252 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg);
253 // Does store cross heap regions?
254 __ xorr(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
255 __ srli(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
256 __ beqz(tmp1, done);
257
258 // Crosses regions, storing null?
259 if (new_val_may_be_null) {
260 __ beqz(new_val, done);
261 }
262 // Storing region crossing non-null, is card clean?
263 __ srli(tmp1, store_addr, CardTable::card_shift()); // tmp1 := card address relative to card table base
264
265 Address card_table_address(xthread, G1ThreadLocalData::card_table_base_offset());
266 __ ld(tmp2, card_table_address); // tmp2 := card table base address
267 __ add(tmp1, tmp1, tmp2); // tmp1 := card address
268 if (UseCondCardMark) {
269 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
270 __ lbu(tmp2, Address(tmp1, 0)); // tmp2 := card
271 __ subi(tmp2, tmp2, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
272 // against zero to avoid use of an extra temp.
273 __ bnez(tmp2, done);
274 }
275 static_assert((uint)G1CardTable::dirty_card_val() == 0, "must be to use zr");
276 __ sb(zr, Address(tmp1, 0));
277 }
278
279 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
280 Register store_addr,
281 Register new_val,
282 Register thread,
283 Register tmp1,
284 Register tmp2) {
285 Label done;
286 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
287 __ bind(done);
288 }
289
290 #if defined(COMPILER2)
291
292 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
293 SaveLiveRegisters save_registers(masm, stub);
294 if (c_rarg0 != arg) {
295 __ mv(c_rarg0, arg);
296 }
297 __ mv(c_rarg1, xthread);
298 __ mv(t1, runtime_path);
299 __ jalr(t1);
300 }
301
302 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
303 Register obj,
304 Register pre_val,
305 Register thread,
306 Register tmp1,
307 Register tmp2,
308 G1PreBarrierStubC2* stub) {
309 assert(thread == xthread, "must be");
310 assert_different_registers(obj, pre_val, tmp1, tmp2);
311 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
312
313 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
314
315 generate_pre_barrier_fast_path(masm, thread, tmp1);
316 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
317 __ bnez(tmp1, *stub->entry(), /* is_far */ true);
318
319 __ bind(*stub->continuation());
320 }
321
322 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
323 G1PreBarrierStubC2* stub) const {
324 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
325 Label runtime;
326 Register obj = stub->obj();
327 Register pre_val = stub->pre_val();
328 Register thread = stub->thread();
329 Register tmp1 = stub->tmp1();
330 Register tmp2 = stub->tmp2();
331
332 __ bind(*stub->entry());
333 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
334
335 __ bind(runtime);
336 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
337 __ j(*stub->continuation());
338 }
339
340 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
341 Register store_addr,
342 Register new_val,
343 Register thread,
344 Register tmp1,
345 Register tmp2,
346 bool new_val_may_be_null) {
347 Label done;
348 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
349 __ bind(done);
350 }
351
352 #endif // COMPILER2
353
354 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
355 Register dst, Address src, Register tmp1, Register tmp2) {
356 bool on_oop = is_reference_type(type);
357 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
358 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
359 bool on_reference = on_weak || on_phantom;
360 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
361 if (on_oop && on_reference) {
362 // RA is live. It must be saved around calls.
363 __ enter(); // barrier may call runtime
364 // Generate the G1 pre-barrier code to log the value of
365 // the referent field in an SATB buffer.
366 g1_write_barrier_pre(masm /* masm */,
367 noreg /* obj */,
368 dst /* pre_val */,
369 xthread /* thread */,
370 tmp1 /* tmp1 */,
371 tmp2 /* tmp2 */,
372 true /* tosca_live */,
373 true /* expand_call */);
374 __ leave();
375 }
376 }
377
378 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
379 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
380
381 bool in_heap = (decorators & IN_HEAP) != 0;
382 bool as_normal = (decorators & AS_NORMAL) != 0;
383 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
384
385 bool needs_pre_barrier = as_normal && !dest_uninitialized;
386 bool needs_post_barrier = (val != noreg && in_heap);
387
388 assert_different_registers(val, tmp1, tmp2, tmp3);
389
390 // flatten object address if needed
391 if (dst.offset() == 0) {
392 if (dst.base() != tmp3) {
393 __ mv(tmp3, dst.base());
394 }
395 } else {
396 __ la(tmp3, dst);
397 }
398
399 if (needs_pre_barrier) {
400 g1_write_barrier_pre(masm,
401 tmp3 /* obj */,
402 tmp2 /* pre_val */,
403 xthread /* thread */,
404 tmp1 /* tmp1 */,
405 t1 /* tmp2 */,
406 val != noreg /* tosca_live */,
407 false /* expand_call */);
408 }
409
410 if (val == noreg) {
411 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
412 } else {
413 // G1 barrier needs uncompressed oop for region cross check.
414 Register new_val = val;
415 if (needs_post_barrier) {
416 if (UseCompressedOops) {
417 new_val = t1;
418 __ mv(new_val, val);
419 }
420 }
421 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
422 if (needs_post_barrier) {
423 g1_write_barrier_post(masm,
424 tmp3 /* store_adr */,
425 new_val /* new_val */,
426 xthread /* thread */,
427 tmp1 /* tmp1 */,
428 tmp2 /* tmp2 */);
429 }
430 }
431 }
432
433 #ifdef COMPILER1
434
435 #undef __
436 #define __ ce->masm()->
437
438 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
439 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
440
441 // At this point we know that marking is in progress.
442 // If do_load() is true then we have to emit the
443 // load of the previous value; otherwise it has already
444 // been loaded into _pre_val.
445 __ bind(*stub->entry());
446
447 assert(stub->pre_val()->is_register(), "Precondition.");
448
449 Register pre_val_reg = stub->pre_val()->as_register();
450
451 if (stub->do_load()) {
452 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /* wide */);
453 }
454 __ beqz(pre_val_reg, *stub->continuation(), /* is_far */ true);
455 ce->store_parameter(stub->pre_val()->as_register(), 0);
456 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
457 __ j(*stub->continuation());
458 }
459
460 #undef __
461
462 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
463 Register store_addr,
464 Register new_val,
465 Register thread,
466 Register tmp1,
467 Register tmp2) {
468 Label done;
469 generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
470 masm->bind(done);
471 }
472
473 #define __ sasm->
474
475 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
476 __ prologue("g1_pre_barrier", false);
477
478 BarrierSet* bs = BarrierSet::barrier_set();
479
480 // arg0 : previous value of memory
481 const Register pre_val = x10;
482 const Register thread = xthread;
483 const Register tmp = t0;
484
485 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
486 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
487 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
488
489 Label done;
490 Label runtime;
491
492 // Is marking still active?
493 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { // 4-byte width
494 __ lwu(tmp, in_progress);
495 } else {
496 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
497 __ lbu(tmp, in_progress);
498 }
499 __ beqz(tmp, done);
500
501 // Can we store original value in the thread's buffer?
502 __ ld(tmp, queue_index);
503 __ beqz(tmp, runtime);
504
505 __ subi(tmp, tmp, wordSize);
506 __ sd(tmp, queue_index);
507 __ ld(t1, buffer);
508 __ add(tmp, tmp, t1);
509 __ load_parameter(0, t1);
510 __ sd(t1, Address(tmp, 0));
511 __ j(done);
512
513 __ bind(runtime);
514 __ push_call_clobbered_registers();
515 __ load_parameter(0, pre_val);
516 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
517 __ pop_call_clobbered_registers();
518 __ bind(done);
519
520 __ epilogue();
521 }
522
523 #undef __
524
525 #endif // COMPILER1