1 /*
2 * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
120 if (UseCondCardMark) {
121 __ lbu(tmp, Address(start, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
129 __ sb(zr, Address(start, 0));
130
131 __ bind(next);
132 __ addi(start, start, 1);
133 __ ble(start, count, loop);
134
135 __ bind(done);
136 }
137
138 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
139 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
140 // Can we store a value in the given thread's buffer?
141 // (The index field is typed as size_t.)
142 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
143 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
144 // The buffer is not full, store value into it.
145 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
146 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
147 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
148 __ add(tmp2, tmp2, tmp1);
149 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
150 }
151
152 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
153 const Register thread,
154 const Register tmp1) {
155 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
156 // Is marking active?
157 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
158 __ lwu(tmp1, in_progress);
159 } else {
160 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
161 __ lbu(tmp1, in_progress);
162 }
163 }
164
165 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
166 const Register obj,
167 const Register pre_val,
168 const Register thread,
169 const Register tmp1,
170 const Register tmp2,
171 Label& done,
172 Label& runtime) {
173 // Do we need to load the previous value?
174 if (obj != noreg) {
175 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
176 }
177 // Is the previous value null?
178 __ beqz(pre_val, done, true);
179 generate_queue_test_and_insertion(masm,
180 G1ThreadLocalData::satb_mark_queue_index_offset(),
181 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
182 runtime,
183 thread, pre_val, tmp1, tmp2);
184 __ j(done);
185 }
186
187 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
188 Register obj,
189 Register pre_val,
190 Register thread,
191 Register tmp1,
192 Register tmp2,
193 bool tosca_live,
194 bool expand_call) {
195 // If expand_call is true then we expand the call_VM_leaf macro
196 // directly to skip generating the check by
197 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
198
199 assert(thread == xthread, "must be");
200
201 Label done;
202 Label runtime;
203
204 assert_different_registers(obj, pre_val, tmp1, tmp2);
205 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
206
207 generate_pre_barrier_fast_path(masm, thread, tmp1);
208 // If marking is not active (*(mark queue active address) == 0), jump to done
209 __ beqz(tmp1, done);
210 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
211
212 __ bind(runtime);
213
214 __ push_call_clobbered_registers();
215
216 if (expand_call) {
217 assert(pre_val != c_rarg1, "smashed arg");
218 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
219 } else {
220 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
221 }
222
223 __ pop_call_clobbered_registers();
224
225 __ bind(done);
226
227 }
228
229 static void generate_post_barrier(MacroAssembler* masm,
230 const Register store_addr,
231 const Register new_val,
232 const Register thread,
233 const Register tmp1,
234 const Register tmp2,
235 Label& done,
283 __ mv(c_rarg1, xthread);
284 __ mv(t1, runtime_path);
285 __ jalr(t1);
286 }
287
288 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
289 Register obj,
290 Register pre_val,
291 Register thread,
292 Register tmp1,
293 Register tmp2,
294 G1PreBarrierStubC2* stub) {
295 assert(thread == xthread, "must be");
296 assert_different_registers(obj, pre_val, tmp1, tmp2);
297 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
298
299 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
300
301 generate_pre_barrier_fast_path(masm, thread, tmp1);
302 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
303 __ bnez(tmp1, *stub->entry(), true);
304
305 __ bind(*stub->continuation());
306 }
307
308 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
309 G1PreBarrierStubC2* stub) const {
310 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
311 Label runtime;
312 Register obj = stub->obj();
313 Register pre_val = stub->pre_val();
314 Register thread = stub->thread();
315 Register tmp1 = stub->tmp1();
316 Register tmp2 = stub->tmp2();
317
318 __ bind(*stub->entry());
319 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
320
321 __ bind(runtime);
322 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
323 __ j(*stub->continuation());
346 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
347 if (on_oop && on_reference) {
348 // RA is live. It must be saved around calls.
349 __ enter(); // barrier may call runtime
350 // Generate the G1 pre-barrier code to log the value of
351 // the referent field in an SATB buffer.
352 g1_write_barrier_pre(masm /* masm */,
353 noreg /* obj */,
354 dst /* pre_val */,
355 xthread /* thread */,
356 tmp1 /* tmp1 */,
357 tmp2 /* tmp2 */,
358 true /* tosca_live */,
359 true /* expand_call */);
360 __ leave();
361 }
362 }
363
364 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
365 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
366 // flatten object address if needed
367 if (dst.offset() == 0) {
368 if (dst.base() != tmp3) {
369 __ mv(tmp3, dst.base());
370 }
371 } else {
372 __ la(tmp3, dst);
373 }
374
375 g1_write_barrier_pre(masm,
376 tmp3 /* obj */,
377 tmp2 /* pre_val */,
378 xthread /* thread */,
379 tmp1 /* tmp1 */,
380 t1 /* tmp2 */,
381 val != noreg /* tosca_live */,
382 false /* expand_call */);
383
384 if (val == noreg) {
385 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
386 } else {
387 // G1 barrier needs uncompressed oop for region cross check.
388 Register new_val = val;
389 if (UseCompressedOops) {
390 new_val = t1;
391 __ mv(new_val, val);
392 }
393 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
394 g1_write_barrier_post(masm,
395 tmp3 /* store_adr */,
396 new_val /* new_val */,
397 xthread /* thread */,
398 tmp1 /* tmp1 */,
399 tmp2 /* tmp2 */);
400 }
401 }
402
403 #ifdef COMPILER1
404
405 #undef __
406 #define __ ce->masm()->
407
408 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
409 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
410
411 // At this point we know that marking is in progress.
412 // If do_load() is true then we have to emit the
413 // load of the previous value; otherwise it has already
414 // been loaded into _pre_val.
415 __ bind(*stub->entry());
416
417 assert(stub->pre_val()->is_register(), "Precondition.");
418
419 Register pre_val_reg = stub->pre_val()->as_register();
|
1 /*
2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
120 if (UseCondCardMark) {
121 __ lbu(tmp, Address(start, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
129 __ sb(zr, Address(start, 0));
130
131 __ bind(next);
132 __ addi(start, start, 1);
133 __ ble(start, count, loop);
134
135 __ bind(done);
136 }
137
138 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
139 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
140 assert_different_registers(value, tmp1, tmp2);
141 // Can we store a value in the given thread's buffer?
142 // (The index field is typed as size_t.)
143 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
144 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
145 // The buffer is not full, store value into it.
146 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
147 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
148 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
149 __ add(tmp2, tmp2, tmp1);
150 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
151 }
152
153 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
154 const Register thread,
155 const Register tmp1) {
156 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
157 // Is marking active?
158 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
159 __ lwu(tmp1, in_progress);
160 } else {
161 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
162 __ lbu(tmp1, in_progress);
163 }
164 }
165
166 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
167 const Register obj,
168 const Register pre_val,
169 const Register thread,
170 const Register tmp1,
171 const Register tmp2,
172 Label& done,
173 Label& runtime) {
174 // Do we need to load the previous value?
175 if (obj != noreg) {
176 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
177 }
178 // Is the previous value null?
179 __ beqz(pre_val, done, /* is_far */ true);
180 generate_queue_test_and_insertion(masm,
181 G1ThreadLocalData::satb_mark_queue_index_offset(),
182 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
183 runtime,
184 thread, pre_val, tmp1, tmp2);
185 __ j(done);
186 }
187
188 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
189 Register obj,
190 Register pre_val,
191 Register thread,
192 Register tmp1,
193 Register tmp2,
194 bool tosca_live,
195 bool expand_call) {
196 // If expand_call is true then we expand the call_VM_leaf macro
197 // directly to skip generating the check by
198 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
199
200 assert(thread == xthread, "must be");
201
202 Label done;
203 Label runtime;
204
205 assert_different_registers(obj, pre_val, tmp1, tmp2);
206 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
207
208 generate_pre_barrier_fast_path(masm, thread, tmp1);
209 // If marking is not active (*(mark queue active address) == 0), jump to done
210 __ beqz(tmp1, done);
211 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
212
213 __ bind(runtime);
214
215 __ push_call_clobbered_registers();
216
217 // Calling the runtime using the regular call_VM_leaf mechanism generates
218 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
219 // that checks that the *(fp+frame::interpreter_frame_last_sp) == nullptr.
220 //
221 // If we care generating the pre-barrier without a frame (e.g. in the
222 // intrinsified Reference.get() routine) then fp might be pointing to
223 // the caller frame and so this check will most likely fail at runtime.
224 //
225 // Expanding the call directly bypasses the generation of the check.
226 // So when we do not have have a full interpreter frame on the stack
227 // expand_call should be passed true.
228
229 if (expand_call) {
230 assert(pre_val != c_rarg1, "smashed arg");
231 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
232 } else {
233 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
234 }
235
236 __ pop_call_clobbered_registers();
237
238 __ bind(done);
239
240 }
241
242 static void generate_post_barrier(MacroAssembler* masm,
243 const Register store_addr,
244 const Register new_val,
245 const Register thread,
246 const Register tmp1,
247 const Register tmp2,
248 Label& done,
296 __ mv(c_rarg1, xthread);
297 __ mv(t1, runtime_path);
298 __ jalr(t1);
299 }
300
301 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
302 Register obj,
303 Register pre_val,
304 Register thread,
305 Register tmp1,
306 Register tmp2,
307 G1PreBarrierStubC2* stub) {
308 assert(thread == xthread, "must be");
309 assert_different_registers(obj, pre_val, tmp1, tmp2);
310 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
311
312 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
313
314 generate_pre_barrier_fast_path(masm, thread, tmp1);
315 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
316 __ bnez(tmp1, *stub->entry(), /* is_far */ true);
317
318 __ bind(*stub->continuation());
319 }
320
321 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
322 G1PreBarrierStubC2* stub) const {
323 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
324 Label runtime;
325 Register obj = stub->obj();
326 Register pre_val = stub->pre_val();
327 Register thread = stub->thread();
328 Register tmp1 = stub->tmp1();
329 Register tmp2 = stub->tmp2();
330
331 __ bind(*stub->entry());
332 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
333
334 __ bind(runtime);
335 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
336 __ j(*stub->continuation());
359 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
360 if (on_oop && on_reference) {
361 // RA is live. It must be saved around calls.
362 __ enter(); // barrier may call runtime
363 // Generate the G1 pre-barrier code to log the value of
364 // the referent field in an SATB buffer.
365 g1_write_barrier_pre(masm /* masm */,
366 noreg /* obj */,
367 dst /* pre_val */,
368 xthread /* thread */,
369 tmp1 /* tmp1 */,
370 tmp2 /* tmp2 */,
371 true /* tosca_live */,
372 true /* expand_call */);
373 __ leave();
374 }
375 }
376
377 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
378 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
379
380 bool in_heap = (decorators & IN_HEAP) != 0;
381 bool as_normal = (decorators & AS_NORMAL) != 0;
382 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
383
384 bool needs_pre_barrier = as_normal && !dest_uninitialized;
385 bool needs_post_barrier = (val != noreg && in_heap);
386
387 assert_different_registers(val, tmp1, tmp2, tmp3);
388
389 // flatten object address if needed
390 if (dst.offset() == 0) {
391 if (dst.base() != tmp3) {
392 __ mv(tmp3, dst.base());
393 }
394 } else {
395 __ la(tmp3, dst);
396 }
397
398 if (needs_pre_barrier) {
399 g1_write_barrier_pre(masm,
400 tmp3 /* obj */,
401 tmp2 /* pre_val */,
402 xthread /* thread */,
403 tmp1 /* tmp1 */,
404 t1 /* tmp2 */,
405 val != noreg /* tosca_live */,
406 false /* expand_call */);
407 }
408
409 if (val == noreg) {
410 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
411 } else {
412 // G1 barrier needs uncompressed oop for region cross check.
413 Register new_val = val;
414 if (needs_post_barrier) {
415 if (UseCompressedOops) {
416 new_val = t1;
417 __ mv(new_val, val);
418 }
419 }
420 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
421 if (needs_post_barrier) {
422 g1_write_barrier_post(masm,
423 tmp3 /* store_adr */,
424 new_val /* new_val */,
425 xthread /* thread */,
426 tmp1 /* tmp1 */,
427 tmp2 /* tmp2 */);
428 }
429 }
430 }
431
432 #ifdef COMPILER1
433
434 #undef __
435 #define __ ce->masm()->
436
437 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
438 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
439
440 // At this point we know that marking is in progress.
441 // If do_load() is true then we have to emit the
442 // load of the previous value; otherwise it has already
443 // been loaded into _pre_val.
444 __ bind(*stub->entry());
445
446 assert(stub->pre_val()->is_register(), "Precondition.");
447
448 Register pre_val_reg = stub->pre_val()->as_register();
|