1 /*
2 * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
121 __ lbu(tmp, Address(tmp, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 __ add(tmp, start, count);
129 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
130 __ sb(zr, Address(tmp, 0));
131
132 __ bind(next);
133 __ subi(count, count, 1);
134 __ bgez(count, loop);
135
136 __ bind(done);
137 }
138
139 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
140 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
141 // Can we store a value in the given thread's buffer?
142 // (The index field is typed as size_t.)
143 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
144 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
145 // The buffer is not full, store value into it.
146 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
147 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
148 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
149 __ add(tmp2, tmp2, tmp1);
150 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
151 }
152
153 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
154 const Register thread,
155 const Register tmp1) {
156 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
157 // Is marking active?
158 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
159 __ lwu(tmp1, in_progress);
160 } else {
161 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
162 __ lbu(tmp1, in_progress);
163 }
164 }
165
166 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
167 const Register obj,
168 const Register pre_val,
169 const Register thread,
170 const Register tmp1,
171 const Register tmp2,
172 Label& done,
173 Label& runtime) {
174 // Do we need to load the previous value?
175 if (obj != noreg) {
176 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
177 }
178 // Is the previous value null?
179 __ beqz(pre_val, done, true);
180 generate_queue_test_and_insertion(masm,
181 G1ThreadLocalData::satb_mark_queue_index_offset(),
182 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
183 runtime,
184 thread, pre_val, tmp1, tmp2);
185 __ j(done);
186 }
187
188 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
189 Register obj,
190 Register pre_val,
191 Register thread,
192 Register tmp1,
193 Register tmp2,
194 bool tosca_live,
195 bool expand_call) {
196 // If expand_call is true then we expand the call_VM_leaf macro
197 // directly to skip generating the check by
198 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
199
200 assert(thread == xthread, "must be");
201
202 Label done;
203 Label runtime;
204
205 assert_different_registers(obj, pre_val, tmp1, tmp2);
206 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
207
208 generate_pre_barrier_fast_path(masm, thread, tmp1);
209 // If marking is not active (*(mark queue active address) == 0), jump to done
210 __ beqz(tmp1, done);
211 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
212
213 __ bind(runtime);
214
215 __ push_call_clobbered_registers();
216
217 if (expand_call) {
218 assert(pre_val != c_rarg1, "smashed arg");
219 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
220 } else {
221 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
222 }
223
224 __ pop_call_clobbered_registers();
225
226 __ bind(done);
227
228 }
229
230 static void generate_post_barrier(MacroAssembler* masm,
231 const Register store_addr,
232 const Register new_val,
233 const Register thread,
234 const Register tmp1,
235 const Register tmp2,
236 Label& done,
284 __ mv(c_rarg1, xthread);
285 __ mv(t1, runtime_path);
286 __ jalr(t1);
287 }
288
289 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
290 Register obj,
291 Register pre_val,
292 Register thread,
293 Register tmp1,
294 Register tmp2,
295 G1PreBarrierStubC2* stub) {
296 assert(thread == xthread, "must be");
297 assert_different_registers(obj, pre_val, tmp1, tmp2);
298 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
299
300 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
301
302 generate_pre_barrier_fast_path(masm, thread, tmp1);
303 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
304 __ bnez(tmp1, *stub->entry(), true);
305
306 __ bind(*stub->continuation());
307 }
308
309 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
310 G1PreBarrierStubC2* stub) const {
311 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
312 Label runtime;
313 Register obj = stub->obj();
314 Register pre_val = stub->pre_val();
315 Register thread = stub->thread();
316 Register tmp1 = stub->tmp1();
317 Register tmp2 = stub->tmp2();
318
319 __ bind(*stub->entry());
320 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
321
322 __ bind(runtime);
323 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
324 __ j(*stub->continuation());
347 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
348 if (on_oop && on_reference) {
349 // RA is live. It must be saved around calls.
350 __ enter(); // barrier may call runtime
351 // Generate the G1 pre-barrier code to log the value of
352 // the referent field in an SATB buffer.
353 g1_write_barrier_pre(masm /* masm */,
354 noreg /* obj */,
355 dst /* pre_val */,
356 xthread /* thread */,
357 tmp1 /* tmp1 */,
358 tmp2 /* tmp2 */,
359 true /* tosca_live */,
360 true /* expand_call */);
361 __ leave();
362 }
363 }
364
365 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
366 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
367 // flatten object address if needed
368 if (dst.offset() == 0) {
369 if (dst.base() != tmp3) {
370 __ mv(tmp3, dst.base());
371 }
372 } else {
373 __ la(tmp3, dst);
374 }
375
376 g1_write_barrier_pre(masm,
377 tmp3 /* obj */,
378 tmp2 /* pre_val */,
379 xthread /* thread */,
380 tmp1 /* tmp1 */,
381 t1 /* tmp2 */,
382 val != noreg /* tosca_live */,
383 false /* expand_call */);
384
385 if (val == noreg) {
386 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
387 } else {
388 // G1 barrier needs uncompressed oop for region cross check.
389 Register new_val = val;
390 if (UseCompressedOops) {
391 new_val = t1;
392 __ mv(new_val, val);
393 }
394 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
395 g1_write_barrier_post(masm,
396 tmp3 /* store_adr */,
397 new_val /* new_val */,
398 xthread /* thread */,
399 tmp1 /* tmp1 */,
400 tmp2 /* tmp2 */);
401 }
402 }
403
404 #ifdef COMPILER1
405
406 #undef __
407 #define __ ce->masm()->
408
409 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
410 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
411
412 // At this point we know that marking is in progress.
413 // If do_load() is true then we have to emit the
414 // load of the previous value; otherwise it has already
415 // been loaded into _pre_val.
416 __ bind(*stub->entry());
417
418 assert(stub->pre_val()->is_register(), "Precondition.");
419
420 Register pre_val_reg = stub->pre_val()->as_register();
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1 /*
2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2024, Huawei Technologies Co., Ltd. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
121 __ lbu(tmp, Address(tmp, 0));
122 static_assert((uint)G1CardTable::clean_card_val() == 0xff, "must be");
123 __ subi(tmp, tmp, G1CardTable::clean_card_val()); // Convert to clean_card_value() to a comparison
124 // against zero to avoid use of an extra temp.
125 __ bnez(tmp, next);
126 }
127
128 __ add(tmp, start, count);
129 static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
130 __ sb(zr, Address(tmp, 0));
131
132 __ bind(next);
133 __ subi(count, count, 1);
134 __ bgez(count, loop);
135
136 __ bind(done);
137 }
138
139 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
140 const Register thread, const Register value, const Register tmp1, const Register tmp2) {
141 assert_different_registers(value, tmp1, tmp2);
142 // Can we store a value in the given thread's buffer?
143 // (The index field is typed as size_t.)
144 __ ld(tmp1, Address(thread, in_bytes(index_offset))); // tmp1 := *(index address)
145 __ beqz(tmp1, runtime); // jump to runtime if index == 0 (full buffer)
146 // The buffer is not full, store value into it.
147 __ subi(tmp1, tmp1, wordSize); // tmp1 := next index
148 __ sd(tmp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
149 __ ld(tmp2, Address(thread, in_bytes(buffer_offset))); // tmp2 := buffer address
150 __ add(tmp2, tmp2, tmp1);
151 __ sd(value, Address(tmp2)); // *(buffer address + next index) := value
152 }
153
154 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
155 const Register thread,
156 const Register tmp1) {
157 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
158 // Is marking active?
159 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
160 __ lwu(tmp1, in_progress);
161 } else {
162 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
163 __ lbu(tmp1, in_progress);
164 }
165 }
166
167 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
168 const Register obj,
169 const Register pre_val,
170 const Register thread,
171 const Register tmp1,
172 const Register tmp2,
173 Label& done,
174 Label& runtime) {
175 // Do we need to load the previous value?
176 if (obj != noreg) {
177 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
178 }
179 // Is the previous value null?
180 __ beqz(pre_val, done, /* is_far */ true);
181 generate_queue_test_and_insertion(masm,
182 G1ThreadLocalData::satb_mark_queue_index_offset(),
183 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
184 runtime,
185 thread, pre_val, tmp1, tmp2);
186 __ j(done);
187 }
188
189 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
190 Register obj,
191 Register pre_val,
192 Register thread,
193 Register tmp1,
194 Register tmp2,
195 bool tosca_live,
196 bool expand_call) {
197 // If expand_call is true then we expand the call_VM_leaf macro
198 // directly to skip generating the check by
199 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
200
201 assert(thread == xthread, "must be");
202
203 Label done;
204 Label runtime;
205
206 assert_different_registers(obj, pre_val, tmp1, tmp2);
207 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
208
209 generate_pre_barrier_fast_path(masm, thread, tmp1);
210 // If marking is not active (*(mark queue active address) == 0), jump to done
211 __ beqz(tmp1, done);
212 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
213
214 __ bind(runtime);
215
216 __ push_call_clobbered_registers();
217
218 // Calling the runtime using the regular call_VM_leaf mechanism generates
219 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
220 // that checks that the *(fp+frame::interpreter_frame_last_sp) == nullptr.
221 //
222 // If we care generating the pre-barrier without a frame (e.g. in the
223 // intrinsified Reference.get() routine) then fp might be pointing to
224 // the caller frame and so this check will most likely fail at runtime.
225 //
226 // Expanding the call directly bypasses the generation of the check.
227 // So when we do not have have a full interpreter frame on the stack
228 // expand_call should be passed true.
229
230 if (expand_call) {
231 assert(pre_val != c_rarg1, "smashed arg");
232 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
233 } else {
234 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
235 }
236
237 __ pop_call_clobbered_registers();
238
239 __ bind(done);
240
241 }
242
243 static void generate_post_barrier(MacroAssembler* masm,
244 const Register store_addr,
245 const Register new_val,
246 const Register thread,
247 const Register tmp1,
248 const Register tmp2,
249 Label& done,
297 __ mv(c_rarg1, xthread);
298 __ mv(t1, runtime_path);
299 __ jalr(t1);
300 }
301
302 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
303 Register obj,
304 Register pre_val,
305 Register thread,
306 Register tmp1,
307 Register tmp2,
308 G1PreBarrierStubC2* stub) {
309 assert(thread == xthread, "must be");
310 assert_different_registers(obj, pre_val, tmp1, tmp2);
311 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
312
313 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
314
315 generate_pre_barrier_fast_path(masm, thread, tmp1);
316 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
317 __ bnez(tmp1, *stub->entry(), /* is_far */ true);
318
319 __ bind(*stub->continuation());
320 }
321
322 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
323 G1PreBarrierStubC2* stub) const {
324 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
325 Label runtime;
326 Register obj = stub->obj();
327 Register pre_val = stub->pre_val();
328 Register thread = stub->thread();
329 Register tmp1 = stub->tmp1();
330 Register tmp2 = stub->tmp2();
331
332 __ bind(*stub->entry());
333 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
334
335 __ bind(runtime);
336 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
337 __ j(*stub->continuation());
360 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
361 if (on_oop && on_reference) {
362 // RA is live. It must be saved around calls.
363 __ enter(); // barrier may call runtime
364 // Generate the G1 pre-barrier code to log the value of
365 // the referent field in an SATB buffer.
366 g1_write_barrier_pre(masm /* masm */,
367 noreg /* obj */,
368 dst /* pre_val */,
369 xthread /* thread */,
370 tmp1 /* tmp1 */,
371 tmp2 /* tmp2 */,
372 true /* tosca_live */,
373 true /* expand_call */);
374 __ leave();
375 }
376 }
377
378 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
379 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
380
381 bool in_heap = (decorators & IN_HEAP) != 0;
382 bool as_normal = (decorators & AS_NORMAL) != 0;
383 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
384
385 bool needs_pre_barrier = as_normal && !dest_uninitialized;
386 bool needs_post_barrier = (val != noreg && in_heap);
387
388 assert_different_registers(val, tmp1, tmp2, tmp3);
389
390 // flatten object address if needed
391 if (dst.offset() == 0) {
392 if (dst.base() != tmp3) {
393 __ mv(tmp3, dst.base());
394 }
395 } else {
396 __ la(tmp3, dst);
397 }
398
399 if (needs_pre_barrier) {
400 g1_write_barrier_pre(masm,
401 tmp3 /* obj */,
402 tmp2 /* pre_val */,
403 xthread /* thread */,
404 tmp1 /* tmp1 */,
405 t1 /* tmp2 */,
406 val != noreg /* tosca_live */,
407 false /* expand_call */);
408 }
409
410 if (val == noreg) {
411 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
412 } else {
413 // G1 barrier needs uncompressed oop for region cross check.
414 Register new_val = val;
415 if (needs_post_barrier) {
416 if (UseCompressedOops) {
417 new_val = t1;
418 __ mv(new_val, val);
419 }
420 }
421 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
422 if (needs_post_barrier) {
423 g1_write_barrier_post(masm,
424 tmp3 /* store_adr */,
425 new_val /* new_val */,
426 xthread /* thread */,
427 tmp1 /* tmp1 */,
428 tmp2 /* tmp2 */);
429 }
430 }
431 }
432
433 #ifdef COMPILER1
434
435 #undef __
436 #define __ ce->masm()->
437
438 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
439 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
440
441 // At this point we know that marking is in progress.
442 // If do_load() is true then we have to emit the
443 // load of the previous value; otherwise it has already
444 // been loaded into _pre_val.
445 __ bind(*stub->entry());
446
447 assert(stub->pre_val()->is_register(), "Precondition.");
448
449 Register pre_val_reg = stub->pre_val()->as_register();
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