< prev index next >

src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp

Print this page

  1 /*
  2  * Copyright (c) 2004, 2025, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #include "asm/macroAssembler.hpp"
 28 #include "gc/shared/barrierSet.hpp"
 29 #include "gc/shared/barrierSetAssembler.hpp"
 30 #include "memory/resourceArea.hpp"
 31 #include "prims/jniFastGetField.hpp"
 32 #include "prims/jvm_misc.hpp"
 33 #include "prims/jvmtiExport.hpp"

 34 #include "runtime/safepoint.hpp"
 35 
 36 #define __ masm->
 37 
 38 #define BUFFER_SIZE 30*wordSize
 39 
 40 // Instead of issuing a LoadLoad barrier we create an address
 41 // dependency between loads; this might be more efficient.
 42 
 43 // Common register usage:
 44 // x10/f10:      result
 45 // c_rarg0:    jni env
 46 // c_rarg1:    obj
 47 // c_rarg2:    jfield id
 48 
 49 static const Register robj          = x13;
 50 static const Register rcounter      = x14;
 51 static const Register roffset       = x15;
 52 static const Register rcounter_addr = x16;
 53 static const Register result        = x17;

 86 
 87     // Check to see if a field access watch has been set before we
 88     // take the fast path.
 89     __ lwu(result, ExternalAddress(JvmtiExport::get_field_access_count_addr()));
 90     __ bnez(result, slow);
 91 
 92     __ mv(robj, c_rarg1);
 93   } else {
 94     // Using address dependency to order wrt. load of result.
 95     __ xorr(robj, c_rarg1, rcounter);
 96     __ xorr(robj, robj, rcounter);               // obj, since
 97                                                  // robj ^ rcounter ^ rcounter == robj
 98                                                  // robj is address dependent on rcounter.
 99   }
100 
101   // Both robj and t0 are clobbered by try_resolve_jobject_in_native.
102   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
103   assert_cond(bs != nullptr);
104   bs->try_resolve_jobject_in_native(masm, c_rarg0, robj, t0, slow);
105 
106   __ srli(roffset, c_rarg2, 2);                // offset
107 
108   assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
109   speculative_load_pclist[count] = __ pc();   // Used by the segfault handler
110   __ add(roffset, robj, roffset);
111 
112   switch (type) {
113     case T_BOOLEAN: __ lbu(result, Address(roffset, 0)); break;
114     case T_BYTE:    __ lb(result, Address(roffset, 0)); break;
115     case T_CHAR:    __ lhu(result, Address(roffset, 0)); break;
116     case T_SHORT:   __ lh(result, Address(roffset, 0)); break;
117     case T_INT:     __ lw(result, Address(roffset, 0)); break;
118     case T_LONG:    __ ld(result, Address(roffset, 0)); break;
119     case T_FLOAT: {
120       __ flw(f28, Address(roffset, 0)); // f28 as temporaries
121       __ fmv_x_w(result, f28); // f{31--0}-->x
122       break;
123     }
124     case T_DOUBLE: {
125       __ fld(f28, Address(roffset, 0)); // f28 as temporaries
126       __ fmv_x_d(result, f28); // d{63--0}-->x

  1 /*
  2  * Copyright (c) 2004, 2026, Oracle and/or its affiliates. All rights reserved.
  3  * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved.
  4  * Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #include "asm/macroAssembler.hpp"
 28 #include "gc/shared/barrierSet.hpp"
 29 #include "gc/shared/barrierSetAssembler.hpp"
 30 #include "memory/resourceArea.hpp"
 31 #include "prims/jniFastGetField.hpp"
 32 #include "prims/jvm_misc.hpp"
 33 #include "prims/jvmtiExport.hpp"
 34 #include "runtime/jfieldIDWorkaround.hpp"
 35 #include "runtime/safepoint.hpp"
 36 
 37 #define __ masm->
 38 
 39 #define BUFFER_SIZE 30*wordSize
 40 
 41 // Instead of issuing a LoadLoad barrier we create an address
 42 // dependency between loads; this might be more efficient.
 43 
 44 // Common register usage:
 45 // x10/f10:      result
 46 // c_rarg0:    jni env
 47 // c_rarg1:    obj
 48 // c_rarg2:    jfield id
 49 
 50 static const Register robj          = x13;
 51 static const Register rcounter      = x14;
 52 static const Register roffset       = x15;
 53 static const Register rcounter_addr = x16;
 54 static const Register result        = x17;

 87 
 88     // Check to see if a field access watch has been set before we
 89     // take the fast path.
 90     __ lwu(result, ExternalAddress(JvmtiExport::get_field_access_count_addr()));
 91     __ bnez(result, slow);
 92 
 93     __ mv(robj, c_rarg1);
 94   } else {
 95     // Using address dependency to order wrt. load of result.
 96     __ xorr(robj, c_rarg1, rcounter);
 97     __ xorr(robj, robj, rcounter);               // obj, since
 98                                                  // robj ^ rcounter ^ rcounter == robj
 99                                                  // robj is address dependent on rcounter.
100   }
101 
102   // Both robj and t0 are clobbered by try_resolve_jobject_in_native.
103   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
104   assert_cond(bs != nullptr);
105   bs->try_resolve_jobject_in_native(masm, c_rarg0, robj, t0, slow);
106 
107   __ srli(roffset, c_rarg2, jfieldIDWorkaround::offset_shift); // offset
108 
109   assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
110   speculative_load_pclist[count] = __ pc();   // Used by the segfault handler
111   __ add(roffset, robj, roffset);
112 
113   switch (type) {
114     case T_BOOLEAN: __ lbu(result, Address(roffset, 0)); break;
115     case T_BYTE:    __ lb(result, Address(roffset, 0)); break;
116     case T_CHAR:    __ lhu(result, Address(roffset, 0)); break;
117     case T_SHORT:   __ lh(result, Address(roffset, 0)); break;
118     case T_INT:     __ lw(result, Address(roffset, 0)); break;
119     case T_LONG:    __ ld(result, Address(roffset, 0)); break;
120     case T_FLOAT: {
121       __ flw(f28, Address(roffset, 0)); // f28 as temporaries
122       __ fmv_x_w(result, f28); // f{31--0}-->x
123       break;
124     }
125     case T_DOUBLE: {
126       __ fld(f28, Address(roffset, 0)); // f28 as temporaries
127       __ fmv_x_d(result, f28); // d{63--0}-->x
< prev index next >