1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
4 * Copyright (c) 2023, Rivos Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
201 _initial_vector_length = cpu_vector_length();
202 }
203
204 // Misc Intrinsics that could depend on RVV.
205
206 if (!AvoidUnalignedAccesses && (UseZba || UseRVV)) {
207 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
208 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
209 }
210 } else {
211 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
212 warning("CRC32 intrinsic are not available on this CPU.");
213 }
214 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
215 }
216
217 if (UseCRC32CIntrinsics) {
218 warning("CRC32C intrinsics are not available on this CPU.");
219 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
220 }
221 }
222
223 #ifdef COMPILER2
224 void VM_Version::c2_initialize() {
225 if (!UseRVV) {
226 FLAG_SET_DEFAULT(MaxVectorSize, 0);
227 } else {
228 if (!FLAG_IS_DEFAULT(MaxVectorSize) && MaxVectorSize != _initial_vector_length) {
229 warning("Current system does not support RVV vector length for MaxVectorSize %d. Set MaxVectorSize to %d",
230 (int)MaxVectorSize, _initial_vector_length);
231 }
232 MaxVectorSize = _initial_vector_length;
233 if (MaxVectorSize < 16) {
234 warning("RVV does not support vector length less than 16 bytes. Disabling RVV.");
235 UseRVV = false;
236 FLAG_SET_DEFAULT(MaxVectorSize, 0);
237 }
238 }
239
240 if (FLAG_IS_DEFAULT(AlignVector)) {
|
1 /*
2 * Copyright (c) 1997, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2020, 2023, Huawei Technologies Co., Ltd. All rights reserved.
4 * Copyright (c) 2023, Rivos Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
201 _initial_vector_length = cpu_vector_length();
202 }
203
204 // Misc Intrinsics that could depend on RVV.
205
206 if (!AvoidUnalignedAccesses && (UseZba || UseRVV)) {
207 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
208 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
209 }
210 } else {
211 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
212 warning("CRC32 intrinsic are not available on this CPU.");
213 }
214 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
215 }
216
217 if (UseCRC32CIntrinsics) {
218 warning("CRC32C intrinsics are not available on this CPU.");
219 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
220 }
221
222 if (InlineTypePassFieldsAsArgs) {
223 warning("InlineTypePassFieldsAsArgs is not supported on this CPU");
224 FLAG_SET_DEFAULT(InlineTypePassFieldsAsArgs, false);
225 }
226 if (InlineTypeReturnedAsFields) {
227 warning("InlineTypeReturnedAsFields is not supported on this CPU");
228 FLAG_SET_DEFAULT(InlineTypeReturnedAsFields, false);
229 }
230 }
231
232 #ifdef COMPILER2
233 void VM_Version::c2_initialize() {
234 if (!UseRVV) {
235 FLAG_SET_DEFAULT(MaxVectorSize, 0);
236 } else {
237 if (!FLAG_IS_DEFAULT(MaxVectorSize) && MaxVectorSize != _initial_vector_length) {
238 warning("Current system does not support RVV vector length for MaxVectorSize %d. Set MaxVectorSize to %d",
239 (int)MaxVectorSize, _initial_vector_length);
240 }
241 MaxVectorSize = _initial_vector_length;
242 if (MaxVectorSize < 16) {
243 warning("RVV does not support vector length less than 16 bytes. Disabling RVV.");
244 UseRVV = false;
245 FLAG_SET_DEFAULT(MaxVectorSize, 0);
246 }
247 }
248
249 if (FLAG_IS_DEFAULT(AlignVector)) {
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