< prev index next >

src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp

Print this page

3002 
3003         // Already unknown: Nothing to do anymore.
3004         __ z_tmll(tmp2, TypeEntries::type_unknown);
3005         __ z_brc(Assembler::bcondAllOne, next);
3006         __ z_oill(tmp2, TypeEntries::type_unknown);
3007         __ z_bru(do_update);
3008       }
3009     }
3010 
3011     __ bind(init_klass);
3012     // Combine klass and null_seen bit (only used if (tmp & type_mask)==0).
3013     __ z_ogr(tmp2, tmp1);
3014 
3015     __ bind(do_update);
3016     __ z_stg(tmp2, mdo_addr);
3017 
3018     __ bind(next);
3019   }
3020 }
3021 




3022 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
3023   assert(op->crc()->is_single_cpu(), "crc must be register");
3024   assert(op->val()->is_single_cpu(), "byte value must be register");
3025   assert(op->result_opr()->is_single_cpu(), "result must be register");
3026   Register crc = op->crc()->as_register();
3027   Register val = op->val()->as_register();
3028   Register res = op->result_opr()->as_register();
3029 
3030   assert_different_registers(val, crc, res);
3031 
3032   __ load_const_optimized(res, StubRoutines::crc_table_addr());
3033   __ kernel_crc32_singleByteReg(crc, val, res, true);
3034   __ z_lgfr(res, crc);
3035 }
3036 






















3037 #undef __

3002 
3003         // Already unknown: Nothing to do anymore.
3004         __ z_tmll(tmp2, TypeEntries::type_unknown);
3005         __ z_brc(Assembler::bcondAllOne, next);
3006         __ z_oill(tmp2, TypeEntries::type_unknown);
3007         __ z_bru(do_update);
3008       }
3009     }
3010 
3011     __ bind(init_klass);
3012     // Combine klass and null_seen bit (only used if (tmp & type_mask)==0).
3013     __ z_ogr(tmp2, tmp1);
3014 
3015     __ bind(do_update);
3016     __ z_stg(tmp2, mdo_addr);
3017 
3018     __ bind(next);
3019   }
3020 }
3021 
3022 void LIR_Assembler::emit_profile_inline_type(LIR_OpProfileInlineType* op) {
3023   Unimplemented();
3024 }
3025 
3026 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
3027   assert(op->crc()->is_single_cpu(), "crc must be register");
3028   assert(op->val()->is_single_cpu(), "byte value must be register");
3029   assert(op->result_opr()->is_single_cpu(), "result must be register");
3030   Register crc = op->crc()->as_register();
3031   Register val = op->val()->as_register();
3032   Register res = op->result_opr()->as_register();
3033 
3034   assert_different_registers(val, crc, res);
3035 
3036   __ load_const_optimized(res, StubRoutines::crc_table_addr());
3037   __ kernel_crc32_singleByteReg(crc, val, res, true);
3038   __ z_lgfr(res, crc);
3039 }
3040 
3041 // Valhalla support
3042 
3043 void LIR_Assembler::check_orig_pc() {
3044   Unimplemented();
3045 }
3046 
3047 int LIR_Assembler::store_inline_type_fields_to_buf(ciInlineKlass* vk) {
3048   Unimplemented();
3049   return 0;
3050 }
3051 
3052 void LIR_Assembler::emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op) {
3053   Unimplemented();
3054 }
3055 
3056 void LIR_Assembler::emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op) {
3057   Unimplemented();
3058 }
3059 
3060 void LIR_Assembler::emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op) {
3061   Unimplemented();
3062 }
3063 #undef __
< prev index next >