1 /*
2 * Copyright (c) 2016, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016, 2024 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "vmreg_s390.inline.hpp"
39 #include "utilities/powerOfTwo.hpp"
40
41 #ifdef ASSERT
42 #define __ gen()->lir(__FILE__, __LINE__)->
43 #else
44 #define __ gen()->lir()->
45 #endif
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52 void LIRItem::load_nonconstant(int bits) {
53 LIR_Opr r = value()->operand();
54 if (_gen->can_inline_as_constant(value(), bits)) {
55 if (!r->is_constant()) {
56 r = LIR_OprFact::value_type(value()->type());
57 }
58 _result = r;
59 } else {
60 load_item();
61 }
62 }
63
64 //--------------------------------------------------------------
65 // LIRGenerator
66 //--------------------------------------------------------------
67
68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); }
69 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::as_opr(Z_EXC_PC); }
70 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::Z_R11_opr; }
71 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::Z_R11_opr; }
72 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::Z_R10_opr; }
73 LIR_Opr LIRGenerator::ldivInOpr() { return FrameMap::Z_R11_long_opr; }
74 LIR_Opr LIRGenerator::ldivOutOpr() { return FrameMap::Z_R11_long_opr; }
75 LIR_Opr LIRGenerator::lremOutOpr() { return FrameMap::Z_R10_long_opr; }
76 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
77 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::Z_R13_opr; }
78 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
79
80 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) {
81 LIR_Opr opr;
82 switch (type->tag()) {
83 case intTag: opr = FrameMap::Z_R2_opr; break;
84 case objectTag: opr = FrameMap::Z_R2_oop_opr; break;
85 case longTag: opr = FrameMap::Z_R2_long_opr; break;
86 case floatTag: opr = FrameMap::Z_F0_opr; break;
87 case doubleTag: opr = FrameMap::Z_F0_double_opr; break;
88
89 case addressTag:
90 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
91 }
92
93 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
94 return opr;
95 }
96
97 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
98 return new_register(T_INT);
99 }
100
101 //--------- Loading items into registers. --------------------------------
102
103 // z/Architecture cannot inline all constants.
104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
105 if (v->type()->as_IntConstant() != nullptr) {
106 return Immediate::is_simm16(v->type()->as_IntConstant()->value());
107 } else if (v->type()->as_LongConstant() != nullptr) {
108 return Immediate::is_simm16(v->type()->as_LongConstant()->value());
109 } else if (v->type()->as_ObjectConstant() != nullptr) {
110 return v->type()->as_ObjectConstant()->value()->is_null_object();
111 } else {
112 return false;
113 }
114 }
115
116 bool LIRGenerator::can_inline_as_constant(Value i, int bits) const {
117 if (i->type()->as_IntConstant() != nullptr) {
118 return Assembler::is_simm(i->type()->as_IntConstant()->value(), bits);
119 } else if (i->type()->as_LongConstant() != nullptr) {
120 return Assembler::is_simm(i->type()->as_LongConstant()->value(), bits);
121 } else {
122 return can_store_as_constant(i, as_BasicType(i->type()));
123 }
124 }
125
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
127 if (c->type() == T_INT) {
128 return Immediate::is_simm20(c->as_jint());
129 } else if (c->type() == T_LONG) {
130 return Immediate::is_simm20(c->as_jlong());
131 }
132 return false;
133 }
134
135 LIR_Opr LIRGenerator::safepoint_poll_register() {
136 return new_register(longType);
137 }
138
139 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
140 int shift, int disp, BasicType type) {
141 assert(base->is_register(), "must be");
142 if (index->is_constant()) {
143 intx large_disp = disp;
144 LIR_Const *constant = index->as_constant_ptr();
145 if (constant->type() == T_LONG) {
146 large_disp += constant->as_jlong() << shift;
147 } else {
148 large_disp += (intx)(constant->as_jint()) << shift;
149 }
150 if (Displacement::is_validDisp(large_disp)) {
151 return new LIR_Address(base, large_disp, type);
152 }
153 // Index is illegal so replace it with the displacement loaded into a register.
154 index = new_pointer_register();
155 __ move(LIR_OprFact::intptrConst(large_disp), index);
156 return new LIR_Address(base, index, type);
157 } else {
158 if (shift > 0) {
159 // Use long register to avoid overflow when shifting large index values left.
160 LIR_Opr tmp = new_register(T_LONG);
161 __ convert(Bytecodes::_i2l, index, tmp);
162 __ shift_left(tmp, shift, tmp);
163 index = tmp;
164 }
165 return new LIR_Address(base, index, disp, type);
166 }
167 }
168
169 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
170 BasicType type) {
171 int elem_size = type2aelembytes(type);
172 int shift = exact_log2(elem_size);
173 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
174
175 LIR_Address* addr;
176 if (index_opr->is_constant()) {
177 addr = new LIR_Address(array_opr,
178 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
179 } else {
180 if (index_opr->type() == T_INT) {
181 LIR_Opr tmp = new_register(T_LONG);
182 __ convert(Bytecodes::_i2l, index_opr, tmp);
183 index_opr = tmp;
184 }
185 if (shift > 0) {
186 __ shift_left(index_opr, shift, index_opr);
187 }
188 addr = new LIR_Address(array_opr,
189 index_opr,
190 offset_in_bytes, type);
191 }
192 return addr;
193 }
194
195 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
196 LIR_Opr r = LIR_OprFact::illegalOpr;
197 if (type == T_LONG) {
198 r = LIR_OprFact::longConst(x);
199 } else if (type == T_INT) {
200 r = LIR_OprFact::intConst(checked_cast<jint>(x));
201 } else {
202 ShouldNotReachHere();
203 }
204 return r;
205 }
206
207 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
208 LIR_Opr pointer = new_pointer_register();
209 __ move(LIR_OprFact::intptrConst(counter), pointer);
210 LIR_Address* addr = new LIR_Address(pointer, type);
211 increment_counter(addr, step);
212 }
213
214 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
215 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
216 }
217
218 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
219 LIR_Opr scratch = FrameMap::Z_R1_opr;
220 __ load(new LIR_Address(base, disp, T_INT), scratch, info);
221 __ cmp(condition, scratch, c);
222 }
223
224 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
225 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
226 }
227
228 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
229 juint u_value = (juint)c;
230 if (tmp->is_valid()) {
231 if (is_power_of_2(u_value + 1)) {
232 __ move(left, tmp);
233 __ shift_left(left, log2i_exact(u_value + 1), left);
234 __ sub(left, tmp, result);
235 return true;
236 } else if (is_power_of_2(u_value - 1)) {
237 __ move(left, tmp);
238 __ shift_left(left, log2i_exact(u_value - 1), left);
239 __ add(left, tmp, result);
240 return true;
241 }
242 }
243
244 if (c == -1) {
245 __ negate(left, result);
246 return true;
247 }
248 return false;
249 }
250
251 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
252 BasicType type = item->type();
253 __ store(item, new LIR_Address(FrameMap::Z_SP_opr, in_bytes(offset_from_sp), type));
254 }
255
256 //----------------------------------------------------------------------
257 // visitor functions
258 //----------------------------------------------------------------------
259
260 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
261 LIR_Opr tmp1 = new_register(objectType);
262 LIR_Opr tmp2 = new_register(objectType);
263 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
264 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
265 }
266
267 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
268 assert(x->is_pinned(),"");
269 LIRItem obj(x->obj(), this);
270 obj.load_item();
271
272 set_no_result(x);
273
274 // "lock" stores the address of the monitor stack slot, so this is not an oop.
275 LIR_Opr lock = new_register(T_INT);
276
277 CodeEmitInfo* info_for_exception = nullptr;
278 if (x->needs_null_check()) {
279 info_for_exception = state_for (x);
280 }
281 // This CodeEmitInfo must not have the xhandlers because here the
282 // object is already locked (xhandlers expect object to be unlocked).
283 CodeEmitInfo* info = state_for (x, x->state(), true);
284 monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr,
285 x->monitor_no(), info_for_exception, info);
286 }
287
288 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
289 assert(x->is_pinned(),"");
290
291 LIRItem obj(x->obj(), this);
292 obj.dont_load_item();
293
294 LIR_Opr lock = new_register(T_INT);
295 LIR_Opr obj_temp = new_register(T_INT);
296 set_no_result(x);
297 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
298 }
299
300 // _ineg, _lneg, _fneg, _dneg
301 void LIRGenerator::do_NegateOp(NegateOp* x) {
302 LIRItem value(x->x(), this);
303 value.load_item();
304 LIR_Opr reg = rlock_result(x);
305 __ negate(value.result(), reg);
306 }
307
308 // for _fadd, _fmul, _fsub, _fdiv, _frem
309 // _dadd, _dmul, _dsub, _ddiv, _drem
310 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
311 LIRItem left(x->x(), this);
312 LIRItem right(x->y(), this);
313 LIRItem* left_arg = &left;
314 LIRItem* right_arg = &right;
315 assert(!left.is_stack(), "can't both be memory operands");
316 left.load_item();
317
318 if (right.is_register() || right.is_constant()) {
319 right.load_item();
320 } else {
321 right.dont_load_item();
322 }
323
324 if ((x->op() == Bytecodes::_frem) || (x->op() == Bytecodes::_drem)) {
325 address entry;
326 switch (x->op()) {
327 case Bytecodes::_frem:
328 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
329 break;
330 case Bytecodes::_drem:
331 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
332 break;
333 default:
334 ShouldNotReachHere();
335 }
336 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), nullptr);
337 set_result(x, result);
338 } else {
339 LIR_Opr reg = rlock(x);
340 LIR_Opr tmp = LIR_OprFact::illegalOpr;
341 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
342 set_result(x, reg);
343 }
344 }
345
346 // for _ladd, _lmul, _lsub, _ldiv, _lrem
347 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
348 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
349 // Use shifts if divisor is a power of 2 otherwise use DSGR instruction.
350 // Instruction: DSGR R1, R2
351 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even)
352 // R2: divisor
353 //
354 // output: R1+1: quotient
355 // R1: remainder
356 //
357 // Register selection: R1: Z_R10
358 // R1+1: Z_R11
359 // R2: to be chosen by register allocator (linear scan)
360
361 // R1, and R1+1 will be destroyed.
362
363 LIRItem right(x->y(), this);
364 LIRItem left(x->x() , this); // Visit left second, so that the is_register test is valid.
365
366 // Call state_for before load_item_force because state_for may
367 // force the evaluation of other instructions that are needed for
368 // correct debug info. Otherwise the live range of the fix
369 // register might be too long.
370 CodeEmitInfo* info = state_for (x);
371
372 LIR_Opr result = rlock_result(x);
373 LIR_Opr result_reg = result;
374 LIR_Opr tmp = LIR_OprFact::illegalOpr;
375 LIR_Opr divisor_opr = right.result();
376 if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jlong())) {
377 left.load_item();
378 right.dont_load_item();
379 } else {
380 left.load_item_force(ldivInOpr());
381 right.load_item();
382
383 // DSGR instruction needs register pair.
384 if (x->op() == Bytecodes::_ldiv) {
385 result_reg = ldivOutOpr();
386 tmp = lremOutOpr();
387 } else {
388 result_reg = lremOutOpr();
389 tmp = ldivOutOpr();
390 }
391 }
392
393 if (!ImplicitDiv0Checks) {
394 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
395 __ branch(lir_cond_equal, new DivByZeroStub(info));
396 // Idiv/irem cannot trap (passing info would generate an assertion).
397 info = nullptr;
398 }
399
400 if (x->op() == Bytecodes::_lrem) {
401 __ irem(left.result(), right.result(), result_reg, tmp, info);
402 } else if (x->op() == Bytecodes::_ldiv) {
403 __ idiv(left.result(), right.result(), result_reg, tmp, info);
404 } else {
405 ShouldNotReachHere();
406 }
407
408 if (result_reg != result) {
409 __ move(result_reg, result);
410 }
411 } else {
412 LIRItem left(x->x(), this);
413 LIRItem right(x->y(), this);
414
415 left.load_item();
416 right.load_nonconstant(32);
417 rlock_result(x);
418 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
419 }
420 }
421
422 // for: _iadd, _imul, _isub, _idiv, _irem
423 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
424 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
425 // Use shifts if divisor is a power of 2 otherwise use DSGFR instruction.
426 // Instruction: DSGFR R1, R2
427 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even)
428 // R2: divisor
429 //
430 // output: R1+1: quotient
431 // R1: remainder
432 //
433 // Register selection: R1: Z_R10
434 // R1+1: Z_R11
435 // R2: To be chosen by register allocator (linear scan).
436
437 // R1, and R1+1 will be destroyed.
438
439 LIRItem right(x->y(), this);
440 LIRItem left(x->x() , this); // Visit left second, so that the is_register test is valid.
441
442 // Call state_for before load_item_force because state_for may
443 // force the evaluation of other instructions that are needed for
444 // correct debug info. Otherwise the live range of the fix
445 // register might be too long.
446 CodeEmitInfo* info = state_for (x);
447
448 LIR_Opr result = rlock_result(x);
449 LIR_Opr result_reg = result;
450 LIR_Opr tmp = LIR_OprFact::illegalOpr;
451 LIR_Opr divisor_opr = right.result();
452 if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jint())) {
453 left.load_item();
454 right.dont_load_item();
455 } else {
456 left.load_item_force(divInOpr());
457 right.load_item();
458
459 // DSGFR instruction needs register pair.
460 if (x->op() == Bytecodes::_idiv) {
461 result_reg = divOutOpr();
462 tmp = remOutOpr();
463 } else {
464 result_reg = remOutOpr();
465 tmp = divOutOpr();
466 }
467 }
468
469 if (!ImplicitDiv0Checks) {
470 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
471 __ branch(lir_cond_equal, new DivByZeroStub(info));
472 // Idiv/irem cannot trap (passing info would generate an assertion).
473 info = nullptr;
474 }
475
476 if (x->op() == Bytecodes::_irem) {
477 __ irem(left.result(), right.result(), result_reg, tmp, info);
478 } else if (x->op() == Bytecodes::_idiv) {
479 __ idiv(left.result(), right.result(), result_reg, tmp, info);
480 } else {
481 ShouldNotReachHere();
482 }
483
484 if (result_reg != result) {
485 __ move(result_reg, result);
486 }
487 } else {
488 LIRItem left(x->x(), this);
489 LIRItem right(x->y(), this);
490 LIRItem* left_arg = &left;
491 LIRItem* right_arg = &right;
492 if (x->is_commutative() && left.is_stack() && right.is_register()) {
493 // swap them if left is real stack (or cached) and right is real register(not cached)
494 left_arg = &right;
495 right_arg = &left;
496 }
497
498 left_arg->load_item();
499
500 // Do not need to load right, as we can handle stack and constants.
501 if (x->op() == Bytecodes::_imul) {
502 bool use_tmp = false;
503 if (right_arg->is_constant()) {
504 juint u_const = (juint)right_arg->get_jint_constant();
505 if (is_power_of_2(u_const - 1) || is_power_of_2(u_const + 1)) {
506 use_tmp = true;
507 }
508 }
509 right_arg->dont_load_item();
510 LIR_Opr tmp = LIR_OprFact::illegalOpr;
511 if (use_tmp) {
512 tmp = new_register(T_INT);
513 }
514 rlock_result(x);
515
516 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
517 } else {
518 right_arg->dont_load_item();
519 rlock_result(x);
520 LIR_Opr tmp = LIR_OprFact::illegalOpr;
521 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
522 }
523 }
524 }
525
526 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
527 // If an operand with use count 1 is the left operand, then it is
528 // likely that no move for 2-operand-LIR-form is necessary.
529 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
530 x->swap_operands();
531 }
532
533 ValueTag tag = x->type()->tag();
534 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
535 switch (tag) {
536 case floatTag:
537 case doubleTag: do_ArithmeticOp_FPU(x); return;
538 case longTag: do_ArithmeticOp_Long(x); return;
539 case intTag: do_ArithmeticOp_Int(x); return;
540 default:
541 ShouldNotReachHere();
542 }
543 }
544
545 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
546 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
547 // count must always be in rcx
548 LIRItem value(x->x(), this);
549 LIRItem count(x->y(), this);
550
551 ValueTag elemType = x->type()->tag();
552 bool must_load_count = !count.is_constant();
553 if (must_load_count) {
554 count.load_item();
555 } else {
556 count.dont_load_item();
557 }
558 value.load_item();
559 LIR_Opr reg = rlock_result(x);
560
561 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
562 }
563
564 // _iand, _land, _ior, _lor, _ixor, _lxor
565 void LIRGenerator::do_LogicOp(LogicOp* x) {
566 // IF an operand with use count 1 is the left operand, then it is
567 // likely that no move for 2-operand-LIR-form is necessary.
568 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
569 x->swap_operands();
570 }
571
572 LIRItem left(x->x(), this);
573 LIRItem right(x->y(), this);
574
575 left.load_item();
576 right.load_nonconstant(32);
577 LIR_Opr reg = rlock_result(x);
578
579 logic_op(x->op(), reg, left.result(), right.result());
580 }
581
582 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
583 void LIRGenerator::do_CompareOp(CompareOp* x) {
584 LIRItem left(x->x(), this);
585 LIRItem right(x->y(), this);
586 left.load_item();
587 right.load_item();
588 LIR_Opr reg = rlock_result(x);
589 if (x->x()->type()->is_float_kind()) {
590 Bytecodes::Code code = x->op();
591 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
592 } else if (x->x()->type()->tag() == longTag) {
593 __ lcmp2int(left.result(), right.result(), reg);
594 } else {
595 ShouldNotReachHere();
596 }
597 }
598
599 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
600 LIR_Opr t1 = LIR_OprFact::illegalOpr;
601 LIR_Opr t2 = LIR_OprFact::illegalOpr;
602 cmp_value.load_item();
603 new_value.load_item();
604 if (type == T_OBJECT) {
605 if (UseCompressedOops) {
606 t1 = new_register(T_OBJECT);
607 t2 = new_register(T_OBJECT);
608 }
609 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
610 } else if (type == T_INT) {
611 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
612 } else if (type == T_LONG) {
613 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
614 } else {
615 ShouldNotReachHere();
616 }
617 // Generate conditional move of boolean result.
618 LIR_Opr result = new_register(T_INT);
619 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
620 result, type);
621 return result;
622 }
623
624 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
625 Unimplemented(); // Currently not supported on this platform.
626 return LIR_OprFact::illegalOpr;
627 }
628
629 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
630 LIR_Opr result = new_register(type);
631 value.load_item();
632 __ xadd(addr, value.result(), result, LIR_OprFact::illegalOpr);
633 return result;
634 }
635
636 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
637 switch (x->id()) {
638 case vmIntrinsics::_dabs:
639 case vmIntrinsics::_dsqrt:
640 case vmIntrinsics::_dsqrt_strict: {
641 assert(x->number_of_arguments() == 1, "wrong type");
642 LIRItem value(x->argument_at(0), this);
643 value.load_item();
644 LIR_Opr dst = rlock_result(x);
645
646 switch (x->id()) {
647 case vmIntrinsics::_dsqrt:
648 case vmIntrinsics::_dsqrt_strict: {
649 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
650 break;
651 }
652 case vmIntrinsics::_dabs: {
653 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
654 break;
655 }
656 default:
657 ShouldNotReachHere();
658 }
659 break;
660 }
661 case vmIntrinsics::_dsin: // fall through
662 case vmIntrinsics::_dcos: // fall through
663 case vmIntrinsics::_dtan: // fall through
664 case vmIntrinsics::_dlog: // fall through
665 case vmIntrinsics::_dlog10: // fall through
666 case vmIntrinsics::_dexp: {
667 assert(x->number_of_arguments() == 1, "wrong type");
668
669 address runtime_entry = nullptr;
670 switch (x->id()) {
671 case vmIntrinsics::_dsin:
672 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
673 break;
674 case vmIntrinsics::_dcos:
675 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
676 break;
677 case vmIntrinsics::_dtan:
678 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
679 break;
680 case vmIntrinsics::_dlog:
681 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
682 break;
683 case vmIntrinsics::_dlog10:
684 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
685 break;
686 case vmIntrinsics::_dexp:
687 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
688 break;
689 default:
690 ShouldNotReachHere();
691 }
692
693 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), nullptr);
694 set_result(x, result);
695 break;
696 }
697 case vmIntrinsics::_dpow: {
698 assert(x->number_of_arguments() == 2, "wrong type");
699 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
700 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), nullptr);
701 set_result(x, result);
702 break;
703 }
704 default:
705 break;
706 }
707 }
708
709 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
710 assert(x->number_of_arguments() == 5, "wrong type");
711
712 // Copy stubs possibly call C code, e.g. G1 barriers, so we need to reserve room
713 // for the C ABI (see frame::z_abi_160).
714 BasicTypeArray sig; // Empty signature is precise enough.
715 frame_map()->c_calling_convention(&sig);
716
717 // Make all state_for calls early since they can emit code.
718 CodeEmitInfo* info = nullptr;
719 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
720 info = state_for(x, x->state_before());
721 info->set_force_reexecute();
722 } else {
723 info = state_for(x, x->state());
724 }
725
726 LIRItem src(x->argument_at(0), this);
727 LIRItem src_pos(x->argument_at(1), this);
728 LIRItem dst(x->argument_at(2), this);
729 LIRItem dst_pos(x->argument_at(3), this);
730 LIRItem length(x->argument_at(4), this);
731
732 // Operands for arraycopy must use fixed registers, otherwise
733 // LinearScan will fail allocation (because arraycopy always needs a
734 // call).
735
736 src.load_item_force (FrameMap::as_oop_opr(Z_ARG1));
737 src_pos.load_item_force (FrameMap::as_opr(Z_ARG2));
738 dst.load_item_force (FrameMap::as_oop_opr(Z_ARG3));
739 dst_pos.load_item_force (FrameMap::as_opr(Z_ARG4));
740 length.load_item_force (FrameMap::as_opr(Z_ARG5));
741
742 LIR_Opr tmp = FrameMap::as_opr(Z_R7);
743
744 set_no_result(x);
745
746 int flags;
747 ciArrayKlass* expected_type;
748 arraycopy_helper(x, &flags, &expected_type);
749 if (x->check_flag(Instruction::OmitChecksFlag)) {
750 flags = 0;
751 }
752
753 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
754 length.result(), tmp, expected_type, flags, info); // does add_safepoint
755 }
756
757 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
758 // _i2b, _i2c, _i2s
759 void LIRGenerator::do_Convert(Convert* x) {
760 LIRItem value(x->value(), this);
761
762 value.load_item();
763 LIR_Opr reg = rlock_result(x);
764 __ convert(x->op(), value.result(), reg);
765 }
766
767 void LIRGenerator::do_NewInstance(NewInstance* x) {
768 print_if_not_loaded(x);
769
770 // This instruction can be deoptimized in the slow path : use
771 // Z_R2 as result register.
772 const LIR_Opr reg = result_register_for (x->type());
773
774 CodeEmitInfo* info = state_for (x, x->state());
775 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
776 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
777 LIR_Opr tmp3 = reg;
778 LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
779 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
780 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
781 LIR_Opr result = rlock_result(x);
782 __ move(reg, result);
783 }
784
785 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
786 CodeEmitInfo* info = nullptr;
787 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
788 info = state_for(x, x->state_before());
789 info->set_force_reexecute();
790 } else {
791 info = state_for(x, x->state());
792 }
793
794 LIRItem length(x->length(), this);
795 length.load_item();
796
797 LIR_Opr reg = result_register_for (x->type());
798 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
799 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
800 LIR_Opr tmp3 = reg;
801 LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
802 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
803 LIR_Opr len = length.result();
804 BasicType elem_type = x->elt_type();
805
806 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
807
808 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
809 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type,
810 klass_reg, slow_path, x->zero_array());
811
812 LIR_Opr result = rlock_result(x);
813 __ move(reg, result);
814 }
815
816 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
817 // Evaluate state_for early since it may emit code.
818 CodeEmitInfo* info = state_for (x, x->state());
819 // In case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
820 // and therefore provide the state before the parameters have been consumed.
821 CodeEmitInfo* patching_info = nullptr;
822 if (!x->klass()->is_loaded() || PatchALot) {
823 patching_info = state_for (x, x->state_before());
824 }
825
826 LIRItem length(x->length(), this);
827 length.load_item();
828
829 const LIR_Opr reg = result_register_for (x->type());
830 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr;
831 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr;
832 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
833 LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
834 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr;
835 LIR_Opr len = length.result();
836
837 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
838 ciKlass* obj = ciObjArrayKlass::make(x->klass());
839 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
840 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
841 }
842 klass2reg_with_patching(klass_reg, obj, patching_info);
843 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
844
845 LIR_Opr result = rlock_result(x);
846 __ move(reg, result);
847 }
848
849 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
850 Values* dims = x->dims();
851 int i = dims->length();
852 LIRItemList* items = new LIRItemList(i, i, nullptr);
853 while (i-- > 0) {
854 LIRItem* size = new LIRItem(dims->at(i), this);
855 items->at_put(i, size);
856 }
857
858 // Evaluate state_for early since it may emit code.
859 CodeEmitInfo* patching_info = nullptr;
860 if (!x->klass()->is_loaded() || PatchALot) {
861 patching_info = state_for (x, x->state_before());
862
863 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
864 // clone all handlers (NOTE: Usually this is handled transparently
865 // by the CodeEmitInfo cloning logic in CodeStub constructors but
866 // is done explicitly here because a stub isn't being used).
867 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
868 }
869 CodeEmitInfo* info = state_for (x, x->state());
870
871 i = dims->length();
872 while (--i >= 0) {
873 LIRItem* size = items->at(i);
874 size->load_nonconstant(32);
875 // FrameMap::_reserved_argument_area_size includes the dimensions varargs, because
876 // it's initialized to hir()->max_stack() when the FrameMap is created.
877 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
878 }
879
880 LIR_Opr klass_reg = FrameMap::Z_R3_metadata_opr;
881 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
882
883 LIR_Opr rank = FrameMap::Z_R4_opr;
884 __ move(LIR_OprFact::intConst(x->rank()), rank);
885 LIR_Opr varargs = FrameMap::Z_R5_opr;
886 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::Z_SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
887 varargs);
888 LIR_OprList* args = new LIR_OprList(3);
889 args->append(klass_reg);
890 args->append(rank);
891 args->append(varargs);
892 LIR_Opr reg = result_register_for (x->type());
893 __ call_runtime(Runtime1::entry_for (StubId::c1_new_multi_array_id),
894 LIR_OprFact::illegalOpr,
895 reg, args, info);
896
897 LIR_Opr result = rlock_result(x);
898 __ move(reg, result);
899 }
900
901 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
902 // Nothing to do.
903 }
904
905 void LIRGenerator::do_CheckCast(CheckCast* x) {
906 LIRItem obj(x->obj(), this);
907
908 CodeEmitInfo* patching_info = nullptr;
909 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
910 // Must do this before locking the destination register as an oop register,
911 // and before the obj is loaded (the latter is for deoptimization).
912 patching_info = state_for (x, x->state_before());
913 }
914 obj.load_item();
915
916 // info for exceptions
917 CodeEmitInfo* info_for_exception =
918 (x->needs_exception_state() ? state_for(x) :
919 state_for(x, x->state_before(), true /*ignore_xhandler*/));
920
921 CodeStub* stub;
922 if (x->is_incompatible_class_change_check()) {
923 assert(patching_info == nullptr, "can't patch this");
924 stub = new SimpleExceptionStub(StubId::c1_throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
925 } else if (x->is_invokespecial_receiver_check()) {
926 assert(patching_info == nullptr, "can't patch this");
927 stub = new DeoptimizeStub(info_for_exception,
928 Deoptimization::Reason_class_check,
929 Deoptimization::Action_none);
930 } else {
931 stub = new SimpleExceptionStub(StubId::c1_throw_class_cast_exception_id, obj.result(), info_for_exception);
932 }
933 LIR_Opr reg = rlock_result(x);
934 LIR_Opr tmp1 = new_register(objectType);
935 LIR_Opr tmp2 = new_register(objectType);
936 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
937 __ checkcast(reg, obj.result(), x->klass(),
938 tmp1, tmp2, tmp3,
939 x->direct_compare(), info_for_exception, patching_info, stub,
940 x->profiled_method(), x->profiled_bci());
941 }
942
943
944 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
945 LIRItem obj(x->obj(), this);
946 CodeEmitInfo* patching_info = nullptr;
947 if (!x->klass()->is_loaded() || PatchALot) {
948 patching_info = state_for (x, x->state_before());
949 }
950 // Ensure the result register is not the input register because the
951 // result is initialized before the patching safepoint.
952 obj.load_item();
953 LIR_Opr out_reg = rlock_result(x);
954 LIR_Opr tmp1 = new_register(objectType);
955 LIR_Opr tmp2 = new_register(objectType);
956 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
957 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
958 x->direct_compare(), patching_info,
959 x->profiled_method(), x->profiled_bci());
960 }
961
962 // Intrinsic for Class::isInstance
963 address LIRGenerator::isInstance_entry() {
964 return Runtime1::entry_for(StubId::c1_is_instance_of_id);
965 }
966
967
968 void LIRGenerator::do_If (If* x) {
969 assert(x->number_of_sux() == 2, "inconsistency");
970 ValueTag tag = x->x()->type()->tag();
971 bool is_safepoint = x->is_safepoint();
972
973 If::Condition cond = x->cond();
974
975 LIRItem xitem(x->x(), this);
976 LIRItem yitem(x->y(), this);
977 LIRItem* xin = &xitem;
978 LIRItem* yin = &yitem;
979
980 if (tag == longTag) {
981 // For longs, only conditions "eql", "neq", "lss", "geq" are valid;
982 // mirror for other conditions.
983 if (cond == If::gtr || cond == If::leq) {
984 cond = Instruction::mirror(cond);
985 xin = &yitem;
986 yin = &xitem;
987 }
988 xin->set_destroys_register();
989 }
990 xin->load_item();
991 // TODO: don't load long constants != 0L
992 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
993 // inline long zero
994 yin->dont_load_item();
995 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
996 // Longs cannot handle constants at right side.
997 yin->load_item();
998 } else {
999 yin->dont_load_item();
1000 }
1001
1002 LIR_Opr left = xin->result();
1003 LIR_Opr right = yin->result();
1004
1005 set_no_result(x);
1006
1007 // Add safepoint before generating condition code so it can be recomputed.
1008 if (x->is_safepoint()) {
1009 // Increment backedge counter if needed.
1010 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1011 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1012 // Use safepoint_poll_register() instead of LIR_OprFact::illegalOpr.
1013 __ safepoint(safepoint_poll_register(), state_for (x, x->state_before()));
1014 }
1015
1016 __ cmp(lir_cond(cond), left, right);
1017 // Generate branch profiling. Profiling code doesn't kill flags.
1018 profile_branch(x, cond);
1019 move_to_phi(x->state());
1020 if (x->x()->type()->is_float_kind()) {
1021 __ branch(lir_cond(cond), x->tsux(), x->usux());
1022 } else {
1023 __ branch(lir_cond(cond), x->tsux());
1024 }
1025 assert(x->default_sux() == x->fsux(), "wrong destination above");
1026 __ jump(x->default_sux());
1027 }
1028
1029 LIR_Opr LIRGenerator::getThreadPointer() {
1030 return FrameMap::as_pointer_opr(Z_thread);
1031 }
1032
1033 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1034 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::Z_R2_opr);
1035 LIR_OprList* args = new LIR_OprList(1);
1036 args->append(FrameMap::Z_R2_opr);
1037 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1038 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1039 }
1040
1041 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1042 CodeEmitInfo* info) {
1043 __ store(value, address, info);
1044 }
1045
1046 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1047 CodeEmitInfo* info) {
1048 __ load(address, result, info);
1049 __ membar_acquire();
1050 }
1051
1052 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1053 assert(UseCRC32Intrinsics, "or should not be here");
1054 LIR_Opr result = rlock_result(x);
1055
1056 switch (x->id()) {
1057 case vmIntrinsics::_updateCRC32: {
1058 LIRItem crc(x->argument_at(0), this);
1059 LIRItem val(x->argument_at(1), this);
1060 // Registers destroyed by update_crc32.
1061 crc.set_destroys_register();
1062 val.set_destroys_register();
1063 crc.load_item();
1064 val.load_item();
1065 __ update_crc32(crc.result(), val.result(), result);
1066 break;
1067 }
1068 case vmIntrinsics::_updateBytesCRC32:
1069 case vmIntrinsics::_updateByteBufferCRC32: {
1070 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1071
1072 LIRItem crc(x->argument_at(0), this);
1073 LIRItem buf(x->argument_at(1), this);
1074 LIRItem off(x->argument_at(2), this);
1075 LIRItem len(x->argument_at(3), this);
1076 buf.load_item();
1077 off.load_nonconstant();
1078
1079 LIR_Opr index = off.result();
1080 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1081 if (off.result()->is_constant()) {
1082 index = LIR_OprFact::illegalOpr;
1083 offset += off.result()->as_jint();
1084 }
1085 LIR_Opr base_op = buf.result();
1086
1087 if (index->is_valid()) {
1088 LIR_Opr tmp = new_register(T_LONG);
1089 __ convert(Bytecodes::_i2l, index, tmp);
1090 index = tmp;
1091 }
1092
1093 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1094
1095 BasicTypeList signature(3);
1096 signature.append(T_INT);
1097 signature.append(T_ADDRESS);
1098 signature.append(T_INT);
1099 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1100 const LIR_Opr result_reg = result_register_for (x->type());
1101
1102 LIR_Opr arg1 = cc->at(0);
1103 LIR_Opr arg2 = cc->at(1);
1104 LIR_Opr arg3 = cc->at(2);
1105
1106 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1107 __ leal(LIR_OprFact::address(a), arg2);
1108 len.load_item_force(arg3); // We skip int->long conversion here, because CRC32 stub expects int.
1109
1110 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1111 __ move(result_reg, result);
1112 break;
1113 }
1114 default: {
1115 ShouldNotReachHere();
1116 }
1117 }
1118 }
1119
1120 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1121 assert(UseCRC32CIntrinsics, "or should not be here");
1122 LIR_Opr result = rlock_result(x);
1123
1124 switch (x->id()) {
1125 case vmIntrinsics::_updateBytesCRC32C:
1126 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1127 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1128
1129 LIRItem crc(x->argument_at(0), this);
1130 LIRItem buf(x->argument_at(1), this);
1131 LIRItem off(x->argument_at(2), this);
1132 LIRItem end(x->argument_at(3), this);
1133 buf.load_item();
1134 off.load_nonconstant();
1135 end.load_nonconstant();
1136
1137 // len = end - off
1138 LIR_Opr len = end.result();
1139 LIR_Opr tmpA = new_register(T_INT);
1140 LIR_Opr tmpB = new_register(T_INT);
1141 __ move(end.result(), tmpA);
1142 __ move(off.result(), tmpB);
1143 __ sub(tmpA, tmpB, tmpA);
1144 len = tmpA;
1145
1146 LIR_Opr index = off.result();
1147 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1148 if (off.result()->is_constant()) {
1149 index = LIR_OprFact::illegalOpr;
1150 offset += off.result()->as_jint();
1151 }
1152 LIR_Opr base_op = buf.result();
1153
1154 if (index->is_valid()) {
1155 LIR_Opr tmp = new_register(T_LONG);
1156 __ convert(Bytecodes::_i2l, index, tmp);
1157 index = tmp;
1158 }
1159
1160 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE);
1161
1162 BasicTypeList signature(3);
1163 signature.append(T_INT);
1164 signature.append(T_ADDRESS);
1165 signature.append(T_INT);
1166 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1167 const LIR_Opr result_reg = result_register_for (x->type());
1168
1169 LIR_Opr arg1 = cc->at(0);
1170 LIR_Opr arg2 = cc->at(1);
1171 LIR_Opr arg3 = cc->at(2);
1172
1173 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1174 __ leal(LIR_OprFact::address(a), arg2);
1175 __ move(len, cc->at(2)); // We skip int->long conversion here, because CRC32C stub expects int.
1176
1177 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1178 __ move(result_reg, result);
1179 break;
1180 }
1181 default: {
1182 ShouldNotReachHere();
1183 }
1184 }
1185 }
1186
1187 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1188 assert(x->number_of_arguments() == 3, "wrong type");
1189 assert(UseFMA, "Needs FMA instructions support.");
1190 LIRItem value(x->argument_at(0), this);
1191 LIRItem value1(x->argument_at(1), this);
1192 LIRItem value2(x->argument_at(2), this);
1193
1194 value2.set_destroys_register();
1195
1196 value.load_item();
1197 value1.load_item();
1198 value2.load_item();
1199
1200 LIR_Opr calc_input = value.result();
1201 LIR_Opr calc_input1 = value1.result();
1202 LIR_Opr calc_input2 = value2.result();
1203 LIR_Opr calc_result = rlock_result(x);
1204
1205 switch (x->id()) {
1206 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1207 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1208 default: ShouldNotReachHere();
1209 }
1210 }
1211
1212 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1213 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1214 }