diff a/src/hotspot/cpu/s390/sharedRuntime_s390.cpp b/src/hotspot/cpu/s390/sharedRuntime_s390.cpp --- a/src/hotspot/cpu/s390/sharedRuntime_s390.cpp +++ b/src/hotspot/cpu/s390/sharedRuntime_s390.cpp @@ -2090,13 +2090,12 @@ return nm; } static address gen_c2i_adapter(MacroAssembler *masm, - int total_args_passed, int comp_args_on_stack, - const BasicType *sig_bt, + const GrowableArray* sig, const VMRegPair *regs, Label &skip_fixup) { // Before we get into the guts of the C2I adapter, see if we should be here // at all. We've come from compiled code and are attempting to jump to the // interpreter, which means the caller made a static call to get here @@ -2121,11 +2120,11 @@ __ bind(skip_fixup); // Return point from patch_callsite. // Since all args are passed on the stack, total_args_passed*wordSize is the // space we need. We need ABI scratch area but we use the caller's since // it has already been allocated. - + int total_args_passed = sig->length(); const int abi_scratch = frame::z_top_ijava_frame_abi_size; int extraspace = align_up(total_args_passed, 2)*wordSize + abi_scratch; Register sender_SP = Z_R10; Register value = Z_R12; @@ -2142,10 +2141,12 @@ int st_off = extraspace - wordSize; // Now write the args into the outgoing interpreter space. for (int i = 0; i < total_args_passed; i++) { + BasicType bt = sig->at(i)._bt; + VMReg r_1 = regs[i].first(); VMReg r_2 = regs[i].second(); if (!r_1->is_valid()) { assert(!r_2->is_valid(), ""); continue; @@ -2158,11 +2159,11 @@ if (!r_2->is_valid()) { __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*)); } else { // longs are given 2 64-bit slots in the interpreter, // but the data is passed in only 1 slot. - if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { + if (bt == T_LONG || bt == T_DOUBLE) { #ifdef ASSERT __ clear_mem(Address(Z_SP, st_off), sizeof(void *)); #endif st_off -= wordSize; } @@ -2173,11 +2174,11 @@ if (!r_2->is_valid()) { __ z_st(r_1->as_Register(), st_off, Z_SP); } else { // longs are given 2 64-bit slots in the interpreter, but the // data is passed in only 1 slot. - if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { + if (bt == T_LONG || bt == T_DOUBLE) { #ifdef ASSERT __ clear_mem(Address(Z_SP, st_off), sizeof(void *)); #endif st_off -= wordSize; } @@ -2238,16 +2239,16 @@ // Z_method r9 - callee's method (method to be invoked) // Z_esp r7 - operand (or expression) stack pointer of caller. one slot above last arg. // Z_SP r15 - SP prepared by call stub such that caller's outgoing args are near top // void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, - int total_args_passed, int comp_args_on_stack, - const BasicType *sig_bt, + const GrowableArray* sig, const VMRegPair *regs) { const Register value = Z_R12; const Register ld_ptr= Z_esp; + int total_args_passed = sig->length(); int ld_offset = total_args_passed * wordSize; // Cut-out for having no stack args. if (comp_args_on_stack) { @@ -2263,12 +2264,13 @@ } // Now generate the shuffle code. Pick up all register args and move the // rest through register value=Z_R12. for (int i = 0; i < total_args_passed; i++) { - if (sig_bt[i] == T_VOID) { - assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); + BasicType bt = sig->at(i)._bt; + if (bt == T_VOID) { + assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half"); continue; } // Pick up 0, 1 or 2 words from ld_ptr. assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), @@ -2296,27 +2298,27 @@ if (!r_2->is_valid()) { __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*)); } else { // In 64bit, longs are given 2 64-bit slots in the interpreter, but the // data is passed in only 1 slot. - if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { + if (bt == T_LONG || bt == T_DOUBLE) { ld_offset -= wordSize; } __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*)); } } else { if (!r_2->is_valid()) { // Not sure we need to do this but it shouldn't hurt. - if (is_reference_type(sig_bt[i]) || sig_bt[i] == T_ADDRESS) { + if (is_reference_type(bt) || bt == T_ADDRESS) { __ z_lg(r_1->as_Register(), ld_offset, ld_ptr); } else { __ z_l(r_1->as_Register(), ld_offset, ld_ptr); } } else { // In 64bit, longs are given 2 64-bit slots in the interpreter, but the // data is passed in only 1 slot. - if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { + if (bt == T_LONG || bt == T_DOUBLE) { ld_offset -= wordSize; } __ z_lg(r_1->as_Register(), ld_offset, ld_ptr); } } @@ -2341,19 +2343,24 @@ __ z_stg(Z_method, thread_(callee_target)); __ z_br(Z_R1_scratch); } -void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, - int total_args_passed, +void SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm, int comp_args_on_stack, - const BasicType *sig_bt, - const VMRegPair *regs, - address entry_address[AdapterBlob::ENTRY_COUNT]) { + const GrowableArray* sig, + const VMRegPair* regs, + const GrowableArray* sig_cc, + const VMRegPair* regs_cc, + const GrowableArray* sig_cc_ro, + const VMRegPair* regs_cc_ro, + address entry_address[AdapterBlob::ENTRY_COUNT], + AdapterBlob*& new_adapter, + bool allocate_code_blob) { __ align(CodeEntryAlignment); entry_address[AdapterBlob::I2C] = __ pc(); - gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); + gen_i2c_adapter(masm, comp_args_on_stack, sig, regs); Label skip_fixup; { Label ic_miss; @@ -2394,11 +2401,11 @@ __ z_br(klass); __ bind(L_skip_barrier); entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc(); - gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); + gen_c2i_adapter(masm, comp_args_on_stack, sig, regs, skip_fixup); return; } // This function returns the adjust size (in number of words) to a c2i adapter // activation for use during deoptimization. @@ -3405,5 +3412,18 @@ Unimplemented(); return nullptr; } #endif // INCLUDE_JFR + +const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j; +const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j; + +int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) { + Unimplemented(); + return 0; +} + +BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) { + Unimplemented(); + return nullptr; +}