2068 __ flush();
2069 //////////////////////////////////////////////////////////////////////
2070 // end of code generation
2071 //////////////////////////////////////////////////////////////////////
2072
2073
2074 nmethod *nm = nmethod::new_native_nmethod(method,
2075 compile_id,
2076 masm->code(),
2077 (int)(wrapper_VEPStart-wrapper_CodeStart),
2078 (int)(wrapper_FrameDone-wrapper_CodeStart),
2079 stack_slots / VMRegImpl::slots_per_word,
2080 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2081 in_ByteSize(lock_offset),
2082 oop_maps);
2083
2084 return nm;
2085 }
2086
2087 static address gen_c2i_adapter(MacroAssembler *masm,
2088 int total_args_passed,
2089 int comp_args_on_stack,
2090 const BasicType *sig_bt,
2091 const VMRegPair *regs,
2092 Label &skip_fixup) {
2093 // Before we get into the guts of the C2I adapter, see if we should be here
2094 // at all. We've come from compiled code and are attempting to jump to the
2095 // interpreter, which means the caller made a static call to get here
2096 // (vcalls always get a compiled target if there is one). Check for a
2097 // compiled target. If there is one, we need to patch the caller's call.
2098
2099 // These two defs MUST MATCH code in gen_i2c2i_adapter!
2100 const Register ientry = Z_R11;
2101 const Register code = Z_R11;
2102
2103 address c2i_entrypoint;
2104 Label patch_callsite;
2105
2106 // Regular (verified) c2i entry point.
2107 c2i_entrypoint = __ pc();
2108
2109 // Call patching needed?
2110 __ load_and_test_long(Z_R0_scratch, method_(code));
2111 __ z_lg(ientry, method_(interpreter_entry)); // Preload interpreter entry (also if patching).
2112 __ z_brne(patch_callsite); // Patch required if code isn't null (compiled target exists).
2113
2114 __ bind(skip_fixup); // Return point from patch_callsite.
2115
2116 // Since all args are passed on the stack, total_args_passed*wordSize is the
2117 // space we need. We need ABI scratch area but we use the caller's since
2118 // it has already been allocated.
2119
2120 const int abi_scratch = frame::z_top_ijava_frame_abi_size;
2121 int extraspace = align_up(total_args_passed, 2)*wordSize + abi_scratch;
2122 Register sender_SP = Z_R10;
2123 Register value = Z_R12;
2124
2125 // Remember the senderSP so we can pop the interpreter arguments off of the stack.
2126 // In addition, template interpreter expects initial_caller_sp in Z_R10.
2127 __ z_lgr(sender_SP, Z_SP);
2128
2129 // This should always fit in 14 bit immediate.
2130 __ resize_frame(-extraspace, Z_R0_scratch);
2131
2132 // We use the caller's ABI scratch area (out_preserved_stack_slots) for the initial
2133 // args. This essentially moves the callers ABI scratch area from the top to the
2134 // bottom of the arg area.
2135
2136 int st_off = extraspace - wordSize;
2137
2138 // Now write the args into the outgoing interpreter space.
2139 for (int i = 0; i < total_args_passed; i++) {
2140 VMReg r_1 = regs[i].first();
2141 VMReg r_2 = regs[i].second();
2142 if (!r_1->is_valid()) {
2143 assert(!r_2->is_valid(), "");
2144 continue;
2145 }
2146 if (r_1->is_stack()) {
2147 // The calling convention produces OptoRegs that ignore the preserve area (abi scratch).
2148 // We must account for it here.
2149 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
2150
2151 if (!r_2->is_valid()) {
2152 __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*));
2153 } else {
2154 // longs are given 2 64-bit slots in the interpreter,
2155 // but the data is passed in only 1 slot.
2156 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2157 #ifdef ASSERT
2158 __ clear_mem(Address(Z_SP, st_off), sizeof(void *));
2159 #endif
2160 st_off -= wordSize;
2161 }
2162 __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*));
2163 }
2164 } else {
2165 if (r_1->is_Register()) {
2166 if (!r_2->is_valid()) {
2167 __ z_st(r_1->as_Register(), st_off, Z_SP);
2168 } else {
2169 // longs are given 2 64-bit slots in the interpreter, but the
2170 // data is passed in only 1 slot.
2171 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2172 #ifdef ASSERT
2173 __ clear_mem(Address(Z_SP, st_off), sizeof(void *));
2174 #endif
2175 st_off -= wordSize;
2176 }
2177 __ z_stg(r_1->as_Register(), st_off, Z_SP);
2178 }
2179 } else {
2180 assert(r_1->is_FloatRegister(), "");
2181 if (!r_2->is_valid()) {
2182 __ z_ste(r_1->as_FloatRegister(), st_off, Z_SP);
2183 } else {
2184 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
2185 // data is passed in only 1 slot.
2186 // One of these should get known junk...
2187 #ifdef ASSERT
2188 __ z_lzdr(Z_F1);
2189 __ z_std(Z_F1, st_off, Z_SP);
2190 #endif
2191 st_off-=wordSize;
2216 __ bind(patch_callsite);
2217
2218 RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers);
2219 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), Z_method, Z_R14);
2220 RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers);
2221 __ z_bru(skip_fixup);
2222
2223 // end of out-of-line code
2224
2225 return c2i_entrypoint;
2226 }
2227
2228 // On entry, the following registers are set
2229 //
2230 // Z_thread r8 - JavaThread*
2231 // Z_method r9 - callee's method (method to be invoked)
2232 // Z_esp r7 - operand (or expression) stack pointer of caller. one slot above last arg.
2233 // Z_SP r15 - SP prepared by call stub such that caller's outgoing args are near top
2234 //
2235 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
2236 int total_args_passed,
2237 int comp_args_on_stack,
2238 const BasicType *sig_bt,
2239 const VMRegPair *regs) {
2240 const Register value = Z_R12;
2241 const Register ld_ptr= Z_esp;
2242
2243 int ld_offset = total_args_passed * wordSize;
2244
2245 // Cut-out for having no stack args.
2246 if (comp_args_on_stack) {
2247 // Sig words on the stack are greater than VMRegImpl::stack0. Those in
2248 // registers are below. By subtracting stack0, we either get a negative
2249 // number (all values in registers) or the maximum stack slot accessed.
2250 // Convert VMRegImpl (4 byte) stack slots to words.
2251 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
2252 // Round up to miminum stack alignment, in wordSize
2253 comp_words_on_stack = align_up(comp_words_on_stack, 2);
2254
2255 __ resize_frame(-comp_words_on_stack*wordSize, Z_R0_scratch);
2256 }
2257
2258 // Now generate the shuffle code. Pick up all register args and move the
2259 // rest through register value=Z_R12.
2260 for (int i = 0; i < total_args_passed; i++) {
2261 if (sig_bt[i] == T_VOID) {
2262 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
2263 continue;
2264 }
2265
2266 // Pick up 0, 1 or 2 words from ld_ptr.
2267 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
2268 "scrambled load targets?");
2269 VMReg r_1 = regs[i].first();
2270 VMReg r_2 = regs[i].second();
2271 if (!r_1->is_valid()) {
2272 assert(!r_2->is_valid(), "");
2273 continue;
2274 }
2275 if (r_1->is_FloatRegister()) {
2276 if (!r_2->is_valid()) {
2277 __ z_le(r_1->as_FloatRegister(), ld_offset, ld_ptr);
2278 ld_offset-=wordSize;
2279 } else {
2280 // Skip the unused interpreter slot.
2281 __ z_ld(r_1->as_FloatRegister(), ld_offset - wordSize, ld_ptr);
2282 ld_offset -= 2 * wordSize;
2283 }
2284 } else {
2285 if (r_1->is_stack()) {
2286 // Must do a memory to memory move.
2287 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
2288
2289 if (!r_2->is_valid()) {
2290 __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*));
2291 } else {
2292 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
2293 // data is passed in only 1 slot.
2294 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2295 ld_offset -= wordSize;
2296 }
2297 __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*));
2298 }
2299 } else {
2300 if (!r_2->is_valid()) {
2301 // Not sure we need to do this but it shouldn't hurt.
2302 if (is_reference_type(sig_bt[i]) || sig_bt[i] == T_ADDRESS) {
2303 __ z_lg(r_1->as_Register(), ld_offset, ld_ptr);
2304 } else {
2305 __ z_l(r_1->as_Register(), ld_offset, ld_ptr);
2306 }
2307 } else {
2308 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
2309 // data is passed in only 1 slot.
2310 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
2311 ld_offset -= wordSize;
2312 }
2313 __ z_lg(r_1->as_Register(), ld_offset, ld_ptr);
2314 }
2315 }
2316 ld_offset -= wordSize;
2317 }
2318 }
2319
2320 // Jump to the compiled code just as if compiled code was doing it.
2321 // load target address from method:
2322 __ z_lg(Z_R1_scratch, Address(Z_method, Method::from_compiled_offset()));
2323
2324 // Store method into thread->callee_target.
2325 // 6243940: We might end up in handle_wrong_method if
2326 // the callee is deoptimized as we race thru here. If that
2327 // happens we don't want to take a safepoint because the
2328 // caller frame will look interpreted and arguments are now
2329 // "compiled" so it is much better to make this transition
2330 // invisible to the stack walking code. Unfortunately, if
2331 // we try and find the callee by normal means a safepoint
2332 // is possible. So we stash the desired callee in the thread
2333 // and the vm will find it there should this case occur.
2334 __ z_stg(Z_method, thread_(callee_target));
2335
2336 __ z_br(Z_R1_scratch);
2337 }
2338
2339 void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
2340 int total_args_passed,
2341 int comp_args_on_stack,
2342 const BasicType *sig_bt,
2343 const VMRegPair *regs,
2344 address entry_address[AdapterBlob::ENTRY_COUNT]) {
2345 __ align(CodeEntryAlignment);
2346 entry_address[AdapterBlob::I2C] = __ pc();
2347 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
2348
2349 Label skip_fixup;
2350 {
2351 Label ic_miss;
2352
2353 // Out-of-line call to ic_miss handler.
2354 __ call_ic_miss_handler(ic_miss, 0x11, 0, Z_R1_scratch);
2355
2356 // Unverified Entry Point UEP
2357 __ align(CodeEntryAlignment);
2358 entry_address[AdapterBlob::C2I_Unverified] = __ pc();
2359
2360 __ ic_check(2);
2361 __ z_lg(Z_method, Address(Z_inline_cache, CompiledICData::speculated_method_offset()));
2362 // This def MUST MATCH code in gen_c2i_adapter!
2363 const Register code = Z_R11;
2364
2365 __ load_and_test_long(Z_R0, method_(code));
2366 __ z_brne(ic_miss); // Cache miss: call runtime to handle this.
2367
2372
2373 // Class initialization barrier for static methods
2374 entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
2375 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
2376 Label L_skip_barrier;
2377
2378 // Bypass the barrier for non-static methods
2379 __ testbit_ushort(Address(Z_method, Method::access_flags_offset()), JVM_ACC_STATIC_BIT);
2380 __ z_bfalse(L_skip_barrier); // non-static
2381
2382 Register klass = Z_R11;
2383 __ load_method_holder(klass, Z_method);
2384 __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/);
2385
2386 __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub());
2387 __ z_br(klass);
2388
2389 __ bind(L_skip_barrier);
2390 entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc();
2391
2392 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
2393 return;
2394 }
2395
2396 // This function returns the adjust size (in number of words) to a c2i adapter
2397 // activation for use during deoptimization.
2398 //
2399 // Actually only compiled frames need to be adjusted, but it
2400 // doesn't harm to adjust entry and interpreter frames, too.
2401 //
2402 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2403 assert(callee_locals >= callee_parameters,
2404 "test and remove; got more parms than locals");
2405 // Handle the abi adjustment here instead of doing it in push_skeleton_frames.
2406 return (callee_locals - callee_parameters) * Interpreter::stackElementWords +
2407 frame::z_parent_ijava_frame_abi_size / BytesPerWord;
2408 }
2409
2410 uint SharedRuntime::in_preserve_stack_slots() {
2411 return frame::jit_in_preserve_size_in_4_byte_units;
2412 }
3383
3384 extern "C"
3385 int SpinPause() {
3386 return 0;
3387 }
3388
3389 #if INCLUDE_JFR
3390 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
3391 if (!Continuations::enabled()) return nullptr;
3392 Unimplemented();
3393 return nullptr;
3394 }
3395
3396 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
3397 if (!Continuations::enabled()) return nullptr;
3398 Unimplemented();
3399 return nullptr;
3400 }
3401
3402 #endif // INCLUDE_JFR
|
2068 __ flush();
2069 //////////////////////////////////////////////////////////////////////
2070 // end of code generation
2071 //////////////////////////////////////////////////////////////////////
2072
2073
2074 nmethod *nm = nmethod::new_native_nmethod(method,
2075 compile_id,
2076 masm->code(),
2077 (int)(wrapper_VEPStart-wrapper_CodeStart),
2078 (int)(wrapper_FrameDone-wrapper_CodeStart),
2079 stack_slots / VMRegImpl::slots_per_word,
2080 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2081 in_ByteSize(lock_offset),
2082 oop_maps);
2083
2084 return nm;
2085 }
2086
2087 static address gen_c2i_adapter(MacroAssembler *masm,
2088 int comp_args_on_stack,
2089 const GrowableArray<SigEntry>* sig,
2090 const VMRegPair *regs,
2091 Label &skip_fixup) {
2092 // Before we get into the guts of the C2I adapter, see if we should be here
2093 // at all. We've come from compiled code and are attempting to jump to the
2094 // interpreter, which means the caller made a static call to get here
2095 // (vcalls always get a compiled target if there is one). Check for a
2096 // compiled target. If there is one, we need to patch the caller's call.
2097
2098 // These two defs MUST MATCH code in gen_i2c2i_adapter!
2099 const Register ientry = Z_R11;
2100 const Register code = Z_R11;
2101
2102 address c2i_entrypoint;
2103 Label patch_callsite;
2104
2105 // Regular (verified) c2i entry point.
2106 c2i_entrypoint = __ pc();
2107
2108 // Call patching needed?
2109 __ load_and_test_long(Z_R0_scratch, method_(code));
2110 __ z_lg(ientry, method_(interpreter_entry)); // Preload interpreter entry (also if patching).
2111 __ z_brne(patch_callsite); // Patch required if code isn't null (compiled target exists).
2112
2113 __ bind(skip_fixup); // Return point from patch_callsite.
2114
2115 // Since all args are passed on the stack, total_args_passed*wordSize is the
2116 // space we need. We need ABI scratch area but we use the caller's since
2117 // it has already been allocated.
2118 int total_args_passed = sig->length();
2119 const int abi_scratch = frame::z_top_ijava_frame_abi_size;
2120 int extraspace = align_up(total_args_passed, 2)*wordSize + abi_scratch;
2121 Register sender_SP = Z_R10;
2122 Register value = Z_R12;
2123
2124 // Remember the senderSP so we can pop the interpreter arguments off of the stack.
2125 // In addition, template interpreter expects initial_caller_sp in Z_R10.
2126 __ z_lgr(sender_SP, Z_SP);
2127
2128 // This should always fit in 14 bit immediate.
2129 __ resize_frame(-extraspace, Z_R0_scratch);
2130
2131 // We use the caller's ABI scratch area (out_preserved_stack_slots) for the initial
2132 // args. This essentially moves the callers ABI scratch area from the top to the
2133 // bottom of the arg area.
2134
2135 int st_off = extraspace - wordSize;
2136
2137 // Now write the args into the outgoing interpreter space.
2138 for (int i = 0; i < total_args_passed; i++) {
2139 BasicType bt = sig->at(i)._bt;
2140
2141 VMReg r_1 = regs[i].first();
2142 VMReg r_2 = regs[i].second();
2143 if (!r_1->is_valid()) {
2144 assert(!r_2->is_valid(), "");
2145 continue;
2146 }
2147 if (r_1->is_stack()) {
2148 // The calling convention produces OptoRegs that ignore the preserve area (abi scratch).
2149 // We must account for it here.
2150 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
2151
2152 if (!r_2->is_valid()) {
2153 __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*));
2154 } else {
2155 // longs are given 2 64-bit slots in the interpreter,
2156 // but the data is passed in only 1 slot.
2157 if (bt == T_LONG || bt == T_DOUBLE) {
2158 #ifdef ASSERT
2159 __ clear_mem(Address(Z_SP, st_off), sizeof(void *));
2160 #endif
2161 st_off -= wordSize;
2162 }
2163 __ z_mvc(Address(Z_SP, st_off), Address(sender_SP, ld_off), sizeof(void*));
2164 }
2165 } else {
2166 if (r_1->is_Register()) {
2167 if (!r_2->is_valid()) {
2168 __ z_st(r_1->as_Register(), st_off, Z_SP);
2169 } else {
2170 // longs are given 2 64-bit slots in the interpreter, but the
2171 // data is passed in only 1 slot.
2172 if (bt == T_LONG || bt == T_DOUBLE) {
2173 #ifdef ASSERT
2174 __ clear_mem(Address(Z_SP, st_off), sizeof(void *));
2175 #endif
2176 st_off -= wordSize;
2177 }
2178 __ z_stg(r_1->as_Register(), st_off, Z_SP);
2179 }
2180 } else {
2181 assert(r_1->is_FloatRegister(), "");
2182 if (!r_2->is_valid()) {
2183 __ z_ste(r_1->as_FloatRegister(), st_off, Z_SP);
2184 } else {
2185 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
2186 // data is passed in only 1 slot.
2187 // One of these should get known junk...
2188 #ifdef ASSERT
2189 __ z_lzdr(Z_F1);
2190 __ z_std(Z_F1, st_off, Z_SP);
2191 #endif
2192 st_off-=wordSize;
2217 __ bind(patch_callsite);
2218
2219 RegisterSaver::save_live_registers(masm, RegisterSaver::arg_registers);
2220 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), Z_method, Z_R14);
2221 RegisterSaver::restore_live_registers(masm, RegisterSaver::arg_registers);
2222 __ z_bru(skip_fixup);
2223
2224 // end of out-of-line code
2225
2226 return c2i_entrypoint;
2227 }
2228
2229 // On entry, the following registers are set
2230 //
2231 // Z_thread r8 - JavaThread*
2232 // Z_method r9 - callee's method (method to be invoked)
2233 // Z_esp r7 - operand (or expression) stack pointer of caller. one slot above last arg.
2234 // Z_SP r15 - SP prepared by call stub such that caller's outgoing args are near top
2235 //
2236 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
2237 int comp_args_on_stack,
2238 const GrowableArray<SigEntry>* sig,
2239 const VMRegPair *regs) {
2240 const Register value = Z_R12;
2241 const Register ld_ptr= Z_esp;
2242 int total_args_passed = sig->length();
2243
2244 int ld_offset = total_args_passed * wordSize;
2245
2246 // Cut-out for having no stack args.
2247 if (comp_args_on_stack) {
2248 // Sig words on the stack are greater than VMRegImpl::stack0. Those in
2249 // registers are below. By subtracting stack0, we either get a negative
2250 // number (all values in registers) or the maximum stack slot accessed.
2251 // Convert VMRegImpl (4 byte) stack slots to words.
2252 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
2253 // Round up to miminum stack alignment, in wordSize
2254 comp_words_on_stack = align_up(comp_words_on_stack, 2);
2255
2256 __ resize_frame(-comp_words_on_stack*wordSize, Z_R0_scratch);
2257 }
2258
2259 // Now generate the shuffle code. Pick up all register args and move the
2260 // rest through register value=Z_R12.
2261 for (int i = 0; i < total_args_passed; i++) {
2262 BasicType bt = sig->at(i)._bt;
2263 if (bt == T_VOID) {
2264 assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half");
2265 continue;
2266 }
2267
2268 // Pick up 0, 1 or 2 words from ld_ptr.
2269 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
2270 "scrambled load targets?");
2271 VMReg r_1 = regs[i].first();
2272 VMReg r_2 = regs[i].second();
2273 if (!r_1->is_valid()) {
2274 assert(!r_2->is_valid(), "");
2275 continue;
2276 }
2277 if (r_1->is_FloatRegister()) {
2278 if (!r_2->is_valid()) {
2279 __ z_le(r_1->as_FloatRegister(), ld_offset, ld_ptr);
2280 ld_offset-=wordSize;
2281 } else {
2282 // Skip the unused interpreter slot.
2283 __ z_ld(r_1->as_FloatRegister(), ld_offset - wordSize, ld_ptr);
2284 ld_offset -= 2 * wordSize;
2285 }
2286 } else {
2287 if (r_1->is_stack()) {
2288 // Must do a memory to memory move.
2289 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
2290
2291 if (!r_2->is_valid()) {
2292 __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*));
2293 } else {
2294 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
2295 // data is passed in only 1 slot.
2296 if (bt == T_LONG || bt == T_DOUBLE) {
2297 ld_offset -= wordSize;
2298 }
2299 __ z_mvc(Address(Z_SP, st_off), Address(ld_ptr, ld_offset), sizeof(void*));
2300 }
2301 } else {
2302 if (!r_2->is_valid()) {
2303 // Not sure we need to do this but it shouldn't hurt.
2304 if (is_reference_type(bt) || bt == T_ADDRESS) {
2305 __ z_lg(r_1->as_Register(), ld_offset, ld_ptr);
2306 } else {
2307 __ z_l(r_1->as_Register(), ld_offset, ld_ptr);
2308 }
2309 } else {
2310 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
2311 // data is passed in only 1 slot.
2312 if (bt == T_LONG || bt == T_DOUBLE) {
2313 ld_offset -= wordSize;
2314 }
2315 __ z_lg(r_1->as_Register(), ld_offset, ld_ptr);
2316 }
2317 }
2318 ld_offset -= wordSize;
2319 }
2320 }
2321
2322 // Jump to the compiled code just as if compiled code was doing it.
2323 // load target address from method:
2324 __ z_lg(Z_R1_scratch, Address(Z_method, Method::from_compiled_offset()));
2325
2326 // Store method into thread->callee_target.
2327 // 6243940: We might end up in handle_wrong_method if
2328 // the callee is deoptimized as we race thru here. If that
2329 // happens we don't want to take a safepoint because the
2330 // caller frame will look interpreted and arguments are now
2331 // "compiled" so it is much better to make this transition
2332 // invisible to the stack walking code. Unfortunately, if
2333 // we try and find the callee by normal means a safepoint
2334 // is possible. So we stash the desired callee in the thread
2335 // and the vm will find it there should this case occur.
2336 __ z_stg(Z_method, thread_(callee_target));
2337
2338 __ z_br(Z_R1_scratch);
2339 }
2340
2341 void SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm,
2342 int comp_args_on_stack,
2343 const GrowableArray<SigEntry>* sig,
2344 const VMRegPair* regs,
2345 const GrowableArray<SigEntry>* sig_cc,
2346 const VMRegPair* regs_cc,
2347 const GrowableArray<SigEntry>* sig_cc_ro,
2348 const VMRegPair* regs_cc_ro,
2349 address entry_address[AdapterBlob::ENTRY_COUNT],
2350 AdapterBlob*& new_adapter,
2351 bool allocate_code_blob) {
2352 __ align(CodeEntryAlignment);
2353 entry_address[AdapterBlob::I2C] = __ pc();
2354 gen_i2c_adapter(masm, comp_args_on_stack, sig, regs);
2355
2356 Label skip_fixup;
2357 {
2358 Label ic_miss;
2359
2360 // Out-of-line call to ic_miss handler.
2361 __ call_ic_miss_handler(ic_miss, 0x11, 0, Z_R1_scratch);
2362
2363 // Unverified Entry Point UEP
2364 __ align(CodeEntryAlignment);
2365 entry_address[AdapterBlob::C2I_Unverified] = __ pc();
2366
2367 __ ic_check(2);
2368 __ z_lg(Z_method, Address(Z_inline_cache, CompiledICData::speculated_method_offset()));
2369 // This def MUST MATCH code in gen_c2i_adapter!
2370 const Register code = Z_R11;
2371
2372 __ load_and_test_long(Z_R0, method_(code));
2373 __ z_brne(ic_miss); // Cache miss: call runtime to handle this.
2374
2379
2380 // Class initialization barrier for static methods
2381 entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
2382 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
2383 Label L_skip_barrier;
2384
2385 // Bypass the barrier for non-static methods
2386 __ testbit_ushort(Address(Z_method, Method::access_flags_offset()), JVM_ACC_STATIC_BIT);
2387 __ z_bfalse(L_skip_barrier); // non-static
2388
2389 Register klass = Z_R11;
2390 __ load_method_holder(klass, Z_method);
2391 __ clinit_barrier(klass, Z_thread, &L_skip_barrier /*L_fast_path*/);
2392
2393 __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub());
2394 __ z_br(klass);
2395
2396 __ bind(L_skip_barrier);
2397 entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc();
2398
2399 gen_c2i_adapter(masm, comp_args_on_stack, sig, regs, skip_fixup);
2400 return;
2401 }
2402
2403 // This function returns the adjust size (in number of words) to a c2i adapter
2404 // activation for use during deoptimization.
2405 //
2406 // Actually only compiled frames need to be adjusted, but it
2407 // doesn't harm to adjust entry and interpreter frames, too.
2408 //
2409 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2410 assert(callee_locals >= callee_parameters,
2411 "test and remove; got more parms than locals");
2412 // Handle the abi adjustment here instead of doing it in push_skeleton_frames.
2413 return (callee_locals - callee_parameters) * Interpreter::stackElementWords +
2414 frame::z_parent_ijava_frame_abi_size / BytesPerWord;
2415 }
2416
2417 uint SharedRuntime::in_preserve_stack_slots() {
2418 return frame::jit_in_preserve_size_in_4_byte_units;
2419 }
3390
3391 extern "C"
3392 int SpinPause() {
3393 return 0;
3394 }
3395
3396 #if INCLUDE_JFR
3397 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
3398 if (!Continuations::enabled()) return nullptr;
3399 Unimplemented();
3400 return nullptr;
3401 }
3402
3403 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
3404 if (!Continuations::enabled()) return nullptr;
3405 Unimplemented();
3406 return nullptr;
3407 }
3408
3409 #endif // INCLUDE_JFR
3410
3411 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j;
3412 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j;
3413
3414 int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) {
3415 Unimplemented();
3416 return 0;
3417 }
3418
3419 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) {
3420 Unimplemented();
3421 return nullptr;
3422 }
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