1 /*
2 * Copyright (c) 1999, 2026, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "c1/c1_CodeStubs.hpp"
26 #include "c1/c1_FrameMap.hpp"
27 #include "c1/c1_LIRAssembler.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "c1/c1_Runtime1.hpp"
30 #include "classfile/javaClasses.hpp"
31 #include "nativeInst_x86.hpp"
32 #include "oops/objArrayKlass.hpp"
33 #include "runtime/sharedRuntime.hpp"
34 #include "utilities/align.hpp"
35 #include "utilities/macros.hpp"
36 #include "vmreg_x86.inline.hpp"
37
38
39 #define __ ce->masm()->
40
41 void C1SafepointPollStub::emit_code(LIR_Assembler* ce) {
42 __ bind(_entry);
43 InternalAddress safepoint_pc(ce->masm()->pc() - ce->masm()->offset() + safepoint_offset());
44 __ lea(rscratch1, safepoint_pc);
45 __ movptr(Address(r15_thread, JavaThread::saved_exception_pc_offset()), rscratch1);
46
47 assert(SharedRuntime::polling_page_return_handler_blob() != nullptr,
48 "polling page return stub not created yet");
49
50 address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point();
51 __ jump(RuntimeAddress(stub));
52 }
53
54 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
55 __ bind(_entry);
56 Metadata *m = _method->as_constant_ptr()->as_metadata();
57 ce->store_parameter(m, 1);
58 ce->store_parameter(_bci, 0);
59 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_counter_overflow_id)));
60 ce->add_call_info_here(_info);
61 ce->verify_oop_map(_info);
62 __ jmp(_continuation);
63 }
64
65 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
66 __ bind(_entry);
67 if (_info->deoptimize_on_exception()) {
68 address a = Runtime1::entry_for(StubId::c1_predicate_failed_trap_id);
69 __ call(RuntimeAddress(a));
70 ce->add_call_info_here(_info);
71 ce->verify_oop_map(_info);
72 DEBUG_ONLY(__ should_not_reach_here());
73 return;
74 }
75
76 // pass the array index on stack because all registers must be preserved
77 if (_index->is_cpu_register()) {
78 ce->store_parameter(_index->as_register(), 0);
79 } else {
80 ce->store_parameter(_index->as_jint(), 0);
81 }
82 StubId stub_id;
83 if (_throw_index_out_of_bounds_exception) {
84 stub_id = StubId::c1_throw_index_exception_id;
85 } else {
86 stub_id = StubId::c1_throw_range_check_failed_id;
87 ce->store_parameter(_array->as_pointer_register(), 1);
88 }
89 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
90 ce->add_call_info_here(_info);
91 ce->verify_oop_map(_info);
92 DEBUG_ONLY(__ should_not_reach_here());
93 }
94
95 PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) {
96 _info = new CodeEmitInfo(info);
97 }
98
99 void PredicateFailedStub::emit_code(LIR_Assembler* ce) {
100 __ bind(_entry);
101 address a = Runtime1::entry_for(StubId::c1_predicate_failed_trap_id);
102 __ call(RuntimeAddress(a));
103 ce->add_call_info_here(_info);
104 ce->verify_oop_map(_info);
105 DEBUG_ONLY(__ should_not_reach_here());
106 }
107
108 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
109 if (_offset != -1) {
110 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
111 }
112 __ bind(_entry);
113 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_throw_div0_exception_id)));
114 ce->add_call_info_here(_info);
115 DEBUG_ONLY(__ should_not_reach_here());
116 }
117
118
119 // Implementation of LoadFlattenedArrayStub
120
121 LoadFlattenedArrayStub::LoadFlattenedArrayStub(LIR_Opr array, LIR_Opr index, LIR_Opr result, CodeEmitInfo* info) {
122 _array = array;
123 _index = index;
124 _result = result;
125 // Tell the register allocator that the runtime call will scratch rax.
126 _scratch_reg = FrameMap::rax_oop_opr;
127 _info = new CodeEmitInfo(info);
128 }
129
130 void LoadFlattenedArrayStub::emit_code(LIR_Assembler* ce) {
131 assert(__ rsp_offset() == 0, "frame size should be fixed");
132 __ bind(_entry);
133 ce->store_parameter(_array->as_register(), 1);
134 ce->store_parameter(_index->as_register(), 0);
135 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_load_flat_array_id)));
136 ce->add_call_info_here(_info);
137 ce->verify_oop_map(_info);
138 if (_result->as_register() != rax) {
139 __ movptr(_result->as_register(), rax);
140 }
141 __ jmp(_continuation);
142 }
143
144
145 // Implementation of StoreFlattenedArrayStub
146
147 StoreFlattenedArrayStub::StoreFlattenedArrayStub(LIR_Opr array, LIR_Opr index, LIR_Opr value, CodeEmitInfo* info) {
148 _array = array;
149 _index = index;
150 _value = value;
151 // Tell the register allocator that the runtime call will scratch rax.
152 _scratch_reg = FrameMap::rax_oop_opr;
153 _info = new CodeEmitInfo(info);
154 }
155
156
157 void StoreFlattenedArrayStub::emit_code(LIR_Assembler* ce) {
158 assert(__ rsp_offset() == 0, "frame size should be fixed");
159 __ bind(_entry);
160 ce->store_parameter(_array->as_register(), 2);
161 ce->store_parameter(_index->as_register(), 1);
162 ce->store_parameter(_value->as_register(), 0);
163 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_store_flat_array_id)));
164 ce->add_call_info_here(_info);
165 ce->verify_oop_map(_info);
166 __ jmp(_continuation);
167 }
168
169
170 // Implementation of SubstitutabilityCheckStub
171
172 SubstitutabilityCheckStub::SubstitutabilityCheckStub(LIR_Opr left, LIR_Opr right, CodeEmitInfo* info) {
173 _left = left;
174 _right = right;
175 // Tell the register allocator that the runtime call will scratch rax.
176 _scratch_reg = FrameMap::rax_oop_opr;
177 _info = new CodeEmitInfo(info);
178 }
179
180 void SubstitutabilityCheckStub::emit_code(LIR_Assembler* ce) {
181 assert(__ rsp_offset() == 0, "frame size should be fixed");
182 __ bind(_entry);
183 ce->store_parameter(_left->as_register(), 1);
184 ce->store_parameter(_right->as_register(), 0);
185 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_substitutability_check_id)));
186 ce->add_call_info_here(_info);
187 ce->verify_oop_map(_info);
188 __ jmp(_continuation);
189 }
190
191
192 // Implementation of NewInstanceStub
193
194 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, StubId stub_id) {
195 _result = result;
196 _klass = klass;
197 _klass_reg = klass_reg;
198 _info = new CodeEmitInfo(info);
199 assert(stub_id == StubId::c1_new_instance_id ||
200 stub_id == StubId::c1_fast_new_instance_id ||
201 stub_id == StubId::c1_fast_new_instance_init_check_id,
202 "need new_instance id");
203 _stub_id = stub_id;
204 }
205
206
207 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
208 assert(__ rsp_offset() == 0, "frame size should be fixed");
209 __ bind(_entry);
210 __ movptr(rdx, _klass_reg->as_register());
211 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
212 ce->add_call_info_here(_info);
213 ce->verify_oop_map(_info);
214 assert(_result->as_register() == rax, "result must in rax,");
215 __ jmp(_continuation);
216 }
217
218
219 // Implementation of NewTypeArrayStub
220
221 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
222 _klass_reg = klass_reg;
223 _length = length;
224 _result = result;
225 _info = new CodeEmitInfo(info);
226 }
227
228
229 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
230 assert(__ rsp_offset() == 0, "frame size should be fixed");
231 __ bind(_entry);
232 assert(_length->as_register() == rbx, "length must in rbx,");
233 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
234 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_new_type_array_id)));
235 ce->add_call_info_here(_info);
236 ce->verify_oop_map(_info);
237 assert(_result->as_register() == rax, "result must in rax,");
238 __ jmp(_continuation);
239 }
240
241
242 // Implementation of NewObjectArrayStub
243
244 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result,
245 CodeEmitInfo* info, bool is_null_free) {
246 _klass_reg = klass_reg;
247 _result = result;
248 _length = length;
249 _info = new CodeEmitInfo(info);
250 _is_null_free = is_null_free;
251 }
252
253
254 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
255 assert(__ rsp_offset() == 0, "frame size should be fixed");
256 __ bind(_entry);
257 assert(_length->as_register() == rbx, "length must in rbx,");
258 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
259 if (_is_null_free) {
260 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_new_null_free_array_id)));
261 } else {
262 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_new_object_array_id)));
263 }
264 ce->add_call_info_here(_info);
265 ce->verify_oop_map(_info);
266 assert(_result->as_register() == rax, "result must in rax,");
267 __ jmp(_continuation);
268 }
269
270 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
271 assert(__ rsp_offset() == 0, "frame size should be fixed");
272 __ bind(_entry);
273 if (_throw_ie_stub != nullptr) {
274 // When we come here, _obj_reg has already been checked to be non-null.
275 const int is_value_mask = markWord::inline_type_pattern;
276 Register mark = _scratch_reg->as_register();
277 __ movptr(mark, Address(_obj_reg->as_register(), oopDesc::mark_offset_in_bytes()));
278 __ andptr(mark, is_value_mask);
279 __ cmpl(mark, is_value_mask);
280 __ jcc(Assembler::equal, *_throw_ie_stub->entry());
281 }
282 ce->store_parameter(_obj_reg->as_register(), 1);
283 ce->store_parameter(_lock_reg->as_register(), 0);
284 StubId enter_id;
285 if (ce->compilation()->has_fpu_code()) {
286 enter_id = StubId::c1_monitorenter_id;
287 } else {
288 enter_id = StubId::c1_monitorenter_nofpu_id;
289 }
290 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
291 ce->add_call_info_here(_info);
292 ce->verify_oop_map(_info);
293 __ jmp(_continuation);
294 }
295
296
297 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
298 __ bind(_entry);
299
300 // lock_reg was destroyed by fast unlocking attempt => recompute it
301 ce->monitor_address(_monitor_ix, _lock_reg);
302
303 ce->store_parameter(_lock_reg->as_register(), 0);
304 // note: non-blocking leaf routine => no call info needed
305 StubId exit_id;
306 if (ce->compilation()->has_fpu_code()) {
307 exit_id = StubId::c1_monitorexit_id;
308 } else {
309 exit_id = StubId::c1_monitorexit_nofpu_id;
310 }
311 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
312 __ jmp(_continuation);
313 }
314
315
316 // Implementation of patching:
317 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
318 // - Replace original code with a call to the stub
319 // At Runtime:
320 // - call to stub, jump to runtime
321 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
322 // - in runtime: after initializing class, restore original code, reexecute instruction
323
324 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
325
326 void PatchingStub::align_patch_site(MacroAssembler* masm) {
327 // We're patching a 5-7 byte instruction on intel and we need to
328 // make sure that we don't see a piece of the instruction. It
329 // appears mostly impossible on Intel to simply invalidate other
330 // processors caches and since they may do aggressive prefetch it's
331 // very hard to make a guess about what code might be in the icache.
332 // Force the instruction to be double word aligned so that it
333 // doesn't span a cache line.
334 masm->align(align_up((int)NativeGeneralJump::instruction_size, wordSize));
335 }
336
337 void PatchingStub::emit_code(LIR_Assembler* ce) {
338 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
339
340 Label call_patch;
341
342 // static field accesses have special semantics while the class
343 // initializer is being run so we emit a test which can be used to
344 // check that this code is being executed by the initializing
345 // thread.
346 address being_initialized_entry = __ pc();
347 if (CommentedAssembly) {
348 __ block_comment(" patch template");
349 }
350 if (_id == load_klass_id) {
351 // produce a copy of the load klass instruction for use by the being initialized case
352 #ifdef ASSERT
353 address start = __ pc();
354 #endif
355 Metadata* o = nullptr;
356 __ mov_metadata(_obj, o);
357 #ifdef ASSERT
358 for (int i = 0; i < _bytes_to_copy; i++) {
359 address ptr = (address)(_pc_start + i);
360 int a_byte = (*ptr) & 0xFF;
361 assert(a_byte == *start++, "should be the same code");
362 }
363 #endif
364 } else if (_id == load_mirror_id) {
365 // produce a copy of the load mirror instruction for use by the being
366 // initialized case
367 #ifdef ASSERT
368 address start = __ pc();
369 #endif
370 jobject o = nullptr;
371 __ movoop(_obj, o);
372 #ifdef ASSERT
373 for (int i = 0; i < _bytes_to_copy; i++) {
374 address ptr = (address)(_pc_start + i);
375 int a_byte = (*ptr) & 0xFF;
376 assert(a_byte == *start++, "should be the same code");
377 }
378 #endif
379 } else {
380 // make a copy the code which is going to be patched.
381 for (int i = 0; i < _bytes_to_copy; i++) {
382 address ptr = (address)(_pc_start + i);
383 int a_byte = (*ptr) & 0xFF;
384 __ emit_int8(a_byte);
385 *ptr = NativeInstruction::nop_instruction_code; // make the site look like a nop
386 }
387 }
388
389 address end_of_patch = __ pc();
390 int bytes_to_skip = 0;
391 if (_id == load_mirror_id) {
392 int offset = __ offset();
393 if (CommentedAssembly) {
394 __ block_comment(" being_initialized check");
395 }
396 assert(_obj != noreg, "must be a valid register");
397 Register tmp = rax;
398 __ push_ppx(tmp);
399 __ movptr(tmp, Address(_obj, java_lang_Class::klass_offset()));
400 __ cmpptr(r15_thread, Address(tmp, InstanceKlass::init_thread_offset()));
401 __ pop_ppx(tmp); // pop it right away, no matter which path we take
402 __ jccb(Assembler::notEqual, call_patch);
403
404 // access_field patches may execute the patched code before it's
405 // copied back into place so we need to jump back into the main
406 // code of the nmethod to continue execution.
407 __ jmp(_patch_site_continuation);
408
409 // make sure this extra code gets skipped
410 bytes_to_skip += __ offset() - offset;
411 }
412 if (CommentedAssembly) {
413 __ block_comment("patch data encoded as movl");
414 }
415 // Now emit the patch record telling the runtime how to find the
416 // pieces of the patch. We only need 3 bytes but for readability of
417 // the disassembly we make the data look like a movl reg, imm32,
418 // which requires 5 bytes
419 int sizeof_patch_record = 5;
420 bytes_to_skip += sizeof_patch_record;
421
422 // emit the offsets needed to find the code to patch
423 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
424
425 __ emit_int8((unsigned char)0xB8);
426 __ emit_int8(0);
427 __ emit_int8(being_initialized_entry_offset);
428 __ emit_int8(bytes_to_skip);
429 __ emit_int8(_bytes_to_copy);
430 address patch_info_pc = __ pc();
431 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
432
433 address entry = __ pc();
434 // NativeGeneralJump::insert_unconditional will be writing a jmp rel32 at _pc_start over the existing instructions.
435 // There are 2 cases:
436 // - the existing instruction is a mov r64 imm64 from LIR_Assembler::klass2reg_with_patching
437 // - or there are nops there (from higher in this function).
438 // In the first case, since a jmp rel32 is 5-byte long, but a mov r64 imm64 is 10-byte long
439 // (resp. 11 if using a REX2 prefix), so we are left with the last 5 (resp. 6) bytes of the
440 // immediate operand (which are all 0x00). When debugging, this confuses the disassembler
441 // because it tries to recognize an instruction starting immediately after the jmp rel32,
442 // leading to wrong instructions, and possibly failure to disassemble further the whole function.
443 //
444 // To be disassembler-friendly, let's replace the leftover 0x00 with nops.
445 // There are 2 shapes:
446 // - without REX2 prefix: REX prefix | MOV r64
447 // - with REX2 prefix: REX2 prefix | REX prefix | MOV r64
448 // then, we know the 8 bytes after are the immediate operand.
449 if (NativeInstruction* ni = nativeInstruction_at(_pc_start); ni->is_mov_literal64()) {
450 int length_before_immediate = ni->has_rex2_prefix() ? 3 : 2;
451 assert(*(long long int*)(_pc_start + length_before_immediate) == 0, "imm64 must be 0 in mov r64, imm64");
452 // We don't need to replace the NativeGeneralJump::instruction_size first bytes, since insert_unconditional
453 // will overwrite.
454 for (int i = NativeGeneralJump::instruction_size; i < length_before_immediate + BytesPerLong; ++i) {
455 _pc_start[i] = NativeInstruction::nop_instruction_code;
456 }
457 }
458 #ifdef ASSERT
459 else { // and we make sure otherwise, we indeed have just nops.
460 for (int i = 0; i < NativeGeneralJump::instruction_size; ++i) {
461 assert(_pc_start[i] == NativeInstruction::nop_instruction_code, "patching over an unexpected instruction");
462 }
463 }
464 #endif
465
466 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
467 address target = nullptr;
468 relocInfo::relocType reloc_type = relocInfo::none;
469 switch (_id) {
470 case access_field_id: target = Runtime1::entry_for(StubId::c1_access_field_patching_id); break;
471 case load_klass_id: target = Runtime1::entry_for(StubId::c1_load_klass_patching_id); reloc_type = relocInfo::metadata_type; break;
472 case load_mirror_id: target = Runtime1::entry_for(StubId::c1_load_mirror_patching_id); reloc_type = relocInfo::oop_type; break;
473 case load_appendix_id: target = Runtime1::entry_for(StubId::c1_load_appendix_patching_id); reloc_type = relocInfo::oop_type; break;
474 default: ShouldNotReachHere();
475 }
476 __ bind(call_patch);
477
478 if (CommentedAssembly) {
479 __ block_comment("patch entry point");
480 }
481 __ call(RuntimeAddress(target));
482 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
483 ce->add_call_info_here(_info);
484 int jmp_off = __ offset();
485 __ jmp(_patch_site_entry);
486 // Add enough nops so deoptimization can overwrite the jmp above with a call
487 // and not destroy the world. We cannot use fat nops here, since the concurrent
488 // code rewrite may transiently create the illegal instruction sequence.
489 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
490 __ nop();
491 }
492 if (_id == load_klass_id || _id == load_mirror_id || _id == load_appendix_id) {
493 CodeSection* cs = __ code_section();
494 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
495 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none);
496 }
497 }
498
499
500 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
501 __ bind(_entry);
502 ce->store_parameter(_trap_request, 0);
503 __ call(RuntimeAddress(Runtime1::entry_for(StubId::c1_deoptimize_id)));
504 ce->add_call_info_here(_info);
505 DEBUG_ONLY(__ should_not_reach_here());
506 }
507
508
509 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
510 address a;
511 if (_info->deoptimize_on_exception()) {
512 // Deoptimize, do not throw the exception, because it is probably wrong to do it here.
513 a = Runtime1::entry_for(StubId::c1_predicate_failed_trap_id);
514 } else {
515 a = Runtime1::entry_for(StubId::c1_throw_null_pointer_exception_id);
516 }
517
518 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
519 __ bind(_entry);
520 __ call(RuntimeAddress(a));
521 ce->add_call_info_here(_info);
522 ce->verify_oop_map(_info);
523 DEBUG_ONLY(__ should_not_reach_here());
524 }
525
526
527 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
528 assert(__ rsp_offset() == 0, "frame size should be fixed");
529
530 __ bind(_entry);
531 // pass the object on stack because all registers must be preserved
532 if (_obj->is_cpu_register()) {
533 ce->store_parameter(_obj->as_register(), 0);
534 }
535 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
536 ce->add_call_info_here(_info);
537 DEBUG_ONLY(__ should_not_reach_here());
538 }
539
540
541 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
542 //---------------slow case: call to native-----------------
543 __ bind(_entry);
544 // Figure out where the args should go
545 // This should really convert the IntrinsicID to the Method* and signature
546 // but I don't know how to do that.
547 //
548 VMRegPair args[5];
549 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
550 SharedRuntime::java_calling_convention(signature, args, 5);
551
552 // push parameters
553 // (src, src_pos, dest, destPos, length)
554 Register r[5];
555 r[0] = src()->as_register();
556 r[1] = src_pos()->as_register();
557 r[2] = dst()->as_register();
558 r[3] = dst_pos()->as_register();
559 r[4] = length()->as_register();
560
561 // next registers will get stored on the stack
562 for (int i = 0; i < 5 ; i++ ) {
563 VMReg r_1 = args[i].first();
564 if (r_1->is_stack()) {
565 int st_off = r_1->reg2stack() * wordSize;
566 __ movptr (Address(rsp, st_off), r[i]);
567 } else {
568 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
569 }
570 }
571
572 ce->align_call(lir_static_call);
573
574 ce->emit_static_call_stub();
575 if (ce->compilation()->bailed_out()) {
576 return; // CodeCache is full
577 }
578 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
579 relocInfo::static_call_type);
580 __ call(resolve);
581 ce->add_call_info_here(info());
582
583 #ifndef PRODUCT
584 if (PrintC1Statistics) {
585 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt), rscratch1);
586 }
587 #endif
588
589 __ jmp(_continuation);
590 }
591
592 #undef __