1 /* 2 * Copyright (c) 2005, 2025, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "c1/c1_Compilation.hpp" 26 #include "c1/c1_FrameMap.hpp" 27 #include "c1/c1_Instruction.hpp" 28 #include "c1/c1_LIRAssembler.hpp" 29 #include "c1/c1_LIRGenerator.hpp" 30 #include "c1/c1_Runtime1.hpp" 31 #include "c1/c1_ValueStack.hpp" 32 #include "ci/ciArray.hpp" 33 #include "ci/ciObjArrayKlass.hpp" 34 #include "ci/ciTypeArrayKlass.hpp" 35 #include "gc/shared/c1/barrierSetC1.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 #include "runtime/stubRoutines.hpp" 38 #include "utilities/powerOfTwo.hpp" 39 #include "vmreg_x86.inline.hpp" 40 41 #ifdef ASSERT 42 #define __ gen()->lir(__FILE__, __LINE__)-> 43 #else 44 #define __ gen()->lir()-> 45 #endif 46 47 // Item will be loaded into a byte register; Intel only 48 void LIRItem::load_byte_item() { 49 load_item(); 50 LIR_Opr res = result(); 51 52 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 53 // make sure that it is a byte register 54 assert(!value()->type()->is_float() && !value()->type()->is_double(), 55 "can't load floats in byte register"); 56 LIR_Opr reg = _gen->rlock_byte(T_BYTE); 57 __ move(res, reg); 58 59 _result = reg; 60 } 61 } 62 63 64 void LIRItem::load_nonconstant() { 65 LIR_Opr r = value()->operand(); 66 if (r->is_constant()) { 67 _result = r; 68 } else { 69 load_item(); 70 } 71 } 72 73 //-------------------------------------------------------------- 74 // LIRGenerator 75 //-------------------------------------------------------------- 76 77 78 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 79 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 80 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 81 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 82 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 83 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 84 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } 85 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 86 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 87 88 89 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 90 LIR_Opr opr; 91 switch (type->tag()) { 92 case intTag: opr = FrameMap::rax_opr; break; 93 case objectTag: opr = FrameMap::rax_oop_opr; break; 94 case longTag: opr = FrameMap::long0_opr; break; 95 case floatTag: opr = FrameMap::xmm0_float_opr; break; 96 case doubleTag: opr = FrameMap::xmm0_double_opr; break; 97 case addressTag: 98 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 99 } 100 101 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 102 return opr; 103 } 104 105 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 107 LIR_Opr reg = new_register(T_INT); 108 set_vreg_flag(reg, LIRGenerator::byte_reg); 109 return reg; 110 } 111 112 113 //--------- loading items into registers -------------------------------- 114 115 116 // i486 instructions can inline constants 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 118 if (type == T_SHORT || type == T_CHAR) { 119 return false; 120 } 121 Constant* c = v->as_Constant(); 122 if (c && c->state_before() == nullptr) { 123 // constants of any type can be stored directly, except for 124 // unloaded object constants. 125 return true; 126 } 127 return false; 128 } 129 130 131 bool LIRGenerator::can_inline_as_constant(Value v) const { 132 if (v->type()->tag() == longTag) return false; 133 return v->type()->tag() != objectTag || 134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 135 } 136 137 138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 139 if (c->type() == T_LONG) return false; 140 return c->type() != T_OBJECT || c->as_jobject() == nullptr; 141 } 142 143 144 LIR_Opr LIRGenerator::safepoint_poll_register() { 145 return LIR_OprFact::illegalOpr; 146 } 147 148 149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 150 int shift, int disp, BasicType type) { 151 assert(base->is_register(), "must be"); 152 if (index->is_constant()) { 153 LIR_Const *constant = index->as_constant_ptr(); 154 jlong c; 155 if (constant->type() == T_INT) { 156 c = (jlong(index->as_jint()) << shift) + disp; 157 } else { 158 assert(constant->type() == T_LONG, "should be"); 159 c = (index->as_jlong() << shift) + disp; 160 } 161 if ((jlong)((jint)c) == c) { 162 return new LIR_Address(base, (jint)c, type); 163 } else { 164 LIR_Opr tmp = new_register(T_LONG); 165 __ move(index, tmp); 166 return new LIR_Address(base, tmp, type); 167 } 168 } else { 169 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 170 } 171 } 172 173 174 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 175 BasicType type) { 176 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 177 178 LIR_Address* addr; 179 if (index_opr->is_constant()) { 180 int elem_size = type2aelembytes(type); 181 jint index = index_opr->as_jint(); 182 jlong disp = offset_in_bytes + (jlong)(index) * elem_size; 183 if (disp > max_jint) { 184 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses. 185 // Convert array index to long to do array offset computation with 64-bit values. 186 index_opr = new_register(T_LONG); 187 __ move(LIR_OprFact::longConst(index), index_opr); 188 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type); 189 } else { 190 addr = new LIR_Address(array_opr, (intx)disp, type); 191 } 192 } else { 193 if (index_opr->type() == T_INT) { 194 LIR_Opr tmp = new_register(T_LONG); 195 __ convert(Bytecodes::_i2l, index_opr, tmp); 196 index_opr = tmp; 197 } 198 addr = new LIR_Address(array_opr, 199 index_opr, 200 LIR_Address::scale(type), 201 offset_in_bytes, type); 202 } 203 return addr; 204 } 205 206 207 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) { 208 LIR_Opr r; 209 if (type == T_LONG) { 210 r = LIR_OprFact::longConst(x); 211 } else if (type == T_INT) { 212 r = LIR_OprFact::intConst(checked_cast<jint>(x)); 213 } else { 214 ShouldNotReachHere(); 215 } 216 return r; 217 } 218 219 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 220 LIR_Opr pointer = new_pointer_register(); 221 __ move(LIR_OprFact::intptrConst(counter), pointer); 222 LIR_Address* addr = new LIR_Address(pointer, type); 223 increment_counter(addr, step); 224 } 225 226 227 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 228 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 229 } 230 231 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 232 __ cmp_mem_int(condition, base, disp, c, info); 233 } 234 235 236 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 237 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 238 } 239 240 241 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { 242 if (tmp->is_valid() && c > 0 && c < max_jint) { 243 if (is_power_of_2(c + 1)) { 244 __ move(left, tmp); 245 __ shift_left(left, log2i_exact(c + 1), left); 246 __ sub(left, tmp, result); 247 return true; 248 } else if (is_power_of_2(c - 1)) { 249 __ move(left, tmp); 250 __ shift_left(left, log2i_exact(c - 1), left); 251 __ add(left, tmp, result); 252 return true; 253 } 254 } 255 return false; 256 } 257 258 259 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 260 BasicType type = item->type(); 261 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 262 } 263 264 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) { 265 LIR_Opr tmp1 = new_register(objectType); 266 LIR_Opr tmp2 = new_register(objectType); 267 LIR_Opr tmp3 = new_register(objectType); 268 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci); 269 } 270 271 //---------------------------------------------------------------------- 272 // visitor functions 273 //---------------------------------------------------------------------- 274 275 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 276 assert(x->is_pinned(),""); 277 LIRItem obj(x->obj(), this); 278 obj.load_item(); 279 280 set_no_result(x); 281 282 // "lock" stores the address of the monitor stack slot, so this is not an oop 283 LIR_Opr lock = new_register(T_INT); 284 285 CodeEmitInfo* info_for_exception = nullptr; 286 if (x->needs_null_check()) { 287 info_for_exception = state_for(x); 288 } 289 // this CodeEmitInfo must not have the xhandlers because here the 290 // object is already locked (xhandlers expect object to be unlocked) 291 CodeEmitInfo* info = state_for(x, x->state(), true); 292 LIR_Opr tmp = new_register(T_ADDRESS); 293 monitor_enter(obj.result(), lock, syncTempOpr(), tmp, 294 x->monitor_no(), info_for_exception, info); 295 } 296 297 298 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 299 assert(x->is_pinned(),""); 300 301 LIRItem obj(x->obj(), this); 302 obj.dont_load_item(); 303 304 LIR_Opr lock = new_register(T_INT); 305 LIR_Opr obj_temp = new_register(T_INT); 306 set_no_result(x); 307 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 308 } 309 310 // _ineg, _lneg, _fneg, _dneg 311 void LIRGenerator::do_NegateOp(NegateOp* x) { 312 LIRItem value(x->x(), this); 313 value.set_destroys_register(); 314 value.load_item(); 315 LIR_Opr reg = rlock(x); 316 317 __ negate(value.result(), reg); 318 319 set_result(x, reg); 320 } 321 322 // for _fadd, _fmul, _fsub, _fdiv, _frem 323 // _dadd, _dmul, _dsub, _ddiv, _drem 324 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 325 LIRItem left(x->x(), this); 326 LIRItem right(x->y(), this); 327 LIRItem* left_arg = &left; 328 LIRItem* right_arg = &right; 329 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 330 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 331 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 332 left.load_item(); 333 } else { 334 left.dont_load_item(); 335 } 336 337 if (must_load_both) { 338 // frem and drem destroy also right operand, so move it to a new register 339 right.set_destroys_register(); 340 right.load_item(); 341 } else if (right.is_register()) { 342 right.load_item(); 343 } else { 344 right.dont_load_item(); 345 } 346 LIR_Opr reg = rlock(x); 347 LIR_Opr tmp = LIR_OprFact::illegalOpr; 348 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) { 349 tmp = new_register(T_DOUBLE); 350 } 351 352 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) { 353 // frem and drem are implemented as a direct call into the runtime. 354 LIRItem left(x->x(), this); 355 LIRItem right(x->y(), this); 356 357 BasicType bt = as_BasicType(x->type()); 358 BasicTypeList signature(2); 359 signature.append(bt); 360 signature.append(bt); 361 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 362 363 const LIR_Opr result_reg = result_register_for(x->type()); 364 left.load_item_force(cc->at(0)); 365 right.load_item_force(cc->at(1)); 366 367 address entry = nullptr; 368 switch (x->op()) { 369 case Bytecodes::_frem: 370 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); 371 break; 372 case Bytecodes::_drem: 373 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); 374 break; 375 default: 376 ShouldNotReachHere(); 377 } 378 379 LIR_Opr result = rlock_result(x); 380 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 381 __ move(result_reg, result); 382 } else { 383 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp); 384 set_result(x, reg); 385 } 386 } 387 388 389 // for _ladd, _lmul, _lsub, _ldiv, _lrem 390 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 391 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 392 // long division is implemented as a direct call into the runtime 393 LIRItem left(x->x(), this); 394 LIRItem right(x->y(), this); 395 396 // the check for division by zero destroys the right operand 397 right.set_destroys_register(); 398 399 BasicTypeList signature(2); 400 signature.append(T_LONG); 401 signature.append(T_LONG); 402 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 403 404 // check for division by zero (destroys registers of right operand!) 405 CodeEmitInfo* info = state_for(x); 406 407 const LIR_Opr result_reg = result_register_for(x->type()); 408 left.load_item_force(cc->at(1)); 409 right.load_item(); 410 411 __ move(right.result(), cc->at(0)); 412 413 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 414 __ branch(lir_cond_equal, new DivByZeroStub(info)); 415 416 address entry = nullptr; 417 switch (x->op()) { 418 case Bytecodes::_lrem: 419 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 420 break; // check if dividend is 0 is done elsewhere 421 case Bytecodes::_ldiv: 422 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 423 break; // check if dividend is 0 is done elsewhere 424 default: 425 ShouldNotReachHere(); 426 } 427 428 LIR_Opr result = rlock_result(x); 429 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 430 __ move(result_reg, result); 431 } else if (x->op() == Bytecodes::_lmul) { 432 // missing test if instr is commutative and if we should swap 433 LIRItem left(x->x(), this); 434 LIRItem right(x->y(), this); 435 436 // right register is destroyed by the long mul, so it must be 437 // copied to a new register. 438 right.set_destroys_register(); 439 440 left.load_item(); 441 right.load_item(); 442 443 LIR_Opr reg = FrameMap::long0_opr; 444 arithmetic_op_long(x->op(), reg, left.result(), right.result(), nullptr); 445 LIR_Opr result = rlock_result(x); 446 __ move(reg, result); 447 } else { 448 // missing test if instr is commutative and if we should swap 449 LIRItem left(x->x(), this); 450 LIRItem right(x->y(), this); 451 452 left.load_item(); 453 // don't load constants to save register 454 right.load_nonconstant(); 455 rlock_result(x); 456 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr); 457 } 458 } 459 460 461 462 // for: _iadd, _imul, _isub, _idiv, _irem 463 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 464 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 465 // The requirements for division and modulo 466 // input : rax,: dividend min_int 467 // reg: divisor (may not be rax,/rdx) -1 468 // 469 // output: rax,: quotient (= rax, idiv reg) min_int 470 // rdx: remainder (= rax, irem reg) 0 471 472 // rax, and rdx will be destroyed 473 474 // Note: does this invalidate the spec ??? 475 LIRItem right(x->y(), this); 476 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 477 478 // call state_for before load_item_force because state_for may 479 // force the evaluation of other instructions that are needed for 480 // correct debug info. Otherwise the live range of the fix 481 // register might be too long. 482 CodeEmitInfo* info = state_for(x); 483 484 left.load_item_force(divInOpr()); 485 486 right.load_item(); 487 488 LIR_Opr result = rlock_result(x); 489 LIR_Opr result_reg; 490 if (x->op() == Bytecodes::_idiv) { 491 result_reg = divOutOpr(); 492 } else { 493 result_reg = remOutOpr(); 494 } 495 496 if (!ImplicitDiv0Checks) { 497 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 498 __ branch(lir_cond_equal, new DivByZeroStub(info)); 499 // Idiv/irem cannot trap (passing info would generate an assertion). 500 info = nullptr; 501 } 502 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 503 if (x->op() == Bytecodes::_irem) { 504 __ irem(left.result(), right.result(), result_reg, tmp, info); 505 } else if (x->op() == Bytecodes::_idiv) { 506 __ idiv(left.result(), right.result(), result_reg, tmp, info); 507 } else { 508 ShouldNotReachHere(); 509 } 510 511 __ move(result_reg, result); 512 } else { 513 // missing test if instr is commutative and if we should swap 514 LIRItem left(x->x(), this); 515 LIRItem right(x->y(), this); 516 LIRItem* left_arg = &left; 517 LIRItem* right_arg = &right; 518 if (x->is_commutative() && left.is_stack() && right.is_register()) { 519 // swap them if left is real stack (or cached) and right is real register(not cached) 520 left_arg = &right; 521 right_arg = &left; 522 } 523 524 left_arg->load_item(); 525 526 // do not need to load right, as we can handle stack and constants 527 if (x->op() == Bytecodes::_imul ) { 528 // check if we can use shift instead 529 bool use_constant = false; 530 bool use_tmp = false; 531 if (right_arg->is_constant()) { 532 jint iconst = right_arg->get_jint_constant(); 533 if (iconst > 0 && iconst < max_jint) { 534 if (is_power_of_2(iconst)) { 535 use_constant = true; 536 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 537 use_constant = true; 538 use_tmp = true; 539 } 540 } 541 } 542 if (use_constant) { 543 right_arg->dont_load_item(); 544 } else { 545 right_arg->load_item(); 546 } 547 LIR_Opr tmp = LIR_OprFact::illegalOpr; 548 if (use_tmp) { 549 tmp = new_register(T_INT); 550 } 551 rlock_result(x); 552 553 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 554 } else { 555 right_arg->dont_load_item(); 556 rlock_result(x); 557 LIR_Opr tmp = LIR_OprFact::illegalOpr; 558 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 559 } 560 } 561 } 562 563 564 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 565 // when an operand with use count 1 is the left operand, then it is 566 // likely that no move for 2-operand-LIR-form is necessary 567 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) { 568 x->swap_operands(); 569 } 570 571 ValueTag tag = x->type()->tag(); 572 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 573 switch (tag) { 574 case floatTag: 575 case doubleTag: do_ArithmeticOp_FPU(x); return; 576 case longTag: do_ArithmeticOp_Long(x); return; 577 case intTag: do_ArithmeticOp_Int(x); return; 578 default: ShouldNotReachHere(); return; 579 } 580 } 581 582 583 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 584 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 585 // count must always be in rcx 586 LIRItem value(x->x(), this); 587 LIRItem count(x->y(), this); 588 589 ValueTag elemType = x->type()->tag(); 590 bool must_load_count = !count.is_constant() || elemType == longTag; 591 if (must_load_count) { 592 // count for long must be in register 593 count.load_item_force(shiftCountOpr()); 594 } else { 595 count.dont_load_item(); 596 } 597 value.load_item(); 598 LIR_Opr reg = rlock_result(x); 599 600 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 601 } 602 603 604 // _iand, _land, _ior, _lor, _ixor, _lxor 605 void LIRGenerator::do_LogicOp(LogicOp* x) { 606 // when an operand with use count 1 is the left operand, then it is 607 // likely that no move for 2-operand-LIR-form is necessary 608 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) { 609 x->swap_operands(); 610 } 611 612 LIRItem left(x->x(), this); 613 LIRItem right(x->y(), this); 614 615 left.load_item(); 616 right.load_nonconstant(); 617 LIR_Opr reg = rlock_result(x); 618 619 logic_op(x->op(), reg, left.result(), right.result()); 620 } 621 622 623 624 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 625 void LIRGenerator::do_CompareOp(CompareOp* x) { 626 LIRItem left(x->x(), this); 627 LIRItem right(x->y(), this); 628 ValueTag tag = x->x()->type()->tag(); 629 if (tag == longTag) { 630 left.set_destroys_register(); 631 } 632 left.load_item(); 633 right.load_item(); 634 LIR_Opr reg = rlock_result(x); 635 636 if (x->x()->type()->is_float_kind()) { 637 Bytecodes::Code code = x->op(); 638 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 639 } else if (x->x()->type()->tag() == longTag) { 640 __ lcmp2int(left.result(), right.result(), reg); 641 } else { 642 Unimplemented(); 643 } 644 } 645 646 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { 647 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 648 if (is_reference_type(type)) { 649 cmp_value.load_item_force(FrameMap::rax_oop_opr); 650 new_value.load_item(); 651 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 652 } else if (type == T_INT) { 653 cmp_value.load_item_force(FrameMap::rax_opr); 654 new_value.load_item(); 655 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 656 } else if (type == T_LONG) { 657 cmp_value.load_item_force(FrameMap::long0_opr); 658 new_value.load_item_force(FrameMap::long1_opr); 659 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 660 } else { 661 Unimplemented(); 662 } 663 LIR_Opr result = new_register(T_INT); 664 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 665 result, T_INT); 666 return result; 667 } 668 669 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { 670 bool is_oop = is_reference_type(type); 671 LIR_Opr result = new_register(type); 672 value.load_item(); 673 // Because we want a 2-arg form of xchg and xadd 674 __ move(value.result(), result); 675 assert(type == T_INT || is_oop || type == T_LONG, "unexpected type"); 676 __ xchg(addr, result, result, LIR_OprFact::illegalOpr); 677 return result; 678 } 679 680 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) { 681 LIR_Opr result = new_register(type); 682 value.load_item(); 683 // Because we want a 2-arg form of xchg and xadd 684 __ move(value.result(), result); 685 assert(type == T_INT || type == T_LONG, "unexpected type"); 686 __ xadd(addr, result, result, LIR_OprFact::illegalOpr); 687 return result; 688 } 689 690 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { 691 assert(x->number_of_arguments() == 3, "wrong type"); 692 assert(UseFMA, "Needs FMA instructions support."); 693 LIRItem value(x->argument_at(0), this); 694 LIRItem value1(x->argument_at(1), this); 695 LIRItem value2(x->argument_at(2), this); 696 697 value2.set_destroys_register(); 698 699 value.load_item(); 700 value1.load_item(); 701 value2.load_item(); 702 703 LIR_Opr calc_input = value.result(); 704 LIR_Opr calc_input1 = value1.result(); 705 LIR_Opr calc_input2 = value2.result(); 706 LIR_Opr calc_result = rlock_result(x); 707 708 switch (x->id()) { 709 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break; 710 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break; 711 default: ShouldNotReachHere(); 712 } 713 714 } 715 716 717 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 718 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); 719 720 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog || 721 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos || 722 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan || 723 x->id() == vmIntrinsics::_dlog10 || x->id() == vmIntrinsics::_dsinh || 724 x->id() == vmIntrinsics::_dtanh || x->id() == vmIntrinsics::_dcbrt 725 ) { 726 do_LibmIntrinsic(x); 727 return; 728 } 729 730 LIRItem value(x->argument_at(0), this); 731 732 value.load_item(); 733 734 LIR_Opr calc_input = value.result(); 735 LIR_Opr calc_result = rlock_result(x); 736 737 LIR_Opr tmp = LIR_OprFact::illegalOpr; 738 if (x->id() == vmIntrinsics::_floatToFloat16) { 739 tmp = new_register(T_FLOAT); 740 } 741 742 switch(x->id()) { 743 case vmIntrinsics::_dabs: 744 __ abs(calc_input, calc_result, tmp); 745 break; 746 case vmIntrinsics::_dsqrt: 747 case vmIntrinsics::_dsqrt_strict: 748 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr); 749 break; 750 case vmIntrinsics::_floatToFloat16: 751 __ f2hf(calc_input, calc_result, tmp); 752 break; 753 case vmIntrinsics::_float16ToFloat: 754 __ hf2f(calc_input, calc_result, LIR_OprFact::illegalOpr); 755 break; 756 default: 757 ShouldNotReachHere(); 758 } 759 } 760 761 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) { 762 LIRItem value(x->argument_at(0), this); 763 value.set_destroys_register(); 764 765 LIR_Opr calc_result = rlock_result(x); 766 LIR_Opr result_reg = result_register_for(x->type()); 767 768 CallingConvention* cc = nullptr; 769 770 if (x->id() == vmIntrinsics::_dpow) { 771 LIRItem value1(x->argument_at(1), this); 772 773 value1.set_destroys_register(); 774 775 BasicTypeList signature(2); 776 signature.append(T_DOUBLE); 777 signature.append(T_DOUBLE); 778 cc = frame_map()->c_calling_convention(&signature); 779 value.load_item_force(cc->at(0)); 780 value1.load_item_force(cc->at(1)); 781 } else { 782 BasicTypeList signature(1); 783 signature.append(T_DOUBLE); 784 cc = frame_map()->c_calling_convention(&signature); 785 value.load_item_force(cc->at(0)); 786 } 787 788 switch (x->id()) { 789 case vmIntrinsics::_dexp: 790 if (StubRoutines::dexp() != nullptr) { 791 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 792 } else { 793 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 794 } 795 break; 796 case vmIntrinsics::_dlog: 797 if (StubRoutines::dlog() != nullptr) { 798 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 799 } else { 800 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 801 } 802 break; 803 case vmIntrinsics::_dlog10: 804 if (StubRoutines::dlog10() != nullptr) { 805 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 806 } else { 807 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 808 } 809 break; 810 case vmIntrinsics::_dpow: 811 if (StubRoutines::dpow() != nullptr) { 812 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 813 } else { 814 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 815 } 816 break; 817 case vmIntrinsics::_dsin: 818 if (StubRoutines::dsin() != nullptr) { 819 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 820 } else { 821 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 822 } 823 break; 824 case vmIntrinsics::_dcos: 825 if (StubRoutines::dcos() != nullptr) { 826 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 827 } else { 828 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 829 } 830 break; 831 case vmIntrinsics::_dtan: 832 if (StubRoutines::dtan() != nullptr) { 833 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 834 } else { 835 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 836 } 837 break; 838 case vmIntrinsics::_dsinh: 839 assert(StubRoutines::dsinh() != nullptr, "sinh intrinsic not found"); 840 if (StubRoutines::dsinh() != nullptr) { 841 __ call_runtime_leaf(StubRoutines::dsinh(), getThreadTemp(), result_reg, cc->args()); 842 } 843 break; 844 case vmIntrinsics::_dtanh: 845 assert(StubRoutines::dtanh() != nullptr, "tanh intrinsic not found"); 846 if (StubRoutines::dtanh() != nullptr) { 847 __ call_runtime_leaf(StubRoutines::dtanh(), getThreadTemp(), result_reg, cc->args()); 848 } 849 break; 850 case vmIntrinsics::_dcbrt: 851 assert(StubRoutines::dcbrt() != nullptr, "cbrt intrinsic not found"); 852 if (StubRoutines::dcbrt() != nullptr) { 853 __ call_runtime_leaf(StubRoutines::dcbrt(), getThreadTemp(), result_reg, cc->args()); 854 } 855 break; 856 default: ShouldNotReachHere(); 857 } 858 859 __ move(result_reg, calc_result); 860 } 861 862 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 863 assert(x->number_of_arguments() == 5, "wrong type"); 864 865 // Make all state_for calls early since they can emit code 866 CodeEmitInfo* info = nullptr; 867 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) { 868 info = state_for(x, x->state_before()); 869 info->set_force_reexecute(); 870 } else { 871 info = state_for(x, x->state()); 872 } 873 874 LIRItem src(x->argument_at(0), this); 875 LIRItem src_pos(x->argument_at(1), this); 876 LIRItem dst(x->argument_at(2), this); 877 LIRItem dst_pos(x->argument_at(3), this); 878 LIRItem length(x->argument_at(4), this); 879 880 // operands for arraycopy must use fixed registers, otherwise 881 // LinearScan will fail allocation (because arraycopy always needs a 882 // call) 883 884 int flags; 885 ciArrayKlass* expected_type; 886 arraycopy_helper(x, &flags, &expected_type); 887 if (x->check_flag(Instruction::OmitChecksFlag)) { 888 flags = 0; 889 } 890 891 // The java calling convention will give us enough registers 892 // so that on the stub side the args will be perfect already. 893 // On the other slow/special case side we call C and the arg 894 // positions are not similar enough to pick one as the best. 895 // Also because the java calling convention is a "shifted" version 896 // of the C convention we can process the java args trivially into C 897 // args without worry of overwriting during the xfer 898 899 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 900 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 901 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 902 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 903 length.load_item_force (FrameMap::as_opr(j_rarg4)); 904 905 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 906 907 set_no_result(x); 908 909 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 910 } 911 912 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 913 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions support"); 914 // Make all state_for calls early since they can emit code 915 LIR_Opr result = rlock_result(x); 916 int flags = 0; 917 switch (x->id()) { 918 case vmIntrinsics::_updateCRC32: { 919 LIRItem crc(x->argument_at(0), this); 920 LIRItem val(x->argument_at(1), this); 921 // val is destroyed by update_crc32 922 val.set_destroys_register(); 923 crc.load_item(); 924 val.load_item(); 925 __ update_crc32(crc.result(), val.result(), result); 926 break; 927 } 928 case vmIntrinsics::_updateBytesCRC32: 929 case vmIntrinsics::_updateByteBufferCRC32: { 930 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 931 932 LIRItem crc(x->argument_at(0), this); 933 LIRItem buf(x->argument_at(1), this); 934 LIRItem off(x->argument_at(2), this); 935 LIRItem len(x->argument_at(3), this); 936 buf.load_item(); 937 off.load_nonconstant(); 938 939 LIR_Opr index = off.result(); 940 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 941 if(off.result()->is_constant()) { 942 index = LIR_OprFact::illegalOpr; 943 offset += off.result()->as_jint(); 944 } 945 LIR_Opr base_op = buf.result(); 946 947 if (index->is_valid()) { 948 LIR_Opr tmp = new_register(T_LONG); 949 __ convert(Bytecodes::_i2l, index, tmp); 950 index = tmp; 951 } 952 953 LIR_Address* a = new LIR_Address(base_op, 954 index, 955 offset, 956 T_BYTE); 957 BasicTypeList signature(3); 958 signature.append(T_INT); 959 signature.append(T_ADDRESS); 960 signature.append(T_INT); 961 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 962 const LIR_Opr result_reg = result_register_for(x->type()); 963 964 LIR_Opr addr = new_register(T_ADDRESS); 965 __ leal(LIR_OprFact::address(a), addr); 966 967 crc.load_item_force(cc->at(0)); 968 __ move(addr, cc->at(1)); 969 len.load_item_force(cc->at(2)); 970 971 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); 972 __ move(result_reg, result); 973 974 break; 975 } 976 default: { 977 ShouldNotReachHere(); 978 } 979 } 980 } 981 982 void LIRGenerator::do_update_CRC32C(Intrinsic* x) { 983 assert(UseCRC32CIntrinsics, "need AVX and CLMUL instructions support"); 984 LIR_Opr result = rlock_result(x); 985 986 switch (x->id()) { 987 case vmIntrinsics::_updateBytesCRC32C: 988 case vmIntrinsics::_updateDirectByteBufferCRC32C: { 989 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C); 990 991 LIRItem crc(x->argument_at(0), this); 992 LIRItem buf(x->argument_at(1), this); 993 LIRItem off(x->argument_at(2), this); 994 LIRItem end(x->argument_at(3), this); 995 buf.load_item(); 996 off.load_nonconstant(); 997 end.load_nonconstant(); 998 999 // len = end - off 1000 LIR_Opr len = end.result(); 1001 LIR_Opr tmpA = new_register(T_INT); 1002 LIR_Opr tmpB = new_register(T_INT); 1003 __ move(end.result(), tmpA); 1004 __ move(off.result(), tmpB); 1005 __ sub(tmpA, tmpB, tmpA); 1006 len = tmpA; 1007 1008 LIR_Opr index = off.result(); 1009 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1010 if (off.result()->is_constant()) { 1011 index = LIR_OprFact::illegalOpr; 1012 offset += off.result()->as_jint(); 1013 } 1014 LIR_Opr base_op = buf.result(); 1015 LIR_Address* a = nullptr; 1016 1017 if (index->is_valid()) { 1018 LIR_Opr tmp = new_register(T_LONG); 1019 __ convert(Bytecodes::_i2l, index, tmp); 1020 index = tmp; 1021 a = new LIR_Address(base_op, index, offset, T_BYTE); 1022 } else { 1023 a = new LIR_Address(base_op, offset, T_BYTE); 1024 } 1025 1026 BasicTypeList signature(3); 1027 signature.append(T_INT); 1028 signature.append(T_ADDRESS); 1029 signature.append(T_INT); 1030 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1031 const LIR_Opr result_reg = result_register_for(x->type()); 1032 1033 LIR_Opr arg1 = cc->at(0), 1034 arg2 = cc->at(1), 1035 arg3 = cc->at(2); 1036 1037 crc.load_item_force(arg1); 1038 __ leal(LIR_OprFact::address(a), arg2); 1039 __ move(len, arg3); 1040 1041 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args()); 1042 __ move(result_reg, result); 1043 break; 1044 } 1045 default: { 1046 ShouldNotReachHere(); 1047 } 1048 } 1049 } 1050 1051 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { 1052 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support"); 1053 1054 // Make all state_for calls early since they can emit code 1055 LIR_Opr result = rlock_result(x); 1056 1057 LIRItem a(x->argument_at(0), this); // Object 1058 LIRItem aOffset(x->argument_at(1), this); // long 1059 LIRItem b(x->argument_at(2), this); // Object 1060 LIRItem bOffset(x->argument_at(3), this); // long 1061 LIRItem length(x->argument_at(4), this); // int 1062 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int 1063 1064 a.load_item(); 1065 aOffset.load_nonconstant(); 1066 b.load_item(); 1067 bOffset.load_nonconstant(); 1068 1069 long constant_aOffset = 0; 1070 LIR_Opr result_aOffset = aOffset.result(); 1071 if (result_aOffset->is_constant()) { 1072 constant_aOffset = result_aOffset->as_jlong(); 1073 result_aOffset = LIR_OprFact::illegalOpr; 1074 } 1075 LIR_Opr result_a = a.result(); 1076 1077 long constant_bOffset = 0; 1078 LIR_Opr result_bOffset = bOffset.result(); 1079 if (result_bOffset->is_constant()) { 1080 constant_bOffset = result_bOffset->as_jlong(); 1081 result_bOffset = LIR_OprFact::illegalOpr; 1082 } 1083 LIR_Opr result_b = b.result(); 1084 1085 LIR_Address* addr_a = new LIR_Address(result_a, 1086 result_aOffset, 1087 constant_aOffset, 1088 T_BYTE); 1089 1090 LIR_Address* addr_b = new LIR_Address(result_b, 1091 result_bOffset, 1092 constant_bOffset, 1093 T_BYTE); 1094 1095 BasicTypeList signature(4); 1096 signature.append(T_ADDRESS); 1097 signature.append(T_ADDRESS); 1098 signature.append(T_INT); 1099 signature.append(T_INT); 1100 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1101 const LIR_Opr result_reg = result_register_for(x->type()); 1102 1103 LIR_Opr ptr_addr_a = new_register(T_ADDRESS); 1104 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a); 1105 1106 LIR_Opr ptr_addr_b = new_register(T_ADDRESS); 1107 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b); 1108 1109 __ move(ptr_addr_a, cc->at(0)); 1110 __ move(ptr_addr_b, cc->at(1)); 1111 length.load_item_force(cc->at(2)); 1112 log2ArrayIndexScale.load_item_force(cc->at(3)); 1113 1114 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args()); 1115 __ move(result_reg, result); 1116 } 1117 1118 void LIRGenerator::do_Convert(Convert* x) { 1119 LIRItem value(x->value(), this); 1120 value.load_item(); 1121 LIR_Opr input = value.result(); 1122 LIR_Opr result = rlock(x); 1123 __ convert(x->op(), input, result); 1124 assert(result->is_virtual(), "result must be virtual register"); 1125 set_result(x, result); 1126 } 1127 1128 1129 void LIRGenerator::do_NewInstance(NewInstance* x) { 1130 print_if_not_loaded(x); 1131 1132 CodeEmitInfo* info = state_for(x, x->state()); 1133 LIR_Opr reg = result_register_for(x->type()); 1134 new_instance(reg, x->klass(), x->is_unresolved(), 1135 FrameMap::rcx_oop_opr, 1136 FrameMap::rdi_oop_opr, 1137 FrameMap::rsi_oop_opr, 1138 LIR_OprFact::illegalOpr, 1139 FrameMap::rdx_metadata_opr, info); 1140 LIR_Opr result = rlock_result(x); 1141 __ move(reg, result); 1142 } 1143 1144 1145 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 1146 CodeEmitInfo* info = nullptr; 1147 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) { 1148 info = state_for(x, x->state_before()); 1149 info->set_force_reexecute(); 1150 } else { 1151 info = state_for(x, x->state()); 1152 } 1153 1154 LIRItem length(x->length(), this); 1155 length.load_item_force(FrameMap::rbx_opr); 1156 1157 LIR_Opr reg = result_register_for(x->type()); 1158 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1159 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1160 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1161 LIR_Opr tmp4 = reg; 1162 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1163 LIR_Opr len = length.result(); 1164 BasicType elem_type = x->elt_type(); 1165 1166 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1167 1168 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1169 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array()); 1170 1171 LIR_Opr result = rlock_result(x); 1172 __ move(reg, result); 1173 } 1174 1175 1176 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1177 LIRItem length(x->length(), this); 1178 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1179 // and therefore provide the state before the parameters have been consumed 1180 CodeEmitInfo* patching_info = nullptr; 1181 if (!x->klass()->is_loaded() || PatchALot) { 1182 patching_info = state_for(x, x->state_before()); 1183 } 1184 1185 CodeEmitInfo* info = state_for(x, x->state()); 1186 1187 const LIR_Opr reg = result_register_for(x->type()); 1188 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1189 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1190 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1191 LIR_Opr tmp4 = reg; 1192 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1193 1194 length.load_item_force(FrameMap::rbx_opr); 1195 LIR_Opr len = length.result(); 1196 1197 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 1198 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass()); 1199 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1200 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1201 } 1202 klass2reg_with_patching(klass_reg, obj, patching_info); 1203 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1204 1205 LIR_Opr result = rlock_result(x); 1206 __ move(reg, result); 1207 } 1208 1209 1210 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1211 Values* dims = x->dims(); 1212 int i = dims->length(); 1213 LIRItemList* items = new LIRItemList(i, i, nullptr); 1214 while (i-- > 0) { 1215 LIRItem* size = new LIRItem(dims->at(i), this); 1216 items->at_put(i, size); 1217 } 1218 1219 // Evaluate state_for early since it may emit code. 1220 CodeEmitInfo* patching_info = nullptr; 1221 if (!x->klass()->is_loaded() || PatchALot) { 1222 patching_info = state_for(x, x->state_before()); 1223 1224 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1225 // clone all handlers (NOTE: Usually this is handled transparently 1226 // by the CodeEmitInfo cloning logic in CodeStub constructors but 1227 // is done explicitly here because a stub isn't being used). 1228 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1229 } 1230 CodeEmitInfo* info = state_for(x, x->state()); 1231 1232 i = dims->length(); 1233 while (i-- > 0) { 1234 LIRItem* size = items->at(i); 1235 size->load_nonconstant(); 1236 1237 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1238 } 1239 1240 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; 1241 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 1242 1243 LIR_Opr rank = FrameMap::rbx_opr; 1244 __ move(LIR_OprFact::intConst(x->rank()), rank); 1245 LIR_Opr varargs = FrameMap::rcx_opr; 1246 __ move(FrameMap::rsp_opr, varargs); 1247 LIR_OprList* args = new LIR_OprList(3); 1248 args->append(klass_reg); 1249 args->append(rank); 1250 args->append(varargs); 1251 LIR_Opr reg = result_register_for(x->type()); 1252 __ call_runtime(Runtime1::entry_for(StubId::c1_new_multi_array_id), 1253 LIR_OprFact::illegalOpr, 1254 reg, args, info); 1255 1256 LIR_Opr result = rlock_result(x); 1257 __ move(reg, result); 1258 } 1259 1260 1261 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1262 // nothing to do for now 1263 } 1264 1265 1266 void LIRGenerator::do_CheckCast(CheckCast* x) { 1267 LIRItem obj(x->obj(), this); 1268 1269 CodeEmitInfo* patching_info = nullptr; 1270 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) { 1271 // must do this before locking the destination register as an oop register, 1272 // and before the obj is loaded (the latter is for deoptimization) 1273 patching_info = state_for(x, x->state_before()); 1274 } 1275 obj.load_item(); 1276 1277 // info for exceptions 1278 CodeEmitInfo* info_for_exception = 1279 (x->needs_exception_state() ? state_for(x) : 1280 state_for(x, x->state_before(), true /*ignore_xhandler*/)); 1281 1282 CodeStub* stub; 1283 if (x->is_incompatible_class_change_check()) { 1284 assert(patching_info == nullptr, "can't patch this"); 1285 stub = new SimpleExceptionStub(StubId::c1_throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1286 } else if (x->is_invokespecial_receiver_check()) { 1287 assert(patching_info == nullptr, "can't patch this"); 1288 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none); 1289 } else { 1290 stub = new SimpleExceptionStub(StubId::c1_throw_class_cast_exception_id, obj.result(), info_for_exception); 1291 } 1292 LIR_Opr reg = rlock_result(x); 1293 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1294 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1295 tmp3 = new_register(objectType); 1296 } 1297 __ checkcast(reg, obj.result(), x->klass(), 1298 new_register(objectType), new_register(objectType), tmp3, 1299 x->direct_compare(), info_for_exception, patching_info, stub, 1300 x->profiled_method(), x->profiled_bci()); 1301 } 1302 1303 1304 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1305 LIRItem obj(x->obj(), this); 1306 1307 // result and test object may not be in same register 1308 LIR_Opr reg = rlock_result(x); 1309 CodeEmitInfo* patching_info = nullptr; 1310 if ((!x->klass()->is_loaded() || PatchALot)) { 1311 // must do this before locking the destination register as an oop register 1312 patching_info = state_for(x, x->state_before()); 1313 } 1314 obj.load_item(); 1315 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1316 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1317 tmp3 = new_register(objectType); 1318 } 1319 __ instanceof(reg, obj.result(), x->klass(), 1320 new_register(objectType), new_register(objectType), tmp3, 1321 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); 1322 } 1323 1324 // Intrinsic for Class::isInstance 1325 address LIRGenerator::isInstance_entry() { 1326 return Runtime1::entry_for(StubId::c1_is_instance_of_id); 1327 } 1328 1329 1330 void LIRGenerator::do_If(If* x) { 1331 assert(x->number_of_sux() == 2, "inconsistency"); 1332 ValueTag tag = x->x()->type()->tag(); 1333 bool is_safepoint = x->is_safepoint(); 1334 1335 If::Condition cond = x->cond(); 1336 1337 LIRItem xitem(x->x(), this); 1338 LIRItem yitem(x->y(), this); 1339 LIRItem* xin = &xitem; 1340 LIRItem* yin = &yitem; 1341 1342 if (tag == longTag) { 1343 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1344 // mirror for other conditions 1345 if (cond == If::gtr || cond == If::leq) { 1346 cond = Instruction::mirror(cond); 1347 xin = &yitem; 1348 yin = &xitem; 1349 } 1350 xin->set_destroys_register(); 1351 } 1352 xin->load_item(); 1353 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1354 // inline long zero 1355 yin->dont_load_item(); 1356 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 1357 // longs cannot handle constants at right side 1358 yin->load_item(); 1359 } else { 1360 yin->dont_load_item(); 1361 } 1362 1363 LIR_Opr left = xin->result(); 1364 LIR_Opr right = yin->result(); 1365 1366 set_no_result(x); 1367 1368 // add safepoint before generating condition code so it can be recomputed 1369 if (x->is_safepoint()) { 1370 // increment backedge counter if needed 1371 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()), 1372 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci()); 1373 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before())); 1374 } 1375 1376 __ cmp(lir_cond(cond), left, right); 1377 // Generate branch profiling. Profiling code doesn't kill flags. 1378 profile_branch(x, cond); 1379 move_to_phi(x->state()); 1380 if (x->x()->type()->is_float_kind()) { 1381 __ branch(lir_cond(cond), x->tsux(), x->usux()); 1382 } else { 1383 __ branch(lir_cond(cond), x->tsux()); 1384 } 1385 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1386 __ jump(x->default_sux()); 1387 } 1388 1389 1390 LIR_Opr LIRGenerator::getThreadPointer() { 1391 return FrameMap::as_pointer_opr(r15_thread); 1392 } 1393 1394 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1395 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1396 LIR_OprList* args = new LIR_OprList(); 1397 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1398 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1399 } 1400 1401 1402 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1403 CodeEmitInfo* info) { 1404 if (address->type() == T_LONG) { 1405 address = new LIR_Address(address->base(), 1406 address->index(), address->scale(), 1407 address->disp(), T_DOUBLE); 1408 // Transfer the value atomically by using FP moves. This means 1409 // the value has to be moved between CPU and FPU registers. It 1410 // always has to be moved through spill slot since there's no 1411 // quick way to pack the value into an SSE register. 1412 LIR_Opr temp_double = new_register(T_DOUBLE); 1413 LIR_Opr spill = new_register(T_LONG); 1414 set_vreg_flag(spill, must_start_in_memory); 1415 __ move(value, spill); 1416 __ volatile_move(spill, temp_double, T_LONG); 1417 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1418 } else { 1419 __ store(value, address, info); 1420 } 1421 } 1422 1423 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1424 CodeEmitInfo* info) { 1425 if (address->type() == T_LONG) { 1426 address = new LIR_Address(address->base(), 1427 address->index(), address->scale(), 1428 address->disp(), T_DOUBLE); 1429 // Transfer the value atomically by using FP moves. This means 1430 // the value has to be moved between CPU and FPU registers. In 1431 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1432 // SSE2+ mode it can be moved directly. 1433 LIR_Opr temp_double = new_register(T_DOUBLE); 1434 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1435 __ volatile_move(temp_double, result, T_LONG); 1436 } else { 1437 __ load(address, result, info); 1438 } 1439 }