1 /*
2 * Copyright (c) 2005, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "c1/c1_Compilation.hpp"
26 #include "c1/c1_FrameMap.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_LIRGenerator.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "ci/ciArray.hpp"
33 #include "ci/ciObjArrayKlass.hpp"
34 #include "ci/ciTypeArrayKlass.hpp"
35 #include "gc/shared/c1/barrierSetC1.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "utilities/powerOfTwo.hpp"
39 #include "vmreg_x86.inline.hpp"
40
41 #ifdef ASSERT
42 #define __ gen()->lir(__FILE__, __LINE__)->
43 #else
44 #define __ gen()->lir()->
45 #endif
46
47 // Item will be loaded into a byte register; Intel only
48 void LIRItem::load_byte_item() {
49 load_item();
50 LIR_Opr res = result();
51
52 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
53 // make sure that it is a byte register
54 assert(!value()->type()->is_float() && !value()->type()->is_double(),
55 "can't load floats in byte register");
56 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
57 __ move(res, reg);
58
59 _result = reg;
60 }
61 }
62
63
64 void LIRItem::load_nonconstant() {
65 LIR_Opr r = value()->operand();
66 if (r->is_constant()) {
67 _result = r;
68 } else {
69 load_item();
70 }
71 }
72
73 //--------------------------------------------------------------
74 // LIRGenerator
75 //--------------------------------------------------------------
76
77
78 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
79 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
80 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
81 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
83 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
84 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
85 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
86 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
87
88
89 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
90 LIR_Opr opr;
91 switch (type->tag()) {
92 case intTag: opr = FrameMap::rax_opr; break;
93 case objectTag: opr = FrameMap::rax_oop_opr; break;
94 case longTag: opr = FrameMap::long0_opr; break;
95 case floatTag: opr = FrameMap::xmm0_float_opr; break;
96 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
97 case addressTag:
98 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
99 }
100
101 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
102 return opr;
103 }
104
105
106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
107 LIR_Opr reg = new_register(T_INT);
108 set_vreg_flag(reg, LIRGenerator::byte_reg);
109 return reg;
110 }
111
112
113 //--------- loading items into registers --------------------------------
114
115
116 // i486 instructions can inline constants
117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
118 if (type == T_SHORT || type == T_CHAR) {
119 return false;
120 }
121 Constant* c = v->as_Constant();
122 if (c && c->state_before() == nullptr) {
123 // constants of any type can be stored directly, except for
124 // unloaded object constants.
125 return true;
126 }
127 return false;
128 }
129
130
131 bool LIRGenerator::can_inline_as_constant(Value v) const {
132 if (v->type()->tag() == longTag) return false;
133 return v->type()->tag() != objectTag ||
134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
135 }
136
137
138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
139 if (c->type() == T_LONG) return false;
140 return c->type() != T_OBJECT || c->as_jobject() == nullptr;
141 }
142
143
144 LIR_Opr LIRGenerator::safepoint_poll_register() {
145 return LIR_OprFact::illegalOpr;
146 }
147
148
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
150 int shift, int disp, BasicType type) {
151 assert(base->is_register(), "must be");
152 if (index->is_constant()) {
153 LIR_Const *constant = index->as_constant_ptr();
154 jlong c;
155 if (constant->type() == T_INT) {
156 c = (jlong(index->as_jint()) << shift) + disp;
157 } else {
158 assert(constant->type() == T_LONG, "should be");
159 c = (index->as_jlong() << shift) + disp;
160 }
161 if ((jlong)((jint)c) == c) {
162 return new LIR_Address(base, (jint)c, type);
163 } else {
164 LIR_Opr tmp = new_register(T_LONG);
165 __ move(index, tmp);
166 return new LIR_Address(base, tmp, type);
167 }
168 } else {
169 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
170 }
171 }
172
173
174 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
175 BasicType type) {
176 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
177
178 LIR_Address* addr;
179 if (index_opr->is_constant()) {
180 int elem_size = type2aelembytes(type);
181 jint index = index_opr->as_jint();
182 jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
183 if (disp > max_jint) {
184 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
185 // Convert array index to long to do array offset computation with 64-bit values.
186 index_opr = new_register(T_LONG);
187 __ move(LIR_OprFact::longConst(index), index_opr);
188 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
189 } else {
190 addr = new LIR_Address(array_opr, (intx)disp, type);
191 }
192 } else {
193 if (index_opr->type() == T_INT) {
194 LIR_Opr tmp = new_register(T_LONG);
195 __ convert(Bytecodes::_i2l, index_opr, tmp);
196 index_opr = tmp;
197 }
198 addr = new LIR_Address(array_opr,
199 index_opr,
200 LIR_Address::scale(type),
201 offset_in_bytes, type);
202 }
203 return addr;
204 }
205
206
207 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
208 LIR_Opr r;
209 if (type == T_LONG) {
210 r = LIR_OprFact::longConst(x);
211 } else if (type == T_INT) {
212 r = LIR_OprFact::intConst(checked_cast<jint>(x));
213 } else {
214 ShouldNotReachHere();
215 }
216 return r;
217 }
218
219 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
220 LIR_Opr pointer = new_pointer_register();
221 __ move(LIR_OprFact::intptrConst(counter), pointer);
222 LIR_Address* addr = new LIR_Address(pointer, type);
223 increment_counter(addr, step);
224 }
225
226
227 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
228 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
229 }
230
231 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
232 __ cmp_mem_int(condition, base, disp, c, info);
233 }
234
235
236 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
237 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
238 }
239
240
241 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
242 if (tmp->is_valid() && c > 0 && c < max_jint) {
243 if (is_power_of_2(c + 1)) {
244 __ move(left, tmp);
245 __ shift_left(left, log2i_exact(c + 1), left);
246 __ sub(left, tmp, result);
247 return true;
248 } else if (is_power_of_2(c - 1)) {
249 __ move(left, tmp);
250 __ shift_left(left, log2i_exact(c - 1), left);
251 __ add(left, tmp, result);
252 return true;
253 }
254 }
255 return false;
256 }
257
258
259 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
260 BasicType type = item->type();
261 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
262 }
263
264 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
265 LIR_Opr tmp1 = new_register(objectType);
266 LIR_Opr tmp2 = new_register(objectType);
267 LIR_Opr tmp3 = new_register(objectType);
268 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
269 }
270
271 //----------------------------------------------------------------------
272 // visitor functions
273 //----------------------------------------------------------------------
274
275 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
276 assert(x->is_pinned(),"");
277 LIRItem obj(x->obj(), this);
278 obj.load_item();
279
280 set_no_result(x);
281
282 // "lock" stores the address of the monitor stack slot, so this is not an oop
283 LIR_Opr lock = new_register(T_INT);
284
285 CodeEmitInfo* info_for_exception = nullptr;
286 if (x->needs_null_check()) {
287 info_for_exception = state_for(x);
288 }
289 // this CodeEmitInfo must not have the xhandlers because here the
290 // object is already locked (xhandlers expect object to be unlocked)
291 CodeEmitInfo* info = state_for(x, x->state(), true);
292 LIR_Opr tmp = LockingMode == LM_LIGHTWEIGHT ? new_register(T_ADDRESS) : LIR_OprFact::illegalOpr;
293 monitor_enter(obj.result(), lock, syncTempOpr(), tmp,
294 x->monitor_no(), info_for_exception, info);
295 }
296
297
298 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
299 assert(x->is_pinned(),"");
300
301 LIRItem obj(x->obj(), this);
302 obj.dont_load_item();
303
304 LIR_Opr lock = new_register(T_INT);
305 LIR_Opr obj_temp = new_register(T_INT);
306 set_no_result(x);
307 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
308 }
309
310 // _ineg, _lneg, _fneg, _dneg
311 void LIRGenerator::do_NegateOp(NegateOp* x) {
312 LIRItem value(x->x(), this);
313 value.set_destroys_register();
314 value.load_item();
315 LIR_Opr reg = rlock(x);
316
317 __ negate(value.result(), reg);
318
319 set_result(x, reg);
320 }
321
322 // for _fadd, _fmul, _fsub, _fdiv, _frem
323 // _dadd, _dmul, _dsub, _ddiv, _drem
324 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
325 LIRItem left(x->x(), this);
326 LIRItem right(x->y(), this);
327 LIRItem* left_arg = &left;
328 LIRItem* right_arg = &right;
329 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
330 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
331 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
332 left.load_item();
333 } else {
334 left.dont_load_item();
335 }
336
337 if (must_load_both) {
338 // frem and drem destroy also right operand, so move it to a new register
339 right.set_destroys_register();
340 right.load_item();
341 } else if (right.is_register()) {
342 right.load_item();
343 } else {
344 right.dont_load_item();
345 }
346 LIR_Opr reg = rlock(x);
347 LIR_Opr tmp = LIR_OprFact::illegalOpr;
348 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
349 tmp = new_register(T_DOUBLE);
350 }
351
352 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
353 // frem and drem are implemented as a direct call into the runtime.
354 LIRItem left(x->x(), this);
355 LIRItem right(x->y(), this);
356
357 BasicType bt = as_BasicType(x->type());
358 BasicTypeList signature(2);
359 signature.append(bt);
360 signature.append(bt);
361 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
362
363 const LIR_Opr result_reg = result_register_for(x->type());
364 left.load_item_force(cc->at(0));
365 right.load_item_force(cc->at(1));
366
367 address entry = nullptr;
368 switch (x->op()) {
369 case Bytecodes::_frem:
370 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
371 break;
372 case Bytecodes::_drem:
373 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
374 break;
375 default:
376 ShouldNotReachHere();
377 }
378
379 LIR_Opr result = rlock_result(x);
380 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
381 __ move(result_reg, result);
382 } else {
383 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
384 set_result(x, reg);
385 }
386 }
387
388
389 // for _ladd, _lmul, _lsub, _ldiv, _lrem
390 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
391 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
392 // long division is implemented as a direct call into the runtime
393 LIRItem left(x->x(), this);
394 LIRItem right(x->y(), this);
395
396 // the check for division by zero destroys the right operand
397 right.set_destroys_register();
398
399 BasicTypeList signature(2);
400 signature.append(T_LONG);
401 signature.append(T_LONG);
402 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
403
404 // check for division by zero (destroys registers of right operand!)
405 CodeEmitInfo* info = state_for(x);
406
407 const LIR_Opr result_reg = result_register_for(x->type());
408 left.load_item_force(cc->at(1));
409 right.load_item();
410
411 __ move(right.result(), cc->at(0));
412
413 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
414 __ branch(lir_cond_equal, new DivByZeroStub(info));
415
416 address entry = nullptr;
417 switch (x->op()) {
418 case Bytecodes::_lrem:
419 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
420 break; // check if dividend is 0 is done elsewhere
421 case Bytecodes::_ldiv:
422 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
423 break; // check if dividend is 0 is done elsewhere
424 default:
425 ShouldNotReachHere();
426 }
427
428 LIR_Opr result = rlock_result(x);
429 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
430 __ move(result_reg, result);
431 } else if (x->op() == Bytecodes::_lmul) {
432 // missing test if instr is commutative and if we should swap
433 LIRItem left(x->x(), this);
434 LIRItem right(x->y(), this);
435
436 // right register is destroyed by the long mul, so it must be
437 // copied to a new register.
438 right.set_destroys_register();
439
440 left.load_item();
441 right.load_item();
442
443 LIR_Opr reg = FrameMap::long0_opr;
444 arithmetic_op_long(x->op(), reg, left.result(), right.result(), nullptr);
445 LIR_Opr result = rlock_result(x);
446 __ move(reg, result);
447 } else {
448 // missing test if instr is commutative and if we should swap
449 LIRItem left(x->x(), this);
450 LIRItem right(x->y(), this);
451
452 left.load_item();
453 // don't load constants to save register
454 right.load_nonconstant();
455 rlock_result(x);
456 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
457 }
458 }
459
460
461
462 // for: _iadd, _imul, _isub, _idiv, _irem
463 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
464 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
465 // The requirements for division and modulo
466 // input : rax,: dividend min_int
467 // reg: divisor (may not be rax,/rdx) -1
468 //
469 // output: rax,: quotient (= rax, idiv reg) min_int
470 // rdx: remainder (= rax, irem reg) 0
471
472 // rax, and rdx will be destroyed
473
474 // Note: does this invalidate the spec ???
475 LIRItem right(x->y(), this);
476 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
477
478 // call state_for before load_item_force because state_for may
479 // force the evaluation of other instructions that are needed for
480 // correct debug info. Otherwise the live range of the fix
481 // register might be too long.
482 CodeEmitInfo* info = state_for(x);
483
484 left.load_item_force(divInOpr());
485
486 right.load_item();
487
488 LIR_Opr result = rlock_result(x);
489 LIR_Opr result_reg;
490 if (x->op() == Bytecodes::_idiv) {
491 result_reg = divOutOpr();
492 } else {
493 result_reg = remOutOpr();
494 }
495
496 if (!ImplicitDiv0Checks) {
497 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
498 __ branch(lir_cond_equal, new DivByZeroStub(info));
499 // Idiv/irem cannot trap (passing info would generate an assertion).
500 info = nullptr;
501 }
502 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
503 if (x->op() == Bytecodes::_irem) {
504 __ irem(left.result(), right.result(), result_reg, tmp, info);
505 } else if (x->op() == Bytecodes::_idiv) {
506 __ idiv(left.result(), right.result(), result_reg, tmp, info);
507 } else {
508 ShouldNotReachHere();
509 }
510
511 __ move(result_reg, result);
512 } else {
513 // missing test if instr is commutative and if we should swap
514 LIRItem left(x->x(), this);
515 LIRItem right(x->y(), this);
516 LIRItem* left_arg = &left;
517 LIRItem* right_arg = &right;
518 if (x->is_commutative() && left.is_stack() && right.is_register()) {
519 // swap them if left is real stack (or cached) and right is real register(not cached)
520 left_arg = &right;
521 right_arg = &left;
522 }
523
524 left_arg->load_item();
525
526 // do not need to load right, as we can handle stack and constants
527 if (x->op() == Bytecodes::_imul ) {
528 // check if we can use shift instead
529 bool use_constant = false;
530 bool use_tmp = false;
531 if (right_arg->is_constant()) {
532 jint iconst = right_arg->get_jint_constant();
533 if (iconst > 0 && iconst < max_jint) {
534 if (is_power_of_2(iconst)) {
535 use_constant = true;
536 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
537 use_constant = true;
538 use_tmp = true;
539 }
540 }
541 }
542 if (use_constant) {
543 right_arg->dont_load_item();
544 } else {
545 right_arg->load_item();
546 }
547 LIR_Opr tmp = LIR_OprFact::illegalOpr;
548 if (use_tmp) {
549 tmp = new_register(T_INT);
550 }
551 rlock_result(x);
552
553 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
554 } else {
555 right_arg->dont_load_item();
556 rlock_result(x);
557 LIR_Opr tmp = LIR_OprFact::illegalOpr;
558 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
559 }
560 }
561 }
562
563
564 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
565 // when an operand with use count 1 is the left operand, then it is
566 // likely that no move for 2-operand-LIR-form is necessary
567 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
568 x->swap_operands();
569 }
570
571 ValueTag tag = x->type()->tag();
572 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
573 switch (tag) {
574 case floatTag:
575 case doubleTag: do_ArithmeticOp_FPU(x); return;
576 case longTag: do_ArithmeticOp_Long(x); return;
577 case intTag: do_ArithmeticOp_Int(x); return;
578 default: ShouldNotReachHere(); return;
579 }
580 }
581
582
583 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
584 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
585 // count must always be in rcx
586 LIRItem value(x->x(), this);
587 LIRItem count(x->y(), this);
588
589 ValueTag elemType = x->type()->tag();
590 bool must_load_count = !count.is_constant() || elemType == longTag;
591 if (must_load_count) {
592 // count for long must be in register
593 count.load_item_force(shiftCountOpr());
594 } else {
595 count.dont_load_item();
596 }
597 value.load_item();
598 LIR_Opr reg = rlock_result(x);
599
600 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
601 }
602
603
604 // _iand, _land, _ior, _lor, _ixor, _lxor
605 void LIRGenerator::do_LogicOp(LogicOp* x) {
606 // when an operand with use count 1 is the left operand, then it is
607 // likely that no move for 2-operand-LIR-form is necessary
608 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
609 x->swap_operands();
610 }
611
612 LIRItem left(x->x(), this);
613 LIRItem right(x->y(), this);
614
615 left.load_item();
616 right.load_nonconstant();
617 LIR_Opr reg = rlock_result(x);
618
619 logic_op(x->op(), reg, left.result(), right.result());
620 }
621
622
623
624 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
625 void LIRGenerator::do_CompareOp(CompareOp* x) {
626 LIRItem left(x->x(), this);
627 LIRItem right(x->y(), this);
628 ValueTag tag = x->x()->type()->tag();
629 if (tag == longTag) {
630 left.set_destroys_register();
631 }
632 left.load_item();
633 right.load_item();
634 LIR_Opr reg = rlock_result(x);
635
636 if (x->x()->type()->is_float_kind()) {
637 Bytecodes::Code code = x->op();
638 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
639 } else if (x->x()->type()->tag() == longTag) {
640 __ lcmp2int(left.result(), right.result(), reg);
641 } else {
642 Unimplemented();
643 }
644 }
645
646 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
647 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
648 if (is_reference_type(type)) {
649 cmp_value.load_item_force(FrameMap::rax_oop_opr);
650 new_value.load_item();
651 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
652 } else if (type == T_INT) {
653 cmp_value.load_item_force(FrameMap::rax_opr);
654 new_value.load_item();
655 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
656 } else if (type == T_LONG) {
657 cmp_value.load_item_force(FrameMap::long0_opr);
658 new_value.load_item_force(FrameMap::long1_opr);
659 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
660 } else {
661 Unimplemented();
662 }
663 LIR_Opr result = new_register(T_INT);
664 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
665 result, T_INT);
666 return result;
667 }
668
669 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
670 bool is_oop = is_reference_type(type);
671 LIR_Opr result = new_register(type);
672 value.load_item();
673 // Because we want a 2-arg form of xchg and xadd
674 __ move(value.result(), result);
675 assert(type == T_INT || is_oop || type == T_LONG, "unexpected type");
676 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
677 return result;
678 }
679
680 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
681 LIR_Opr result = new_register(type);
682 value.load_item();
683 // Because we want a 2-arg form of xchg and xadd
684 __ move(value.result(), result);
685 assert(type == T_INT || type == T_LONG, "unexpected type");
686 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
687 return result;
688 }
689
690 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
691 assert(x->number_of_arguments() == 3, "wrong type");
692 assert(UseFMA, "Needs FMA instructions support.");
693 LIRItem value(x->argument_at(0), this);
694 LIRItem value1(x->argument_at(1), this);
695 LIRItem value2(x->argument_at(2), this);
696
697 value2.set_destroys_register();
698
699 value.load_item();
700 value1.load_item();
701 value2.load_item();
702
703 LIR_Opr calc_input = value.result();
704 LIR_Opr calc_input1 = value1.result();
705 LIR_Opr calc_input2 = value2.result();
706 LIR_Opr calc_result = rlock_result(x);
707
708 switch (x->id()) {
709 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
710 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
711 default: ShouldNotReachHere();
712 }
713
714 }
715
716
717 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
718 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
719
720 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
721 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
722 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
723 x->id() == vmIntrinsics::_dlog10 || x->id() == vmIntrinsics::_dtanh
724 ) {
725 do_LibmIntrinsic(x);
726 return;
727 }
728
729 LIRItem value(x->argument_at(0), this);
730
731 value.load_item();
732
733 LIR_Opr calc_input = value.result();
734 LIR_Opr calc_result = rlock_result(x);
735
736 LIR_Opr tmp = LIR_OprFact::illegalOpr;
737 if (x->id() == vmIntrinsics::_floatToFloat16) {
738 tmp = new_register(T_FLOAT);
739 }
740
741 switch(x->id()) {
742 case vmIntrinsics::_dabs:
743 __ abs(calc_input, calc_result, tmp);
744 break;
745 case vmIntrinsics::_dsqrt:
746 case vmIntrinsics::_dsqrt_strict:
747 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
748 break;
749 case vmIntrinsics::_floatToFloat16:
750 __ f2hf(calc_input, calc_result, tmp);
751 break;
752 case vmIntrinsics::_float16ToFloat:
753 __ hf2f(calc_input, calc_result, LIR_OprFact::illegalOpr);
754 break;
755 default:
756 ShouldNotReachHere();
757 }
758 }
759
760 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
761 LIRItem value(x->argument_at(0), this);
762 value.set_destroys_register();
763
764 LIR_Opr calc_result = rlock_result(x);
765 LIR_Opr result_reg = result_register_for(x->type());
766
767 CallingConvention* cc = nullptr;
768
769 if (x->id() == vmIntrinsics::_dpow) {
770 LIRItem value1(x->argument_at(1), this);
771
772 value1.set_destroys_register();
773
774 BasicTypeList signature(2);
775 signature.append(T_DOUBLE);
776 signature.append(T_DOUBLE);
777 cc = frame_map()->c_calling_convention(&signature);
778 value.load_item_force(cc->at(0));
779 value1.load_item_force(cc->at(1));
780 } else {
781 BasicTypeList signature(1);
782 signature.append(T_DOUBLE);
783 cc = frame_map()->c_calling_convention(&signature);
784 value.load_item_force(cc->at(0));
785 }
786
787 switch (x->id()) {
788 case vmIntrinsics::_dexp:
789 if (StubRoutines::dexp() != nullptr) {
790 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
791 } else {
792 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
793 }
794 break;
795 case vmIntrinsics::_dlog:
796 if (StubRoutines::dlog() != nullptr) {
797 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
798 } else {
799 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
800 }
801 break;
802 case vmIntrinsics::_dlog10:
803 if (StubRoutines::dlog10() != nullptr) {
804 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
805 } else {
806 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
807 }
808 break;
809 case vmIntrinsics::_dpow:
810 if (StubRoutines::dpow() != nullptr) {
811 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
812 } else {
813 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
814 }
815 break;
816 case vmIntrinsics::_dsin:
817 if (StubRoutines::dsin() != nullptr) {
818 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
819 } else {
820 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
821 }
822 break;
823 case vmIntrinsics::_dcos:
824 if (StubRoutines::dcos() != nullptr) {
825 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
826 } else {
827 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
828 }
829 break;
830 case vmIntrinsics::_dtan:
831 if (StubRoutines::dtan() != nullptr) {
832 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
833 } else {
834 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
835 }
836 break;
837 case vmIntrinsics::_dtanh:
838 assert(StubRoutines::dtanh() != nullptr, "tanh intrinsic not found");
839 if (StubRoutines::dtanh() != nullptr) {
840 __ call_runtime_leaf(StubRoutines::dtanh(), getThreadTemp(), result_reg, cc->args());
841 }
842 break;
843 default: ShouldNotReachHere();
844 }
845
846 __ move(result_reg, calc_result);
847 }
848
849 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
850 assert(x->number_of_arguments() == 5, "wrong type");
851
852 // Make all state_for calls early since they can emit code
853 CodeEmitInfo* info = nullptr;
854 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
855 info = state_for(x, x->state_before());
856 info->set_force_reexecute();
857 } else {
858 info = state_for(x, x->state());
859 }
860
861 LIRItem src(x->argument_at(0), this);
862 LIRItem src_pos(x->argument_at(1), this);
863 LIRItem dst(x->argument_at(2), this);
864 LIRItem dst_pos(x->argument_at(3), this);
865 LIRItem length(x->argument_at(4), this);
866
867 // operands for arraycopy must use fixed registers, otherwise
868 // LinearScan will fail allocation (because arraycopy always needs a
869 // call)
870
871 int flags;
872 ciArrayKlass* expected_type;
873 arraycopy_helper(x, &flags, &expected_type);
874 if (x->check_flag(Instruction::OmitChecksFlag)) {
875 flags = 0;
876 }
877
878 // The java calling convention will give us enough registers
879 // so that on the stub side the args will be perfect already.
880 // On the other slow/special case side we call C and the arg
881 // positions are not similar enough to pick one as the best.
882 // Also because the java calling convention is a "shifted" version
883 // of the C convention we can process the java args trivially into C
884 // args without worry of overwriting during the xfer
885
886 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
887 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
888 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
889 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
890 length.load_item_force (FrameMap::as_opr(j_rarg4));
891
892 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
893
894 set_no_result(x);
895
896 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
897 }
898
899 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
900 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions support");
901 // Make all state_for calls early since they can emit code
902 LIR_Opr result = rlock_result(x);
903 int flags = 0;
904 switch (x->id()) {
905 case vmIntrinsics::_updateCRC32: {
906 LIRItem crc(x->argument_at(0), this);
907 LIRItem val(x->argument_at(1), this);
908 // val is destroyed by update_crc32
909 val.set_destroys_register();
910 crc.load_item();
911 val.load_item();
912 __ update_crc32(crc.result(), val.result(), result);
913 break;
914 }
915 case vmIntrinsics::_updateBytesCRC32:
916 case vmIntrinsics::_updateByteBufferCRC32: {
917 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
918
919 LIRItem crc(x->argument_at(0), this);
920 LIRItem buf(x->argument_at(1), this);
921 LIRItem off(x->argument_at(2), this);
922 LIRItem len(x->argument_at(3), this);
923 buf.load_item();
924 off.load_nonconstant();
925
926 LIR_Opr index = off.result();
927 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
928 if(off.result()->is_constant()) {
929 index = LIR_OprFact::illegalOpr;
930 offset += off.result()->as_jint();
931 }
932 LIR_Opr base_op = buf.result();
933
934 if (index->is_valid()) {
935 LIR_Opr tmp = new_register(T_LONG);
936 __ convert(Bytecodes::_i2l, index, tmp);
937 index = tmp;
938 }
939
940 LIR_Address* a = new LIR_Address(base_op,
941 index,
942 offset,
943 T_BYTE);
944 BasicTypeList signature(3);
945 signature.append(T_INT);
946 signature.append(T_ADDRESS);
947 signature.append(T_INT);
948 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
949 const LIR_Opr result_reg = result_register_for(x->type());
950
951 LIR_Opr addr = new_pointer_register();
952 __ leal(LIR_OprFact::address(a), addr);
953
954 crc.load_item_force(cc->at(0));
955 __ move(addr, cc->at(1));
956 len.load_item_force(cc->at(2));
957
958 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
959 __ move(result_reg, result);
960
961 break;
962 }
963 default: {
964 ShouldNotReachHere();
965 }
966 }
967 }
968
969 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
970 assert(UseCRC32CIntrinsics, "need AVX and CLMUL instructions support");
971 LIR_Opr result = rlock_result(x);
972
973 switch (x->id()) {
974 case vmIntrinsics::_updateBytesCRC32C:
975 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
976 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
977
978 LIRItem crc(x->argument_at(0), this);
979 LIRItem buf(x->argument_at(1), this);
980 LIRItem off(x->argument_at(2), this);
981 LIRItem end(x->argument_at(3), this);
982 buf.load_item();
983 off.load_nonconstant();
984 end.load_nonconstant();
985
986 // len = end - off
987 LIR_Opr len = end.result();
988 LIR_Opr tmpA = new_register(T_INT);
989 LIR_Opr tmpB = new_register(T_INT);
990 __ move(end.result(), tmpA);
991 __ move(off.result(), tmpB);
992 __ sub(tmpA, tmpB, tmpA);
993 len = tmpA;
994
995 LIR_Opr index = off.result();
996 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
997 if (off.result()->is_constant()) {
998 index = LIR_OprFact::illegalOpr;
999 offset += off.result()->as_jint();
1000 }
1001 LIR_Opr base_op = buf.result();
1002 LIR_Address* a = nullptr;
1003
1004 if (index->is_valid()) {
1005 LIR_Opr tmp = new_register(T_LONG);
1006 __ convert(Bytecodes::_i2l, index, tmp);
1007 index = tmp;
1008 a = new LIR_Address(base_op, index, offset, T_BYTE);
1009 } else {
1010 a = new LIR_Address(base_op, offset, T_BYTE);
1011 }
1012
1013 BasicTypeList signature(3);
1014 signature.append(T_INT);
1015 signature.append(T_ADDRESS);
1016 signature.append(T_INT);
1017 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1018 const LIR_Opr result_reg = result_register_for(x->type());
1019
1020 LIR_Opr arg1 = cc->at(0),
1021 arg2 = cc->at(1),
1022 arg3 = cc->at(2);
1023
1024 crc.load_item_force(arg1);
1025 __ leal(LIR_OprFact::address(a), arg2);
1026 __ move(len, arg3);
1027
1028 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args());
1029 __ move(result_reg, result);
1030 break;
1031 }
1032 default: {
1033 ShouldNotReachHere();
1034 }
1035 }
1036 }
1037
1038 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1039 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1040
1041 // Make all state_for calls early since they can emit code
1042 LIR_Opr result = rlock_result(x);
1043
1044 LIRItem a(x->argument_at(0), this); // Object
1045 LIRItem aOffset(x->argument_at(1), this); // long
1046 LIRItem b(x->argument_at(2), this); // Object
1047 LIRItem bOffset(x->argument_at(3), this); // long
1048 LIRItem length(x->argument_at(4), this); // int
1049 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1050
1051 a.load_item();
1052 aOffset.load_nonconstant();
1053 b.load_item();
1054 bOffset.load_nonconstant();
1055
1056 long constant_aOffset = 0;
1057 LIR_Opr result_aOffset = aOffset.result();
1058 if (result_aOffset->is_constant()) {
1059 constant_aOffset = result_aOffset->as_jlong();
1060 result_aOffset = LIR_OprFact::illegalOpr;
1061 }
1062 LIR_Opr result_a = a.result();
1063
1064 long constant_bOffset = 0;
1065 LIR_Opr result_bOffset = bOffset.result();
1066 if (result_bOffset->is_constant()) {
1067 constant_bOffset = result_bOffset->as_jlong();
1068 result_bOffset = LIR_OprFact::illegalOpr;
1069 }
1070 LIR_Opr result_b = b.result();
1071
1072 LIR_Address* addr_a = new LIR_Address(result_a,
1073 result_aOffset,
1074 constant_aOffset,
1075 T_BYTE);
1076
1077 LIR_Address* addr_b = new LIR_Address(result_b,
1078 result_bOffset,
1079 constant_bOffset,
1080 T_BYTE);
1081
1082 BasicTypeList signature(4);
1083 signature.append(T_ADDRESS);
1084 signature.append(T_ADDRESS);
1085 signature.append(T_INT);
1086 signature.append(T_INT);
1087 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1088 const LIR_Opr result_reg = result_register_for(x->type());
1089
1090 LIR_Opr ptr_addr_a = new_pointer_register();
1091 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1092
1093 LIR_Opr ptr_addr_b = new_pointer_register();
1094 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1095
1096 __ move(ptr_addr_a, cc->at(0));
1097 __ move(ptr_addr_b, cc->at(1));
1098 length.load_item_force(cc->at(2));
1099 log2ArrayIndexScale.load_item_force(cc->at(3));
1100
1101 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1102 __ move(result_reg, result);
1103 }
1104
1105 void LIRGenerator::do_Convert(Convert* x) {
1106 LIRItem value(x->value(), this);
1107 value.load_item();
1108 LIR_Opr input = value.result();
1109 LIR_Opr result = rlock(x);
1110 __ convert(x->op(), input, result);
1111 assert(result->is_virtual(), "result must be virtual register");
1112 set_result(x, result);
1113 }
1114
1115
1116 void LIRGenerator::do_NewInstance(NewInstance* x) {
1117 print_if_not_loaded(x);
1118
1119 CodeEmitInfo* info = state_for(x, x->state());
1120 LIR_Opr reg = result_register_for(x->type());
1121 new_instance(reg, x->klass(), x->is_unresolved(),
1122 FrameMap::rcx_oop_opr,
1123 FrameMap::rdi_oop_opr,
1124 FrameMap::rsi_oop_opr,
1125 LIR_OprFact::illegalOpr,
1126 FrameMap::rdx_metadata_opr, info);
1127 LIR_Opr result = rlock_result(x);
1128 __ move(reg, result);
1129 }
1130
1131
1132 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1133 CodeEmitInfo* info = nullptr;
1134 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
1135 info = state_for(x, x->state_before());
1136 info->set_force_reexecute();
1137 } else {
1138 info = state_for(x, x->state());
1139 }
1140
1141 LIRItem length(x->length(), this);
1142 length.load_item_force(FrameMap::rbx_opr);
1143
1144 LIR_Opr reg = result_register_for(x->type());
1145 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1146 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1147 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1148 LIR_Opr tmp4 = reg;
1149 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1150 LIR_Opr len = length.result();
1151 BasicType elem_type = x->elt_type();
1152
1153 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1154
1155 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1156 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
1157
1158 LIR_Opr result = rlock_result(x);
1159 __ move(reg, result);
1160 }
1161
1162
1163 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1164 LIRItem length(x->length(), this);
1165 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1166 // and therefore provide the state before the parameters have been consumed
1167 CodeEmitInfo* patching_info = nullptr;
1168 if (!x->klass()->is_loaded() || PatchALot) {
1169 patching_info = state_for(x, x->state_before());
1170 }
1171
1172 CodeEmitInfo* info = state_for(x, x->state());
1173
1174 const LIR_Opr reg = result_register_for(x->type());
1175 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1176 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1177 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1178 LIR_Opr tmp4 = reg;
1179 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1180
1181 length.load_item_force(FrameMap::rbx_opr);
1182 LIR_Opr len = length.result();
1183
1184 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1185 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1186 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1187 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1188 }
1189 klass2reg_with_patching(klass_reg, obj, patching_info);
1190 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1191
1192 LIR_Opr result = rlock_result(x);
1193 __ move(reg, result);
1194 }
1195
1196
1197 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1198 Values* dims = x->dims();
1199 int i = dims->length();
1200 LIRItemList* items = new LIRItemList(i, i, nullptr);
1201 while (i-- > 0) {
1202 LIRItem* size = new LIRItem(dims->at(i), this);
1203 items->at_put(i, size);
1204 }
1205
1206 // Evaluate state_for early since it may emit code.
1207 CodeEmitInfo* patching_info = nullptr;
1208 if (!x->klass()->is_loaded() || PatchALot) {
1209 patching_info = state_for(x, x->state_before());
1210
1211 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1212 // clone all handlers (NOTE: Usually this is handled transparently
1213 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1214 // is done explicitly here because a stub isn't being used).
1215 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1216 }
1217 CodeEmitInfo* info = state_for(x, x->state());
1218
1219 i = dims->length();
1220 while (i-- > 0) {
1221 LIRItem* size = items->at(i);
1222 size->load_nonconstant();
1223
1224 store_stack_parameter(size->result(), in_ByteSize(i*4));
1225 }
1226
1227 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1228 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1229
1230 LIR_Opr rank = FrameMap::rbx_opr;
1231 __ move(LIR_OprFact::intConst(x->rank()), rank);
1232 LIR_Opr varargs = FrameMap::rcx_opr;
1233 __ move(FrameMap::rsp_opr, varargs);
1234 LIR_OprList* args = new LIR_OprList(3);
1235 args->append(klass_reg);
1236 args->append(rank);
1237 args->append(varargs);
1238 LIR_Opr reg = result_register_for(x->type());
1239 __ call_runtime(Runtime1::entry_for(C1StubId::new_multi_array_id),
1240 LIR_OprFact::illegalOpr,
1241 reg, args, info);
1242
1243 LIR_Opr result = rlock_result(x);
1244 __ move(reg, result);
1245 }
1246
1247
1248 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1249 // nothing to do for now
1250 }
1251
1252
1253 void LIRGenerator::do_CheckCast(CheckCast* x) {
1254 LIRItem obj(x->obj(), this);
1255
1256 CodeEmitInfo* patching_info = nullptr;
1257 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1258 // must do this before locking the destination register as an oop register,
1259 // and before the obj is loaded (the latter is for deoptimization)
1260 patching_info = state_for(x, x->state_before());
1261 }
1262 obj.load_item();
1263
1264 // info for exceptions
1265 CodeEmitInfo* info_for_exception =
1266 (x->needs_exception_state() ? state_for(x) :
1267 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1268
1269 CodeStub* stub;
1270 if (x->is_incompatible_class_change_check()) {
1271 assert(patching_info == nullptr, "can't patch this");
1272 stub = new SimpleExceptionStub(C1StubId::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1273 } else if (x->is_invokespecial_receiver_check()) {
1274 assert(patching_info == nullptr, "can't patch this");
1275 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1276 } else {
1277 stub = new SimpleExceptionStub(C1StubId::throw_class_cast_exception_id, obj.result(), info_for_exception);
1278 }
1279 LIR_Opr reg = rlock_result(x);
1280 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1281 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1282 tmp3 = new_register(objectType);
1283 }
1284 __ checkcast(reg, obj.result(), x->klass(),
1285 new_register(objectType), new_register(objectType), tmp3,
1286 x->direct_compare(), info_for_exception, patching_info, stub,
1287 x->profiled_method(), x->profiled_bci());
1288 }
1289
1290
1291 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1292 LIRItem obj(x->obj(), this);
1293
1294 // result and test object may not be in same register
1295 LIR_Opr reg = rlock_result(x);
1296 CodeEmitInfo* patching_info = nullptr;
1297 if ((!x->klass()->is_loaded() || PatchALot)) {
1298 // must do this before locking the destination register as an oop register
1299 patching_info = state_for(x, x->state_before());
1300 }
1301 obj.load_item();
1302 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1303 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1304 tmp3 = new_register(objectType);
1305 }
1306 __ instanceof(reg, obj.result(), x->klass(),
1307 new_register(objectType), new_register(objectType), tmp3,
1308 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1309 }
1310
1311 // Intrinsic for Class::isInstance
1312 address LIRGenerator::isInstance_entry() {
1313 return Runtime1::entry_for(C1StubId::is_instance_of_id);
1314 }
1315
1316
1317 void LIRGenerator::do_If(If* x) {
1318 assert(x->number_of_sux() == 2, "inconsistency");
1319 ValueTag tag = x->x()->type()->tag();
1320 bool is_safepoint = x->is_safepoint();
1321
1322 If::Condition cond = x->cond();
1323
1324 LIRItem xitem(x->x(), this);
1325 LIRItem yitem(x->y(), this);
1326 LIRItem* xin = &xitem;
1327 LIRItem* yin = &yitem;
1328
1329 if (tag == longTag) {
1330 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1331 // mirror for other conditions
1332 if (cond == If::gtr || cond == If::leq) {
1333 cond = Instruction::mirror(cond);
1334 xin = &yitem;
1335 yin = &xitem;
1336 }
1337 xin->set_destroys_register();
1338 }
1339 xin->load_item();
1340 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1341 // inline long zero
1342 yin->dont_load_item();
1343 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1344 // longs cannot handle constants at right side
1345 yin->load_item();
1346 } else {
1347 yin->dont_load_item();
1348 }
1349
1350 LIR_Opr left = xin->result();
1351 LIR_Opr right = yin->result();
1352
1353 set_no_result(x);
1354
1355 // add safepoint before generating condition code so it can be recomputed
1356 if (x->is_safepoint()) {
1357 // increment backedge counter if needed
1358 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1359 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1360 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1361 }
1362
1363 __ cmp(lir_cond(cond), left, right);
1364 // Generate branch profiling. Profiling code doesn't kill flags.
1365 profile_branch(x, cond);
1366 move_to_phi(x->state());
1367 if (x->x()->type()->is_float_kind()) {
1368 __ branch(lir_cond(cond), x->tsux(), x->usux());
1369 } else {
1370 __ branch(lir_cond(cond), x->tsux());
1371 }
1372 assert(x->default_sux() == x->fsux(), "wrong destination above");
1373 __ jump(x->default_sux());
1374 }
1375
1376
1377 LIR_Opr LIRGenerator::getThreadPointer() {
1378 return FrameMap::as_pointer_opr(r15_thread);
1379 }
1380
1381 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1382 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1383 LIR_OprList* args = new LIR_OprList();
1384 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1385 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1386 }
1387
1388
1389 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1390 CodeEmitInfo* info) {
1391 if (address->type() == T_LONG) {
1392 address = new LIR_Address(address->base(),
1393 address->index(), address->scale(),
1394 address->disp(), T_DOUBLE);
1395 // Transfer the value atomically by using FP moves. This means
1396 // the value has to be moved between CPU and FPU registers. It
1397 // always has to be moved through spill slot since there's no
1398 // quick way to pack the value into an SSE register.
1399 LIR_Opr temp_double = new_register(T_DOUBLE);
1400 LIR_Opr spill = new_register(T_LONG);
1401 set_vreg_flag(spill, must_start_in_memory);
1402 __ move(value, spill);
1403 __ volatile_move(spill, temp_double, T_LONG);
1404 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1405 } else {
1406 __ store(value, address, info);
1407 }
1408 }
1409
1410 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1411 CodeEmitInfo* info) {
1412 if (address->type() == T_LONG) {
1413 address = new LIR_Address(address->base(),
1414 address->index(), address->scale(),
1415 address->disp(), T_DOUBLE);
1416 // Transfer the value atomically by using FP moves. This means
1417 // the value has to be moved between CPU and FPU registers. In
1418 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1419 // SSE2+ mode it can be moved directly.
1420 LIR_Opr temp_double = new_register(T_DOUBLE);
1421 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1422 __ volatile_move(temp_double, result, T_LONG);
1423 } else {
1424 __ load(address, result, info);
1425 }
1426 }