1 /* 2 * Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_Compilation.hpp" 27 #include "c1/c1_FrameMap.hpp" 28 #include "c1/c1_Instruction.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_LIRGenerator.hpp" 31 #include "c1/c1_Runtime1.hpp" 32 #include "c1/c1_ValueStack.hpp" 33 #include "ci/ciArray.hpp" 34 #include "ci/ciObjArrayKlass.hpp" 35 #include "ci/ciTypeArrayKlass.hpp" 36 #include "gc/shared/c1/barrierSetC1.hpp" 37 #include "runtime/sharedRuntime.hpp" 38 #include "runtime/stubRoutines.hpp" 39 #include "utilities/powerOfTwo.hpp" 40 #include "vmreg_x86.inline.hpp" 41 42 #ifdef ASSERT 43 #define __ gen()->lir(__FILE__, __LINE__)-> 44 #else 45 #define __ gen()->lir()-> 46 #endif 47 48 // Item will be loaded into a byte register; Intel only 49 void LIRItem::load_byte_item() { 50 load_item(); 51 LIR_Opr res = result(); 52 53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 54 // make sure that it is a byte register 55 assert(!value()->type()->is_float() && !value()->type()->is_double(), 56 "can't load floats in byte register"); 57 LIR_Opr reg = _gen->rlock_byte(T_BYTE); 58 __ move(res, reg); 59 60 _result = reg; 61 } 62 } 63 64 65 void LIRItem::load_nonconstant() { 66 LIR_Opr r = value()->operand(); 67 if (r->is_constant()) { 68 _result = r; 69 } else { 70 load_item(); 71 } 72 } 73 74 //-------------------------------------------------------------- 75 // LIRGenerator 76 //-------------------------------------------------------------- 77 78 79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } 86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 88 89 90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 91 LIR_Opr opr; 92 switch (type->tag()) { 93 case intTag: opr = FrameMap::rax_opr; break; 94 case objectTag: opr = FrameMap::rax_oop_opr; break; 95 case longTag: opr = FrameMap::long0_opr; break; 96 #ifdef _LP64 97 case floatTag: opr = FrameMap::xmm0_float_opr; break; 98 case doubleTag: opr = FrameMap::xmm0_double_opr; break; 99 #else 100 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; 101 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; 102 #endif // _LP64 103 case addressTag: 104 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 105 } 106 107 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 108 return opr; 109 } 110 111 112 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 113 LIR_Opr reg = new_register(T_INT); 114 set_vreg_flag(reg, LIRGenerator::byte_reg); 115 return reg; 116 } 117 118 119 //--------- loading items into registers -------------------------------- 120 121 122 // i486 instructions can inline constants 123 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 124 if (type == T_SHORT || type == T_CHAR) { 125 return false; 126 } 127 Constant* c = v->as_Constant(); 128 if (c && c->state_before() == nullptr) { 129 // constants of any type can be stored directly, except for 130 // unloaded object constants. 131 return true; 132 } 133 return false; 134 } 135 136 137 bool LIRGenerator::can_inline_as_constant(Value v) const { 138 if (v->type()->tag() == longTag) return false; 139 return v->type()->tag() != objectTag || 140 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 141 } 142 143 144 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 145 if (c->type() == T_LONG) return false; 146 return c->type() != T_OBJECT || c->as_jobject() == nullptr; 147 } 148 149 150 LIR_Opr LIRGenerator::safepoint_poll_register() { 151 NOT_LP64( return new_register(T_ADDRESS); ) 152 return LIR_OprFact::illegalOpr; 153 } 154 155 156 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 157 int shift, int disp, BasicType type) { 158 assert(base->is_register(), "must be"); 159 if (index->is_constant()) { 160 LIR_Const *constant = index->as_constant_ptr(); 161 #ifdef _LP64 162 jlong c; 163 if (constant->type() == T_INT) { 164 c = (jlong(index->as_jint()) << shift) + disp; 165 } else { 166 assert(constant->type() == T_LONG, "should be"); 167 c = (index->as_jlong() << shift) + disp; 168 } 169 if ((jlong)((jint)c) == c) { 170 return new LIR_Address(base, (jint)c, type); 171 } else { 172 LIR_Opr tmp = new_register(T_LONG); 173 __ move(index, tmp); 174 return new LIR_Address(base, tmp, type); 175 } 176 #else 177 return new LIR_Address(base, 178 ((intx)(constant->as_jint()) << shift) + disp, 179 type); 180 #endif 181 } else { 182 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 183 } 184 } 185 186 187 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 188 BasicType type) { 189 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 190 191 LIR_Address* addr; 192 if (index_opr->is_constant()) { 193 int elem_size = type2aelembytes(type); 194 #ifdef _LP64 195 jint index = index_opr->as_jint(); 196 jlong disp = offset_in_bytes + (jlong)(index) * elem_size; 197 if (disp > max_jint) { 198 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses. 199 // Convert array index to long to do array offset computation with 64-bit values. 200 index_opr = new_register(T_LONG); 201 __ move(LIR_OprFact::longConst(index), index_opr); 202 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type); 203 } else { 204 addr = new LIR_Address(array_opr, (intx)disp, type); 205 } 206 #else 207 // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range! 208 // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will 209 // always be negative (i.e. underflows the 32-bit address range): 210 // Let N = 2^32: a + signed_overflow(disp) = a + disp - N. 211 // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then 212 // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always 213 // underflows the 32-bit address range: 214 // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N) 215 // = (a + disp - N) + N = a + disp 216 // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address 217 // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms. 218 addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type); 219 #endif // _LP64 220 } else { 221 #ifdef _LP64 222 if (index_opr->type() == T_INT) { 223 LIR_Opr tmp = new_register(T_LONG); 224 __ convert(Bytecodes::_i2l, index_opr, tmp); 225 index_opr = tmp; 226 } 227 #endif // _LP64 228 addr = new LIR_Address(array_opr, 229 index_opr, 230 LIR_Address::scale(type), 231 offset_in_bytes, type); 232 } 233 return addr; 234 } 235 236 237 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) { 238 LIR_Opr r; 239 if (type == T_LONG) { 240 r = LIR_OprFact::longConst(x); 241 } else if (type == T_INT) { 242 r = LIR_OprFact::intConst(checked_cast<jint>(x)); 243 } else { 244 ShouldNotReachHere(); 245 } 246 return r; 247 } 248 249 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 250 LIR_Opr pointer = new_pointer_register(); 251 __ move(LIR_OprFact::intptrConst(counter), pointer); 252 LIR_Address* addr = new LIR_Address(pointer, type); 253 increment_counter(addr, step); 254 } 255 256 257 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 258 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 259 } 260 261 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 262 __ cmp_mem_int(condition, base, disp, c, info); 263 } 264 265 266 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 267 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 268 } 269 270 271 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { 272 if (tmp->is_valid() && c > 0 && c < max_jint) { 273 if (is_power_of_2(c + 1)) { 274 __ move(left, tmp); 275 __ shift_left(left, log2i_exact(c + 1), left); 276 __ sub(left, tmp, result); 277 return true; 278 } else if (is_power_of_2(c - 1)) { 279 __ move(left, tmp); 280 __ shift_left(left, log2i_exact(c - 1), left); 281 __ add(left, tmp, result); 282 return true; 283 } 284 } 285 return false; 286 } 287 288 289 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 290 BasicType type = item->type(); 291 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 292 } 293 294 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) { 295 LIR_Opr tmp1 = new_register(objectType); 296 LIR_Opr tmp2 = new_register(objectType); 297 LIR_Opr tmp3 = new_register(objectType); 298 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci); 299 } 300 301 //---------------------------------------------------------------------- 302 // visitor functions 303 //---------------------------------------------------------------------- 304 305 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 306 assert(x->is_pinned(),""); 307 LIRItem obj(x->obj(), this); 308 obj.load_item(); 309 310 set_no_result(x); 311 312 // "lock" stores the address of the monitor stack slot, so this is not an oop 313 LIR_Opr lock = new_register(T_INT); 314 315 CodeEmitInfo* info_for_exception = nullptr; 316 if (x->needs_null_check()) { 317 info_for_exception = state_for(x); 318 } 319 // this CodeEmitInfo must not have the xhandlers because here the 320 // object is already locked (xhandlers expect object to be unlocked) 321 CodeEmitInfo* info = state_for(x, x->state(), true); 322 LIR_Opr tmp = LockingMode == LM_LIGHTWEIGHT ? new_register(T_ADDRESS) : LIR_OprFact::illegalOpr; 323 monitor_enter(obj.result(), lock, syncTempOpr(), tmp, 324 x->monitor_no(), info_for_exception, info); 325 } 326 327 328 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 329 assert(x->is_pinned(),""); 330 331 LIRItem obj(x->obj(), this); 332 obj.dont_load_item(); 333 334 LIR_Opr lock = new_register(T_INT); 335 LIR_Opr obj_temp = new_register(T_INT); 336 set_no_result(x); 337 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 338 } 339 340 // _ineg, _lneg, _fneg, _dneg 341 void LIRGenerator::do_NegateOp(NegateOp* x) { 342 LIRItem value(x->x(), this); 343 value.set_destroys_register(); 344 value.load_item(); 345 LIR_Opr reg = rlock(x); 346 347 LIR_Opr tmp = LIR_OprFact::illegalOpr; 348 #ifdef _LP64 349 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) { 350 if (x->type()->tag() == doubleTag) { 351 tmp = new_register(T_DOUBLE); 352 __ move(LIR_OprFact::doubleConst(-0.0), tmp); 353 } 354 else if (x->type()->tag() == floatTag) { 355 tmp = new_register(T_FLOAT); 356 __ move(LIR_OprFact::floatConst(-0.0), tmp); 357 } 358 } 359 #endif 360 __ negate(value.result(), reg, tmp); 361 362 set_result(x, round_item(reg)); 363 } 364 365 // for _fadd, _fmul, _fsub, _fdiv, _frem 366 // _dadd, _dmul, _dsub, _ddiv, _drem 367 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 368 LIRItem left(x->x(), this); 369 LIRItem right(x->y(), this); 370 LIRItem* left_arg = &left; 371 LIRItem* right_arg = &right; 372 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 373 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 374 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 375 left.load_item(); 376 } else { 377 left.dont_load_item(); 378 } 379 380 #ifndef _LP64 381 // do not load right operand if it is a constant. only 0 and 1 are 382 // loaded because there are special instructions for loading them 383 // without memory access (not needed for SSE2 instructions) 384 bool must_load_right = false; 385 if (right.is_constant()) { 386 LIR_Const* c = right.result()->as_constant_ptr(); 387 assert(c != nullptr, "invalid constant"); 388 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); 389 390 if (c->type() == T_FLOAT) { 391 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); 392 } else { 393 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); 394 } 395 } 396 #endif // !LP64 397 398 if (must_load_both) { 399 // frem and drem destroy also right operand, so move it to a new register 400 right.set_destroys_register(); 401 right.load_item(); 402 } else if (right.is_register()) { 403 right.load_item(); 404 #ifndef _LP64 405 } else if (must_load_right) { 406 right.load_item(); 407 #endif // !LP64 408 } else { 409 right.dont_load_item(); 410 } 411 LIR_Opr reg = rlock(x); 412 LIR_Opr tmp = LIR_OprFact::illegalOpr; 413 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) { 414 tmp = new_register(T_DOUBLE); 415 } 416 417 #ifdef _LP64 418 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) { 419 // frem and drem are implemented as a direct call into the runtime. 420 LIRItem left(x->x(), this); 421 LIRItem right(x->y(), this); 422 423 BasicType bt = as_BasicType(x->type()); 424 BasicTypeList signature(2); 425 signature.append(bt); 426 signature.append(bt); 427 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 428 429 const LIR_Opr result_reg = result_register_for(x->type()); 430 left.load_item_force(cc->at(0)); 431 right.load_item_force(cc->at(1)); 432 433 address entry = nullptr; 434 switch (x->op()) { 435 case Bytecodes::_frem: 436 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); 437 break; 438 case Bytecodes::_drem: 439 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); 440 break; 441 default: 442 ShouldNotReachHere(); 443 } 444 445 LIR_Opr result = rlock_result(x); 446 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 447 __ move(result_reg, result); 448 } else { 449 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp); 450 set_result(x, round_item(reg)); 451 } 452 #else 453 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { 454 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots 455 LIR_Opr fpu0, fpu1; 456 if (x->op() == Bytecodes::_frem) { 457 fpu0 = LIR_OprFact::single_fpu(0); 458 fpu1 = LIR_OprFact::single_fpu(1); 459 } else { 460 fpu0 = LIR_OprFact::double_fpu(0); 461 fpu1 = LIR_OprFact::double_fpu(1); 462 } 463 __ move(right.result(), fpu1); // order of left and right operand is important! 464 __ move(left.result(), fpu0); 465 __ rem (fpu0, fpu1, fpu0); 466 __ move(fpu0, reg); 467 468 } else { 469 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp); 470 } 471 set_result(x, round_item(reg)); 472 #endif // _LP64 473 } 474 475 476 // for _ladd, _lmul, _lsub, _ldiv, _lrem 477 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 478 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 479 // long division is implemented as a direct call into the runtime 480 LIRItem left(x->x(), this); 481 LIRItem right(x->y(), this); 482 483 // the check for division by zero destroys the right operand 484 right.set_destroys_register(); 485 486 BasicTypeList signature(2); 487 signature.append(T_LONG); 488 signature.append(T_LONG); 489 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 490 491 // check for division by zero (destroys registers of right operand!) 492 CodeEmitInfo* info = state_for(x); 493 494 const LIR_Opr result_reg = result_register_for(x->type()); 495 left.load_item_force(cc->at(1)); 496 right.load_item(); 497 498 __ move(right.result(), cc->at(0)); 499 500 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 501 __ branch(lir_cond_equal, new DivByZeroStub(info)); 502 503 address entry = nullptr; 504 switch (x->op()) { 505 case Bytecodes::_lrem: 506 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 507 break; // check if dividend is 0 is done elsewhere 508 case Bytecodes::_ldiv: 509 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 510 break; // check if dividend is 0 is done elsewhere 511 default: 512 ShouldNotReachHere(); 513 } 514 515 LIR_Opr result = rlock_result(x); 516 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 517 __ move(result_reg, result); 518 } else if (x->op() == Bytecodes::_lmul) { 519 // missing test if instr is commutative and if we should swap 520 LIRItem left(x->x(), this); 521 LIRItem right(x->y(), this); 522 523 // right register is destroyed by the long mul, so it must be 524 // copied to a new register. 525 right.set_destroys_register(); 526 527 left.load_item(); 528 right.load_item(); 529 530 LIR_Opr reg = FrameMap::long0_opr; 531 arithmetic_op_long(x->op(), reg, left.result(), right.result(), nullptr); 532 LIR_Opr result = rlock_result(x); 533 __ move(reg, result); 534 } else { 535 // missing test if instr is commutative and if we should swap 536 LIRItem left(x->x(), this); 537 LIRItem right(x->y(), this); 538 539 left.load_item(); 540 // don't load constants to save register 541 right.load_nonconstant(); 542 rlock_result(x); 543 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr); 544 } 545 } 546 547 548 549 // for: _iadd, _imul, _isub, _idiv, _irem 550 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 551 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 552 // The requirements for division and modulo 553 // input : rax,: dividend min_int 554 // reg: divisor (may not be rax,/rdx) -1 555 // 556 // output: rax,: quotient (= rax, idiv reg) min_int 557 // rdx: remainder (= rax, irem reg) 0 558 559 // rax, and rdx will be destroyed 560 561 // Note: does this invalidate the spec ??? 562 LIRItem right(x->y(), this); 563 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 564 565 // call state_for before load_item_force because state_for may 566 // force the evaluation of other instructions that are needed for 567 // correct debug info. Otherwise the live range of the fix 568 // register might be too long. 569 CodeEmitInfo* info = state_for(x); 570 571 left.load_item_force(divInOpr()); 572 573 right.load_item(); 574 575 LIR_Opr result = rlock_result(x); 576 LIR_Opr result_reg; 577 if (x->op() == Bytecodes::_idiv) { 578 result_reg = divOutOpr(); 579 } else { 580 result_reg = remOutOpr(); 581 } 582 583 if (!ImplicitDiv0Checks) { 584 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 585 __ branch(lir_cond_equal, new DivByZeroStub(info)); 586 // Idiv/irem cannot trap (passing info would generate an assertion). 587 info = nullptr; 588 } 589 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 590 if (x->op() == Bytecodes::_irem) { 591 __ irem(left.result(), right.result(), result_reg, tmp, info); 592 } else if (x->op() == Bytecodes::_idiv) { 593 __ idiv(left.result(), right.result(), result_reg, tmp, info); 594 } else { 595 ShouldNotReachHere(); 596 } 597 598 __ move(result_reg, result); 599 } else { 600 // missing test if instr is commutative and if we should swap 601 LIRItem left(x->x(), this); 602 LIRItem right(x->y(), this); 603 LIRItem* left_arg = &left; 604 LIRItem* right_arg = &right; 605 if (x->is_commutative() && left.is_stack() && right.is_register()) { 606 // swap them if left is real stack (or cached) and right is real register(not cached) 607 left_arg = &right; 608 right_arg = &left; 609 } 610 611 left_arg->load_item(); 612 613 // do not need to load right, as we can handle stack and constants 614 if (x->op() == Bytecodes::_imul ) { 615 // check if we can use shift instead 616 bool use_constant = false; 617 bool use_tmp = false; 618 if (right_arg->is_constant()) { 619 jint iconst = right_arg->get_jint_constant(); 620 if (iconst > 0 && iconst < max_jint) { 621 if (is_power_of_2(iconst)) { 622 use_constant = true; 623 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 624 use_constant = true; 625 use_tmp = true; 626 } 627 } 628 } 629 if (use_constant) { 630 right_arg->dont_load_item(); 631 } else { 632 right_arg->load_item(); 633 } 634 LIR_Opr tmp = LIR_OprFact::illegalOpr; 635 if (use_tmp) { 636 tmp = new_register(T_INT); 637 } 638 rlock_result(x); 639 640 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 641 } else { 642 right_arg->dont_load_item(); 643 rlock_result(x); 644 LIR_Opr tmp = LIR_OprFact::illegalOpr; 645 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 646 } 647 } 648 } 649 650 651 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 652 // when an operand with use count 1 is the left operand, then it is 653 // likely that no move for 2-operand-LIR-form is necessary 654 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) { 655 x->swap_operands(); 656 } 657 658 ValueTag tag = x->type()->tag(); 659 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 660 switch (tag) { 661 case floatTag: 662 case doubleTag: do_ArithmeticOp_FPU(x); return; 663 case longTag: do_ArithmeticOp_Long(x); return; 664 case intTag: do_ArithmeticOp_Int(x); return; 665 default: ShouldNotReachHere(); return; 666 } 667 } 668 669 670 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 671 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 672 // count must always be in rcx 673 LIRItem value(x->x(), this); 674 LIRItem count(x->y(), this); 675 676 ValueTag elemType = x->type()->tag(); 677 bool must_load_count = !count.is_constant() || elemType == longTag; 678 if (must_load_count) { 679 // count for long must be in register 680 count.load_item_force(shiftCountOpr()); 681 } else { 682 count.dont_load_item(); 683 } 684 value.load_item(); 685 LIR_Opr reg = rlock_result(x); 686 687 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 688 } 689 690 691 // _iand, _land, _ior, _lor, _ixor, _lxor 692 void LIRGenerator::do_LogicOp(LogicOp* x) { 693 // when an operand with use count 1 is the left operand, then it is 694 // likely that no move for 2-operand-LIR-form is necessary 695 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) { 696 x->swap_operands(); 697 } 698 699 LIRItem left(x->x(), this); 700 LIRItem right(x->y(), this); 701 702 left.load_item(); 703 right.load_nonconstant(); 704 LIR_Opr reg = rlock_result(x); 705 706 logic_op(x->op(), reg, left.result(), right.result()); 707 } 708 709 710 711 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 712 void LIRGenerator::do_CompareOp(CompareOp* x) { 713 LIRItem left(x->x(), this); 714 LIRItem right(x->y(), this); 715 ValueTag tag = x->x()->type()->tag(); 716 if (tag == longTag) { 717 left.set_destroys_register(); 718 } 719 left.load_item(); 720 right.load_item(); 721 LIR_Opr reg = rlock_result(x); 722 723 if (x->x()->type()->is_float_kind()) { 724 Bytecodes::Code code = x->op(); 725 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 726 } else if (x->x()->type()->tag() == longTag) { 727 __ lcmp2int(left.result(), right.result(), reg); 728 } else { 729 Unimplemented(); 730 } 731 } 732 733 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { 734 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 735 if (is_reference_type(type)) { 736 cmp_value.load_item_force(FrameMap::rax_oop_opr); 737 new_value.load_item(); 738 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 739 } else if (type == T_INT) { 740 cmp_value.load_item_force(FrameMap::rax_opr); 741 new_value.load_item(); 742 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 743 } else if (type == T_LONG) { 744 cmp_value.load_item_force(FrameMap::long0_opr); 745 new_value.load_item_force(FrameMap::long1_opr); 746 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 747 } else { 748 Unimplemented(); 749 } 750 LIR_Opr result = new_register(T_INT); 751 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 752 result, T_INT); 753 return result; 754 } 755 756 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { 757 bool is_oop = is_reference_type(type); 758 LIR_Opr result = new_register(type); 759 value.load_item(); 760 // Because we want a 2-arg form of xchg and xadd 761 __ move(value.result(), result); 762 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type"); 763 __ xchg(addr, result, result, LIR_OprFact::illegalOpr); 764 return result; 765 } 766 767 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) { 768 LIR_Opr result = new_register(type); 769 value.load_item(); 770 // Because we want a 2-arg form of xchg and xadd 771 __ move(value.result(), result); 772 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type"); 773 __ xadd(addr, result, result, LIR_OprFact::illegalOpr); 774 return result; 775 } 776 777 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { 778 assert(x->number_of_arguments() == 3, "wrong type"); 779 assert(UseFMA, "Needs FMA instructions support."); 780 LIRItem value(x->argument_at(0), this); 781 LIRItem value1(x->argument_at(1), this); 782 LIRItem value2(x->argument_at(2), this); 783 784 value2.set_destroys_register(); 785 786 value.load_item(); 787 value1.load_item(); 788 value2.load_item(); 789 790 LIR_Opr calc_input = value.result(); 791 LIR_Opr calc_input1 = value1.result(); 792 LIR_Opr calc_input2 = value2.result(); 793 LIR_Opr calc_result = rlock_result(x); 794 795 switch (x->id()) { 796 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break; 797 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break; 798 default: ShouldNotReachHere(); 799 } 800 801 } 802 803 804 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 805 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); 806 807 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog || 808 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos || 809 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan || 810 x->id() == vmIntrinsics::_dlog10) { 811 do_LibmIntrinsic(x); 812 return; 813 } 814 815 LIRItem value(x->argument_at(0), this); 816 817 bool use_fpu = false; 818 #ifndef _LP64 819 if (UseSSE < 2) { 820 value.set_destroys_register(); 821 } 822 #endif // !LP64 823 value.load_item(); 824 825 LIR_Opr calc_input = value.result(); 826 LIR_Opr calc_result = rlock_result(x); 827 828 LIR_Opr tmp = LIR_OprFact::illegalOpr; 829 #ifdef _LP64 830 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) && 831 (x->id() == vmIntrinsics::_dabs)) { 832 tmp = new_register(T_DOUBLE); 833 __ move(LIR_OprFact::doubleConst(-0.0), tmp); 834 } 835 #endif 836 if (x->id() == vmIntrinsics::_floatToFloat16) { 837 tmp = new_register(T_FLOAT); 838 __ move(LIR_OprFact::floatConst(-0.0), tmp); 839 } 840 841 switch(x->id()) { 842 case vmIntrinsics::_dabs: 843 __ abs(calc_input, calc_result, tmp); 844 break; 845 case vmIntrinsics::_dsqrt: 846 case vmIntrinsics::_dsqrt_strict: 847 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr); 848 break; 849 case vmIntrinsics::_floatToFloat16: 850 __ f2hf(calc_input, calc_result, tmp); 851 break; 852 case vmIntrinsics::_float16ToFloat: 853 __ hf2f(calc_input, calc_result, LIR_OprFact::illegalOpr); 854 break; 855 default: 856 ShouldNotReachHere(); 857 } 858 859 if (use_fpu) { 860 __ move(calc_result, x->operand()); 861 } 862 } 863 864 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) { 865 LIRItem value(x->argument_at(0), this); 866 value.set_destroys_register(); 867 868 LIR_Opr calc_result = rlock_result(x); 869 LIR_Opr result_reg = result_register_for(x->type()); 870 871 CallingConvention* cc = nullptr; 872 873 if (x->id() == vmIntrinsics::_dpow) { 874 LIRItem value1(x->argument_at(1), this); 875 876 value1.set_destroys_register(); 877 878 BasicTypeList signature(2); 879 signature.append(T_DOUBLE); 880 signature.append(T_DOUBLE); 881 cc = frame_map()->c_calling_convention(&signature); 882 value.load_item_force(cc->at(0)); 883 value1.load_item_force(cc->at(1)); 884 } else { 885 BasicTypeList signature(1); 886 signature.append(T_DOUBLE); 887 cc = frame_map()->c_calling_convention(&signature); 888 value.load_item_force(cc->at(0)); 889 } 890 891 #ifndef _LP64 892 LIR_Opr tmp = FrameMap::fpu0_double_opr; 893 result_reg = tmp; 894 switch(x->id()) { 895 case vmIntrinsics::_dexp: 896 if (StubRoutines::dexp() != nullptr) { 897 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 898 } else { 899 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 900 } 901 break; 902 case vmIntrinsics::_dlog: 903 if (StubRoutines::dlog() != nullptr) { 904 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 905 } else { 906 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 907 } 908 break; 909 case vmIntrinsics::_dlog10: 910 if (StubRoutines::dlog10() != nullptr) { 911 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 912 } else { 913 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 914 } 915 break; 916 case vmIntrinsics::_dpow: 917 if (StubRoutines::dpow() != nullptr) { 918 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 919 } else { 920 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 921 } 922 break; 923 case vmIntrinsics::_dsin: 924 if (VM_Version::supports_sse2() && StubRoutines::dsin() != nullptr) { 925 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 926 } else { 927 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 928 } 929 break; 930 case vmIntrinsics::_dcos: 931 if (VM_Version::supports_sse2() && StubRoutines::dcos() != nullptr) { 932 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 933 } else { 934 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 935 } 936 break; 937 case vmIntrinsics::_dtan: 938 if (StubRoutines::dtan() != nullptr) { 939 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 940 } else { 941 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 942 } 943 break; 944 default: ShouldNotReachHere(); 945 } 946 #else 947 switch (x->id()) { 948 case vmIntrinsics::_dexp: 949 if (StubRoutines::dexp() != nullptr) { 950 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 951 } else { 952 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 953 } 954 break; 955 case vmIntrinsics::_dlog: 956 if (StubRoutines::dlog() != nullptr) { 957 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 958 } else { 959 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 960 } 961 break; 962 case vmIntrinsics::_dlog10: 963 if (StubRoutines::dlog10() != nullptr) { 964 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 965 } else { 966 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 967 } 968 break; 969 case vmIntrinsics::_dpow: 970 if (StubRoutines::dpow() != nullptr) { 971 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 972 } else { 973 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 974 } 975 break; 976 case vmIntrinsics::_dsin: 977 if (StubRoutines::dsin() != nullptr) { 978 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 979 } else { 980 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 981 } 982 break; 983 case vmIntrinsics::_dcos: 984 if (StubRoutines::dcos() != nullptr) { 985 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 986 } else { 987 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 988 } 989 break; 990 case vmIntrinsics::_dtan: 991 if (StubRoutines::dtan() != nullptr) { 992 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 993 } else { 994 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 995 } 996 break; 997 default: ShouldNotReachHere(); 998 } 999 #endif // _LP64 1000 __ move(result_reg, calc_result); 1001 } 1002 1003 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 1004 assert(x->number_of_arguments() == 5, "wrong type"); 1005 1006 // Make all state_for calls early since they can emit code 1007 CodeEmitInfo* info = nullptr; 1008 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) { 1009 info = state_for(x, x->state_before()); 1010 info->set_force_reexecute(); 1011 } else { 1012 info = state_for(x, x->state()); 1013 } 1014 1015 LIRItem src(x->argument_at(0), this); 1016 LIRItem src_pos(x->argument_at(1), this); 1017 LIRItem dst(x->argument_at(2), this); 1018 LIRItem dst_pos(x->argument_at(3), this); 1019 LIRItem length(x->argument_at(4), this); 1020 1021 // operands for arraycopy must use fixed registers, otherwise 1022 // LinearScan will fail allocation (because arraycopy always needs a 1023 // call) 1024 1025 int flags; 1026 ciArrayKlass* expected_type; 1027 arraycopy_helper(x, &flags, &expected_type); 1028 if (x->check_flag(Instruction::OmitChecksFlag)) { 1029 flags = 0; 1030 } 1031 1032 #ifndef _LP64 1033 src.load_item_force (FrameMap::rcx_oop_opr); 1034 src_pos.load_item_force (FrameMap::rdx_opr); 1035 dst.load_item_force (FrameMap::rax_oop_opr); 1036 dst_pos.load_item_force (FrameMap::rbx_opr); 1037 length.load_item_force (FrameMap::rdi_opr); 1038 LIR_Opr tmp = (FrameMap::rsi_opr); 1039 1040 if (expected_type != nullptr && flags == 0) { 1041 FrameMap* f = Compilation::current()->frame_map(); 1042 f->update_reserved_argument_area_size(3 * BytesPerWord); 1043 } 1044 #else 1045 1046 // The java calling convention will give us enough registers 1047 // so that on the stub side the args will be perfect already. 1048 // On the other slow/special case side we call C and the arg 1049 // positions are not similar enough to pick one as the best. 1050 // Also because the java calling convention is a "shifted" version 1051 // of the C convention we can process the java args trivially into C 1052 // args without worry of overwriting during the xfer 1053 1054 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 1055 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 1056 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 1057 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 1058 length.load_item_force (FrameMap::as_opr(j_rarg4)); 1059 1060 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 1061 #endif // LP64 1062 1063 set_no_result(x); 1064 1065 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 1066 } 1067 1068 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 1069 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support"); 1070 // Make all state_for calls early since they can emit code 1071 LIR_Opr result = rlock_result(x); 1072 int flags = 0; 1073 switch (x->id()) { 1074 case vmIntrinsics::_updateCRC32: { 1075 LIRItem crc(x->argument_at(0), this); 1076 LIRItem val(x->argument_at(1), this); 1077 // val is destroyed by update_crc32 1078 val.set_destroys_register(); 1079 crc.load_item(); 1080 val.load_item(); 1081 __ update_crc32(crc.result(), val.result(), result); 1082 break; 1083 } 1084 case vmIntrinsics::_updateBytesCRC32: 1085 case vmIntrinsics::_updateByteBufferCRC32: { 1086 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 1087 1088 LIRItem crc(x->argument_at(0), this); 1089 LIRItem buf(x->argument_at(1), this); 1090 LIRItem off(x->argument_at(2), this); 1091 LIRItem len(x->argument_at(3), this); 1092 buf.load_item(); 1093 off.load_nonconstant(); 1094 1095 LIR_Opr index = off.result(); 1096 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1097 if(off.result()->is_constant()) { 1098 index = LIR_OprFact::illegalOpr; 1099 offset += off.result()->as_jint(); 1100 } 1101 LIR_Opr base_op = buf.result(); 1102 1103 #ifndef _LP64 1104 if (!is_updateBytes) { // long b raw address 1105 base_op = new_register(T_INT); 1106 __ convert(Bytecodes::_l2i, buf.result(), base_op); 1107 } 1108 #else 1109 if (index->is_valid()) { 1110 LIR_Opr tmp = new_register(T_LONG); 1111 __ convert(Bytecodes::_i2l, index, tmp); 1112 index = tmp; 1113 } 1114 #endif 1115 1116 LIR_Address* a = new LIR_Address(base_op, 1117 index, 1118 offset, 1119 T_BYTE); 1120 BasicTypeList signature(3); 1121 signature.append(T_INT); 1122 signature.append(T_ADDRESS); 1123 signature.append(T_INT); 1124 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1125 const LIR_Opr result_reg = result_register_for(x->type()); 1126 1127 LIR_Opr addr = new_pointer_register(); 1128 __ leal(LIR_OprFact::address(a), addr); 1129 1130 crc.load_item_force(cc->at(0)); 1131 __ move(addr, cc->at(1)); 1132 len.load_item_force(cc->at(2)); 1133 1134 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); 1135 __ move(result_reg, result); 1136 1137 break; 1138 } 1139 default: { 1140 ShouldNotReachHere(); 1141 } 1142 } 1143 } 1144 1145 void LIRGenerator::do_update_CRC32C(Intrinsic* x) { 1146 Unimplemented(); 1147 } 1148 1149 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { 1150 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support"); 1151 1152 // Make all state_for calls early since they can emit code 1153 LIR_Opr result = rlock_result(x); 1154 1155 LIRItem a(x->argument_at(0), this); // Object 1156 LIRItem aOffset(x->argument_at(1), this); // long 1157 LIRItem b(x->argument_at(2), this); // Object 1158 LIRItem bOffset(x->argument_at(3), this); // long 1159 LIRItem length(x->argument_at(4), this); // int 1160 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int 1161 1162 a.load_item(); 1163 aOffset.load_nonconstant(); 1164 b.load_item(); 1165 bOffset.load_nonconstant(); 1166 1167 long constant_aOffset = 0; 1168 LIR_Opr result_aOffset = aOffset.result(); 1169 if (result_aOffset->is_constant()) { 1170 constant_aOffset = result_aOffset->as_jlong(); 1171 result_aOffset = LIR_OprFact::illegalOpr; 1172 } 1173 LIR_Opr result_a = a.result(); 1174 1175 long constant_bOffset = 0; 1176 LIR_Opr result_bOffset = bOffset.result(); 1177 if (result_bOffset->is_constant()) { 1178 constant_bOffset = result_bOffset->as_jlong(); 1179 result_bOffset = LIR_OprFact::illegalOpr; 1180 } 1181 LIR_Opr result_b = b.result(); 1182 1183 #ifndef _LP64 1184 result_a = new_register(T_INT); 1185 __ convert(Bytecodes::_l2i, a.result(), result_a); 1186 result_b = new_register(T_INT); 1187 __ convert(Bytecodes::_l2i, b.result(), result_b); 1188 #endif 1189 1190 1191 LIR_Address* addr_a = new LIR_Address(result_a, 1192 result_aOffset, 1193 constant_aOffset, 1194 T_BYTE); 1195 1196 LIR_Address* addr_b = new LIR_Address(result_b, 1197 result_bOffset, 1198 constant_bOffset, 1199 T_BYTE); 1200 1201 BasicTypeList signature(4); 1202 signature.append(T_ADDRESS); 1203 signature.append(T_ADDRESS); 1204 signature.append(T_INT); 1205 signature.append(T_INT); 1206 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1207 const LIR_Opr result_reg = result_register_for(x->type()); 1208 1209 LIR_Opr ptr_addr_a = new_pointer_register(); 1210 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a); 1211 1212 LIR_Opr ptr_addr_b = new_pointer_register(); 1213 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b); 1214 1215 __ move(ptr_addr_a, cc->at(0)); 1216 __ move(ptr_addr_b, cc->at(1)); 1217 length.load_item_force(cc->at(2)); 1218 log2ArrayIndexScale.load_item_force(cc->at(3)); 1219 1220 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args()); 1221 __ move(result_reg, result); 1222 } 1223 1224 #ifndef _LP64 1225 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 1226 // _i2b, _i2c, _i2s 1227 static LIR_Opr fixed_register_for(BasicType type) { 1228 switch (type) { 1229 case T_FLOAT: return FrameMap::fpu0_float_opr; 1230 case T_DOUBLE: return FrameMap::fpu0_double_opr; 1231 case T_INT: return FrameMap::rax_opr; 1232 case T_LONG: return FrameMap::long0_opr; 1233 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 1234 } 1235 } 1236 #endif 1237 1238 void LIRGenerator::do_Convert(Convert* x) { 1239 #ifdef _LP64 1240 LIRItem value(x->value(), this); 1241 value.load_item(); 1242 LIR_Opr input = value.result(); 1243 LIR_Opr result = rlock(x); 1244 __ convert(x->op(), input, result); 1245 assert(result->is_virtual(), "result must be virtual register"); 1246 set_result(x, result); 1247 #else 1248 // flags that vary for the different operations and different SSE-settings 1249 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false; 1250 1251 switch (x->op()) { 1252 case Bytecodes::_i2l: // fall through 1253 case Bytecodes::_l2i: // fall through 1254 case Bytecodes::_i2b: // fall through 1255 case Bytecodes::_i2c: // fall through 1256 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1257 1258 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; 1259 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; 1260 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; 1261 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1262 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1263 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1264 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; 1265 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; 1266 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1267 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1268 default: ShouldNotReachHere(); 1269 } 1270 1271 LIRItem value(x->value(), this); 1272 value.load_item(); 1273 LIR_Opr input = value.result(); 1274 LIR_Opr result = rlock(x); 1275 1276 // arguments of lir_convert 1277 LIR_Opr conv_input = input; 1278 LIR_Opr conv_result = result; 1279 ConversionStub* stub = nullptr; 1280 1281 if (fixed_input) { 1282 conv_input = fixed_register_for(input->type()); 1283 __ move(input, conv_input); 1284 } 1285 1286 assert(fixed_result == false || round_result == false, "cannot set both"); 1287 if (fixed_result) { 1288 conv_result = fixed_register_for(result->type()); 1289 } else if (round_result) { 1290 result = new_register(result->type()); 1291 set_vreg_flag(result, must_start_in_memory); 1292 } 1293 1294 if (needs_stub) { 1295 stub = new ConversionStub(x->op(), conv_input, conv_result); 1296 } 1297 1298 __ convert(x->op(), conv_input, conv_result, stub); 1299 1300 if (result != conv_result) { 1301 __ move(conv_result, result); 1302 } 1303 1304 assert(result->is_virtual(), "result must be virtual register"); 1305 set_result(x, result); 1306 #endif // _LP64 1307 } 1308 1309 1310 void LIRGenerator::do_NewInstance(NewInstance* x) { 1311 print_if_not_loaded(x); 1312 1313 CodeEmitInfo* info = state_for(x, x->state()); 1314 LIR_Opr reg = result_register_for(x->type()); 1315 new_instance(reg, x->klass(), x->is_unresolved(), 1316 FrameMap::rcx_oop_opr, 1317 FrameMap::rdi_oop_opr, 1318 FrameMap::rsi_oop_opr, 1319 LIR_OprFact::illegalOpr, 1320 FrameMap::rdx_metadata_opr, info); 1321 LIR_Opr result = rlock_result(x); 1322 __ move(reg, result); 1323 } 1324 1325 1326 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 1327 CodeEmitInfo* info = nullptr; 1328 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) { 1329 info = state_for(x, x->state_before()); 1330 info->set_force_reexecute(); 1331 } else { 1332 info = state_for(x, x->state()); 1333 } 1334 1335 LIRItem length(x->length(), this); 1336 length.load_item_force(FrameMap::rbx_opr); 1337 1338 LIR_Opr reg = result_register_for(x->type()); 1339 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1340 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1341 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1342 LIR_Opr tmp4 = reg; 1343 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1344 LIR_Opr len = length.result(); 1345 BasicType elem_type = x->elt_type(); 1346 1347 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1348 1349 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1350 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array()); 1351 1352 LIR_Opr result = rlock_result(x); 1353 __ move(reg, result); 1354 } 1355 1356 1357 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1358 LIRItem length(x->length(), this); 1359 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1360 // and therefore provide the state before the parameters have been consumed 1361 CodeEmitInfo* patching_info = nullptr; 1362 if (!x->klass()->is_loaded() || PatchALot) { 1363 patching_info = state_for(x, x->state_before()); 1364 } 1365 1366 CodeEmitInfo* info = state_for(x, x->state()); 1367 1368 const LIR_Opr reg = result_register_for(x->type()); 1369 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1370 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1371 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1372 LIR_Opr tmp4 = reg; 1373 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1374 1375 length.load_item_force(FrameMap::rbx_opr); 1376 LIR_Opr len = length.result(); 1377 1378 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 1379 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass()); 1380 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1381 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1382 } 1383 klass2reg_with_patching(klass_reg, obj, patching_info); 1384 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1385 1386 LIR_Opr result = rlock_result(x); 1387 __ move(reg, result); 1388 } 1389 1390 1391 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1392 Values* dims = x->dims(); 1393 int i = dims->length(); 1394 LIRItemList* items = new LIRItemList(i, i, nullptr); 1395 while (i-- > 0) { 1396 LIRItem* size = new LIRItem(dims->at(i), this); 1397 items->at_put(i, size); 1398 } 1399 1400 // Evaluate state_for early since it may emit code. 1401 CodeEmitInfo* patching_info = nullptr; 1402 if (!x->klass()->is_loaded() || PatchALot) { 1403 patching_info = state_for(x, x->state_before()); 1404 1405 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1406 // clone all handlers (NOTE: Usually this is handled transparently 1407 // by the CodeEmitInfo cloning logic in CodeStub constructors but 1408 // is done explicitly here because a stub isn't being used). 1409 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1410 } 1411 CodeEmitInfo* info = state_for(x, x->state()); 1412 1413 i = dims->length(); 1414 while (i-- > 0) { 1415 LIRItem* size = items->at(i); 1416 size->load_nonconstant(); 1417 1418 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1419 } 1420 1421 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; 1422 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 1423 1424 LIR_Opr rank = FrameMap::rbx_opr; 1425 __ move(LIR_OprFact::intConst(x->rank()), rank); 1426 LIR_Opr varargs = FrameMap::rcx_opr; 1427 __ move(FrameMap::rsp_opr, varargs); 1428 LIR_OprList* args = new LIR_OprList(3); 1429 args->append(klass_reg); 1430 args->append(rank); 1431 args->append(varargs); 1432 LIR_Opr reg = result_register_for(x->type()); 1433 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 1434 LIR_OprFact::illegalOpr, 1435 reg, args, info); 1436 1437 LIR_Opr result = rlock_result(x); 1438 __ move(reg, result); 1439 } 1440 1441 1442 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1443 // nothing to do for now 1444 } 1445 1446 1447 void LIRGenerator::do_CheckCast(CheckCast* x) { 1448 LIRItem obj(x->obj(), this); 1449 1450 CodeEmitInfo* patching_info = nullptr; 1451 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) { 1452 // must do this before locking the destination register as an oop register, 1453 // and before the obj is loaded (the latter is for deoptimization) 1454 patching_info = state_for(x, x->state_before()); 1455 } 1456 obj.load_item(); 1457 1458 // info for exceptions 1459 CodeEmitInfo* info_for_exception = 1460 (x->needs_exception_state() ? state_for(x) : 1461 state_for(x, x->state_before(), true /*ignore_xhandler*/)); 1462 1463 CodeStub* stub; 1464 if (x->is_incompatible_class_change_check()) { 1465 assert(patching_info == nullptr, "can't patch this"); 1466 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1467 } else if (x->is_invokespecial_receiver_check()) { 1468 assert(patching_info == nullptr, "can't patch this"); 1469 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none); 1470 } else { 1471 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1472 } 1473 LIR_Opr reg = rlock_result(x); 1474 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1475 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1476 tmp3 = new_register(objectType); 1477 } 1478 __ checkcast(reg, obj.result(), x->klass(), 1479 new_register(objectType), new_register(objectType), tmp3, 1480 x->direct_compare(), info_for_exception, patching_info, stub, 1481 x->profiled_method(), x->profiled_bci()); 1482 } 1483 1484 1485 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1486 LIRItem obj(x->obj(), this); 1487 1488 // result and test object may not be in same register 1489 LIR_Opr reg = rlock_result(x); 1490 CodeEmitInfo* patching_info = nullptr; 1491 if ((!x->klass()->is_loaded() || PatchALot)) { 1492 // must do this before locking the destination register as an oop register 1493 patching_info = state_for(x, x->state_before()); 1494 } 1495 obj.load_item(); 1496 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1497 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1498 tmp3 = new_register(objectType); 1499 } 1500 __ instanceof(reg, obj.result(), x->klass(), 1501 new_register(objectType), new_register(objectType), tmp3, 1502 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); 1503 } 1504 1505 1506 void LIRGenerator::do_If(If* x) { 1507 assert(x->number_of_sux() == 2, "inconsistency"); 1508 ValueTag tag = x->x()->type()->tag(); 1509 bool is_safepoint = x->is_safepoint(); 1510 1511 If::Condition cond = x->cond(); 1512 1513 LIRItem xitem(x->x(), this); 1514 LIRItem yitem(x->y(), this); 1515 LIRItem* xin = &xitem; 1516 LIRItem* yin = &yitem; 1517 1518 if (tag == longTag) { 1519 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1520 // mirror for other conditions 1521 if (cond == If::gtr || cond == If::leq) { 1522 cond = Instruction::mirror(cond); 1523 xin = &yitem; 1524 yin = &xitem; 1525 } 1526 xin->set_destroys_register(); 1527 } 1528 xin->load_item(); 1529 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1530 // inline long zero 1531 yin->dont_load_item(); 1532 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 1533 // longs cannot handle constants at right side 1534 yin->load_item(); 1535 } else { 1536 yin->dont_load_item(); 1537 } 1538 1539 LIR_Opr left = xin->result(); 1540 LIR_Opr right = yin->result(); 1541 1542 set_no_result(x); 1543 1544 // add safepoint before generating condition code so it can be recomputed 1545 if (x->is_safepoint()) { 1546 // increment backedge counter if needed 1547 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()), 1548 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci()); 1549 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before())); 1550 } 1551 1552 __ cmp(lir_cond(cond), left, right); 1553 // Generate branch profiling. Profiling code doesn't kill flags. 1554 profile_branch(x, cond); 1555 move_to_phi(x->state()); 1556 if (x->x()->type()->is_float_kind()) { 1557 __ branch(lir_cond(cond), x->tsux(), x->usux()); 1558 } else { 1559 __ branch(lir_cond(cond), x->tsux()); 1560 } 1561 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1562 __ jump(x->default_sux()); 1563 } 1564 1565 1566 LIR_Opr LIRGenerator::getThreadPointer() { 1567 #ifdef _LP64 1568 return FrameMap::as_pointer_opr(r15_thread); 1569 #else 1570 LIR_Opr result = new_register(T_INT); 1571 __ get_thread(result); 1572 return result; 1573 #endif // 1574 } 1575 1576 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1577 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1578 LIR_OprList* args = new LIR_OprList(); 1579 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1580 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1581 } 1582 1583 1584 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1585 CodeEmitInfo* info) { 1586 if (address->type() == T_LONG) { 1587 address = new LIR_Address(address->base(), 1588 address->index(), address->scale(), 1589 address->disp(), T_DOUBLE); 1590 // Transfer the value atomically by using FP moves. This means 1591 // the value has to be moved between CPU and FPU registers. It 1592 // always has to be moved through spill slot since there's no 1593 // quick way to pack the value into an SSE register. 1594 LIR_Opr temp_double = new_register(T_DOUBLE); 1595 LIR_Opr spill = new_register(T_LONG); 1596 set_vreg_flag(spill, must_start_in_memory); 1597 __ move(value, spill); 1598 __ volatile_move(spill, temp_double, T_LONG); 1599 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1600 } else { 1601 __ store(value, address, info); 1602 } 1603 } 1604 1605 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1606 CodeEmitInfo* info) { 1607 if (address->type() == T_LONG) { 1608 address = new LIR_Address(address->base(), 1609 address->index(), address->scale(), 1610 address->disp(), T_DOUBLE); 1611 // Transfer the value atomically by using FP moves. This means 1612 // the value has to be moved between CPU and FPU registers. In 1613 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1614 // SSE2+ mode it can be moved directly. 1615 LIR_Opr temp_double = new_register(T_DOUBLE); 1616 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1617 __ volatile_move(temp_double, result, T_LONG); 1618 #ifndef _LP64 1619 if (UseSSE < 2) { 1620 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible 1621 set_vreg_flag(result, must_start_in_memory); 1622 } 1623 #endif // !LP64 1624 } else { 1625 __ load(address, result, info); 1626 } 1627 }