1 /*
2 * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciInlineKlass.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "gc/shared/c1/barrierSetC1.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "utilities/powerOfTwo.hpp"
41 #include "vmreg_x86.inline.hpp"
42
43 #ifdef ASSERT
44 #define __ gen()->lir(__FILE__, __LINE__)->
45 #else
46 #define __ gen()->lir()->
47 #endif
48
49 // Item will be loaded into a byte register; Intel only
50 void LIRItem::load_byte_item() {
51 load_item();
52 LIR_Opr res = result();
53
54 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
55 // make sure that it is a byte register
56 assert(!value()->type()->is_float() && !value()->type()->is_double(),
57 "can't load floats in byte register");
58 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
59 __ move(res, reg);
60
61 _result = reg;
62 }
63 }
64
65
66 void LIRItem::load_nonconstant() {
67 LIR_Opr r = value()->operand();
68 if (r->is_constant()) {
69 _result = r;
70 } else {
71 load_item();
72 }
73 }
74
75 //--------------------------------------------------------------
76 // LIRGenerator
77 //--------------------------------------------------------------
78
79
80 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
81 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
84 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
85 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
86 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
87 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
88 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
89
90
91 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
92 LIR_Opr opr;
93 switch (type->tag()) {
94 case intTag: opr = FrameMap::rax_opr; break;
95 case objectTag: opr = FrameMap::rax_oop_opr; break;
96 case longTag: opr = FrameMap::long0_opr; break;
97 #ifdef _LP64
98 case floatTag: opr = FrameMap::xmm0_float_opr; break;
99 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
100 #else
101 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
102 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
103 #endif // _LP64
104 case addressTag:
105 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
106 }
107
108 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
109 return opr;
110 }
111
112
113 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
114 LIR_Opr reg = new_register(T_INT);
115 set_vreg_flag(reg, LIRGenerator::byte_reg);
116 return reg;
117 }
118
119
120 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
121 // We just need one 32-bit temp register for x86/x64, to check whether both
122 // oops have markWord::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck().
123 // @temp = %r10d
124 // mov $0x405, %r10d
125 // and (%left), %r10d /* if need to check left */
126 // and (%right), %r10d /* if need to check right */
127 // cmp $0x405, $r10d
128 // jne L_oops_not_equal
129 tmp1 = new_register(T_INT);
130 tmp2 = LIR_OprFact::illegalOpr;
131 }
132
133 //--------- loading items into registers --------------------------------
134
135
136 // i486 instructions can inline constants
137 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
138 if (type == T_SHORT || type == T_CHAR) {
139 // there is no immediate move of word values in asembler_i486.?pp
140 return false;
141 }
142 Constant* c = v->as_Constant();
143 if (c && c->state_before() == NULL) {
144 // constants of any type can be stored directly, except for
145 // unloaded object constants.
146 return true;
147 }
148 return false;
149 }
150
151
152 bool LIRGenerator::can_inline_as_constant(Value v) const {
153 if (v->type()->tag() == longTag) return false;
154 return v->type()->tag() != objectTag ||
155 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
156 }
157
158
159 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
160 if (c->type() == T_LONG) return false;
161 return c->type() != T_OBJECT || c->as_jobject() == NULL;
162 }
163
164
165 LIR_Opr LIRGenerator::safepoint_poll_register() {
166 NOT_LP64( return new_register(T_ADDRESS); )
167 return LIR_OprFact::illegalOpr;
168 }
169
170
171 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
172 int shift, int disp, BasicType type) {
173 assert(base->is_register(), "must be");
174 if (index->is_constant()) {
175 LIR_Const *constant = index->as_constant_ptr();
176 #ifdef _LP64
177 jlong c;
178 if (constant->type() == T_INT) {
179 c = (jlong(index->as_jint()) << shift) + disp;
180 } else {
181 assert(constant->type() == T_LONG, "should be");
182 c = (index->as_jlong() << shift) + disp;
183 }
184 if ((jlong)((jint)c) == c) {
185 return new LIR_Address(base, (jint)c, type);
186 } else {
187 LIR_Opr tmp = new_register(T_LONG);
188 __ move(index, tmp);
189 return new LIR_Address(base, tmp, type);
190 }
191 #else
192 return new LIR_Address(base,
193 ((intx)(constant->as_jint()) << shift) + disp,
194 type);
195 #endif
196 } else {
197 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
198 }
199 }
200
201
202 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
203 BasicType type) {
204 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
205
206 LIR_Address* addr;
207 if (index_opr->is_constant()) {
208 int elem_size = type2aelembytes(type);
209 #ifdef _LP64
210 jint index = index_opr->as_jint();
211 jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
212 if (disp > max_jint) {
213 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
214 // Convert array index to long to do array offset computation with 64-bit values.
215 index_opr = new_register(T_LONG);
216 __ move(LIR_OprFact::longConst(index), index_opr);
217 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
218 } else {
219 addr = new LIR_Address(array_opr, (intx)disp, type);
220 }
221 #else
222 // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range!
223 // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will
224 // always be negative (i.e. underflows the 32-bit address range):
225 // Let N = 2^32: a + signed_overflow(disp) = a + disp - N.
226 // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then
227 // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always
228 // underflows the 32-bit address range:
229 // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N)
230 // = (a + disp - N) + N = a + disp
231 // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address
232 // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms.
233 addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
234 #endif // _LP64
235 } else {
236 #ifdef _LP64
237 if (index_opr->type() == T_INT) {
238 LIR_Opr tmp = new_register(T_LONG);
239 __ convert(Bytecodes::_i2l, index_opr, tmp);
240 index_opr = tmp;
241 }
242 #endif // _LP64
243 addr = new LIR_Address(array_opr,
244 index_opr,
245 LIR_Address::scale(type),
246 offset_in_bytes, type);
247 }
248 return addr;
249 }
250
251
252 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
253 LIR_Opr r;
254 if (type == T_LONG) {
255 r = LIR_OprFact::longConst(x);
256 } else if (type == T_INT) {
257 r = LIR_OprFact::intConst(x);
258 } else {
259 ShouldNotReachHere();
260 }
261 return r;
262 }
263
264 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
265 LIR_Opr pointer = new_pointer_register();
266 __ move(LIR_OprFact::intptrConst(counter), pointer);
267 LIR_Address* addr = new LIR_Address(pointer, type);
268 increment_counter(addr, step);
269 }
270
271
272 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
273 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
274 }
275
276 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
277 __ cmp_mem_int(condition, base, disp, c, info);
278 }
279
280
281 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
282 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
283 }
284
285
286 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
287 if (tmp->is_valid() && c > 0 && c < max_jint) {
288 if (is_power_of_2(c + 1)) {
289 __ move(left, tmp);
290 __ shift_left(left, log2i_exact(c + 1), left);
291 __ sub(left, tmp, result);
292 return true;
293 } else if (is_power_of_2(c - 1)) {
294 __ move(left, tmp);
295 __ shift_left(left, log2i_exact(c - 1), left);
296 __ add(left, tmp, result);
297 return true;
298 }
299 }
300 return false;
301 }
302
303
304 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
305 BasicType type = item->type();
306 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
307 }
308
309 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
310 LIR_Opr tmp1 = new_register(objectType);
311 LIR_Opr tmp2 = new_register(objectType);
312 LIR_Opr tmp3 = new_register(objectType);
313 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
314 }
315
316 //----------------------------------------------------------------------
317 // visitor functions
318 //----------------------------------------------------------------------
319
320 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
321 assert(x->is_pinned(),"");
322 LIRItem obj(x->obj(), this);
323 obj.load_item();
324
325 set_no_result(x);
326
327 // "lock" stores the address of the monitor stack slot, so this is not an oop
328 LIR_Opr lock = new_register(T_INT);
329 // Need a scratch register for inline types on x86
330 LIR_Opr scratch = LIR_OprFact::illegalOpr;
331 if (EnableValhalla && x->maybe_inlinetype()) {
332 scratch = new_register(T_INT);
333 }
334
335 CodeEmitInfo* info_for_exception = NULL;
336 if (x->needs_null_check()) {
337 info_for_exception = state_for(x);
338 }
339
340 CodeStub* throw_imse_stub = x->maybe_inlinetype() ?
341 new SimpleExceptionStub(Runtime1::throw_illegal_monitor_state_exception_id,
342 LIR_OprFact::illegalOpr, state_for(x))
343 : NULL;
344
345 // this CodeEmitInfo must not have the xhandlers because here the
346 // object is already locked (xhandlers expect object to be unlocked)
347 CodeEmitInfo* info = state_for(x, x->state(), true);
348 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
349 x->monitor_no(), info_for_exception, info, throw_imse_stub);
350 }
351
352
353 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
354 assert(x->is_pinned(),"");
355
356 LIRItem obj(x->obj(), this);
357 obj.dont_load_item();
358
359 LIR_Opr lock = new_register(T_INT);
360 LIR_Opr obj_temp = new_register(T_INT);
361 set_no_result(x);
362 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
363 }
364
365
366 // _ineg, _lneg, _fneg, _dneg
367 void LIRGenerator::do_NegateOp(NegateOp* x) {
368 LIRItem value(x->x(), this);
369 value.set_destroys_register();
370 value.load_item();
371 LIR_Opr reg = rlock(x);
372
373 LIR_Opr tmp = LIR_OprFact::illegalOpr;
374 #ifdef _LP64
375 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
376 if (x->type()->tag() == doubleTag) {
377 tmp = new_register(T_DOUBLE);
378 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
379 }
380 else if (x->type()->tag() == floatTag) {
381 tmp = new_register(T_FLOAT);
382 __ move(LIR_OprFact::floatConst(-0.0), tmp);
383 }
384 }
385 #endif
386 __ negate(value.result(), reg, tmp);
387
388 set_result(x, round_item(reg));
389 }
390
391
392 // for _fadd, _fmul, _fsub, _fdiv, _frem
393 // _dadd, _dmul, _dsub, _ddiv, _drem
394 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
395 LIRItem left(x->x(), this);
396 LIRItem right(x->y(), this);
397 LIRItem* left_arg = &left;
398 LIRItem* right_arg = &right;
399 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
400 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
401 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
402 left.load_item();
403 } else {
404 left.dont_load_item();
405 }
406
407 #ifndef _LP64
408 // do not load right operand if it is a constant. only 0 and 1 are
409 // loaded because there are special instructions for loading them
410 // without memory access (not needed for SSE2 instructions)
411 bool must_load_right = false;
412 if (right.is_constant()) {
413 LIR_Const* c = right.result()->as_constant_ptr();
414 assert(c != NULL, "invalid constant");
415 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
416
417 if (c->type() == T_FLOAT) {
418 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
419 } else {
420 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
421 }
422 }
423 #endif // !LP64
424
425 if (must_load_both) {
426 // frem and drem destroy also right operand, so move it to a new register
427 right.set_destroys_register();
428 right.load_item();
429 } else if (right.is_register()) {
430 right.load_item();
431 #ifndef _LP64
432 } else if (must_load_right) {
433 right.load_item();
434 #endif // !LP64
435 } else {
436 right.dont_load_item();
437 }
438 LIR_Opr reg = rlock(x);
439 LIR_Opr tmp = LIR_OprFact::illegalOpr;
440 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
441 tmp = new_register(T_DOUBLE);
442 }
443
444 #ifdef _LP64
445 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
446 // frem and drem are implemented as a direct call into the runtime.
447 LIRItem left(x->x(), this);
448 LIRItem right(x->y(), this);
449
450 BasicType bt = as_BasicType(x->type());
451 BasicTypeList signature(2);
452 signature.append(bt);
453 signature.append(bt);
454 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
455
456 const LIR_Opr result_reg = result_register_for(x->type());
457 left.load_item_force(cc->at(0));
458 right.load_item_force(cc->at(1));
459
460 address entry = NULL;
461 switch (x->op()) {
462 case Bytecodes::_frem:
463 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
464 break;
465 case Bytecodes::_drem:
466 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
467 break;
468 default:
469 ShouldNotReachHere();
470 }
471
472 LIR_Opr result = rlock_result(x);
473 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
474 __ move(result_reg, result);
475 } else {
476 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
477 set_result(x, round_item(reg));
478 }
479 #else
480 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
481 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
482 LIR_Opr fpu0, fpu1;
483 if (x->op() == Bytecodes::_frem) {
484 fpu0 = LIR_OprFact::single_fpu(0);
485 fpu1 = LIR_OprFact::single_fpu(1);
486 } else {
487 fpu0 = LIR_OprFact::double_fpu(0);
488 fpu1 = LIR_OprFact::double_fpu(1);
489 }
490 __ move(right.result(), fpu1); // order of left and right operand is important!
491 __ move(left.result(), fpu0);
492 __ rem (fpu0, fpu1, fpu0);
493 __ move(fpu0, reg);
494
495 } else {
496 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
497 }
498 set_result(x, round_item(reg));
499 #endif // _LP64
500 }
501
502
503 // for _ladd, _lmul, _lsub, _ldiv, _lrem
504 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
505 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
506 // long division is implemented as a direct call into the runtime
507 LIRItem left(x->x(), this);
508 LIRItem right(x->y(), this);
509
510 // the check for division by zero destroys the right operand
511 right.set_destroys_register();
512
513 BasicTypeList signature(2);
514 signature.append(T_LONG);
515 signature.append(T_LONG);
516 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
517
518 // check for division by zero (destroys registers of right operand!)
519 CodeEmitInfo* info = state_for(x);
520
521 const LIR_Opr result_reg = result_register_for(x->type());
522 left.load_item_force(cc->at(1));
523 right.load_item();
524
525 __ move(right.result(), cc->at(0));
526
527 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
528 __ branch(lir_cond_equal, new DivByZeroStub(info));
529
530 address entry = NULL;
531 switch (x->op()) {
532 case Bytecodes::_lrem:
533 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
534 break; // check if dividend is 0 is done elsewhere
535 case Bytecodes::_ldiv:
536 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
537 break; // check if dividend is 0 is done elsewhere
538 default:
539 ShouldNotReachHere();
540 }
541
542 LIR_Opr result = rlock_result(x);
543 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
544 __ move(result_reg, result);
545 } else if (x->op() == Bytecodes::_lmul) {
546 // missing test if instr is commutative and if we should swap
547 LIRItem left(x->x(), this);
548 LIRItem right(x->y(), this);
549
550 // right register is destroyed by the long mul, so it must be
551 // copied to a new register.
552 right.set_destroys_register();
553
554 left.load_item();
555 right.load_item();
556
557 LIR_Opr reg = FrameMap::long0_opr;
558 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
559 LIR_Opr result = rlock_result(x);
560 __ move(reg, result);
561 } else {
562 // missing test if instr is commutative and if we should swap
563 LIRItem left(x->x(), this);
564 LIRItem right(x->y(), this);
565
566 left.load_item();
567 // don't load constants to save register
568 right.load_nonconstant();
569 rlock_result(x);
570 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
571 }
572 }
573
574
575
576 // for: _iadd, _imul, _isub, _idiv, _irem
577 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
578 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
579 // The requirements for division and modulo
580 // input : rax,: dividend min_int
581 // reg: divisor (may not be rax,/rdx) -1
582 //
583 // output: rax,: quotient (= rax, idiv reg) min_int
584 // rdx: remainder (= rax, irem reg) 0
585
586 // rax, and rdx will be destroyed
587
588 // Note: does this invalidate the spec ???
589 LIRItem right(x->y(), this);
590 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
591
592 // call state_for before load_item_force because state_for may
593 // force the evaluation of other instructions that are needed for
594 // correct debug info. Otherwise the live range of the fix
595 // register might be too long.
596 CodeEmitInfo* info = state_for(x);
597
598 left.load_item_force(divInOpr());
599
600 right.load_item();
601
602 LIR_Opr result = rlock_result(x);
603 LIR_Opr result_reg;
604 if (x->op() == Bytecodes::_idiv) {
605 result_reg = divOutOpr();
606 } else {
607 result_reg = remOutOpr();
608 }
609
610 if (!ImplicitDiv0Checks) {
611 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
612 __ branch(lir_cond_equal, new DivByZeroStub(info));
613 // Idiv/irem cannot trap (passing info would generate an assertion).
614 info = NULL;
615 }
616 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
617 if (x->op() == Bytecodes::_irem) {
618 __ irem(left.result(), right.result(), result_reg, tmp, info);
619 } else if (x->op() == Bytecodes::_idiv) {
620 __ idiv(left.result(), right.result(), result_reg, tmp, info);
621 } else {
622 ShouldNotReachHere();
623 }
624
625 __ move(result_reg, result);
626 } else {
627 // missing test if instr is commutative and if we should swap
628 LIRItem left(x->x(), this);
629 LIRItem right(x->y(), this);
630 LIRItem* left_arg = &left;
631 LIRItem* right_arg = &right;
632 if (x->is_commutative() && left.is_stack() && right.is_register()) {
633 // swap them if left is real stack (or cached) and right is real register(not cached)
634 left_arg = &right;
635 right_arg = &left;
636 }
637
638 left_arg->load_item();
639
640 // do not need to load right, as we can handle stack and constants
641 if (x->op() == Bytecodes::_imul ) {
642 // check if we can use shift instead
643 bool use_constant = false;
644 bool use_tmp = false;
645 if (right_arg->is_constant()) {
646 jint iconst = right_arg->get_jint_constant();
647 if (iconst > 0 && iconst < max_jint) {
648 if (is_power_of_2(iconst)) {
649 use_constant = true;
650 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
651 use_constant = true;
652 use_tmp = true;
653 }
654 }
655 }
656 if (use_constant) {
657 right_arg->dont_load_item();
658 } else {
659 right_arg->load_item();
660 }
661 LIR_Opr tmp = LIR_OprFact::illegalOpr;
662 if (use_tmp) {
663 tmp = new_register(T_INT);
664 }
665 rlock_result(x);
666
667 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
668 } else {
669 right_arg->dont_load_item();
670 rlock_result(x);
671 LIR_Opr tmp = LIR_OprFact::illegalOpr;
672 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
673 }
674 }
675 }
676
677
678 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
679 // when an operand with use count 1 is the left operand, then it is
680 // likely that no move for 2-operand-LIR-form is necessary
681 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
682 x->swap_operands();
683 }
684
685 ValueTag tag = x->type()->tag();
686 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
687 switch (tag) {
688 case floatTag:
689 case doubleTag: do_ArithmeticOp_FPU(x); return;
690 case longTag: do_ArithmeticOp_Long(x); return;
691 case intTag: do_ArithmeticOp_Int(x); return;
692 default: ShouldNotReachHere(); return;
693 }
694 }
695
696
697 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
698 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
699 // count must always be in rcx
700 LIRItem value(x->x(), this);
701 LIRItem count(x->y(), this);
702
703 ValueTag elemType = x->type()->tag();
704 bool must_load_count = !count.is_constant() || elemType == longTag;
705 if (must_load_count) {
706 // count for long must be in register
707 count.load_item_force(shiftCountOpr());
708 } else {
709 count.dont_load_item();
710 }
711 value.load_item();
712 LIR_Opr reg = rlock_result(x);
713
714 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
715 }
716
717
718 // _iand, _land, _ior, _lor, _ixor, _lxor
719 void LIRGenerator::do_LogicOp(LogicOp* x) {
720 // when an operand with use count 1 is the left operand, then it is
721 // likely that no move for 2-operand-LIR-form is necessary
722 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
723 x->swap_operands();
724 }
725
726 LIRItem left(x->x(), this);
727 LIRItem right(x->y(), this);
728
729 left.load_item();
730 right.load_nonconstant();
731 LIR_Opr reg = rlock_result(x);
732
733 logic_op(x->op(), reg, left.result(), right.result());
734 }
735
736
737
738 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
739 void LIRGenerator::do_CompareOp(CompareOp* x) {
740 LIRItem left(x->x(), this);
741 LIRItem right(x->y(), this);
742 ValueTag tag = x->x()->type()->tag();
743 if (tag == longTag) {
744 left.set_destroys_register();
745 }
746 left.load_item();
747 right.load_item();
748 LIR_Opr reg = rlock_result(x);
749
750 if (x->x()->type()->is_float_kind()) {
751 Bytecodes::Code code = x->op();
752 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
753 } else if (x->x()->type()->tag() == longTag) {
754 __ lcmp2int(left.result(), right.result(), reg);
755 } else {
756 Unimplemented();
757 }
758 }
759
760 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
761 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
762 if (is_reference_type(type)) {
763 cmp_value.load_item_force(FrameMap::rax_oop_opr);
764 new_value.load_item();
765 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
766 } else if (type == T_INT) {
767 cmp_value.load_item_force(FrameMap::rax_opr);
768 new_value.load_item();
769 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
770 } else if (type == T_LONG) {
771 cmp_value.load_item_force(FrameMap::long0_opr);
772 new_value.load_item_force(FrameMap::long1_opr);
773 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
774 } else {
775 Unimplemented();
776 }
777 LIR_Opr result = new_register(T_INT);
778 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
779 result, T_INT);
780 return result;
781 }
782
783 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
784 bool is_oop = is_reference_type(type);
785 LIR_Opr result = new_register(type);
786 value.load_item();
787 // Because we want a 2-arg form of xchg and xadd
788 __ move(value.result(), result);
789 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
790 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
791 return result;
792 }
793
794 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
795 LIR_Opr result = new_register(type);
796 value.load_item();
797 // Because we want a 2-arg form of xchg and xadd
798 __ move(value.result(), result);
799 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
800 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
801 return result;
802 }
803
804 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
805 assert(x->number_of_arguments() == 3, "wrong type");
806 assert(UseFMA, "Needs FMA instructions support.");
807 LIRItem value(x->argument_at(0), this);
808 LIRItem value1(x->argument_at(1), this);
809 LIRItem value2(x->argument_at(2), this);
810
811 value2.set_destroys_register();
812
813 value.load_item();
814 value1.load_item();
815 value2.load_item();
816
817 LIR_Opr calc_input = value.result();
818 LIR_Opr calc_input1 = value1.result();
819 LIR_Opr calc_input2 = value2.result();
820 LIR_Opr calc_result = rlock_result(x);
821
822 switch (x->id()) {
823 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
824 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
825 default: ShouldNotReachHere();
826 }
827
828 }
829
830
831 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
832 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
833
834 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
835 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
836 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
837 x->id() == vmIntrinsics::_dlog10) {
838 do_LibmIntrinsic(x);
839 return;
840 }
841
842 LIRItem value(x->argument_at(0), this);
843
844 bool use_fpu = false;
845 #ifndef _LP64
846 if (UseSSE < 2) {
847 value.set_destroys_register();
848 }
849 #endif // !LP64
850 value.load_item();
851
852 LIR_Opr calc_input = value.result();
853 LIR_Opr calc_result = rlock_result(x);
854
855 LIR_Opr tmp = LIR_OprFact::illegalOpr;
856 #ifdef _LP64
857 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
858 (x->id() == vmIntrinsics::_dabs)) {
859 tmp = new_register(T_DOUBLE);
860 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
861 }
862 #endif
863
864 switch(x->id()) {
865 case vmIntrinsics::_dabs:
866 __ abs(calc_input, calc_result, tmp);
867 break;
868 case vmIntrinsics::_dsqrt:
869 case vmIntrinsics::_dsqrt_strict:
870 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
871 break;
872 default:
873 ShouldNotReachHere();
874 }
875
876 if (use_fpu) {
877 __ move(calc_result, x->operand());
878 }
879 }
880
881 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
882 LIRItem value(x->argument_at(0), this);
883 value.set_destroys_register();
884
885 LIR_Opr calc_result = rlock_result(x);
886 LIR_Opr result_reg = result_register_for(x->type());
887
888 CallingConvention* cc = NULL;
889
890 if (x->id() == vmIntrinsics::_dpow) {
891 LIRItem value1(x->argument_at(1), this);
892
893 value1.set_destroys_register();
894
895 BasicTypeList signature(2);
896 signature.append(T_DOUBLE);
897 signature.append(T_DOUBLE);
898 cc = frame_map()->c_calling_convention(&signature);
899 value.load_item_force(cc->at(0));
900 value1.load_item_force(cc->at(1));
901 } else {
902 BasicTypeList signature(1);
903 signature.append(T_DOUBLE);
904 cc = frame_map()->c_calling_convention(&signature);
905 value.load_item_force(cc->at(0));
906 }
907
908 #ifndef _LP64
909 LIR_Opr tmp = FrameMap::fpu0_double_opr;
910 result_reg = tmp;
911 switch(x->id()) {
912 case vmIntrinsics::_dexp:
913 if (StubRoutines::dexp() != NULL) {
914 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
915 } else {
916 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
917 }
918 break;
919 case vmIntrinsics::_dlog:
920 if (StubRoutines::dlog() != NULL) {
921 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
922 } else {
923 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
924 }
925 break;
926 case vmIntrinsics::_dlog10:
927 if (StubRoutines::dlog10() != NULL) {
928 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
929 } else {
930 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
931 }
932 break;
933 case vmIntrinsics::_dpow:
934 if (StubRoutines::dpow() != NULL) {
935 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
936 } else {
937 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
938 }
939 break;
940 case vmIntrinsics::_dsin:
941 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
942 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
943 } else {
944 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
945 }
946 break;
947 case vmIntrinsics::_dcos:
948 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
949 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
950 } else {
951 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
952 }
953 break;
954 case vmIntrinsics::_dtan:
955 if (StubRoutines::dtan() != NULL) {
956 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
957 } else {
958 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
959 }
960 break;
961 default: ShouldNotReachHere();
962 }
963 #else
964 switch (x->id()) {
965 case vmIntrinsics::_dexp:
966 if (StubRoutines::dexp() != NULL) {
967 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
968 } else {
969 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
970 }
971 break;
972 case vmIntrinsics::_dlog:
973 if (StubRoutines::dlog() != NULL) {
974 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
975 } else {
976 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
977 }
978 break;
979 case vmIntrinsics::_dlog10:
980 if (StubRoutines::dlog10() != NULL) {
981 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
982 } else {
983 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
984 }
985 break;
986 case vmIntrinsics::_dpow:
987 if (StubRoutines::dpow() != NULL) {
988 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
989 } else {
990 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
991 }
992 break;
993 case vmIntrinsics::_dsin:
994 if (StubRoutines::dsin() != NULL) {
995 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
996 } else {
997 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
998 }
999 break;
1000 case vmIntrinsics::_dcos:
1001 if (StubRoutines::dcos() != NULL) {
1002 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
1003 } else {
1004 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
1005 }
1006 break;
1007 case vmIntrinsics::_dtan:
1008 if (StubRoutines::dtan() != NULL) {
1009 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
1010 } else {
1011 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
1012 }
1013 break;
1014 default: ShouldNotReachHere();
1015 }
1016 #endif // _LP64
1017 __ move(result_reg, calc_result);
1018 }
1019
1020 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1021 assert(x->number_of_arguments() == 5, "wrong type");
1022
1023 // Make all state_for calls early since they can emit code
1024 CodeEmitInfo* info = state_for(x, x->state());
1025
1026 LIRItem src(x->argument_at(0), this);
1027 LIRItem src_pos(x->argument_at(1), this);
1028 LIRItem dst(x->argument_at(2), this);
1029 LIRItem dst_pos(x->argument_at(3), this);
1030 LIRItem length(x->argument_at(4), this);
1031
1032 // operands for arraycopy must use fixed registers, otherwise
1033 // LinearScan will fail allocation (because arraycopy always needs a
1034 // call)
1035
1036 #ifndef _LP64
1037 src.load_item_force (FrameMap::rcx_oop_opr);
1038 src_pos.load_item_force (FrameMap::rdx_opr);
1039 dst.load_item_force (FrameMap::rax_oop_opr);
1040 dst_pos.load_item_force (FrameMap::rbx_opr);
1041 length.load_item_force (FrameMap::rdi_opr);
1042 LIR_Opr tmp = (FrameMap::rsi_opr);
1043 #else
1044
1045 // The java calling convention will give us enough registers
1046 // so that on the stub side the args will be perfect already.
1047 // On the other slow/special case side we call C and the arg
1048 // positions are not similar enough to pick one as the best.
1049 // Also because the java calling convention is a "shifted" version
1050 // of the C convention we can process the java args trivially into C
1051 // args without worry of overwriting during the xfer
1052
1053 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1054 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1055 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1056 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1057 length.load_item_force (FrameMap::as_opr(j_rarg4));
1058
1059 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1060 #endif // LP64
1061
1062 set_no_result(x);
1063
1064 int flags;
1065 ciArrayKlass* expected_type;
1066 arraycopy_helper(x, &flags, &expected_type);
1067
1068 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1069 }
1070
1071 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1072 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1073 // Make all state_for calls early since they can emit code
1074 LIR_Opr result = rlock_result(x);
1075 int flags = 0;
1076 switch (x->id()) {
1077 case vmIntrinsics::_updateCRC32: {
1078 LIRItem crc(x->argument_at(0), this);
1079 LIRItem val(x->argument_at(1), this);
1080 // val is destroyed by update_crc32
1081 val.set_destroys_register();
1082 crc.load_item();
1083 val.load_item();
1084 __ update_crc32(crc.result(), val.result(), result);
1085 break;
1086 }
1087 case vmIntrinsics::_updateBytesCRC32:
1088 case vmIntrinsics::_updateByteBufferCRC32: {
1089 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1090
1091 LIRItem crc(x->argument_at(0), this);
1092 LIRItem buf(x->argument_at(1), this);
1093 LIRItem off(x->argument_at(2), this);
1094 LIRItem len(x->argument_at(3), this);
1095 buf.load_item();
1096 off.load_nonconstant();
1097
1098 LIR_Opr index = off.result();
1099 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1100 if(off.result()->is_constant()) {
1101 index = LIR_OprFact::illegalOpr;
1102 offset += off.result()->as_jint();
1103 }
1104 LIR_Opr base_op = buf.result();
1105
1106 #ifndef _LP64
1107 if (!is_updateBytes) { // long b raw address
1108 base_op = new_register(T_INT);
1109 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1110 }
1111 #else
1112 if (index->is_valid()) {
1113 LIR_Opr tmp = new_register(T_LONG);
1114 __ convert(Bytecodes::_i2l, index, tmp);
1115 index = tmp;
1116 }
1117 #endif
1118
1119 LIR_Address* a = new LIR_Address(base_op,
1120 index,
1121 offset,
1122 T_BYTE);
1123 BasicTypeList signature(3);
1124 signature.append(T_INT);
1125 signature.append(T_ADDRESS);
1126 signature.append(T_INT);
1127 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1128 const LIR_Opr result_reg = result_register_for(x->type());
1129
1130 LIR_Opr addr = new_pointer_register();
1131 __ leal(LIR_OprFact::address(a), addr);
1132
1133 crc.load_item_force(cc->at(0));
1134 __ move(addr, cc->at(1));
1135 len.load_item_force(cc->at(2));
1136
1137 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1138 __ move(result_reg, result);
1139
1140 break;
1141 }
1142 default: {
1143 ShouldNotReachHere();
1144 }
1145 }
1146 }
1147
1148 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1149 Unimplemented();
1150 }
1151
1152 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1153 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1154
1155 // Make all state_for calls early since they can emit code
1156 LIR_Opr result = rlock_result(x);
1157
1158 LIRItem a(x->argument_at(0), this); // Object
1159 LIRItem aOffset(x->argument_at(1), this); // long
1160 LIRItem b(x->argument_at(2), this); // Object
1161 LIRItem bOffset(x->argument_at(3), this); // long
1162 LIRItem length(x->argument_at(4), this); // int
1163 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1164
1165 a.load_item();
1166 aOffset.load_nonconstant();
1167 b.load_item();
1168 bOffset.load_nonconstant();
1169
1170 long constant_aOffset = 0;
1171 LIR_Opr result_aOffset = aOffset.result();
1172 if (result_aOffset->is_constant()) {
1173 constant_aOffset = result_aOffset->as_jlong();
1174 result_aOffset = LIR_OprFact::illegalOpr;
1175 }
1176 LIR_Opr result_a = a.result();
1177
1178 long constant_bOffset = 0;
1179 LIR_Opr result_bOffset = bOffset.result();
1180 if (result_bOffset->is_constant()) {
1181 constant_bOffset = result_bOffset->as_jlong();
1182 result_bOffset = LIR_OprFact::illegalOpr;
1183 }
1184 LIR_Opr result_b = b.result();
1185
1186 #ifndef _LP64
1187 result_a = new_register(T_INT);
1188 __ convert(Bytecodes::_l2i, a.result(), result_a);
1189 result_b = new_register(T_INT);
1190 __ convert(Bytecodes::_l2i, b.result(), result_b);
1191 #endif
1192
1193
1194 LIR_Address* addr_a = new LIR_Address(result_a,
1195 result_aOffset,
1196 constant_aOffset,
1197 T_BYTE);
1198
1199 LIR_Address* addr_b = new LIR_Address(result_b,
1200 result_bOffset,
1201 constant_bOffset,
1202 T_BYTE);
1203
1204 BasicTypeList signature(4);
1205 signature.append(T_ADDRESS);
1206 signature.append(T_ADDRESS);
1207 signature.append(T_INT);
1208 signature.append(T_INT);
1209 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1210 const LIR_Opr result_reg = result_register_for(x->type());
1211
1212 LIR_Opr ptr_addr_a = new_pointer_register();
1213 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1214
1215 LIR_Opr ptr_addr_b = new_pointer_register();
1216 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1217
1218 __ move(ptr_addr_a, cc->at(0));
1219 __ move(ptr_addr_b, cc->at(1));
1220 length.load_item_force(cc->at(2));
1221 log2ArrayIndexScale.load_item_force(cc->at(3));
1222
1223 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1224 __ move(result_reg, result);
1225 }
1226
1227 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1228 // _i2b, _i2c, _i2s
1229 LIR_Opr fixed_register_for(BasicType type) {
1230 switch (type) {
1231 case T_FLOAT: return FrameMap::fpu0_float_opr;
1232 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1233 case T_INT: return FrameMap::rax_opr;
1234 case T_LONG: return FrameMap::long0_opr;
1235 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1236 }
1237 }
1238
1239 void LIRGenerator::do_Convert(Convert* x) {
1240 #ifdef _LP64
1241 LIRItem value(x->value(), this);
1242 value.load_item();
1243 LIR_Opr input = value.result();
1244 LIR_Opr result = rlock(x);
1245 __ convert(x->op(), input, result);
1246 assert(result->is_virtual(), "result must be virtual register");
1247 set_result(x, result);
1248 #else
1249 // flags that vary for the different operations and different SSE-settings
1250 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1251
1252 switch (x->op()) {
1253 case Bytecodes::_i2l: // fall through
1254 case Bytecodes::_l2i: // fall through
1255 case Bytecodes::_i2b: // fall through
1256 case Bytecodes::_i2c: // fall through
1257 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1258
1259 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1260 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1261 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1262 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1263 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1264 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1265 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1266 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1267 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1268 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1269 default: ShouldNotReachHere();
1270 }
1271
1272 LIRItem value(x->value(), this);
1273 value.load_item();
1274 LIR_Opr input = value.result();
1275 LIR_Opr result = rlock(x);
1276
1277 // arguments of lir_convert
1278 LIR_Opr conv_input = input;
1279 LIR_Opr conv_result = result;
1280 ConversionStub* stub = NULL;
1281
1282 if (fixed_input) {
1283 conv_input = fixed_register_for(input->type());
1284 __ move(input, conv_input);
1285 }
1286
1287 assert(fixed_result == false || round_result == false, "cannot set both");
1288 if (fixed_result) {
1289 conv_result = fixed_register_for(result->type());
1290 } else if (round_result) {
1291 result = new_register(result->type());
1292 set_vreg_flag(result, must_start_in_memory);
1293 }
1294
1295 if (needs_stub) {
1296 stub = new ConversionStub(x->op(), conv_input, conv_result);
1297 }
1298
1299 __ convert(x->op(), conv_input, conv_result, stub);
1300
1301 if (result != conv_result) {
1302 __ move(conv_result, result);
1303 }
1304
1305 assert(result->is_virtual(), "result must be virtual register");
1306 set_result(x, result);
1307 #endif // _LP64
1308 }
1309
1310
1311 void LIRGenerator::do_NewInstance(NewInstance* x) {
1312 print_if_not_loaded(x);
1313
1314 CodeEmitInfo* info = state_for(x, x->state());
1315 LIR_Opr reg = result_register_for(x->type());
1316 new_instance(reg, x->klass(), x->is_unresolved(),
1317 /* allow_inline */ false,
1318 FrameMap::rcx_oop_opr,
1319 FrameMap::rdi_oop_opr,
1320 FrameMap::rsi_oop_opr,
1321 LIR_OprFact::illegalOpr,
1322 FrameMap::rdx_metadata_opr, info);
1323 LIR_Opr result = rlock_result(x);
1324 __ move(reg, result);
1325 }
1326
1327 void LIRGenerator::do_NewInlineTypeInstance(NewInlineTypeInstance* x) {
1328 // Mapping to do_NewInstance (same code) but use state_before for reexecution.
1329 CodeEmitInfo* info = state_for(x, x->state_before());
1330 x->set_to_object_type();
1331 LIR_Opr reg = result_register_for(x->type());
1332 new_instance(reg, x->klass(), false,
1333 /* allow_inline */ true,
1334 FrameMap::rcx_oop_opr,
1335 FrameMap::rdi_oop_opr,
1336 FrameMap::rsi_oop_opr,
1337 LIR_OprFact::illegalOpr,
1338 FrameMap::rdx_metadata_opr, info);
1339 LIR_Opr result = rlock_result(x);
1340 __ move(reg, result);
1341 }
1342
1343 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1344 CodeEmitInfo* info = state_for(x, x->state());
1345
1346 LIRItem length(x->length(), this);
1347 length.load_item_force(FrameMap::rbx_opr);
1348
1349 LIR_Opr reg = result_register_for(x->type());
1350 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1351 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1352 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1353 LIR_Opr tmp4 = reg;
1354 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1355 LIR_Opr len = length.result();
1356 BasicType elem_type = x->elt_type();
1357
1358 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1359
1360 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1361 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1362
1363 LIR_Opr result = rlock_result(x);
1364 __ move(reg, result);
1365 }
1366
1367
1368 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1369 LIRItem length(x->length(), this);
1370 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1371 // and therefore provide the state before the parameters have been consumed
1372 CodeEmitInfo* patching_info = NULL;
1373 if (!x->klass()->is_loaded() || PatchALot) {
1374 patching_info = state_for(x, x->state_before());
1375 }
1376
1377 CodeEmitInfo* info = state_for(x, x->state());
1378
1379 const LIR_Opr reg = result_register_for(x->type());
1380 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1381 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1382 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1383 LIR_Opr tmp4 = reg;
1384 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1385
1386 length.load_item_force(FrameMap::rbx_opr);
1387 LIR_Opr len = length.result();
1388
1389 ciKlass* obj = (ciKlass*) x->exact_type();
1390 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_null_free());
1391 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1392 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1393 }
1394 klass2reg_with_patching(klass_reg, obj, patching_info);
1395 if (x->is_null_free()) {
1396 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_PRIMITIVE_OBJECT, klass_reg, slow_path);
1397 } else {
1398 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1399 }
1400
1401 LIR_Opr result = rlock_result(x);
1402 __ move(reg, result);
1403 }
1404
1405
1406 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1407 Values* dims = x->dims();
1408 int i = dims->length();
1409 LIRItemList* items = new LIRItemList(i, i, NULL);
1410 while (i-- > 0) {
1411 LIRItem* size = new LIRItem(dims->at(i), this);
1412 items->at_put(i, size);
1413 }
1414
1415 // Evaluate state_for early since it may emit code.
1416 CodeEmitInfo* patching_info = NULL;
1417 if (!x->klass()->is_loaded() || PatchALot) {
1418 patching_info = state_for(x, x->state_before());
1419
1420 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1421 // clone all handlers (NOTE: Usually this is handled transparently
1422 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1423 // is done explicitly here because a stub isn't being used).
1424 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1425 }
1426 CodeEmitInfo* info = state_for(x, x->state());
1427
1428 i = dims->length();
1429 while (i-- > 0) {
1430 LIRItem* size = items->at(i);
1431 size->load_nonconstant();
1432
1433 store_stack_parameter(size->result(), in_ByteSize(i*4));
1434 }
1435
1436 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1437 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1438
1439 LIR_Opr rank = FrameMap::rbx_opr;
1440 __ move(LIR_OprFact::intConst(x->rank()), rank);
1441 LIR_Opr varargs = FrameMap::rcx_opr;
1442 __ move(FrameMap::rsp_opr, varargs);
1443 LIR_OprList* args = new LIR_OprList(3);
1444 args->append(klass_reg);
1445 args->append(rank);
1446 args->append(varargs);
1447 LIR_Opr reg = result_register_for(x->type());
1448 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1449 LIR_OprFact::illegalOpr,
1450 reg, args, info);
1451
1452 LIR_Opr result = rlock_result(x);
1453 __ move(reg, result);
1454 }
1455
1456
1457 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1458 // nothing to do for now
1459 }
1460
1461
1462 void LIRGenerator::do_CheckCast(CheckCast* x) {
1463 LIRItem obj(x->obj(), this);
1464
1465 CodeEmitInfo* patching_info = NULL;
1466 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1467 // must do this before locking the destination register as an oop register,
1468 // and before the obj is loaded (the latter is for deoptimization)
1469 patching_info = state_for(x, x->state_before());
1470 }
1471 obj.load_item();
1472
1473 // info for exceptions
1474 CodeEmitInfo* info_for_exception =
1475 (x->needs_exception_state() ? state_for(x) :
1476 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1477
1478 if (x->is_null_free()) {
1479 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1480 }
1481
1482 CodeStub* stub;
1483 if (x->is_incompatible_class_change_check()) {
1484 assert(patching_info == NULL, "can't patch this");
1485 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1486 } else if (x->is_invokespecial_receiver_check()) {
1487 assert(patching_info == NULL, "can't patch this");
1488 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1489 } else {
1490 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1491 }
1492 LIR_Opr reg = rlock_result(x);
1493 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1494 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1495 tmp3 = new_register(objectType);
1496 }
1497 __ checkcast(reg, obj.result(), x->klass(),
1498 new_register(objectType), new_register(objectType), tmp3,
1499 x->direct_compare(), info_for_exception, patching_info, stub,
1500 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1501 }
1502
1503
1504 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1505 LIRItem obj(x->obj(), this);
1506
1507 // result and test object may not be in same register
1508 LIR_Opr reg = rlock_result(x);
1509 CodeEmitInfo* patching_info = NULL;
1510 if ((!x->klass()->is_loaded() || PatchALot)) {
1511 // must do this before locking the destination register as an oop register
1512 patching_info = state_for(x, x->state_before());
1513 }
1514 obj.load_item();
1515 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1516 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1517 tmp3 = new_register(objectType);
1518 }
1519 __ instanceof(reg, obj.result(), x->klass(),
1520 new_register(objectType), new_register(objectType), tmp3,
1521 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1522 }
1523
1524
1525 void LIRGenerator::do_If(If* x) {
1526 assert(x->number_of_sux() == 2, "inconsistency");
1527 ValueTag tag = x->x()->type()->tag();
1528 bool is_safepoint = x->is_safepoint();
1529
1530 If::Condition cond = x->cond();
1531
1532 LIRItem xitem(x->x(), this);
1533 LIRItem yitem(x->y(), this);
1534 LIRItem* xin = &xitem;
1535 LIRItem* yin = &yitem;
1536
1537 if (tag == longTag) {
1538 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1539 // mirror for other conditions
1540 if (cond == If::gtr || cond == If::leq) {
1541 cond = Instruction::mirror(cond);
1542 xin = &yitem;
1543 yin = &xitem;
1544 }
1545 xin->set_destroys_register();
1546 }
1547 xin->load_item();
1548 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1549 // inline long zero
1550 yin->dont_load_item();
1551 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) {
1552 // longs cannot handle constants at right side
1553 yin->load_item();
1554 } else {
1555 yin->dont_load_item();
1556 }
1557
1558 LIR_Opr left = xin->result();
1559 LIR_Opr right = yin->result();
1560
1561 set_no_result(x);
1562
1563 // add safepoint before generating condition code so it can be recomputed
1564 if (x->is_safepoint()) {
1565 // increment backedge counter if needed
1566 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1567 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1568 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1569 }
1570
1571 if (x->substitutability_check()) {
1572 substitutability_check(x, *xin, *yin);
1573 } else {
1574 __ cmp(lir_cond(cond), left, right);
1575 }
1576 // Generate branch profiling. Profiling code doesn't kill flags.
1577 profile_branch(x, cond);
1578 move_to_phi(x->state());
1579 if (x->x()->type()->is_float_kind()) {
1580 __ branch(lir_cond(cond), x->tsux(), x->usux());
1581 } else {
1582 __ branch(lir_cond(cond), x->tsux());
1583 }
1584 assert(x->default_sux() == x->fsux(), "wrong destination above");
1585 __ jump(x->default_sux());
1586 }
1587
1588
1589 LIR_Opr LIRGenerator::getThreadPointer() {
1590 #ifdef _LP64
1591 return FrameMap::as_pointer_opr(r15_thread);
1592 #else
1593 LIR_Opr result = new_register(T_INT);
1594 __ get_thread(result);
1595 return result;
1596 #endif //
1597 }
1598
1599 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1600 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1601 LIR_OprList* args = new LIR_OprList();
1602 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1603 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1604 }
1605
1606
1607 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1608 CodeEmitInfo* info) {
1609 if (address->type() == T_LONG) {
1610 address = new LIR_Address(address->base(),
1611 address->index(), address->scale(),
1612 address->disp(), T_DOUBLE);
1613 // Transfer the value atomically by using FP moves. This means
1614 // the value has to be moved between CPU and FPU registers. It
1615 // always has to be moved through spill slot since there's no
1616 // quick way to pack the value into an SSE register.
1617 LIR_Opr temp_double = new_register(T_DOUBLE);
1618 LIR_Opr spill = new_register(T_LONG);
1619 set_vreg_flag(spill, must_start_in_memory);
1620 __ move(value, spill);
1621 __ volatile_move(spill, temp_double, T_LONG);
1622 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1623 } else {
1624 __ store(value, address, info);
1625 }
1626 }
1627
1628 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1629 CodeEmitInfo* info) {
1630 if (address->type() == T_LONG) {
1631 address = new LIR_Address(address->base(),
1632 address->index(), address->scale(),
1633 address->disp(), T_DOUBLE);
1634 // Transfer the value atomically by using FP moves. This means
1635 // the value has to be moved between CPU and FPU registers. In
1636 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1637 // SSE2+ mode it can be moved directly.
1638 LIR_Opr temp_double = new_register(T_DOUBLE);
1639 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1640 __ volatile_move(temp_double, result, T_LONG);
1641 #ifndef _LP64
1642 if (UseSSE < 2) {
1643 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1644 set_vreg_flag(result, must_start_in_memory);
1645 }
1646 #endif // !LP64
1647 } else {
1648 __ load(address, result, info);
1649 }
1650 }