1 /*
2 * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciInlineKlass.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "gc/shared/c1/barrierSetC1.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "utilities/powerOfTwo.hpp"
41 #include "vmreg_x86.inline.hpp"
42
43 #ifdef ASSERT
44 #define __ gen()->lir(__FILE__, __LINE__)->
45 #else
46 #define __ gen()->lir()->
47 #endif
48
49 // Item will be loaded into a byte register; Intel only
50 void LIRItem::load_byte_item() {
51 load_item();
52 LIR_Opr res = result();
53
54 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
55 // make sure that it is a byte register
56 assert(!value()->type()->is_float() && !value()->type()->is_double(),
57 "can't load floats in byte register");
58 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
59 __ move(res, reg);
60
61 _result = reg;
62 }
63 }
64
65
66 void LIRItem::load_nonconstant() {
67 LIR_Opr r = value()->operand();
68 if (r->is_constant()) {
69 _result = r;
70 } else {
71 load_item();
72 }
73 }
74
75 //--------------------------------------------------------------
76 // LIRGenerator
77 //--------------------------------------------------------------
78
79
80 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
81 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
84 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
85 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
86 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
87 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
88 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
89
90
91 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
92 LIR_Opr opr;
93 switch (type->tag()) {
94 case intTag: opr = FrameMap::rax_opr; break;
95 case objectTag: opr = FrameMap::rax_oop_opr; break;
96 case longTag: opr = FrameMap::long0_opr; break;
97 #ifdef _LP64
98 case floatTag: opr = FrameMap::xmm0_float_opr; break;
99 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
100 #else
101 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
102 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
103 #endif // _LP64
104 case addressTag:
105 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
106 }
107
108 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
109 return opr;
110 }
111
112
113 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
114 LIR_Opr reg = new_register(T_INT);
115 set_vreg_flag(reg, LIRGenerator::byte_reg);
116 return reg;
117 }
118
119
120 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
121 // We just need one 32-bit temp register for x86/x64, to check whether both
122 // oops have markWord::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck().
123 // @temp = %r10d
124 // mov $0x405, %r10d
125 // and (%left), %r10d /* if need to check left */
126 // and (%right), %r10d /* if need to check right */
127 // cmp $0x405, $r10d
128 // jne L_oops_not_equal
129 tmp1 = new_register(T_INT);
130 tmp2 = LIR_OprFact::illegalOpr;
131 }
132
133 //--------- loading items into registers --------------------------------
134
135
136 // i486 instructions can inline constants
137 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
138 if (type == T_SHORT || type == T_CHAR) {
139 // there is no immediate move of word values in asembler_i486.?pp
140 return false;
141 }
142 Constant* c = v->as_Constant();
143 if (c && c->state_before() == NULL) {
144 // constants of any type can be stored directly, except for
145 // unloaded object constants.
146 return true;
147 }
148 return false;
149 }
150
151
152 bool LIRGenerator::can_inline_as_constant(Value v) const {
153 if (v->type()->tag() == longTag) return false;
154 return v->type()->tag() != objectTag ||
155 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
156 }
157
158
159 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
160 if (c->type() == T_LONG) return false;
161 return c->type() != T_OBJECT || c->as_jobject() == NULL;
162 }
163
164
165 LIR_Opr LIRGenerator::safepoint_poll_register() {
166 NOT_LP64( return new_register(T_ADDRESS); )
167 return LIR_OprFact::illegalOpr;
168 }
169
170
171 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
172 int shift, int disp, BasicType type) {
173 assert(base->is_register(), "must be");
174 if (index->is_constant()) {
175 LIR_Const *constant = index->as_constant_ptr();
176 #ifdef _LP64
177 jlong c;
178 if (constant->type() == T_INT) {
179 c = (jlong(index->as_jint()) << shift) + disp;
180 } else {
181 assert(constant->type() == T_LONG, "should be");
182 c = (index->as_jlong() << shift) + disp;
183 }
184 if ((jlong)((jint)c) == c) {
185 return new LIR_Address(base, (jint)c, type);
186 } else {
187 LIR_Opr tmp = new_register(T_LONG);
188 __ move(index, tmp);
189 return new LIR_Address(base, tmp, type);
190 }
191 #else
192 return new LIR_Address(base,
193 ((intx)(constant->as_jint()) << shift) + disp,
194 type);
195 #endif
196 } else {
197 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
198 }
199 }
200
201
202 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
203 BasicType type) {
204 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
205
206 LIR_Address* addr;
207 if (index_opr->is_constant()) {
208 int elem_size = type2aelembytes(type);
209 addr = new LIR_Address(array_opr,
210 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
211 } else {
212 #ifdef _LP64
213 if (index_opr->type() == T_INT) {
214 LIR_Opr tmp = new_register(T_LONG);
215 __ convert(Bytecodes::_i2l, index_opr, tmp);
216 index_opr = tmp;
217 }
218 #endif // _LP64
219 addr = new LIR_Address(array_opr,
220 index_opr,
221 LIR_Address::scale(type),
222 offset_in_bytes, type);
223 }
224 return addr;
225 }
226
227
228 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
229 LIR_Opr r;
230 if (type == T_LONG) {
231 r = LIR_OprFact::longConst(x);
232 } else if (type == T_INT) {
233 r = LIR_OprFact::intConst(x);
234 } else {
235 ShouldNotReachHere();
236 }
237 return r;
238 }
239
240 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
241 LIR_Opr pointer = new_pointer_register();
242 __ move(LIR_OprFact::intptrConst(counter), pointer);
243 LIR_Address* addr = new LIR_Address(pointer, type);
244 increment_counter(addr, step);
245 }
246
247
248 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
249 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
250 }
251
252 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
253 __ cmp_mem_int(condition, base, disp, c, info);
254 }
255
256
257 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
258 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
259 }
260
261
262 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
263 if (tmp->is_valid() && c > 0 && c < max_jint) {
264 if (is_power_of_2(c + 1)) {
265 __ move(left, tmp);
266 __ shift_left(left, log2i_exact(c + 1), left);
267 __ sub(left, tmp, result);
268 return true;
269 } else if (is_power_of_2(c - 1)) {
270 __ move(left, tmp);
271 __ shift_left(left, log2i_exact(c - 1), left);
272 __ add(left, tmp, result);
273 return true;
274 }
275 }
276 return false;
277 }
278
279
280 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
281 BasicType type = item->type();
282 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
283 }
284
285 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
286 LIR_Opr tmp1 = new_register(objectType);
287 LIR_Opr tmp2 = new_register(objectType);
288 LIR_Opr tmp3 = new_register(objectType);
289 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
290 }
291
292 //----------------------------------------------------------------------
293 // visitor functions
294 //----------------------------------------------------------------------
295
296 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
297 assert(x->is_pinned(),"");
298 LIRItem obj(x->obj(), this);
299 obj.load_item();
300
301 set_no_result(x);
302
303 // "lock" stores the address of the monitor stack slot, so this is not an oop
304 LIR_Opr lock = new_register(T_INT);
305 // Need a scratch register for inline types on x86
306 LIR_Opr scratch = LIR_OprFact::illegalOpr;
307 if (EnableValhalla && x->maybe_inlinetype()) {
308 scratch = new_register(T_INT);
309 }
310
311 CodeEmitInfo* info_for_exception = NULL;
312 if (x->needs_null_check()) {
313 info_for_exception = state_for(x);
314 }
315
316 CodeStub* throw_imse_stub = x->maybe_inlinetype() ?
317 new SimpleExceptionStub(Runtime1::throw_illegal_monitor_state_exception_id,
318 LIR_OprFact::illegalOpr, state_for(x))
319 : NULL;
320
321 // this CodeEmitInfo must not have the xhandlers because here the
322 // object is already locked (xhandlers expect object to be unlocked)
323 CodeEmitInfo* info = state_for(x, x->state(), true);
324 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
325 x->monitor_no(), info_for_exception, info, throw_imse_stub);
326 }
327
328
329 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
330 assert(x->is_pinned(),"");
331
332 LIRItem obj(x->obj(), this);
333 obj.dont_load_item();
334
335 LIR_Opr lock = new_register(T_INT);
336 LIR_Opr obj_temp = new_register(T_INT);
337 set_no_result(x);
338 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
339 }
340
341
342 // _ineg, _lneg, _fneg, _dneg
343 void LIRGenerator::do_NegateOp(NegateOp* x) {
344 LIRItem value(x->x(), this);
345 value.set_destroys_register();
346 value.load_item();
347 LIR_Opr reg = rlock(x);
348
349 LIR_Opr tmp = LIR_OprFact::illegalOpr;
350 #ifdef _LP64
351 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
352 if (x->type()->tag() == doubleTag) {
353 tmp = new_register(T_DOUBLE);
354 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
355 }
356 else if (x->type()->tag() == floatTag) {
357 tmp = new_register(T_FLOAT);
358 __ move(LIR_OprFact::floatConst(-0.0), tmp);
359 }
360 }
361 #endif
362 __ negate(value.result(), reg, tmp);
363
364 set_result(x, round_item(reg));
365 }
366
367
368 // for _fadd, _fmul, _fsub, _fdiv, _frem
369 // _dadd, _dmul, _dsub, _ddiv, _drem
370 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
371 LIRItem left(x->x(), this);
372 LIRItem right(x->y(), this);
373 LIRItem* left_arg = &left;
374 LIRItem* right_arg = &right;
375 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
376 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
377 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
378 left.load_item();
379 } else {
380 left.dont_load_item();
381 }
382
383 #ifndef _LP64
384 // do not load right operand if it is a constant. only 0 and 1 are
385 // loaded because there are special instructions for loading them
386 // without memory access (not needed for SSE2 instructions)
387 bool must_load_right = false;
388 if (right.is_constant()) {
389 LIR_Const* c = right.result()->as_constant_ptr();
390 assert(c != NULL, "invalid constant");
391 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
392
393 if (c->type() == T_FLOAT) {
394 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
395 } else {
396 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
397 }
398 }
399 #endif // !LP64
400
401 if (must_load_both) {
402 // frem and drem destroy also right operand, so move it to a new register
403 right.set_destroys_register();
404 right.load_item();
405 } else if (right.is_register()) {
406 right.load_item();
407 #ifndef _LP64
408 } else if (must_load_right) {
409 right.load_item();
410 #endif // !LP64
411 } else {
412 right.dont_load_item();
413 }
414 LIR_Opr reg = rlock(x);
415 LIR_Opr tmp = LIR_OprFact::illegalOpr;
416 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
417 tmp = new_register(T_DOUBLE);
418 }
419
420 #ifdef _LP64
421 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
422 // frem and drem are implemented as a direct call into the runtime.
423 LIRItem left(x->x(), this);
424 LIRItem right(x->y(), this);
425
426 BasicType bt = as_BasicType(x->type());
427 BasicTypeList signature(2);
428 signature.append(bt);
429 signature.append(bt);
430 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
431
432 const LIR_Opr result_reg = result_register_for(x->type());
433 left.load_item_force(cc->at(0));
434 right.load_item_force(cc->at(1));
435
436 address entry = NULL;
437 switch (x->op()) {
438 case Bytecodes::_frem:
439 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
440 break;
441 case Bytecodes::_drem:
442 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
443 break;
444 default:
445 ShouldNotReachHere();
446 }
447
448 LIR_Opr result = rlock_result(x);
449 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
450 __ move(result_reg, result);
451 } else {
452 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
453 set_result(x, round_item(reg));
454 }
455 #else
456 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
457 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
458 LIR_Opr fpu0, fpu1;
459 if (x->op() == Bytecodes::_frem) {
460 fpu0 = LIR_OprFact::single_fpu(0);
461 fpu1 = LIR_OprFact::single_fpu(1);
462 } else {
463 fpu0 = LIR_OprFact::double_fpu(0);
464 fpu1 = LIR_OprFact::double_fpu(1);
465 }
466 __ move(right.result(), fpu1); // order of left and right operand is important!
467 __ move(left.result(), fpu0);
468 __ rem (fpu0, fpu1, fpu0);
469 __ move(fpu0, reg);
470
471 } else {
472 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
473 }
474 set_result(x, round_item(reg));
475 #endif // _LP64
476 }
477
478
479 // for _ladd, _lmul, _lsub, _ldiv, _lrem
480 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
481 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
482 // long division is implemented as a direct call into the runtime
483 LIRItem left(x->x(), this);
484 LIRItem right(x->y(), this);
485
486 // the check for division by zero destroys the right operand
487 right.set_destroys_register();
488
489 BasicTypeList signature(2);
490 signature.append(T_LONG);
491 signature.append(T_LONG);
492 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
493
494 // check for division by zero (destroys registers of right operand!)
495 CodeEmitInfo* info = state_for(x);
496
497 const LIR_Opr result_reg = result_register_for(x->type());
498 left.load_item_force(cc->at(1));
499 right.load_item();
500
501 __ move(right.result(), cc->at(0));
502
503 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
504 __ branch(lir_cond_equal, new DivByZeroStub(info));
505
506 address entry = NULL;
507 switch (x->op()) {
508 case Bytecodes::_lrem:
509 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
510 break; // check if dividend is 0 is done elsewhere
511 case Bytecodes::_ldiv:
512 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
513 break; // check if dividend is 0 is done elsewhere
514 default:
515 ShouldNotReachHere();
516 }
517
518 LIR_Opr result = rlock_result(x);
519 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
520 __ move(result_reg, result);
521 } else if (x->op() == Bytecodes::_lmul) {
522 // missing test if instr is commutative and if we should swap
523 LIRItem left(x->x(), this);
524 LIRItem right(x->y(), this);
525
526 // right register is destroyed by the long mul, so it must be
527 // copied to a new register.
528 right.set_destroys_register();
529
530 left.load_item();
531 right.load_item();
532
533 LIR_Opr reg = FrameMap::long0_opr;
534 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
535 LIR_Opr result = rlock_result(x);
536 __ move(reg, result);
537 } else {
538 // missing test if instr is commutative and if we should swap
539 LIRItem left(x->x(), this);
540 LIRItem right(x->y(), this);
541
542 left.load_item();
543 // don't load constants to save register
544 right.load_nonconstant();
545 rlock_result(x);
546 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
547 }
548 }
549
550
551
552 // for: _iadd, _imul, _isub, _idiv, _irem
553 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
554 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
555 // The requirements for division and modulo
556 // input : rax,: dividend min_int
557 // reg: divisor (may not be rax,/rdx) -1
558 //
559 // output: rax,: quotient (= rax, idiv reg) min_int
560 // rdx: remainder (= rax, irem reg) 0
561
562 // rax, and rdx will be destroyed
563
564 // Note: does this invalidate the spec ???
565 LIRItem right(x->y(), this);
566 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
567
568 // call state_for before load_item_force because state_for may
569 // force the evaluation of other instructions that are needed for
570 // correct debug info. Otherwise the live range of the fix
571 // register might be too long.
572 CodeEmitInfo* info = state_for(x);
573
574 left.load_item_force(divInOpr());
575
576 right.load_item();
577
578 LIR_Opr result = rlock_result(x);
579 LIR_Opr result_reg;
580 if (x->op() == Bytecodes::_idiv) {
581 result_reg = divOutOpr();
582 } else {
583 result_reg = remOutOpr();
584 }
585
586 if (!ImplicitDiv0Checks) {
587 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
588 __ branch(lir_cond_equal, new DivByZeroStub(info));
589 // Idiv/irem cannot trap (passing info would generate an assertion).
590 info = NULL;
591 }
592 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
593 if (x->op() == Bytecodes::_irem) {
594 __ irem(left.result(), right.result(), result_reg, tmp, info);
595 } else if (x->op() == Bytecodes::_idiv) {
596 __ idiv(left.result(), right.result(), result_reg, tmp, info);
597 } else {
598 ShouldNotReachHere();
599 }
600
601 __ move(result_reg, result);
602 } else {
603 // missing test if instr is commutative and if we should swap
604 LIRItem left(x->x(), this);
605 LIRItem right(x->y(), this);
606 LIRItem* left_arg = &left;
607 LIRItem* right_arg = &right;
608 if (x->is_commutative() && left.is_stack() && right.is_register()) {
609 // swap them if left is real stack (or cached) and right is real register(not cached)
610 left_arg = &right;
611 right_arg = &left;
612 }
613
614 left_arg->load_item();
615
616 // do not need to load right, as we can handle stack and constants
617 if (x->op() == Bytecodes::_imul ) {
618 // check if we can use shift instead
619 bool use_constant = false;
620 bool use_tmp = false;
621 if (right_arg->is_constant()) {
622 jint iconst = right_arg->get_jint_constant();
623 if (iconst > 0 && iconst < max_jint) {
624 if (is_power_of_2(iconst)) {
625 use_constant = true;
626 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
627 use_constant = true;
628 use_tmp = true;
629 }
630 }
631 }
632 if (use_constant) {
633 right_arg->dont_load_item();
634 } else {
635 right_arg->load_item();
636 }
637 LIR_Opr tmp = LIR_OprFact::illegalOpr;
638 if (use_tmp) {
639 tmp = new_register(T_INT);
640 }
641 rlock_result(x);
642
643 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
644 } else {
645 right_arg->dont_load_item();
646 rlock_result(x);
647 LIR_Opr tmp = LIR_OprFact::illegalOpr;
648 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
649 }
650 }
651 }
652
653
654 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
655 // when an operand with use count 1 is the left operand, then it is
656 // likely that no move for 2-operand-LIR-form is necessary
657 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
658 x->swap_operands();
659 }
660
661 ValueTag tag = x->type()->tag();
662 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
663 switch (tag) {
664 case floatTag:
665 case doubleTag: do_ArithmeticOp_FPU(x); return;
666 case longTag: do_ArithmeticOp_Long(x); return;
667 case intTag: do_ArithmeticOp_Int(x); return;
668 default: ShouldNotReachHere(); return;
669 }
670 }
671
672
673 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
674 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
675 // count must always be in rcx
676 LIRItem value(x->x(), this);
677 LIRItem count(x->y(), this);
678
679 ValueTag elemType = x->type()->tag();
680 bool must_load_count = !count.is_constant() || elemType == longTag;
681 if (must_load_count) {
682 // count for long must be in register
683 count.load_item_force(shiftCountOpr());
684 } else {
685 count.dont_load_item();
686 }
687 value.load_item();
688 LIR_Opr reg = rlock_result(x);
689
690 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
691 }
692
693
694 // _iand, _land, _ior, _lor, _ixor, _lxor
695 void LIRGenerator::do_LogicOp(LogicOp* x) {
696 // when an operand with use count 1 is the left operand, then it is
697 // likely that no move for 2-operand-LIR-form is necessary
698 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
699 x->swap_operands();
700 }
701
702 LIRItem left(x->x(), this);
703 LIRItem right(x->y(), this);
704
705 left.load_item();
706 right.load_nonconstant();
707 LIR_Opr reg = rlock_result(x);
708
709 logic_op(x->op(), reg, left.result(), right.result());
710 }
711
712
713
714 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
715 void LIRGenerator::do_CompareOp(CompareOp* x) {
716 LIRItem left(x->x(), this);
717 LIRItem right(x->y(), this);
718 ValueTag tag = x->x()->type()->tag();
719 if (tag == longTag) {
720 left.set_destroys_register();
721 }
722 left.load_item();
723 right.load_item();
724 LIR_Opr reg = rlock_result(x);
725
726 if (x->x()->type()->is_float_kind()) {
727 Bytecodes::Code code = x->op();
728 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
729 } else if (x->x()->type()->tag() == longTag) {
730 __ lcmp2int(left.result(), right.result(), reg);
731 } else {
732 Unimplemented();
733 }
734 }
735
736 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
737 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
738 if (is_reference_type(type)) {
739 cmp_value.load_item_force(FrameMap::rax_oop_opr);
740 new_value.load_item();
741 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
742 } else if (type == T_INT) {
743 cmp_value.load_item_force(FrameMap::rax_opr);
744 new_value.load_item();
745 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
746 } else if (type == T_LONG) {
747 cmp_value.load_item_force(FrameMap::long0_opr);
748 new_value.load_item_force(FrameMap::long1_opr);
749 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
750 } else {
751 Unimplemented();
752 }
753 LIR_Opr result = new_register(T_INT);
754 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
755 result, T_INT);
756 return result;
757 }
758
759 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
760 bool is_oop = is_reference_type(type);
761 LIR_Opr result = new_register(type);
762 value.load_item();
763 // Because we want a 2-arg form of xchg and xadd
764 __ move(value.result(), result);
765 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
766 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
767 return result;
768 }
769
770 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
771 LIR_Opr result = new_register(type);
772 value.load_item();
773 // Because we want a 2-arg form of xchg and xadd
774 __ move(value.result(), result);
775 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
776 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
777 return result;
778 }
779
780 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
781 assert(x->number_of_arguments() == 3, "wrong type");
782 assert(UseFMA, "Needs FMA instructions support.");
783 LIRItem value(x->argument_at(0), this);
784 LIRItem value1(x->argument_at(1), this);
785 LIRItem value2(x->argument_at(2), this);
786
787 value2.set_destroys_register();
788
789 value.load_item();
790 value1.load_item();
791 value2.load_item();
792
793 LIR_Opr calc_input = value.result();
794 LIR_Opr calc_input1 = value1.result();
795 LIR_Opr calc_input2 = value2.result();
796 LIR_Opr calc_result = rlock_result(x);
797
798 switch (x->id()) {
799 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
800 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
801 default: ShouldNotReachHere();
802 }
803
804 }
805
806
807 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
808 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
809
810 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
811 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
812 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
813 x->id() == vmIntrinsics::_dlog10) {
814 do_LibmIntrinsic(x);
815 return;
816 }
817
818 LIRItem value(x->argument_at(0), this);
819
820 bool use_fpu = false;
821 #ifndef _LP64
822 if (UseSSE < 2) {
823 value.set_destroys_register();
824 }
825 #endif // !LP64
826 value.load_item();
827
828 LIR_Opr calc_input = value.result();
829 LIR_Opr calc_result = rlock_result(x);
830
831 LIR_Opr tmp = LIR_OprFact::illegalOpr;
832 #ifdef _LP64
833 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
834 (x->id() == vmIntrinsics::_dabs)) {
835 tmp = new_register(T_DOUBLE);
836 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
837 }
838 #endif
839
840 switch(x->id()) {
841 case vmIntrinsics::_dabs:
842 __ abs(calc_input, calc_result, tmp);
843 break;
844 case vmIntrinsics::_dsqrt:
845 case vmIntrinsics::_dsqrt_strict:
846 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
847 break;
848 default:
849 ShouldNotReachHere();
850 }
851
852 if (use_fpu) {
853 __ move(calc_result, x->operand());
854 }
855 }
856
857 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
858 LIRItem value(x->argument_at(0), this);
859 value.set_destroys_register();
860
861 LIR_Opr calc_result = rlock_result(x);
862 LIR_Opr result_reg = result_register_for(x->type());
863
864 CallingConvention* cc = NULL;
865
866 if (x->id() == vmIntrinsics::_dpow) {
867 LIRItem value1(x->argument_at(1), this);
868
869 value1.set_destroys_register();
870
871 BasicTypeList signature(2);
872 signature.append(T_DOUBLE);
873 signature.append(T_DOUBLE);
874 cc = frame_map()->c_calling_convention(&signature);
875 value.load_item_force(cc->at(0));
876 value1.load_item_force(cc->at(1));
877 } else {
878 BasicTypeList signature(1);
879 signature.append(T_DOUBLE);
880 cc = frame_map()->c_calling_convention(&signature);
881 value.load_item_force(cc->at(0));
882 }
883
884 #ifndef _LP64
885 LIR_Opr tmp = FrameMap::fpu0_double_opr;
886 result_reg = tmp;
887 switch(x->id()) {
888 case vmIntrinsics::_dexp:
889 if (StubRoutines::dexp() != NULL) {
890 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
891 } else {
892 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
893 }
894 break;
895 case vmIntrinsics::_dlog:
896 if (StubRoutines::dlog() != NULL) {
897 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
898 } else {
899 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
900 }
901 break;
902 case vmIntrinsics::_dlog10:
903 if (StubRoutines::dlog10() != NULL) {
904 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
905 } else {
906 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
907 }
908 break;
909 case vmIntrinsics::_dpow:
910 if (StubRoutines::dpow() != NULL) {
911 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
912 } else {
913 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
914 }
915 break;
916 case vmIntrinsics::_dsin:
917 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
918 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
919 } else {
920 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
921 }
922 break;
923 case vmIntrinsics::_dcos:
924 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
925 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
926 } else {
927 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
928 }
929 break;
930 case vmIntrinsics::_dtan:
931 if (StubRoutines::dtan() != NULL) {
932 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
933 } else {
934 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
935 }
936 break;
937 default: ShouldNotReachHere();
938 }
939 #else
940 switch (x->id()) {
941 case vmIntrinsics::_dexp:
942 if (StubRoutines::dexp() != NULL) {
943 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
944 } else {
945 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
946 }
947 break;
948 case vmIntrinsics::_dlog:
949 if (StubRoutines::dlog() != NULL) {
950 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
951 } else {
952 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
953 }
954 break;
955 case vmIntrinsics::_dlog10:
956 if (StubRoutines::dlog10() != NULL) {
957 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
958 } else {
959 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
960 }
961 break;
962 case vmIntrinsics::_dpow:
963 if (StubRoutines::dpow() != NULL) {
964 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
965 } else {
966 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
967 }
968 break;
969 case vmIntrinsics::_dsin:
970 if (StubRoutines::dsin() != NULL) {
971 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
972 } else {
973 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
974 }
975 break;
976 case vmIntrinsics::_dcos:
977 if (StubRoutines::dcos() != NULL) {
978 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
979 } else {
980 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
981 }
982 break;
983 case vmIntrinsics::_dtan:
984 if (StubRoutines::dtan() != NULL) {
985 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
986 } else {
987 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
988 }
989 break;
990 default: ShouldNotReachHere();
991 }
992 #endif // _LP64
993 __ move(result_reg, calc_result);
994 }
995
996 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
997 assert(x->number_of_arguments() == 5, "wrong type");
998
999 // Make all state_for calls early since they can emit code
1000 CodeEmitInfo* info = state_for(x, x->state());
1001
1002 LIRItem src(x->argument_at(0), this);
1003 LIRItem src_pos(x->argument_at(1), this);
1004 LIRItem dst(x->argument_at(2), this);
1005 LIRItem dst_pos(x->argument_at(3), this);
1006 LIRItem length(x->argument_at(4), this);
1007
1008 // operands for arraycopy must use fixed registers, otherwise
1009 // LinearScan will fail allocation (because arraycopy always needs a
1010 // call)
1011
1012 #ifndef _LP64
1013 src.load_item_force (FrameMap::rcx_oop_opr);
1014 src_pos.load_item_force (FrameMap::rdx_opr);
1015 dst.load_item_force (FrameMap::rax_oop_opr);
1016 dst_pos.load_item_force (FrameMap::rbx_opr);
1017 length.load_item_force (FrameMap::rdi_opr);
1018 LIR_Opr tmp = (FrameMap::rsi_opr);
1019 #else
1020
1021 // The java calling convention will give us enough registers
1022 // so that on the stub side the args will be perfect already.
1023 // On the other slow/special case side we call C and the arg
1024 // positions are not similar enough to pick one as the best.
1025 // Also because the java calling convention is a "shifted" version
1026 // of the C convention we can process the java args trivially into C
1027 // args without worry of overwriting during the xfer
1028
1029 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1030 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1031 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1032 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1033 length.load_item_force (FrameMap::as_opr(j_rarg4));
1034
1035 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1036 #endif // LP64
1037
1038 set_no_result(x);
1039
1040 int flags;
1041 ciArrayKlass* expected_type;
1042 arraycopy_helper(x, &flags, &expected_type);
1043
1044 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1045 }
1046
1047 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1048 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1049 // Make all state_for calls early since they can emit code
1050 LIR_Opr result = rlock_result(x);
1051 int flags = 0;
1052 switch (x->id()) {
1053 case vmIntrinsics::_updateCRC32: {
1054 LIRItem crc(x->argument_at(0), this);
1055 LIRItem val(x->argument_at(1), this);
1056 // val is destroyed by update_crc32
1057 val.set_destroys_register();
1058 crc.load_item();
1059 val.load_item();
1060 __ update_crc32(crc.result(), val.result(), result);
1061 break;
1062 }
1063 case vmIntrinsics::_updateBytesCRC32:
1064 case vmIntrinsics::_updateByteBufferCRC32: {
1065 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1066
1067 LIRItem crc(x->argument_at(0), this);
1068 LIRItem buf(x->argument_at(1), this);
1069 LIRItem off(x->argument_at(2), this);
1070 LIRItem len(x->argument_at(3), this);
1071 buf.load_item();
1072 off.load_nonconstant();
1073
1074 LIR_Opr index = off.result();
1075 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1076 if(off.result()->is_constant()) {
1077 index = LIR_OprFact::illegalOpr;
1078 offset += off.result()->as_jint();
1079 }
1080 LIR_Opr base_op = buf.result();
1081
1082 #ifndef _LP64
1083 if (!is_updateBytes) { // long b raw address
1084 base_op = new_register(T_INT);
1085 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1086 }
1087 #else
1088 if (index->is_valid()) {
1089 LIR_Opr tmp = new_register(T_LONG);
1090 __ convert(Bytecodes::_i2l, index, tmp);
1091 index = tmp;
1092 }
1093 #endif
1094
1095 LIR_Address* a = new LIR_Address(base_op,
1096 index,
1097 offset,
1098 T_BYTE);
1099 BasicTypeList signature(3);
1100 signature.append(T_INT);
1101 signature.append(T_ADDRESS);
1102 signature.append(T_INT);
1103 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1104 const LIR_Opr result_reg = result_register_for(x->type());
1105
1106 LIR_Opr addr = new_pointer_register();
1107 __ leal(LIR_OprFact::address(a), addr);
1108
1109 crc.load_item_force(cc->at(0));
1110 __ move(addr, cc->at(1));
1111 len.load_item_force(cc->at(2));
1112
1113 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1114 __ move(result_reg, result);
1115
1116 break;
1117 }
1118 default: {
1119 ShouldNotReachHere();
1120 }
1121 }
1122 }
1123
1124 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1125 Unimplemented();
1126 }
1127
1128 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1129 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1130
1131 // Make all state_for calls early since they can emit code
1132 LIR_Opr result = rlock_result(x);
1133
1134 LIRItem a(x->argument_at(0), this); // Object
1135 LIRItem aOffset(x->argument_at(1), this); // long
1136 LIRItem b(x->argument_at(2), this); // Object
1137 LIRItem bOffset(x->argument_at(3), this); // long
1138 LIRItem length(x->argument_at(4), this); // int
1139 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1140
1141 a.load_item();
1142 aOffset.load_nonconstant();
1143 b.load_item();
1144 bOffset.load_nonconstant();
1145
1146 long constant_aOffset = 0;
1147 LIR_Opr result_aOffset = aOffset.result();
1148 if (result_aOffset->is_constant()) {
1149 constant_aOffset = result_aOffset->as_jlong();
1150 result_aOffset = LIR_OprFact::illegalOpr;
1151 }
1152 LIR_Opr result_a = a.result();
1153
1154 long constant_bOffset = 0;
1155 LIR_Opr result_bOffset = bOffset.result();
1156 if (result_bOffset->is_constant()) {
1157 constant_bOffset = result_bOffset->as_jlong();
1158 result_bOffset = LIR_OprFact::illegalOpr;
1159 }
1160 LIR_Opr result_b = b.result();
1161
1162 #ifndef _LP64
1163 result_a = new_register(T_INT);
1164 __ convert(Bytecodes::_l2i, a.result(), result_a);
1165 result_b = new_register(T_INT);
1166 __ convert(Bytecodes::_l2i, b.result(), result_b);
1167 #endif
1168
1169
1170 LIR_Address* addr_a = new LIR_Address(result_a,
1171 result_aOffset,
1172 constant_aOffset,
1173 T_BYTE);
1174
1175 LIR_Address* addr_b = new LIR_Address(result_b,
1176 result_bOffset,
1177 constant_bOffset,
1178 T_BYTE);
1179
1180 BasicTypeList signature(4);
1181 signature.append(T_ADDRESS);
1182 signature.append(T_ADDRESS);
1183 signature.append(T_INT);
1184 signature.append(T_INT);
1185 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1186 const LIR_Opr result_reg = result_register_for(x->type());
1187
1188 LIR_Opr ptr_addr_a = new_pointer_register();
1189 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1190
1191 LIR_Opr ptr_addr_b = new_pointer_register();
1192 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1193
1194 __ move(ptr_addr_a, cc->at(0));
1195 __ move(ptr_addr_b, cc->at(1));
1196 length.load_item_force(cc->at(2));
1197 log2ArrayIndexScale.load_item_force(cc->at(3));
1198
1199 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1200 __ move(result_reg, result);
1201 }
1202
1203 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1204 // _i2b, _i2c, _i2s
1205 LIR_Opr fixed_register_for(BasicType type) {
1206 switch (type) {
1207 case T_FLOAT: return FrameMap::fpu0_float_opr;
1208 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1209 case T_INT: return FrameMap::rax_opr;
1210 case T_LONG: return FrameMap::long0_opr;
1211 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1212 }
1213 }
1214
1215 void LIRGenerator::do_Convert(Convert* x) {
1216 #ifdef _LP64
1217 LIRItem value(x->value(), this);
1218 value.load_item();
1219 LIR_Opr input = value.result();
1220 LIR_Opr result = rlock(x);
1221 __ convert(x->op(), input, result);
1222 assert(result->is_virtual(), "result must be virtual register");
1223 set_result(x, result);
1224 #else
1225 // flags that vary for the different operations and different SSE-settings
1226 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1227
1228 switch (x->op()) {
1229 case Bytecodes::_i2l: // fall through
1230 case Bytecodes::_l2i: // fall through
1231 case Bytecodes::_i2b: // fall through
1232 case Bytecodes::_i2c: // fall through
1233 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1234
1235 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1236 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1237 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1238 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1239 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1240 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1241 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1242 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1243 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1244 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1245 default: ShouldNotReachHere();
1246 }
1247
1248 LIRItem value(x->value(), this);
1249 value.load_item();
1250 LIR_Opr input = value.result();
1251 LIR_Opr result = rlock(x);
1252
1253 // arguments of lir_convert
1254 LIR_Opr conv_input = input;
1255 LIR_Opr conv_result = result;
1256 ConversionStub* stub = NULL;
1257
1258 if (fixed_input) {
1259 conv_input = fixed_register_for(input->type());
1260 __ move(input, conv_input);
1261 }
1262
1263 assert(fixed_result == false || round_result == false, "cannot set both");
1264 if (fixed_result) {
1265 conv_result = fixed_register_for(result->type());
1266 } else if (round_result) {
1267 result = new_register(result->type());
1268 set_vreg_flag(result, must_start_in_memory);
1269 }
1270
1271 if (needs_stub) {
1272 stub = new ConversionStub(x->op(), conv_input, conv_result);
1273 }
1274
1275 __ convert(x->op(), conv_input, conv_result, stub);
1276
1277 if (result != conv_result) {
1278 __ move(conv_result, result);
1279 }
1280
1281 assert(result->is_virtual(), "result must be virtual register");
1282 set_result(x, result);
1283 #endif // _LP64
1284 }
1285
1286
1287 void LIRGenerator::do_NewInstance(NewInstance* x) {
1288 print_if_not_loaded(x);
1289
1290 CodeEmitInfo* info = state_for(x, x->state());
1291 LIR_Opr reg = result_register_for(x->type());
1292 new_instance(reg, x->klass(), x->is_unresolved(),
1293 /* allow_inline */ false,
1294 FrameMap::rcx_oop_opr,
1295 FrameMap::rdi_oop_opr,
1296 FrameMap::rsi_oop_opr,
1297 LIR_OprFact::illegalOpr,
1298 FrameMap::rdx_metadata_opr, info);
1299 LIR_Opr result = rlock_result(x);
1300 __ move(reg, result);
1301 }
1302
1303 void LIRGenerator::do_NewInlineTypeInstance(NewInlineTypeInstance* x) {
1304 // Mapping to do_NewInstance (same code) but use state_before for reexecution.
1305 CodeEmitInfo* info = state_for(x, x->state_before());
1306 x->set_to_object_type();
1307 LIR_Opr reg = result_register_for(x->type());
1308 new_instance(reg, x->klass(), false,
1309 /* allow_inline */ true,
1310 FrameMap::rcx_oop_opr,
1311 FrameMap::rdi_oop_opr,
1312 FrameMap::rsi_oop_opr,
1313 LIR_OprFact::illegalOpr,
1314 FrameMap::rdx_metadata_opr, info);
1315 LIR_Opr result = rlock_result(x);
1316 __ move(reg, result);
1317 }
1318
1319 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1320 CodeEmitInfo* info = state_for(x, x->state());
1321
1322 LIRItem length(x->length(), this);
1323 length.load_item_force(FrameMap::rbx_opr);
1324
1325 LIR_Opr reg = result_register_for(x->type());
1326 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1327 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1328 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1329 LIR_Opr tmp4 = reg;
1330 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1331 LIR_Opr len = length.result();
1332 BasicType elem_type = x->elt_type();
1333
1334 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1335
1336 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1337 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1338
1339 LIR_Opr result = rlock_result(x);
1340 __ move(reg, result);
1341 }
1342
1343
1344 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1345 LIRItem length(x->length(), this);
1346 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1347 // and therefore provide the state before the parameters have been consumed
1348 CodeEmitInfo* patching_info = NULL;
1349 if (!x->klass()->is_loaded() || PatchALot) {
1350 patching_info = state_for(x, x->state_before());
1351 }
1352
1353 CodeEmitInfo* info = state_for(x, x->state());
1354
1355 const LIR_Opr reg = result_register_for(x->type());
1356 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1357 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1358 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1359 LIR_Opr tmp4 = reg;
1360 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1361
1362 length.load_item_force(FrameMap::rbx_opr);
1363 LIR_Opr len = length.result();
1364
1365 ciKlass* obj = (ciKlass*) x->exact_type();
1366 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_null_free());
1367 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1368 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1369 }
1370 klass2reg_with_patching(klass_reg, obj, patching_info);
1371 if (x->is_null_free()) {
1372 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_INLINE_TYPE, klass_reg, slow_path);
1373 } else {
1374 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1375 }
1376
1377 LIR_Opr result = rlock_result(x);
1378 __ move(reg, result);
1379 }
1380
1381
1382 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1383 Values* dims = x->dims();
1384 int i = dims->length();
1385 LIRItemList* items = new LIRItemList(i, i, NULL);
1386 while (i-- > 0) {
1387 LIRItem* size = new LIRItem(dims->at(i), this);
1388 items->at_put(i, size);
1389 }
1390
1391 // Evaluate state_for early since it may emit code.
1392 CodeEmitInfo* patching_info = NULL;
1393 if (!x->klass()->is_loaded() || PatchALot) {
1394 patching_info = state_for(x, x->state_before());
1395
1396 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1397 // clone all handlers (NOTE: Usually this is handled transparently
1398 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1399 // is done explicitly here because a stub isn't being used).
1400 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1401 }
1402 CodeEmitInfo* info = state_for(x, x->state());
1403
1404 i = dims->length();
1405 while (i-- > 0) {
1406 LIRItem* size = items->at(i);
1407 size->load_nonconstant();
1408
1409 store_stack_parameter(size->result(), in_ByteSize(i*4));
1410 }
1411
1412 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1413 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1414
1415 LIR_Opr rank = FrameMap::rbx_opr;
1416 __ move(LIR_OprFact::intConst(x->rank()), rank);
1417 LIR_Opr varargs = FrameMap::rcx_opr;
1418 __ move(FrameMap::rsp_opr, varargs);
1419 LIR_OprList* args = new LIR_OprList(3);
1420 args->append(klass_reg);
1421 args->append(rank);
1422 args->append(varargs);
1423 LIR_Opr reg = result_register_for(x->type());
1424 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1425 LIR_OprFact::illegalOpr,
1426 reg, args, info);
1427
1428 LIR_Opr result = rlock_result(x);
1429 __ move(reg, result);
1430 }
1431
1432
1433 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1434 // nothing to do for now
1435 }
1436
1437
1438 void LIRGenerator::do_CheckCast(CheckCast* x) {
1439 LIRItem obj(x->obj(), this);
1440
1441 CodeEmitInfo* patching_info = NULL;
1442 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1443 // must do this before locking the destination register as an oop register,
1444 // and before the obj is loaded (the latter is for deoptimization)
1445 patching_info = state_for(x, x->state_before());
1446 }
1447 obj.load_item();
1448
1449 // info for exceptions
1450 CodeEmitInfo* info_for_exception =
1451 (x->needs_exception_state() ? state_for(x) :
1452 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1453
1454 if (x->is_null_free()) {
1455 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1456 }
1457
1458 CodeStub* stub;
1459 if (x->is_incompatible_class_change_check()) {
1460 assert(patching_info == NULL, "can't patch this");
1461 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1462 } else if (x->is_invokespecial_receiver_check()) {
1463 assert(patching_info == NULL, "can't patch this");
1464 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1465 } else {
1466 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1467 }
1468 LIR_Opr reg = rlock_result(x);
1469 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1470 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1471 tmp3 = new_register(objectType);
1472 }
1473 __ checkcast(reg, obj.result(), x->klass(),
1474 new_register(objectType), new_register(objectType), tmp3,
1475 x->direct_compare(), info_for_exception, patching_info, stub,
1476 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1477 }
1478
1479
1480 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1481 LIRItem obj(x->obj(), this);
1482
1483 // result and test object may not be in same register
1484 LIR_Opr reg = rlock_result(x);
1485 CodeEmitInfo* patching_info = NULL;
1486 if ((!x->klass()->is_loaded() || PatchALot)) {
1487 // must do this before locking the destination register as an oop register
1488 patching_info = state_for(x, x->state_before());
1489 }
1490 obj.load_item();
1491 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1492 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1493 tmp3 = new_register(objectType);
1494 }
1495 __ instanceof(reg, obj.result(), x->klass(),
1496 new_register(objectType), new_register(objectType), tmp3,
1497 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1498 }
1499
1500
1501 void LIRGenerator::do_If(If* x) {
1502 assert(x->number_of_sux() == 2, "inconsistency");
1503 ValueTag tag = x->x()->type()->tag();
1504 bool is_safepoint = x->is_safepoint();
1505
1506 If::Condition cond = x->cond();
1507
1508 LIRItem xitem(x->x(), this);
1509 LIRItem yitem(x->y(), this);
1510 LIRItem* xin = &xitem;
1511 LIRItem* yin = &yitem;
1512
1513 if (tag == longTag) {
1514 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1515 // mirror for other conditions
1516 if (cond == If::gtr || cond == If::leq) {
1517 cond = Instruction::mirror(cond);
1518 xin = &yitem;
1519 yin = &xitem;
1520 }
1521 xin->set_destroys_register();
1522 }
1523 xin->load_item();
1524 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1525 // inline long zero
1526 yin->dont_load_item();
1527 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) {
1528 // longs cannot handle constants at right side
1529 yin->load_item();
1530 } else {
1531 yin->dont_load_item();
1532 }
1533
1534 LIR_Opr left = xin->result();
1535 LIR_Opr right = yin->result();
1536
1537 set_no_result(x);
1538
1539 // add safepoint before generating condition code so it can be recomputed
1540 if (x->is_safepoint()) {
1541 // increment backedge counter if needed
1542 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1543 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1544 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1545 }
1546
1547 if (x->substitutability_check()) {
1548 substitutability_check(x, *xin, *yin);
1549 } else {
1550 __ cmp(lir_cond(cond), left, right);
1551 }
1552 // Generate branch profiling. Profiling code doesn't kill flags.
1553 profile_branch(x, cond);
1554 move_to_phi(x->state());
1555 if (x->x()->type()->is_float_kind()) {
1556 __ branch(lir_cond(cond), x->tsux(), x->usux());
1557 } else {
1558 __ branch(lir_cond(cond), x->tsux());
1559 }
1560 assert(x->default_sux() == x->fsux(), "wrong destination above");
1561 __ jump(x->default_sux());
1562 }
1563
1564
1565 LIR_Opr LIRGenerator::getThreadPointer() {
1566 #ifdef _LP64
1567 return FrameMap::as_pointer_opr(r15_thread);
1568 #else
1569 LIR_Opr result = new_register(T_INT);
1570 __ get_thread(result);
1571 return result;
1572 #endif //
1573 }
1574
1575 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1576 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1577 LIR_OprList* args = new LIR_OprList();
1578 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1579 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1580 }
1581
1582
1583 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1584 CodeEmitInfo* info) {
1585 if (address->type() == T_LONG) {
1586 address = new LIR_Address(address->base(),
1587 address->index(), address->scale(),
1588 address->disp(), T_DOUBLE);
1589 // Transfer the value atomically by using FP moves. This means
1590 // the value has to be moved between CPU and FPU registers. It
1591 // always has to be moved through spill slot since there's no
1592 // quick way to pack the value into an SSE register.
1593 LIR_Opr temp_double = new_register(T_DOUBLE);
1594 LIR_Opr spill = new_register(T_LONG);
1595 set_vreg_flag(spill, must_start_in_memory);
1596 __ move(value, spill);
1597 __ volatile_move(spill, temp_double, T_LONG);
1598 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1599 } else {
1600 __ store(value, address, info);
1601 }
1602 }
1603
1604 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1605 CodeEmitInfo* info) {
1606 if (address->type() == T_LONG) {
1607 address = new LIR_Address(address->base(),
1608 address->index(), address->scale(),
1609 address->disp(), T_DOUBLE);
1610 // Transfer the value atomically by using FP moves. This means
1611 // the value has to be moved between CPU and FPU registers. In
1612 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1613 // SSE2+ mode it can be moved directly.
1614 LIR_Opr temp_double = new_register(T_DOUBLE);
1615 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1616 __ volatile_move(temp_double, result, T_LONG);
1617 #ifndef _LP64
1618 if (UseSSE < 2) {
1619 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1620 set_vreg_flag(result, must_start_in_memory);
1621 }
1622 #endif // !LP64
1623 } else {
1624 __ load(address, result, info);
1625 }
1626 }