1 /*
2 * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciInlineKlass.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "gc/shared/c1/barrierSetC1.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "utilities/powerOfTwo.hpp"
41 #include "vmreg_x86.inline.hpp"
42
43 #ifdef ASSERT
44 #define __ gen()->lir(__FILE__, __LINE__)->
45 #else
46 #define __ gen()->lir()->
47 #endif
48
49 // Item will be loaded into a byte register; Intel only
50 void LIRItem::load_byte_item() {
51 load_item();
52 LIR_Opr res = result();
53
54 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
55 // make sure that it is a byte register
56 assert(!value()->type()->is_float() && !value()->type()->is_double(),
57 "can't load floats in byte register");
58 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
59 __ move(res, reg);
60
61 _result = reg;
62 }
63 }
64
65
66 void LIRItem::load_nonconstant() {
67 LIR_Opr r = value()->operand();
68 if (r->is_constant()) {
69 _result = r;
70 } else {
71 load_item();
72 }
73 }
74
75 //--------------------------------------------------------------
76 // LIRGenerator
77 //--------------------------------------------------------------
78
79
80 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
81 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
84 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
85 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
86 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
87 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
88 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
89
90
91 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
92 LIR_Opr opr;
93 switch (type->tag()) {
94 case intTag: opr = FrameMap::rax_opr; break;
95 case objectTag: opr = FrameMap::rax_oop_opr; break;
96 case longTag: opr = FrameMap::long0_opr; break;
97 #ifdef _LP64
98 case floatTag: opr = FrameMap::xmm0_float_opr; break;
99 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
100 #else
101 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
102 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
103 #endif // _LP64
104 case addressTag:
105 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
106 }
107
108 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
109 return opr;
110 }
111
112
113 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
114 LIR_Opr reg = new_register(T_INT);
115 set_vreg_flag(reg, LIRGenerator::byte_reg);
116 return reg;
117 }
118
119
120 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
121 // We just need one 32-bit temp register for x86/x64, to check whether both
122 // oops have markWord::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck().
123 // @temp = %r10d
124 // mov $0x405, %r10d
125 // and (%left), %r10d /* if need to check left */
126 // and (%right), %r10d /* if need to check right */
127 // cmp $0x405, $r10d
128 // jne L_oops_not_equal
129 tmp1 = new_register(T_INT);
130 tmp2 = LIR_OprFact::illegalOpr;
131 }
132
133 //--------- loading items into registers --------------------------------
134
135
136 // i486 instructions can inline constants
137 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
138 if (type == T_SHORT || type == T_CHAR) {
139 // there is no immediate move of word values in asembler_i486.?pp
140 return false;
141 }
142 Constant* c = v->as_Constant();
143 if (c && c->state_before() == NULL) {
144 // constants of any type can be stored directly, except for
145 // unloaded object constants.
146 return true;
147 }
148 return false;
149 }
150
151
152 bool LIRGenerator::can_inline_as_constant(Value v) const {
153 if (v->type()->tag() == longTag) return false;
154 return v->type()->tag() != objectTag ||
155 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
156 }
157
158
159 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
160 if (c->type() == T_LONG) return false;
161 return c->type() != T_OBJECT || c->as_jobject() == NULL;
162 }
163
164
165 LIR_Opr LIRGenerator::safepoint_poll_register() {
166 NOT_LP64( return new_register(T_ADDRESS); )
167 return LIR_OprFact::illegalOpr;
168 }
169
170
171 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
172 int shift, int disp, BasicType type) {
173 assert(base->is_register(), "must be");
174 if (index->is_constant()) {
175 LIR_Const *constant = index->as_constant_ptr();
176 #ifdef _LP64
177 jlong c;
178 if (constant->type() == T_INT) {
179 c = (jlong(index->as_jint()) << shift) + disp;
180 } else {
181 assert(constant->type() == T_LONG, "should be");
182 c = (index->as_jlong() << shift) + disp;
183 }
184 if ((jlong)((jint)c) == c) {
185 return new LIR_Address(base, (jint)c, type);
186 } else {
187 LIR_Opr tmp = new_register(T_LONG);
188 __ move(index, tmp);
189 return new LIR_Address(base, tmp, type);
190 }
191 #else
192 return new LIR_Address(base,
193 ((intx)(constant->as_jint()) << shift) + disp,
194 type);
195 #endif
196 } else {
197 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
198 }
199 }
200
201
202 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
203 BasicType type) {
204 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
205
206 LIR_Address* addr;
207 if (index_opr->is_constant()) {
208 int elem_size = type2aelembytes(type);
209 addr = new LIR_Address(array_opr,
210 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
211 } else {
212 #ifdef _LP64
213 if (index_opr->type() == T_INT) {
214 LIR_Opr tmp = new_register(T_LONG);
215 __ convert(Bytecodes::_i2l, index_opr, tmp);
216 index_opr = tmp;
217 }
218 #endif // _LP64
219 addr = new LIR_Address(array_opr,
220 index_opr,
221 LIR_Address::scale(type),
222 offset_in_bytes, type);
223 }
224 return addr;
225 }
226
227
228 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
229 LIR_Opr r = NULL;
230 if (type == T_LONG) {
231 r = LIR_OprFact::longConst(x);
232 } else if (type == T_INT) {
233 r = LIR_OprFact::intConst(x);
234 } else {
235 ShouldNotReachHere();
236 }
237 return r;
238 }
239
240 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
241 LIR_Opr pointer = new_pointer_register();
242 __ move(LIR_OprFact::intptrConst(counter), pointer);
243 LIR_Address* addr = new LIR_Address(pointer, type);
244 increment_counter(addr, step);
245 }
246
247
248 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
249 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
250 }
251
252 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
253 __ cmp_mem_int(condition, base, disp, c, info);
254 }
255
256
257 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
258 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
259 }
260
261
262 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
263 if (tmp->is_valid() && c > 0 && c < max_jint) {
264 if (is_power_of_2(c + 1)) {
265 __ move(left, tmp);
266 __ shift_left(left, log2i_exact(c + 1), left);
267 __ sub(left, tmp, result);
268 return true;
269 } else if (is_power_of_2(c - 1)) {
270 __ move(left, tmp);
271 __ shift_left(left, log2i_exact(c - 1), left);
272 __ add(left, tmp, result);
273 return true;
274 }
275 }
276 return false;
277 }
278
279
280 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
281 BasicType type = item->type();
282 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
283 }
284
285 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
286 LIR_Opr tmp1 = new_register(objectType);
287 LIR_Opr tmp2 = new_register(objectType);
288 LIR_Opr tmp3 = new_register(objectType);
289 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
290 }
291
292 //----------------------------------------------------------------------
293 // visitor functions
294 //----------------------------------------------------------------------
295
296 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
297 assert(x->is_pinned(),"");
298 LIRItem obj(x->obj(), this);
299 obj.load_item();
300
301 set_no_result(x);
302
303 // "lock" stores the address of the monitor stack slot, so this is not an oop
304 LIR_Opr lock = new_register(T_INT);
305 // Need a scratch register for inline types on x86
306 LIR_Opr scratch = LIR_OprFact::illegalOpr;
307 if (EnableValhalla && x->maybe_inlinetype()) {
308 scratch = new_register(T_INT);
309 }
310
311 CodeEmitInfo* info_for_exception = NULL;
312 if (x->needs_null_check()) {
313 info_for_exception = state_for(x);
314 }
315
316 CodeStub* throw_imse_stub = x->maybe_inlinetype() ?
317 new SimpleExceptionStub(Runtime1::throw_illegal_monitor_state_exception_id,
318 LIR_OprFact::illegalOpr, state_for(x))
319 : NULL;
320
321 // this CodeEmitInfo must not have the xhandlers because here the
322 // object is already locked (xhandlers expect object to be unlocked)
323 CodeEmitInfo* info = state_for(x, x->state(), true);
324 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
325 x->monitor_no(), info_for_exception, info, throw_imse_stub);
326 }
327
328
329 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
330 assert(x->is_pinned(),"");
331
332 LIRItem obj(x->obj(), this);
333 obj.dont_load_item();
334
335 LIR_Opr lock = new_register(T_INT);
336 LIR_Opr obj_temp = new_register(T_INT);
337 set_no_result(x);
338 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
339 }
340
341
342 // _ineg, _lneg, _fneg, _dneg
343 void LIRGenerator::do_NegateOp(NegateOp* x) {
344 LIRItem value(x->x(), this);
345 value.set_destroys_register();
346 value.load_item();
347 LIR_Opr reg = rlock(x);
348
349 LIR_Opr tmp = LIR_OprFact::illegalOpr;
350 #ifdef _LP64
351 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
352 if (x->type()->tag() == doubleTag) {
353 tmp = new_register(T_DOUBLE);
354 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
355 }
356 else if (x->type()->tag() == floatTag) {
357 tmp = new_register(T_FLOAT);
358 __ move(LIR_OprFact::floatConst(-0.0), tmp);
359 }
360 }
361 #endif
362 __ negate(value.result(), reg, tmp);
363
364 set_result(x, round_item(reg));
365 }
366
367
368 // for _fadd, _fmul, _fsub, _fdiv, _frem
369 // _dadd, _dmul, _dsub, _ddiv, _drem
370 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
371 LIRItem left(x->x(), this);
372 LIRItem right(x->y(), this);
373 LIRItem* left_arg = &left;
374 LIRItem* right_arg = &right;
375 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
376 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
377 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
378 left.load_item();
379 } else {
380 left.dont_load_item();
381 }
382
383 #ifndef _LP64
384 // do not load right operand if it is a constant. only 0 and 1 are
385 // loaded because there are special instructions for loading them
386 // without memory access (not needed for SSE2 instructions)
387 bool must_load_right = false;
388 if (right.is_constant()) {
389 LIR_Const* c = right.result()->as_constant_ptr();
390 assert(c != NULL, "invalid constant");
391 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
392
393 if (c->type() == T_FLOAT) {
394 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
395 } else {
396 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
397 }
398 }
399 #endif // !LP64
400
401 if (must_load_both) {
402 // frem and drem destroy also right operand, so move it to a new register
403 right.set_destroys_register();
404 right.load_item();
405 } else if (right.is_register()) {
406 right.load_item();
407 #ifndef _LP64
408 } else if (must_load_right) {
409 right.load_item();
410 #endif // !LP64
411 } else {
412 right.dont_load_item();
413 }
414 LIR_Opr reg = rlock(x);
415 LIR_Opr tmp = LIR_OprFact::illegalOpr;
416 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
417 tmp = new_register(T_DOUBLE);
418 }
419
420 #ifdef _LP64
421 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
422 // frem and drem are implemented as a direct call into the runtime.
423 LIRItem left(x->x(), this);
424 LIRItem right(x->y(), this);
425
426 BasicType bt = as_BasicType(x->type());
427 BasicTypeList signature(2);
428 signature.append(bt);
429 signature.append(bt);
430 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
431
432 const LIR_Opr result_reg = result_register_for(x->type());
433 left.load_item_force(cc->at(0));
434 right.load_item_force(cc->at(1));
435
436 address entry = NULL;
437 switch (x->op()) {
438 case Bytecodes::_frem:
439 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
440 break;
441 case Bytecodes::_drem:
442 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
443 break;
444 default:
445 ShouldNotReachHere();
446 }
447
448 LIR_Opr result = rlock_result(x);
449 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
450 __ move(result_reg, result);
451 } else {
452 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
453 set_result(x, round_item(reg));
454 }
455 #else
456 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
457 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
458 LIR_Opr fpu0, fpu1;
459 if (x->op() == Bytecodes::_frem) {
460 fpu0 = LIR_OprFact::single_fpu(0);
461 fpu1 = LIR_OprFact::single_fpu(1);
462 } else {
463 fpu0 = LIR_OprFact::double_fpu(0);
464 fpu1 = LIR_OprFact::double_fpu(1);
465 }
466 __ move(right.result(), fpu1); // order of left and right operand is important!
467 __ move(left.result(), fpu0);
468 __ rem (fpu0, fpu1, fpu0);
469 __ move(fpu0, reg);
470
471 } else {
472 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
473 }
474 set_result(x, round_item(reg));
475 #endif // _LP64
476 }
477
478
479 // for _ladd, _lmul, _lsub, _ldiv, _lrem
480 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
481 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
482 // long division is implemented as a direct call into the runtime
483 LIRItem left(x->x(), this);
484 LIRItem right(x->y(), this);
485
486 // the check for division by zero destroys the right operand
487 right.set_destroys_register();
488
489 BasicTypeList signature(2);
490 signature.append(T_LONG);
491 signature.append(T_LONG);
492 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
493
494 // check for division by zero (destroys registers of right operand!)
495 CodeEmitInfo* info = state_for(x);
496
497 const LIR_Opr result_reg = result_register_for(x->type());
498 left.load_item_force(cc->at(1));
499 right.load_item();
500
501 __ move(right.result(), cc->at(0));
502
503 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
504 __ branch(lir_cond_equal, new DivByZeroStub(info));
505
506 address entry = NULL;
507 switch (x->op()) {
508 case Bytecodes::_lrem:
509 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
510 break; // check if dividend is 0 is done elsewhere
511 case Bytecodes::_ldiv:
512 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
513 break; // check if dividend is 0 is done elsewhere
514 default:
515 ShouldNotReachHere();
516 }
517
518 LIR_Opr result = rlock_result(x);
519 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
520 __ move(result_reg, result);
521 } else if (x->op() == Bytecodes::_lmul) {
522 // missing test if instr is commutative and if we should swap
523 LIRItem left(x->x(), this);
524 LIRItem right(x->y(), this);
525
526 // right register is destroyed by the long mul, so it must be
527 // copied to a new register.
528 right.set_destroys_register();
529
530 left.load_item();
531 right.load_item();
532
533 LIR_Opr reg = FrameMap::long0_opr;
534 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
535 LIR_Opr result = rlock_result(x);
536 __ move(reg, result);
537 } else {
538 // missing test if instr is commutative and if we should swap
539 LIRItem left(x->x(), this);
540 LIRItem right(x->y(), this);
541
542 left.load_item();
543 // don't load constants to save register
544 right.load_nonconstant();
545 rlock_result(x);
546 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
547 }
548 }
549
550
551
552 // for: _iadd, _imul, _isub, _idiv, _irem
553 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
554 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
555 // The requirements for division and modulo
556 // input : rax,: dividend min_int
557 // reg: divisor (may not be rax,/rdx) -1
558 //
559 // output: rax,: quotient (= rax, idiv reg) min_int
560 // rdx: remainder (= rax, irem reg) 0
561
562 // rax, and rdx will be destroyed
563
564 // Note: does this invalidate the spec ???
565 LIRItem right(x->y(), this);
566 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
567
568 // call state_for before load_item_force because state_for may
569 // force the evaluation of other instructions that are needed for
570 // correct debug info. Otherwise the live range of the fix
571 // register might be too long.
572 CodeEmitInfo* info = state_for(x);
573
574 left.load_item_force(divInOpr());
575
576 right.load_item();
577
578 LIR_Opr result = rlock_result(x);
579 LIR_Opr result_reg;
580 if (x->op() == Bytecodes::_idiv) {
581 result_reg = divOutOpr();
582 } else {
583 result_reg = remOutOpr();
584 }
585
586 if (!ImplicitDiv0Checks) {
587 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
588 __ branch(lir_cond_equal, new DivByZeroStub(info));
589 // Idiv/irem cannot trap (passing info would generate an assertion).
590 info = NULL;
591 }
592 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
593 if (x->op() == Bytecodes::_irem) {
594 __ irem(left.result(), right.result(), result_reg, tmp, info);
595 } else if (x->op() == Bytecodes::_idiv) {
596 __ idiv(left.result(), right.result(), result_reg, tmp, info);
597 } else {
598 ShouldNotReachHere();
599 }
600
601 __ move(result_reg, result);
602 } else {
603 // missing test if instr is commutative and if we should swap
604 LIRItem left(x->x(), this);
605 LIRItem right(x->y(), this);
606 LIRItem* left_arg = &left;
607 LIRItem* right_arg = &right;
608 if (x->is_commutative() && left.is_stack() && right.is_register()) {
609 // swap them if left is real stack (or cached) and right is real register(not cached)
610 left_arg = &right;
611 right_arg = &left;
612 }
613
614 left_arg->load_item();
615
616 // do not need to load right, as we can handle stack and constants
617 if (x->op() == Bytecodes::_imul ) {
618 // check if we can use shift instead
619 bool use_constant = false;
620 bool use_tmp = false;
621 if (right_arg->is_constant()) {
622 jint iconst = right_arg->get_jint_constant();
623 if (iconst > 0 && iconst < max_jint) {
624 if (is_power_of_2(iconst)) {
625 use_constant = true;
626 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
627 use_constant = true;
628 use_tmp = true;
629 }
630 }
631 }
632 if (use_constant) {
633 right_arg->dont_load_item();
634 } else {
635 right_arg->load_item();
636 }
637 LIR_Opr tmp = LIR_OprFact::illegalOpr;
638 if (use_tmp) {
639 tmp = new_register(T_INT);
640 }
641 rlock_result(x);
642
643 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
644 } else {
645 right_arg->dont_load_item();
646 rlock_result(x);
647 LIR_Opr tmp = LIR_OprFact::illegalOpr;
648 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
649 }
650 }
651 }
652
653
654 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
655 // when an operand with use count 1 is the left operand, then it is
656 // likely that no move for 2-operand-LIR-form is necessary
657 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
658 x->swap_operands();
659 }
660
661 ValueTag tag = x->type()->tag();
662 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
663 switch (tag) {
664 case floatTag:
665 case doubleTag: do_ArithmeticOp_FPU(x); return;
666 case longTag: do_ArithmeticOp_Long(x); return;
667 case intTag: do_ArithmeticOp_Int(x); return;
668 default: ShouldNotReachHere(); return;
669 }
670 }
671
672
673 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
674 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
675 // count must always be in rcx
676 LIRItem value(x->x(), this);
677 LIRItem count(x->y(), this);
678
679 ValueTag elemType = x->type()->tag();
680 bool must_load_count = !count.is_constant() || elemType == longTag;
681 if (must_load_count) {
682 // count for long must be in register
683 count.load_item_force(shiftCountOpr());
684 } else {
685 count.dont_load_item();
686 }
687 value.load_item();
688 LIR_Opr reg = rlock_result(x);
689
690 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
691 }
692
693
694 // _iand, _land, _ior, _lor, _ixor, _lxor
695 void LIRGenerator::do_LogicOp(LogicOp* x) {
696 // when an operand with use count 1 is the left operand, then it is
697 // likely that no move for 2-operand-LIR-form is necessary
698 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
699 x->swap_operands();
700 }
701
702 LIRItem left(x->x(), this);
703 LIRItem right(x->y(), this);
704
705 left.load_item();
706 right.load_nonconstant();
707 LIR_Opr reg = rlock_result(x);
708
709 logic_op(x->op(), reg, left.result(), right.result());
710 }
711
712
713
714 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
715 void LIRGenerator::do_CompareOp(CompareOp* x) {
716 LIRItem left(x->x(), this);
717 LIRItem right(x->y(), this);
718 ValueTag tag = x->x()->type()->tag();
719 if (tag == longTag) {
720 left.set_destroys_register();
721 }
722 left.load_item();
723 right.load_item();
724 LIR_Opr reg = rlock_result(x);
725
726 if (x->x()->type()->is_float_kind()) {
727 Bytecodes::Code code = x->op();
728 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
729 } else if (x->x()->type()->tag() == longTag) {
730 __ lcmp2int(left.result(), right.result(), reg);
731 } else {
732 Unimplemented();
733 }
734 }
735
736 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
737 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
738 if (is_reference_type(type)) {
739 cmp_value.load_item_force(FrameMap::rax_oop_opr);
740 new_value.load_item();
741 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
742 } else if (type == T_INT) {
743 cmp_value.load_item_force(FrameMap::rax_opr);
744 new_value.load_item();
745 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
746 } else if (type == T_LONG) {
747 cmp_value.load_item_force(FrameMap::long0_opr);
748 new_value.load_item_force(FrameMap::long1_opr);
749 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
750 } else {
751 Unimplemented();
752 }
753 LIR_Opr result = new_register(T_INT);
754 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
755 result, T_INT);
756 return result;
757 }
758
759 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
760 bool is_oop = is_reference_type(type);
761 LIR_Opr result = new_register(type);
762 value.load_item();
763 // Because we want a 2-arg form of xchg and xadd
764 __ move(value.result(), result);
765 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
766 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
767 return result;
768 }
769
770 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
771 LIR_Opr result = new_register(type);
772 value.load_item();
773 // Because we want a 2-arg form of xchg and xadd
774 __ move(value.result(), result);
775 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
776 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
777 return result;
778 }
779
780 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
781 assert(x->number_of_arguments() == 3, "wrong type");
782 assert(UseFMA, "Needs FMA instructions support.");
783 LIRItem value(x->argument_at(0), this);
784 LIRItem value1(x->argument_at(1), this);
785 LIRItem value2(x->argument_at(2), this);
786
787 value2.set_destroys_register();
788
789 value.load_item();
790 value1.load_item();
791 value2.load_item();
792
793 LIR_Opr calc_input = value.result();
794 LIR_Opr calc_input1 = value1.result();
795 LIR_Opr calc_input2 = value2.result();
796 LIR_Opr calc_result = rlock_result(x);
797
798 switch (x->id()) {
799 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
800 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
801 default: ShouldNotReachHere();
802 }
803
804 }
805
806
807 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
808 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
809
810 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
811 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
812 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
813 x->id() == vmIntrinsics::_dlog10) {
814 do_LibmIntrinsic(x);
815 return;
816 }
817
818 LIRItem value(x->argument_at(0), this);
819
820 bool use_fpu = false;
821 #ifndef _LP64
822 if (UseSSE < 2) {
823 value.set_destroys_register();
824 }
825 #endif // !LP64
826 value.load_item();
827
828 LIR_Opr calc_input = value.result();
829 LIR_Opr calc_result = rlock_result(x);
830
831 LIR_Opr tmp = LIR_OprFact::illegalOpr;
832 #ifdef _LP64
833 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
834 (x->id() == vmIntrinsics::_dabs)) {
835 tmp = new_register(T_DOUBLE);
836 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
837 }
838 #endif
839
840 switch(x->id()) {
841 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, tmp); break;
842 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
843 default: ShouldNotReachHere();
844 }
845
846 if (use_fpu) {
847 __ move(calc_result, x->operand());
848 }
849 }
850
851 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
852 LIRItem value(x->argument_at(0), this);
853 value.set_destroys_register();
854
855 LIR_Opr calc_result = rlock_result(x);
856 LIR_Opr result_reg = result_register_for(x->type());
857
858 CallingConvention* cc = NULL;
859
860 if (x->id() == vmIntrinsics::_dpow) {
861 LIRItem value1(x->argument_at(1), this);
862
863 value1.set_destroys_register();
864
865 BasicTypeList signature(2);
866 signature.append(T_DOUBLE);
867 signature.append(T_DOUBLE);
868 cc = frame_map()->c_calling_convention(&signature);
869 value.load_item_force(cc->at(0));
870 value1.load_item_force(cc->at(1));
871 } else {
872 BasicTypeList signature(1);
873 signature.append(T_DOUBLE);
874 cc = frame_map()->c_calling_convention(&signature);
875 value.load_item_force(cc->at(0));
876 }
877
878 #ifndef _LP64
879 LIR_Opr tmp = FrameMap::fpu0_double_opr;
880 result_reg = tmp;
881 switch(x->id()) {
882 case vmIntrinsics::_dexp:
883 if (StubRoutines::dexp() != NULL) {
884 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
885 } else {
886 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
887 }
888 break;
889 case vmIntrinsics::_dlog:
890 if (StubRoutines::dlog() != NULL) {
891 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
892 } else {
893 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
894 }
895 break;
896 case vmIntrinsics::_dlog10:
897 if (StubRoutines::dlog10() != NULL) {
898 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
899 } else {
900 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
901 }
902 break;
903 case vmIntrinsics::_dpow:
904 if (StubRoutines::dpow() != NULL) {
905 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
906 } else {
907 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
908 }
909 break;
910 case vmIntrinsics::_dsin:
911 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
912 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
913 } else {
914 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
915 }
916 break;
917 case vmIntrinsics::_dcos:
918 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
919 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
920 } else {
921 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
922 }
923 break;
924 case vmIntrinsics::_dtan:
925 if (StubRoutines::dtan() != NULL) {
926 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
927 } else {
928 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
929 }
930 break;
931 default: ShouldNotReachHere();
932 }
933 #else
934 switch (x->id()) {
935 case vmIntrinsics::_dexp:
936 if (StubRoutines::dexp() != NULL) {
937 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
938 } else {
939 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
940 }
941 break;
942 case vmIntrinsics::_dlog:
943 if (StubRoutines::dlog() != NULL) {
944 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
945 } else {
946 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
947 }
948 break;
949 case vmIntrinsics::_dlog10:
950 if (StubRoutines::dlog10() != NULL) {
951 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
952 } else {
953 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
954 }
955 break;
956 case vmIntrinsics::_dpow:
957 if (StubRoutines::dpow() != NULL) {
958 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
959 } else {
960 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
961 }
962 break;
963 case vmIntrinsics::_dsin:
964 if (StubRoutines::dsin() != NULL) {
965 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
966 } else {
967 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
968 }
969 break;
970 case vmIntrinsics::_dcos:
971 if (StubRoutines::dcos() != NULL) {
972 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
973 } else {
974 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
975 }
976 break;
977 case vmIntrinsics::_dtan:
978 if (StubRoutines::dtan() != NULL) {
979 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
980 } else {
981 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
982 }
983 break;
984 default: ShouldNotReachHere();
985 }
986 #endif // _LP64
987 __ move(result_reg, calc_result);
988 }
989
990 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
991 assert(x->number_of_arguments() == 5, "wrong type");
992
993 // Make all state_for calls early since they can emit code
994 CodeEmitInfo* info = state_for(x, x->state());
995
996 LIRItem src(x->argument_at(0), this);
997 LIRItem src_pos(x->argument_at(1), this);
998 LIRItem dst(x->argument_at(2), this);
999 LIRItem dst_pos(x->argument_at(3), this);
1000 LIRItem length(x->argument_at(4), this);
1001
1002 // operands for arraycopy must use fixed registers, otherwise
1003 // LinearScan will fail allocation (because arraycopy always needs a
1004 // call)
1005
1006 #ifndef _LP64
1007 src.load_item_force (FrameMap::rcx_oop_opr);
1008 src_pos.load_item_force (FrameMap::rdx_opr);
1009 dst.load_item_force (FrameMap::rax_oop_opr);
1010 dst_pos.load_item_force (FrameMap::rbx_opr);
1011 length.load_item_force (FrameMap::rdi_opr);
1012 LIR_Opr tmp = (FrameMap::rsi_opr);
1013 #else
1014
1015 // The java calling convention will give us enough registers
1016 // so that on the stub side the args will be perfect already.
1017 // On the other slow/special case side we call C and the arg
1018 // positions are not similar enough to pick one as the best.
1019 // Also because the java calling convention is a "shifted" version
1020 // of the C convention we can process the java args trivially into C
1021 // args without worry of overwriting during the xfer
1022
1023 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1024 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1025 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1026 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1027 length.load_item_force (FrameMap::as_opr(j_rarg4));
1028
1029 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1030 #endif // LP64
1031
1032 set_no_result(x);
1033
1034 int flags;
1035 ciArrayKlass* expected_type;
1036 arraycopy_helper(x, &flags, &expected_type);
1037
1038 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1039 }
1040
1041 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1042 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1043 // Make all state_for calls early since they can emit code
1044 LIR_Opr result = rlock_result(x);
1045 int flags = 0;
1046 switch (x->id()) {
1047 case vmIntrinsics::_updateCRC32: {
1048 LIRItem crc(x->argument_at(0), this);
1049 LIRItem val(x->argument_at(1), this);
1050 // val is destroyed by update_crc32
1051 val.set_destroys_register();
1052 crc.load_item();
1053 val.load_item();
1054 __ update_crc32(crc.result(), val.result(), result);
1055 break;
1056 }
1057 case vmIntrinsics::_updateBytesCRC32:
1058 case vmIntrinsics::_updateByteBufferCRC32: {
1059 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1060
1061 LIRItem crc(x->argument_at(0), this);
1062 LIRItem buf(x->argument_at(1), this);
1063 LIRItem off(x->argument_at(2), this);
1064 LIRItem len(x->argument_at(3), this);
1065 buf.load_item();
1066 off.load_nonconstant();
1067
1068 LIR_Opr index = off.result();
1069 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1070 if(off.result()->is_constant()) {
1071 index = LIR_OprFact::illegalOpr;
1072 offset += off.result()->as_jint();
1073 }
1074 LIR_Opr base_op = buf.result();
1075
1076 #ifndef _LP64
1077 if (!is_updateBytes) { // long b raw address
1078 base_op = new_register(T_INT);
1079 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1080 }
1081 #else
1082 if (index->is_valid()) {
1083 LIR_Opr tmp = new_register(T_LONG);
1084 __ convert(Bytecodes::_i2l, index, tmp);
1085 index = tmp;
1086 }
1087 #endif
1088
1089 LIR_Address* a = new LIR_Address(base_op,
1090 index,
1091 offset,
1092 T_BYTE);
1093 BasicTypeList signature(3);
1094 signature.append(T_INT);
1095 signature.append(T_ADDRESS);
1096 signature.append(T_INT);
1097 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1098 const LIR_Opr result_reg = result_register_for(x->type());
1099
1100 LIR_Opr addr = new_pointer_register();
1101 __ leal(LIR_OprFact::address(a), addr);
1102
1103 crc.load_item_force(cc->at(0));
1104 __ move(addr, cc->at(1));
1105 len.load_item_force(cc->at(2));
1106
1107 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1108 __ move(result_reg, result);
1109
1110 break;
1111 }
1112 default: {
1113 ShouldNotReachHere();
1114 }
1115 }
1116 }
1117
1118 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1119 Unimplemented();
1120 }
1121
1122 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1123 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1124
1125 // Make all state_for calls early since they can emit code
1126 LIR_Opr result = rlock_result(x);
1127
1128 LIRItem a(x->argument_at(0), this); // Object
1129 LIRItem aOffset(x->argument_at(1), this); // long
1130 LIRItem b(x->argument_at(2), this); // Object
1131 LIRItem bOffset(x->argument_at(3), this); // long
1132 LIRItem length(x->argument_at(4), this); // int
1133 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1134
1135 a.load_item();
1136 aOffset.load_nonconstant();
1137 b.load_item();
1138 bOffset.load_nonconstant();
1139
1140 long constant_aOffset = 0;
1141 LIR_Opr result_aOffset = aOffset.result();
1142 if (result_aOffset->is_constant()) {
1143 constant_aOffset = result_aOffset->as_jlong();
1144 result_aOffset = LIR_OprFact::illegalOpr;
1145 }
1146 LIR_Opr result_a = a.result();
1147
1148 long constant_bOffset = 0;
1149 LIR_Opr result_bOffset = bOffset.result();
1150 if (result_bOffset->is_constant()) {
1151 constant_bOffset = result_bOffset->as_jlong();
1152 result_bOffset = LIR_OprFact::illegalOpr;
1153 }
1154 LIR_Opr result_b = b.result();
1155
1156 #ifndef _LP64
1157 result_a = new_register(T_INT);
1158 __ convert(Bytecodes::_l2i, a.result(), result_a);
1159 result_b = new_register(T_INT);
1160 __ convert(Bytecodes::_l2i, b.result(), result_b);
1161 #endif
1162
1163
1164 LIR_Address* addr_a = new LIR_Address(result_a,
1165 result_aOffset,
1166 constant_aOffset,
1167 T_BYTE);
1168
1169 LIR_Address* addr_b = new LIR_Address(result_b,
1170 result_bOffset,
1171 constant_bOffset,
1172 T_BYTE);
1173
1174 BasicTypeList signature(4);
1175 signature.append(T_ADDRESS);
1176 signature.append(T_ADDRESS);
1177 signature.append(T_INT);
1178 signature.append(T_INT);
1179 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1180 const LIR_Opr result_reg = result_register_for(x->type());
1181
1182 LIR_Opr ptr_addr_a = new_pointer_register();
1183 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1184
1185 LIR_Opr ptr_addr_b = new_pointer_register();
1186 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1187
1188 __ move(ptr_addr_a, cc->at(0));
1189 __ move(ptr_addr_b, cc->at(1));
1190 length.load_item_force(cc->at(2));
1191 log2ArrayIndexScale.load_item_force(cc->at(3));
1192
1193 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1194 __ move(result_reg, result);
1195 }
1196
1197 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1198 // _i2b, _i2c, _i2s
1199 LIR_Opr fixed_register_for(BasicType type) {
1200 switch (type) {
1201 case T_FLOAT: return FrameMap::fpu0_float_opr;
1202 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1203 case T_INT: return FrameMap::rax_opr;
1204 case T_LONG: return FrameMap::long0_opr;
1205 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1206 }
1207 }
1208
1209 void LIRGenerator::do_Convert(Convert* x) {
1210 #ifdef _LP64
1211 LIRItem value(x->value(), this);
1212 value.load_item();
1213 LIR_Opr input = value.result();
1214 LIR_Opr result = rlock(x);
1215 __ convert(x->op(), input, result);
1216 assert(result->is_virtual(), "result must be virtual register");
1217 set_result(x, result);
1218 #else
1219 // flags that vary for the different operations and different SSE-settings
1220 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1221
1222 switch (x->op()) {
1223 case Bytecodes::_i2l: // fall through
1224 case Bytecodes::_l2i: // fall through
1225 case Bytecodes::_i2b: // fall through
1226 case Bytecodes::_i2c: // fall through
1227 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1228
1229 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1230 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1231 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1232 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1233 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1234 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1235 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1236 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1237 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1238 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1239 default: ShouldNotReachHere();
1240 }
1241
1242 LIRItem value(x->value(), this);
1243 value.load_item();
1244 LIR_Opr input = value.result();
1245 LIR_Opr result = rlock(x);
1246
1247 // arguments of lir_convert
1248 LIR_Opr conv_input = input;
1249 LIR_Opr conv_result = result;
1250 ConversionStub* stub = NULL;
1251
1252 if (fixed_input) {
1253 conv_input = fixed_register_for(input->type());
1254 __ move(input, conv_input);
1255 }
1256
1257 assert(fixed_result == false || round_result == false, "cannot set both");
1258 if (fixed_result) {
1259 conv_result = fixed_register_for(result->type());
1260 } else if (round_result) {
1261 result = new_register(result->type());
1262 set_vreg_flag(result, must_start_in_memory);
1263 }
1264
1265 if (needs_stub) {
1266 stub = new ConversionStub(x->op(), conv_input, conv_result);
1267 }
1268
1269 __ convert(x->op(), conv_input, conv_result, stub);
1270
1271 if (result != conv_result) {
1272 __ move(conv_result, result);
1273 }
1274
1275 assert(result->is_virtual(), "result must be virtual register");
1276 set_result(x, result);
1277 #endif // _LP64
1278 }
1279
1280
1281 void LIRGenerator::do_NewInstance(NewInstance* x) {
1282 print_if_not_loaded(x);
1283
1284 CodeEmitInfo* info = state_for(x, x->state());
1285 LIR_Opr reg = result_register_for(x->type());
1286 new_instance(reg, x->klass(), x->is_unresolved(),
1287 /* allow_inline */ false,
1288 FrameMap::rcx_oop_opr,
1289 FrameMap::rdi_oop_opr,
1290 FrameMap::rsi_oop_opr,
1291 LIR_OprFact::illegalOpr,
1292 FrameMap::rdx_metadata_opr, info);
1293 LIR_Opr result = rlock_result(x);
1294 __ move(reg, result);
1295 }
1296
1297 void LIRGenerator::do_NewInlineTypeInstance(NewInlineTypeInstance* x) {
1298 // Mapping to do_NewInstance (same code) but use state_before for reexecution.
1299 CodeEmitInfo* info = state_for(x, x->state_before());
1300 x->set_to_object_type();
1301 LIR_Opr reg = result_register_for(x->type());
1302 new_instance(reg, x->klass(), false,
1303 /* allow_inline */ true,
1304 FrameMap::rcx_oop_opr,
1305 FrameMap::rdi_oop_opr,
1306 FrameMap::rsi_oop_opr,
1307 LIR_OprFact::illegalOpr,
1308 FrameMap::rdx_metadata_opr, info);
1309 LIR_Opr result = rlock_result(x);
1310 __ move(reg, result);
1311 }
1312
1313 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1314 CodeEmitInfo* info = state_for(x, x->state());
1315
1316 LIRItem length(x->length(), this);
1317 length.load_item_force(FrameMap::rbx_opr);
1318
1319 LIR_Opr reg = result_register_for(x->type());
1320 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1321 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1322 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1323 LIR_Opr tmp4 = reg;
1324 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1325 LIR_Opr len = length.result();
1326 BasicType elem_type = x->elt_type();
1327
1328 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1329
1330 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1331 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1332
1333 LIR_Opr result = rlock_result(x);
1334 __ move(reg, result);
1335 }
1336
1337
1338 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1339 LIRItem length(x->length(), this);
1340 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1341 // and therefore provide the state before the parameters have been consumed
1342 CodeEmitInfo* patching_info = NULL;
1343 if (!x->klass()->is_loaded() || PatchALot) {
1344 patching_info = state_for(x, x->state_before());
1345 }
1346
1347 CodeEmitInfo* info = state_for(x, x->state());
1348
1349 const LIR_Opr reg = result_register_for(x->type());
1350 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1351 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1352 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1353 LIR_Opr tmp4 = reg;
1354 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1355
1356 length.load_item_force(FrameMap::rbx_opr);
1357 LIR_Opr len = length.result();
1358
1359 ciKlass* obj = (ciKlass*) x->exact_type();
1360 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_null_free());
1361 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1362 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1363 }
1364 klass2reg_with_patching(klass_reg, obj, patching_info);
1365 if (x->is_null_free()) {
1366 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_INLINE_TYPE, klass_reg, slow_path);
1367 } else {
1368 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1369 }
1370
1371 LIR_Opr result = rlock_result(x);
1372 __ move(reg, result);
1373 }
1374
1375
1376 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1377 Values* dims = x->dims();
1378 int i = dims->length();
1379 LIRItemList* items = new LIRItemList(i, i, NULL);
1380 while (i-- > 0) {
1381 LIRItem* size = new LIRItem(dims->at(i), this);
1382 items->at_put(i, size);
1383 }
1384
1385 // Evaluate state_for early since it may emit code.
1386 CodeEmitInfo* patching_info = NULL;
1387 if (!x->klass()->is_loaded() || PatchALot) {
1388 patching_info = state_for(x, x->state_before());
1389
1390 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1391 // clone all handlers (NOTE: Usually this is handled transparently
1392 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1393 // is done explicitly here because a stub isn't being used).
1394 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1395 }
1396 CodeEmitInfo* info = state_for(x, x->state());
1397
1398 i = dims->length();
1399 while (i-- > 0) {
1400 LIRItem* size = items->at(i);
1401 size->load_nonconstant();
1402
1403 store_stack_parameter(size->result(), in_ByteSize(i*4));
1404 }
1405
1406 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1407 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1408
1409 LIR_Opr rank = FrameMap::rbx_opr;
1410 __ move(LIR_OprFact::intConst(x->rank()), rank);
1411 LIR_Opr varargs = FrameMap::rcx_opr;
1412 __ move(FrameMap::rsp_opr, varargs);
1413 LIR_OprList* args = new LIR_OprList(3);
1414 args->append(klass_reg);
1415 args->append(rank);
1416 args->append(varargs);
1417 LIR_Opr reg = result_register_for(x->type());
1418 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1419 LIR_OprFact::illegalOpr,
1420 reg, args, info);
1421
1422 LIR_Opr result = rlock_result(x);
1423 __ move(reg, result);
1424 }
1425
1426
1427 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1428 // nothing to do for now
1429 }
1430
1431
1432 void LIRGenerator::do_CheckCast(CheckCast* x) {
1433 LIRItem obj(x->obj(), this);
1434
1435 CodeEmitInfo* patching_info = NULL;
1436 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1437 // must do this before locking the destination register as an oop register,
1438 // and before the obj is loaded (the latter is for deoptimization)
1439 patching_info = state_for(x, x->state_before());
1440 }
1441 obj.load_item();
1442
1443 // info for exceptions
1444 CodeEmitInfo* info_for_exception =
1445 (x->needs_exception_state() ? state_for(x) :
1446 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1447
1448 if (x->is_null_free()) {
1449 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1450 }
1451
1452 CodeStub* stub;
1453 if (x->is_incompatible_class_change_check()) {
1454 assert(patching_info == NULL, "can't patch this");
1455 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1456 } else if (x->is_invokespecial_receiver_check()) {
1457 assert(patching_info == NULL, "can't patch this");
1458 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1459 } else {
1460 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1461 }
1462 LIR_Opr reg = rlock_result(x);
1463 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1464 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1465 tmp3 = new_register(objectType);
1466 }
1467 __ checkcast(reg, obj.result(), x->klass(),
1468 new_register(objectType), new_register(objectType), tmp3,
1469 x->direct_compare(), info_for_exception, patching_info, stub,
1470 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1471 }
1472
1473
1474 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1475 LIRItem obj(x->obj(), this);
1476
1477 // result and test object may not be in same register
1478 LIR_Opr reg = rlock_result(x);
1479 CodeEmitInfo* patching_info = NULL;
1480 if ((!x->klass()->is_loaded() || PatchALot)) {
1481 // must do this before locking the destination register as an oop register
1482 patching_info = state_for(x, x->state_before());
1483 }
1484 obj.load_item();
1485 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1486 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1487 tmp3 = new_register(objectType);
1488 }
1489 __ instanceof(reg, obj.result(), x->klass(),
1490 new_register(objectType), new_register(objectType), tmp3,
1491 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1492 }
1493
1494
1495 void LIRGenerator::do_If(If* x) {
1496 assert(x->number_of_sux() == 2, "inconsistency");
1497 ValueTag tag = x->x()->type()->tag();
1498 bool is_safepoint = x->is_safepoint();
1499
1500 If::Condition cond = x->cond();
1501
1502 LIRItem xitem(x->x(), this);
1503 LIRItem yitem(x->y(), this);
1504 LIRItem* xin = &xitem;
1505 LIRItem* yin = &yitem;
1506
1507 if (tag == longTag) {
1508 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1509 // mirror for other conditions
1510 if (cond == If::gtr || cond == If::leq) {
1511 cond = Instruction::mirror(cond);
1512 xin = &yitem;
1513 yin = &xitem;
1514 }
1515 xin->set_destroys_register();
1516 }
1517 xin->load_item();
1518 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1519 // inline long zero
1520 yin->dont_load_item();
1521 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) {
1522 // longs cannot handle constants at right side
1523 yin->load_item();
1524 } else {
1525 yin->dont_load_item();
1526 }
1527
1528 LIR_Opr left = xin->result();
1529 LIR_Opr right = yin->result();
1530
1531 set_no_result(x);
1532
1533 // add safepoint before generating condition code so it can be recomputed
1534 if (x->is_safepoint()) {
1535 // increment backedge counter if needed
1536 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1537 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1538 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1539 }
1540
1541 if (x->substitutability_check()) {
1542 substitutability_check(x, *xin, *yin);
1543 } else {
1544 __ cmp(lir_cond(cond), left, right);
1545 }
1546 // Generate branch profiling. Profiling code doesn't kill flags.
1547 profile_branch(x, cond);
1548 move_to_phi(x->state());
1549 if (x->x()->type()->is_float_kind()) {
1550 __ branch(lir_cond(cond), x->tsux(), x->usux());
1551 } else {
1552 __ branch(lir_cond(cond), x->tsux());
1553 }
1554 assert(x->default_sux() == x->fsux(), "wrong destination above");
1555 __ jump(x->default_sux());
1556 }
1557
1558
1559 LIR_Opr LIRGenerator::getThreadPointer() {
1560 #ifdef _LP64
1561 return FrameMap::as_pointer_opr(r15_thread);
1562 #else
1563 LIR_Opr result = new_register(T_INT);
1564 __ get_thread(result);
1565 return result;
1566 #endif //
1567 }
1568
1569 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1570 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1571 LIR_OprList* args = new LIR_OprList();
1572 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1573 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1574 }
1575
1576
1577 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1578 CodeEmitInfo* info) {
1579 if (address->type() == T_LONG) {
1580 address = new LIR_Address(address->base(),
1581 address->index(), address->scale(),
1582 address->disp(), T_DOUBLE);
1583 // Transfer the value atomically by using FP moves. This means
1584 // the value has to be moved between CPU and FPU registers. It
1585 // always has to be moved through spill slot since there's no
1586 // quick way to pack the value into an SSE register.
1587 LIR_Opr temp_double = new_register(T_DOUBLE);
1588 LIR_Opr spill = new_register(T_LONG);
1589 set_vreg_flag(spill, must_start_in_memory);
1590 __ move(value, spill);
1591 __ volatile_move(spill, temp_double, T_LONG);
1592 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1593 } else {
1594 __ store(value, address, info);
1595 }
1596 }
1597
1598 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1599 CodeEmitInfo* info) {
1600 if (address->type() == T_LONG) {
1601 address = new LIR_Address(address->base(),
1602 address->index(), address->scale(),
1603 address->disp(), T_DOUBLE);
1604 // Transfer the value atomically by using FP moves. This means
1605 // the value has to be moved between CPU and FPU registers. In
1606 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1607 // SSE2+ mode it can be moved directly.
1608 LIR_Opr temp_double = new_register(T_DOUBLE);
1609 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1610 __ volatile_move(temp_double, result, T_LONG);
1611 #ifndef _LP64
1612 if (UseSSE < 2) {
1613 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1614 set_vreg_flag(result, must_start_in_memory);
1615 }
1616 #endif // !LP64
1617 } else {
1618 __ load(address, result, info);
1619 }
1620 }