1 /* 2 * Copyright (c) 2005, 2022, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_Compilation.hpp" 27 #include "c1/c1_FrameMap.hpp" 28 #include "c1/c1_Instruction.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_LIRGenerator.hpp" 31 #include "c1/c1_Runtime1.hpp" 32 #include "c1/c1_ValueStack.hpp" 33 #include "ci/ciArray.hpp" 34 #include "ci/ciInlineKlass.hpp" 35 #include "ci/ciObjArrayKlass.hpp" 36 #include "ci/ciTypeArrayKlass.hpp" 37 #include "gc/shared/c1/barrierSetC1.hpp" 38 #include "runtime/sharedRuntime.hpp" 39 #include "runtime/stubRoutines.hpp" 40 #include "utilities/powerOfTwo.hpp" 41 #include "vmreg_x86.inline.hpp" 42 43 #ifdef ASSERT 44 #define __ gen()->lir(__FILE__, __LINE__)-> 45 #else 46 #define __ gen()->lir()-> 47 #endif 48 49 // Item will be loaded into a byte register; Intel only 50 void LIRItem::load_byte_item() { 51 load_item(); 52 LIR_Opr res = result(); 53 54 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 55 // make sure that it is a byte register 56 assert(!value()->type()->is_float() && !value()->type()->is_double(), 57 "can't load floats in byte register"); 58 LIR_Opr reg = _gen->rlock_byte(T_BYTE); 59 __ move(res, reg); 60 61 _result = reg; 62 } 63 } 64 65 66 void LIRItem::load_nonconstant() { 67 LIR_Opr r = value()->operand(); 68 if (r->is_constant()) { 69 _result = r; 70 } else { 71 load_item(); 72 } 73 } 74 75 //-------------------------------------------------------------- 76 // LIRGenerator 77 //-------------------------------------------------------------- 78 79 80 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 81 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 82 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 83 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 84 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 85 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 86 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } 87 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 88 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 89 90 91 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 92 LIR_Opr opr; 93 switch (type->tag()) { 94 case intTag: opr = FrameMap::rax_opr; break; 95 case objectTag: opr = FrameMap::rax_oop_opr; break; 96 case longTag: opr = FrameMap::long0_opr; break; 97 #ifdef _LP64 98 case floatTag: opr = FrameMap::xmm0_float_opr; break; 99 case doubleTag: opr = FrameMap::xmm0_double_opr; break; 100 #else 101 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; 102 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; 103 #endif // _LP64 104 case addressTag: 105 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 106 } 107 108 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 109 return opr; 110 } 111 112 113 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 114 LIR_Opr reg = new_register(T_INT); 115 set_vreg_flag(reg, LIRGenerator::byte_reg); 116 return reg; 117 } 118 119 120 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) { 121 // We just need one 32-bit temp register for x86/x64, to check whether both 122 // oops have markWord::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck(). 123 // @temp = %r10d 124 // mov $0x405, %r10d 125 // and (%left), %r10d /* if need to check left */ 126 // and (%right), %r10d /* if need to check right */ 127 // cmp $0x405, $r10d 128 // jne L_oops_not_equal 129 tmp1 = new_register(T_INT); 130 tmp2 = LIR_OprFact::illegalOpr; 131 } 132 133 //--------- loading items into registers -------------------------------- 134 135 136 // i486 instructions can inline constants 137 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 138 if (type == T_SHORT || type == T_CHAR) { 139 return false; 140 } 141 Constant* c = v->as_Constant(); 142 if (c && c->state_before() == NULL) { 143 // constants of any type can be stored directly, except for 144 // unloaded object constants. 145 return true; 146 } 147 return false; 148 } 149 150 151 bool LIRGenerator::can_inline_as_constant(Value v) const { 152 if (v->type()->tag() == longTag) return false; 153 return v->type()->tag() != objectTag || 154 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 155 } 156 157 158 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 159 if (c->type() == T_LONG) return false; 160 return c->type() != T_OBJECT || c->as_jobject() == NULL; 161 } 162 163 164 LIR_Opr LIRGenerator::safepoint_poll_register() { 165 NOT_LP64( return new_register(T_ADDRESS); ) 166 return LIR_OprFact::illegalOpr; 167 } 168 169 170 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 171 int shift, int disp, BasicType type) { 172 assert(base->is_register(), "must be"); 173 if (index->is_constant()) { 174 LIR_Const *constant = index->as_constant_ptr(); 175 #ifdef _LP64 176 jlong c; 177 if (constant->type() == T_INT) { 178 c = (jlong(index->as_jint()) << shift) + disp; 179 } else { 180 assert(constant->type() == T_LONG, "should be"); 181 c = (index->as_jlong() << shift) + disp; 182 } 183 if ((jlong)((jint)c) == c) { 184 return new LIR_Address(base, (jint)c, type); 185 } else { 186 LIR_Opr tmp = new_register(T_LONG); 187 __ move(index, tmp); 188 return new LIR_Address(base, tmp, type); 189 } 190 #else 191 return new LIR_Address(base, 192 ((intx)(constant->as_jint()) << shift) + disp, 193 type); 194 #endif 195 } else { 196 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 197 } 198 } 199 200 201 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 202 BasicType type) { 203 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 204 205 LIR_Address* addr; 206 if (index_opr->is_constant()) { 207 int elem_size = type2aelembytes(type); 208 #ifdef _LP64 209 jint index = index_opr->as_jint(); 210 jlong disp = offset_in_bytes + (jlong)(index) * elem_size; 211 if (disp > max_jint) { 212 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses. 213 // Convert array index to long to do array offset computation with 64-bit values. 214 index_opr = new_register(T_LONG); 215 __ move(LIR_OprFact::longConst(index), index_opr); 216 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type); 217 } else { 218 addr = new LIR_Address(array_opr, (intx)disp, type); 219 } 220 #else 221 // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range! 222 // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will 223 // always be negative (i.e. underflows the 32-bit address range): 224 // Let N = 2^32: a + signed_overflow(disp) = a + disp - N. 225 // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then 226 // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always 227 // underflows the 32-bit address range: 228 // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N) 229 // = (a + disp - N) + N = a + disp 230 // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address 231 // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms. 232 addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type); 233 #endif // _LP64 234 } else { 235 #ifdef _LP64 236 if (index_opr->type() == T_INT) { 237 LIR_Opr tmp = new_register(T_LONG); 238 __ convert(Bytecodes::_i2l, index_opr, tmp); 239 index_opr = tmp; 240 } 241 #endif // _LP64 242 addr = new LIR_Address(array_opr, 243 index_opr, 244 LIR_Address::scale(type), 245 offset_in_bytes, type); 246 } 247 return addr; 248 } 249 250 251 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) { 252 LIR_Opr r; 253 if (type == T_LONG) { 254 r = LIR_OprFact::longConst(x); 255 } else if (type == T_INT) { 256 r = LIR_OprFact::intConst(checked_cast<jint>(x)); 257 } else { 258 ShouldNotReachHere(); 259 } 260 return r; 261 } 262 263 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 264 LIR_Opr pointer = new_pointer_register(); 265 __ move(LIR_OprFact::intptrConst(counter), pointer); 266 LIR_Address* addr = new LIR_Address(pointer, type); 267 increment_counter(addr, step); 268 } 269 270 271 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 272 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 273 } 274 275 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 276 __ cmp_mem_int(condition, base, disp, c, info); 277 } 278 279 280 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 281 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 282 } 283 284 285 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) { 286 if (tmp->is_valid() && c > 0 && c < max_jint) { 287 if (is_power_of_2(c + 1)) { 288 __ move(left, tmp); 289 __ shift_left(left, log2i_exact(c + 1), left); 290 __ sub(left, tmp, result); 291 return true; 292 } else if (is_power_of_2(c - 1)) { 293 __ move(left, tmp); 294 __ shift_left(left, log2i_exact(c - 1), left); 295 __ add(left, tmp, result); 296 return true; 297 } 298 } 299 return false; 300 } 301 302 303 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 304 BasicType type = item->type(); 305 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 306 } 307 308 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) { 309 LIR_Opr tmp1 = new_register(objectType); 310 LIR_Opr tmp2 = new_register(objectType); 311 LIR_Opr tmp3 = new_register(objectType); 312 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci); 313 } 314 315 //---------------------------------------------------------------------- 316 // visitor functions 317 //---------------------------------------------------------------------- 318 319 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 320 assert(x->is_pinned(),""); 321 LIRItem obj(x->obj(), this); 322 obj.load_item(); 323 324 set_no_result(x); 325 326 // "lock" stores the address of the monitor stack slot, so this is not an oop 327 LIR_Opr lock = new_register(T_INT); 328 // Need a scratch register for inline types on x86 329 LIR_Opr scratch = LIR_OprFact::illegalOpr; 330 if (EnableValhalla && x->maybe_inlinetype()) { 331 scratch = new_register(T_INT); 332 } 333 334 CodeEmitInfo* info_for_exception = NULL; 335 if (x->needs_null_check()) { 336 info_for_exception = state_for(x); 337 } 338 339 CodeStub* throw_imse_stub = x->maybe_inlinetype() ? 340 new SimpleExceptionStub(Runtime1::throw_illegal_monitor_state_exception_id, 341 LIR_OprFact::illegalOpr, state_for(x)) 342 : NULL; 343 344 // this CodeEmitInfo must not have the xhandlers because here the 345 // object is already locked (xhandlers expect object to be unlocked) 346 CodeEmitInfo* info = state_for(x, x->state(), true); 347 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, 348 x->monitor_no(), info_for_exception, info, throw_imse_stub); 349 } 350 351 352 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 353 assert(x->is_pinned(),""); 354 355 LIRItem obj(x->obj(), this); 356 obj.dont_load_item(); 357 358 LIR_Opr lock = new_register(T_INT); 359 LIR_Opr obj_temp = new_register(T_INT); 360 set_no_result(x); 361 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 362 } 363 364 // _ineg, _lneg, _fneg, _dneg 365 void LIRGenerator::do_NegateOp(NegateOp* x) { 366 LIRItem value(x->x(), this); 367 value.set_destroys_register(); 368 value.load_item(); 369 LIR_Opr reg = rlock(x); 370 371 LIR_Opr tmp = LIR_OprFact::illegalOpr; 372 #ifdef _LP64 373 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) { 374 if (x->type()->tag() == doubleTag) { 375 tmp = new_register(T_DOUBLE); 376 __ move(LIR_OprFact::doubleConst(-0.0), tmp); 377 } 378 else if (x->type()->tag() == floatTag) { 379 tmp = new_register(T_FLOAT); 380 __ move(LIR_OprFact::floatConst(-0.0), tmp); 381 } 382 } 383 #endif 384 __ negate(value.result(), reg, tmp); 385 386 set_result(x, round_item(reg)); 387 } 388 389 // for _fadd, _fmul, _fsub, _fdiv, _frem 390 // _dadd, _dmul, _dsub, _ddiv, _drem 391 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 392 LIRItem left(x->x(), this); 393 LIRItem right(x->y(), this); 394 LIRItem* left_arg = &left; 395 LIRItem* right_arg = &right; 396 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 397 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 398 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 399 left.load_item(); 400 } else { 401 left.dont_load_item(); 402 } 403 404 #ifndef _LP64 405 // do not load right operand if it is a constant. only 0 and 1 are 406 // loaded because there are special instructions for loading them 407 // without memory access (not needed for SSE2 instructions) 408 bool must_load_right = false; 409 if (right.is_constant()) { 410 LIR_Const* c = right.result()->as_constant_ptr(); 411 assert(c != NULL, "invalid constant"); 412 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); 413 414 if (c->type() == T_FLOAT) { 415 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); 416 } else { 417 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); 418 } 419 } 420 #endif // !LP64 421 422 if (must_load_both) { 423 // frem and drem destroy also right operand, so move it to a new register 424 right.set_destroys_register(); 425 right.load_item(); 426 } else if (right.is_register()) { 427 right.load_item(); 428 #ifndef _LP64 429 } else if (must_load_right) { 430 right.load_item(); 431 #endif // !LP64 432 } else { 433 right.dont_load_item(); 434 } 435 LIR_Opr reg = rlock(x); 436 LIR_Opr tmp = LIR_OprFact::illegalOpr; 437 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) { 438 tmp = new_register(T_DOUBLE); 439 } 440 441 #ifdef _LP64 442 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) { 443 // frem and drem are implemented as a direct call into the runtime. 444 LIRItem left(x->x(), this); 445 LIRItem right(x->y(), this); 446 447 BasicType bt = as_BasicType(x->type()); 448 BasicTypeList signature(2); 449 signature.append(bt); 450 signature.append(bt); 451 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 452 453 const LIR_Opr result_reg = result_register_for(x->type()); 454 left.load_item_force(cc->at(0)); 455 right.load_item_force(cc->at(1)); 456 457 address entry = NULL; 458 switch (x->op()) { 459 case Bytecodes::_frem: 460 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); 461 break; 462 case Bytecodes::_drem: 463 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); 464 break; 465 default: 466 ShouldNotReachHere(); 467 } 468 469 LIR_Opr result = rlock_result(x); 470 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 471 __ move(result_reg, result); 472 } else { 473 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp); 474 set_result(x, round_item(reg)); 475 } 476 #else 477 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { 478 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots 479 LIR_Opr fpu0, fpu1; 480 if (x->op() == Bytecodes::_frem) { 481 fpu0 = LIR_OprFact::single_fpu(0); 482 fpu1 = LIR_OprFact::single_fpu(1); 483 } else { 484 fpu0 = LIR_OprFact::double_fpu(0); 485 fpu1 = LIR_OprFact::double_fpu(1); 486 } 487 __ move(right.result(), fpu1); // order of left and right operand is important! 488 __ move(left.result(), fpu0); 489 __ rem (fpu0, fpu1, fpu0); 490 __ move(fpu0, reg); 491 492 } else { 493 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp); 494 } 495 set_result(x, round_item(reg)); 496 #endif // _LP64 497 } 498 499 500 // for _ladd, _lmul, _lsub, _ldiv, _lrem 501 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 502 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 503 // long division is implemented as a direct call into the runtime 504 LIRItem left(x->x(), this); 505 LIRItem right(x->y(), this); 506 507 // the check for division by zero destroys the right operand 508 right.set_destroys_register(); 509 510 BasicTypeList signature(2); 511 signature.append(T_LONG); 512 signature.append(T_LONG); 513 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 514 515 // check for division by zero (destroys registers of right operand!) 516 CodeEmitInfo* info = state_for(x); 517 518 const LIR_Opr result_reg = result_register_for(x->type()); 519 left.load_item_force(cc->at(1)); 520 right.load_item(); 521 522 __ move(right.result(), cc->at(0)); 523 524 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 525 __ branch(lir_cond_equal, new DivByZeroStub(info)); 526 527 address entry = NULL; 528 switch (x->op()) { 529 case Bytecodes::_lrem: 530 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 531 break; // check if dividend is 0 is done elsewhere 532 case Bytecodes::_ldiv: 533 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 534 break; // check if dividend is 0 is done elsewhere 535 default: 536 ShouldNotReachHere(); 537 } 538 539 LIR_Opr result = rlock_result(x); 540 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 541 __ move(result_reg, result); 542 } else if (x->op() == Bytecodes::_lmul) { 543 // missing test if instr is commutative and if we should swap 544 LIRItem left(x->x(), this); 545 LIRItem right(x->y(), this); 546 547 // right register is destroyed by the long mul, so it must be 548 // copied to a new register. 549 right.set_destroys_register(); 550 551 left.load_item(); 552 right.load_item(); 553 554 LIR_Opr reg = FrameMap::long0_opr; 555 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); 556 LIR_Opr result = rlock_result(x); 557 __ move(reg, result); 558 } else { 559 // missing test if instr is commutative and if we should swap 560 LIRItem left(x->x(), this); 561 LIRItem right(x->y(), this); 562 563 left.load_item(); 564 // don't load constants to save register 565 right.load_nonconstant(); 566 rlock_result(x); 567 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 568 } 569 } 570 571 572 573 // for: _iadd, _imul, _isub, _idiv, _irem 574 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 575 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 576 // The requirements for division and modulo 577 // input : rax,: dividend min_int 578 // reg: divisor (may not be rax,/rdx) -1 579 // 580 // output: rax,: quotient (= rax, idiv reg) min_int 581 // rdx: remainder (= rax, irem reg) 0 582 583 // rax, and rdx will be destroyed 584 585 // Note: does this invalidate the spec ??? 586 LIRItem right(x->y(), this); 587 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 588 589 // call state_for before load_item_force because state_for may 590 // force the evaluation of other instructions that are needed for 591 // correct debug info. Otherwise the live range of the fix 592 // register might be too long. 593 CodeEmitInfo* info = state_for(x); 594 595 left.load_item_force(divInOpr()); 596 597 right.load_item(); 598 599 LIR_Opr result = rlock_result(x); 600 LIR_Opr result_reg; 601 if (x->op() == Bytecodes::_idiv) { 602 result_reg = divOutOpr(); 603 } else { 604 result_reg = remOutOpr(); 605 } 606 607 if (!ImplicitDiv0Checks) { 608 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 609 __ branch(lir_cond_equal, new DivByZeroStub(info)); 610 // Idiv/irem cannot trap (passing info would generate an assertion). 611 info = NULL; 612 } 613 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 614 if (x->op() == Bytecodes::_irem) { 615 __ irem(left.result(), right.result(), result_reg, tmp, info); 616 } else if (x->op() == Bytecodes::_idiv) { 617 __ idiv(left.result(), right.result(), result_reg, tmp, info); 618 } else { 619 ShouldNotReachHere(); 620 } 621 622 __ move(result_reg, result); 623 } else { 624 // missing test if instr is commutative and if we should swap 625 LIRItem left(x->x(), this); 626 LIRItem right(x->y(), this); 627 LIRItem* left_arg = &left; 628 LIRItem* right_arg = &right; 629 if (x->is_commutative() && left.is_stack() && right.is_register()) { 630 // swap them if left is real stack (or cached) and right is real register(not cached) 631 left_arg = &right; 632 right_arg = &left; 633 } 634 635 left_arg->load_item(); 636 637 // do not need to load right, as we can handle stack and constants 638 if (x->op() == Bytecodes::_imul ) { 639 // check if we can use shift instead 640 bool use_constant = false; 641 bool use_tmp = false; 642 if (right_arg->is_constant()) { 643 jint iconst = right_arg->get_jint_constant(); 644 if (iconst > 0 && iconst < max_jint) { 645 if (is_power_of_2(iconst)) { 646 use_constant = true; 647 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 648 use_constant = true; 649 use_tmp = true; 650 } 651 } 652 } 653 if (use_constant) { 654 right_arg->dont_load_item(); 655 } else { 656 right_arg->load_item(); 657 } 658 LIR_Opr tmp = LIR_OprFact::illegalOpr; 659 if (use_tmp) { 660 tmp = new_register(T_INT); 661 } 662 rlock_result(x); 663 664 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 665 } else { 666 right_arg->dont_load_item(); 667 rlock_result(x); 668 LIR_Opr tmp = LIR_OprFact::illegalOpr; 669 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 670 } 671 } 672 } 673 674 675 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 676 // when an operand with use count 1 is the left operand, then it is 677 // likely that no move for 2-operand-LIR-form is necessary 678 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 679 x->swap_operands(); 680 } 681 682 ValueTag tag = x->type()->tag(); 683 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 684 switch (tag) { 685 case floatTag: 686 case doubleTag: do_ArithmeticOp_FPU(x); return; 687 case longTag: do_ArithmeticOp_Long(x); return; 688 case intTag: do_ArithmeticOp_Int(x); return; 689 default: ShouldNotReachHere(); return; 690 } 691 } 692 693 694 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 695 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 696 // count must always be in rcx 697 LIRItem value(x->x(), this); 698 LIRItem count(x->y(), this); 699 700 ValueTag elemType = x->type()->tag(); 701 bool must_load_count = !count.is_constant() || elemType == longTag; 702 if (must_load_count) { 703 // count for long must be in register 704 count.load_item_force(shiftCountOpr()); 705 } else { 706 count.dont_load_item(); 707 } 708 value.load_item(); 709 LIR_Opr reg = rlock_result(x); 710 711 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 712 } 713 714 715 // _iand, _land, _ior, _lor, _ixor, _lxor 716 void LIRGenerator::do_LogicOp(LogicOp* x) { 717 // when an operand with use count 1 is the left operand, then it is 718 // likely that no move for 2-operand-LIR-form is necessary 719 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 720 x->swap_operands(); 721 } 722 723 LIRItem left(x->x(), this); 724 LIRItem right(x->y(), this); 725 726 left.load_item(); 727 right.load_nonconstant(); 728 LIR_Opr reg = rlock_result(x); 729 730 logic_op(x->op(), reg, left.result(), right.result()); 731 } 732 733 734 735 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 736 void LIRGenerator::do_CompareOp(CompareOp* x) { 737 LIRItem left(x->x(), this); 738 LIRItem right(x->y(), this); 739 ValueTag tag = x->x()->type()->tag(); 740 if (tag == longTag) { 741 left.set_destroys_register(); 742 } 743 left.load_item(); 744 right.load_item(); 745 LIR_Opr reg = rlock_result(x); 746 747 if (x->x()->type()->is_float_kind()) { 748 Bytecodes::Code code = x->op(); 749 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 750 } else if (x->x()->type()->tag() == longTag) { 751 __ lcmp2int(left.result(), right.result(), reg); 752 } else { 753 Unimplemented(); 754 } 755 } 756 757 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { 758 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 759 if (is_reference_type(type)) { 760 cmp_value.load_item_force(FrameMap::rax_oop_opr); 761 new_value.load_item(); 762 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 763 } else if (type == T_INT) { 764 cmp_value.load_item_force(FrameMap::rax_opr); 765 new_value.load_item(); 766 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 767 } else if (type == T_LONG) { 768 cmp_value.load_item_force(FrameMap::long0_opr); 769 new_value.load_item_force(FrameMap::long1_opr); 770 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); 771 } else { 772 Unimplemented(); 773 } 774 LIR_Opr result = new_register(T_INT); 775 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 776 result, T_INT); 777 return result; 778 } 779 780 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { 781 bool is_oop = is_reference_type(type); 782 LIR_Opr result = new_register(type); 783 value.load_item(); 784 // Because we want a 2-arg form of xchg and xadd 785 __ move(value.result(), result); 786 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type"); 787 __ xchg(addr, result, result, LIR_OprFact::illegalOpr); 788 return result; 789 } 790 791 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) { 792 LIR_Opr result = new_register(type); 793 value.load_item(); 794 // Because we want a 2-arg form of xchg and xadd 795 __ move(value.result(), result); 796 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type"); 797 __ xadd(addr, result, result, LIR_OprFact::illegalOpr); 798 return result; 799 } 800 801 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { 802 assert(x->number_of_arguments() == 3, "wrong type"); 803 assert(UseFMA, "Needs FMA instructions support."); 804 LIRItem value(x->argument_at(0), this); 805 LIRItem value1(x->argument_at(1), this); 806 LIRItem value2(x->argument_at(2), this); 807 808 value2.set_destroys_register(); 809 810 value.load_item(); 811 value1.load_item(); 812 value2.load_item(); 813 814 LIR_Opr calc_input = value.result(); 815 LIR_Opr calc_input1 = value1.result(); 816 LIR_Opr calc_input2 = value2.result(); 817 LIR_Opr calc_result = rlock_result(x); 818 819 switch (x->id()) { 820 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break; 821 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break; 822 default: ShouldNotReachHere(); 823 } 824 825 } 826 827 828 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 829 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); 830 831 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog || 832 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos || 833 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan || 834 x->id() == vmIntrinsics::_dlog10) { 835 do_LibmIntrinsic(x); 836 return; 837 } 838 839 LIRItem value(x->argument_at(0), this); 840 841 bool use_fpu = false; 842 #ifndef _LP64 843 if (UseSSE < 2) { 844 value.set_destroys_register(); 845 } 846 #endif // !LP64 847 value.load_item(); 848 849 LIR_Opr calc_input = value.result(); 850 LIR_Opr calc_result = rlock_result(x); 851 852 LIR_Opr tmp = LIR_OprFact::illegalOpr; 853 #ifdef _LP64 854 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) && 855 (x->id() == vmIntrinsics::_dabs)) { 856 tmp = new_register(T_DOUBLE); 857 __ move(LIR_OprFact::doubleConst(-0.0), tmp); 858 } 859 #endif 860 861 switch(x->id()) { 862 case vmIntrinsics::_dabs: 863 __ abs(calc_input, calc_result, tmp); 864 break; 865 case vmIntrinsics::_dsqrt: 866 case vmIntrinsics::_dsqrt_strict: 867 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr); 868 break; 869 default: 870 ShouldNotReachHere(); 871 } 872 873 if (use_fpu) { 874 __ move(calc_result, x->operand()); 875 } 876 } 877 878 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) { 879 LIRItem value(x->argument_at(0), this); 880 value.set_destroys_register(); 881 882 LIR_Opr calc_result = rlock_result(x); 883 LIR_Opr result_reg = result_register_for(x->type()); 884 885 CallingConvention* cc = NULL; 886 887 if (x->id() == vmIntrinsics::_dpow) { 888 LIRItem value1(x->argument_at(1), this); 889 890 value1.set_destroys_register(); 891 892 BasicTypeList signature(2); 893 signature.append(T_DOUBLE); 894 signature.append(T_DOUBLE); 895 cc = frame_map()->c_calling_convention(&signature); 896 value.load_item_force(cc->at(0)); 897 value1.load_item_force(cc->at(1)); 898 } else { 899 BasicTypeList signature(1); 900 signature.append(T_DOUBLE); 901 cc = frame_map()->c_calling_convention(&signature); 902 value.load_item_force(cc->at(0)); 903 } 904 905 #ifndef _LP64 906 LIR_Opr tmp = FrameMap::fpu0_double_opr; 907 result_reg = tmp; 908 switch(x->id()) { 909 case vmIntrinsics::_dexp: 910 if (StubRoutines::dexp() != NULL) { 911 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 912 } else { 913 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 914 } 915 break; 916 case vmIntrinsics::_dlog: 917 if (StubRoutines::dlog() != NULL) { 918 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 919 } else { 920 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 921 } 922 break; 923 case vmIntrinsics::_dlog10: 924 if (StubRoutines::dlog10() != NULL) { 925 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 926 } else { 927 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 928 } 929 break; 930 case vmIntrinsics::_dpow: 931 if (StubRoutines::dpow() != NULL) { 932 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 933 } else { 934 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 935 } 936 break; 937 case vmIntrinsics::_dsin: 938 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) { 939 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 940 } else { 941 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 942 } 943 break; 944 case vmIntrinsics::_dcos: 945 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) { 946 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 947 } else { 948 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 949 } 950 break; 951 case vmIntrinsics::_dtan: 952 if (StubRoutines::dtan() != NULL) { 953 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 954 } else { 955 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 956 } 957 break; 958 default: ShouldNotReachHere(); 959 } 960 #else 961 switch (x->id()) { 962 case vmIntrinsics::_dexp: 963 if (StubRoutines::dexp() != NULL) { 964 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 965 } else { 966 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 967 } 968 break; 969 case vmIntrinsics::_dlog: 970 if (StubRoutines::dlog() != NULL) { 971 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 972 } else { 973 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 974 } 975 break; 976 case vmIntrinsics::_dlog10: 977 if (StubRoutines::dlog10() != NULL) { 978 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args()); 979 } else { 980 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args()); 981 } 982 break; 983 case vmIntrinsics::_dpow: 984 if (StubRoutines::dpow() != NULL) { 985 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 986 } else { 987 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 988 } 989 break; 990 case vmIntrinsics::_dsin: 991 if (StubRoutines::dsin() != NULL) { 992 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 993 } else { 994 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 995 } 996 break; 997 case vmIntrinsics::_dcos: 998 if (StubRoutines::dcos() != NULL) { 999 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 1000 } else { 1001 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 1002 } 1003 break; 1004 case vmIntrinsics::_dtan: 1005 if (StubRoutines::dtan() != NULL) { 1006 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args()); 1007 } else { 1008 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args()); 1009 } 1010 break; 1011 default: ShouldNotReachHere(); 1012 } 1013 #endif // _LP64 1014 __ move(result_reg, calc_result); 1015 } 1016 1017 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 1018 assert(x->number_of_arguments() == 5, "wrong type"); 1019 1020 // Make all state_for calls early since they can emit code 1021 CodeEmitInfo* info = state_for(x, x->state()); 1022 1023 LIRItem src(x->argument_at(0), this); 1024 LIRItem src_pos(x->argument_at(1), this); 1025 LIRItem dst(x->argument_at(2), this); 1026 LIRItem dst_pos(x->argument_at(3), this); 1027 LIRItem length(x->argument_at(4), this); 1028 1029 // operands for arraycopy must use fixed registers, otherwise 1030 // LinearScan will fail allocation (because arraycopy always needs a 1031 // call) 1032 1033 #ifndef _LP64 1034 src.load_item_force (FrameMap::rcx_oop_opr); 1035 src_pos.load_item_force (FrameMap::rdx_opr); 1036 dst.load_item_force (FrameMap::rax_oop_opr); 1037 dst_pos.load_item_force (FrameMap::rbx_opr); 1038 length.load_item_force (FrameMap::rdi_opr); 1039 LIR_Opr tmp = (FrameMap::rsi_opr); 1040 #else 1041 1042 // The java calling convention will give us enough registers 1043 // so that on the stub side the args will be perfect already. 1044 // On the other slow/special case side we call C and the arg 1045 // positions are not similar enough to pick one as the best. 1046 // Also because the java calling convention is a "shifted" version 1047 // of the C convention we can process the java args trivially into C 1048 // args without worry of overwriting during the xfer 1049 1050 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 1051 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 1052 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 1053 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 1054 length.load_item_force (FrameMap::as_opr(j_rarg4)); 1055 1056 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 1057 #endif // LP64 1058 1059 set_no_result(x); 1060 1061 int flags; 1062 ciArrayKlass* expected_type; 1063 arraycopy_helper(x, &flags, &expected_type); 1064 1065 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 1066 } 1067 1068 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 1069 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support"); 1070 // Make all state_for calls early since they can emit code 1071 LIR_Opr result = rlock_result(x); 1072 int flags = 0; 1073 switch (x->id()) { 1074 case vmIntrinsics::_updateCRC32: { 1075 LIRItem crc(x->argument_at(0), this); 1076 LIRItem val(x->argument_at(1), this); 1077 // val is destroyed by update_crc32 1078 val.set_destroys_register(); 1079 crc.load_item(); 1080 val.load_item(); 1081 __ update_crc32(crc.result(), val.result(), result); 1082 break; 1083 } 1084 case vmIntrinsics::_updateBytesCRC32: 1085 case vmIntrinsics::_updateByteBufferCRC32: { 1086 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 1087 1088 LIRItem crc(x->argument_at(0), this); 1089 LIRItem buf(x->argument_at(1), this); 1090 LIRItem off(x->argument_at(2), this); 1091 LIRItem len(x->argument_at(3), this); 1092 buf.load_item(); 1093 off.load_nonconstant(); 1094 1095 LIR_Opr index = off.result(); 1096 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1097 if(off.result()->is_constant()) { 1098 index = LIR_OprFact::illegalOpr; 1099 offset += off.result()->as_jint(); 1100 } 1101 LIR_Opr base_op = buf.result(); 1102 1103 #ifndef _LP64 1104 if (!is_updateBytes) { // long b raw address 1105 base_op = new_register(T_INT); 1106 __ convert(Bytecodes::_l2i, buf.result(), base_op); 1107 } 1108 #else 1109 if (index->is_valid()) { 1110 LIR_Opr tmp = new_register(T_LONG); 1111 __ convert(Bytecodes::_i2l, index, tmp); 1112 index = tmp; 1113 } 1114 #endif 1115 1116 LIR_Address* a = new LIR_Address(base_op, 1117 index, 1118 offset, 1119 T_BYTE); 1120 BasicTypeList signature(3); 1121 signature.append(T_INT); 1122 signature.append(T_ADDRESS); 1123 signature.append(T_INT); 1124 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1125 const LIR_Opr result_reg = result_register_for(x->type()); 1126 1127 LIR_Opr addr = new_pointer_register(); 1128 __ leal(LIR_OprFact::address(a), addr); 1129 1130 crc.load_item_force(cc->at(0)); 1131 __ move(addr, cc->at(1)); 1132 len.load_item_force(cc->at(2)); 1133 1134 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); 1135 __ move(result_reg, result); 1136 1137 break; 1138 } 1139 default: { 1140 ShouldNotReachHere(); 1141 } 1142 } 1143 } 1144 1145 void LIRGenerator::do_update_CRC32C(Intrinsic* x) { 1146 Unimplemented(); 1147 } 1148 1149 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { 1150 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support"); 1151 1152 // Make all state_for calls early since they can emit code 1153 LIR_Opr result = rlock_result(x); 1154 1155 LIRItem a(x->argument_at(0), this); // Object 1156 LIRItem aOffset(x->argument_at(1), this); // long 1157 LIRItem b(x->argument_at(2), this); // Object 1158 LIRItem bOffset(x->argument_at(3), this); // long 1159 LIRItem length(x->argument_at(4), this); // int 1160 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int 1161 1162 a.load_item(); 1163 aOffset.load_nonconstant(); 1164 b.load_item(); 1165 bOffset.load_nonconstant(); 1166 1167 long constant_aOffset = 0; 1168 LIR_Opr result_aOffset = aOffset.result(); 1169 if (result_aOffset->is_constant()) { 1170 constant_aOffset = result_aOffset->as_jlong(); 1171 result_aOffset = LIR_OprFact::illegalOpr; 1172 } 1173 LIR_Opr result_a = a.result(); 1174 1175 long constant_bOffset = 0; 1176 LIR_Opr result_bOffset = bOffset.result(); 1177 if (result_bOffset->is_constant()) { 1178 constant_bOffset = result_bOffset->as_jlong(); 1179 result_bOffset = LIR_OprFact::illegalOpr; 1180 } 1181 LIR_Opr result_b = b.result(); 1182 1183 #ifndef _LP64 1184 result_a = new_register(T_INT); 1185 __ convert(Bytecodes::_l2i, a.result(), result_a); 1186 result_b = new_register(T_INT); 1187 __ convert(Bytecodes::_l2i, b.result(), result_b); 1188 #endif 1189 1190 1191 LIR_Address* addr_a = new LIR_Address(result_a, 1192 result_aOffset, 1193 constant_aOffset, 1194 T_BYTE); 1195 1196 LIR_Address* addr_b = new LIR_Address(result_b, 1197 result_bOffset, 1198 constant_bOffset, 1199 T_BYTE); 1200 1201 BasicTypeList signature(4); 1202 signature.append(T_ADDRESS); 1203 signature.append(T_ADDRESS); 1204 signature.append(T_INT); 1205 signature.append(T_INT); 1206 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1207 const LIR_Opr result_reg = result_register_for(x->type()); 1208 1209 LIR_Opr ptr_addr_a = new_pointer_register(); 1210 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a); 1211 1212 LIR_Opr ptr_addr_b = new_pointer_register(); 1213 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b); 1214 1215 __ move(ptr_addr_a, cc->at(0)); 1216 __ move(ptr_addr_b, cc->at(1)); 1217 length.load_item_force(cc->at(2)); 1218 log2ArrayIndexScale.load_item_force(cc->at(3)); 1219 1220 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args()); 1221 __ move(result_reg, result); 1222 } 1223 1224 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 1225 // _i2b, _i2c, _i2s 1226 LIR_Opr fixed_register_for(BasicType type) { 1227 switch (type) { 1228 case T_FLOAT: return FrameMap::fpu0_float_opr; 1229 case T_DOUBLE: return FrameMap::fpu0_double_opr; 1230 case T_INT: return FrameMap::rax_opr; 1231 case T_LONG: return FrameMap::long0_opr; 1232 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 1233 } 1234 } 1235 1236 void LIRGenerator::do_Convert(Convert* x) { 1237 #ifdef _LP64 1238 LIRItem value(x->value(), this); 1239 value.load_item(); 1240 LIR_Opr input = value.result(); 1241 LIR_Opr result = rlock(x); 1242 __ convert(x->op(), input, result); 1243 assert(result->is_virtual(), "result must be virtual register"); 1244 set_result(x, result); 1245 #else 1246 // flags that vary for the different operations and different SSE-settings 1247 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false; 1248 1249 switch (x->op()) { 1250 case Bytecodes::_i2l: // fall through 1251 case Bytecodes::_l2i: // fall through 1252 case Bytecodes::_i2b: // fall through 1253 case Bytecodes::_i2c: // fall through 1254 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1255 1256 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; 1257 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; 1258 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; 1259 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1260 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1261 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1262 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; 1263 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; 1264 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1265 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1266 default: ShouldNotReachHere(); 1267 } 1268 1269 LIRItem value(x->value(), this); 1270 value.load_item(); 1271 LIR_Opr input = value.result(); 1272 LIR_Opr result = rlock(x); 1273 1274 // arguments of lir_convert 1275 LIR_Opr conv_input = input; 1276 LIR_Opr conv_result = result; 1277 ConversionStub* stub = NULL; 1278 1279 if (fixed_input) { 1280 conv_input = fixed_register_for(input->type()); 1281 __ move(input, conv_input); 1282 } 1283 1284 assert(fixed_result == false || round_result == false, "cannot set both"); 1285 if (fixed_result) { 1286 conv_result = fixed_register_for(result->type()); 1287 } else if (round_result) { 1288 result = new_register(result->type()); 1289 set_vreg_flag(result, must_start_in_memory); 1290 } 1291 1292 if (needs_stub) { 1293 stub = new ConversionStub(x->op(), conv_input, conv_result); 1294 } 1295 1296 __ convert(x->op(), conv_input, conv_result, stub); 1297 1298 if (result != conv_result) { 1299 __ move(conv_result, result); 1300 } 1301 1302 assert(result->is_virtual(), "result must be virtual register"); 1303 set_result(x, result); 1304 #endif // _LP64 1305 } 1306 1307 1308 void LIRGenerator::do_NewInstance(NewInstance* x) { 1309 print_if_not_loaded(x); 1310 1311 CodeEmitInfo* info = state_for(x, x->state()); 1312 LIR_Opr reg = result_register_for(x->type()); 1313 new_instance(reg, x->klass(), x->is_unresolved(), 1314 /* allow_inline */ false, 1315 FrameMap::rcx_oop_opr, 1316 FrameMap::rdi_oop_opr, 1317 FrameMap::rsi_oop_opr, 1318 LIR_OprFact::illegalOpr, 1319 FrameMap::rdx_metadata_opr, info); 1320 LIR_Opr result = rlock_result(x); 1321 __ move(reg, result); 1322 } 1323 1324 void LIRGenerator::do_NewInlineTypeInstance(NewInlineTypeInstance* x) { 1325 // Mapping to do_NewInstance (same code) but use state_before for reexecution. 1326 CodeEmitInfo* info = state_for(x, x->state_before()); 1327 x->set_to_object_type(); 1328 LIR_Opr reg = result_register_for(x->type()); 1329 new_instance(reg, x->klass(), false, 1330 /* allow_inline */ true, 1331 FrameMap::rcx_oop_opr, 1332 FrameMap::rdi_oop_opr, 1333 FrameMap::rsi_oop_opr, 1334 LIR_OprFact::illegalOpr, 1335 FrameMap::rdx_metadata_opr, info); 1336 LIR_Opr result = rlock_result(x); 1337 __ move(reg, result); 1338 } 1339 1340 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 1341 CodeEmitInfo* info = state_for(x, x->state()); 1342 1343 LIRItem length(x->length(), this); 1344 length.load_item_force(FrameMap::rbx_opr); 1345 1346 LIR_Opr reg = result_register_for(x->type()); 1347 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1348 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1349 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1350 LIR_Opr tmp4 = reg; 1351 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1352 LIR_Opr len = length.result(); 1353 BasicType elem_type = x->elt_type(); 1354 1355 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1356 1357 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1358 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 1359 1360 LIR_Opr result = rlock_result(x); 1361 __ move(reg, result); 1362 } 1363 1364 1365 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1366 LIRItem length(x->length(), this); 1367 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1368 // and therefore provide the state before the parameters have been consumed 1369 CodeEmitInfo* patching_info = NULL; 1370 if (!x->klass()->is_loaded() || PatchALot) { 1371 patching_info = state_for(x, x->state_before()); 1372 } 1373 1374 CodeEmitInfo* info = state_for(x, x->state()); 1375 1376 const LIR_Opr reg = result_register_for(x->type()); 1377 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1378 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1379 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1380 LIR_Opr tmp4 = reg; 1381 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1382 1383 length.load_item_force(FrameMap::rbx_opr); 1384 LIR_Opr len = length.result(); 1385 1386 ciKlass* obj = (ciKlass*) x->exact_type(); 1387 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_null_free()); 1388 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1389 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1390 } 1391 klass2reg_with_patching(klass_reg, obj, patching_info); 1392 if (x->is_null_free()) { 1393 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_PRIMITIVE_OBJECT, klass_reg, slow_path); 1394 } else { 1395 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1396 } 1397 1398 LIR_Opr result = rlock_result(x); 1399 __ move(reg, result); 1400 } 1401 1402 1403 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1404 Values* dims = x->dims(); 1405 int i = dims->length(); 1406 LIRItemList* items = new LIRItemList(i, i, NULL); 1407 while (i-- > 0) { 1408 LIRItem* size = new LIRItem(dims->at(i), this); 1409 items->at_put(i, size); 1410 } 1411 1412 // Evaluate state_for early since it may emit code. 1413 CodeEmitInfo* patching_info = NULL; 1414 if (!x->klass()->is_loaded() || PatchALot) { 1415 patching_info = state_for(x, x->state_before()); 1416 1417 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1418 // clone all handlers (NOTE: Usually this is handled transparently 1419 // by the CodeEmitInfo cloning logic in CodeStub constructors but 1420 // is done explicitly here because a stub isn't being used). 1421 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1422 } 1423 CodeEmitInfo* info = state_for(x, x->state()); 1424 1425 i = dims->length(); 1426 while (i-- > 0) { 1427 LIRItem* size = items->at(i); 1428 size->load_nonconstant(); 1429 1430 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1431 } 1432 1433 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; 1434 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 1435 1436 LIR_Opr rank = FrameMap::rbx_opr; 1437 __ move(LIR_OprFact::intConst(x->rank()), rank); 1438 LIR_Opr varargs = FrameMap::rcx_opr; 1439 __ move(FrameMap::rsp_opr, varargs); 1440 LIR_OprList* args = new LIR_OprList(3); 1441 args->append(klass_reg); 1442 args->append(rank); 1443 args->append(varargs); 1444 LIR_Opr reg = result_register_for(x->type()); 1445 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 1446 LIR_OprFact::illegalOpr, 1447 reg, args, info); 1448 1449 LIR_Opr result = rlock_result(x); 1450 __ move(reg, result); 1451 } 1452 1453 1454 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1455 // nothing to do for now 1456 } 1457 1458 1459 void LIRGenerator::do_CheckCast(CheckCast* x) { 1460 LIRItem obj(x->obj(), this); 1461 1462 CodeEmitInfo* patching_info = NULL; 1463 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) { 1464 // must do this before locking the destination register as an oop register, 1465 // and before the obj is loaded (the latter is for deoptimization) 1466 patching_info = state_for(x, x->state_before()); 1467 } 1468 obj.load_item(); 1469 1470 // info for exceptions 1471 CodeEmitInfo* info_for_exception = 1472 (x->needs_exception_state() ? state_for(x) : 1473 state_for(x, x->state_before(), true /*ignore_xhandler*/)); 1474 1475 if (x->is_null_free()) { 1476 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception)); 1477 } 1478 1479 CodeStub* stub; 1480 if (x->is_incompatible_class_change_check()) { 1481 assert(patching_info == NULL, "can't patch this"); 1482 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1483 } else if (x->is_invokespecial_receiver_check()) { 1484 assert(patching_info == NULL, "can't patch this"); 1485 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none); 1486 } else { 1487 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1488 } 1489 LIR_Opr reg = rlock_result(x); 1490 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1491 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1492 tmp3 = new_register(objectType); 1493 } 1494 __ checkcast(reg, obj.result(), x->klass(), 1495 new_register(objectType), new_register(objectType), tmp3, 1496 x->direct_compare(), info_for_exception, patching_info, stub, 1497 x->profiled_method(), x->profiled_bci(), x->is_null_free()); 1498 } 1499 1500 1501 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1502 LIRItem obj(x->obj(), this); 1503 1504 // result and test object may not be in same register 1505 LIR_Opr reg = rlock_result(x); 1506 CodeEmitInfo* patching_info = NULL; 1507 if ((!x->klass()->is_loaded() || PatchALot)) { 1508 // must do this before locking the destination register as an oop register 1509 patching_info = state_for(x, x->state_before()); 1510 } 1511 obj.load_item(); 1512 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1513 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1514 tmp3 = new_register(objectType); 1515 } 1516 __ instanceof(reg, obj.result(), x->klass(), 1517 new_register(objectType), new_register(objectType), tmp3, 1518 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); 1519 } 1520 1521 1522 void LIRGenerator::do_If(If* x) { 1523 assert(x->number_of_sux() == 2, "inconsistency"); 1524 ValueTag tag = x->x()->type()->tag(); 1525 bool is_safepoint = x->is_safepoint(); 1526 1527 If::Condition cond = x->cond(); 1528 1529 LIRItem xitem(x->x(), this); 1530 LIRItem yitem(x->y(), this); 1531 LIRItem* xin = &xitem; 1532 LIRItem* yin = &yitem; 1533 1534 if (tag == longTag) { 1535 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1536 // mirror for other conditions 1537 if (cond == If::gtr || cond == If::leq) { 1538 cond = Instruction::mirror(cond); 1539 xin = &yitem; 1540 yin = &xitem; 1541 } 1542 xin->set_destroys_register(); 1543 } 1544 xin->load_item(); 1545 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1546 // inline long zero 1547 yin->dont_load_item(); 1548 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) { 1549 // longs cannot handle constants at right side 1550 yin->load_item(); 1551 } else { 1552 yin->dont_load_item(); 1553 } 1554 1555 LIR_Opr left = xin->result(); 1556 LIR_Opr right = yin->result(); 1557 1558 set_no_result(x); 1559 1560 // add safepoint before generating condition code so it can be recomputed 1561 if (x->is_safepoint()) { 1562 // increment backedge counter if needed 1563 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()), 1564 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci()); 1565 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before())); 1566 } 1567 1568 if (x->substitutability_check()) { 1569 substitutability_check(x, *xin, *yin); 1570 } else { 1571 __ cmp(lir_cond(cond), left, right); 1572 } 1573 // Generate branch profiling. Profiling code doesn't kill flags. 1574 profile_branch(x, cond); 1575 move_to_phi(x->state()); 1576 if (x->x()->type()->is_float_kind()) { 1577 __ branch(lir_cond(cond), x->tsux(), x->usux()); 1578 } else { 1579 __ branch(lir_cond(cond), x->tsux()); 1580 } 1581 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1582 __ jump(x->default_sux()); 1583 } 1584 1585 1586 LIR_Opr LIRGenerator::getThreadPointer() { 1587 #ifdef _LP64 1588 return FrameMap::as_pointer_opr(r15_thread); 1589 #else 1590 LIR_Opr result = new_register(T_INT); 1591 __ get_thread(result); 1592 return result; 1593 #endif // 1594 } 1595 1596 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1597 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1598 LIR_OprList* args = new LIR_OprList(); 1599 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1600 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1601 } 1602 1603 1604 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1605 CodeEmitInfo* info) { 1606 if (address->type() == T_LONG) { 1607 address = new LIR_Address(address->base(), 1608 address->index(), address->scale(), 1609 address->disp(), T_DOUBLE); 1610 // Transfer the value atomically by using FP moves. This means 1611 // the value has to be moved between CPU and FPU registers. It 1612 // always has to be moved through spill slot since there's no 1613 // quick way to pack the value into an SSE register. 1614 LIR_Opr temp_double = new_register(T_DOUBLE); 1615 LIR_Opr spill = new_register(T_LONG); 1616 set_vreg_flag(spill, must_start_in_memory); 1617 __ move(value, spill); 1618 __ volatile_move(spill, temp_double, T_LONG); 1619 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1620 } else { 1621 __ store(value, address, info); 1622 } 1623 } 1624 1625 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1626 CodeEmitInfo* info) { 1627 if (address->type() == T_LONG) { 1628 address = new LIR_Address(address->base(), 1629 address->index(), address->scale(), 1630 address->disp(), T_DOUBLE); 1631 // Transfer the value atomically by using FP moves. This means 1632 // the value has to be moved between CPU and FPU registers. In 1633 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1634 // SSE2+ mode it can be moved directly. 1635 LIR_Opr temp_double = new_register(T_DOUBLE); 1636 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1637 __ volatile_move(temp_double, result, T_LONG); 1638 #ifndef _LP64 1639 if (UseSSE < 2) { 1640 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible 1641 set_vreg_flag(result, must_start_in_memory); 1642 } 1643 #endif // !LP64 1644 } else { 1645 __ load(address, result, info); 1646 } 1647 }