1 /*
2 * Copyright (c) 2005, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "c1/c1_Compilation.hpp"
26 #include "c1/c1_FrameMap.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_LIRGenerator.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "ci/ciArray.hpp"
33 #include "ci/ciInlineKlass.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "gc/shared/c1/barrierSetC1.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/powerOfTwo.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 case floatTag: opr = FrameMap::xmm0_float_opr; break;
97 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
98 case addressTag:
99 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
100 }
101
102 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
103 return opr;
104 }
105
106
107 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
108 LIR_Opr reg = new_register(T_INT);
109 set_vreg_flag(reg, LIRGenerator::byte_reg);
110 return reg;
111 }
112
113
114 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
115 // We just need one 32-bit temp register for x86/x64, to check whether both
116 // oops have markWord::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck().
117 // @temp = %r10d
118 // mov $0x405, %r10d
119 // and (%left), %r10d /* if need to check left */
120 // and (%right), %r10d /* if need to check right */
121 // cmp $0x405, $r10d
122 // jne L_oops_not_equal
123 tmp1 = new_register(T_INT);
124 tmp2 = LIR_OprFact::illegalOpr;
125 }
126
127 //--------- loading items into registers --------------------------------
128
129
130 // i486 instructions can inline constants
131 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
132 if (type == T_SHORT || type == T_CHAR) {
133 return false;
134 }
135 Constant* c = v->as_Constant();
136 if (c && c->state_before() == nullptr) {
137 // constants of any type can be stored directly, except for
138 // unloaded object constants.
139 return true;
140 }
141 return false;
142 }
143
144
145 bool LIRGenerator::can_inline_as_constant(Value v) const {
146 if (v->type()->tag() == longTag) return false;
147 return v->type()->tag() != objectTag ||
148 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
149 }
150
151
152 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
153 if (c->type() == T_LONG) return false;
154 return c->type() != T_OBJECT || c->as_jobject() == nullptr;
155 }
156
157
158 LIR_Opr LIRGenerator::safepoint_poll_register() {
159 return LIR_OprFact::illegalOpr;
160 }
161
162
163 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
164 int shift, int disp, BasicType type) {
165 assert(base->is_register(), "must be");
166 if (index->is_constant()) {
167 LIR_Const *constant = index->as_constant_ptr();
168 jlong c;
169 if (constant->type() == T_INT) {
170 c = (jlong(index->as_jint()) << shift) + disp;
171 } else {
172 assert(constant->type() == T_LONG, "should be");
173 c = (index->as_jlong() << shift) + disp;
174 }
175 if ((jlong)((jint)c) == c) {
176 return new LIR_Address(base, (jint)c, type);
177 } else {
178 LIR_Opr tmp = new_register(T_LONG);
179 __ move(index, tmp);
180 return new LIR_Address(base, tmp, type);
181 }
182 } else {
183 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
184 }
185 }
186
187
188 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
189 BasicType type) {
190 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
191
192 LIR_Address* addr;
193 if (index_opr->is_constant()) {
194 int elem_size = type2aelembytes(type);
195 jint index = index_opr->as_jint();
196 jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
197 if (disp > max_jint) {
198 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
199 // Convert array index to long to do array offset computation with 64-bit values.
200 index_opr = new_register(T_LONG);
201 __ move(LIR_OprFact::longConst(index), index_opr);
202 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
203 } else {
204 addr = new LIR_Address(array_opr, (intx)disp, type);
205 }
206 } else {
207 if (index_opr->type() == T_INT) {
208 LIR_Opr tmp = new_register(T_LONG);
209 __ convert(Bytecodes::_i2l, index_opr, tmp);
210 index_opr = tmp;
211 }
212 addr = new LIR_Address(array_opr,
213 index_opr,
214 LIR_Address::scale(type),
215 offset_in_bytes, type);
216 }
217 return addr;
218 }
219
220
221 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
222 LIR_Opr r;
223 if (type == T_LONG) {
224 r = LIR_OprFact::longConst(x);
225 } else if (type == T_INT) {
226 r = LIR_OprFact::intConst(checked_cast<jint>(x));
227 } else {
228 ShouldNotReachHere();
229 }
230 return r;
231 }
232
233 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
234 LIR_Opr pointer = new_pointer_register();
235 __ move(LIR_OprFact::intptrConst(counter), pointer);
236 LIR_Address* addr = new LIR_Address(pointer, type);
237 increment_counter(addr, step);
238 }
239
240
241 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
242 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
243 }
244
245 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
246 __ cmp_mem_int(condition, base, disp, c, info);
247 }
248
249
250 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
251 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
252 }
253
254
255 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
256 if (tmp->is_valid() && c > 0 && c < max_jint) {
257 if (is_power_of_2(c + 1)) {
258 __ move(left, tmp);
259 __ shift_left(left, log2i_exact(c + 1), left);
260 __ sub(left, tmp, result);
261 return true;
262 } else if (is_power_of_2(c - 1)) {
263 __ move(left, tmp);
264 __ shift_left(left, log2i_exact(c - 1), left);
265 __ add(left, tmp, result);
266 return true;
267 }
268 }
269 return false;
270 }
271
272
273 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
274 BasicType type = item->type();
275 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
276 }
277
278 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
279 LIR_Opr tmp1 = new_register(objectType);
280 LIR_Opr tmp2 = new_register(objectType);
281 LIR_Opr tmp3 = new_register(objectType);
282 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
283 }
284
285 //----------------------------------------------------------------------
286 // visitor functions
287 //----------------------------------------------------------------------
288
289 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
290 assert(x->is_pinned(),"");
291 LIRItem obj(x->obj(), this);
292 obj.load_item();
293
294 set_no_result(x);
295
296 // "lock" stores the address of the monitor stack slot, so this is not an oop
297 LIR_Opr lock = new_register(T_INT);
298 // Need a scratch register for inline types on x86
299 LIR_Opr scratch = new_register(T_ADDRESS);
300
301 CodeEmitInfo* info_for_exception = nullptr;
302 if (x->needs_null_check()) {
303 info_for_exception = state_for(x);
304 }
305
306 CodeStub* throw_ie_stub = x->maybe_inlinetype() ?
307 new SimpleExceptionStub(StubId::c1_throw_identity_exception_id,
308 obj.result(), state_for(x))
309 : nullptr;
310
311 // this CodeEmitInfo must not have the xhandlers because here the
312 // object is already locked (xhandlers expect object to be unlocked)
313 CodeEmitInfo* info = state_for(x, x->state(), true);
314 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
315 x->monitor_no(), info_for_exception, info, throw_ie_stub);
316 }
317
318
319 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
320 assert(x->is_pinned(),"");
321
322 LIRItem obj(x->obj(), this);
323 obj.dont_load_item();
324
325 LIR_Opr lock = new_register(T_INT);
326 LIR_Opr obj_temp = new_register(T_INT);
327 set_no_result(x);
328 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
329 }
330
331 // _ineg, _lneg, _fneg, _dneg
332 void LIRGenerator::do_NegateOp(NegateOp* x) {
333 LIRItem value(x->x(), this);
334 value.set_destroys_register();
335 value.load_item();
336 LIR_Opr reg = rlock(x);
337
338 __ negate(value.result(), reg);
339
340 set_result(x, reg);
341 }
342
343 // for _fadd, _fmul, _fsub, _fdiv, _frem
344 // _dadd, _dmul, _dsub, _ddiv, _drem
345 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
346 LIRItem left(x->x(), this);
347 LIRItem right(x->y(), this);
348 LIRItem* left_arg = &left;
349 LIRItem* right_arg = &right;
350 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
351 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
352 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
353 left.load_item();
354 } else {
355 left.dont_load_item();
356 }
357
358 if (must_load_both) {
359 // frem and drem destroy also right operand, so move it to a new register
360 right.set_destroys_register();
361 right.load_item();
362 } else if (right.is_register()) {
363 right.load_item();
364 } else {
365 right.dont_load_item();
366 }
367 LIR_Opr reg = rlock(x);
368 LIR_Opr tmp = LIR_OprFact::illegalOpr;
369 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
370 tmp = new_register(T_DOUBLE);
371 }
372
373 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
374 // frem and drem are implemented as a direct call into the runtime.
375 LIRItem left(x->x(), this);
376 LIRItem right(x->y(), this);
377
378 BasicType bt = as_BasicType(x->type());
379 BasicTypeList signature(2);
380 signature.append(bt);
381 signature.append(bt);
382 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
383
384 const LIR_Opr result_reg = result_register_for(x->type());
385 left.load_item_force(cc->at(0));
386 right.load_item_force(cc->at(1));
387
388 address entry = nullptr;
389 switch (x->op()) {
390 case Bytecodes::_frem:
391 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
392 break;
393 case Bytecodes::_drem:
394 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
395 break;
396 default:
397 ShouldNotReachHere();
398 }
399
400 LIR_Opr result = rlock_result(x);
401 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
402 __ move(result_reg, result);
403 } else {
404 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
405 set_result(x, reg);
406 }
407 }
408
409
410 // for _ladd, _lmul, _lsub, _ldiv, _lrem
411 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
412 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
413 // long division is implemented as a direct call into the runtime
414 LIRItem left(x->x(), this);
415 LIRItem right(x->y(), this);
416
417 // the check for division by zero destroys the right operand
418 right.set_destroys_register();
419
420 BasicTypeList signature(2);
421 signature.append(T_LONG);
422 signature.append(T_LONG);
423 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
424
425 // check for division by zero (destroys registers of right operand!)
426 CodeEmitInfo* info = state_for(x);
427
428 const LIR_Opr result_reg = result_register_for(x->type());
429 left.load_item_force(cc->at(1));
430 right.load_item();
431
432 __ move(right.result(), cc->at(0));
433
434 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
435 __ branch(lir_cond_equal, new DivByZeroStub(info));
436
437 address entry = nullptr;
438 switch (x->op()) {
439 case Bytecodes::_lrem:
440 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
441 break; // check if dividend is 0 is done elsewhere
442 case Bytecodes::_ldiv:
443 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
444 break; // check if dividend is 0 is done elsewhere
445 default:
446 ShouldNotReachHere();
447 }
448
449 LIR_Opr result = rlock_result(x);
450 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
451 __ move(result_reg, result);
452 } else if (x->op() == Bytecodes::_lmul) {
453 // missing test if instr is commutative and if we should swap
454 LIRItem left(x->x(), this);
455 LIRItem right(x->y(), this);
456
457 // right register is destroyed by the long mul, so it must be
458 // copied to a new register.
459 right.set_destroys_register();
460
461 left.load_item();
462 right.load_item();
463
464 LIR_Opr reg = FrameMap::long0_opr;
465 arithmetic_op_long(x->op(), reg, left.result(), right.result(), nullptr);
466 LIR_Opr result = rlock_result(x);
467 __ move(reg, result);
468 } else {
469 // missing test if instr is commutative and if we should swap
470 LIRItem left(x->x(), this);
471 LIRItem right(x->y(), this);
472
473 left.load_item();
474 // don't load constants to save register
475 right.load_nonconstant();
476 rlock_result(x);
477 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
478 }
479 }
480
481
482
483 // for: _iadd, _imul, _isub, _idiv, _irem
484 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
485 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
486 // The requirements for division and modulo
487 // input : rax,: dividend min_int
488 // reg: divisor (may not be rax,/rdx) -1
489 //
490 // output: rax,: quotient (= rax, idiv reg) min_int
491 // rdx: remainder (= rax, irem reg) 0
492
493 // rax, and rdx will be destroyed
494
495 // Note: does this invalidate the spec ???
496 LIRItem right(x->y(), this);
497 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
498
499 // call state_for before load_item_force because state_for may
500 // force the evaluation of other instructions that are needed for
501 // correct debug info. Otherwise the live range of the fix
502 // register might be too long.
503 CodeEmitInfo* info = state_for(x);
504
505 left.load_item_force(divInOpr());
506
507 right.load_item();
508
509 LIR_Opr result = rlock_result(x);
510 LIR_Opr result_reg;
511 if (x->op() == Bytecodes::_idiv) {
512 result_reg = divOutOpr();
513 } else {
514 result_reg = remOutOpr();
515 }
516
517 if (!ImplicitDiv0Checks) {
518 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
519 __ branch(lir_cond_equal, new DivByZeroStub(info));
520 // Idiv/irem cannot trap (passing info would generate an assertion).
521 info = nullptr;
522 }
523 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
524 if (x->op() == Bytecodes::_irem) {
525 __ irem(left.result(), right.result(), result_reg, tmp, info);
526 } else if (x->op() == Bytecodes::_idiv) {
527 __ idiv(left.result(), right.result(), result_reg, tmp, info);
528 } else {
529 ShouldNotReachHere();
530 }
531
532 __ move(result_reg, result);
533 } else {
534 // missing test if instr is commutative and if we should swap
535 LIRItem left(x->x(), this);
536 LIRItem right(x->y(), this);
537 LIRItem* left_arg = &left;
538 LIRItem* right_arg = &right;
539 if (x->is_commutative() && left.is_stack() && right.is_register()) {
540 // swap them if left is real stack (or cached) and right is real register(not cached)
541 left_arg = &right;
542 right_arg = &left;
543 }
544
545 left_arg->load_item();
546
547 // do not need to load right, as we can handle stack and constants
548 if (x->op() == Bytecodes::_imul ) {
549 // check if we can use shift instead
550 bool use_constant = false;
551 bool use_tmp = false;
552 if (right_arg->is_constant()) {
553 jint iconst = right_arg->get_jint_constant();
554 if (iconst > 0 && iconst < max_jint) {
555 if (is_power_of_2(iconst)) {
556 use_constant = true;
557 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
558 use_constant = true;
559 use_tmp = true;
560 }
561 }
562 }
563 if (use_constant) {
564 right_arg->dont_load_item();
565 } else {
566 right_arg->load_item();
567 }
568 LIR_Opr tmp = LIR_OprFact::illegalOpr;
569 if (use_tmp) {
570 tmp = new_register(T_INT);
571 }
572 rlock_result(x);
573
574 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
575 } else {
576 right_arg->dont_load_item();
577 rlock_result(x);
578 LIR_Opr tmp = LIR_OprFact::illegalOpr;
579 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
580 }
581 }
582 }
583
584
585 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
586 // when an operand with use count 1 is the left operand, then it is
587 // likely that no move for 2-operand-LIR-form is necessary
588 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
589 x->swap_operands();
590 }
591
592 ValueTag tag = x->type()->tag();
593 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
594 switch (tag) {
595 case floatTag:
596 case doubleTag: do_ArithmeticOp_FPU(x); return;
597 case longTag: do_ArithmeticOp_Long(x); return;
598 case intTag: do_ArithmeticOp_Int(x); return;
599 default: ShouldNotReachHere(); return;
600 }
601 }
602
603
604 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
605 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
606 // count must always be in rcx
607 LIRItem value(x->x(), this);
608 LIRItem count(x->y(), this);
609
610 ValueTag elemType = x->type()->tag();
611 bool must_load_count = !count.is_constant() || elemType == longTag;
612 if (must_load_count) {
613 // count for long must be in register
614 count.load_item_force(shiftCountOpr());
615 } else {
616 count.dont_load_item();
617 }
618 value.load_item();
619 LIR_Opr reg = rlock_result(x);
620
621 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
622 }
623
624
625 // _iand, _land, _ior, _lor, _ixor, _lxor
626 void LIRGenerator::do_LogicOp(LogicOp* x) {
627 // when an operand with use count 1 is the left operand, then it is
628 // likely that no move for 2-operand-LIR-form is necessary
629 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
630 x->swap_operands();
631 }
632
633 LIRItem left(x->x(), this);
634 LIRItem right(x->y(), this);
635
636 left.load_item();
637 right.load_nonconstant();
638 LIR_Opr reg = rlock_result(x);
639
640 logic_op(x->op(), reg, left.result(), right.result());
641 }
642
643
644
645 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
646 void LIRGenerator::do_CompareOp(CompareOp* x) {
647 LIRItem left(x->x(), this);
648 LIRItem right(x->y(), this);
649 ValueTag tag = x->x()->type()->tag();
650 if (tag == longTag) {
651 left.set_destroys_register();
652 }
653 left.load_item();
654 right.load_item();
655 LIR_Opr reg = rlock_result(x);
656
657 if (x->x()->type()->is_float_kind()) {
658 Bytecodes::Code code = x->op();
659 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
660 } else if (x->x()->type()->tag() == longTag) {
661 __ lcmp2int(left.result(), right.result(), reg);
662 } else {
663 Unimplemented();
664 }
665 }
666
667 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
668 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
669 if (is_reference_type(type)) {
670 cmp_value.load_item_force(FrameMap::rax_oop_opr);
671 new_value.load_item();
672 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
673 } else if (type == T_INT) {
674 cmp_value.load_item_force(FrameMap::rax_opr);
675 new_value.load_item();
676 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
677 } else if (type == T_LONG) {
678 cmp_value.load_item_force(FrameMap::long0_opr);
679 new_value.load_item_force(FrameMap::long1_opr);
680 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
681 } else {
682 Unimplemented();
683 }
684 LIR_Opr result = new_register(T_INT);
685 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
686 result, T_INT);
687 return result;
688 }
689
690 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
691 bool is_oop = is_reference_type(type);
692 LIR_Opr result = new_register(type);
693 value.load_item();
694 // Because we want a 2-arg form of xchg and xadd
695 __ move(value.result(), result);
696 assert(type == T_INT || is_oop || type == T_LONG, "unexpected type");
697 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
698 return result;
699 }
700
701 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
702 LIR_Opr result = new_register(type);
703 value.load_item();
704 // Because we want a 2-arg form of xchg and xadd
705 __ move(value.result(), result);
706 assert(type == T_INT || type == T_LONG, "unexpected type");
707 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
708 return result;
709 }
710
711 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
712 assert(x->number_of_arguments() == 3, "wrong type");
713 assert(UseFMA, "Needs FMA instructions support.");
714 LIRItem value(x->argument_at(0), this);
715 LIRItem value1(x->argument_at(1), this);
716 LIRItem value2(x->argument_at(2), this);
717
718 value2.set_destroys_register();
719
720 value.load_item();
721 value1.load_item();
722 value2.load_item();
723
724 LIR_Opr calc_input = value.result();
725 LIR_Opr calc_input1 = value1.result();
726 LIR_Opr calc_input2 = value2.result();
727 LIR_Opr calc_result = rlock_result(x);
728
729 switch (x->id()) {
730 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
731 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
732 default: ShouldNotReachHere();
733 }
734
735 }
736
737
738 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
739 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
740
741 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
742 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
743 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
744 x->id() == vmIntrinsics::_dlog10 || x->id() == vmIntrinsics::_dsinh ||
745 x->id() == vmIntrinsics::_dtanh || x->id() == vmIntrinsics::_dcbrt
746 ) {
747 do_LibmIntrinsic(x);
748 return;
749 }
750
751 LIRItem value(x->argument_at(0), this);
752
753 value.load_item();
754
755 LIR_Opr calc_input = value.result();
756 LIR_Opr calc_result = rlock_result(x);
757
758 LIR_Opr tmp = LIR_OprFact::illegalOpr;
759 if (x->id() == vmIntrinsics::_floatToFloat16) {
760 tmp = new_register(T_FLOAT);
761 }
762
763 switch(x->id()) {
764 case vmIntrinsics::_dabs:
765 __ abs(calc_input, calc_result, tmp);
766 break;
767 case vmIntrinsics::_dsqrt:
768 case vmIntrinsics::_dsqrt_strict:
769 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
770 break;
771 case vmIntrinsics::_floatToFloat16:
772 __ f2hf(calc_input, calc_result, tmp);
773 break;
774 case vmIntrinsics::_float16ToFloat:
775 __ hf2f(calc_input, calc_result, LIR_OprFact::illegalOpr);
776 break;
777 default:
778 ShouldNotReachHere();
779 }
780 }
781
782 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
783 LIRItem value(x->argument_at(0), this);
784 value.set_destroys_register();
785
786 LIR_Opr calc_result = rlock_result(x);
787 LIR_Opr result_reg = result_register_for(x->type());
788
789 CallingConvention* cc = nullptr;
790
791 if (x->id() == vmIntrinsics::_dpow) {
792 LIRItem value1(x->argument_at(1), this);
793
794 value1.set_destroys_register();
795
796 BasicTypeList signature(2);
797 signature.append(T_DOUBLE);
798 signature.append(T_DOUBLE);
799 cc = frame_map()->c_calling_convention(&signature);
800 value.load_item_force(cc->at(0));
801 value1.load_item_force(cc->at(1));
802 } else {
803 BasicTypeList signature(1);
804 signature.append(T_DOUBLE);
805 cc = frame_map()->c_calling_convention(&signature);
806 value.load_item_force(cc->at(0));
807 }
808
809 switch (x->id()) {
810 case vmIntrinsics::_dexp:
811 if (StubRoutines::dexp() != nullptr) {
812 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
813 } else {
814 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
815 }
816 break;
817 case vmIntrinsics::_dlog:
818 if (StubRoutines::dlog() != nullptr) {
819 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
820 } else {
821 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
822 }
823 break;
824 case vmIntrinsics::_dlog10:
825 if (StubRoutines::dlog10() != nullptr) {
826 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
827 } else {
828 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
829 }
830 break;
831 case vmIntrinsics::_dpow:
832 if (StubRoutines::dpow() != nullptr) {
833 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
834 } else {
835 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
836 }
837 break;
838 case vmIntrinsics::_dsin:
839 if (StubRoutines::dsin() != nullptr) {
840 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
841 } else {
842 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
843 }
844 break;
845 case vmIntrinsics::_dcos:
846 if (StubRoutines::dcos() != nullptr) {
847 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
848 } else {
849 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
850 }
851 break;
852 case vmIntrinsics::_dtan:
853 if (StubRoutines::dtan() != nullptr) {
854 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
855 } else {
856 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
857 }
858 break;
859 case vmIntrinsics::_dsinh:
860 assert(StubRoutines::dsinh() != nullptr, "sinh intrinsic not found");
861 if (StubRoutines::dsinh() != nullptr) {
862 __ call_runtime_leaf(StubRoutines::dsinh(), getThreadTemp(), result_reg, cc->args());
863 }
864 break;
865 case vmIntrinsics::_dtanh:
866 assert(StubRoutines::dtanh() != nullptr, "tanh intrinsic not found");
867 if (StubRoutines::dtanh() != nullptr) {
868 __ call_runtime_leaf(StubRoutines::dtanh(), getThreadTemp(), result_reg, cc->args());
869 }
870 break;
871 case vmIntrinsics::_dcbrt:
872 assert(StubRoutines::dcbrt() != nullptr, "cbrt intrinsic not found");
873 if (StubRoutines::dcbrt() != nullptr) {
874 __ call_runtime_leaf(StubRoutines::dcbrt(), getThreadTemp(), result_reg, cc->args());
875 }
876 break;
877 default: ShouldNotReachHere();
878 }
879
880 __ move(result_reg, calc_result);
881 }
882
883 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
884 assert(x->number_of_arguments() == 5, "wrong type");
885
886 // Make all state_for calls early since they can emit code
887 CodeEmitInfo* info = nullptr;
888 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
889 info = state_for(x, x->state_before());
890 info->set_force_reexecute();
891 } else {
892 info = state_for(x, x->state());
893 }
894
895 LIRItem src(x->argument_at(0), this);
896 LIRItem src_pos(x->argument_at(1), this);
897 LIRItem dst(x->argument_at(2), this);
898 LIRItem dst_pos(x->argument_at(3), this);
899 LIRItem length(x->argument_at(4), this);
900
901 // operands for arraycopy must use fixed registers, otherwise
902 // LinearScan will fail allocation (because arraycopy always needs a
903 // call)
904
905 int flags;
906 ciArrayKlass* expected_type;
907 arraycopy_helper(x, &flags, &expected_type);
908 if (x->check_flag(Instruction::OmitChecksFlag)) {
909 flags = 0;
910 }
911
912 // The java calling convention will give us enough registers
913 // so that on the stub side the args will be perfect already.
914 // On the other slow/special case side we call C and the arg
915 // positions are not similar enough to pick one as the best.
916 // Also because the java calling convention is a "shifted" version
917 // of the C convention we can process the java args trivially into C
918 // args without worry of overwriting during the xfer
919
920 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
921 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
922 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
923 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
924 length.load_item_force (FrameMap::as_opr(j_rarg4));
925
926 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
927
928 set_no_result(x);
929
930 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
931 }
932
933 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
934 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions support");
935 // Make all state_for calls early since they can emit code
936 LIR_Opr result = rlock_result(x);
937 int flags = 0;
938 switch (x->id()) {
939 case vmIntrinsics::_updateCRC32: {
940 LIRItem crc(x->argument_at(0), this);
941 LIRItem val(x->argument_at(1), this);
942 // val is destroyed by update_crc32
943 val.set_destroys_register();
944 crc.load_item();
945 val.load_item();
946 __ update_crc32(crc.result(), val.result(), result);
947 break;
948 }
949 case vmIntrinsics::_updateBytesCRC32:
950 case vmIntrinsics::_updateByteBufferCRC32: {
951 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
952
953 LIRItem crc(x->argument_at(0), this);
954 LIRItem buf(x->argument_at(1), this);
955 LIRItem off(x->argument_at(2), this);
956 LIRItem len(x->argument_at(3), this);
957 buf.load_item();
958 off.load_nonconstant();
959
960 LIR_Opr index = off.result();
961 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
962 if(off.result()->is_constant()) {
963 index = LIR_OprFact::illegalOpr;
964 offset += off.result()->as_jint();
965 }
966 LIR_Opr base_op = buf.result();
967
968 if (index->is_valid()) {
969 LIR_Opr tmp = new_register(T_LONG);
970 __ convert(Bytecodes::_i2l, index, tmp);
971 index = tmp;
972 }
973
974 LIR_Address* a = new LIR_Address(base_op,
975 index,
976 offset,
977 T_BYTE);
978 BasicTypeList signature(3);
979 signature.append(T_INT);
980 signature.append(T_ADDRESS);
981 signature.append(T_INT);
982 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
983 const LIR_Opr result_reg = result_register_for(x->type());
984
985 LIR_Opr addr = new_register(T_ADDRESS);
986 __ leal(LIR_OprFact::address(a), addr);
987
988 crc.load_item_force(cc->at(0));
989 __ move(addr, cc->at(1));
990 len.load_item_force(cc->at(2));
991
992 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
993 __ move(result_reg, result);
994
995 break;
996 }
997 default: {
998 ShouldNotReachHere();
999 }
1000 }
1001 }
1002
1003 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1004 assert(UseCRC32CIntrinsics, "need AVX and CLMUL instructions support");
1005 LIR_Opr result = rlock_result(x);
1006
1007 switch (x->id()) {
1008 case vmIntrinsics::_updateBytesCRC32C:
1009 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1010 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1011
1012 LIRItem crc(x->argument_at(0), this);
1013 LIRItem buf(x->argument_at(1), this);
1014 LIRItem off(x->argument_at(2), this);
1015 LIRItem end(x->argument_at(3), this);
1016 buf.load_item();
1017 off.load_nonconstant();
1018 end.load_nonconstant();
1019
1020 // len = end - off
1021 LIR_Opr len = end.result();
1022 LIR_Opr tmpA = new_register(T_INT);
1023 LIR_Opr tmpB = new_register(T_INT);
1024 __ move(end.result(), tmpA);
1025 __ move(off.result(), tmpB);
1026 __ sub(tmpA, tmpB, tmpA);
1027 len = tmpA;
1028
1029 LIR_Opr index = off.result();
1030 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1031 if (off.result()->is_constant()) {
1032 index = LIR_OprFact::illegalOpr;
1033 offset += off.result()->as_jint();
1034 }
1035 LIR_Opr base_op = buf.result();
1036 LIR_Address* a = nullptr;
1037
1038 if (index->is_valid()) {
1039 LIR_Opr tmp = new_register(T_LONG);
1040 __ convert(Bytecodes::_i2l, index, tmp);
1041 index = tmp;
1042 a = new LIR_Address(base_op, index, offset, T_BYTE);
1043 } else {
1044 a = new LIR_Address(base_op, offset, T_BYTE);
1045 }
1046
1047 BasicTypeList signature(3);
1048 signature.append(T_INT);
1049 signature.append(T_ADDRESS);
1050 signature.append(T_INT);
1051 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1052 const LIR_Opr result_reg = result_register_for(x->type());
1053
1054 LIR_Opr arg1 = cc->at(0),
1055 arg2 = cc->at(1),
1056 arg3 = cc->at(2);
1057
1058 crc.load_item_force(arg1);
1059 __ leal(LIR_OprFact::address(a), arg2);
1060 __ move(len, arg3);
1061
1062 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args());
1063 __ move(result_reg, result);
1064 break;
1065 }
1066 default: {
1067 ShouldNotReachHere();
1068 }
1069 }
1070 }
1071
1072 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1073 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1074
1075 // Make all state_for calls early since they can emit code
1076 LIR_Opr result = rlock_result(x);
1077
1078 LIRItem a(x->argument_at(0), this); // Object
1079 LIRItem aOffset(x->argument_at(1), this); // long
1080 LIRItem b(x->argument_at(2), this); // Object
1081 LIRItem bOffset(x->argument_at(3), this); // long
1082 LIRItem length(x->argument_at(4), this); // int
1083 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1084
1085 a.load_item();
1086 aOffset.load_nonconstant();
1087 b.load_item();
1088 bOffset.load_nonconstant();
1089
1090 long constant_aOffset = 0;
1091 LIR_Opr result_aOffset = aOffset.result();
1092 if (result_aOffset->is_constant()) {
1093 constant_aOffset = result_aOffset->as_jlong();
1094 result_aOffset = LIR_OprFact::illegalOpr;
1095 }
1096 LIR_Opr result_a = a.result();
1097
1098 long constant_bOffset = 0;
1099 LIR_Opr result_bOffset = bOffset.result();
1100 if (result_bOffset->is_constant()) {
1101 constant_bOffset = result_bOffset->as_jlong();
1102 result_bOffset = LIR_OprFact::illegalOpr;
1103 }
1104 LIR_Opr result_b = b.result();
1105
1106 LIR_Address* addr_a = new LIR_Address(result_a,
1107 result_aOffset,
1108 constant_aOffset,
1109 T_BYTE);
1110
1111 LIR_Address* addr_b = new LIR_Address(result_b,
1112 result_bOffset,
1113 constant_bOffset,
1114 T_BYTE);
1115
1116 BasicTypeList signature(4);
1117 signature.append(T_ADDRESS);
1118 signature.append(T_ADDRESS);
1119 signature.append(T_INT);
1120 signature.append(T_INT);
1121 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1122 const LIR_Opr result_reg = result_register_for(x->type());
1123
1124 LIR_Opr ptr_addr_a = new_register(T_ADDRESS);
1125 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1126
1127 LIR_Opr ptr_addr_b = new_register(T_ADDRESS);
1128 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1129
1130 __ move(ptr_addr_a, cc->at(0));
1131 __ move(ptr_addr_b, cc->at(1));
1132 length.load_item_force(cc->at(2));
1133 log2ArrayIndexScale.load_item_force(cc->at(3));
1134
1135 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1136 __ move(result_reg, result);
1137 }
1138
1139 void LIRGenerator::do_Convert(Convert* x) {
1140 LIRItem value(x->value(), this);
1141 value.load_item();
1142 LIR_Opr input = value.result();
1143 LIR_Opr result = rlock(x);
1144 __ convert(x->op(), input, result);
1145 assert(result->is_virtual(), "result must be virtual register");
1146 set_result(x, result);
1147 }
1148
1149
1150 void LIRGenerator::do_NewInstance(NewInstance* x) {
1151 print_if_not_loaded(x);
1152
1153 CodeEmitInfo* info = state_for(x, x->needs_state_before() ? x->state_before() : x->state());
1154 LIR_Opr reg = result_register_for(x->type());
1155 new_instance(reg, x->klass(), x->is_unresolved(),
1156 !x->is_unresolved() && x->klass()->is_inlinetype(),
1157 FrameMap::rcx_oop_opr,
1158 FrameMap::rdi_oop_opr,
1159 FrameMap::rsi_oop_opr,
1160 LIR_OprFact::illegalOpr,
1161 FrameMap::rdx_metadata_opr, info);
1162 LIR_Opr result = rlock_result(x);
1163 __ move(reg, result);
1164 }
1165
1166 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1167 CodeEmitInfo* info = nullptr;
1168 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
1169 info = state_for(x, x->state_before());
1170 info->set_force_reexecute();
1171 } else {
1172 info = state_for(x, x->state());
1173 }
1174
1175 LIRItem length(x->length(), this);
1176 length.load_item_force(FrameMap::rbx_opr);
1177
1178 LIR_Opr reg = result_register_for(x->type());
1179 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1180 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1181 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1182 LIR_Opr tmp4 = reg;
1183 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1184 LIR_Opr len = length.result();
1185 BasicType elem_type = x->elt_type();
1186
1187 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1188
1189 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1190 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
1191
1192 LIR_Opr result = rlock_result(x);
1193 __ move(reg, result);
1194 }
1195
1196
1197 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1198 LIRItem length(x->length(), this);
1199 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1200 // and therefore provide the state before the parameters have been consumed
1201 CodeEmitInfo* patching_info = nullptr;
1202 if (!x->klass()->is_loaded() || PatchALot) {
1203 patching_info = state_for(x, x->state_before());
1204 }
1205
1206 CodeEmitInfo* info = state_for(x, x->state());
1207
1208 const LIR_Opr reg = result_register_for(x->type());
1209 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1210 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1211 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1212 LIR_Opr tmp4 = reg;
1213 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1214
1215 length.load_item_force(FrameMap::rbx_opr);
1216 LIR_Opr len = length.result();
1217
1218 ciKlass* obj = ciArrayKlass::make(x->klass(), false, true, true);
1219
1220 // TODO 8265122 Implement a fast path for this
1221 bool is_flat = obj->is_loaded() && obj->is_flat_array_klass();
1222 bool is_null_free = obj->is_loaded() && obj->as_array_klass()->is_elem_null_free();
1223
1224 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, is_null_free);
1225 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1226 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1227 }
1228 klass2reg_with_patching(klass_reg, obj, patching_info);
1229 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path, true, is_null_free || is_flat);
1230
1231 LIR_Opr result = rlock_result(x);
1232 __ move(reg, result);
1233 }
1234
1235
1236 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1237 Values* dims = x->dims();
1238 int i = dims->length();
1239 LIRItemList* items = new LIRItemList(i, i, nullptr);
1240 while (i-- > 0) {
1241 LIRItem* size = new LIRItem(dims->at(i), this);
1242 items->at_put(i, size);
1243 }
1244
1245 // Evaluate state_for early since it may emit code.
1246 CodeEmitInfo* patching_info = nullptr;
1247 if (!x->klass()->is_loaded() || PatchALot) {
1248 patching_info = state_for(x, x->state_before());
1249
1250 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1251 // clone all handlers (NOTE: Usually this is handled transparently
1252 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1253 // is done explicitly here because a stub isn't being used).
1254 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1255 }
1256 CodeEmitInfo* info = state_for(x, x->state());
1257
1258 i = dims->length();
1259 while (i-- > 0) {
1260 LIRItem* size = items->at(i);
1261 size->load_nonconstant();
1262
1263 store_stack_parameter(size->result(), in_ByteSize(i*4));
1264 }
1265
1266 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1267 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1268
1269 LIR_Opr rank = FrameMap::rbx_opr;
1270 __ move(LIR_OprFact::intConst(x->rank()), rank);
1271 LIR_Opr varargs = FrameMap::rcx_opr;
1272 __ move(FrameMap::rsp_opr, varargs);
1273 LIR_OprList* args = new LIR_OprList(3);
1274 args->append(klass_reg);
1275 args->append(rank);
1276 args->append(varargs);
1277 LIR_Opr reg = result_register_for(x->type());
1278 __ call_runtime(Runtime1::entry_for(StubId::c1_new_multi_array_id),
1279 LIR_OprFact::illegalOpr,
1280 reg, args, info);
1281
1282 LIR_Opr result = rlock_result(x);
1283 __ move(reg, result);
1284 }
1285
1286
1287 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1288 // nothing to do for now
1289 }
1290
1291
1292 void LIRGenerator::do_CheckCast(CheckCast* x) {
1293 LIRItem obj(x->obj(), this);
1294
1295 CodeEmitInfo* patching_info = nullptr;
1296 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1297 // must do this before locking the destination register as an oop register,
1298 // and before the obj is loaded (the latter is for deoptimization)
1299 patching_info = state_for(x, x->state_before());
1300 }
1301 obj.load_item();
1302
1303 // info for exceptions
1304 CodeEmitInfo* info_for_exception =
1305 (x->needs_exception_state() ? state_for(x) :
1306 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1307
1308 CodeStub* stub;
1309 if (x->is_incompatible_class_change_check()) {
1310 assert(patching_info == nullptr, "can't patch this");
1311 stub = new SimpleExceptionStub(StubId::c1_throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1312 } else if (x->is_invokespecial_receiver_check()) {
1313 assert(patching_info == nullptr, "can't patch this");
1314 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1315 } else {
1316 stub = new SimpleExceptionStub(StubId::c1_throw_class_cast_exception_id, obj.result(), info_for_exception);
1317 }
1318 LIR_Opr reg = rlock_result(x);
1319 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1320 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1321 tmp3 = new_register(objectType);
1322 }
1323 __ checkcast(reg, obj.result(), x->klass(),
1324 new_register(objectType), new_register(objectType), tmp3,
1325 x->direct_compare(), info_for_exception, patching_info, stub,
1326 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1327 }
1328
1329
1330 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1331 LIRItem obj(x->obj(), this);
1332
1333 // result and test object may not be in same register
1334 LIR_Opr reg = rlock_result(x);
1335 CodeEmitInfo* patching_info = nullptr;
1336 if ((!x->klass()->is_loaded() || PatchALot)) {
1337 // must do this before locking the destination register as an oop register
1338 patching_info = state_for(x, x->state_before());
1339 }
1340 obj.load_item();
1341 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1342 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1343 tmp3 = new_register(objectType);
1344 }
1345 __ instanceof(reg, obj.result(), x->klass(),
1346 new_register(objectType), new_register(objectType), tmp3,
1347 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1348 }
1349
1350 // Intrinsic for Class::isInstance
1351 address LIRGenerator::isInstance_entry() {
1352 return Runtime1::entry_for(StubId::c1_is_instance_of_id);
1353 }
1354
1355
1356 void LIRGenerator::do_If(If* x) {
1357 assert(x->number_of_sux() == 2, "inconsistency");
1358 ValueTag tag = x->x()->type()->tag();
1359 bool is_safepoint = x->is_safepoint();
1360
1361 If::Condition cond = x->cond();
1362
1363 LIRItem xitem(x->x(), this);
1364 LIRItem yitem(x->y(), this);
1365 LIRItem* xin = &xitem;
1366 LIRItem* yin = &yitem;
1367
1368 if (tag == longTag) {
1369 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1370 // mirror for other conditions
1371 if (cond == If::gtr || cond == If::leq) {
1372 cond = Instruction::mirror(cond);
1373 xin = &yitem;
1374 yin = &xitem;
1375 }
1376 xin->set_destroys_register();
1377 }
1378 xin->load_item();
1379 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1380 // inline long zero
1381 yin->dont_load_item();
1382 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) {
1383 // longs cannot handle constants at right side
1384 yin->load_item();
1385 } else {
1386 yin->dont_load_item();
1387 }
1388
1389 LIR_Opr left = xin->result();
1390 LIR_Opr right = yin->result();
1391
1392 set_no_result(x);
1393
1394 // add safepoint before generating condition code so it can be recomputed
1395 if (x->is_safepoint()) {
1396 // increment backedge counter if needed
1397 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1398 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1399 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1400 }
1401
1402 if (x->substitutability_check()) {
1403 substitutability_check(x, *xin, *yin);
1404 } else {
1405 __ cmp(lir_cond(cond), left, right);
1406 }
1407 // Generate branch profiling. Profiling code doesn't kill flags.
1408 profile_branch(x, cond);
1409 move_to_phi(x->state());
1410 if (x->x()->type()->is_float_kind()) {
1411 __ branch(lir_cond(cond), x->tsux(), x->usux());
1412 } else {
1413 __ branch(lir_cond(cond), x->tsux());
1414 }
1415 assert(x->default_sux() == x->fsux(), "wrong destination above");
1416 __ jump(x->default_sux());
1417 }
1418
1419
1420 LIR_Opr LIRGenerator::getThreadPointer() {
1421 return FrameMap::as_pointer_opr(r15_thread);
1422 }
1423
1424 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1425 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1426 LIR_OprList* args = new LIR_OprList();
1427 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1428 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1429 }
1430
1431
1432 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1433 CodeEmitInfo* info) {
1434 if (address->type() == T_LONG) {
1435 address = new LIR_Address(address->base(),
1436 address->index(), address->scale(),
1437 address->disp(), T_DOUBLE);
1438 // Transfer the value atomically by using FP moves. This means
1439 // the value has to be moved between CPU and FPU registers. It
1440 // always has to be moved through spill slot since there's no
1441 // quick way to pack the value into an SSE register.
1442 LIR_Opr temp_double = new_register(T_DOUBLE);
1443 LIR_Opr spill = new_register(T_LONG);
1444 set_vreg_flag(spill, must_start_in_memory);
1445 __ move(value, spill);
1446 __ volatile_move(spill, temp_double, T_LONG);
1447 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1448 } else {
1449 __ store(value, address, info);
1450 }
1451 }
1452
1453 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1454 CodeEmitInfo* info) {
1455 if (address->type() == T_LONG) {
1456 address = new LIR_Address(address->base(),
1457 address->index(), address->scale(),
1458 address->disp(), T_DOUBLE);
1459 // Transfer the value atomically by using FP moves. This means
1460 // the value has to be moved between CPU and FPU registers. In
1461 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1462 // SSE2+ mode it can be moved directly.
1463 LIR_Opr temp_double = new_register(T_DOUBLE);
1464 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1465 __ volatile_move(temp_double, result, T_LONG);
1466 } else {
1467 __ load(address, result, info);
1468 }
1469 }