1 /*
2 * Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "ci/ciValueKlass.hpp"
37 #include "gc/shared/c1/barrierSetC1.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
97 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
98
99 case addressTag:
100 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
101 }
102
103 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
104 return opr;
105 }
106
107
108 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
109 LIR_Opr reg = new_register(T_INT);
110 set_vreg_flag(reg, LIRGenerator::byte_reg);
111 return reg;
112 }
113
114
115 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
116 // We just need one 32-bit temp register for x86/x64, to check whether both
117 // oops have markOopDesc::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck().
118 // @temp = %r10d
119 // mov $0x405, %r10d
120 // and (%left), %r10d /* if need to check left */
121 // and (%right), %r10d /* if need to check right */
122 // cmp $0x405, $r10d
123 // jne L_oops_not_equal
124 tmp1 = new_register(T_INT);
125 tmp2 = LIR_OprFact::illegalOpr;
126 }
127
128 //--------- loading items into registers --------------------------------
129
130
131 // i486 instructions can inline constants
132 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
133 if (type == T_SHORT || type == T_CHAR) {
134 // there is no immediate move of word values in asembler_i486.?pp
135 return false;
136 }
137 Constant* c = v->as_Constant();
138 if (c && c->state_before() == NULL) {
139 // constants of any type can be stored directly, except for
140 // unloaded object constants.
141 return true;
142 }
143 return false;
144 }
145
146
147 bool LIRGenerator::can_inline_as_constant(Value v) const {
148 if (v->type()->tag() == longTag) return false;
149 return v->type()->tag() != objectTag ||
150 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
151 }
152
153
154 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
155 if (c->type() == T_LONG) return false;
156 return c->type() != T_OBJECT || c->as_jobject() == NULL;
157 }
158
159
160 LIR_Opr LIRGenerator::safepoint_poll_register() {
161 NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
162 return LIR_OprFact::illegalOpr;
163 }
164
165
166 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
167 int shift, int disp, BasicType type) {
168 assert(base->is_register(), "must be");
169 if (index->is_constant()) {
170 LIR_Const *constant = index->as_constant_ptr();
171 #ifdef _LP64
172 jlong c;
173 if (constant->type() == T_INT) {
174 c = (jlong(index->as_jint()) << shift) + disp;
175 } else {
176 assert(constant->type() == T_LONG, "should be");
177 c = (index->as_jlong() << shift) + disp;
178 }
179 if ((jlong)((jint)c) == c) {
180 return new LIR_Address(base, (jint)c, type);
181 } else {
182 LIR_Opr tmp = new_register(T_LONG);
183 __ move(index, tmp);
184 return new LIR_Address(base, tmp, type);
185 }
186 #else
187 return new LIR_Address(base,
188 ((intx)(constant->as_jint()) << shift) + disp,
189 type);
190 #endif
191 } else {
192 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
193 }
194 }
195
196
197 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
198 BasicType type) {
199 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
200
201 LIR_Address* addr;
202 if (index_opr->is_constant()) {
203 int elem_size = type2aelembytes(type);
204 addr = new LIR_Address(array_opr,
205 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
206 } else {
207 #ifdef _LP64
208 if (index_opr->type() == T_INT) {
209 LIR_Opr tmp = new_register(T_LONG);
210 __ convert(Bytecodes::_i2l, index_opr, tmp);
211 index_opr = tmp;
212 }
213 #endif // _LP64
214 addr = new LIR_Address(array_opr,
215 index_opr,
216 LIR_Address::scale(type),
217 offset_in_bytes, type);
218 }
219 return addr;
220 }
221
222
223 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
224 LIR_Opr r = NULL;
225 if (type == T_LONG) {
226 r = LIR_OprFact::longConst(x);
227 } else if (type == T_INT) {
228 r = LIR_OprFact::intConst(x);
229 } else {
230 ShouldNotReachHere();
231 }
232 return r;
233 }
234
235 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
236 LIR_Opr pointer = new_pointer_register();
237 __ move(LIR_OprFact::intptrConst(counter), pointer);
238 LIR_Address* addr = new LIR_Address(pointer, type);
239 increment_counter(addr, step);
240 }
241
242
243 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
244 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
245 }
246
247 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
248 __ cmp_mem_int(condition, base, disp, c, info);
249 }
250
251
252 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
253 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
254 }
255
256
257 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
258 if (tmp->is_valid() && c > 0 && c < max_jint) {
259 if (is_power_of_2(c + 1)) {
260 __ move(left, tmp);
261 __ shift_left(left, log2_jint(c + 1), left);
262 __ sub(left, tmp, result);
263 return true;
264 } else if (is_power_of_2(c - 1)) {
265 __ move(left, tmp);
266 __ shift_left(left, log2_jint(c - 1), left);
267 __ add(left, tmp, result);
268 return true;
269 }
270 }
271 return false;
272 }
273
274
275 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
276 BasicType type = item->type();
277 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
278 }
279
280 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
281 LIR_Opr tmp1 = new_register(objectType);
282 LIR_Opr tmp2 = new_register(objectType);
283 LIR_Opr tmp3 = new_register(objectType);
284 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
285 }
286
287 //----------------------------------------------------------------------
288 // visitor functions
289 //----------------------------------------------------------------------
290
291 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
292 assert(x->is_pinned(),"");
293 LIRItem obj(x->obj(), this);
294 obj.load_item();
295
296 set_no_result(x);
297
298 // "lock" stores the address of the monitor stack slot, so this is not an oop
299 LIR_Opr lock = new_register(T_INT);
300 // Need a scratch register for biased locking on x86
301 LIR_Opr scratch = LIR_OprFact::illegalOpr;
302 if (UseBiasedLocking || x->maybe_valuetype()) {
303 scratch = new_register(T_INT);
304 }
305
306 CodeEmitInfo* info_for_exception = NULL;
307 if (x->needs_null_check()) {
308 info_for_exception = state_for(x);
309 }
310
311 CodeStub* throw_imse_stub = x->maybe_valuetype() ?
312 new SimpleExceptionStub(Runtime1::throw_illegal_monitor_state_exception_id,
313 LIR_OprFact::illegalOpr, state_for(x))
314 : NULL;
315
316 // this CodeEmitInfo must not have the xhandlers because here the
317 // object is already locked (xhandlers expect object to be unlocked)
318 CodeEmitInfo* info = state_for(x, x->state(), true);
319 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
320 x->monitor_no(), info_for_exception, info, throw_imse_stub);
321 }
322
323
324 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
325 assert(x->is_pinned(),"");
326
327 LIRItem obj(x->obj(), this);
328 obj.dont_load_item();
329
330 LIR_Opr lock = new_register(T_INT);
331 LIR_Opr obj_temp = new_register(T_INT);
332 set_no_result(x);
333 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
334 }
335
336
337 // _ineg, _lneg, _fneg, _dneg
338 void LIRGenerator::do_NegateOp(NegateOp* x) {
339 LIRItem value(x->x(), this);
340 value.set_destroys_register();
341 value.load_item();
342 LIR_Opr reg = rlock(x);
343
344 LIR_Opr tmp = LIR_OprFact::illegalOpr;
345 #ifdef _LP64
346 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
347 if (x->type()->tag() == doubleTag) {
348 tmp = new_register(T_DOUBLE);
349 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
350 }
351 else if (x->type()->tag() == floatTag) {
352 tmp = new_register(T_FLOAT);
353 __ move(LIR_OprFact::floatConst(-0.0), tmp);
354 }
355 }
356 #endif
357 __ negate(value.result(), reg, tmp);
358
359 set_result(x, round_item(reg));
360 }
361
362
363 // for _fadd, _fmul, _fsub, _fdiv, _frem
364 // _dadd, _dmul, _dsub, _ddiv, _drem
365 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
366 LIRItem left(x->x(), this);
367 LIRItem right(x->y(), this);
368 LIRItem* left_arg = &left;
369 LIRItem* right_arg = &right;
370 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
371 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
372 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
373 left.load_item();
374 } else {
375 left.dont_load_item();
376 }
377
378 // do not load right operand if it is a constant. only 0 and 1 are
379 // loaded because there are special instructions for loading them
380 // without memory access (not needed for SSE2 instructions)
381 bool must_load_right = false;
382 if (right.is_constant()) {
383 LIR_Const* c = right.result()->as_constant_ptr();
384 assert(c != NULL, "invalid constant");
385 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
386
387 if (c->type() == T_FLOAT) {
388 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
389 } else {
390 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
391 }
392 }
393
394 if (must_load_both) {
395 // frem and drem destroy also right operand, so move it to a new register
396 right.set_destroys_register();
397 right.load_item();
398 } else if (right.is_register() || must_load_right) {
399 right.load_item();
400 } else {
401 right.dont_load_item();
402 }
403 LIR_Opr reg = rlock(x);
404 LIR_Opr tmp = LIR_OprFact::illegalOpr;
405 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
406 tmp = new_register(T_DOUBLE);
407 }
408
409 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
410 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
411 LIR_Opr fpu0, fpu1;
412 if (x->op() == Bytecodes::_frem) {
413 fpu0 = LIR_OprFact::single_fpu(0);
414 fpu1 = LIR_OprFact::single_fpu(1);
415 } else {
416 fpu0 = LIR_OprFact::double_fpu(0);
417 fpu1 = LIR_OprFact::double_fpu(1);
418 }
419 __ move(right.result(), fpu1); // order of left and right operand is important!
420 __ move(left.result(), fpu0);
421 __ rem (fpu0, fpu1, fpu0);
422 __ move(fpu0, reg);
423
424 } else {
425 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
426 }
427
428 set_result(x, round_item(reg));
429 }
430
431
432 // for _ladd, _lmul, _lsub, _ldiv, _lrem
433 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
434 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
435 // long division is implemented as a direct call into the runtime
436 LIRItem left(x->x(), this);
437 LIRItem right(x->y(), this);
438
439 // the check for division by zero destroys the right operand
440 right.set_destroys_register();
441
442 BasicTypeList signature(2);
443 signature.append(T_LONG);
444 signature.append(T_LONG);
445 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
446
447 // check for division by zero (destroys registers of right operand!)
448 CodeEmitInfo* info = state_for(x);
449
450 const LIR_Opr result_reg = result_register_for(x->type());
451 left.load_item_force(cc->at(1));
452 right.load_item();
453
454 __ move(right.result(), cc->at(0));
455
456 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
457 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
458
459 address entry = NULL;
460 switch (x->op()) {
461 case Bytecodes::_lrem:
462 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
463 break; // check if dividend is 0 is done elsewhere
464 case Bytecodes::_ldiv:
465 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
466 break; // check if dividend is 0 is done elsewhere
467 case Bytecodes::_lmul:
468 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
469 break;
470 default:
471 ShouldNotReachHere();
472 }
473
474 LIR_Opr result = rlock_result(x);
475 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
476 __ move(result_reg, result);
477 } else if (x->op() == Bytecodes::_lmul) {
478 // missing test if instr is commutative and if we should swap
479 LIRItem left(x->x(), this);
480 LIRItem right(x->y(), this);
481
482 // right register is destroyed by the long mul, so it must be
483 // copied to a new register.
484 right.set_destroys_register();
485
486 left.load_item();
487 right.load_item();
488
489 LIR_Opr reg = FrameMap::long0_opr;
490 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
491 LIR_Opr result = rlock_result(x);
492 __ move(reg, result);
493 } else {
494 // missing test if instr is commutative and if we should swap
495 LIRItem left(x->x(), this);
496 LIRItem right(x->y(), this);
497
498 left.load_item();
499 // don't load constants to save register
500 right.load_nonconstant();
501 rlock_result(x);
502 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
503 }
504 }
505
506
507
508 // for: _iadd, _imul, _isub, _idiv, _irem
509 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
510 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
511 // The requirements for division and modulo
512 // input : rax,: dividend min_int
513 // reg: divisor (may not be rax,/rdx) -1
514 //
515 // output: rax,: quotient (= rax, idiv reg) min_int
516 // rdx: remainder (= rax, irem reg) 0
517
518 // rax, and rdx will be destroyed
519
520 // Note: does this invalidate the spec ???
521 LIRItem right(x->y(), this);
522 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
523
524 // call state_for before load_item_force because state_for may
525 // force the evaluation of other instructions that are needed for
526 // correct debug info. Otherwise the live range of the fix
527 // register might be too long.
528 CodeEmitInfo* info = state_for(x);
529
530 left.load_item_force(divInOpr());
531
532 right.load_item();
533
534 LIR_Opr result = rlock_result(x);
535 LIR_Opr result_reg;
536 if (x->op() == Bytecodes::_idiv) {
537 result_reg = divOutOpr();
538 } else {
539 result_reg = remOutOpr();
540 }
541
542 if (!ImplicitDiv0Checks) {
543 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
544 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
545 // Idiv/irem cannot trap (passing info would generate an assertion).
546 info = NULL;
547 }
548 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
549 if (x->op() == Bytecodes::_irem) {
550 __ irem(left.result(), right.result(), result_reg, tmp, info);
551 } else if (x->op() == Bytecodes::_idiv) {
552 __ idiv(left.result(), right.result(), result_reg, tmp, info);
553 } else {
554 ShouldNotReachHere();
555 }
556
557 __ move(result_reg, result);
558 } else {
559 // missing test if instr is commutative and if we should swap
560 LIRItem left(x->x(), this);
561 LIRItem right(x->y(), this);
562 LIRItem* left_arg = &left;
563 LIRItem* right_arg = &right;
564 if (x->is_commutative() && left.is_stack() && right.is_register()) {
565 // swap them if left is real stack (or cached) and right is real register(not cached)
566 left_arg = &right;
567 right_arg = &left;
568 }
569
570 left_arg->load_item();
571
572 // do not need to load right, as we can handle stack and constants
573 if (x->op() == Bytecodes::_imul ) {
574 // check if we can use shift instead
575 bool use_constant = false;
576 bool use_tmp = false;
577 if (right_arg->is_constant()) {
578 jint iconst = right_arg->get_jint_constant();
579 if (iconst > 0 && iconst < max_jint) {
580 if (is_power_of_2(iconst)) {
581 use_constant = true;
582 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
583 use_constant = true;
584 use_tmp = true;
585 }
586 }
587 }
588 if (use_constant) {
589 right_arg->dont_load_item();
590 } else {
591 right_arg->load_item();
592 }
593 LIR_Opr tmp = LIR_OprFact::illegalOpr;
594 if (use_tmp) {
595 tmp = new_register(T_INT);
596 }
597 rlock_result(x);
598
599 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
600 } else {
601 right_arg->dont_load_item();
602 rlock_result(x);
603 LIR_Opr tmp = LIR_OprFact::illegalOpr;
604 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
605 }
606 }
607 }
608
609
610 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
611 // when an operand with use count 1 is the left operand, then it is
612 // likely that no move for 2-operand-LIR-form is necessary
613 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
614 x->swap_operands();
615 }
616
617 ValueTag tag = x->type()->tag();
618 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
619 switch (tag) {
620 case floatTag:
621 case doubleTag: do_ArithmeticOp_FPU(x); return;
622 case longTag: do_ArithmeticOp_Long(x); return;
623 case intTag: do_ArithmeticOp_Int(x); return;
624 default: ShouldNotReachHere(); return;
625 }
626 }
627
628
629 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
630 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
631 // count must always be in rcx
632 LIRItem value(x->x(), this);
633 LIRItem count(x->y(), this);
634
635 ValueTag elemType = x->type()->tag();
636 bool must_load_count = !count.is_constant() || elemType == longTag;
637 if (must_load_count) {
638 // count for long must be in register
639 count.load_item_force(shiftCountOpr());
640 } else {
641 count.dont_load_item();
642 }
643 value.load_item();
644 LIR_Opr reg = rlock_result(x);
645
646 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
647 }
648
649
650 // _iand, _land, _ior, _lor, _ixor, _lxor
651 void LIRGenerator::do_LogicOp(LogicOp* x) {
652 // when an operand with use count 1 is the left operand, then it is
653 // likely that no move for 2-operand-LIR-form is necessary
654 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
655 x->swap_operands();
656 }
657
658 LIRItem left(x->x(), this);
659 LIRItem right(x->y(), this);
660
661 left.load_item();
662 right.load_nonconstant();
663 LIR_Opr reg = rlock_result(x);
664
665 logic_op(x->op(), reg, left.result(), right.result());
666 }
667
668
669
670 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
671 void LIRGenerator::do_CompareOp(CompareOp* x) {
672 LIRItem left(x->x(), this);
673 LIRItem right(x->y(), this);
674 ValueTag tag = x->x()->type()->tag();
675 if (tag == longTag) {
676 left.set_destroys_register();
677 }
678 left.load_item();
679 right.load_item();
680 LIR_Opr reg = rlock_result(x);
681
682 if (x->x()->type()->is_float_kind()) {
683 Bytecodes::Code code = x->op();
684 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
685 } else if (x->x()->type()->tag() == longTag) {
686 __ lcmp2int(left.result(), right.result(), reg);
687 } else {
688 Unimplemented();
689 }
690 }
691
692 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
693 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
694 if (type == T_OBJECT || type == T_ARRAY) {
695 cmp_value.load_item_force(FrameMap::rax_oop_opr);
696 new_value.load_item();
697 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
698 } else if (type == T_INT) {
699 cmp_value.load_item_force(FrameMap::rax_opr);
700 new_value.load_item();
701 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
702 } else if (type == T_LONG) {
703 cmp_value.load_item_force(FrameMap::long0_opr);
704 new_value.load_item_force(FrameMap::long1_opr);
705 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
706 } else {
707 Unimplemented();
708 }
709 LIR_Opr result = new_register(T_INT);
710 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
711 result, T_INT);
712 return result;
713 }
714
715 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
716 bool is_oop = type == T_OBJECT || type == T_ARRAY;
717 LIR_Opr result = new_register(type);
718 value.load_item();
719 // Because we want a 2-arg form of xchg and xadd
720 __ move(value.result(), result);
721 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
722 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
723 return result;
724 }
725
726 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
727 LIR_Opr result = new_register(type);
728 value.load_item();
729 // Because we want a 2-arg form of xchg and xadd
730 __ move(value.result(), result);
731 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
732 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
733 return result;
734 }
735
736 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
737 assert(x->number_of_arguments() == 3, "wrong type");
738 assert(UseFMA, "Needs FMA instructions support.");
739 LIRItem value(x->argument_at(0), this);
740 LIRItem value1(x->argument_at(1), this);
741 LIRItem value2(x->argument_at(2), this);
742
743 value2.set_destroys_register();
744
745 value.load_item();
746 value1.load_item();
747 value2.load_item();
748
749 LIR_Opr calc_input = value.result();
750 LIR_Opr calc_input1 = value1.result();
751 LIR_Opr calc_input2 = value2.result();
752 LIR_Opr calc_result = rlock_result(x);
753
754 switch (x->id()) {
755 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
756 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
757 default: ShouldNotReachHere();
758 }
759
760 }
761
762
763 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
764 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
765
766 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
767 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
768 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
769 x->id() == vmIntrinsics::_dlog10) {
770 do_LibmIntrinsic(x);
771 return;
772 }
773
774 LIRItem value(x->argument_at(0), this);
775
776 bool use_fpu = false;
777 if (UseSSE < 2) {
778 value.set_destroys_register();
779 }
780 value.load_item();
781
782 LIR_Opr calc_input = value.result();
783 LIR_Opr calc_result = rlock_result(x);
784
785 LIR_Opr tmp = LIR_OprFact::illegalOpr;
786 #ifdef _LP64
787 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
788 (x->id() == vmIntrinsics::_dabs)) {
789 tmp = new_register(T_DOUBLE);
790 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
791 }
792 #endif
793
794 switch(x->id()) {
795 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, tmp); break;
796 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
797 default: ShouldNotReachHere();
798 }
799
800 if (use_fpu) {
801 __ move(calc_result, x->operand());
802 }
803 }
804
805 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
806 LIRItem value(x->argument_at(0), this);
807 value.set_destroys_register();
808
809 LIR_Opr calc_result = rlock_result(x);
810 LIR_Opr result_reg = result_register_for(x->type());
811
812 CallingConvention* cc = NULL;
813
814 if (x->id() == vmIntrinsics::_dpow) {
815 LIRItem value1(x->argument_at(1), this);
816
817 value1.set_destroys_register();
818
819 BasicTypeList signature(2);
820 signature.append(T_DOUBLE);
821 signature.append(T_DOUBLE);
822 cc = frame_map()->c_calling_convention(&signature);
823 value.load_item_force(cc->at(0));
824 value1.load_item_force(cc->at(1));
825 } else {
826 BasicTypeList signature(1);
827 signature.append(T_DOUBLE);
828 cc = frame_map()->c_calling_convention(&signature);
829 value.load_item_force(cc->at(0));
830 }
831
832 #ifndef _LP64
833 LIR_Opr tmp = FrameMap::fpu0_double_opr;
834 result_reg = tmp;
835 switch(x->id()) {
836 case vmIntrinsics::_dexp:
837 if (StubRoutines::dexp() != NULL) {
838 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
839 } else {
840 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
841 }
842 break;
843 case vmIntrinsics::_dlog:
844 if (StubRoutines::dlog() != NULL) {
845 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
846 } else {
847 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
848 }
849 break;
850 case vmIntrinsics::_dlog10:
851 if (StubRoutines::dlog10() != NULL) {
852 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
853 } else {
854 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
855 }
856 break;
857 case vmIntrinsics::_dpow:
858 if (StubRoutines::dpow() != NULL) {
859 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
860 } else {
861 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
862 }
863 break;
864 case vmIntrinsics::_dsin:
865 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
866 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
867 } else {
868 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
869 }
870 break;
871 case vmIntrinsics::_dcos:
872 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
873 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
874 } else {
875 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
876 }
877 break;
878 case vmIntrinsics::_dtan:
879 if (StubRoutines::dtan() != NULL) {
880 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
881 } else {
882 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
883 }
884 break;
885 default: ShouldNotReachHere();
886 }
887 #else
888 switch (x->id()) {
889 case vmIntrinsics::_dexp:
890 if (StubRoutines::dexp() != NULL) {
891 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
892 } else {
893 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
894 }
895 break;
896 case vmIntrinsics::_dlog:
897 if (StubRoutines::dlog() != NULL) {
898 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
899 } else {
900 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
901 }
902 break;
903 case vmIntrinsics::_dlog10:
904 if (StubRoutines::dlog10() != NULL) {
905 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
906 } else {
907 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
908 }
909 break;
910 case vmIntrinsics::_dpow:
911 if (StubRoutines::dpow() != NULL) {
912 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
913 } else {
914 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
915 }
916 break;
917 case vmIntrinsics::_dsin:
918 if (StubRoutines::dsin() != NULL) {
919 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
920 } else {
921 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
922 }
923 break;
924 case vmIntrinsics::_dcos:
925 if (StubRoutines::dcos() != NULL) {
926 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
927 } else {
928 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
929 }
930 break;
931 case vmIntrinsics::_dtan:
932 if (StubRoutines::dtan() != NULL) {
933 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
934 } else {
935 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
936 }
937 break;
938 default: ShouldNotReachHere();
939 }
940 #endif // _LP64
941 __ move(result_reg, calc_result);
942 }
943
944 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
945 assert(x->number_of_arguments() == 5, "wrong type");
946
947 // Make all state_for calls early since they can emit code
948 CodeEmitInfo* info = state_for(x, x->state());
949
950 LIRItem src(x->argument_at(0), this);
951 LIRItem src_pos(x->argument_at(1), this);
952 LIRItem dst(x->argument_at(2), this);
953 LIRItem dst_pos(x->argument_at(3), this);
954 LIRItem length(x->argument_at(4), this);
955
956 // operands for arraycopy must use fixed registers, otherwise
957 // LinearScan will fail allocation (because arraycopy always needs a
958 // call)
959
960 #ifndef _LP64
961 src.load_item_force (FrameMap::rcx_oop_opr);
962 src_pos.load_item_force (FrameMap::rdx_opr);
963 dst.load_item_force (FrameMap::rax_oop_opr);
964 dst_pos.load_item_force (FrameMap::rbx_opr);
965 length.load_item_force (FrameMap::rdi_opr);
966 LIR_Opr tmp = (FrameMap::rsi_opr);
967 #else
968
969 // The java calling convention will give us enough registers
970 // so that on the stub side the args will be perfect already.
971 // On the other slow/special case side we call C and the arg
972 // positions are not similar enough to pick one as the best.
973 // Also because the java calling convention is a "shifted" version
974 // of the C convention we can process the java args trivially into C
975 // args without worry of overwriting during the xfer
976
977 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
978 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
979 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
980 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
981 length.load_item_force (FrameMap::as_opr(j_rarg4));
982
983 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
984 #endif // LP64
985
986 set_no_result(x);
987
988 int flags;
989 ciArrayKlass* expected_type;
990 arraycopy_helper(x, &flags, &expected_type);
991
992 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
993 }
994
995 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
996 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
997 // Make all state_for calls early since they can emit code
998 LIR_Opr result = rlock_result(x);
999 int flags = 0;
1000 switch (x->id()) {
1001 case vmIntrinsics::_updateCRC32: {
1002 LIRItem crc(x->argument_at(0), this);
1003 LIRItem val(x->argument_at(1), this);
1004 // val is destroyed by update_crc32
1005 val.set_destroys_register();
1006 crc.load_item();
1007 val.load_item();
1008 __ update_crc32(crc.result(), val.result(), result);
1009 break;
1010 }
1011 case vmIntrinsics::_updateBytesCRC32:
1012 case vmIntrinsics::_updateByteBufferCRC32: {
1013 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1014
1015 LIRItem crc(x->argument_at(0), this);
1016 LIRItem buf(x->argument_at(1), this);
1017 LIRItem off(x->argument_at(2), this);
1018 LIRItem len(x->argument_at(3), this);
1019 buf.load_item();
1020 off.load_nonconstant();
1021
1022 LIR_Opr index = off.result();
1023 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1024 if(off.result()->is_constant()) {
1025 index = LIR_OprFact::illegalOpr;
1026 offset += off.result()->as_jint();
1027 }
1028 LIR_Opr base_op = buf.result();
1029
1030 #ifndef _LP64
1031 if (!is_updateBytes) { // long b raw address
1032 base_op = new_register(T_INT);
1033 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1034 }
1035 #else
1036 if (index->is_valid()) {
1037 LIR_Opr tmp = new_register(T_LONG);
1038 __ convert(Bytecodes::_i2l, index, tmp);
1039 index = tmp;
1040 }
1041 #endif
1042
1043 if (is_updateBytes) {
1044 base_op = access_resolve(IS_NOT_NULL | ACCESS_READ, base_op);
1045 }
1046
1047 LIR_Address* a = new LIR_Address(base_op,
1048 index,
1049 offset,
1050 T_BYTE);
1051 BasicTypeList signature(3);
1052 signature.append(T_INT);
1053 signature.append(T_ADDRESS);
1054 signature.append(T_INT);
1055 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1056 const LIR_Opr result_reg = result_register_for(x->type());
1057
1058 LIR_Opr addr = new_pointer_register();
1059 __ leal(LIR_OprFact::address(a), addr);
1060
1061 crc.load_item_force(cc->at(0));
1062 __ move(addr, cc->at(1));
1063 len.load_item_force(cc->at(2));
1064
1065 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1066 __ move(result_reg, result);
1067
1068 break;
1069 }
1070 default: {
1071 ShouldNotReachHere();
1072 }
1073 }
1074 }
1075
1076 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1077 Unimplemented();
1078 }
1079
1080 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1081 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1082
1083 // Make all state_for calls early since they can emit code
1084 LIR_Opr result = rlock_result(x);
1085
1086 LIRItem a(x->argument_at(0), this); // Object
1087 LIRItem aOffset(x->argument_at(1), this); // long
1088 LIRItem b(x->argument_at(2), this); // Object
1089 LIRItem bOffset(x->argument_at(3), this); // long
1090 LIRItem length(x->argument_at(4), this); // int
1091 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1092
1093 a.load_item();
1094 aOffset.load_nonconstant();
1095 b.load_item();
1096 bOffset.load_nonconstant();
1097
1098 long constant_aOffset = 0;
1099 LIR_Opr result_aOffset = aOffset.result();
1100 if (result_aOffset->is_constant()) {
1101 constant_aOffset = result_aOffset->as_jlong();
1102 result_aOffset = LIR_OprFact::illegalOpr;
1103 }
1104 LIR_Opr result_a = access_resolve(ACCESS_READ, a.result());
1105
1106 long constant_bOffset = 0;
1107 LIR_Opr result_bOffset = bOffset.result();
1108 if (result_bOffset->is_constant()) {
1109 constant_bOffset = result_bOffset->as_jlong();
1110 result_bOffset = LIR_OprFact::illegalOpr;
1111 }
1112 LIR_Opr result_b = access_resolve(ACCESS_READ, b.result());
1113
1114 #ifndef _LP64
1115 result_a = new_register(T_INT);
1116 __ convert(Bytecodes::_l2i, a.result(), result_a);
1117 result_b = new_register(T_INT);
1118 __ convert(Bytecodes::_l2i, b.result(), result_b);
1119 #endif
1120
1121
1122 LIR_Address* addr_a = new LIR_Address(result_a,
1123 result_aOffset,
1124 constant_aOffset,
1125 T_BYTE);
1126
1127 LIR_Address* addr_b = new LIR_Address(result_b,
1128 result_bOffset,
1129 constant_bOffset,
1130 T_BYTE);
1131
1132 BasicTypeList signature(4);
1133 signature.append(T_ADDRESS);
1134 signature.append(T_ADDRESS);
1135 signature.append(T_INT);
1136 signature.append(T_INT);
1137 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1138 const LIR_Opr result_reg = result_register_for(x->type());
1139
1140 LIR_Opr ptr_addr_a = new_pointer_register();
1141 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1142
1143 LIR_Opr ptr_addr_b = new_pointer_register();
1144 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1145
1146 __ move(ptr_addr_a, cc->at(0));
1147 __ move(ptr_addr_b, cc->at(1));
1148 length.load_item_force(cc->at(2));
1149 log2ArrayIndexScale.load_item_force(cc->at(3));
1150
1151 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1152 __ move(result_reg, result);
1153 }
1154
1155 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1156 // _i2b, _i2c, _i2s
1157 LIR_Opr fixed_register_for(BasicType type) {
1158 switch (type) {
1159 case T_FLOAT: return FrameMap::fpu0_float_opr;
1160 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1161 case T_INT: return FrameMap::rax_opr;
1162 case T_LONG: return FrameMap::long0_opr;
1163 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1164 }
1165 }
1166
1167 void LIRGenerator::do_Convert(Convert* x) {
1168 // flags that vary for the different operations and different SSE-settings
1169 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1170
1171 switch (x->op()) {
1172 case Bytecodes::_i2l: // fall through
1173 case Bytecodes::_l2i: // fall through
1174 case Bytecodes::_i2b: // fall through
1175 case Bytecodes::_i2c: // fall through
1176 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1177
1178 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1179 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1180 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1181 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1182 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1183 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1184 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1185 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1186 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1187 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1188 default: ShouldNotReachHere();
1189 }
1190
1191 LIRItem value(x->value(), this);
1192 value.load_item();
1193 LIR_Opr input = value.result();
1194 LIR_Opr result = rlock(x);
1195
1196 // arguments of lir_convert
1197 LIR_Opr conv_input = input;
1198 LIR_Opr conv_result = result;
1199 ConversionStub* stub = NULL;
1200
1201 if (fixed_input) {
1202 conv_input = fixed_register_for(input->type());
1203 __ move(input, conv_input);
1204 }
1205
1206 assert(fixed_result == false || round_result == false, "cannot set both");
1207 if (fixed_result) {
1208 conv_result = fixed_register_for(result->type());
1209 } else if (round_result) {
1210 result = new_register(result->type());
1211 set_vreg_flag(result, must_start_in_memory);
1212 }
1213
1214 if (needs_stub) {
1215 stub = new ConversionStub(x->op(), conv_input, conv_result);
1216 }
1217
1218 __ convert(x->op(), conv_input, conv_result, stub);
1219
1220 if (result != conv_result) {
1221 __ move(conv_result, result);
1222 }
1223
1224 assert(result->is_virtual(), "result must be virtual register");
1225 set_result(x, result);
1226 }
1227
1228
1229 void LIRGenerator::do_NewInstance(NewInstance* x) {
1230 print_if_not_loaded(x);
1231
1232 CodeEmitInfo* info = state_for(x, x->state());
1233 LIR_Opr reg = result_register_for(x->type());
1234 new_instance(reg, x->klass(), x->is_unresolved(),
1235 FrameMap::rcx_oop_opr,
1236 FrameMap::rdi_oop_opr,
1237 FrameMap::rsi_oop_opr,
1238 LIR_OprFact::illegalOpr,
1239 FrameMap::rdx_metadata_opr, info);
1240 LIR_Opr result = rlock_result(x);
1241 __ move(reg, result);
1242 }
1243
1244 void LIRGenerator::do_NewValueTypeInstance (NewValueTypeInstance* x) {
1245 // Mapping to do_NewInstance (same code)
1246 CodeEmitInfo* info = state_for(x, x->state());
1247 x->set_to_object_type();
1248 LIR_Opr reg = result_register_for(x->type());
1249 new_instance(reg, x->klass(), x->is_unresolved(),
1250 FrameMap::rcx_oop_opr,
1251 FrameMap::rdi_oop_opr,
1252 FrameMap::rsi_oop_opr,
1253 LIR_OprFact::illegalOpr,
1254 FrameMap::rdx_metadata_opr, info);
1255 LIR_Opr result = rlock_result(x);
1256 __ move(reg, result);
1257
1258 }
1259
1260 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1261 CodeEmitInfo* info = state_for(x, x->state());
1262
1263 LIRItem length(x->length(), this);
1264 length.load_item_force(FrameMap::rbx_opr);
1265
1266 LIR_Opr reg = result_register_for(x->type());
1267 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1268 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1269 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1270 LIR_Opr tmp4 = reg;
1271 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1272 LIR_Opr len = length.result();
1273 BasicType elem_type = x->elt_type();
1274
1275 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1276
1277 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1278 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1279
1280 LIR_Opr result = rlock_result(x);
1281 __ move(reg, result);
1282 }
1283
1284
1285 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1286 LIRItem length(x->length(), this);
1287 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1288 // and therefore provide the state before the parameters have been consumed
1289 CodeEmitInfo* patching_info = NULL;
1290 if (!x->klass()->is_loaded() || PatchALot) {
1291 patching_info = state_for(x, x->state_before());
1292 }
1293
1294 CodeEmitInfo* info = state_for(x, x->state());
1295
1296 const LIR_Opr reg = result_register_for(x->type());
1297 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1298 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1299 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1300 LIR_Opr tmp4 = reg;
1301 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1302
1303 length.load_item_force(FrameMap::rbx_opr);
1304 LIR_Opr len = length.result();
1305
1306 ciKlass* obj = (ciKlass*) x->exact_type();
1307 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_never_null());
1308 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1309 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1310 }
1311 klass2reg_with_patching(klass_reg, obj, patching_info);
1312 if (x->is_never_null()) {
1313 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_VALUETYPE, klass_reg, slow_path);
1314 } else {
1315 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1316 }
1317
1318 LIR_Opr result = rlock_result(x);
1319 __ move(reg, result);
1320 }
1321
1322
1323 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1324 Values* dims = x->dims();
1325 int i = dims->length();
1326 LIRItemList* items = new LIRItemList(i, i, NULL);
1327 while (i-- > 0) {
1328 LIRItem* size = new LIRItem(dims->at(i), this);
1329 items->at_put(i, size);
1330 }
1331
1332 // Evaluate state_for early since it may emit code.
1333 CodeEmitInfo* patching_info = NULL;
1334 if (!x->klass()->is_loaded() || PatchALot) {
1335 patching_info = state_for(x, x->state_before());
1336
1337 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1338 // clone all handlers (NOTE: Usually this is handled transparently
1339 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1340 // is done explicitly here because a stub isn't being used).
1341 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1342 }
1343 CodeEmitInfo* info = state_for(x, x->state());
1344
1345 i = dims->length();
1346 while (i-- > 0) {
1347 LIRItem* size = items->at(i);
1348 size->load_nonconstant();
1349
1350 store_stack_parameter(size->result(), in_ByteSize(i*4));
1351 }
1352
1353 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1354 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1355
1356 LIR_Opr rank = FrameMap::rbx_opr;
1357 __ move(LIR_OprFact::intConst(x->rank()), rank);
1358 LIR_Opr varargs = FrameMap::rcx_opr;
1359 __ move(FrameMap::rsp_opr, varargs);
1360 LIR_OprList* args = new LIR_OprList(3);
1361 args->append(klass_reg);
1362 args->append(rank);
1363 args->append(varargs);
1364 LIR_Opr reg = result_register_for(x->type());
1365 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1366 LIR_OprFact::illegalOpr,
1367 reg, args, info);
1368
1369 LIR_Opr result = rlock_result(x);
1370 __ move(reg, result);
1371 }
1372
1373
1374 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1375 // nothing to do for now
1376 }
1377
1378
1379 void LIRGenerator::do_CheckCast(CheckCast* x) {
1380 LIRItem obj(x->obj(), this);
1381
1382 CodeEmitInfo* patching_info = NULL;
1383 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1384 // must do this before locking the destination register as an oop register,
1385 // and before the obj is loaded (the latter is for deoptimization)
1386 patching_info = state_for(x, x->state_before());
1387 }
1388 obj.load_item();
1389
1390 // info for exceptions
1391 CodeEmitInfo* info_for_exception =
1392 (x->needs_exception_state() ? state_for(x) :
1393 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1394
1395 if (x->is_never_null()) {
1396 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1397 }
1398
1399 CodeStub* stub;
1400 if (x->is_incompatible_class_change_check()) {
1401 assert(patching_info == NULL, "can't patch this");
1402 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1403 } else if (x->is_invokespecial_receiver_check()) {
1404 assert(patching_info == NULL, "can't patch this");
1405 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1406 } else {
1407 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1408 }
1409 LIR_Opr reg = rlock_result(x);
1410 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1411 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1412 tmp3 = new_register(objectType);
1413 }
1414 __ checkcast(reg, obj.result(), x->klass(),
1415 new_register(objectType), new_register(objectType), tmp3,
1416 x->direct_compare(), info_for_exception, patching_info, stub,
1417 x->profiled_method(), x->profiled_bci(), x->is_never_null());
1418 }
1419
1420
1421 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1422 LIRItem obj(x->obj(), this);
1423
1424 // result and test object may not be in same register
1425 LIR_Opr reg = rlock_result(x);
1426 CodeEmitInfo* patching_info = NULL;
1427 if ((!x->klass()->is_loaded() || PatchALot)) {
1428 // must do this before locking the destination register as an oop register
1429 patching_info = state_for(x, x->state_before());
1430 }
1431 obj.load_item();
1432 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1433 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1434 tmp3 = new_register(objectType);
1435 }
1436 __ instanceof(reg, obj.result(), x->klass(),
1437 new_register(objectType), new_register(objectType), tmp3,
1438 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1439 }
1440
1441
1442 void LIRGenerator::do_If(If* x) {
1443 assert(x->number_of_sux() == 2, "inconsistency");
1444 ValueTag tag = x->x()->type()->tag();
1445 bool is_safepoint = x->is_safepoint();
1446
1447 If::Condition cond = x->cond();
1448
1449 LIRItem xitem(x->x(), this);
1450 LIRItem yitem(x->y(), this);
1451 LIRItem* xin = &xitem;
1452 LIRItem* yin = &yitem;
1453
1454 if (tag == longTag) {
1455 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1456 // mirror for other conditions
1457 if (cond == If::gtr || cond == If::leq) {
1458 cond = Instruction::mirror(cond);
1459 xin = &yitem;
1460 yin = &xitem;
1461 }
1462 xin->set_destroys_register();
1463 }
1464 xin->load_item();
1465 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1466 // inline long zero
1467 yin->dont_load_item();
1468 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) {
1469 // longs cannot handle constants at right side
1470 yin->load_item();
1471 } else {
1472 yin->dont_load_item();
1473 }
1474
1475 LIR_Opr left = xin->result();
1476 LIR_Opr right = yin->result();
1477
1478 set_no_result(x);
1479
1480 // add safepoint before generating condition code so it can be recomputed
1481 if (x->is_safepoint()) {
1482 // increment backedge counter if needed
1483 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1484 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1485 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1486 }
1487
1488 if (x->substitutability_check()) {
1489 substitutability_check(x, *xin, *yin);
1490 } else {
1491 __ cmp(lir_cond(cond), left, right);
1492 }
1493 // Generate branch profiling. Profiling code doesn't kill flags.
1494 profile_branch(x, cond);
1495 move_to_phi(x->state());
1496 if (x->x()->type()->is_float_kind()) {
1497 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1498 } else {
1499 __ branch(lir_cond(cond), right->type(), x->tsux());
1500 }
1501 assert(x->default_sux() == x->fsux(), "wrong destination above");
1502 __ jump(x->default_sux());
1503 }
1504
1505
1506 LIR_Opr LIRGenerator::getThreadPointer() {
1507 #ifdef _LP64
1508 return FrameMap::as_pointer_opr(r15_thread);
1509 #else
1510 LIR_Opr result = new_register(T_INT);
1511 __ get_thread(result);
1512 return result;
1513 #endif //
1514 }
1515
1516 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1517 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1518 LIR_OprList* args = new LIR_OprList();
1519 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1520 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1521 }
1522
1523
1524 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1525 CodeEmitInfo* info) {
1526 if (address->type() == T_LONG) {
1527 address = new LIR_Address(address->base(),
1528 address->index(), address->scale(),
1529 address->disp(), T_DOUBLE);
1530 // Transfer the value atomically by using FP moves. This means
1531 // the value has to be moved between CPU and FPU registers. It
1532 // always has to be moved through spill slot since there's no
1533 // quick way to pack the value into an SSE register.
1534 LIR_Opr temp_double = new_register(T_DOUBLE);
1535 LIR_Opr spill = new_register(T_LONG);
1536 set_vreg_flag(spill, must_start_in_memory);
1537 __ move(value, spill);
1538 __ volatile_move(spill, temp_double, T_LONG);
1539 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1540 } else {
1541 __ store(value, address, info);
1542 }
1543 }
1544
1545 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1546 CodeEmitInfo* info) {
1547 if (address->type() == T_LONG) {
1548 address = new LIR_Address(address->base(),
1549 address->index(), address->scale(),
1550 address->disp(), T_DOUBLE);
1551 // Transfer the value atomically by using FP moves. This means
1552 // the value has to be moved between CPU and FPU registers. In
1553 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1554 // SSE2+ mode it can be moved directly.
1555 LIR_Opr temp_double = new_register(T_DOUBLE);
1556 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1557 __ volatile_move(temp_double, result, T_LONG);
1558 if (UseSSE < 2) {
1559 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1560 set_vreg_flag(result, must_start_in_memory);
1561 }
1562 } else {
1563 __ load(address, result, info);
1564 }
1565 }