1 /*
2 * Copyright (c) 2005, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "c1/c1_Compilation.hpp"
26 #include "c1/c1_FrameMap.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_LIRGenerator.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "ci/ciArray.hpp"
33 #include "ci/ciInlineKlass.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "gc/shared/c1/barrierSetC1.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/powerOfTwo.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 case floatTag: opr = FrameMap::xmm0_float_opr; break;
97 case doubleTag: opr = FrameMap::xmm0_double_opr; break;
98 case addressTag:
99 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
100 }
101
102 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
103 return opr;
104 }
105
106
107 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
108 LIR_Opr reg = new_register(T_INT);
109 set_vreg_flag(reg, LIRGenerator::byte_reg);
110 return reg;
111 }
112
113
114 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
115 // We just need one 32-bit temp register for x86/x64, to check whether both
116 // oops have markWord::always_locked_pattern. See LIR_Assembler::emit_opSubstitutabilityCheck().
117 // @temp = %r10d
118 // mov $0x405, %r10d
119 // and (%left), %r10d /* if need to check left */
120 // and (%right), %r10d /* if need to check right */
121 // cmp $0x405, $r10d
122 // jne L_oops_not_equal
123 tmp1 = new_register(T_INT);
124 tmp2 = LIR_OprFact::illegalOpr;
125 }
126
127 //--------- loading items into registers --------------------------------
128
129
130 // i486 instructions can inline constants
131 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
132 if (type == T_SHORT || type == T_CHAR) {
133 return false;
134 }
135 Constant* c = v->as_Constant();
136 if (c && c->state_before() == nullptr) {
137 // constants of any type can be stored directly, except for
138 // unloaded object constants.
139 return true;
140 }
141 return false;
142 }
143
144
145 bool LIRGenerator::can_inline_as_constant(Value v) const {
146 if (v->type()->tag() == longTag) return false;
147 return v->type()->tag() != objectTag ||
148 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
149 }
150
151
152 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
153 if (c->type() == T_LONG) return false;
154 return c->type() != T_OBJECT || c->as_jobject() == nullptr;
155 }
156
157
158 LIR_Opr LIRGenerator::safepoint_poll_register() {
159 NOT_LP64( return new_register(T_ADDRESS); )
160 return LIR_OprFact::illegalOpr;
161 }
162
163
164 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
165 int shift, int disp, BasicType type) {
166 assert(base->is_register(), "must be");
167 if (index->is_constant()) {
168 LIR_Const *constant = index->as_constant_ptr();
169 #ifdef _LP64
170 jlong c;
171 if (constant->type() == T_INT) {
172 c = (jlong(index->as_jint()) << shift) + disp;
173 } else {
174 assert(constant->type() == T_LONG, "should be");
175 c = (index->as_jlong() << shift) + disp;
176 }
177 if ((jlong)((jint)c) == c) {
178 return new LIR_Address(base, (jint)c, type);
179 } else {
180 LIR_Opr tmp = new_register(T_LONG);
181 __ move(index, tmp);
182 return new LIR_Address(base, tmp, type);
183 }
184 #else
185 return new LIR_Address(base,
186 ((intx)(constant->as_jint()) << shift) + disp,
187 type);
188 #endif
189 } else {
190 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
191 }
192 }
193
194
195 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
196 BasicType type) {
197 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
198
199 LIR_Address* addr;
200 if (index_opr->is_constant()) {
201 int elem_size = type2aelembytes(type);
202 #ifdef _LP64
203 jint index = index_opr->as_jint();
204 jlong disp = offset_in_bytes + (jlong)(index) * elem_size;
205 if (disp > max_jint) {
206 // Displacement overflow. Cannot directly use instruction with 32-bit displacement for 64-bit addresses.
207 // Convert array index to long to do array offset computation with 64-bit values.
208 index_opr = new_register(T_LONG);
209 __ move(LIR_OprFact::longConst(index), index_opr);
210 addr = new LIR_Address(array_opr, index_opr, LIR_Address::scale(type), offset_in_bytes, type);
211 } else {
212 addr = new LIR_Address(array_opr, (intx)disp, type);
213 }
214 #else
215 // A displacement overflow can also occur for x86 but that is not a problem due to the 32-bit address range!
216 // Let's assume an array 'a' and an access with displacement 'disp'. When disp overflows, then "a + disp" will
217 // always be negative (i.e. underflows the 32-bit address range):
218 // Let N = 2^32: a + signed_overflow(disp) = a + disp - N.
219 // "a + disp" is always smaller than N. If an index was chosen which would point to an address beyond N, then
220 // range checks would catch that and throw an exception. Thus, a + disp < 0 holds which means that it always
221 // underflows the 32-bit address range:
222 // unsigned_underflow(a + signed_overflow(disp)) = unsigned_underflow(a + disp - N)
223 // = (a + disp - N) + N = a + disp
224 // This shows that we still end up at the correct address with a displacement overflow due to the 32-bit address
225 // range limitation. This overflow only needs to be handled if addresses can be larger as on 64-bit platforms.
226 addr = new LIR_Address(array_opr, offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
227 #endif // _LP64
228 } else {
229 #ifdef _LP64
230 if (index_opr->type() == T_INT) {
231 LIR_Opr tmp = new_register(T_LONG);
232 __ convert(Bytecodes::_i2l, index_opr, tmp);
233 index_opr = tmp;
234 }
235 #endif // _LP64
236 addr = new LIR_Address(array_opr,
237 index_opr,
238 LIR_Address::scale(type),
239 offset_in_bytes, type);
240 }
241 return addr;
242 }
243
244
245 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
246 LIR_Opr r;
247 if (type == T_LONG) {
248 r = LIR_OprFact::longConst(x);
249 } else if (type == T_INT) {
250 r = LIR_OprFact::intConst(checked_cast<jint>(x));
251 } else {
252 ShouldNotReachHere();
253 }
254 return r;
255 }
256
257 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
258 LIR_Opr pointer = new_pointer_register();
259 __ move(LIR_OprFact::intptrConst(counter), pointer);
260 LIR_Address* addr = new LIR_Address(pointer, type);
261 increment_counter(addr, step);
262 }
263
264
265 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
266 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
267 }
268
269 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
270 __ cmp_mem_int(condition, base, disp, c, info);
271 }
272
273
274 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
275 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
276 }
277
278
279 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
280 if (tmp->is_valid() && c > 0 && c < max_jint) {
281 if (is_power_of_2(c + 1)) {
282 __ move(left, tmp);
283 __ shift_left(left, log2i_exact(c + 1), left);
284 __ sub(left, tmp, result);
285 return true;
286 } else if (is_power_of_2(c - 1)) {
287 __ move(left, tmp);
288 __ shift_left(left, log2i_exact(c - 1), left);
289 __ add(left, tmp, result);
290 return true;
291 }
292 }
293 return false;
294 }
295
296
297 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
298 BasicType type = item->type();
299 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
300 }
301
302 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
303 LIR_Opr tmp1 = new_register(objectType);
304 LIR_Opr tmp2 = new_register(objectType);
305 LIR_Opr tmp3 = new_register(objectType);
306 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
307 }
308
309 //----------------------------------------------------------------------
310 // visitor functions
311 //----------------------------------------------------------------------
312
313 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
314 assert(x->is_pinned(),"");
315 LIRItem obj(x->obj(), this);
316 obj.load_item();
317
318 set_no_result(x);
319
320 // "lock" stores the address of the monitor stack slot, so this is not an oop
321 LIR_Opr lock = new_register(T_INT);
322 // Need a scratch register for inline types on x86
323 LIR_Opr scratch = LIR_OprFact::illegalOpr;
324 if ((LockingMode == LM_LIGHTWEIGHT) ||
325 (EnableValhalla && x->maybe_inlinetype())) {
326 scratch = new_register(T_ADDRESS);
327 }
328
329 CodeEmitInfo* info_for_exception = nullptr;
330 if (x->needs_null_check()) {
331 info_for_exception = state_for(x);
332 }
333
334 CodeStub* throw_ie_stub = x->maybe_inlinetype() ?
335 new SimpleExceptionStub(C1StubId::throw_identity_exception_id,
336 obj.result(), state_for(x))
337 : nullptr;
338
339 // this CodeEmitInfo must not have the xhandlers because here the
340 // object is already locked (xhandlers expect object to be unlocked)
341 CodeEmitInfo* info = state_for(x, x->state(), true);
342 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
343 x->monitor_no(), info_for_exception, info, throw_ie_stub);
344 }
345
346
347 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
348 assert(x->is_pinned(),"");
349
350 LIRItem obj(x->obj(), this);
351 obj.dont_load_item();
352
353 LIR_Opr lock = new_register(T_INT);
354 LIR_Opr obj_temp = new_register(T_INT);
355 set_no_result(x);
356 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
357 }
358
359 // _ineg, _lneg, _fneg, _dneg
360 void LIRGenerator::do_NegateOp(NegateOp* x) {
361 LIRItem value(x->x(), this);
362 value.set_destroys_register();
363 value.load_item();
364 LIR_Opr reg = rlock(x);
365
366 __ negate(value.result(), reg);
367
368 set_result(x, reg);
369 }
370
371 // for _fadd, _fmul, _fsub, _fdiv, _frem
372 // _dadd, _dmul, _dsub, _ddiv, _drem
373 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
374 LIRItem left(x->x(), this);
375 LIRItem right(x->y(), this);
376 LIRItem* left_arg = &left;
377 LIRItem* right_arg = &right;
378 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
379 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
380 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
381 left.load_item();
382 } else {
383 left.dont_load_item();
384 }
385
386 #ifndef _LP64
387 // do not load right operand if it is a constant. only 0 and 1 are
388 // loaded because there are special instructions for loading them
389 // without memory access (not needed for SSE2 instructions)
390 bool must_load_right = false;
391 if (right.is_constant()) {
392 LIR_Const* c = right.result()->as_constant_ptr();
393 assert(c != nullptr, "invalid constant");
394 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
395
396 if (c->type() == T_FLOAT) {
397 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
398 } else {
399 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
400 }
401 }
402 #endif // !LP64
403
404 if (must_load_both) {
405 // frem and drem destroy also right operand, so move it to a new register
406 right.set_destroys_register();
407 right.load_item();
408 } else if (right.is_register()) {
409 right.load_item();
410 #ifndef _LP64
411 } else if (must_load_right) {
412 right.load_item();
413 #endif // !LP64
414 } else {
415 right.dont_load_item();
416 }
417 LIR_Opr reg = rlock(x);
418 LIR_Opr tmp = LIR_OprFact::illegalOpr;
419 if (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv) {
420 tmp = new_register(T_DOUBLE);
421 }
422
423 #ifdef _LP64
424 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
425 // frem and drem are implemented as a direct call into the runtime.
426 LIRItem left(x->x(), this);
427 LIRItem right(x->y(), this);
428
429 BasicType bt = as_BasicType(x->type());
430 BasicTypeList signature(2);
431 signature.append(bt);
432 signature.append(bt);
433 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
434
435 const LIR_Opr result_reg = result_register_for(x->type());
436 left.load_item_force(cc->at(0));
437 right.load_item_force(cc->at(1));
438
439 address entry = nullptr;
440 switch (x->op()) {
441 case Bytecodes::_frem:
442 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
443 break;
444 case Bytecodes::_drem:
445 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
446 break;
447 default:
448 ShouldNotReachHere();
449 }
450
451 LIR_Opr result = rlock_result(x);
452 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
453 __ move(result_reg, result);
454 } else {
455 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
456 set_result(x, reg);
457 }
458 #else
459 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
460 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
461 LIR_Opr fpu0, fpu1;
462 if (x->op() == Bytecodes::_frem) {
463 fpu0 = LIR_OprFact::single_fpu(0);
464 fpu1 = LIR_OprFact::single_fpu(1);
465 } else {
466 fpu0 = LIR_OprFact::double_fpu(0);
467 fpu1 = LIR_OprFact::double_fpu(1);
468 }
469 __ move(right.result(), fpu1); // order of left and right operand is important!
470 __ move(left.result(), fpu0);
471 __ rem (fpu0, fpu1, fpu0);
472 __ move(fpu0, reg);
473
474 } else {
475 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), tmp);
476 }
477 set_result(x, reg);
478 #endif // _LP64
479 }
480
481
482 // for _ladd, _lmul, _lsub, _ldiv, _lrem
483 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
484 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
485 // long division is implemented as a direct call into the runtime
486 LIRItem left(x->x(), this);
487 LIRItem right(x->y(), this);
488
489 // the check for division by zero destroys the right operand
490 right.set_destroys_register();
491
492 BasicTypeList signature(2);
493 signature.append(T_LONG);
494 signature.append(T_LONG);
495 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
496
497 // check for division by zero (destroys registers of right operand!)
498 CodeEmitInfo* info = state_for(x);
499
500 const LIR_Opr result_reg = result_register_for(x->type());
501 left.load_item_force(cc->at(1));
502 right.load_item();
503
504 __ move(right.result(), cc->at(0));
505
506 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
507 __ branch(lir_cond_equal, new DivByZeroStub(info));
508
509 address entry = nullptr;
510 switch (x->op()) {
511 case Bytecodes::_lrem:
512 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
513 break; // check if dividend is 0 is done elsewhere
514 case Bytecodes::_ldiv:
515 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
516 break; // check if dividend is 0 is done elsewhere
517 default:
518 ShouldNotReachHere();
519 }
520
521 LIR_Opr result = rlock_result(x);
522 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
523 __ move(result_reg, result);
524 } else if (x->op() == Bytecodes::_lmul) {
525 // missing test if instr is commutative and if we should swap
526 LIRItem left(x->x(), this);
527 LIRItem right(x->y(), this);
528
529 // right register is destroyed by the long mul, so it must be
530 // copied to a new register.
531 right.set_destroys_register();
532
533 left.load_item();
534 right.load_item();
535
536 LIR_Opr reg = FrameMap::long0_opr;
537 arithmetic_op_long(x->op(), reg, left.result(), right.result(), nullptr);
538 LIR_Opr result = rlock_result(x);
539 __ move(reg, result);
540 } else {
541 // missing test if instr is commutative and if we should swap
542 LIRItem left(x->x(), this);
543 LIRItem right(x->y(), this);
544
545 left.load_item();
546 // don't load constants to save register
547 right.load_nonconstant();
548 rlock_result(x);
549 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
550 }
551 }
552
553
554
555 // for: _iadd, _imul, _isub, _idiv, _irem
556 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
557 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
558 // The requirements for division and modulo
559 // input : rax,: dividend min_int
560 // reg: divisor (may not be rax,/rdx) -1
561 //
562 // output: rax,: quotient (= rax, idiv reg) min_int
563 // rdx: remainder (= rax, irem reg) 0
564
565 // rax, and rdx will be destroyed
566
567 // Note: does this invalidate the spec ???
568 LIRItem right(x->y(), this);
569 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
570
571 // call state_for before load_item_force because state_for may
572 // force the evaluation of other instructions that are needed for
573 // correct debug info. Otherwise the live range of the fix
574 // register might be too long.
575 CodeEmitInfo* info = state_for(x);
576
577 left.load_item_force(divInOpr());
578
579 right.load_item();
580
581 LIR_Opr result = rlock_result(x);
582 LIR_Opr result_reg;
583 if (x->op() == Bytecodes::_idiv) {
584 result_reg = divOutOpr();
585 } else {
586 result_reg = remOutOpr();
587 }
588
589 if (!ImplicitDiv0Checks) {
590 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
591 __ branch(lir_cond_equal, new DivByZeroStub(info));
592 // Idiv/irem cannot trap (passing info would generate an assertion).
593 info = nullptr;
594 }
595 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
596 if (x->op() == Bytecodes::_irem) {
597 __ irem(left.result(), right.result(), result_reg, tmp, info);
598 } else if (x->op() == Bytecodes::_idiv) {
599 __ idiv(left.result(), right.result(), result_reg, tmp, info);
600 } else {
601 ShouldNotReachHere();
602 }
603
604 __ move(result_reg, result);
605 } else {
606 // missing test if instr is commutative and if we should swap
607 LIRItem left(x->x(), this);
608 LIRItem right(x->y(), this);
609 LIRItem* left_arg = &left;
610 LIRItem* right_arg = &right;
611 if (x->is_commutative() && left.is_stack() && right.is_register()) {
612 // swap them if left is real stack (or cached) and right is real register(not cached)
613 left_arg = &right;
614 right_arg = &left;
615 }
616
617 left_arg->load_item();
618
619 // do not need to load right, as we can handle stack and constants
620 if (x->op() == Bytecodes::_imul ) {
621 // check if we can use shift instead
622 bool use_constant = false;
623 bool use_tmp = false;
624 if (right_arg->is_constant()) {
625 jint iconst = right_arg->get_jint_constant();
626 if (iconst > 0 && iconst < max_jint) {
627 if (is_power_of_2(iconst)) {
628 use_constant = true;
629 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
630 use_constant = true;
631 use_tmp = true;
632 }
633 }
634 }
635 if (use_constant) {
636 right_arg->dont_load_item();
637 } else {
638 right_arg->load_item();
639 }
640 LIR_Opr tmp = LIR_OprFact::illegalOpr;
641 if (use_tmp) {
642 tmp = new_register(T_INT);
643 }
644 rlock_result(x);
645
646 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
647 } else {
648 right_arg->dont_load_item();
649 rlock_result(x);
650 LIR_Opr tmp = LIR_OprFact::illegalOpr;
651 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
652 }
653 }
654 }
655
656
657 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
658 // when an operand with use count 1 is the left operand, then it is
659 // likely that no move for 2-operand-LIR-form is necessary
660 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
661 x->swap_operands();
662 }
663
664 ValueTag tag = x->type()->tag();
665 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
666 switch (tag) {
667 case floatTag:
668 case doubleTag: do_ArithmeticOp_FPU(x); return;
669 case longTag: do_ArithmeticOp_Long(x); return;
670 case intTag: do_ArithmeticOp_Int(x); return;
671 default: ShouldNotReachHere(); return;
672 }
673 }
674
675
676 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
677 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
678 // count must always be in rcx
679 LIRItem value(x->x(), this);
680 LIRItem count(x->y(), this);
681
682 ValueTag elemType = x->type()->tag();
683 bool must_load_count = !count.is_constant() || elemType == longTag;
684 if (must_load_count) {
685 // count for long must be in register
686 count.load_item_force(shiftCountOpr());
687 } else {
688 count.dont_load_item();
689 }
690 value.load_item();
691 LIR_Opr reg = rlock_result(x);
692
693 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
694 }
695
696
697 // _iand, _land, _ior, _lor, _ixor, _lxor
698 void LIRGenerator::do_LogicOp(LogicOp* x) {
699 // when an operand with use count 1 is the left operand, then it is
700 // likely that no move for 2-operand-LIR-form is necessary
701 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
702 x->swap_operands();
703 }
704
705 LIRItem left(x->x(), this);
706 LIRItem right(x->y(), this);
707
708 left.load_item();
709 right.load_nonconstant();
710 LIR_Opr reg = rlock_result(x);
711
712 logic_op(x->op(), reg, left.result(), right.result());
713 }
714
715
716
717 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
718 void LIRGenerator::do_CompareOp(CompareOp* x) {
719 LIRItem left(x->x(), this);
720 LIRItem right(x->y(), this);
721 ValueTag tag = x->x()->type()->tag();
722 if (tag == longTag) {
723 left.set_destroys_register();
724 }
725 left.load_item();
726 right.load_item();
727 LIR_Opr reg = rlock_result(x);
728
729 if (x->x()->type()->is_float_kind()) {
730 Bytecodes::Code code = x->op();
731 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
732 } else if (x->x()->type()->tag() == longTag) {
733 __ lcmp2int(left.result(), right.result(), reg);
734 } else {
735 Unimplemented();
736 }
737 }
738
739 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
740 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
741 if (is_reference_type(type)) {
742 cmp_value.load_item_force(FrameMap::rax_oop_opr);
743 new_value.load_item();
744 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
745 } else if (type == T_INT) {
746 cmp_value.load_item_force(FrameMap::rax_opr);
747 new_value.load_item();
748 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
749 } else if (type == T_LONG) {
750 cmp_value.load_item_force(FrameMap::long0_opr);
751 new_value.load_item_force(FrameMap::long1_opr);
752 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
753 } else {
754 Unimplemented();
755 }
756 LIR_Opr result = new_register(T_INT);
757 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
758 result, T_INT);
759 return result;
760 }
761
762 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
763 bool is_oop = is_reference_type(type);
764 LIR_Opr result = new_register(type);
765 value.load_item();
766 // Because we want a 2-arg form of xchg and xadd
767 __ move(value.result(), result);
768 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
769 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
770 return result;
771 }
772
773 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
774 LIR_Opr result = new_register(type);
775 value.load_item();
776 // Because we want a 2-arg form of xchg and xadd
777 __ move(value.result(), result);
778 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
779 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
780 return result;
781 }
782
783 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
784 assert(x->number_of_arguments() == 3, "wrong type");
785 assert(UseFMA, "Needs FMA instructions support.");
786 LIRItem value(x->argument_at(0), this);
787 LIRItem value1(x->argument_at(1), this);
788 LIRItem value2(x->argument_at(2), this);
789
790 value2.set_destroys_register();
791
792 value.load_item();
793 value1.load_item();
794 value2.load_item();
795
796 LIR_Opr calc_input = value.result();
797 LIR_Opr calc_input1 = value1.result();
798 LIR_Opr calc_input2 = value2.result();
799 LIR_Opr calc_result = rlock_result(x);
800
801 switch (x->id()) {
802 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
803 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
804 default: ShouldNotReachHere();
805 }
806
807 }
808
809
810 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
811 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
812
813 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
814 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
815 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
816 x->id() == vmIntrinsics::_dlog10
817 #ifdef _LP64
818 || x->id() == vmIntrinsics::_dtanh
819 #endif
820 ) {
821 do_LibmIntrinsic(x);
822 return;
823 }
824
825 LIRItem value(x->argument_at(0), this);
826
827 bool use_fpu = false;
828 #ifndef _LP64
829 if (UseSSE < 2) {
830 value.set_destroys_register();
831 }
832 #endif // !LP64
833 value.load_item();
834
835 LIR_Opr calc_input = value.result();
836 LIR_Opr calc_result = rlock_result(x);
837
838 LIR_Opr tmp = LIR_OprFact::illegalOpr;
839 if (x->id() == vmIntrinsics::_floatToFloat16) {
840 tmp = new_register(T_FLOAT);
841 }
842
843 switch(x->id()) {
844 case vmIntrinsics::_dabs:
845 __ abs(calc_input, calc_result, tmp);
846 break;
847 case vmIntrinsics::_dsqrt:
848 case vmIntrinsics::_dsqrt_strict:
849 __ sqrt(calc_input, calc_result, LIR_OprFact::illegalOpr);
850 break;
851 case vmIntrinsics::_floatToFloat16:
852 __ f2hf(calc_input, calc_result, tmp);
853 break;
854 case vmIntrinsics::_float16ToFloat:
855 __ hf2f(calc_input, calc_result, LIR_OprFact::illegalOpr);
856 break;
857 default:
858 ShouldNotReachHere();
859 }
860
861 if (use_fpu) {
862 __ move(calc_result, x->operand());
863 }
864 }
865
866 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
867 LIRItem value(x->argument_at(0), this);
868 value.set_destroys_register();
869
870 LIR_Opr calc_result = rlock_result(x);
871 LIR_Opr result_reg = result_register_for(x->type());
872
873 CallingConvention* cc = nullptr;
874
875 if (x->id() == vmIntrinsics::_dpow) {
876 LIRItem value1(x->argument_at(1), this);
877
878 value1.set_destroys_register();
879
880 BasicTypeList signature(2);
881 signature.append(T_DOUBLE);
882 signature.append(T_DOUBLE);
883 cc = frame_map()->c_calling_convention(&signature);
884 value.load_item_force(cc->at(0));
885 value1.load_item_force(cc->at(1));
886 } else {
887 BasicTypeList signature(1);
888 signature.append(T_DOUBLE);
889 cc = frame_map()->c_calling_convention(&signature);
890 value.load_item_force(cc->at(0));
891 }
892
893 switch (x->id()) {
894 case vmIntrinsics::_dexp:
895 if (StubRoutines::dexp() != nullptr) {
896 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
897 } else {
898 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
899 }
900 break;
901 case vmIntrinsics::_dlog:
902 if (StubRoutines::dlog() != nullptr) {
903 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
904 } else {
905 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
906 }
907 break;
908 case vmIntrinsics::_dlog10:
909 if (StubRoutines::dlog10() != nullptr) {
910 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
911 } else {
912 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
913 }
914 break;
915 case vmIntrinsics::_dpow:
916 if (StubRoutines::dpow() != nullptr) {
917 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
918 } else {
919 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
920 }
921 break;
922 case vmIntrinsics::_dsin:
923 if (StubRoutines::dsin() != nullptr) {
924 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
925 } else {
926 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
927 }
928 break;
929 case vmIntrinsics::_dcos:
930 if (StubRoutines::dcos() != nullptr) {
931 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
932 } else {
933 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
934 }
935 break;
936 case vmIntrinsics::_dtan:
937 if (StubRoutines::dtan() != nullptr) {
938 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
939 } else {
940 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
941 }
942 break;
943 case vmIntrinsics::_dtanh:
944 assert(StubRoutines::dtanh() != nullptr, "tanh intrinsic not found");
945 if (StubRoutines::dtanh() != nullptr) {
946 __ call_runtime_leaf(StubRoutines::dtanh(), getThreadTemp(), result_reg, cc->args());
947 }
948 break;
949 default: ShouldNotReachHere();
950 }
951
952 __ move(result_reg, calc_result);
953 }
954
955 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
956 assert(x->number_of_arguments() == 5, "wrong type");
957
958 // Make all state_for calls early since they can emit code
959 CodeEmitInfo* info = nullptr;
960 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
961 info = state_for(x, x->state_before());
962 info->set_force_reexecute();
963 } else {
964 info = state_for(x, x->state());
965 }
966
967 LIRItem src(x->argument_at(0), this);
968 LIRItem src_pos(x->argument_at(1), this);
969 LIRItem dst(x->argument_at(2), this);
970 LIRItem dst_pos(x->argument_at(3), this);
971 LIRItem length(x->argument_at(4), this);
972
973 // operands for arraycopy must use fixed registers, otherwise
974 // LinearScan will fail allocation (because arraycopy always needs a
975 // call)
976
977 int flags;
978 ciArrayKlass* expected_type;
979 arraycopy_helper(x, &flags, &expected_type);
980 if (x->check_flag(Instruction::OmitChecksFlag)) {
981 flags = 0;
982 }
983
984 #ifndef _LP64
985 src.load_item_force (FrameMap::rcx_oop_opr);
986 src_pos.load_item_force (FrameMap::rdx_opr);
987 dst.load_item_force (FrameMap::rax_oop_opr);
988 dst_pos.load_item_force (FrameMap::rbx_opr);
989 length.load_item_force (FrameMap::rdi_opr);
990 LIR_Opr tmp = (FrameMap::rsi_opr);
991
992 if (expected_type != nullptr && flags == 0) {
993 FrameMap* f = Compilation::current()->frame_map();
994 f->update_reserved_argument_area_size(3 * BytesPerWord);
995 }
996 #else
997
998 // The java calling convention will give us enough registers
999 // so that on the stub side the args will be perfect already.
1000 // On the other slow/special case side we call C and the arg
1001 // positions are not similar enough to pick one as the best.
1002 // Also because the java calling convention is a "shifted" version
1003 // of the C convention we can process the java args trivially into C
1004 // args without worry of overwriting during the xfer
1005
1006 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1007 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1008 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1009 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1010 length.load_item_force (FrameMap::as_opr(j_rarg4));
1011
1012 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1013 #endif // LP64
1014
1015 set_no_result(x);
1016
1017 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1018 }
1019
1020 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1021 assert(UseCRC32Intrinsics, "need AVX and CLMUL instructions support");
1022 // Make all state_for calls early since they can emit code
1023 LIR_Opr result = rlock_result(x);
1024 int flags = 0;
1025 switch (x->id()) {
1026 case vmIntrinsics::_updateCRC32: {
1027 LIRItem crc(x->argument_at(0), this);
1028 LIRItem val(x->argument_at(1), this);
1029 // val is destroyed by update_crc32
1030 val.set_destroys_register();
1031 crc.load_item();
1032 val.load_item();
1033 __ update_crc32(crc.result(), val.result(), result);
1034 break;
1035 }
1036 case vmIntrinsics::_updateBytesCRC32:
1037 case vmIntrinsics::_updateByteBufferCRC32: {
1038 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1039
1040 LIRItem crc(x->argument_at(0), this);
1041 LIRItem buf(x->argument_at(1), this);
1042 LIRItem off(x->argument_at(2), this);
1043 LIRItem len(x->argument_at(3), this);
1044 buf.load_item();
1045 off.load_nonconstant();
1046
1047 LIR_Opr index = off.result();
1048 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1049 if(off.result()->is_constant()) {
1050 index = LIR_OprFact::illegalOpr;
1051 offset += off.result()->as_jint();
1052 }
1053 LIR_Opr base_op = buf.result();
1054
1055 #ifndef _LP64
1056 if (!is_updateBytes) { // long b raw address
1057 base_op = new_register(T_INT);
1058 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1059 }
1060 #else
1061 if (index->is_valid()) {
1062 LIR_Opr tmp = new_register(T_LONG);
1063 __ convert(Bytecodes::_i2l, index, tmp);
1064 index = tmp;
1065 }
1066 #endif
1067
1068 LIR_Address* a = new LIR_Address(base_op,
1069 index,
1070 offset,
1071 T_BYTE);
1072 BasicTypeList signature(3);
1073 signature.append(T_INT);
1074 signature.append(T_ADDRESS);
1075 signature.append(T_INT);
1076 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1077 const LIR_Opr result_reg = result_register_for(x->type());
1078
1079 LIR_Opr addr = new_pointer_register();
1080 __ leal(LIR_OprFact::address(a), addr);
1081
1082 crc.load_item_force(cc->at(0));
1083 __ move(addr, cc->at(1));
1084 len.load_item_force(cc->at(2));
1085
1086 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1087 __ move(result_reg, result);
1088
1089 break;
1090 }
1091 default: {
1092 ShouldNotReachHere();
1093 }
1094 }
1095 }
1096
1097 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1098 assert(UseCRC32CIntrinsics, "need AVX and CLMUL instructions support");
1099 LIR_Opr result = rlock_result(x);
1100
1101 switch (x->id()) {
1102 case vmIntrinsics::_updateBytesCRC32C:
1103 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1104 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1105
1106 LIRItem crc(x->argument_at(0), this);
1107 LIRItem buf(x->argument_at(1), this);
1108 LIRItem off(x->argument_at(2), this);
1109 LIRItem end(x->argument_at(3), this);
1110 buf.load_item();
1111 off.load_nonconstant();
1112 end.load_nonconstant();
1113
1114 // len = end - off
1115 LIR_Opr len = end.result();
1116 LIR_Opr tmpA = new_register(T_INT);
1117 LIR_Opr tmpB = new_register(T_INT);
1118 __ move(end.result(), tmpA);
1119 __ move(off.result(), tmpB);
1120 __ sub(tmpA, tmpB, tmpA);
1121 len = tmpA;
1122
1123 LIR_Opr index = off.result();
1124 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1125 if (off.result()->is_constant()) {
1126 index = LIR_OprFact::illegalOpr;
1127 offset += off.result()->as_jint();
1128 }
1129 LIR_Opr base_op = buf.result();
1130 LIR_Address* a = nullptr;
1131
1132 if (index->is_valid()) {
1133 LIR_Opr tmp = new_register(T_LONG);
1134 __ convert(Bytecodes::_i2l, index, tmp);
1135 index = tmp;
1136 a = new LIR_Address(base_op, index, offset, T_BYTE);
1137 } else {
1138 a = new LIR_Address(base_op, offset, T_BYTE);
1139 }
1140
1141 BasicTypeList signature(3);
1142 signature.append(T_INT);
1143 signature.append(T_ADDRESS);
1144 signature.append(T_INT);
1145 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1146 const LIR_Opr result_reg = result_register_for(x->type());
1147
1148 LIR_Opr arg1 = cc->at(0),
1149 arg2 = cc->at(1),
1150 arg3 = cc->at(2);
1151
1152 crc.load_item_force(arg1);
1153 __ leal(LIR_OprFact::address(a), arg2);
1154 __ move(len, arg3);
1155
1156 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args());
1157 __ move(result_reg, result);
1158 break;
1159 }
1160 default: {
1161 ShouldNotReachHere();
1162 }
1163 }
1164 }
1165
1166 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1167 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1168
1169 // Make all state_for calls early since they can emit code
1170 LIR_Opr result = rlock_result(x);
1171
1172 LIRItem a(x->argument_at(0), this); // Object
1173 LIRItem aOffset(x->argument_at(1), this); // long
1174 LIRItem b(x->argument_at(2), this); // Object
1175 LIRItem bOffset(x->argument_at(3), this); // long
1176 LIRItem length(x->argument_at(4), this); // int
1177 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1178
1179 a.load_item();
1180 aOffset.load_nonconstant();
1181 b.load_item();
1182 bOffset.load_nonconstant();
1183
1184 long constant_aOffset = 0;
1185 LIR_Opr result_aOffset = aOffset.result();
1186 if (result_aOffset->is_constant()) {
1187 constant_aOffset = result_aOffset->as_jlong();
1188 result_aOffset = LIR_OprFact::illegalOpr;
1189 }
1190 LIR_Opr result_a = a.result();
1191
1192 long constant_bOffset = 0;
1193 LIR_Opr result_bOffset = bOffset.result();
1194 if (result_bOffset->is_constant()) {
1195 constant_bOffset = result_bOffset->as_jlong();
1196 result_bOffset = LIR_OprFact::illegalOpr;
1197 }
1198 LIR_Opr result_b = b.result();
1199
1200 #ifndef _LP64
1201 result_a = new_register(T_INT);
1202 __ convert(Bytecodes::_l2i, a.result(), result_a);
1203 result_b = new_register(T_INT);
1204 __ convert(Bytecodes::_l2i, b.result(), result_b);
1205 #endif
1206
1207
1208 LIR_Address* addr_a = new LIR_Address(result_a,
1209 result_aOffset,
1210 constant_aOffset,
1211 T_BYTE);
1212
1213 LIR_Address* addr_b = new LIR_Address(result_b,
1214 result_bOffset,
1215 constant_bOffset,
1216 T_BYTE);
1217
1218 BasicTypeList signature(4);
1219 signature.append(T_ADDRESS);
1220 signature.append(T_ADDRESS);
1221 signature.append(T_INT);
1222 signature.append(T_INT);
1223 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1224 const LIR_Opr result_reg = result_register_for(x->type());
1225
1226 LIR_Opr ptr_addr_a = new_pointer_register();
1227 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1228
1229 LIR_Opr ptr_addr_b = new_pointer_register();
1230 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1231
1232 __ move(ptr_addr_a, cc->at(0));
1233 __ move(ptr_addr_b, cc->at(1));
1234 length.load_item_force(cc->at(2));
1235 log2ArrayIndexScale.load_item_force(cc->at(3));
1236
1237 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1238 __ move(result_reg, result);
1239 }
1240
1241 void LIRGenerator::do_Convert(Convert* x) {
1242 #ifdef _LP64
1243 LIRItem value(x->value(), this);
1244 value.load_item();
1245 LIR_Opr input = value.result();
1246 LIR_Opr result = rlock(x);
1247 __ convert(x->op(), input, result);
1248 assert(result->is_virtual(), "result must be virtual register");
1249 set_result(x, result);
1250 #else
1251 // flags that vary for the different operations and different SSE-settings
1252 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1253
1254 switch (x->op()) {
1255 case Bytecodes::_i2l: // fall through
1256 case Bytecodes::_l2i: // fall through
1257 case Bytecodes::_i2b: // fall through
1258 case Bytecodes::_i2c: // fall through
1259 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1260
1261 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1262 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1263 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1264 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1265 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1266 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1267 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1268 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1269 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1270 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1271 default: ShouldNotReachHere();
1272 }
1273
1274 LIRItem value(x->value(), this);
1275 value.load_item();
1276 LIR_Opr input = value.result();
1277 LIR_Opr result = rlock(x);
1278
1279 // arguments of lir_convert
1280 LIR_Opr conv_input = input;
1281 LIR_Opr conv_result = result;
1282 ConversionStub* stub = nullptr;
1283
1284 if (fixed_input) {
1285 conv_input = fixed_register_for(input->type());
1286 __ move(input, conv_input);
1287 }
1288
1289 assert(fixed_result == false || round_result == false, "cannot set both");
1290 if (fixed_result) {
1291 conv_result = fixed_register_for(result->type());
1292 } else if (round_result) {
1293 result = new_register(result->type());
1294 set_vreg_flag(result, must_start_in_memory);
1295 }
1296
1297 if (needs_stub) {
1298 stub = new ConversionStub(x->op(), conv_input, conv_result);
1299 }
1300
1301 __ convert(x->op(), conv_input, conv_result, stub);
1302
1303 if (result != conv_result) {
1304 __ move(conv_result, result);
1305 }
1306
1307 assert(result->is_virtual(), "result must be virtual register");
1308 set_result(x, result);
1309 #endif // _LP64
1310 }
1311
1312
1313 void LIRGenerator::do_NewInstance(NewInstance* x) {
1314 print_if_not_loaded(x);
1315
1316 CodeEmitInfo* info = state_for(x, x->needs_state_before() ? x->state_before() : x->state());
1317 LIR_Opr reg = result_register_for(x->type());
1318 new_instance(reg, x->klass(), x->is_unresolved(),
1319 !x->is_unresolved() && x->klass()->is_inlinetype(),
1320 FrameMap::rcx_oop_opr,
1321 FrameMap::rdi_oop_opr,
1322 FrameMap::rsi_oop_opr,
1323 LIR_OprFact::illegalOpr,
1324 FrameMap::rdx_metadata_opr, info);
1325 LIR_Opr result = rlock_result(x);
1326 __ move(reg, result);
1327 }
1328
1329 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1330 CodeEmitInfo* info = nullptr;
1331 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
1332 info = state_for(x, x->state_before());
1333 info->set_force_reexecute();
1334 } else {
1335 info = state_for(x, x->state());
1336 }
1337
1338 LIRItem length(x->length(), this);
1339 length.load_item_force(FrameMap::rbx_opr);
1340
1341 LIR_Opr reg = result_register_for(x->type());
1342 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1343 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1344 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1345 LIR_Opr tmp4 = reg;
1346 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1347 LIR_Opr len = length.result();
1348 BasicType elem_type = x->elt_type();
1349
1350 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1351
1352 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1353 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
1354
1355 LIR_Opr result = rlock_result(x);
1356 __ move(reg, result);
1357 }
1358
1359
1360 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1361 LIRItem length(x->length(), this);
1362 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1363 // and therefore provide the state before the parameters have been consumed
1364 CodeEmitInfo* patching_info = nullptr;
1365 if (!x->klass()->is_loaded() || PatchALot) {
1366 patching_info = state_for(x, x->state_before());
1367 }
1368
1369 CodeEmitInfo* info = state_for(x, x->state());
1370
1371 const LIR_Opr reg = result_register_for(x->type());
1372 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1373 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1374 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1375 LIR_Opr tmp4 = reg;
1376 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1377
1378 length.load_item_force(FrameMap::rbx_opr);
1379 LIR_Opr len = length.result();
1380
1381 ciKlass* obj = (ciKlass*) x->exact_type();
1382 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_null_free());
1383 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1384 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1385 }
1386 klass2reg_with_patching(klass_reg, obj, patching_info);
1387 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path, true, x->is_null_free());
1388
1389 LIR_Opr result = rlock_result(x);
1390 __ move(reg, result);
1391 }
1392
1393
1394 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1395 Values* dims = x->dims();
1396 int i = dims->length();
1397 LIRItemList* items = new LIRItemList(i, i, nullptr);
1398 while (i-- > 0) {
1399 LIRItem* size = new LIRItem(dims->at(i), this);
1400 items->at_put(i, size);
1401 }
1402
1403 // Evaluate state_for early since it may emit code.
1404 CodeEmitInfo* patching_info = nullptr;
1405 if (!x->klass()->is_loaded() || PatchALot) {
1406 patching_info = state_for(x, x->state_before());
1407
1408 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1409 // clone all handlers (NOTE: Usually this is handled transparently
1410 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1411 // is done explicitly here because a stub isn't being used).
1412 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1413 }
1414 CodeEmitInfo* info = state_for(x, x->state());
1415
1416 i = dims->length();
1417 while (i-- > 0) {
1418 LIRItem* size = items->at(i);
1419 size->load_nonconstant();
1420
1421 store_stack_parameter(size->result(), in_ByteSize(i*4));
1422 }
1423
1424 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1425 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1426
1427 LIR_Opr rank = FrameMap::rbx_opr;
1428 __ move(LIR_OprFact::intConst(x->rank()), rank);
1429 LIR_Opr varargs = FrameMap::rcx_opr;
1430 __ move(FrameMap::rsp_opr, varargs);
1431 LIR_OprList* args = new LIR_OprList(3);
1432 args->append(klass_reg);
1433 args->append(rank);
1434 args->append(varargs);
1435 LIR_Opr reg = result_register_for(x->type());
1436 __ call_runtime(Runtime1::entry_for(C1StubId::new_multi_array_id),
1437 LIR_OprFact::illegalOpr,
1438 reg, args, info);
1439
1440 LIR_Opr result = rlock_result(x);
1441 __ move(reg, result);
1442 }
1443
1444
1445 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1446 // nothing to do for now
1447 }
1448
1449
1450 void LIRGenerator::do_CheckCast(CheckCast* x) {
1451 LIRItem obj(x->obj(), this);
1452
1453 CodeEmitInfo* patching_info = nullptr;
1454 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1455 // must do this before locking the destination register as an oop register,
1456 // and before the obj is loaded (the latter is for deoptimization)
1457 patching_info = state_for(x, x->state_before());
1458 }
1459 obj.load_item();
1460
1461 // info for exceptions
1462 CodeEmitInfo* info_for_exception =
1463 (x->needs_exception_state() ? state_for(x) :
1464 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1465
1466 if (x->is_null_free()) {
1467 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1468 }
1469
1470 CodeStub* stub;
1471 if (x->is_incompatible_class_change_check()) {
1472 assert(patching_info == nullptr, "can't patch this");
1473 stub = new SimpleExceptionStub(C1StubId::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1474 } else if (x->is_invokespecial_receiver_check()) {
1475 assert(patching_info == nullptr, "can't patch this");
1476 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1477 } else {
1478 stub = new SimpleExceptionStub(C1StubId::throw_class_cast_exception_id, obj.result(), info_for_exception);
1479 }
1480 LIR_Opr reg = rlock_result(x);
1481 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1482 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1483 tmp3 = new_register(objectType);
1484 }
1485 __ checkcast(reg, obj.result(), x->klass(),
1486 new_register(objectType), new_register(objectType), tmp3,
1487 x->direct_compare(), info_for_exception, patching_info, stub,
1488 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1489 }
1490
1491
1492 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1493 LIRItem obj(x->obj(), this);
1494
1495 // result and test object may not be in same register
1496 LIR_Opr reg = rlock_result(x);
1497 CodeEmitInfo* patching_info = nullptr;
1498 if ((!x->klass()->is_loaded() || PatchALot)) {
1499 // must do this before locking the destination register as an oop register
1500 patching_info = state_for(x, x->state_before());
1501 }
1502 obj.load_item();
1503 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1504 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1505 tmp3 = new_register(objectType);
1506 }
1507 __ instanceof(reg, obj.result(), x->klass(),
1508 new_register(objectType), new_register(objectType), tmp3,
1509 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1510 }
1511
1512 // Intrinsic for Class::isInstance
1513 address LIRGenerator::isInstance_entry() {
1514 return Runtime1::entry_for(C1StubId::is_instance_of_id);
1515 }
1516
1517
1518 void LIRGenerator::do_If(If* x) {
1519 assert(x->number_of_sux() == 2, "inconsistency");
1520 ValueTag tag = x->x()->type()->tag();
1521 bool is_safepoint = x->is_safepoint();
1522
1523 If::Condition cond = x->cond();
1524
1525 LIRItem xitem(x->x(), this);
1526 LIRItem yitem(x->y(), this);
1527 LIRItem* xin = &xitem;
1528 LIRItem* yin = &yitem;
1529
1530 if (tag == longTag) {
1531 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1532 // mirror for other conditions
1533 if (cond == If::gtr || cond == If::leq) {
1534 cond = Instruction::mirror(cond);
1535 xin = &yitem;
1536 yin = &xitem;
1537 }
1538 xin->set_destroys_register();
1539 }
1540 xin->load_item();
1541 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1542 // inline long zero
1543 yin->dont_load_item();
1544 } else if (tag == longTag || tag == floatTag || tag == doubleTag || x->substitutability_check()) {
1545 // longs cannot handle constants at right side
1546 yin->load_item();
1547 } else {
1548 yin->dont_load_item();
1549 }
1550
1551 LIR_Opr left = xin->result();
1552 LIR_Opr right = yin->result();
1553
1554 set_no_result(x);
1555
1556 // add safepoint before generating condition code so it can be recomputed
1557 if (x->is_safepoint()) {
1558 // increment backedge counter if needed
1559 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1560 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1561 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1562 }
1563
1564 if (x->substitutability_check()) {
1565 substitutability_check(x, *xin, *yin);
1566 } else {
1567 __ cmp(lir_cond(cond), left, right);
1568 }
1569 // Generate branch profiling. Profiling code doesn't kill flags.
1570 profile_branch(x, cond);
1571 move_to_phi(x->state());
1572 if (x->x()->type()->is_float_kind()) {
1573 __ branch(lir_cond(cond), x->tsux(), x->usux());
1574 } else {
1575 __ branch(lir_cond(cond), x->tsux());
1576 }
1577 assert(x->default_sux() == x->fsux(), "wrong destination above");
1578 __ jump(x->default_sux());
1579 }
1580
1581
1582 LIR_Opr LIRGenerator::getThreadPointer() {
1583 #ifdef _LP64
1584 return FrameMap::as_pointer_opr(r15_thread);
1585 #else
1586 LIR_Opr result = new_register(T_INT);
1587 __ get_thread(result);
1588 return result;
1589 #endif //
1590 }
1591
1592 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1593 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1594 LIR_OprList* args = new LIR_OprList();
1595 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1596 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1597 }
1598
1599
1600 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1601 CodeEmitInfo* info) {
1602 if (address->type() == T_LONG) {
1603 address = new LIR_Address(address->base(),
1604 address->index(), address->scale(),
1605 address->disp(), T_DOUBLE);
1606 // Transfer the value atomically by using FP moves. This means
1607 // the value has to be moved between CPU and FPU registers. It
1608 // always has to be moved through spill slot since there's no
1609 // quick way to pack the value into an SSE register.
1610 LIR_Opr temp_double = new_register(T_DOUBLE);
1611 LIR_Opr spill = new_register(T_LONG);
1612 set_vreg_flag(spill, must_start_in_memory);
1613 __ move(value, spill);
1614 __ volatile_move(spill, temp_double, T_LONG);
1615 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1616 } else {
1617 __ store(value, address, info);
1618 }
1619 }
1620
1621 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1622 CodeEmitInfo* info) {
1623 if (address->type() == T_LONG) {
1624 address = new LIR_Address(address->base(),
1625 address->index(), address->scale(),
1626 address->disp(), T_DOUBLE);
1627 // Transfer the value atomically by using FP moves. This means
1628 // the value has to be moved between CPU and FPU registers. In
1629 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1630 // SSE2+ mode it can be moved directly.
1631 LIR_Opr temp_double = new_register(T_DOUBLE);
1632 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1633 __ volatile_move(temp_double, result, T_LONG);
1634 #ifndef _LP64
1635 if (UseSSE < 2) {
1636 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1637 set_vreg_flag(result, must_start_in_memory);
1638 }
1639 #endif // !LP64
1640 } else {
1641 __ load(address, result, info);
1642 }
1643 }