1 /*
  2  * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "c1/c1_MacroAssembler.hpp"
 27 #include "c1/c1_Runtime1.hpp"
 28 #include "code/compiledIC.hpp"
 29 #include "compiler/compilerDefinitions.inline.hpp"
 30 #include "gc/shared/barrierSet.hpp"
 31 #include "gc/shared/barrierSetAssembler.hpp"
 32 #include "gc/shared/collectedHeap.hpp"
 33 #include "gc/shared/tlab_globals.hpp"
 34 #include "interpreter/interpreter.hpp"
 35 #include "oops/arrayOop.hpp"
 36 #include "oops/markWord.hpp"
 37 #include "runtime/basicLock.hpp"
 38 #include "runtime/frame.inline.hpp"
 39 #include "runtime/globals.hpp"
 40 #include "runtime/os.hpp"
 41 #include "runtime/sharedRuntime.hpp"
 42 #include "runtime/stubRoutines.hpp"
 43 #include "utilities/checkedCast.hpp"
 44 #include "utilities/globalDefinitions.hpp"
 45 
 46 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register tmp, Label& slow_case) {
 47   const int aligned_mask = BytesPerWord -1;
 48   const int hdr_offset = oopDesc::mark_offset_in_bytes();
 49   assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
 50   assert_different_registers(hdr, obj, disp_hdr, tmp);
 51   int null_check_offset = -1;
 52 
 53   verify_oop(obj);
 54 
 55   // save object being locked into the BasicObjectLock
 56   movptr(Address(disp_hdr, BasicObjectLock::obj_offset()), obj);
 57 
 58   null_check_offset = offset();
 59 
 60   if (DiagnoseSyncOnValueBasedClasses != 0) {
 61     load_klass(hdr, obj, rscratch1);
 62     testb(Address(hdr, Klass::misc_flags_offset()), KlassFlags::_misc_is_value_based_class);
 63     jcc(Assembler::notZero, slow_case);
 64   }
 65 
 66   if (LockingMode == LM_LIGHTWEIGHT) {
 67 #ifdef _LP64
 68     const Register thread = r15_thread;
 69     lightweight_lock(disp_hdr, obj, hdr, thread, tmp, slow_case);
 70 #else
 71     // Implicit null check.
 72     movptr(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
 73     // Lacking registers and thread on x86_32. Always take slow path.
 74     jmp(slow_case);
 75 #endif
 76   } else  if (LockingMode == LM_LEGACY) {
 77     Label done;
 78     // Load object header
 79     movptr(hdr, Address(obj, hdr_offset));
 80     // and mark it as unlocked
 81     orptr(hdr, markWord::unlocked_value);
 82     if (EnableValhalla) {
 83       // Mask inline_type bit such that we go to the slow path if object is an inline type
 84       andptr(hdr, ~((int) markWord::inline_type_bit_in_place));
 85     }
 86     // save unlocked object header into the displaced header location on the stack
 87     movptr(Address(disp_hdr, 0), hdr);
 88     // test if object header is still the same (i.e. unlocked), and if so, store the
 89     // displaced header address in the object header - if it is not the same, get the
 90     // object header instead
 91     MacroAssembler::lock(); // must be immediately before cmpxchg!
 92     cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
 93     // if the object header was the same, we're done
 94     jcc(Assembler::equal, done);
 95     // if the object header was not the same, it is now in the hdr register
 96     // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
 97     //
 98     // 1) (hdr & aligned_mask) == 0
 99     // 2) rsp <= hdr
100     // 3) hdr <= rsp + page_size
101     //
102     // these 3 tests can be done by evaluating the following expression:
103     //
104     // (hdr - rsp) & (aligned_mask - page_size)
105     //
106     // assuming both the stack pointer and page_size have their least
107     // significant 2 bits cleared and page_size is a power of 2
108     subptr(hdr, rsp);
109     andptr(hdr, aligned_mask - (int)os::vm_page_size());
110     // for recursive locking, the result is zero => save it in the displaced header
111     // location (null in the displaced hdr location indicates recursive locking)
112     movptr(Address(disp_hdr, 0), hdr);
113     // otherwise we don't care about the result and handle locking via runtime call
114     jcc(Assembler::notZero, slow_case);
115     // done
116     bind(done);
117   }
118 
119   inc_held_monitor_count();
120 
121   return null_check_offset;
122 }
123 
124 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
125   const int aligned_mask = BytesPerWord -1;
126   const int hdr_offset = oopDesc::mark_offset_in_bytes();
127   assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
128   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
129   Label done;
130 
131   if (LockingMode != LM_LIGHTWEIGHT) {
132     // load displaced header
133     movptr(hdr, Address(disp_hdr, 0));
134     // if the loaded hdr is null we had recursive locking
135     testptr(hdr, hdr);
136     // if we had recursive locking, we are done
137     jcc(Assembler::zero, done);
138   }
139 
140   // load object
141   movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
142   verify_oop(obj);
143 
144   if (LockingMode == LM_LIGHTWEIGHT) {
145 #ifdef _LP64
146     lightweight_unlock(obj, disp_hdr, r15_thread, hdr, slow_case);
147 #else
148     // Lacking registers and thread on x86_32. Always take slow path.
149     jmp(slow_case);
150 #endif
151   } else if (LockingMode == LM_LEGACY) {
152     // test if object header is pointing to the displaced header, and if so, restore
153     // the displaced header in the object - if the object header is not pointing to
154     // the displaced header, get the object header instead
155     MacroAssembler::lock(); // must be immediately before cmpxchg!
156     cmpxchgptr(hdr, Address(obj, hdr_offset));
157     // if the object header was not pointing to the displaced header,
158     // we do unlocking via runtime call
159     jcc(Assembler::notEqual, slow_case);
160     // done
161   }
162   bind(done);
163   dec_held_monitor_count();
164 }
165 
166 
167 // Defines obj, preserves var_size_in_bytes
168 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
169   if (UseTLAB) {
170     tlab_allocate(noreg, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
171   } else {
172     jmp(slow_case);
173   }
174 }
175 
176 
177 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
178   assert_different_registers(obj, klass, len);
179   if (EnableValhalla) {
180     // Need to copy markWord::prototype header for klass
181     assert_different_registers(obj, klass, len, t1, t2);
182     movptr(t1, Address(klass, Klass::prototype_header_offset()));
183     movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
184   } else {
185     // This assumes that all prototype bits fit in an int32_t
186     movptr(Address(obj, oopDesc::mark_offset_in_bytes()), checked_cast<int32_t>(markWord::prototype().value()));
187   }
188 #ifdef _LP64
189   if (UseCompressedClassPointers) { // Take care not to kill klass
190     movptr(t1, klass);
191     encode_klass_not_null(t1, rscratch1);
192     movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
193   } else
194 #endif
195   {
196     movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
197   }
198 
199   if (len->is_valid()) {
200     movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
201 #ifdef _LP64
202     int base_offset = arrayOopDesc::length_offset_in_bytes() + BytesPerInt;
203     if (!is_aligned(base_offset, BytesPerWord)) {
204       assert(is_aligned(base_offset, BytesPerInt), "must be 4-byte aligned");
205       // Clear gap/first 4 bytes following the length field.
206       xorl(t1, t1);
207       movl(Address(obj, base_offset), t1);
208     }
209 #endif
210   }
211 #ifdef _LP64
212   else if (UseCompressedClassPointers) {
213     xorptr(t1, t1);
214     store_klass_gap(obj, t1);
215   }
216 #endif
217 }
218 
219 
220 // preserves obj, destroys len_in_bytes
221 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
222   assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
223   Label done;
224 
225   // len_in_bytes is positive and ptr sized
226   subptr(len_in_bytes, hdr_size_in_bytes);
227   zero_memory(obj, len_in_bytes, hdr_size_in_bytes, t1);
228   bind(done);
229 }
230 
231 
232 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
233   assert(obj == rax, "obj must be in rax, for cmpxchg");
234   assert_different_registers(obj, t1, t2); // XXX really?
235   assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
236 
237   try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
238 
239   initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2, UseTLAB);
240 }
241 
242 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, bool is_tlab_allocated) {
243   assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
244          "con_size_in_bytes is not multiple of alignment");
245   const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
246 
247   initialize_header(obj, klass, noreg, t1, t2);
248 
249   if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
250     // clear rest of allocated space
251     const Register t1_zero = t1;
252     const Register index = t2;
253     const int threshold = 6 * BytesPerWord;   // approximate break even point for code size (see comments below)
254     if (var_size_in_bytes != noreg) {
255       mov(index, var_size_in_bytes);
256       initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
257     } else if (con_size_in_bytes <= threshold) {
258       // use explicit null stores
259       // code size = 2 + 3*n bytes (n = number of fields to clear)
260       xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
261       for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
262         movptr(Address(obj, i), t1_zero);
263     } else if (con_size_in_bytes > hdr_size_in_bytes) {
264       // use loop to null out the fields
265       // code size = 16 bytes for even n (n = number of fields to clear)
266       // initialize last object field first if odd number of fields
267       xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
268       movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
269       // initialize last object field if constant size is odd
270       if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
271         movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
272       // initialize remaining object fields: rdx is a multiple of 2
273       { Label loop;
274         bind(loop);
275         movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
276                t1_zero);
277         NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
278                t1_zero);)
279         decrement(index);
280         jcc(Assembler::notZero, loop);
281       }
282     }
283   }
284 
285   if (CURRENT_ENV->dtrace_alloc_probes()) {
286     assert(obj == rax, "must be");
287     call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
288   }
289 
290   verify_oop(obj);
291 }
292 
293 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int base_offset_in_bytes, Address::ScaleFactor f, Register klass, Label& slow_case, bool zero_array) {
294   assert(obj == rax, "obj must be in rax, for cmpxchg");
295   assert_different_registers(obj, len, t1, t2, klass);
296 
297   // determine alignment mask
298   assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
299 
300   // check for negative or excessive length
301   cmpptr(len, checked_cast<int32_t>(max_array_allocation_length));
302   jcc(Assembler::above, slow_case);
303 
304   const Register arr_size = t2; // okay to be the same
305   // align object end
306   movptr(arr_size, base_offset_in_bytes + MinObjAlignmentInBytesMask);
307   lea(arr_size, Address(arr_size, len, f));
308   andptr(arr_size, ~MinObjAlignmentInBytesMask);
309 
310   try_allocate(obj, arr_size, 0, t1, t2, slow_case);
311 
312   initialize_header(obj, klass, len, t1, t2);
313 
314   // clear rest of allocated space
315   if (zero_array) {
316     const Register len_zero = len;
317     // Align-up to word boundary, because we clear the 4 bytes potentially
318     // following the length field in initialize_header().
319     int base_offset = align_up(base_offset_in_bytes, BytesPerWord);
320     initialize_body(obj, arr_size, base_offset, len_zero);
321   }
322 
323   if (CURRENT_ENV->dtrace_alloc_probes()) {
324     assert(obj == rax, "must be");
325     call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
326   }
327 
328   verify_oop(obj);
329 }
330 
331 void C1_MacroAssembler::build_frame_helper(int frame_size_in_bytes, int sp_offset_for_orig_pc, int sp_inc, bool reset_orig_pc, bool needs_stack_repair) {
332   push(rbp);
333   if (PreserveFramePointer) {
334     mov(rbp, rsp);
335   }
336 #if !defined(_LP64) && defined(COMPILER2)
337   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
338       // c2 leaves fpu stack dirty. Clean it on entry
339       empty_FPU_stack();
340     }
341 #endif // !_LP64 && COMPILER2
342   decrement(rsp, frame_size_in_bytes);
343 
344   if (needs_stack_repair) {
345     // Save stack increment (also account for fixed framesize and rbp)
346     assert((sp_inc & (StackAlignmentInBytes-1)) == 0, "stack increment not aligned");
347     int real_frame_size = sp_inc + frame_size_in_bytes + wordSize;
348     movptr(Address(rsp, frame_size_in_bytes - wordSize), real_frame_size);
349   }
350   if (reset_orig_pc) {
351     // Zero orig_pc to detect deoptimization during buffering in the entry points
352     movptr(Address(rsp, sp_offset_for_orig_pc), 0);
353   }
354 }
355 
356 void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes, int sp_offset_for_orig_pc, bool needs_stack_repair, bool has_scalarized_args, Label* verified_inline_entry_label) {
357   // Make sure there is enough stack space for this method's activation.
358   // Note that we do this before doing an enter(). This matches the
359   // ordering of C2's stack overflow check / rsp decrement and allows
360   // the SharedRuntime stack overflow handling to be consistent
361   // between the two compilers.
362   assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
363   generate_stack_overflow_check(bang_size_in_bytes);
364 
365   build_frame_helper(frame_size_in_bytes, sp_offset_for_orig_pc, 0, has_scalarized_args, needs_stack_repair);
366 
367   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
368   // C1 code is not hot enough to micro optimize the nmethod entry barrier with an out-of-line stub
369   bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */);
370 
371   if (verified_inline_entry_label != nullptr) {
372     // Jump here from the scalarized entry points that already created the frame.
373     bind(*verified_inline_entry_label);
374   }
375 }
376 
377 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
378   if (breakAtEntry || VerifyFPU) {
379     // Verified Entry first instruction should be 5 bytes long for correct
380     // patching by patch_verified_entry().
381     //
382     // Breakpoint and VerifyFPU have one byte first instruction.
383     // Also first instruction will be one byte "push(rbp)" if stack banging
384     // code is not generated (see build_frame() above).
385     // For all these cases generate long instruction first.
386     fat_nop();
387   }
388   if (breakAtEntry) int3();
389   // build frame
390   IA32_ONLY( verify_FPU(0, "method_entry"); )
391 }
392 
393 int C1_MacroAssembler::scalarized_entry(const CompiledEntrySignature* ces, int frame_size_in_bytes, int bang_size_in_bytes, int sp_offset_for_orig_pc, Label& verified_inline_entry_label, bool is_inline_ro_entry) {
394   assert(InlineTypePassFieldsAsArgs, "sanity");
395   // Make sure there is enough stack space for this method's activation.
396   assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
397   generate_stack_overflow_check(bang_size_in_bytes);
398 
399   GrowableArray<SigEntry>* sig    = ces->sig();
400   GrowableArray<SigEntry>* sig_cc = is_inline_ro_entry ? ces->sig_cc_ro() : ces->sig_cc();
401   VMRegPair* regs      = ces->regs();
402   VMRegPair* regs_cc   = is_inline_ro_entry ? ces->regs_cc_ro() : ces->regs_cc();
403   int args_on_stack    = ces->args_on_stack();
404   int args_on_stack_cc = is_inline_ro_entry ? ces->args_on_stack_cc_ro() : ces->args_on_stack_cc();
405 
406   assert(sig->length() <= sig_cc->length(), "Zero-sized inline class not allowed!");
407   BasicType* sig_bt = NEW_RESOURCE_ARRAY(BasicType, sig_cc->length());
408   int args_passed = sig->length();
409   int args_passed_cc = SigEntry::fill_sig_bt(sig_cc, sig_bt);
410 
411   // Create a temp frame so we can call into the runtime. It must be properly set up to accommodate GC.
412   build_frame_helper(frame_size_in_bytes, sp_offset_for_orig_pc, 0, true, ces->c1_needs_stack_repair());
413 
414   // The runtime call might safepoint, make sure nmethod entry barrier is executed
415   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
416   // C1 code is not hot enough to micro optimize the nmethod entry barrier with an out-of-line stub
417   bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */);
418 
419   // FIXME -- call runtime only if we cannot in-line allocate all the incoming inline type args.
420   movptr(rbx, (intptr_t)(ces->method()));
421   if (is_inline_ro_entry) {
422     call(RuntimeAddress(Runtime1::entry_for(Runtime1::buffer_inline_args_no_receiver_id)));
423   } else {
424     call(RuntimeAddress(Runtime1::entry_for(Runtime1::buffer_inline_args_id)));
425   }
426   int rt_call_offset = offset();
427 
428   // Remove the temp frame
429   addptr(rsp, frame_size_in_bytes);
430   pop(rbp);
431 
432   // Check if we need to extend the stack for packing
433   int sp_inc = 0;
434   if (args_on_stack > args_on_stack_cc) {
435     sp_inc = extend_stack_for_inline_args(args_on_stack);
436   }
437 
438   shuffle_inline_args(true, is_inline_ro_entry, sig_cc,
439                       args_passed_cc, args_on_stack_cc, regs_cc, // from
440                       args_passed, args_on_stack, regs,          // to
441                       sp_inc, rax);
442 
443   // Create the real frame. Below jump will then skip over the stack banging and frame
444   // setup code in the verified_inline_entry (which has a different real_frame_size).
445   build_frame_helper(frame_size_in_bytes, sp_offset_for_orig_pc, sp_inc, false, ces->c1_needs_stack_repair());
446 
447   jmp(verified_inline_entry_label);
448   return rt_call_offset;
449 }
450 
451 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
452   // rbp, + 0: link
453   //     + 1: return address
454   //     + 2: argument with offset 0
455   //     + 3: argument with offset 1
456   //     + 4: ...
457 
458   movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
459 }
460 
461 #ifndef PRODUCT
462 
463 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
464   if (!VerifyOops) return;
465   verify_oop_addr(Address(rsp, stack_offset));
466 }
467 
468 void C1_MacroAssembler::verify_not_null_oop(Register r) {
469   if (!VerifyOops) return;
470   Label not_null;
471   testptr(r, r);
472   jcc(Assembler::notZero, not_null);
473   stop("non-null oop required");
474   bind(not_null);
475   verify_oop(r);
476 }
477 
478 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
479 #ifdef ASSERT
480   if (inv_rax) movptr(rax, 0xDEAD);
481   if (inv_rbx) movptr(rbx, 0xDEAD);
482   if (inv_rcx) movptr(rcx, 0xDEAD);
483   if (inv_rdx) movptr(rdx, 0xDEAD);
484   if (inv_rsi) movptr(rsi, 0xDEAD);
485   if (inv_rdi) movptr(rdi, 0xDEAD);
486 #endif
487 }
488 
489 #endif // ifndef PRODUCT