1 /*
  2  * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "c1/c1_MacroAssembler.hpp"
 27 #include "c1/c1_Runtime1.hpp"
 28 #include "code/compiledIC.hpp"
 29 #include "compiler/compilerDefinitions.inline.hpp"
 30 #include "gc/shared/barrierSet.hpp"
 31 #include "gc/shared/barrierSetAssembler.hpp"
 32 #include "gc/shared/collectedHeap.hpp"
 33 #include "gc/shared/tlab_globals.hpp"
 34 #include "interpreter/interpreter.hpp"
 35 #include "oops/arrayOop.hpp"
 36 #include "oops/markWord.hpp"
 37 #include "runtime/basicLock.hpp"
 38 #include "runtime/frame.inline.hpp"
 39 #include "runtime/globals.hpp"
 40 #include "runtime/os.hpp"
 41 #include "runtime/sharedRuntime.hpp"
 42 #include "runtime/stubRoutines.hpp"
 43 #include "utilities/checkedCast.hpp"
 44 #include "utilities/globalDefinitions.hpp"
 45 
 46 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register tmp, Label& slow_case) {
 47   const int aligned_mask = BytesPerWord -1;
 48   const int hdr_offset = oopDesc::mark_offset_in_bytes();
 49   assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
 50   assert_different_registers(hdr, obj, disp_hdr, tmp);
 51   int null_check_offset = -1;
 52 
 53   verify_oop(obj);
 54 
 55   // save object being locked into the BasicObjectLock
 56   movptr(Address(disp_hdr, BasicObjectLock::obj_offset()), obj);
 57 
 58   null_check_offset = offset();
 59 
 60   if (DiagnoseSyncOnValueBasedClasses != 0) {
 61     load_klass(hdr, obj, rscratch1);
 62     movl(hdr, Address(hdr, Klass::access_flags_offset()));
 63     testl(hdr, JVM_ACC_IS_VALUE_BASED_CLASS);
 64     jcc(Assembler::notZero, slow_case);
 65   }
 66 
 67   if (LockingMode == LM_LIGHTWEIGHT) {
 68 #ifdef _LP64
 69     const Register thread = r15_thread;
 70 #else
 71     const Register thread = disp_hdr;
 72     get_thread(thread);
 73 #endif
 74     lightweight_lock(obj, hdr, thread, tmp, slow_case);
 75   } else  if (LockingMode == LM_LEGACY) {
 76     Label done;
 77     // Load object header
 78     movptr(hdr, Address(obj, hdr_offset));
 79     // and mark it as unlocked
 80     orptr(hdr, markWord::unlocked_value);
 81     if (EnableValhalla) {
 82       // Mask inline_type bit such that we go to the slow path if object is an inline type
 83       andptr(hdr, ~((int) markWord::inline_type_bit_in_place));
 84     }
 85     // save unlocked object header into the displaced header location on the stack
 86     movptr(Address(disp_hdr, 0), hdr);
 87     // test if object header is still the same (i.e. unlocked), and if so, store the
 88     // displaced header address in the object header - if it is not the same, get the
 89     // object header instead
 90     MacroAssembler::lock(); // must be immediately before cmpxchg!
 91     cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
 92     // if the object header was the same, we're done
 93     jcc(Assembler::equal, done);
 94     // if the object header was not the same, it is now in the hdr register
 95     // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
 96     //
 97     // 1) (hdr & aligned_mask) == 0
 98     // 2) rsp <= hdr
 99     // 3) hdr <= rsp + page_size
100     //
101     // these 3 tests can be done by evaluating the following expression:
102     //
103     // (hdr - rsp) & (aligned_mask - page_size)
104     //
105     // assuming both the stack pointer and page_size have their least
106     // significant 2 bits cleared and page_size is a power of 2
107     subptr(hdr, rsp);
108     andptr(hdr, aligned_mask - (int)os::vm_page_size());
109     // for recursive locking, the result is zero => save it in the displaced header
110     // location (null in the displaced hdr location indicates recursive locking)
111     movptr(Address(disp_hdr, 0), hdr);
112     // otherwise we don't care about the result and handle locking via runtime call
113     jcc(Assembler::notZero, slow_case);
114     // done
115     bind(done);
116   }
117 
118   inc_held_monitor_count();
119 
120   return null_check_offset;
121 }
122 
123 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
124   const int aligned_mask = BytesPerWord -1;
125   const int hdr_offset = oopDesc::mark_offset_in_bytes();
126   assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
127   assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
128   Label done;
129 
130   if (LockingMode != LM_LIGHTWEIGHT) {
131     // load displaced header
132     movptr(hdr, Address(disp_hdr, 0));
133     // if the loaded hdr is null we had recursive locking
134     testptr(hdr, hdr);
135     // if we had recursive locking, we are done
136     jcc(Assembler::zero, done);
137   }
138 
139   // load object
140   movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset()));
141   verify_oop(obj);
142 
143   if (LockingMode == LM_LIGHTWEIGHT) {
144 #ifdef _LP64
145     lightweight_unlock(obj, disp_hdr, r15_thread, hdr, slow_case);
146 #else
147     // This relies on the implementation of lightweight_unlock being able to handle
148     // that the reg_rax and thread Register parameters may alias each other.
149     get_thread(disp_hdr);
150     lightweight_unlock(obj, disp_hdr, disp_hdr, hdr, slow_case);
151 #endif
152   } else if (LockingMode == LM_LEGACY) {
153     // test if object header is pointing to the displaced header, and if so, restore
154     // the displaced header in the object - if the object header is not pointing to
155     // the displaced header, get the object header instead
156     MacroAssembler::lock(); // must be immediately before cmpxchg!
157     cmpxchgptr(hdr, Address(obj, hdr_offset));
158     // if the object header was not pointing to the displaced header,
159     // we do unlocking via runtime call
160     jcc(Assembler::notEqual, slow_case);
161     // done
162   }
163   bind(done);
164   dec_held_monitor_count();
165 }
166 
167 
168 // Defines obj, preserves var_size_in_bytes
169 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
170   if (UseTLAB) {
171     tlab_allocate(noreg, obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
172   } else {
173     jmp(slow_case);
174   }
175 }
176 
177 
178 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
179   assert_different_registers(obj, klass, len);
180   if (EnableValhalla) {
181     // Need to copy markWord::prototype header for klass
182     assert_different_registers(obj, klass, len, t1, t2);
183     movptr(t1, Address(klass, Klass::prototype_header_offset()));
184     movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
185   } else {
186     // This assumes that all prototype bits fit in an int32_t
187     movptr(Address(obj, oopDesc::mark_offset_in_bytes()), checked_cast<int32_t>(markWord::prototype().value()));
188   }
189 #ifdef _LP64
190   if (UseCompressedClassPointers) { // Take care not to kill klass
191     movptr(t1, klass);
192     encode_klass_not_null(t1, rscratch1);
193     movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
194   } else
195 #endif
196   {
197     movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
198   }
199 
200   if (len->is_valid()) {
201     movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
202 #ifdef _LP64
203     int base_offset = arrayOopDesc::length_offset_in_bytes() + BytesPerInt;
204     if (!is_aligned(base_offset, BytesPerWord)) {
205       assert(is_aligned(base_offset, BytesPerInt), "must be 4-byte aligned");
206       // Clear gap/first 4 bytes following the length field.
207       xorl(t1, t1);
208       movl(Address(obj, base_offset), t1);
209     }
210 #endif
211   }
212 #ifdef _LP64
213   else if (UseCompressedClassPointers) {
214     xorptr(t1, t1);
215     store_klass_gap(obj, t1);
216   }
217 #endif
218 }
219 
220 
221 // preserves obj, destroys len_in_bytes
222 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
223   assert(hdr_size_in_bytes >= 0, "header size must be positive or 0");
224   Label done;
225 
226   // len_in_bytes is positive and ptr sized
227   subptr(len_in_bytes, hdr_size_in_bytes);
228   zero_memory(obj, len_in_bytes, hdr_size_in_bytes, t1);
229   bind(done);
230 }
231 
232 
233 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
234   assert(obj == rax, "obj must be in rax, for cmpxchg");
235   assert_different_registers(obj, t1, t2); // XXX really?
236   assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
237 
238   try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
239 
240   initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2, UseTLAB);
241 }
242 
243 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, bool is_tlab_allocated) {
244   assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
245          "con_size_in_bytes is not multiple of alignment");
246   const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
247 
248   initialize_header(obj, klass, noreg, t1, t2);
249 
250   if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
251     // clear rest of allocated space
252     const Register t1_zero = t1;
253     const Register index = t2;
254     const int threshold = 6 * BytesPerWord;   // approximate break even point for code size (see comments below)
255     if (var_size_in_bytes != noreg) {
256       mov(index, var_size_in_bytes);
257       initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
258     } else if (con_size_in_bytes <= threshold) {
259       // use explicit null stores
260       // code size = 2 + 3*n bytes (n = number of fields to clear)
261       xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
262       for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
263         movptr(Address(obj, i), t1_zero);
264     } else if (con_size_in_bytes > hdr_size_in_bytes) {
265       // use loop to null out the fields
266       // code size = 16 bytes for even n (n = number of fields to clear)
267       // initialize last object field first if odd number of fields
268       xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
269       movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
270       // initialize last object field if constant size is odd
271       if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
272         movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
273       // initialize remaining object fields: rdx is a multiple of 2
274       { Label loop;
275         bind(loop);
276         movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
277                t1_zero);
278         NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
279                t1_zero);)
280         decrement(index);
281         jcc(Assembler::notZero, loop);
282       }
283     }
284   }
285 
286   if (CURRENT_ENV->dtrace_alloc_probes()) {
287     assert(obj == rax, "must be");
288     call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
289   }
290 
291   verify_oop(obj);
292 }
293 
294 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int base_offset_in_bytes, Address::ScaleFactor f, Register klass, Label& slow_case, bool zero_array) {
295   assert(obj == rax, "obj must be in rax, for cmpxchg");
296   assert_different_registers(obj, len, t1, t2, klass);
297 
298   // determine alignment mask
299   assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
300 
301   // check for negative or excessive length
302   cmpptr(len, checked_cast<int32_t>(max_array_allocation_length));
303   jcc(Assembler::above, slow_case);
304 
305   const Register arr_size = t2; // okay to be the same
306   // align object end
307   movptr(arr_size, base_offset_in_bytes + MinObjAlignmentInBytesMask);
308   lea(arr_size, Address(arr_size, len, f));
309   andptr(arr_size, ~MinObjAlignmentInBytesMask);
310 
311   try_allocate(obj, arr_size, 0, t1, t2, slow_case);
312 
313   initialize_header(obj, klass, len, t1, t2);
314 
315   // clear rest of allocated space
316   if (zero_array) {
317     const Register len_zero = len;
318     // Align-up to word boundary, because we clear the 4 bytes potentially
319     // following the length field in initialize_header().
320     int base_offset = align_up(base_offset_in_bytes, BytesPerWord);
321     initialize_body(obj, arr_size, base_offset, len_zero);
322   }
323 
324   if (CURRENT_ENV->dtrace_alloc_probes()) {
325     assert(obj == rax, "must be");
326     call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
327   }
328 
329   verify_oop(obj);
330 }
331 
332 void C1_MacroAssembler::build_frame_helper(int frame_size_in_bytes, int sp_offset_for_orig_pc, int sp_inc, bool reset_orig_pc, bool needs_stack_repair) {
333   push(rbp);
334   if (PreserveFramePointer) {
335     mov(rbp, rsp);
336   }
337 #if !defined(_LP64) && defined(COMPILER2)
338   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
339       // c2 leaves fpu stack dirty. Clean it on entry
340       empty_FPU_stack();
341     }
342 #endif // !_LP64 && COMPILER2
343   decrement(rsp, frame_size_in_bytes);
344 
345   if (needs_stack_repair) {
346     // Save stack increment (also account for fixed framesize and rbp)
347     assert((sp_inc & (StackAlignmentInBytes-1)) == 0, "stack increment not aligned");
348     int real_frame_size = sp_inc + frame_size_in_bytes + wordSize;
349     movptr(Address(rsp, frame_size_in_bytes - wordSize), real_frame_size);
350   }
351   if (reset_orig_pc) {
352     // Zero orig_pc to detect deoptimization during buffering in the entry points
353     movptr(Address(rsp, sp_offset_for_orig_pc), 0);
354   }
355 }
356 
357 void C1_MacroAssembler::build_frame(int frame_size_in_bytes, int bang_size_in_bytes, int sp_offset_for_orig_pc, bool needs_stack_repair, bool has_scalarized_args, Label* verified_inline_entry_label) {
358   // Make sure there is enough stack space for this method's activation.
359   // Note that we do this before doing an enter(). This matches the
360   // ordering of C2's stack overflow check / rsp decrement and allows
361   // the SharedRuntime stack overflow handling to be consistent
362   // between the two compilers.
363   assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
364   generate_stack_overflow_check(bang_size_in_bytes);
365 
366   build_frame_helper(frame_size_in_bytes, sp_offset_for_orig_pc, 0, has_scalarized_args, needs_stack_repair);
367 
368   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
369   // C1 code is not hot enough to micro optimize the nmethod entry barrier with an out-of-line stub
370   bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */);
371 
372   if (verified_inline_entry_label != nullptr) {
373     // Jump here from the scalarized entry points that already created the frame.
374     bind(*verified_inline_entry_label);
375   }
376 }
377 
378 void C1_MacroAssembler::verified_entry(bool breakAtEntry) {
379   if (breakAtEntry || VerifyFPU) {
380     // Verified Entry first instruction should be 5 bytes long for correct
381     // patching by patch_verified_entry().
382     //
383     // Breakpoint and VerifyFPU have one byte first instruction.
384     // Also first instruction will be one byte "push(rbp)" if stack banging
385     // code is not generated (see build_frame() above).
386     // For all these cases generate long instruction first.
387     fat_nop();
388   }
389   if (breakAtEntry) int3();
390   // build frame
391   IA32_ONLY( verify_FPU(0, "method_entry"); )
392 }
393 
394 int C1_MacroAssembler::scalarized_entry(const CompiledEntrySignature* ces, int frame_size_in_bytes, int bang_size_in_bytes, int sp_offset_for_orig_pc, Label& verified_inline_entry_label, bool is_inline_ro_entry) {
395   assert(InlineTypePassFieldsAsArgs, "sanity");
396   // Make sure there is enough stack space for this method's activation.
397   assert(bang_size_in_bytes >= frame_size_in_bytes, "stack bang size incorrect");
398   generate_stack_overflow_check(bang_size_in_bytes);
399 
400   GrowableArray<SigEntry>* sig    = ces->sig();
401   GrowableArray<SigEntry>* sig_cc = is_inline_ro_entry ? ces->sig_cc_ro() : ces->sig_cc();
402   VMRegPair* regs      = ces->regs();
403   VMRegPair* regs_cc   = is_inline_ro_entry ? ces->regs_cc_ro() : ces->regs_cc();
404   int args_on_stack    = ces->args_on_stack();
405   int args_on_stack_cc = is_inline_ro_entry ? ces->args_on_stack_cc_ro() : ces->args_on_stack_cc();
406 
407   assert(sig->length() <= sig_cc->length(), "Zero-sized inline class not allowed!");
408   BasicType* sig_bt = NEW_RESOURCE_ARRAY(BasicType, sig_cc->length());
409   int args_passed = sig->length();
410   int args_passed_cc = SigEntry::fill_sig_bt(sig_cc, sig_bt);
411 
412   // Create a temp frame so we can call into the runtime. It must be properly set up to accommodate GC.
413   build_frame_helper(frame_size_in_bytes, sp_offset_for_orig_pc, 0, true, ces->c1_needs_stack_repair());
414 
415   // The runtime call might safepoint, make sure nmethod entry barrier is executed
416   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
417   // C1 code is not hot enough to micro optimize the nmethod entry barrier with an out-of-line stub
418   bs->nmethod_entry_barrier(this, nullptr /* slow_path */, nullptr /* continuation */);
419 
420   // FIXME -- call runtime only if we cannot in-line allocate all the incoming inline type args.
421   movptr(rbx, (intptr_t)(ces->method()));
422   if (is_inline_ro_entry) {
423     call(RuntimeAddress(Runtime1::entry_for(Runtime1::buffer_inline_args_no_receiver_id)));
424   } else {
425     call(RuntimeAddress(Runtime1::entry_for(Runtime1::buffer_inline_args_id)));
426   }
427   int rt_call_offset = offset();
428 
429   // Remove the temp frame
430   addptr(rsp, frame_size_in_bytes);
431   pop(rbp);
432 
433   // Check if we need to extend the stack for packing
434   int sp_inc = 0;
435   if (args_on_stack > args_on_stack_cc) {
436     sp_inc = extend_stack_for_inline_args(args_on_stack);
437   }
438 
439   shuffle_inline_args(true, is_inline_ro_entry, sig_cc,
440                       args_passed_cc, args_on_stack_cc, regs_cc, // from
441                       args_passed, args_on_stack, regs,          // to
442                       sp_inc, rax);
443 
444   // Create the real frame. Below jump will then skip over the stack banging and frame
445   // setup code in the verified_inline_entry (which has a different real_frame_size).
446   build_frame_helper(frame_size_in_bytes, sp_offset_for_orig_pc, sp_inc, false, ces->c1_needs_stack_repair());
447 
448   jmp(verified_inline_entry_label);
449   return rt_call_offset;
450 }
451 
452 void C1_MacroAssembler::load_parameter(int offset_in_words, Register reg) {
453   // rbp, + 0: link
454   //     + 1: return address
455   //     + 2: argument with offset 0
456   //     + 3: argument with offset 1
457   //     + 4: ...
458 
459   movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
460 }
461 
462 #ifndef PRODUCT
463 
464 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
465   if (!VerifyOops) return;
466   verify_oop_addr(Address(rsp, stack_offset));
467 }
468 
469 void C1_MacroAssembler::verify_not_null_oop(Register r) {
470   if (!VerifyOops) return;
471   Label not_null;
472   testptr(r, r);
473   jcc(Assembler::notZero, not_null);
474   stop("non-null oop required");
475   bind(not_null);
476   verify_oop(r);
477 }
478 
479 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
480 #ifdef ASSERT
481   if (inv_rax) movptr(rax, 0xDEAD);
482   if (inv_rbx) movptr(rbx, 0xDEAD);
483   if (inv_rcx) movptr(rcx, 0xDEAD);
484   if (inv_rdx) movptr(rdx, 0xDEAD);
485   if (inv_rsi) movptr(rsi, 0xDEAD);
486   if (inv_rdi) movptr(rdi, 0xDEAD);
487 #endif
488 }
489 
490 #endif // ifndef PRODUCT