1 /*
2 * Copyright (c) 1999, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "ci/ciUtilities.hpp"
32 #include "compiler/compilerDefinitions.inline.hpp"
33 #include "compiler/oopMap.hpp"
34 #include "gc/shared/cardTable.hpp"
35 #include "gc/shared/cardTableBarrierSet.hpp"
36 #include "gc/shared/collectedHeap.hpp"
37 #include "gc/shared/tlab_globals.hpp"
38 #include "interpreter/interpreter.hpp"
39 #include "memory/universe.hpp"
40 #include "nativeInst_x86.hpp"
41 #include "oops/oop.inline.hpp"
42 #include "prims/jvmtiExport.hpp"
43 #include "register_x86.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/signature.hpp"
46 #include "runtime/stubRoutines.hpp"
47 #include "runtime/vframeArray.hpp"
48 #include "utilities/macros.hpp"
49 #include "vmreg_x86.inline.hpp"
50
51 // Implementation of StubAssembler
52
53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
54 // setup registers
55 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
56 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
57 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
58 assert(args_size >= 0, "illegal args_size");
59 bool align_stack = false;
60 #ifdef _LP64
61 // At a method handle call, the stack may not be properly aligned
62 // when returning with an exception.
63 align_stack = (stub_id() == (int)C1StubId::handle_exception_from_callee_id);
64 #endif
65
66 #ifdef _LP64
67 mov(c_rarg0, thread);
68 set_num_rt_args(0); // Nothing on stack
69 #else
70 set_num_rt_args(1 + args_size);
71
72 // push java thread (becomes first argument of C function)
73 get_thread(thread);
74 push(thread);
75 #endif // _LP64
76
77 int call_offset = -1;
78 if (!align_stack) {
79 set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
80 } else {
81 address the_pc = pc();
82 call_offset = offset();
83 set_last_Java_frame(thread, noreg, rbp, the_pc, rscratch1);
84 andptr(rsp, -(StackAlignmentInBytes)); // Align stack
85 }
86
87 // do the call
88 call(RuntimeAddress(entry));
89 if (!align_stack) {
90 call_offset = offset();
91 }
92 // verify callee-saved register
93 #ifdef ASSERT
94 guarantee(thread != rax, "change this code");
95 push(rax);
96 { Label L;
97 get_thread(rax);
98 cmpptr(thread, rax);
99 jcc(Assembler::equal, L);
100 int3();
101 stop("StubAssembler::call_RT: rdi not callee saved?");
102 bind(L);
103 }
104 pop(rax);
105 #endif
106 reset_last_Java_frame(thread, true);
107
108 // discard thread and arguments
109 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
110
111 // check for pending exceptions
112 { Label L;
113 cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
114 jcc(Assembler::equal, L);
115 // exception pending => remove activation and forward to exception handler
116 movptr(rax, Address(thread, Thread::pending_exception_offset()));
117 // make sure that the vm_results are cleared
118 if (oop_result1->is_valid()) {
119 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
120 }
121 if (metadata_result->is_valid()) {
122 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
123 }
124 if (frame_size() == no_frame_size) {
125 leave();
126 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
127 } else if (_stub_id == (int)C1StubId::forward_exception_id) {
128 should_not_reach_here();
129 } else {
130 jump(RuntimeAddress(Runtime1::entry_for(C1StubId::forward_exception_id)));
131 }
132 bind(L);
133 }
134 // get oop results if there are any and reset the values in the thread
135 if (oop_result1->is_valid()) {
136 get_vm_result(oop_result1, thread);
137 }
138 if (metadata_result->is_valid()) {
139 get_vm_result_2(metadata_result, thread);
140 }
141
142 assert(call_offset >= 0, "Should be set");
143 return call_offset;
144 }
145
146
147 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
148 #ifdef _LP64
149 mov(c_rarg1, arg1);
150 #else
151 push(arg1);
152 #endif // _LP64
153 return call_RT(oop_result1, metadata_result, entry, 1);
154 }
155
156
157 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
158 #ifdef _LP64
159 if (c_rarg1 == arg2) {
160 if (c_rarg2 == arg1) {
161 xchgq(arg1, arg2);
162 } else {
163 mov(c_rarg2, arg2);
164 mov(c_rarg1, arg1);
165 }
166 } else {
167 mov(c_rarg1, arg1);
168 mov(c_rarg2, arg2);
169 }
170 #else
171 push(arg2);
172 push(arg1);
173 #endif // _LP64
174 return call_RT(oop_result1, metadata_result, entry, 2);
175 }
176
177
178 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
179 #ifdef _LP64
180 // if there is any conflict use the stack
181 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
182 arg2 == c_rarg1 || arg2 == c_rarg3 ||
183 arg3 == c_rarg1 || arg3 == c_rarg2) {
184 push(arg3);
185 push(arg2);
186 push(arg1);
187 pop(c_rarg1);
188 pop(c_rarg2);
189 pop(c_rarg3);
190 } else {
191 mov(c_rarg1, arg1);
192 mov(c_rarg2, arg2);
193 mov(c_rarg3, arg3);
194 }
195 #else
196 push(arg3);
197 push(arg2);
198 push(arg1);
199 #endif // _LP64
200 return call_RT(oop_result1, metadata_result, entry, 3);
201 }
202
203
204 // Implementation of StubFrame
205
206 class StubFrame: public StackObj {
207 private:
208 StubAssembler* _sasm;
209
210 public:
211 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
212 void load_argument(int offset_in_words, Register reg);
213
214 ~StubFrame();
215 };
216
217 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
218 set_info(name, must_gc_arguments);
219 enter();
220 }
221
222 void StubAssembler::epilogue() {
223 leave();
224 ret(0);
225 }
226
227 #define __ _sasm->
228
229 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
230 _sasm = sasm;
231 __ prologue(name, must_gc_arguments);
232 }
233
234 // load parameters that were stored with LIR_Assembler::store_parameter
235 // Note: offsets for store_parameter and load_argument must match
236 void StubFrame::load_argument(int offset_in_words, Register reg) {
237 __ load_parameter(offset_in_words, reg);
238 }
239
240
241 StubFrame::~StubFrame() {
242 __ epilogue();
243 }
244
245 #undef __
246
247
248 // Implementation of Runtime1
249
250 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
251 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
252
253 // Stack layout for saving/restoring all the registers needed during a runtime
254 // call (this includes deoptimization)
255 // Note: note that users of this frame may well have arguments to some runtime
256 // while these values are on the stack. These positions neglect those arguments
257 // but the code in save_live_registers will take the argument count into
258 // account.
259 //
260 #ifdef _LP64
261 #define SLOT2(x) x,
262 #define SLOT_PER_WORD 2
263 #else
264 #define SLOT2(x)
265 #define SLOT_PER_WORD 1
266 #endif // _LP64
267
268 enum reg_save_layout {
269 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
270 // happen and will assert if the stack size we create is misaligned
271 #ifdef _LP64
272 align_dummy_0, align_dummy_1,
273 #endif // _LP64
274 #ifdef _WIN64
275 // Windows always allocates space for it's argument registers (see
276 // frame::arg_reg_save_area_bytes).
277 arg_reg_save_1, arg_reg_save_1H, // 0, 4
278 arg_reg_save_2, arg_reg_save_2H, // 8, 12
279 arg_reg_save_3, arg_reg_save_3H, // 16, 20
280 arg_reg_save_4, arg_reg_save_4H, // 24, 28
281 #endif // _WIN64
282 xmm_regs_as_doubles_off, // 32
283 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
284 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
285 // fpu_state_end_off is exclusive
286 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
287 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
288 extra_space_offset, // 360
289 #ifdef _LP64
290 r15_off = extra_space_offset, r15H_off, // 360, 364
291 r14_off, r14H_off, // 368, 372
292 r13_off, r13H_off, // 376, 380
293 r12_off, r12H_off, // 384, 388
294 r11_off, r11H_off, // 392, 396
295 r10_off, r10H_off, // 400, 404
296 r9_off, r9H_off, // 408, 412
297 r8_off, r8H_off, // 416, 420
298 rdi_off, rdiH_off, // 424, 428
299 #else
300 rdi_off = extra_space_offset,
301 #endif // _LP64
302 rsi_off, SLOT2(rsiH_off) // 432, 436
303 rbp_off, SLOT2(rbpH_off) // 440, 444
304 rsp_off, SLOT2(rspH_off) // 448, 452
305 rbx_off, SLOT2(rbxH_off) // 456, 460
306 rdx_off, SLOT2(rdxH_off) // 464, 468
307 rcx_off, SLOT2(rcxH_off) // 472, 476
308 rax_off, SLOT2(raxH_off) // 480, 484
309 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
310 return_off, SLOT2(returnH_off) // 496, 500
311 reg_save_frame_size // As noted: neglects any parameters to runtime // 504
312 };
313
314 // Save off registers which might be killed by calls into the runtime.
315 // Tries to smart of about FP registers. In particular we separate
316 // saving and describing the FPU registers for deoptimization since we
317 // have to save the FPU registers twice if we describe them and on P4
318 // saving FPU registers which don't contain anything appears
319 // expensive. The deopt blob is the only thing which needs to
320 // describe FPU registers. In all other cases it should be sufficient
321 // to simply save their current value.
322 //
323 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
324 bool save_fpu_registers = true) {
325
326 // In 64bit all the args are in regs so there are no additional stack slots
327 LP64_ONLY(num_rt_args = 0);
328 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
329 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
330 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
331
332 // record saved value locations in an OopMap
333 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
334 OopMap* map = new OopMap(frame_size_in_slots, 0);
335 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
336 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
337 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
338 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
339 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
340 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
341 #ifdef _LP64
342 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
343 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
344 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
345 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
346 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
347 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
348 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
349 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
350
351 // This is stupid but needed.
352 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
353 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
354 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
355 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
356 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
357 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
358
359 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
360 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
361 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
362 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
363 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
364 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
365 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
366 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
367 #endif // _LP64
368
369 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
370
371 if (save_fpu_registers) {
372 #ifndef _LP64
373 if (UseSSE < 2) {
374 int fpu_off = float_regs_as_doubles_off;
375 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
376 VMReg fpu_name_0 = FrameMap::fpu_regname(n);
377 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
378 // %%% This is really a waste but we'll keep things as they were for now
379 if (true) {
380 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
381 }
382 fpu_off += 2;
383 }
384 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
385
386 if (UseSSE == 1) {
387 int xmm_off = xmm_regs_as_doubles_off;
388 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
389 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
390 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
391 xmm_off += 2;
392 }
393 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
394 }
395 }
396 #endif // !LP64
397
398 if (UseSSE >= 2) {
399 int xmm_off = xmm_regs_as_doubles_off;
400 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
401 if (n < xmm_bypass_limit) {
402 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
403 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
404 // %%% This is really a waste but we'll keep things as they were for now
405 if (true) {
406 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
407 }
408 }
409 xmm_off += 2;
410 }
411 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
412 }
413 }
414
415 return map;
416 }
417
418 #define __ this->
419
420 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
421 __ block_comment("save_live_registers");
422
423 // Push CPU state in multiple of 16 bytes
424 #ifdef _LP64
425 __ save_legacy_gprs();
426 #else
427 __ pusha();
428 #endif
429
430 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
431 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
432
433 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
434
435 #ifdef ASSERT
436 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
437 #endif
438
439 if (save_fpu_registers) {
440 #ifndef _LP64
441 if (UseSSE < 2) {
442 // save FPU stack
443 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
444 __ fwait();
445
446 #ifdef ASSERT
447 Label ok;
448 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
449 __ jccb(Assembler::equal, ok);
450 __ stop("corrupted control word detected");
451 __ bind(ok);
452 #endif
453
454 // Reset the control word to guard against exceptions being unmasked
455 // since fstp_d can cause FPU stack underflow exceptions. Write it
456 // into the on stack copy and then reload that to make sure that the
457 // current and future values are correct.
458 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
459 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
460
461 // Save the FPU registers in de-opt-able form
462 int offset = 0;
463 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
464 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
465 offset += 8;
466 }
467
468 if (UseSSE == 1) {
469 // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
470 int offset = 0;
471 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
472 XMMRegister xmm_name = as_XMMRegister(n);
473 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
474 offset += 8;
475 }
476 }
477 }
478 #endif // !_LP64
479
480 if (UseSSE >= 2) {
481 // save XMM registers
482 // XMM registers can contain float or double values, but this is not known here,
483 // so always save them as doubles.
484 // note that float values are _not_ converted automatically, so for float values
485 // the second word contains only garbage data.
486 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
487 int offset = 0;
488 for (int n = 0; n < xmm_bypass_limit; n++) {
489 XMMRegister xmm_name = as_XMMRegister(n);
490 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
491 offset += 8;
492 }
493 }
494 }
495
496 // FPU stack must be empty now
497 NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
498 }
499
500 #undef __
501 #define __ sasm->
502
503 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
504 #ifdef _LP64
505 if (restore_fpu_registers) {
506 // restore XMM registers
507 int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
508 int offset = 0;
509 for (int n = 0; n < xmm_bypass_limit; n++) {
510 XMMRegister xmm_name = as_XMMRegister(n);
511 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
512 offset += 8;
513 }
514 }
515 #else
516 if (restore_fpu_registers) {
517 if (UseSSE >= 2) {
518 // restore XMM registers
519 int xmm_bypass_limit = FrameMap::nof_xmm_regs;
520 int offset = 0;
521 for (int n = 0; n < xmm_bypass_limit; n++) {
522 XMMRegister xmm_name = as_XMMRegister(n);
523 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
524 offset += 8;
525 }
526 } else if (UseSSE == 1) {
527 // restore XMM registers(num MMX == num fpu)
528 int offset = 0;
529 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
530 XMMRegister xmm_name = as_XMMRegister(n);
531 __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
532 offset += 8;
533 }
534 }
535
536 if (UseSSE < 2) {
537 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
538 } else {
539 // check that FPU stack is really empty
540 __ verify_FPU(0, "restore_live_registers");
541 }
542 } else {
543 // check that FPU stack is really empty
544 __ verify_FPU(0, "restore_live_registers");
545 }
546 #endif // _LP64
547
548 #ifdef ASSERT
549 {
550 Label ok;
551 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
552 __ jcc(Assembler::equal, ok);
553 __ stop("bad offsets in frame");
554 __ bind(ok);
555 }
556 #endif // ASSERT
557
558 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
559 }
560
561 #undef __
562 #define __ this->
563
564 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
565 __ block_comment("restore_live_registers");
566
567 restore_fpu(this, restore_fpu_registers);
568 #ifdef _LP64
569 __ restore_legacy_gprs();
570 #else
571 __ popa();
572 #endif
573
574 }
575
576
577 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
578 __ block_comment("restore_live_registers_except_rax");
579
580 restore_fpu(this, restore_fpu_registers);
581
582 #ifdef _LP64
583 __ movptr(r15, Address(rsp, 0));
584 __ movptr(r14, Address(rsp, wordSize));
585 __ movptr(r13, Address(rsp, 2 * wordSize));
586 __ movptr(r12, Address(rsp, 3 * wordSize));
587 __ movptr(r11, Address(rsp, 4 * wordSize));
588 __ movptr(r10, Address(rsp, 5 * wordSize));
589 __ movptr(r9, Address(rsp, 6 * wordSize));
590 __ movptr(r8, Address(rsp, 7 * wordSize));
591 __ movptr(rdi, Address(rsp, 8 * wordSize));
592 __ movptr(rsi, Address(rsp, 9 * wordSize));
593 __ movptr(rbp, Address(rsp, 10 * wordSize));
594 // skip rsp
595 __ movptr(rbx, Address(rsp, 12 * wordSize));
596 __ movptr(rdx, Address(rsp, 13 * wordSize));
597 __ movptr(rcx, Address(rsp, 14 * wordSize));
598
599 __ addptr(rsp, 16 * wordSize);
600 #else
601
602 __ pop(rdi);
603 __ pop(rsi);
604 __ pop(rbp);
605 __ pop(rbx); // skip this value
606 __ pop(rbx);
607 __ pop(rdx);
608 __ pop(rcx);
609 __ addptr(rsp, BytesPerWord);
610 #endif // _LP64
611 }
612
613 #undef __
614 #define __ sasm->
615
616 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
617 bool save_fpu_registers = true) {
618 __ save_live_registers_no_oop_map(save_fpu_registers);
619 return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
620 }
621
622 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
623 __ restore_live_registers(restore_fpu_registers);
624 }
625
626 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
627 sasm->restore_live_registers_except_rax(restore_fpu_registers);
628 }
629
630
631 void Runtime1::initialize_pd() {
632 // nothing to do
633 }
634
635
636 // Target: the entry point of the method that creates and posts the exception oop.
637 // has_argument: true if the exception needs arguments (passed on the stack because
638 // registers must be preserved).
639 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
640 // Preserve all registers.
641 int num_rt_args = has_argument ? (2 + 1) : 1;
642 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
643
644 // Now all registers are saved and can be used freely.
645 // Verify that no old value is used accidentally.
646 __ invalidate_registers(true, true, true, true, true, true);
647
648 // Registers used by this stub.
649 const Register temp_reg = rbx;
650
651 // Load arguments for exception that are passed as arguments into the stub.
652 if (has_argument) {
653 #ifdef _LP64
654 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
655 __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
656 #else
657 __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
658 __ push(temp_reg);
659 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
660 __ push(temp_reg);
661 #endif // _LP64
662 }
663 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
664
665 OopMapSet* oop_maps = new OopMapSet();
666 oop_maps->add_gc_map(call_offset, oop_map);
667
668 __ stop("should not reach here");
669
670 return oop_maps;
671 }
672
673
674 OopMapSet* Runtime1::generate_handle_exception(C1StubId id, StubAssembler *sasm) {
675 __ block_comment("generate_handle_exception");
676
677 // incoming parameters
678 const Register exception_oop = rax;
679 const Register exception_pc = rdx;
680 // other registers used in this stub
681 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
682
683 // Save registers, if required.
684 OopMapSet* oop_maps = new OopMapSet();
685 OopMap* oop_map = nullptr;
686 switch (id) {
687 case C1StubId::forward_exception_id:
688 // We're handling an exception in the context of a compiled frame.
689 // The registers have been saved in the standard places. Perform
690 // an exception lookup in the caller and dispatch to the handler
691 // if found. Otherwise unwind and dispatch to the callers
692 // exception handler.
693 oop_map = generate_oop_map(sasm, 1 /*thread*/);
694
695 // load and clear pending exception oop into RAX
696 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
697 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
698
699 // load issuing PC (the return address for this stub) into rdx
700 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
701
702 // make sure that the vm_results are cleared (may be unnecessary)
703 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
704 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
705 break;
706 case C1StubId::handle_exception_nofpu_id:
707 case C1StubId::handle_exception_id:
708 // At this point all registers MAY be live.
709 oop_map = save_live_registers(sasm, 1 /*thread*/, id != C1StubId::handle_exception_nofpu_id);
710 break;
711 case C1StubId::handle_exception_from_callee_id: {
712 // At this point all registers except exception oop (RAX) and
713 // exception pc (RDX) are dead.
714 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
715 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
716 sasm->set_frame_size(frame_size);
717 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
718 break;
719 }
720 default: ShouldNotReachHere();
721 }
722
723 #if !defined(_LP64) && defined(COMPILER2)
724 if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
725 // C2 can leave the fpu stack dirty
726 __ empty_FPU_stack();
727 }
728 #endif // !_LP64 && COMPILER2
729
730 // verify that only rax, and rdx is valid at this time
731 __ invalidate_registers(false, true, true, false, true, true);
732 // verify that rax, contains a valid exception
733 __ verify_not_null_oop(exception_oop);
734
735 // load address of JavaThread object for thread-local data
736 NOT_LP64(__ get_thread(thread);)
737
738 #ifdef ASSERT
739 // check that fields in JavaThread for exception oop and issuing pc are
740 // empty before writing to them
741 Label oop_empty;
742 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
743 __ jcc(Assembler::equal, oop_empty);
744 __ stop("exception oop already set");
745 __ bind(oop_empty);
746
747 Label pc_empty;
748 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
749 __ jcc(Assembler::equal, pc_empty);
750 __ stop("exception pc already set");
751 __ bind(pc_empty);
752 #endif
753
754 // save exception oop and issuing pc into JavaThread
755 // (exception handler will load it from here)
756 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
757 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
758
759 // patch throwing pc into return address (has bci & oop map)
760 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
761
762 // compute the exception handler.
763 // the exception oop and the throwing pc are read from the fields in JavaThread
764 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
765 oop_maps->add_gc_map(call_offset, oop_map);
766
767 // rax: handler address
768 // will be the deopt blob if nmethod was deoptimized while we looked up
769 // handler regardless of whether handler existed in the nmethod.
770
771 // only rax, is valid at this time, all other registers have been destroyed by the runtime call
772 __ invalidate_registers(false, true, true, true, true, true);
773
774 // patch the return address, this stub will directly return to the exception handler
775 __ movptr(Address(rbp, 1*BytesPerWord), rax);
776
777 switch (id) {
778 case C1StubId::forward_exception_id:
779 case C1StubId::handle_exception_nofpu_id:
780 case C1StubId::handle_exception_id:
781 // Restore the registers that were saved at the beginning.
782 restore_live_registers(sasm, id != C1StubId::handle_exception_nofpu_id);
783 break;
784 case C1StubId::handle_exception_from_callee_id:
785 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
786 // since we do a leave anyway.
787
788 // Pop the return address.
789 __ leave();
790 __ pop(rcx);
791 __ jmp(rcx); // jump to exception handler
792 break;
793 default: ShouldNotReachHere();
794 }
795
796 return oop_maps;
797 }
798
799
800 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
801 // incoming parameters
802 const Register exception_oop = rax;
803 // callee-saved copy of exception_oop during runtime call
804 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
805 // other registers used in this stub
806 const Register exception_pc = rdx;
807 const Register handler_addr = rbx;
808 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
809
810 if (AbortVMOnException) {
811 __ enter();
812 save_live_registers(sasm, 2);
813 __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), rax);
814 restore_live_registers(sasm);
815 __ leave();
816 }
817
818 // verify that only rax, is valid at this time
819 __ invalidate_registers(false, true, true, true, true, true);
820
821 #ifdef ASSERT
822 // check that fields in JavaThread for exception oop and issuing pc are empty
823 NOT_LP64(__ get_thread(thread);)
824 Label oop_empty;
825 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
826 __ jcc(Assembler::equal, oop_empty);
827 __ stop("exception oop must be empty");
828 __ bind(oop_empty);
829
830 Label pc_empty;
831 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
832 __ jcc(Assembler::equal, pc_empty);
833 __ stop("exception pc must be empty");
834 __ bind(pc_empty);
835 #endif
836
837 // clear the FPU stack in case any FPU results are left behind
838 NOT_LP64( __ empty_FPU_stack(); )
839
840 // save exception_oop in callee-saved register to preserve it during runtime calls
841 __ verify_not_null_oop(exception_oop);
842 __ movptr(exception_oop_callee_saved, exception_oop);
843
844 NOT_LP64(__ get_thread(thread);)
845 // Get return address (is on top of stack after leave).
846 __ movptr(exception_pc, Address(rsp, 0));
847
848 // search the exception handler address of the caller (using the return address)
849 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
850 // rax: exception handler address of the caller
851
852 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
853 __ invalidate_registers(false, true, true, true, false, true);
854
855 // move result of call into correct register
856 __ movptr(handler_addr, rax);
857
858 // Restore exception oop to RAX (required convention of exception handler).
859 __ movptr(exception_oop, exception_oop_callee_saved);
860
861 // verify that there is really a valid exception in rax
862 __ verify_not_null_oop(exception_oop);
863
864 // get throwing pc (= return address).
865 // rdx has been destroyed by the call, so it must be set again
866 // the pop is also necessary to simulate the effect of a ret(0)
867 __ pop(exception_pc);
868
869 // continue at exception handler (return address removed)
870 // note: do *not* remove arguments when unwinding the
871 // activation since the caller assumes having
872 // all arguments on the stack when entering the
873 // runtime to determine the exception handler
874 // (GC happens at call site with arguments!)
875 // rax: exception oop
876 // rdx: throwing pc
877 // rbx: exception handler
878 __ jmp(handler_addr);
879 }
880
881
882 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
883 // use the maximum number of runtime-arguments here because it is difficult to
884 // distinguish each RT-Call.
885 // Note: This number affects also the RT-Call in generate_handle_exception because
886 // the oop-map is shared for all calls.
887 const int num_rt_args = 2; // thread + dummy
888
889 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
890 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
891
892 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
893
894 #ifdef _LP64
895 const Register thread = r15_thread;
896 // No need to worry about dummy
897 __ mov(c_rarg0, thread);
898 #else
899 __ push(rax); // push dummy
900
901 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
902 // push java thread (becomes first argument of C function)
903 __ get_thread(thread);
904 __ push(thread);
905 #endif // _LP64
906 __ set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
907 // do the call
908 __ call(RuntimeAddress(target));
909 OopMapSet* oop_maps = new OopMapSet();
910 oop_maps->add_gc_map(__ offset(), oop_map);
911 // verify callee-saved register
912 #ifdef ASSERT
913 guarantee(thread != rax, "change this code");
914 __ push(rax);
915 { Label L;
916 __ get_thread(rax);
917 __ cmpptr(thread, rax);
918 __ jcc(Assembler::equal, L);
919 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
920 __ bind(L);
921 }
922 __ pop(rax);
923 #endif
924 __ reset_last_Java_frame(thread, true);
925 #ifndef _LP64
926 __ pop(rcx); // discard thread arg
927 __ pop(rcx); // discard dummy
928 #endif // _LP64
929
930 // check for pending exceptions
931 { Label L;
932 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
933 __ jcc(Assembler::equal, L);
934 // exception pending => remove activation and forward to exception handler
935
936 __ testptr(rax, rax); // have we deoptimized?
937 __ jump_cc(Assembler::equal,
938 RuntimeAddress(Runtime1::entry_for(C1StubId::forward_exception_id)));
939
940 // the deopt blob expects exceptions in the special fields of
941 // JavaThread, so copy and clear pending exception.
942
943 // load and clear pending exception
944 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
945 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
946
947 // check that there is really a valid exception
948 __ verify_not_null_oop(rax);
949
950 // load throwing pc: this is the return address of the stub
951 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
952
953 #ifdef ASSERT
954 // check that fields in JavaThread for exception oop and issuing pc are empty
955 Label oop_empty;
956 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
957 __ jcc(Assembler::equal, oop_empty);
958 __ stop("exception oop must be empty");
959 __ bind(oop_empty);
960
961 Label pc_empty;
962 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
963 __ jcc(Assembler::equal, pc_empty);
964 __ stop("exception pc must be empty");
965 __ bind(pc_empty);
966 #endif
967
968 // store exception oop and throwing pc to JavaThread
969 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
970 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
971
972 restore_live_registers(sasm);
973
974 __ leave();
975 __ addptr(rsp, BytesPerWord); // remove return address from stack
976
977 // Forward the exception directly to deopt blob. We can blow no
978 // registers and must leave throwing pc on the stack. A patch may
979 // have values live in registers so the entry point with the
980 // exception in tls.
981 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
982
983 __ bind(L);
984 }
985
986
987 // Runtime will return true if the nmethod has been deoptimized during
988 // the patching process. In that case we must do a deopt reexecute instead.
989
990 Label cont;
991
992 __ testptr(rax, rax); // have we deoptimized?
993 __ jcc(Assembler::equal, cont); // no
994
995 // Will reexecute. Proper return address is already on the stack we just restore
996 // registers, pop all of our frame but the return address and jump to the deopt blob
997 restore_live_registers(sasm);
998 __ leave();
999 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1000
1001 __ bind(cont);
1002 restore_live_registers(sasm);
1003 __ leave();
1004 __ ret(0);
1005
1006 return oop_maps;
1007 }
1008
1009
1010 OopMapSet* Runtime1::generate_code_for(C1StubId id, StubAssembler* sasm) {
1011
1012 // for better readability
1013 const bool must_gc_arguments = true;
1014 const bool dont_gc_arguments = false;
1015
1016 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1017 bool save_fpu_registers = true;
1018
1019 // stub code & info for the different stubs
1020 OopMapSet* oop_maps = nullptr;
1021 switch (id) {
1022 case C1StubId::forward_exception_id:
1023 {
1024 oop_maps = generate_handle_exception(id, sasm);
1025 __ leave();
1026 __ ret(0);
1027 }
1028 break;
1029
1030 case C1StubId::new_instance_id:
1031 case C1StubId::fast_new_instance_id:
1032 case C1StubId::fast_new_instance_init_check_id:
1033 {
1034 Register klass = rdx; // Incoming
1035 Register obj = rax; // Result
1036
1037 if (id == C1StubId::new_instance_id) {
1038 __ set_info("new_instance", dont_gc_arguments);
1039 } else if (id == C1StubId::fast_new_instance_id) {
1040 __ set_info("fast new_instance", dont_gc_arguments);
1041 } else {
1042 assert(id == C1StubId::fast_new_instance_init_check_id, "bad C1StubId");
1043 __ set_info("fast new_instance init check", dont_gc_arguments);
1044 }
1045
1046 __ enter();
1047 OopMap* map = save_live_registers(sasm, 2);
1048 int call_offset;
1049 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1050 oop_maps = new OopMapSet();
1051 oop_maps->add_gc_map(call_offset, map);
1052 restore_live_registers_except_rax(sasm);
1053 __ verify_oop(obj);
1054 __ leave();
1055 __ ret(0);
1056
1057 // rax,: new instance
1058 }
1059
1060 break;
1061
1062 case C1StubId::counter_overflow_id:
1063 {
1064 Register bci = rax, method = rbx;
1065 __ enter();
1066 OopMap* map = save_live_registers(sasm, 3);
1067 // Retrieve bci
1068 __ movl(bci, Address(rbp, 2*BytesPerWord));
1069 // And a pointer to the Method*
1070 __ movptr(method, Address(rbp, 3*BytesPerWord));
1071 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1072 oop_maps = new OopMapSet();
1073 oop_maps->add_gc_map(call_offset, map);
1074 restore_live_registers(sasm);
1075 __ leave();
1076 __ ret(0);
1077 }
1078 break;
1079
1080 case C1StubId::new_type_array_id:
1081 case C1StubId::new_object_array_id:
1082 case C1StubId::new_null_free_array_id:
1083 {
1084 Register length = rbx; // Incoming
1085 Register klass = rdx; // Incoming
1086 Register obj = rax; // Result
1087
1088 if (id == C1StubId::new_type_array_id) {
1089 __ set_info("new_type_array", dont_gc_arguments);
1090 } else if (id == C1StubId::new_object_array_id) {
1091 __ set_info("new_object_array", dont_gc_arguments);
1092 } else {
1093 __ set_info("new_null_free_array", dont_gc_arguments);
1094 }
1095
1096 #ifdef ASSERT
1097 // assert object type is really an array of the proper kind
1098 {
1099 Label ok;
1100 Register t0 = obj;
1101 __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1102 __ sarl(t0, Klass::_lh_array_tag_shift);
1103 switch (id) {
1104 case C1StubId::new_type_array_id:
1105 __ cmpl(t0, Klass::_lh_array_tag_type_value);
1106 __ jcc(Assembler::equal, ok);
1107 __ stop("assert(is a type array klass)");
1108 break;
1109 case C1StubId::new_object_array_id:
1110 __ cmpl(t0, Klass::_lh_array_tag_obj_value); // new "[Ljava/lang/Object;"
1111 __ jcc(Assembler::equal, ok);
1112 __ cmpl(t0, Klass::_lh_array_tag_vt_value); // new "[LVT;"
1113 __ jcc(Assembler::equal, ok);
1114 __ stop("assert(is an object or inline type array klass)");
1115 break;
1116 case C1StubId::new_null_free_array_id:
1117 __ cmpl(t0, Klass::_lh_array_tag_vt_value); // the array can be a flat array.
1118 __ jcc(Assembler::equal, ok);
1119 __ cmpl(t0, Klass::_lh_array_tag_obj_value); // the array cannot be a flat array (due to InlineArrayElementMaxFlatSize, etc)
1120 __ jcc(Assembler::equal, ok);
1121 __ stop("assert(is an object or inline type array klass)");
1122 break;
1123 default: ShouldNotReachHere();
1124 }
1125 __ should_not_reach_here();
1126 __ bind(ok);
1127 }
1128 #endif // ASSERT
1129
1130 __ enter();
1131 OopMap* map = save_live_registers(sasm, 3);
1132 int call_offset;
1133 if (id == C1StubId::new_type_array_id) {
1134 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1135 } else if (id == C1StubId::new_object_array_id) {
1136 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1137 } else {
1138 assert(id == C1StubId::new_null_free_array_id, "must be");
1139 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_null_free_array), klass, length);
1140 }
1141
1142 oop_maps = new OopMapSet();
1143 oop_maps->add_gc_map(call_offset, map);
1144 restore_live_registers_except_rax(sasm);
1145
1146 __ verify_oop(obj);
1147 __ leave();
1148 __ ret(0);
1149
1150 // rax,: new array
1151 }
1152 break;
1153
1154 case C1StubId::new_multi_array_id:
1155 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1156 // rax,: klass
1157 // rbx,: rank
1158 // rcx: address of 1st dimension
1159 OopMap* map = save_live_registers(sasm, 4);
1160 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1161
1162 oop_maps = new OopMapSet();
1163 oop_maps->add_gc_map(call_offset, map);
1164 restore_live_registers_except_rax(sasm);
1165
1166 // rax,: new multi array
1167 __ verify_oop(rax);
1168 }
1169 break;
1170
1171 case C1StubId::load_flat_array_id:
1172 {
1173 StubFrame f(sasm, "load_flat_array", dont_gc_arguments);
1174 OopMap* map = save_live_registers(sasm, 3);
1175
1176 // Called with store_parameter and not C abi
1177
1178 f.load_argument(1, rax); // rax,: array
1179 f.load_argument(0, rbx); // rbx,: index
1180 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, load_flat_array), rax, rbx);
1181
1182 oop_maps = new OopMapSet();
1183 oop_maps->add_gc_map(call_offset, map);
1184 restore_live_registers_except_rax(sasm);
1185
1186 // rax,: loaded element at array[index]
1187 __ verify_oop(rax);
1188 }
1189 break;
1190
1191 case C1StubId::store_flat_array_id:
1192 {
1193 StubFrame f(sasm, "store_flat_array", dont_gc_arguments);
1194 OopMap* map = save_live_registers(sasm, 4);
1195
1196 // Called with store_parameter and not C abi
1197
1198 f.load_argument(2, rax); // rax,: array
1199 f.load_argument(1, rbx); // rbx,: index
1200 f.load_argument(0, rcx); // rcx,: value
1201 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, store_flat_array), rax, rbx, rcx);
1202
1203 oop_maps = new OopMapSet();
1204 oop_maps->add_gc_map(call_offset, map);
1205 restore_live_registers_except_rax(sasm);
1206 }
1207 break;
1208
1209 case C1StubId::substitutability_check_id:
1210 {
1211 StubFrame f(sasm, "substitutability_check", dont_gc_arguments);
1212 OopMap* map = save_live_registers(sasm, 3);
1213
1214 // Called with store_parameter and not C abi
1215
1216 f.load_argument(1, rax); // rax,: left
1217 f.load_argument(0, rbx); // rbx,: right
1218 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, substitutability_check), rax, rbx);
1219
1220 oop_maps = new OopMapSet();
1221 oop_maps->add_gc_map(call_offset, map);
1222 restore_live_registers_except_rax(sasm);
1223
1224 // rax,: are the two operands substitutable
1225 }
1226 break;
1227
1228
1229 case C1StubId::buffer_inline_args_id:
1230 case C1StubId::buffer_inline_args_no_receiver_id:
1231 {
1232 const char* name = (id == C1StubId::buffer_inline_args_id) ?
1233 "buffer_inline_args" : "buffer_inline_args_no_receiver";
1234 StubFrame f(sasm, name, dont_gc_arguments);
1235 OopMap* map = save_live_registers(sasm, 2);
1236 Register method = rbx;
1237 address entry = (id == C1StubId::buffer_inline_args_id) ?
1238 CAST_FROM_FN_PTR(address, buffer_inline_args) :
1239 CAST_FROM_FN_PTR(address, buffer_inline_args_no_receiver);
1240 int call_offset = __ call_RT(rax, noreg, entry, method);
1241 oop_maps = new OopMapSet();
1242 oop_maps->add_gc_map(call_offset, map);
1243 restore_live_registers_except_rax(sasm);
1244 __ verify_oop(rax); // rax: an array of buffered value objects
1245 }
1246 break;
1247
1248 case C1StubId::register_finalizer_id:
1249 {
1250 __ set_info("register_finalizer", dont_gc_arguments);
1251
1252 // This is called via call_runtime so the arguments
1253 // will be place in C abi locations
1254
1255 #ifdef _LP64
1256 __ verify_oop(c_rarg0);
1257 __ mov(rax, c_rarg0);
1258 #else
1259 // The object is passed on the stack and we haven't pushed a
1260 // frame yet so it's one work away from top of stack.
1261 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1262 __ verify_oop(rax);
1263 #endif // _LP64
1264
1265 // load the klass and check the has finalizer flag
1266 Label register_finalizer;
1267 Register t = rsi;
1268 __ load_klass(t, rax, rscratch1);
1269 __ testb(Address(t, Klass::misc_flags_offset()), KlassFlags::_misc_has_finalizer);
1270 __ jcc(Assembler::notZero, register_finalizer);
1271 __ ret(0);
1272
1273 __ bind(register_finalizer);
1274 __ enter();
1275 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1276 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1277 oop_maps = new OopMapSet();
1278 oop_maps->add_gc_map(call_offset, oop_map);
1279
1280 // Now restore all the live registers
1281 restore_live_registers(sasm);
1282
1283 __ leave();
1284 __ ret(0);
1285 }
1286 break;
1287
1288 case C1StubId::throw_range_check_failed_id:
1289 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1290 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1291 }
1292 break;
1293
1294 case C1StubId::throw_index_exception_id:
1295 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1296 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1297 }
1298 break;
1299
1300 case C1StubId::throw_div0_exception_id:
1301 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1302 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1303 }
1304 break;
1305
1306 case C1StubId::throw_null_pointer_exception_id:
1307 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1308 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1309 }
1310 break;
1311
1312 case C1StubId::handle_exception_nofpu_id:
1313 case C1StubId::handle_exception_id:
1314 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1315 oop_maps = generate_handle_exception(id, sasm);
1316 }
1317 break;
1318
1319 case C1StubId::handle_exception_from_callee_id:
1320 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1321 oop_maps = generate_handle_exception(id, sasm);
1322 }
1323 break;
1324
1325 case C1StubId::unwind_exception_id:
1326 { __ set_info("unwind_exception", dont_gc_arguments);
1327 // note: no stubframe since we are about to leave the current
1328 // activation and we are calling a leaf VM function only.
1329 generate_unwind_exception(sasm);
1330 }
1331 break;
1332
1333 case C1StubId::throw_array_store_exception_id:
1334 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1335 // tos + 0: link
1336 // + 1: return address
1337 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1338 }
1339 break;
1340
1341 case C1StubId::throw_class_cast_exception_id:
1342 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1343 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1344 }
1345 break;
1346
1347 case C1StubId::throw_incompatible_class_change_error_id:
1348 { StubFrame f(sasm, "throw_incompatible_class_change_error", dont_gc_arguments);
1349 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1350 }
1351 break;
1352
1353 case C1StubId::throw_illegal_monitor_state_exception_id:
1354 { StubFrame f(sasm, "throw_illegal_monitor_state_exception", dont_gc_arguments);
1355 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_illegal_monitor_state_exception), false);
1356 }
1357 break;
1358
1359 case C1StubId::throw_identity_exception_id:
1360 { StubFrame f(sasm, "throw_identity_exception", dont_gc_arguments);
1361 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_identity_exception), true);
1362 }
1363 break;
1364
1365 case C1StubId::slow_subtype_check_id:
1366 {
1367 // Typical calling sequence:
1368 // __ push(klass_RInfo); // object klass or other subclass
1369 // __ push(sup_k_RInfo); // array element klass or other superclass
1370 // __ call(slow_subtype_check);
1371 // Note that the subclass is pushed first, and is therefore deepest.
1372 // Previous versions of this code reversed the names 'sub' and 'super'.
1373 // This was operationally harmless but made the code unreadable.
1374 enum layout {
1375 rax_off, SLOT2(raxH_off)
1376 rcx_off, SLOT2(rcxH_off)
1377 rsi_off, SLOT2(rsiH_off)
1378 rdi_off, SLOT2(rdiH_off)
1379 // saved_rbp_off, SLOT2(saved_rbpH_off)
1380 return_off, SLOT2(returnH_off)
1381 sup_k_off, SLOT2(sup_kH_off)
1382 klass_off, SLOT2(superH_off)
1383 framesize,
1384 result_off = klass_off // deepest argument is also the return value
1385 };
1386
1387 __ set_info("slow_subtype_check", dont_gc_arguments);
1388 __ push(rdi);
1389 __ push(rsi);
1390 __ push(rcx);
1391 __ push(rax);
1392
1393 // This is called by pushing args and not with C abi
1394 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1395 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1396
1397 Label miss;
1398 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, nullptr, &miss);
1399
1400 // fallthrough on success:
1401 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1402 __ pop(rax);
1403 __ pop(rcx);
1404 __ pop(rsi);
1405 __ pop(rdi);
1406 __ ret(0);
1407
1408 __ bind(miss);
1409 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1410 __ pop(rax);
1411 __ pop(rcx);
1412 __ pop(rsi);
1413 __ pop(rdi);
1414 __ ret(0);
1415 }
1416 break;
1417
1418 case C1StubId::monitorenter_nofpu_id:
1419 save_fpu_registers = false;
1420 // fall through
1421 case C1StubId::monitorenter_id:
1422 {
1423 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1424 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1425
1426 // Called with store_parameter and not C abi
1427
1428 f.load_argument(1, rax); // rax,: object
1429 f.load_argument(0, rbx); // rbx,: lock address
1430
1431 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1432
1433 oop_maps = new OopMapSet();
1434 oop_maps->add_gc_map(call_offset, map);
1435 restore_live_registers(sasm, save_fpu_registers);
1436 }
1437 break;
1438
1439 case C1StubId::monitorexit_nofpu_id:
1440 save_fpu_registers = false;
1441 // fall through
1442 case C1StubId::monitorexit_id:
1443 {
1444 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1445 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1446
1447 // Called with store_parameter and not C abi
1448
1449 f.load_argument(0, rax); // rax,: lock address
1450
1451 // note: really a leaf routine but must setup last java sp
1452 // => use call_RT for now (speed can be improved by
1453 // doing last java sp setup manually)
1454 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1455
1456 oop_maps = new OopMapSet();
1457 oop_maps->add_gc_map(call_offset, map);
1458 restore_live_registers(sasm, save_fpu_registers);
1459 }
1460 break;
1461
1462 case C1StubId::deoptimize_id:
1463 {
1464 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1465 const int num_rt_args = 2; // thread, trap_request
1466 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1467 f.load_argument(0, rax);
1468 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1469 oop_maps = new OopMapSet();
1470 oop_maps->add_gc_map(call_offset, oop_map);
1471 restore_live_registers(sasm);
1472 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1473 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1474 __ leave();
1475 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1476 }
1477 break;
1478
1479 case C1StubId::access_field_patching_id:
1480 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1481 // we should set up register map
1482 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1483 }
1484 break;
1485
1486 case C1StubId::load_klass_patching_id:
1487 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1488 // we should set up register map
1489 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1490 }
1491 break;
1492
1493 case C1StubId::load_mirror_patching_id:
1494 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1495 // we should set up register map
1496 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1497 }
1498 break;
1499
1500 case C1StubId::load_appendix_patching_id:
1501 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1502 // we should set up register map
1503 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1504 }
1505 break;
1506
1507 case C1StubId::dtrace_object_alloc_id:
1508 { // rax,: object
1509 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1510 // we can't gc here so skip the oopmap but make sure that all
1511 // the live registers get saved.
1512 save_live_registers(sasm, 1);
1513
1514 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1515 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc))));
1516 NOT_LP64(__ pop(rax));
1517
1518 restore_live_registers(sasm);
1519 }
1520 break;
1521
1522 case C1StubId::fpu2long_stub_id:
1523 {
1524 #ifdef _LP64
1525 Label done;
1526 __ cvttsd2siq(rax, Address(rsp, wordSize));
1527 __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1528 __ jccb(Assembler::notEqual, done);
1529 __ movq(rax, Address(rsp, wordSize));
1530 __ subptr(rsp, 8);
1531 __ movq(Address(rsp, 0), rax);
1532 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1533 __ pop(rax);
1534 __ bind(done);
1535 __ ret(0);
1536 #else
1537 // rax, and rdx are destroyed, but should be free since the result is returned there
1538 // preserve rsi,ecx
1539 __ push(rsi);
1540 __ push(rcx);
1541
1542 // check for NaN
1543 Label return0, do_return, return_min_jlong, do_convert;
1544
1545 Address value_high_word(rsp, wordSize + 4);
1546 Address value_low_word(rsp, wordSize);
1547 Address result_high_word(rsp, 3*wordSize + 4);
1548 Address result_low_word(rsp, 3*wordSize);
1549
1550 __ subptr(rsp, 32); // more than enough on 32bit
1551 __ fst_d(value_low_word);
1552 __ movl(rax, value_high_word);
1553 __ andl(rax, 0x7ff00000);
1554 __ cmpl(rax, 0x7ff00000);
1555 __ jcc(Assembler::notEqual, do_convert);
1556 __ movl(rax, value_high_word);
1557 __ andl(rax, 0xfffff);
1558 __ orl(rax, value_low_word);
1559 __ jcc(Assembler::notZero, return0);
1560
1561 __ bind(do_convert);
1562 __ fnstcw(Address(rsp, 0));
1563 __ movzwl(rax, Address(rsp, 0));
1564 __ orl(rax, 0xc00);
1565 __ movw(Address(rsp, 2), rax);
1566 __ fldcw(Address(rsp, 2));
1567 __ fwait();
1568 __ fistp_d(result_low_word);
1569 __ fldcw(Address(rsp, 0));
1570 __ fwait();
1571 // This gets the entire long in rax on 64bit
1572 __ movptr(rax, result_low_word);
1573 // testing of high bits
1574 __ movl(rdx, result_high_word);
1575 __ mov(rcx, rax);
1576 // What the heck is the point of the next instruction???
1577 __ xorl(rcx, 0x0);
1578 __ movl(rsi, 0x80000000);
1579 __ xorl(rsi, rdx);
1580 __ orl(rcx, rsi);
1581 __ jcc(Assembler::notEqual, do_return);
1582 __ fldz();
1583 __ fcomp_d(value_low_word);
1584 __ fnstsw_ax();
1585 __ sahf();
1586 __ jcc(Assembler::above, return_min_jlong);
1587 // return max_jlong
1588 __ movl(rdx, 0x7fffffff);
1589 __ movl(rax, 0xffffffff);
1590 __ jmp(do_return);
1591
1592 __ bind(return_min_jlong);
1593 __ movl(rdx, 0x80000000);
1594 __ xorl(rax, rax);
1595 __ jmp(do_return);
1596
1597 __ bind(return0);
1598 __ fpop();
1599 __ xorptr(rdx,rdx);
1600 __ xorptr(rax,rax);
1601
1602 __ bind(do_return);
1603 __ addptr(rsp, 32);
1604 __ pop(rcx);
1605 __ pop(rsi);
1606 __ ret(0);
1607 #endif // _LP64
1608 }
1609 break;
1610
1611 case C1StubId::predicate_failed_trap_id:
1612 {
1613 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1614
1615 OopMap* map = save_live_registers(sasm, 1);
1616
1617 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1618 oop_maps = new OopMapSet();
1619 oop_maps->add_gc_map(call_offset, map);
1620 restore_live_registers(sasm);
1621 __ leave();
1622 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1623 assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1624
1625 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1626 }
1627 break;
1628
1629 default:
1630 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1631 __ movptr(rax, (int)id);
1632 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1633 __ should_not_reach_here();
1634 }
1635 break;
1636 }
1637 return oop_maps;
1638 }
1639
1640 #undef __
1641
1642 const char *Runtime1::pd_name_for_address(address entry) {
1643 return "<unknown function>";
1644 }