1 /*
   2  * Copyright (c) 1999, 2025, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "asm/assembler.hpp"
  26 #include "c1/c1_Defs.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_MacroAssembler.hpp"
  29 #include "c1/c1_Runtime1.hpp"
  30 #include "ci/ciUtilities.hpp"
  31 #include "compiler/compilerDefinitions.inline.hpp"
  32 #include "compiler/oopMap.hpp"
  33 #include "gc/shared/cardTable.hpp"
  34 #include "gc/shared/cardTableBarrierSet.hpp"
  35 #include "gc/shared/collectedHeap.hpp"
  36 #include "gc/shared/tlab_globals.hpp"
  37 #include "interpreter/interpreter.hpp"
  38 #include "memory/universe.hpp"
  39 #include "nativeInst_x86.hpp"
  40 #include "oops/oop.inline.hpp"
  41 #include "prims/jvmtiExport.hpp"
  42 #include "register_x86.hpp"
  43 #include "runtime/sharedRuntime.hpp"
  44 #include "runtime/signature.hpp"
  45 #include "runtime/stubRoutines.hpp"
  46 #include "runtime/vframeArray.hpp"
  47 #include "utilities/macros.hpp"
  48 #include "vmreg_x86.inline.hpp"
  49 
  50 // Implementation of StubAssembler
  51 
  52 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
  53   // setup registers
  54   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
  55   assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
  56   assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
  57   assert(args_size >= 0, "illegal args_size");
  58   bool align_stack = false;
  59 #ifdef _LP64
  60   // At a method handle call, the stack may not be properly aligned
  61   // when returning with an exception.
  62   align_stack = (stub_id() == (int)C1StubId::handle_exception_from_callee_id);
  63 #endif
  64 
  65 #ifdef _LP64
  66   mov(c_rarg0, thread);
  67   set_num_rt_args(0); // Nothing on stack
  68 #else
  69   set_num_rt_args(1 + args_size);
  70 
  71   // push java thread (becomes first argument of C function)
  72   get_thread(thread);
  73   push(thread);
  74 #endif // _LP64
  75 
  76   int call_offset = -1;
  77   if (!align_stack) {
  78     set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
  79   } else {
  80     address the_pc = pc();
  81     call_offset = offset();
  82     set_last_Java_frame(thread, noreg, rbp, the_pc, rscratch1);
  83     andptr(rsp, -(StackAlignmentInBytes));    // Align stack
  84   }
  85 
  86   // do the call
  87   call(RuntimeAddress(entry));
  88   if (!align_stack) {
  89     call_offset = offset();
  90   }
  91   // verify callee-saved register
  92 #ifdef ASSERT
  93   guarantee(thread != rax, "change this code");
  94   push(rax);
  95   { Label L;
  96     get_thread(rax);
  97     cmpptr(thread, rax);
  98     jcc(Assembler::equal, L);
  99     int3();
 100     stop("StubAssembler::call_RT: rdi not callee saved?");
 101     bind(L);
 102   }
 103   pop(rax);
 104 #endif
 105   reset_last_Java_frame(thread, true);
 106 
 107   // discard thread and arguments
 108   NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
 109 
 110   // check for pending exceptions
 111   { Label L;
 112     cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 113     jcc(Assembler::equal, L);
 114     // exception pending => remove activation and forward to exception handler
 115     movptr(rax, Address(thread, Thread::pending_exception_offset()));
 116     // make sure that the vm_results are cleared
 117     if (oop_result1->is_valid()) {
 118       movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
 119     }
 120     if (metadata_result->is_valid()) {
 121       movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 122     }
 123     if (frame_size() == no_frame_size) {
 124       leave();
 125       jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
 126     } else if (_stub_id == (int)C1StubId::forward_exception_id) {
 127       should_not_reach_here();
 128     } else {
 129       jump(RuntimeAddress(Runtime1::entry_for(C1StubId::forward_exception_id)));
 130     }
 131     bind(L);
 132   }
 133   // get oop results if there are any and reset the values in the thread
 134   if (oop_result1->is_valid()) {
 135     get_vm_result(oop_result1, thread);
 136   }
 137   if (metadata_result->is_valid()) {
 138     get_vm_result_2(metadata_result, thread);
 139   }
 140 
 141   assert(call_offset >= 0, "Should be set");
 142   return call_offset;
 143 }
 144 
 145 
 146 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
 147 #ifdef _LP64
 148   mov(c_rarg1, arg1);
 149 #else
 150   push(arg1);
 151 #endif // _LP64
 152   return call_RT(oop_result1, metadata_result, entry, 1);
 153 }
 154 
 155 
 156 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
 157 #ifdef _LP64
 158   if (c_rarg1 == arg2) {
 159     if (c_rarg2 == arg1) {
 160       xchgq(arg1, arg2);
 161     } else {
 162       mov(c_rarg2, arg2);
 163       mov(c_rarg1, arg1);
 164     }
 165   } else {
 166     mov(c_rarg1, arg1);
 167     mov(c_rarg2, arg2);
 168   }
 169 #else
 170   push(arg2);
 171   push(arg1);
 172 #endif // _LP64
 173   return call_RT(oop_result1, metadata_result, entry, 2);
 174 }
 175 
 176 
 177 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
 178 #ifdef _LP64
 179   // if there is any conflict use the stack
 180   if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
 181       arg2 == c_rarg1 || arg2 == c_rarg3 ||
 182       arg3 == c_rarg1 || arg3 == c_rarg2) {
 183     push(arg3);
 184     push(arg2);
 185     push(arg1);
 186     pop(c_rarg1);
 187     pop(c_rarg2);
 188     pop(c_rarg3);
 189   } else {
 190     mov(c_rarg1, arg1);
 191     mov(c_rarg2, arg2);
 192     mov(c_rarg3, arg3);
 193   }
 194 #else
 195   push(arg3);
 196   push(arg2);
 197   push(arg1);
 198 #endif // _LP64
 199   return call_RT(oop_result1, metadata_result, entry, 3);
 200 }
 201 
 202 
 203 // Implementation of StubFrame
 204 
 205 class StubFrame: public StackObj {
 206  private:
 207   StubAssembler* _sasm;
 208   bool _use_pop_on_epilog;
 209 
 210  public:
 211   StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog = false);
 212   void load_argument(int offset_in_words, Register reg);
 213 
 214   ~StubFrame();
 215 };
 216 
 217 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
 218   set_info(name, must_gc_arguments);
 219   enter();
 220 }
 221 
 222 void StubAssembler::epilogue(bool use_pop) {
 223   // Avoid using a leave instruction when this frame may
 224   // have been frozen, since the current value of rbp
 225   // restored from the stub would be invalid. We still
 226   // must restore the rbp value saved on enter though.
 227   use_pop ? pop(rbp) : leave();
 228   ret(0);
 229 }
 230 
 231 #define __ _sasm->
 232 
 233 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments, bool use_pop_on_epilog) {
 234   _sasm = sasm;
 235   _use_pop_on_epilog = use_pop_on_epilog;
 236   __ prologue(name, must_gc_arguments);
 237 }
 238 
 239 // load parameters that were stored with LIR_Assembler::store_parameter
 240 // Note: offsets for store_parameter and load_argument must match
 241 void StubFrame::load_argument(int offset_in_words, Register reg) {
 242   __ load_parameter(offset_in_words, reg);
 243 }
 244 
 245 
 246 StubFrame::~StubFrame() {
 247   __ epilogue(_use_pop_on_epilog);
 248 }
 249 
 250 #undef __
 251 
 252 
 253 // Implementation of Runtime1
 254 
 255 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
 256 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
 257 
 258 // Stack layout for saving/restoring  all the registers needed during a runtime
 259 // call (this includes deoptimization)
 260 // Note: note that users of this frame may well have arguments to some runtime
 261 // while these values are on the stack. These positions neglect those arguments
 262 // but the code in save_live_registers will take the argument count into
 263 // account.
 264 //
 265 #ifdef _LP64
 266   #define SLOT2(x) x,
 267   #define SLOT_PER_WORD 2
 268 #else
 269   #define SLOT2(x)
 270   #define SLOT_PER_WORD 1
 271 #endif // _LP64
 272 
 273 enum reg_save_layout {
 274   // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
 275   // happen and will assert if the stack size we create is misaligned
 276 #ifdef _LP64
 277   align_dummy_0, align_dummy_1,
 278 #endif // _LP64
 279 #ifdef _WIN64
 280   // Windows always allocates space for it's argument registers (see
 281   // frame::arg_reg_save_area_bytes).
 282   arg_reg_save_1, arg_reg_save_1H,                                                          // 0, 4
 283   arg_reg_save_2, arg_reg_save_2H,                                                          // 8, 12
 284   arg_reg_save_3, arg_reg_save_3H,                                                          // 16, 20
 285   arg_reg_save_4, arg_reg_save_4H,                                                          // 24, 28
 286 #endif // _WIN64
 287   xmm_regs_as_doubles_off,                                                                  // 32
 288   float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots,  // 160
 289   fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots,          // 224
 290   // fpu_state_end_off is exclusive
 291   fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD),                // 352
 292   marker = fpu_state_end_off, SLOT2(markerH)                                                // 352, 356
 293   extra_space_offset,                                                                       // 360
 294 #ifdef _LP64
 295   r15_off = extra_space_offset, r15H_off,                                                   // 360, 364
 296   r14_off, r14H_off,                                                                        // 368, 372
 297   r13_off, r13H_off,                                                                        // 376, 380
 298   r12_off, r12H_off,                                                                        // 384, 388
 299   r11_off, r11H_off,                                                                        // 392, 396
 300   r10_off, r10H_off,                                                                        // 400, 404
 301   r9_off, r9H_off,                                                                          // 408, 412
 302   r8_off, r8H_off,                                                                          // 416, 420
 303   rdi_off, rdiH_off,                                                                        // 424, 428
 304 #else
 305   rdi_off = extra_space_offset,
 306 #endif // _LP64
 307   rsi_off, SLOT2(rsiH_off)                                                                  // 432, 436
 308   rbp_off, SLOT2(rbpH_off)                                                                  // 440, 444
 309   rsp_off, SLOT2(rspH_off)                                                                  // 448, 452
 310   rbx_off, SLOT2(rbxH_off)                                                                  // 456, 460
 311   rdx_off, SLOT2(rdxH_off)                                                                  // 464, 468
 312   rcx_off, SLOT2(rcxH_off)                                                                  // 472, 476
 313   rax_off, SLOT2(raxH_off)                                                                  // 480, 484
 314   saved_rbp_off, SLOT2(saved_rbpH_off)                                                      // 488, 492
 315   return_off, SLOT2(returnH_off)                                                            // 496, 500
 316   reg_save_frame_size   // As noted: neglects any parameters to runtime                     // 504
 317 };
 318 
 319 // Save off registers which might be killed by calls into the runtime.
 320 // Tries to smart of about FP registers.  In particular we separate
 321 // saving and describing the FPU registers for deoptimization since we
 322 // have to save the FPU registers twice if we describe them and on P4
 323 // saving FPU registers which don't contain anything appears
 324 // expensive.  The deopt blob is the only thing which needs to
 325 // describe FPU registers.  In all other cases it should be sufficient
 326 // to simply save their current value.
 327 //
 328 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
 329                                 bool save_fpu_registers = true) {
 330 
 331   // In 64bit all the args are in regs so there are no additional stack slots
 332   LP64_ONLY(num_rt_args = 0);
 333   LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
 334   int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
 335   sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
 336 
 337   // record saved value locations in an OopMap
 338   // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
 339   OopMap* map = new OopMap(frame_size_in_slots, 0);
 340   map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
 341   map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
 342   map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
 343   map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
 344   map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
 345   map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
 346 #ifdef _LP64
 347   map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args),  r8->as_VMReg());
 348   map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args),  r9->as_VMReg());
 349   map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
 350   map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
 351   map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
 352   map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
 353   map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
 354   map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
 355 
 356   // This is stupid but needed.
 357   map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
 358   map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
 359   map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
 360   map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
 361   map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
 362   map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
 363 
 364   map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args),  r8->as_VMReg()->next());
 365   map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args),  r9->as_VMReg()->next());
 366   map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
 367   map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
 368   map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
 369   map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
 370   map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
 371   map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
 372 #endif // _LP64
 373 
 374   int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 375 
 376   if (save_fpu_registers) {
 377 #ifndef _LP64
 378     if (UseSSE < 2) {
 379       int fpu_off = float_regs_as_doubles_off;
 380       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 381         VMReg fpu_name_0 = FrameMap::fpu_regname(n);
 382         map->set_callee_saved(VMRegImpl::stack2reg(fpu_off +     num_rt_args), fpu_name_0);
 383         // %%% This is really a waste but we'll keep things as they were for now
 384         if (true) {
 385           map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
 386         }
 387         fpu_off += 2;
 388       }
 389       assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
 390 
 391       if (UseSSE == 1) {
 392         int xmm_off = xmm_regs_as_doubles_off;
 393         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 394           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 395           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 396           xmm_off += 2;
 397         }
 398         assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 399       }
 400     }
 401 #endif // !LP64
 402 
 403     if (UseSSE >= 2) {
 404       int xmm_off = xmm_regs_as_doubles_off;
 405       for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
 406         if (n < xmm_bypass_limit) {
 407           VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
 408           map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
 409           // %%% This is really a waste but we'll keep things as they were for now
 410           if (true) {
 411             map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
 412           }
 413         }
 414         xmm_off += 2;
 415       }
 416       assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
 417     }
 418   }
 419 
 420   return map;
 421 }
 422 
 423 #define __ this->
 424 
 425 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
 426   __ block_comment("save_live_registers");
 427 
 428   // Push CPU state in multiple of 16 bytes
 429 #ifdef _LP64
 430   __ save_legacy_gprs();
 431 #else
 432   __ pusha();
 433 #endif
 434 
 435   // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
 436   // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
 437 
 438   __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 439 
 440 #ifdef ASSERT
 441   __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 442 #endif
 443 
 444   if (save_fpu_registers) {
 445 #ifndef _LP64
 446     if (UseSSE < 2) {
 447       // save FPU stack
 448       __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 449       __ fwait();
 450 
 451 #ifdef ASSERT
 452       Label ok;
 453       __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 454       __ jccb(Assembler::equal, ok);
 455       __ stop("corrupted control word detected");
 456       __ bind(ok);
 457 #endif
 458 
 459       // Reset the control word to guard against exceptions being unmasked
 460       // since fstp_d can cause FPU stack underflow exceptions.  Write it
 461       // into the on stack copy and then reload that to make sure that the
 462       // current and future values are correct.
 463       __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::x86::fpu_cntrl_wrd_std());
 464       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 465 
 466       // Save the FPU registers in de-opt-able form
 467       int offset = 0;
 468       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 469         __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 470         offset += 8;
 471       }
 472 
 473       if (UseSSE == 1) {
 474         // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
 475         int offset = 0;
 476         for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 477           XMMRegister xmm_name = as_XMMRegister(n);
 478           __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 479           offset += 8;
 480         }
 481       }
 482     }
 483 #endif // !_LP64
 484 
 485     if (UseSSE >= 2) {
 486       // save XMM registers
 487       // XMM registers can contain float or double values, but this is not known here,
 488       // so always save them as doubles.
 489       // note that float values are _not_ converted automatically, so for float values
 490       // the second word contains only garbage data.
 491       int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 492       int offset = 0;
 493       for (int n = 0; n < xmm_bypass_limit; n++) {
 494         XMMRegister xmm_name = as_XMMRegister(n);
 495         __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
 496         offset += 8;
 497       }
 498     }
 499   }
 500 
 501   // FPU stack must be empty now
 502   NOT_LP64( __ verify_FPU(0, "save_live_registers"); )
 503 }
 504 
 505 #undef __
 506 #define __ sasm->
 507 
 508 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
 509 #ifdef _LP64
 510   if (restore_fpu_registers) {
 511     // restore XMM registers
 512     int xmm_bypass_limit = FrameMap::get_num_caller_save_xmms();
 513     int offset = 0;
 514     for (int n = 0; n < xmm_bypass_limit; n++) {
 515       XMMRegister xmm_name = as_XMMRegister(n);
 516       __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 517       offset += 8;
 518     }
 519   }
 520 #else
 521   if (restore_fpu_registers) {
 522     if (UseSSE >= 2) {
 523       // restore XMM registers
 524       int xmm_bypass_limit = FrameMap::nof_xmm_regs;
 525       int offset = 0;
 526       for (int n = 0; n < xmm_bypass_limit; n++) {
 527         XMMRegister xmm_name = as_XMMRegister(n);
 528         __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 529         offset += 8;
 530       }
 531     } else if (UseSSE == 1) {
 532       // restore XMM registers(num MMX == num fpu)
 533       int offset = 0;
 534       for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
 535         XMMRegister xmm_name = as_XMMRegister(n);
 536         __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
 537         offset += 8;
 538       }
 539     }
 540 
 541     if (UseSSE < 2) {
 542       __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
 543     } else {
 544       // check that FPU stack is really empty
 545       __ verify_FPU(0, "restore_live_registers");
 546     }
 547   } else {
 548     // check that FPU stack is really empty
 549     __ verify_FPU(0, "restore_live_registers");
 550   }
 551 #endif // _LP64
 552 
 553 #ifdef ASSERT
 554   {
 555     Label ok;
 556     __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
 557     __ jcc(Assembler::equal, ok);
 558     __ stop("bad offsets in frame");
 559     __ bind(ok);
 560   }
 561 #endif // ASSERT
 562 
 563   __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
 564 }
 565 
 566 #undef __
 567 #define __ this->
 568 
 569 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
 570   __ block_comment("restore_live_registers");
 571 
 572   restore_fpu(this, restore_fpu_registers);
 573 #ifdef _LP64
 574   __ restore_legacy_gprs();
 575 #else
 576   __ popa();
 577 #endif
 578 
 579 }
 580 
 581 
 582 void C1_MacroAssembler::restore_live_registers_except_rax(bool restore_fpu_registers) {
 583   __ block_comment("restore_live_registers_except_rax");
 584 
 585   restore_fpu(this, restore_fpu_registers);
 586 
 587 #ifdef _LP64
 588   __ movptr(r15, Address(rsp, 0));
 589   __ movptr(r14, Address(rsp, wordSize));
 590   __ movptr(r13, Address(rsp, 2 * wordSize));
 591   __ movptr(r12, Address(rsp, 3 * wordSize));
 592   __ movptr(r11, Address(rsp, 4 * wordSize));
 593   __ movptr(r10, Address(rsp, 5 * wordSize));
 594   __ movptr(r9,  Address(rsp, 6 * wordSize));
 595   __ movptr(r8,  Address(rsp, 7 * wordSize));
 596   __ movptr(rdi, Address(rsp, 8 * wordSize));
 597   __ movptr(rsi, Address(rsp, 9 * wordSize));
 598   __ movptr(rbp, Address(rsp, 10 * wordSize));
 599   // skip rsp
 600   __ movptr(rbx, Address(rsp, 12 * wordSize));
 601   __ movptr(rdx, Address(rsp, 13 * wordSize));
 602   __ movptr(rcx, Address(rsp, 14 * wordSize));
 603 
 604   __ addptr(rsp, 16 * wordSize);
 605 #else
 606 
 607   __ pop(rdi);
 608   __ pop(rsi);
 609   __ pop(rbp);
 610   __ pop(rbx); // skip this value
 611   __ pop(rbx);
 612   __ pop(rdx);
 613   __ pop(rcx);
 614   __ addptr(rsp, BytesPerWord);
 615 #endif // _LP64
 616 }
 617 
 618 #undef __
 619 #define __ sasm->
 620 
 621 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
 622                                    bool save_fpu_registers = true) {
 623   __ save_live_registers_no_oop_map(save_fpu_registers);
 624   return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
 625 }
 626 
 627 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
 628   __ restore_live_registers(restore_fpu_registers);
 629 }
 630 
 631 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
 632   sasm->restore_live_registers_except_rax(restore_fpu_registers);
 633 }
 634 
 635 
 636 void Runtime1::initialize_pd() {
 637   // nothing to do
 638 }
 639 
 640 // return: offset in 64-bit words.
 641 uint Runtime1::runtime_blob_current_thread_offset(frame f) {
 642 #ifdef _LP64
 643   return r15_off / 2;  // rsp offsets are in halfwords
 644 #else
 645   Unimplemented();
 646   return 0;
 647 #endif
 648 }
 649 
 650 // Target: the entry point of the method that creates and posts the exception oop.
 651 // has_argument: true if the exception needs arguments (passed on the stack because
 652 //               registers must be preserved).
 653 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
 654   // Preserve all registers.
 655   int num_rt_args = has_argument ? (2 + 1) : 1;
 656   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 657 
 658   // Now all registers are saved and can be used freely.
 659   // Verify that no old value is used accidentally.
 660   __ invalidate_registers(true, true, true, true, true, true);
 661 
 662   // Registers used by this stub.
 663   const Register temp_reg = rbx;
 664 
 665   // Load arguments for exception that are passed as arguments into the stub.
 666   if (has_argument) {
 667 #ifdef _LP64
 668     __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
 669     __ movptr(c_rarg2, Address(rbp, 3*BytesPerWord));
 670 #else
 671     __ movptr(temp_reg, Address(rbp, 3*BytesPerWord));
 672     __ push(temp_reg);
 673     __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
 674     __ push(temp_reg);
 675 #endif // _LP64
 676   }
 677   int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
 678 
 679   OopMapSet* oop_maps = new OopMapSet();
 680   oop_maps->add_gc_map(call_offset, oop_map);
 681 
 682   __ stop("should not reach here");
 683 
 684   return oop_maps;
 685 }
 686 
 687 
 688 OopMapSet* Runtime1::generate_handle_exception(C1StubId id, StubAssembler *sasm) {
 689   __ block_comment("generate_handle_exception");
 690 
 691   // incoming parameters
 692   const Register exception_oop = rax;
 693   const Register exception_pc  = rdx;
 694   // other registers used in this stub
 695   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 696 
 697   // Save registers, if required.
 698   OopMapSet* oop_maps = new OopMapSet();
 699   OopMap* oop_map = nullptr;
 700   switch (id) {
 701   case C1StubId::forward_exception_id:
 702     // We're handling an exception in the context of a compiled frame.
 703     // The registers have been saved in the standard places.  Perform
 704     // an exception lookup in the caller and dispatch to the handler
 705     // if found.  Otherwise unwind and dispatch to the callers
 706     // exception handler.
 707     oop_map = generate_oop_map(sasm, 1 /*thread*/);
 708 
 709     // load and clear pending exception oop into RAX
 710     __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
 711     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 712 
 713     // load issuing PC (the return address for this stub) into rdx
 714     __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
 715 
 716     // make sure that the vm_results are cleared (may be unnecessary)
 717     __ movptr(Address(thread, JavaThread::vm_result_offset()),   NULL_WORD);
 718     __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
 719     break;
 720   case C1StubId::handle_exception_nofpu_id:
 721   case C1StubId::handle_exception_id:
 722     // At this point all registers MAY be live.
 723     oop_map = save_live_registers(sasm, 1 /*thread*/, id != C1StubId::handle_exception_nofpu_id);
 724     break;
 725   case C1StubId::handle_exception_from_callee_id: {
 726     // At this point all registers except exception oop (RAX) and
 727     // exception pc (RDX) are dead.
 728     const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
 729     oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
 730     sasm->set_frame_size(frame_size);
 731     WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
 732     break;
 733   }
 734   default:  ShouldNotReachHere();
 735   }
 736 
 737 #if !defined(_LP64) && defined(COMPILER2)
 738   if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
 739     // C2 can leave the fpu stack dirty
 740     __ empty_FPU_stack();
 741   }
 742 #endif // !_LP64 && COMPILER2
 743 
 744   // verify that only rax, and rdx is valid at this time
 745   __ invalidate_registers(false, true, true, false, true, true);
 746   // verify that rax, contains a valid exception
 747   __ verify_not_null_oop(exception_oop);
 748 
 749   // load address of JavaThread object for thread-local data
 750   NOT_LP64(__ get_thread(thread);)
 751 
 752 #ifdef ASSERT
 753   // check that fields in JavaThread for exception oop and issuing pc are
 754   // empty before writing to them
 755   Label oop_empty;
 756   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
 757   __ jcc(Assembler::equal, oop_empty);
 758   __ stop("exception oop already set");
 759   __ bind(oop_empty);
 760 
 761   Label pc_empty;
 762   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 763   __ jcc(Assembler::equal, pc_empty);
 764   __ stop("exception pc already set");
 765   __ bind(pc_empty);
 766 #endif
 767 
 768   // save exception oop and issuing pc into JavaThread
 769   // (exception handler will load it from here)
 770   __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
 771   __ movptr(Address(thread, JavaThread::exception_pc_offset()),  exception_pc);
 772 
 773   // patch throwing pc into return address (has bci & oop map)
 774   __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
 775 
 776   // compute the exception handler.
 777   // the exception oop and the throwing pc are read from the fields in JavaThread
 778   int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
 779   oop_maps->add_gc_map(call_offset, oop_map);
 780 
 781   // rax: handler address
 782   //      will be the deopt blob if nmethod was deoptimized while we looked up
 783   //      handler regardless of whether handler existed in the nmethod.
 784 
 785   // only rax, is valid at this time, all other registers have been destroyed by the runtime call
 786   __ invalidate_registers(false, true, true, true, true, true);
 787 
 788   // patch the return address, this stub will directly return to the exception handler
 789   __ movptr(Address(rbp, 1*BytesPerWord), rax);
 790 
 791   switch (id) {
 792   case C1StubId::forward_exception_id:
 793   case C1StubId::handle_exception_nofpu_id:
 794   case C1StubId::handle_exception_id:
 795     // Restore the registers that were saved at the beginning.
 796     restore_live_registers(sasm, id != C1StubId::handle_exception_nofpu_id);
 797     break;
 798   case C1StubId::handle_exception_from_callee_id:
 799     // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
 800     // since we do a leave anyway.
 801 
 802     // Pop the return address.
 803     __ leave();
 804     __ pop(rcx);
 805     __ jmp(rcx);  // jump to exception handler
 806     break;
 807   default:  ShouldNotReachHere();
 808   }
 809 
 810   return oop_maps;
 811 }
 812 
 813 
 814 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
 815   // incoming parameters
 816   const Register exception_oop = rax;
 817   // callee-saved copy of exception_oop during runtime call
 818   const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
 819   // other registers used in this stub
 820   const Register exception_pc = rdx;
 821   const Register handler_addr = rbx;
 822   const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
 823 
 824   if (AbortVMOnException) {
 825     __ enter();
 826     save_live_registers(sasm, 2);
 827     __ call_VM_leaf(CAST_FROM_FN_PTR(address, check_abort_on_vm_exception), rax);
 828     restore_live_registers(sasm);
 829     __ leave();
 830   }
 831 
 832   // verify that only rax, is valid at this time
 833   __ invalidate_registers(false, true, true, true, true, true);
 834 
 835 #ifdef ASSERT
 836   // check that fields in JavaThread for exception oop and issuing pc are empty
 837   NOT_LP64(__ get_thread(thread);)
 838   Label oop_empty;
 839   __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
 840   __ jcc(Assembler::equal, oop_empty);
 841   __ stop("exception oop must be empty");
 842   __ bind(oop_empty);
 843 
 844   Label pc_empty;
 845   __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
 846   __ jcc(Assembler::equal, pc_empty);
 847   __ stop("exception pc must be empty");
 848   __ bind(pc_empty);
 849 #endif
 850 
 851   // clear the FPU stack in case any FPU results are left behind
 852   NOT_LP64( __ empty_FPU_stack(); )
 853 
 854   // save exception_oop in callee-saved register to preserve it during runtime calls
 855   __ verify_not_null_oop(exception_oop);
 856   __ movptr(exception_oop_callee_saved, exception_oop);
 857 
 858   NOT_LP64(__ get_thread(thread);)
 859   // Get return address (is on top of stack after leave).
 860   __ movptr(exception_pc, Address(rsp, 0));
 861 
 862   // search the exception handler address of the caller (using the return address)
 863   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
 864   // rax: exception handler address of the caller
 865 
 866   // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
 867   __ invalidate_registers(false, true, true, true, false, true);
 868 
 869   // move result of call into correct register
 870   __ movptr(handler_addr, rax);
 871 
 872   // Restore exception oop to RAX (required convention of exception handler).
 873   __ movptr(exception_oop, exception_oop_callee_saved);
 874 
 875   // verify that there is really a valid exception in rax
 876   __ verify_not_null_oop(exception_oop);
 877 
 878   // get throwing pc (= return address).
 879   // rdx has been destroyed by the call, so it must be set again
 880   // the pop is also necessary to simulate the effect of a ret(0)
 881   __ pop(exception_pc);
 882 
 883   // continue at exception handler (return address removed)
 884   // note: do *not* remove arguments when unwinding the
 885   //       activation since the caller assumes having
 886   //       all arguments on the stack when entering the
 887   //       runtime to determine the exception handler
 888   //       (GC happens at call site with arguments!)
 889   // rax: exception oop
 890   // rdx: throwing pc
 891   // rbx: exception handler
 892   __ jmp(handler_addr);
 893 }
 894 
 895 
 896 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
 897   // use the maximum number of runtime-arguments here because it is difficult to
 898   // distinguish each RT-Call.
 899   // Note: This number affects also the RT-Call in generate_handle_exception because
 900   //       the oop-map is shared for all calls.
 901   const int num_rt_args = 2;  // thread + dummy
 902 
 903   DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
 904   assert(deopt_blob != nullptr, "deoptimization blob must have been created");
 905 
 906   OopMap* oop_map = save_live_registers(sasm, num_rt_args);
 907 
 908 #ifdef _LP64
 909   const Register thread = r15_thread;
 910   // No need to worry about dummy
 911   __ mov(c_rarg0, thread);
 912 #else
 913   __ push(rax); // push dummy
 914 
 915   const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
 916   // push java thread (becomes first argument of C function)
 917   __ get_thread(thread);
 918   __ push(thread);
 919 #endif // _LP64
 920   __ set_last_Java_frame(thread, noreg, rbp, nullptr, rscratch1);
 921   // do the call
 922   __ call(RuntimeAddress(target));
 923   OopMapSet* oop_maps = new OopMapSet();
 924   oop_maps->add_gc_map(__ offset(), oop_map);
 925   // verify callee-saved register
 926 #ifdef ASSERT
 927   guarantee(thread != rax, "change this code");
 928   __ push(rax);
 929   { Label L;
 930     __ get_thread(rax);
 931     __ cmpptr(thread, rax);
 932     __ jcc(Assembler::equal, L);
 933     __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
 934     __ bind(L);
 935   }
 936   __ pop(rax);
 937 #endif
 938   __ reset_last_Java_frame(thread, true);
 939 #ifndef _LP64
 940   __ pop(rcx); // discard thread arg
 941   __ pop(rcx); // discard dummy
 942 #endif // _LP64
 943 
 944   // check for pending exceptions
 945   { Label L;
 946     __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 947     __ jcc(Assembler::equal, L);
 948     // exception pending => remove activation and forward to exception handler
 949 
 950     __ testptr(rax, rax);                                   // have we deoptimized?
 951     __ jump_cc(Assembler::equal,
 952                RuntimeAddress(Runtime1::entry_for(C1StubId::forward_exception_id)));
 953 
 954     // the deopt blob expects exceptions in the special fields of
 955     // JavaThread, so copy and clear pending exception.
 956 
 957     // load and clear pending exception
 958     __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
 959     __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
 960 
 961     // check that there is really a valid exception
 962     __ verify_not_null_oop(rax);
 963 
 964     // load throwing pc: this is the return address of the stub
 965     __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
 966 
 967 #ifdef ASSERT
 968     // check that fields in JavaThread for exception oop and issuing pc are empty
 969     Label oop_empty;
 970     __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), NULL_WORD);
 971     __ jcc(Assembler::equal, oop_empty);
 972     __ stop("exception oop must be empty");
 973     __ bind(oop_empty);
 974 
 975     Label pc_empty;
 976     __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), NULL_WORD);
 977     __ jcc(Assembler::equal, pc_empty);
 978     __ stop("exception pc must be empty");
 979     __ bind(pc_empty);
 980 #endif
 981 
 982     // store exception oop and throwing pc to JavaThread
 983     __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
 984     __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
 985 
 986     restore_live_registers(sasm);
 987 
 988     __ leave();
 989     __ addptr(rsp, BytesPerWord);  // remove return address from stack
 990 
 991     // Forward the exception directly to deopt blob. We can blow no
 992     // registers and must leave throwing pc on the stack.  A patch may
 993     // have values live in registers so the entry point with the
 994     // exception in tls.
 995     __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
 996 
 997     __ bind(L);
 998   }
 999 
1000 
1001   // Runtime will return true if the nmethod has been deoptimized during
1002   // the patching process. In that case we must do a deopt reexecute instead.
1003 
1004   Label cont;
1005 
1006   __ testptr(rax, rax);                                 // have we deoptimized?
1007   __ jcc(Assembler::equal, cont);                       // no
1008 
1009   // Will reexecute. Proper return address is already on the stack we just restore
1010   // registers, pop all of our frame but the return address and jump to the deopt blob
1011   restore_live_registers(sasm);
1012   __ leave();
1013   __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1014 
1015   __ bind(cont);
1016   restore_live_registers(sasm);
1017   __ leave();
1018   __ ret(0);
1019 
1020   return oop_maps;
1021 }
1022 
1023 
1024 OopMapSet* Runtime1::generate_code_for(C1StubId id, StubAssembler* sasm) {
1025 
1026   // for better readability
1027   const bool must_gc_arguments = true;
1028   const bool dont_gc_arguments = false;
1029 
1030   // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
1031   bool save_fpu_registers = true;
1032 
1033   // stub code & info for the different stubs
1034   OopMapSet* oop_maps = nullptr;
1035   switch (id) {
1036     case C1StubId::forward_exception_id:
1037       {
1038         oop_maps = generate_handle_exception(id, sasm);
1039         __ leave();
1040         __ ret(0);
1041       }
1042       break;
1043 
1044     case C1StubId::new_instance_id:
1045     case C1StubId::fast_new_instance_id:
1046     case C1StubId::fast_new_instance_init_check_id:
1047       {
1048         Register klass = rdx; // Incoming
1049         Register obj   = rax; // Result
1050 
1051         if (id == C1StubId::new_instance_id) {
1052           __ set_info("new_instance", dont_gc_arguments);
1053         } else if (id == C1StubId::fast_new_instance_id) {
1054           __ set_info("fast new_instance", dont_gc_arguments);
1055         } else {
1056           assert(id == C1StubId::fast_new_instance_init_check_id, "bad C1StubId");
1057           __ set_info("fast new_instance init check", dont_gc_arguments);
1058         }
1059 
1060         __ enter();
1061         OopMap* map = save_live_registers(sasm, 2);
1062         int call_offset;
1063         call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1064         oop_maps = new OopMapSet();
1065         oop_maps->add_gc_map(call_offset, map);
1066         restore_live_registers_except_rax(sasm);
1067         __ verify_oop(obj);
1068         __ leave();
1069         __ ret(0);
1070 
1071         // rax,: new instance
1072       }
1073 
1074       break;
1075 
1076     case C1StubId::counter_overflow_id:
1077       {
1078         Register bci = rax, method = rbx;
1079         __ enter();
1080         OopMap* map = save_live_registers(sasm, 3);
1081         // Retrieve bci
1082         __ movl(bci, Address(rbp, 2*BytesPerWord));
1083         // And a pointer to the Method*
1084         __ movptr(method, Address(rbp, 3*BytesPerWord));
1085         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1086         oop_maps = new OopMapSet();
1087         oop_maps->add_gc_map(call_offset, map);
1088         restore_live_registers(sasm);
1089         __ leave();
1090         __ ret(0);
1091       }
1092       break;
1093 
1094     case C1StubId::new_type_array_id:
1095     case C1StubId::new_object_array_id:
1096     case C1StubId::new_null_free_array_id:
1097       {
1098         Register length   = rbx; // Incoming
1099         Register klass    = rdx; // Incoming
1100         Register obj      = rax; // Result
1101 
1102         if (id == C1StubId::new_type_array_id) {
1103           __ set_info("new_type_array", dont_gc_arguments);
1104         } else if (id == C1StubId::new_object_array_id) {
1105           __ set_info("new_object_array", dont_gc_arguments);
1106         } else {
1107           __ set_info("new_null_free_array", dont_gc_arguments);
1108         }
1109 
1110 #ifdef ASSERT
1111         // assert object type is really an array of the proper kind
1112         {
1113           Label ok;
1114           Register t0 = obj;
1115           __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1116           __ sarl(t0, Klass::_lh_array_tag_shift);
1117           switch (id) {
1118           case C1StubId::new_type_array_id:
1119             __ cmpl(t0, Klass::_lh_array_tag_type_value);
1120             __ jcc(Assembler::equal, ok);
1121             __ stop("assert(is a type array klass)");
1122             break;
1123           case C1StubId::new_object_array_id:
1124             __ cmpl(t0, Klass::_lh_array_tag_obj_value); // new "[Ljava/lang/Object;"
1125             __ jcc(Assembler::equal, ok);
1126             __ cmpl(t0, Klass::_lh_array_tag_vt_value);  // new "[LVT;"
1127             __ jcc(Assembler::equal, ok);
1128             __ stop("assert(is an object or inline type array klass)");
1129             break;
1130           case C1StubId::new_null_free_array_id:
1131             __ cmpl(t0, Klass::_lh_array_tag_vt_value);  // the array can be a flat array.
1132             __ jcc(Assembler::equal, ok);
1133             __ cmpl(t0, Klass::_lh_array_tag_obj_value); // the array cannot be a flat array (due to InlineArrayElementMaxFlatSize, etc)
1134             __ jcc(Assembler::equal, ok);
1135             __ stop("assert(is an object or inline type array klass)");
1136             break;
1137           default:  ShouldNotReachHere();
1138           }
1139           __ should_not_reach_here();
1140           __ bind(ok);
1141         }
1142 #endif // ASSERT
1143 
1144         __ enter();
1145         OopMap* map = save_live_registers(sasm, 3);
1146         int call_offset;
1147         if (id == C1StubId::new_type_array_id) {
1148           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1149         } else if (id == C1StubId::new_object_array_id) {
1150           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1151         } else {
1152           assert(id == C1StubId::new_null_free_array_id, "must be");
1153           call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_null_free_array), klass, length);
1154         }
1155 
1156         oop_maps = new OopMapSet();
1157         oop_maps->add_gc_map(call_offset, map);
1158         restore_live_registers_except_rax(sasm);
1159 
1160         __ verify_oop(obj);
1161         __ leave();
1162         __ ret(0);
1163 
1164         // rax,: new array
1165       }
1166       break;
1167 
1168     case C1StubId::new_multi_array_id:
1169       { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1170         // rax,: klass
1171         // rbx,: rank
1172         // rcx: address of 1st dimension
1173         OopMap* map = save_live_registers(sasm, 4);
1174         int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1175 
1176         oop_maps = new OopMapSet();
1177         oop_maps->add_gc_map(call_offset, map);
1178         restore_live_registers_except_rax(sasm);
1179 
1180         // rax,: new multi array
1181         __ verify_oop(rax);
1182       }
1183       break;
1184 
1185     case C1StubId::load_flat_array_id:
1186       {
1187         StubFrame f(sasm, "load_flat_array", dont_gc_arguments);
1188         OopMap* map = save_live_registers(sasm, 3);
1189 
1190         // Called with store_parameter and not C abi
1191 
1192         f.load_argument(1, rax); // rax,: array
1193         f.load_argument(0, rbx); // rbx,: index
1194         int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, load_flat_array), rax, rbx);
1195 
1196         oop_maps = new OopMapSet();
1197         oop_maps->add_gc_map(call_offset, map);
1198         restore_live_registers_except_rax(sasm);
1199 
1200         // rax,: loaded element at array[index]
1201         __ verify_oop(rax);
1202       }
1203       break;
1204 
1205     case C1StubId::store_flat_array_id:
1206       {
1207         StubFrame f(sasm, "store_flat_array", dont_gc_arguments);
1208         OopMap* map = save_live_registers(sasm, 4);
1209 
1210         // Called with store_parameter and not C abi
1211 
1212         f.load_argument(2, rax); // rax,: array
1213         f.load_argument(1, rbx); // rbx,: index
1214         f.load_argument(0, rcx); // rcx,: value
1215         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, store_flat_array), rax, rbx, rcx);
1216 
1217         oop_maps = new OopMapSet();
1218         oop_maps->add_gc_map(call_offset, map);
1219         restore_live_registers_except_rax(sasm);
1220       }
1221       break;
1222 
1223     case C1StubId::substitutability_check_id:
1224       {
1225         StubFrame f(sasm, "substitutability_check", dont_gc_arguments);
1226         OopMap* map = save_live_registers(sasm, 3);
1227 
1228         // Called with store_parameter and not C abi
1229 
1230         f.load_argument(1, rax); // rax,: left
1231         f.load_argument(0, rbx); // rbx,: right
1232         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, substitutability_check), rax, rbx);
1233 
1234         oop_maps = new OopMapSet();
1235         oop_maps->add_gc_map(call_offset, map);
1236         restore_live_registers_except_rax(sasm);
1237 
1238         // rax,: are the two operands substitutable
1239       }
1240       break;
1241 
1242 
1243     case C1StubId::buffer_inline_args_id:
1244     case C1StubId::buffer_inline_args_no_receiver_id:
1245       {
1246         const char* name = (id == C1StubId::buffer_inline_args_id) ?
1247           "buffer_inline_args" : "buffer_inline_args_no_receiver";
1248         StubFrame f(sasm, name, dont_gc_arguments);
1249         OopMap* map = save_live_registers(sasm, 2);
1250         Register method = rbx;
1251         address entry = (id == C1StubId::buffer_inline_args_id) ?
1252           CAST_FROM_FN_PTR(address, buffer_inline_args) :
1253           CAST_FROM_FN_PTR(address, buffer_inline_args_no_receiver);
1254         int call_offset = __ call_RT(rax, noreg, entry, method);
1255         oop_maps = new OopMapSet();
1256         oop_maps->add_gc_map(call_offset, map);
1257         restore_live_registers_except_rax(sasm);
1258         __ verify_oop(rax);  // rax: an array of buffered value objects
1259       }
1260       break;
1261 
1262     case C1StubId::register_finalizer_id:
1263       {
1264         __ set_info("register_finalizer", dont_gc_arguments);
1265 
1266         // This is called via call_runtime so the arguments
1267         // will be place in C abi locations
1268 
1269 #ifdef _LP64
1270         __ verify_oop(c_rarg0);
1271         __ mov(rax, c_rarg0);
1272 #else
1273         // The object is passed on the stack and we haven't pushed a
1274         // frame yet so it's one work away from top of stack.
1275         __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1276         __ verify_oop(rax);
1277 #endif // _LP64
1278 
1279         // load the klass and check the has finalizer flag
1280         Label register_finalizer;
1281         Register t = rsi;
1282         __ load_klass(t, rax, rscratch1);
1283         __ testb(Address(t, Klass::misc_flags_offset()), KlassFlags::_misc_has_finalizer);
1284         __ jcc(Assembler::notZero, register_finalizer);
1285         __ ret(0);
1286 
1287         __ bind(register_finalizer);
1288         __ enter();
1289         OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1290         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1291         oop_maps = new OopMapSet();
1292         oop_maps->add_gc_map(call_offset, oop_map);
1293 
1294         // Now restore all the live registers
1295         restore_live_registers(sasm);
1296 
1297         __ leave();
1298         __ ret(0);
1299       }
1300       break;
1301 
1302     case C1StubId::throw_range_check_failed_id:
1303       { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1304         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1305       }
1306       break;
1307 
1308     case C1StubId::throw_index_exception_id:
1309       { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1310         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1311       }
1312       break;
1313 
1314     case C1StubId::throw_div0_exception_id:
1315       { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1316         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1317       }
1318       break;
1319 
1320     case C1StubId::throw_null_pointer_exception_id:
1321       { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1322         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1323       }
1324       break;
1325 
1326     case C1StubId::handle_exception_nofpu_id:
1327     case C1StubId::handle_exception_id:
1328       { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1329         oop_maps = generate_handle_exception(id, sasm);
1330       }
1331       break;
1332 
1333     case C1StubId::handle_exception_from_callee_id:
1334       { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1335         oop_maps = generate_handle_exception(id, sasm);
1336       }
1337       break;
1338 
1339     case C1StubId::unwind_exception_id:
1340       { __ set_info("unwind_exception", dont_gc_arguments);
1341         // note: no stubframe since we are about to leave the current
1342         //       activation and we are calling a leaf VM function only.
1343         generate_unwind_exception(sasm);
1344       }
1345       break;
1346 
1347     case C1StubId::throw_array_store_exception_id:
1348       { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1349         // tos + 0: link
1350         //     + 1: return address
1351         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1352       }
1353       break;
1354 
1355     case C1StubId::throw_class_cast_exception_id:
1356       { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1357         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1358       }
1359       break;
1360 
1361     case C1StubId::throw_incompatible_class_change_error_id:
1362       { StubFrame f(sasm, "throw_incompatible_class_change_error", dont_gc_arguments);
1363         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1364       }
1365       break;
1366 
1367     case C1StubId::throw_illegal_monitor_state_exception_id:
1368       { StubFrame f(sasm, "throw_illegal_monitor_state_exception", dont_gc_arguments);
1369         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_illegal_monitor_state_exception), false);
1370       }
1371       break;
1372 
1373     case C1StubId::throw_identity_exception_id:
1374       { StubFrame f(sasm, "throw_identity_exception", dont_gc_arguments);
1375         oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_identity_exception), true);
1376       }
1377       break;
1378 
1379     case C1StubId::slow_subtype_check_id:
1380       {
1381         // Typical calling sequence:
1382         // __ push(klass_RInfo);  // object klass or other subclass
1383         // __ push(sup_k_RInfo);  // array element klass or other superclass
1384         // __ call(slow_subtype_check);
1385         // Note that the subclass is pushed first, and is therefore deepest.
1386         // Previous versions of this code reversed the names 'sub' and 'super'.
1387         // This was operationally harmless but made the code unreadable.
1388         enum layout {
1389           rax_off, SLOT2(raxH_off)
1390           rcx_off, SLOT2(rcxH_off)
1391           rsi_off, SLOT2(rsiH_off)
1392           rdi_off, SLOT2(rdiH_off)
1393           // saved_rbp_off, SLOT2(saved_rbpH_off)
1394           return_off, SLOT2(returnH_off)
1395           sup_k_off, SLOT2(sup_kH_off)
1396           klass_off, SLOT2(superH_off)
1397           framesize,
1398           result_off = klass_off  // deepest argument is also the return value
1399         };
1400 
1401         __ set_info("slow_subtype_check", dont_gc_arguments);
1402         __ push(rdi);
1403         __ push(rsi);
1404         __ push(rcx);
1405         __ push(rax);
1406 
1407         // This is called by pushing args and not with C abi
1408         __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1409         __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1410 
1411         Label miss;
1412         __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, nullptr, &miss);
1413 
1414         // fallthrough on success:
1415         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1416         __ pop(rax);
1417         __ pop(rcx);
1418         __ pop(rsi);
1419         __ pop(rdi);
1420         __ ret(0);
1421 
1422         __ bind(miss);
1423         __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1424         __ pop(rax);
1425         __ pop(rcx);
1426         __ pop(rsi);
1427         __ pop(rdi);
1428         __ ret(0);
1429       }
1430       break;
1431 
1432     case C1StubId::is_instance_of_id:
1433       {
1434         // Mirror: c_rarg0  (Windows: rcx, SysV: rdi)
1435         // Object: c_rarg1  (Windows: rdx, SysV: rsi)
1436         // ObjClass: r9
1437         // Temps:  rcx, r8, r10, r11
1438         // Result: rax
1439 
1440         Register klass = r9, obj = c_rarg1, result = rax;
1441         Register temp0 = rcx, temp1 = r8, temp2 = r10, temp3 = r11;
1442 
1443         // Get the Klass* into r9. c_rarg0 is now dead.
1444         __ movptr(klass, Address(c_rarg0, java_lang_Class::klass_offset()));
1445 
1446         Label done, is_secondary, same;
1447 
1448         __ xorq(result, result);
1449         __ testq(klass, klass);
1450         __ jcc(Assembler::equal, done); // Klass is null
1451 
1452         __ testq(obj, obj);
1453         __ jcc(Assembler::equal, done); // obj is null
1454 
1455         __ movl(temp0, Address(klass, in_bytes(Klass::super_check_offset_offset())));
1456         __ cmpl(temp0, in_bytes(Klass::secondary_super_cache_offset()));
1457         __ jcc(Assembler::equal, is_secondary); // Klass is a secondary superclass
1458 
1459         // Klass is a concrete class
1460         __ load_klass(temp2, obj, /*tmp*/temp1);
1461         __ cmpptr(klass, Address(temp2, temp0));
1462         __ setcc(Assembler::equal, result);
1463         __ ret(0);
1464 
1465         __ bind(is_secondary);
1466 
1467         __ load_klass(obj, obj, /*tmp*/temp1);
1468 
1469         // This is necessary because I am never in my own secondary_super list.
1470         __ cmpptr(obj, klass);
1471         __ jcc(Assembler::equal, same);
1472 
1473         __ lookup_secondary_supers_table_var(obj, klass,
1474                                              /*temps*/temp0, temp1, temp2, temp3,
1475                                              result);
1476         __ testq(result, result);
1477 
1478         __ bind(same);
1479         __ setcc(Assembler::equal, result);
1480 
1481         __ bind(done);
1482         __ ret(0);
1483       }
1484       break;
1485 
1486     case C1StubId::monitorenter_nofpu_id:
1487       save_fpu_registers = false;
1488       // fall through
1489     case C1StubId::monitorenter_id:
1490       {
1491         StubFrame f(sasm, "monitorenter", dont_gc_arguments, true /* use_pop_on_epilog */);
1492         OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1493 
1494         // Called with store_parameter and not C abi
1495 
1496         f.load_argument(1, rax); // rax,: object
1497         f.load_argument(0, rbx); // rbx,: lock address
1498 
1499         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1500 
1501         oop_maps = new OopMapSet();
1502         oop_maps->add_gc_map(call_offset, map);
1503         restore_live_registers(sasm, save_fpu_registers);
1504       }
1505       break;
1506 
1507     case C1StubId::monitorexit_nofpu_id:
1508       save_fpu_registers = false;
1509       // fall through
1510     case C1StubId::monitorexit_id:
1511       {
1512         StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1513         OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1514 
1515         // Called with store_parameter and not C abi
1516 
1517         f.load_argument(0, rax); // rax,: lock address
1518 
1519         // note: really a leaf routine but must setup last java sp
1520         //       => use call_RT for now (speed can be improved by
1521         //       doing last java sp setup manually)
1522         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1523 
1524         oop_maps = new OopMapSet();
1525         oop_maps->add_gc_map(call_offset, map);
1526         restore_live_registers(sasm, save_fpu_registers);
1527       }
1528       break;
1529 
1530     case C1StubId::deoptimize_id:
1531       {
1532         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1533         const int num_rt_args = 2;  // thread, trap_request
1534         OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1535         f.load_argument(0, rax);
1536         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1537         oop_maps = new OopMapSet();
1538         oop_maps->add_gc_map(call_offset, oop_map);
1539         restore_live_registers(sasm);
1540         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1541         assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1542         __ leave();
1543         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1544       }
1545       break;
1546 
1547     case C1StubId::access_field_patching_id:
1548       { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1549         // we should set up register map
1550         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1551       }
1552       break;
1553 
1554     case C1StubId::load_klass_patching_id:
1555       { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1556         // we should set up register map
1557         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1558       }
1559       break;
1560 
1561     case C1StubId::load_mirror_patching_id:
1562       { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1563         // we should set up register map
1564         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1565       }
1566       break;
1567 
1568     case C1StubId::load_appendix_patching_id:
1569       { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1570         // we should set up register map
1571         oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1572       }
1573       break;
1574 
1575     case C1StubId::dtrace_object_alloc_id:
1576       { // rax,: object
1577         StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1578         // we can't gc here so skip the oopmap but make sure that all
1579         // the live registers get saved.
1580         save_live_registers(sasm, 1);
1581 
1582         __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1583         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, static_cast<int (*)(oopDesc*)>(SharedRuntime::dtrace_object_alloc))));
1584         NOT_LP64(__ pop(rax));
1585 
1586         restore_live_registers(sasm);
1587       }
1588       break;
1589 
1590     case C1StubId::fpu2long_stub_id:
1591       {
1592 #ifdef _LP64
1593         Label done;
1594         __ cvttsd2siq(rax, Address(rsp, wordSize));
1595         __ cmp64(rax, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
1596         __ jccb(Assembler::notEqual, done);
1597         __ movq(rax, Address(rsp, wordSize));
1598         __ subptr(rsp, 8);
1599         __ movq(Address(rsp, 0), rax);
1600         __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
1601         __ pop(rax);
1602         __ bind(done);
1603         __ ret(0);
1604 #else
1605         // rax, and rdx are destroyed, but should be free since the result is returned there
1606         // preserve rsi,ecx
1607         __ push(rsi);
1608         __ push(rcx);
1609 
1610         // check for NaN
1611         Label return0, do_return, return_min_jlong, do_convert;
1612 
1613         Address value_high_word(rsp, wordSize + 4);
1614         Address value_low_word(rsp, wordSize);
1615         Address result_high_word(rsp, 3*wordSize + 4);
1616         Address result_low_word(rsp, 3*wordSize);
1617 
1618         __ subptr(rsp, 32);                    // more than enough on 32bit
1619         __ fst_d(value_low_word);
1620         __ movl(rax, value_high_word);
1621         __ andl(rax, 0x7ff00000);
1622         __ cmpl(rax, 0x7ff00000);
1623         __ jcc(Assembler::notEqual, do_convert);
1624         __ movl(rax, value_high_word);
1625         __ andl(rax, 0xfffff);
1626         __ orl(rax, value_low_word);
1627         __ jcc(Assembler::notZero, return0);
1628 
1629         __ bind(do_convert);
1630         __ fnstcw(Address(rsp, 0));
1631         __ movzwl(rax, Address(rsp, 0));
1632         __ orl(rax, 0xc00);
1633         __ movw(Address(rsp, 2), rax);
1634         __ fldcw(Address(rsp, 2));
1635         __ fwait();
1636         __ fistp_d(result_low_word);
1637         __ fldcw(Address(rsp, 0));
1638         __ fwait();
1639         // This gets the entire long in rax on 64bit
1640         __ movptr(rax, result_low_word);
1641         // testing of high bits
1642         __ movl(rdx, result_high_word);
1643         __ mov(rcx, rax);
1644         // What the heck is the point of the next instruction???
1645         __ xorl(rcx, 0x0);
1646         __ movl(rsi, 0x80000000);
1647         __ xorl(rsi, rdx);
1648         __ orl(rcx, rsi);
1649         __ jcc(Assembler::notEqual, do_return);
1650         __ fldz();
1651         __ fcomp_d(value_low_word);
1652         __ fnstsw_ax();
1653         __ sahf();
1654         __ jcc(Assembler::above, return_min_jlong);
1655         // return max_jlong
1656         __ movl(rdx, 0x7fffffff);
1657         __ movl(rax, 0xffffffff);
1658         __ jmp(do_return);
1659 
1660         __ bind(return_min_jlong);
1661         __ movl(rdx, 0x80000000);
1662         __ xorl(rax, rax);
1663         __ jmp(do_return);
1664 
1665         __ bind(return0);
1666         __ fpop();
1667         __ xorptr(rdx,rdx);
1668         __ xorptr(rax,rax);
1669 
1670         __ bind(do_return);
1671         __ addptr(rsp, 32);
1672         __ pop(rcx);
1673         __ pop(rsi);
1674         __ ret(0);
1675 #endif // _LP64
1676       }
1677       break;
1678 
1679     case C1StubId::predicate_failed_trap_id:
1680       {
1681         StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1682 
1683         OopMap* map = save_live_registers(sasm, 1);
1684 
1685         int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1686         oop_maps = new OopMapSet();
1687         oop_maps->add_gc_map(call_offset, map);
1688         restore_live_registers(sasm);
1689         __ leave();
1690         DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1691         assert(deopt_blob != nullptr, "deoptimization blob must have been created");
1692 
1693         __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1694       }
1695       break;
1696 
1697     default:
1698       { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1699         __ movptr(rax, (int)id);
1700         __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1701         __ should_not_reach_here();
1702       }
1703       break;
1704   }
1705   return oop_maps;
1706 }
1707 
1708 #undef __
1709 
1710 const char *Runtime1::pd_name_for_address(address entry) {
1711   return "<unknown function>";
1712 }