1 /*
2 * Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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23 */
24
25 #ifndef CPU_X86_C2_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_C2_MACROASSEMBLER_X86_HPP
27
28 // C2_MacroAssembler contains high-level macros for C2
29
30 public:
31 // C2 compiled method's prolog code.
32 void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b, bool is_stub);
33
34 Assembler::AvxVectorLen vector_length_encoding(int vlen_in_bytes);
35
36 // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
37 // See full description in macroAssembler_x86.cpp.
38 void fast_lock(Register obj, Register box, Register tmp,
39 Register scr, Register cx1, Register cx2, Register thread,
40 Metadata* method_data);
41 void fast_unlock(Register obj, Register box, Register tmp);
42
43 void fast_lock_lightweight(Register obj, Register box, Register rax_reg,
44 Register t, Register thread);
45 void fast_unlock_lightweight(Register obj, Register reg_rax, Register t, Register thread);
46
47 // Generic instructions support for use in .ad files C2 code generation
48 void vabsnegd(int opcode, XMMRegister dst, XMMRegister src);
49 void vabsnegd(int opcode, XMMRegister dst, XMMRegister src, int vector_len);
50 void vabsnegf(int opcode, XMMRegister dst, XMMRegister src);
51 void vabsnegf(int opcode, XMMRegister dst, XMMRegister src, int vector_len);
52
53 void pminmax(int opcode, BasicType elem_bt, XMMRegister dst, XMMRegister src,
54 XMMRegister tmp = xnoreg);
55 void vpminmax(int opcode, BasicType elem_bt,
56 XMMRegister dst, XMMRegister src1, XMMRegister src2,
57 int vlen_enc);
58
59 void vpuminmax(int opcode, BasicType elem_bt,
60 XMMRegister dst, XMMRegister src1, XMMRegister src2,
61 int vlen_enc);
62
63 void vpuminmax(int opcode, BasicType elem_bt,
64 XMMRegister dst, XMMRegister src1, Address src2,
65 int vlen_enc);
66
67 void vminmax_fp(int opcode, BasicType elem_bt,
68 XMMRegister dst, XMMRegister a, XMMRegister b,
69 XMMRegister tmp, XMMRegister atmp, XMMRegister btmp,
70 int vlen_enc);
71
72 void vpuminmaxq(int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister xtmp1, XMMRegister xtmp2, int vlen_enc);
73
74 void evminmax_fp(int opcode, BasicType elem_bt,
75 XMMRegister dst, XMMRegister a, XMMRegister b,
76 KRegister ktmp, XMMRegister atmp, XMMRegister btmp,
77 int vlen_enc);
78
79 void signum_fp(int opcode, XMMRegister dst, XMMRegister zero, XMMRegister one);
80
81 void vector_compress_expand(int opcode, XMMRegister dst, XMMRegister src, KRegister mask,
82 bool merge, BasicType bt, int vec_enc);
83
84 void vector_mask_compress(KRegister dst, KRegister src, Register rtmp1, Register rtmp2, int mask_len);
85
86 void vextendbw(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
87 void vextendbw(bool sign, XMMRegister dst, XMMRegister src);
88 void vextendbd(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
89 void vextendwd(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
90
91 void vshiftd(int opcode, XMMRegister dst, XMMRegister shift);
92 void vshiftd_imm(int opcode, XMMRegister dst, int shift);
93 void vshiftd(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
94 void vshiftd_imm(int opcode, XMMRegister dst, XMMRegister nds, int shift, int vector_len);
95 void vshiftw(int opcode, XMMRegister dst, XMMRegister shift);
96 void vshiftw(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
97 void vshiftq(int opcode, XMMRegister dst, XMMRegister shift);
98 void vshiftq_imm(int opcode, XMMRegister dst, int shift);
99 void vshiftq(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
100 void vshiftq_imm(int opcode, XMMRegister dst, XMMRegister nds, int shift, int vector_len);
101
102 void vprotate_imm(int opcode, BasicType etype, XMMRegister dst, XMMRegister src, int shift, int vector_len);
103 void vprotate_var(int opcode, BasicType etype, XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
104
105 void varshiftd(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
106 void varshiftw(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
107 void varshiftq(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc, XMMRegister vtmp = xnoreg);
108 void varshiftbw(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len, XMMRegister vtmp);
109 void evarshiftb(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len, XMMRegister vtmp);
110
111 void insert(BasicType typ, XMMRegister dst, Register val, int idx);
112 void vinsert(BasicType typ, XMMRegister dst, XMMRegister src, Register val, int idx);
113 void vgather(BasicType typ, XMMRegister dst, Register base, XMMRegister idx, XMMRegister mask, int vector_len);
114 void evgather(BasicType typ, XMMRegister dst, KRegister mask, Register base, XMMRegister idx, int vector_len);
115 void evscatter(BasicType typ, Register base, XMMRegister idx, KRegister mask, XMMRegister src, int vector_len);
116
117 void evmovdqu(BasicType type, KRegister kmask, XMMRegister dst, Address src, bool merge, int vector_len);
118 void evmovdqu(BasicType type, KRegister kmask, Address dst, XMMRegister src, bool merge, int vector_len);
119 void evmovdqu(BasicType type, KRegister kmask, XMMRegister dst, XMMRegister src, bool merge, int vector_len);
120
121 // extract
122 void extract(BasicType typ, Register dst, XMMRegister src, int idx);
123 XMMRegister get_lane(BasicType typ, XMMRegister dst, XMMRegister src, int elemindex);
124 void get_elem(BasicType typ, Register dst, XMMRegister src, int elemindex);
125 void get_elem(BasicType typ, XMMRegister dst, XMMRegister src, int elemindex, XMMRegister vtmp = xnoreg);
126 void movsxl(BasicType typ, Register dst);
127
128 // vector test
129 void vectortest(BasicType bt, XMMRegister src1, XMMRegister src2, XMMRegister vtmp, int vlen_in_bytes);
130
131 // Covert B2X
132 void vconvert_b2x(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, int vlen_enc);
133 #ifdef _LP64
134 void vpbroadcast(BasicType elem_bt, XMMRegister dst, Register src, int vlen_enc);
135 #endif
136
137 // blend
138 void evpcmp(BasicType typ, KRegister kdmask, KRegister ksmask, XMMRegister src1, XMMRegister src2, int comparison, int vector_len);
139 void evpcmp(BasicType typ, KRegister kdmask, KRegister ksmask, XMMRegister src1, AddressLiteral src2, int comparison, int vector_len, Register rscratch = noreg);
140 void evpblend(BasicType typ, XMMRegister dst, KRegister kmask, XMMRegister src1, XMMRegister src2, bool merge, int vector_len);
141
142 void load_vector(XMMRegister dst, Address src, int vlen_in_bytes);
143 void load_vector(XMMRegister dst, AddressLiteral src, int vlen_in_bytes, Register rscratch = noreg);
144
145 void load_vector_mask(XMMRegister dst, XMMRegister src, int vlen_in_bytes, BasicType elem_bt, bool is_legacy);
146 void load_vector_mask(KRegister dst, XMMRegister src, XMMRegister xtmp, bool novlbwdq, int vlen_enc);
147
148 void load_constant_vector(BasicType bt, XMMRegister dst, InternalAddress src, int vlen);
149 void load_iota_indices(XMMRegister dst, int vlen_in_bytes, BasicType bt);
150
151 // Reductions for vectors of bytes, shorts, ints, longs, floats, and doubles.
152
153 // dst = src1 reduce(op, src2) using vtmp as temps
154 void reduceI(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
155 #ifdef _LP64
156 void reduceL(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
157 void genmask(KRegister dst, Register len, Register temp);
158 #endif // _LP64
159
160 // dst = reduce(op, src2) using vtmp as temps
161 void reduce_fp(int opcode, int vlen,
162 XMMRegister dst, XMMRegister src,
163 XMMRegister vtmp1, XMMRegister vtmp2 = xnoreg);
164 void unordered_reduce_fp(int opcode, int vlen,
165 XMMRegister dst, XMMRegister src,
166 XMMRegister vtmp1 = xnoreg, XMMRegister vtmp2 = xnoreg);
167 void reduceB(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
168 void mulreduceB(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
169 void reduceS(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
170 void reduceFloatMinMax(int opcode, int vlen, bool is_dst_valid,
171 XMMRegister dst, XMMRegister src,
172 XMMRegister tmp, XMMRegister atmp, XMMRegister btmp, XMMRegister xmm_0, XMMRegister xmm_1 = xnoreg);
173 void reduceDoubleMinMax(int opcode, int vlen, bool is_dst_valid,
174 XMMRegister dst, XMMRegister src,
175 XMMRegister tmp, XMMRegister atmp, XMMRegister btmp, XMMRegister xmm_0, XMMRegister xmm_1 = xnoreg);
176 private:
177 void reduceF(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
178 void reduceD(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
179 void unorderedReduceF(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
180 void unorderedReduceD(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
181
182 // Int Reduction
183 void reduce2I (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
184 void reduce4I (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
185 void reduce8I (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
186 void reduce16I(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
187
188 // Byte Reduction
189 void reduce8B (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
190 void reduce16B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
191 void reduce32B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
192 void reduce64B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
193 void mulreduce8B (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
194 void mulreduce16B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
195 void mulreduce32B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
196 void mulreduce64B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
197
198 // Short Reduction
199 void reduce4S (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
200 void reduce8S (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
201 void reduce16S(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
202 void reduce32S(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
203
204 // Long Reduction
205 #ifdef _LP64
206 void reduce2L(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
207 void reduce4L(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
208 void reduce8L(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
209 #endif // _LP64
210
211 // Float Reduction
212 void reduce2F (int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
213 void reduce4F (int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
214 void reduce8F (int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
215 void reduce16F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
216
217 // Unordered Float Reduction
218 void unorderedReduce2F(int opcode, XMMRegister dst, XMMRegister src);
219 void unorderedReduce4F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
220 void unorderedReduce8F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
221 void unorderedReduce16F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
222
223 // Double Reduction
224 void reduce2D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
225 void reduce4D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
226 void reduce8D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
227
228 // Unordered Double Reduction
229 void unorderedReduce2D(int opcode, XMMRegister dst, XMMRegister src);
230 void unorderedReduce4D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
231 void unorderedReduce8D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
232
233 // Base reduction instruction
234 void reduce_operation_128(BasicType typ, int opcode, XMMRegister dst, XMMRegister src);
235 void reduce_operation_256(BasicType typ, int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2);
236 void unordered_reduce_operation_128(BasicType typ, int opcode, XMMRegister dst, XMMRegister src);
237 void unordered_reduce_operation_256(BasicType typ, int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2);
238
239 public:
240 #ifdef _LP64
241 void vector_mask_operation_helper(int opc, Register dst, Register tmp, int masklen);
242
243 void vector_mask_operation(int opc, Register dst, KRegister mask, Register tmp, int masklen, int masksize, int vec_enc);
244
245 void vector_mask_operation(int opc, Register dst, XMMRegister mask, XMMRegister xtmp,
246 Register tmp, int masklen, BasicType bt, int vec_enc);
247 void vector_long_to_maskvec(XMMRegister dst, Register src, Register rtmp1,
248 Register rtmp2, XMMRegister xtmp, int mask_len, int vec_enc);
249 #endif
250
251 void vector_maskall_operation(KRegister dst, Register src, int mask_len);
252
253 #ifndef _LP64
254 void vector_maskall_operation32(KRegister dst, Register src, KRegister ktmp, int mask_len);
255 #endif
256
257 void string_indexof_char(Register str1, Register cnt1, Register ch, Register result,
258 XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
259
260 void stringL_indexof_char(Register str1, Register cnt1, Register ch, Register result,
261 XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
262
263 // IndexOf strings.
264 // Small strings are loaded through stack if they cross page boundary.
265 void string_indexof(Register str1, Register str2,
266 Register cnt1, Register cnt2,
267 int int_cnt2, Register result,
268 XMMRegister vec, Register tmp,
269 int ae);
270
271 // IndexOf for constant substrings with size >= 8 elements
272 // which don't need to be loaded through stack.
273 void string_indexofC8(Register str1, Register str2,
274 Register cnt1, Register cnt2,
275 int int_cnt2, Register result,
276 XMMRegister vec, Register tmp,
277 int ae);
278
279 // Smallest code: we don't need to load through stack,
280 // check string tail.
281
282 // helper function for string_compare
283 void load_next_elements(Register elem1, Register elem2, Register str1, Register str2,
284 Address::ScaleFactor scale, Address::ScaleFactor scale1,
285 Address::ScaleFactor scale2, Register index, int ae);
286 // Compare strings.
287 void string_compare(Register str1, Register str2,
288 Register cnt1, Register cnt2, Register result,
289 XMMRegister vec1, int ae, KRegister mask = knoreg);
290
291 // Search for Non-ASCII character (Negative byte value) in a byte array,
292 // return index of the first such character, otherwise len.
293 void count_positives(Register ary1, Register len,
294 Register result, Register tmp1,
295 XMMRegister vec1, XMMRegister vec2, KRegister mask1 = knoreg, KRegister mask2 = knoreg);
296
297 // Compare char[] or byte[] arrays.
298 void arrays_equals(bool is_array_equ, Register ary1, Register ary2, Register limit,
299 Register result, Register chr, XMMRegister vec1, XMMRegister vec2,
300 bool is_char, KRegister mask = knoreg, bool expand_ary2 = false);
301
302 void arrays_hashcode(Register str1, Register cnt1, Register result,
303 Register tmp1, Register tmp2, Register tmp3, XMMRegister vnext,
304 XMMRegister vcoef0, XMMRegister vcoef1, XMMRegister vcoef2, XMMRegister vcoef3,
305 XMMRegister vresult0, XMMRegister vresult1, XMMRegister vresult2, XMMRegister vresult3,
306 XMMRegister vtmp0, XMMRegister vtmp1, XMMRegister vtmp2, XMMRegister vtmp3,
307 BasicType eltype);
308
309 // helper functions for arrays_hashcode
310 int arrays_hashcode_elsize(BasicType eltype);
311 void arrays_hashcode_elload(Register dst, Address src, BasicType eltype);
312 void arrays_hashcode_elvload(XMMRegister dst, Address src, BasicType eltype);
313 void arrays_hashcode_elvload(XMMRegister dst, AddressLiteral src, BasicType eltype);
314 void arrays_hashcode_elvcast(XMMRegister dst, BasicType eltype);
315
316 #ifdef _LP64
317 void convertF2I(BasicType dst_bt, BasicType src_bt, Register dst, XMMRegister src);
318 #endif
319
320 void evmasked_op(int ideal_opc, BasicType eType, KRegister mask,
321 XMMRegister dst, XMMRegister src1, XMMRegister src2,
322 bool merge, int vlen_enc, bool is_varshift = false);
323
324 void evmasked_op(int ideal_opc, BasicType eType, KRegister mask,
325 XMMRegister dst, XMMRegister src1, Address src2,
326 bool merge, int vlen_enc);
327
328 void evmasked_op(int ideal_opc, BasicType eType, KRegister mask, XMMRegister dst,
329 XMMRegister src1, int imm8, bool merge, int vlen_enc);
330
331 void masked_op(int ideal_opc, int mask_len, KRegister dst,
332 KRegister src1, KRegister src2);
333
334 void vector_unsigned_cast(XMMRegister dst, XMMRegister src, int vlen_enc,
335 BasicType from_elem_bt, BasicType to_elem_bt);
336
337 void vector_signed_cast(XMMRegister dst, XMMRegister src, int vlen_enc,
338 BasicType from_elem_bt, BasicType to_elem_bt);
339
340 void vector_cast_int_to_subword(BasicType to_elem_bt, XMMRegister dst, XMMRegister zero,
341 XMMRegister xtmp, Register rscratch, int vec_enc);
342
343 void vector_castF2X_avx(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
344 XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4,
345 AddressLiteral float_sign_flip, Register rscratch, int vec_enc);
346
347 void vector_castF2X_evex(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
348 XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2, AddressLiteral float_sign_flip,
349 Register rscratch, int vec_enc);
350
351 void vector_castF2L_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
352 KRegister ktmp1, KRegister ktmp2, AddressLiteral double_sign_flip,
353 Register rscratch, int vec_enc);
354
355 void vector_castD2X_evex(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
356 XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2, AddressLiteral sign_flip,
357 Register rscratch, int vec_enc);
358
359 void vector_castD2X_avx(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
360 XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4, XMMRegister xtmp5,
361 AddressLiteral float_sign_flip, Register rscratch, int vec_enc);
362
363
364 void vector_cast_double_to_int_special_cases_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
365 XMMRegister xtmp3, XMMRegister xtmp4, XMMRegister xtmp5, Register rscratch,
366 AddressLiteral float_sign_flip, int vec_enc);
367
368 void vector_cast_double_to_int_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
369 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral float_sign_flip,
370 int vec_enc);
371
372 void vector_cast_double_to_long_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
373 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral double_sign_flip,
374 int vec_enc);
375
376 void vector_cast_float_to_int_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
377 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral float_sign_flip,
378 int vec_enc);
379
380 void vector_cast_float_to_long_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
381 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral double_sign_flip,
382 int vec_enc);
383
384 void vector_cast_float_to_int_special_cases_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3,
385 XMMRegister xtmp4, Register rscratch, AddressLiteral float_sign_flip,
386 int vec_enc);
387
388 void vector_crosslane_doubleword_pack_avx(XMMRegister dst, XMMRegister src, XMMRegister zero,
389 XMMRegister xtmp, int index, int vec_enc);
390
391 void vector_mask_cast(XMMRegister dst, XMMRegister src, BasicType dst_bt, BasicType src_bt, int vlen);
392
393 #ifdef _LP64
394 void vector_round_double_evex(XMMRegister dst, XMMRegister src, AddressLiteral double_sign_flip, AddressLiteral new_mxcsr, int vec_enc,
395 Register tmp, XMMRegister xtmp1, XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2);
396
397 void vector_round_float_evex(XMMRegister dst, XMMRegister src, AddressLiteral double_sign_flip, AddressLiteral new_mxcsr, int vec_enc,
398 Register tmp, XMMRegister xtmp1, XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2);
399
400 void vector_round_float_avx(XMMRegister dst, XMMRegister src, AddressLiteral float_sign_flip, AddressLiteral new_mxcsr, int vec_enc,
401 Register tmp, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4);
402
403 void vector_compress_expand_avx2(int opcode, XMMRegister dst, XMMRegister src, XMMRegister mask,
404 Register rtmp, Register rscratch, XMMRegister permv, XMMRegister xtmp,
405 BasicType bt, int vec_enc);
406 #endif // _LP64
407
408 void udivI(Register rax, Register divisor, Register rdx);
409 void umodI(Register rax, Register divisor, Register rdx);
410 void udivmodI(Register rax, Register divisor, Register rdx, Register tmp);
411
412 #ifdef _LP64
413 void reverseI(Register dst, Register src, XMMRegister xtmp1,
414 XMMRegister xtmp2, Register rtmp);
415 void reverseL(Register dst, Register src, XMMRegister xtmp1,
416 XMMRegister xtmp2, Register rtmp1, Register rtmp2);
417 void udivL(Register rax, Register divisor, Register rdx);
418 void umodL(Register rax, Register divisor, Register rdx);
419 void udivmodL(Register rax, Register divisor, Register rdx, Register tmp);
420 #endif
421
422 void evpternlog(XMMRegister dst, int func, KRegister mask, XMMRegister src2, XMMRegister src3,
423 bool merge, BasicType bt, int vlen_enc);
424
425 void evpternlog(XMMRegister dst, int func, KRegister mask, XMMRegister src2, Address src3,
426 bool merge, BasicType bt, int vlen_enc);
427
428 void vector_reverse_bit(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
429 XMMRegister xtmp2, Register rtmp, int vec_enc);
430
431 void vector_reverse_bit_gfni(BasicType bt, XMMRegister dst, XMMRegister src, AddressLiteral mask, int vec_enc,
432 XMMRegister xtmp, Register rscratch = noreg);
433
434 void vector_reverse_byte(BasicType bt, XMMRegister dst, XMMRegister src, int vec_enc);
435
436 void vector_popcount_int(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
437 XMMRegister xtmp2, Register rtmp, int vec_enc);
438
439 void vector_popcount_long(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
440 XMMRegister xtmp2, Register rtmp, int vec_enc);
441
442 void vector_popcount_short(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
443 XMMRegister xtmp2, Register rtmp, int vec_enc);
444
445 void vector_popcount_byte(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
446 XMMRegister xtmp2, Register rtmp, int vec_enc);
447
448 void vector_popcount_integral(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
449 XMMRegister xtmp2, Register rtmp, int vec_enc);
450
451 void vector_popcount_integral_evex(BasicType bt, XMMRegister dst, XMMRegister src,
452 KRegister mask, bool merge, int vec_enc);
453
454 void vbroadcast(BasicType bt, XMMRegister dst, int imm32, Register rtmp, int vec_enc);
455
456 void vector_reverse_byte64(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
457 XMMRegister xtmp2, Register rtmp, int vec_enc);
458
459 void vector_count_leading_zeros_evex(BasicType bt, XMMRegister dst, XMMRegister src,
460 XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3,
461 KRegister ktmp, Register rtmp, bool merge, int vec_enc);
462
463 void vector_count_leading_zeros_byte_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
464 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
465
466 void vector_count_leading_zeros_short_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
467 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
468
469 void vector_count_leading_zeros_int_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
470 XMMRegister xtmp2, XMMRegister xtmp3, int vec_enc);
471
472 void vector_count_leading_zeros_long_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
473 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
474
475 void vector_count_leading_zeros_avx(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
476 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
477
478 void vpadd(BasicType bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vec_enc);
479
480 void vpsub(BasicType bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vec_enc);
481
482 void vector_count_trailing_zeros_evex(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
483 XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4, KRegister ktmp,
484 Register rtmp, int vec_enc);
485
486 void vector_swap_nbits(int nbits, int bitmask, XMMRegister dst, XMMRegister src,
487 XMMRegister xtmp1, Register rtmp, int vec_enc);
488
489 void vector_count_trailing_zeros_avx(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
490 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
491
492 void vector_signum_avx(int opcode, XMMRegister dst, XMMRegister src, XMMRegister zero, XMMRegister one,
493 XMMRegister xtmp1, int vec_enc);
494
495 void vector_signum_evex(int opcode, XMMRegister dst, XMMRegister src, XMMRegister zero, XMMRegister one,
496 KRegister ktmp1, int vec_enc);
497
498 void vmovmask(BasicType elem_bt, XMMRegister dst, Address src, XMMRegister mask, int vec_enc);
499
500 void vmovmask(BasicType elem_bt, Address dst, XMMRegister src, XMMRegister mask, int vec_enc);
501
502 void rearrange_bytes(XMMRegister dst, XMMRegister shuffle, XMMRegister src, XMMRegister xtmp1,
503 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, KRegister ktmp, int vlen_enc);
504
505 void vector_rearrange_int_float(BasicType bt, XMMRegister dst, XMMRegister shuffle,
506 XMMRegister src, int vlen_enc);
507
508
509 void vgather_subword(BasicType elem_ty, XMMRegister dst, Register base, Register idx_base, Register offset,
510 Register mask, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp,
511 Register midx, Register length, int vector_len, int vlen_enc);
512
513 #ifdef _LP64
514 void vgather8b_masked_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
515 Register offset, Register mask, Register midx, Register rtmp, int vlen_enc);
516 #endif
517 void vgather8b_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
518 Register offset, Register rtmp, int vlen_enc);
519
520 void vector_saturating_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, bool is_unsigned, int vlen_enc);
521
522 void vector_saturating_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, Address src2, bool is_unsigned, int vlen_enc);
523
524 void vector_saturating_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vlen_enc);
525
526 void vector_saturating_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, Address src2, int vlen_enc);
527
528 void vector_saturating_unsigned_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vlen_enc);
529
530 void vector_saturating_unsigned_op(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, Address src2, int vlen_enc);
531
532 void vector_sub_dq_saturating_unsigned_evex(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, KRegister ktmp, int vlen_enc);
533
534 void vector_sub_dq_saturating_unsigned_avx(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2,
535 XMMRegister xtmp1, XMMRegister xtmp2, int vlen_enc);
536
537 void vector_add_dq_saturating_unsigned_evex(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2,
538 XMMRegister xtmp1, XMMRegister xtmp2, KRegister ktmp, int vlen_enc);
539
540 void vector_add_dq_saturating_unsigned_avx(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2,
541 XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, int vlen_enc);
542
543 void vector_addsub_dq_saturating_avx(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2,
544 XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4, int vlen_enc);
545
546 void vector_addsub_dq_saturating_evex(int opc, BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2,
547 XMMRegister xtmp1, XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2, int vlen_enc);
548
549 void evpmovd2m_emu(KRegister ktmp, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2, int vlen_enc, bool xtmp2_hold_M1 = false);
550
551 void evpmovq2m_emu(KRegister ktmp, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2, int vlen_enc, bool xtmp2_hold_M1 = false);
552
553 void vpsign_extend_dq(BasicType etype, XMMRegister dst, XMMRegister src, int vlen_enc);
554
555 void vpgenmin_value(BasicType etype, XMMRegister dst, XMMRegister allones, int vlen_enc, bool compute_allones = false);
556
557 void vpgenmax_value(BasicType etype, XMMRegister dst, XMMRegister allones, int vlen_enc, bool compute_allones = false);
558
559 void evpcmpu(BasicType etype, KRegister kmask, XMMRegister src1, XMMRegister src2, Assembler::ComparisonPredicate cond, int vlen_enc);
560
561 void vpcmpgt(BasicType etype, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vlen_enc);
562
563 void evpmov_vec_to_mask(BasicType etype, KRegister ktmp, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
564 int vlen_enc, bool xtmp2_hold_M1 = false);
565
566 void evmasked_saturating_op(int ideal_opc, BasicType elem_bt, KRegister mask, XMMRegister dst, XMMRegister src1, XMMRegister src2,
567 bool is_unsigned, bool merge, int vlen_enc);
568
569 void evmasked_saturating_op(int ideal_opc, BasicType elem_bt, KRegister mask, XMMRegister dst, XMMRegister src1, Address src2,
570 bool is_unsigned, bool merge, int vlen_enc);
571
572 void evmasked_saturating_signed_op(int ideal_opc, BasicType elem_bt, KRegister mask, XMMRegister dst, XMMRegister src1, XMMRegister src2,
573 bool merge, int vlen_enc);
574
575 void evmasked_saturating_signed_op(int ideal_opc, BasicType elem_bt, KRegister mask, XMMRegister dst, XMMRegister src1, Address src2,
576 bool merge, int vlen_enc);
577
578 void evmasked_saturating_unsigned_op(int ideal_opc, BasicType elem_bt, KRegister mask, XMMRegister dst, XMMRegister src1,
579 XMMRegister src2, bool merge, int vlen_enc);
580
581 void evmasked_saturating_unsigned_op(int ideal_opc, BasicType elem_bt, KRegister mask, XMMRegister dst, XMMRegister src1,
582 Address src2, bool merge, int vlen_enc);
583
584 void select_from_two_vectors_evex(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vlen_enc);
585
586 #endif // CPU_X86_C2_MACROASSEMBLER_X86_HPP