1 /*
2 * Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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23 */
24
25 #ifndef CPU_X86_C2_MACROASSEMBLER_X86_HPP
26 #define CPU_X86_C2_MACROASSEMBLER_X86_HPP
27
28 // C2_MacroAssembler contains high-level macros for C2
29
30 public:
31 // C2 compiled method's prolog code.
32 void verified_entry(int framesize, int stack_bang_size, bool fp_mode_24b, bool is_stub);
33
34 Assembler::AvxVectorLen vector_length_encoding(int vlen_in_bytes);
35
36 // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
37 // See full description in macroAssembler_x86.cpp.
38 void fast_lock(Register obj, Register box, Register tmp,
39 Register scr, Register cx1, Register cx2, Register thread,
40 Metadata* method_data);
41 void fast_unlock(Register obj, Register box, Register tmp);
42
43 void fast_lock_lightweight(Register obj, Register box, Register rax_reg,
44 Register t, Register thread);
45 void fast_unlock_lightweight(Register obj, Register reg_rax, Register t, Register thread);
46
47 // Generic instructions support for use in .ad files C2 code generation
48 void vabsnegd(int opcode, XMMRegister dst, XMMRegister src);
49 void vabsnegd(int opcode, XMMRegister dst, XMMRegister src, int vector_len);
50 void vabsnegf(int opcode, XMMRegister dst, XMMRegister src);
51 void vabsnegf(int opcode, XMMRegister dst, XMMRegister src, int vector_len);
52
53 void pminmax(int opcode, BasicType elem_bt, XMMRegister dst, XMMRegister src,
54 XMMRegister tmp = xnoreg);
55 void vpminmax(int opcode, BasicType elem_bt,
56 XMMRegister dst, XMMRegister src1, XMMRegister src2,
57 int vlen_enc);
58
59 void vminmax_fp(int opcode, BasicType elem_bt,
60 XMMRegister dst, XMMRegister a, XMMRegister b,
61 XMMRegister tmp, XMMRegister atmp, XMMRegister btmp,
62 int vlen_enc);
63 void evminmax_fp(int opcode, BasicType elem_bt,
64 XMMRegister dst, XMMRegister a, XMMRegister b,
65 KRegister ktmp, XMMRegister atmp, XMMRegister btmp,
66 int vlen_enc);
67
68 void signum_fp(int opcode, XMMRegister dst, XMMRegister zero, XMMRegister one);
69
70 void vector_compress_expand(int opcode, XMMRegister dst, XMMRegister src, KRegister mask,
71 bool merge, BasicType bt, int vec_enc);
72
73 void vector_mask_compress(KRegister dst, KRegister src, Register rtmp1, Register rtmp2, int mask_len);
74
75 void vextendbw(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
76 void vextendbw(bool sign, XMMRegister dst, XMMRegister src);
77 void vextendbd(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
78 void vextendwd(bool sign, XMMRegister dst, XMMRegister src, int vector_len);
79
80 void vshiftd(int opcode, XMMRegister dst, XMMRegister shift);
81 void vshiftd_imm(int opcode, XMMRegister dst, int shift);
82 void vshiftd(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
83 void vshiftd_imm(int opcode, XMMRegister dst, XMMRegister nds, int shift, int vector_len);
84 void vshiftw(int opcode, XMMRegister dst, XMMRegister shift);
85 void vshiftw(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
86 void vshiftq(int opcode, XMMRegister dst, XMMRegister shift);
87 void vshiftq_imm(int opcode, XMMRegister dst, int shift);
88 void vshiftq(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
89 void vshiftq_imm(int opcode, XMMRegister dst, XMMRegister nds, int shift, int vector_len);
90
91 void vprotate_imm(int opcode, BasicType etype, XMMRegister dst, XMMRegister src, int shift, int vector_len);
92 void vprotate_var(int opcode, BasicType etype, XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len);
93
94 void varshiftd(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
95 void varshiftw(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc);
96 void varshiftq(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vlen_enc, XMMRegister vtmp = xnoreg);
97 void varshiftbw(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len, XMMRegister vtmp);
98 void evarshiftb(int opcode, XMMRegister dst, XMMRegister src, XMMRegister shift, int vector_len, XMMRegister vtmp);
99
100 void insert(BasicType typ, XMMRegister dst, Register val, int idx);
101 void vinsert(BasicType typ, XMMRegister dst, XMMRegister src, Register val, int idx);
102 void vgather(BasicType typ, XMMRegister dst, Register base, XMMRegister idx, XMMRegister mask, int vector_len);
103 void evgather(BasicType typ, XMMRegister dst, KRegister mask, Register base, XMMRegister idx, int vector_len);
104 void evscatter(BasicType typ, Register base, XMMRegister idx, KRegister mask, XMMRegister src, int vector_len);
105
106 void evmovdqu(BasicType type, KRegister kmask, XMMRegister dst, Address src, bool merge, int vector_len);
107 void evmovdqu(BasicType type, KRegister kmask, Address dst, XMMRegister src, bool merge, int vector_len);
108
109 // extract
110 void extract(BasicType typ, Register dst, XMMRegister src, int idx);
111 XMMRegister get_lane(BasicType typ, XMMRegister dst, XMMRegister src, int elemindex);
112 void get_elem(BasicType typ, Register dst, XMMRegister src, int elemindex);
113 void get_elem(BasicType typ, XMMRegister dst, XMMRegister src, int elemindex, XMMRegister vtmp = xnoreg);
114 void movsxl(BasicType typ, Register dst);
115
116 // vector test
117 void vectortest(BasicType bt, XMMRegister src1, XMMRegister src2, XMMRegister vtmp, int vlen_in_bytes);
118
119 // Covert B2X
120 void vconvert_b2x(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, int vlen_enc);
121 #ifdef _LP64
122 void vpbroadcast(BasicType elem_bt, XMMRegister dst, Register src, int vlen_enc);
123 #endif
124
125 // blend
126 void evpcmp(BasicType typ, KRegister kdmask, KRegister ksmask, XMMRegister src1, XMMRegister src2, int comparison, int vector_len);
127 void evpcmp(BasicType typ, KRegister kdmask, KRegister ksmask, XMMRegister src1, AddressLiteral src2, int comparison, int vector_len, Register rscratch = noreg);
128 void evpblend(BasicType typ, XMMRegister dst, KRegister kmask, XMMRegister src1, XMMRegister src2, bool merge, int vector_len);
129
130 void load_vector(XMMRegister dst, Address src, int vlen_in_bytes);
131 void load_vector(XMMRegister dst, AddressLiteral src, int vlen_in_bytes, Register rscratch = noreg);
132
133 void load_vector_mask(XMMRegister dst, XMMRegister src, int vlen_in_bytes, BasicType elem_bt, bool is_legacy);
134 void load_vector_mask(KRegister dst, XMMRegister src, XMMRegister xtmp, bool novlbwdq, int vlen_enc);
135
136 void load_constant_vector(BasicType bt, XMMRegister dst, InternalAddress src, int vlen);
137 void load_iota_indices(XMMRegister dst, int vlen_in_bytes, BasicType bt);
138
139 // Reductions for vectors of bytes, shorts, ints, longs, floats, and doubles.
140
141 // dst = src1 reduce(op, src2) using vtmp as temps
142 void reduceI(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
143 #ifdef _LP64
144 void reduceL(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
145 void genmask(KRegister dst, Register len, Register temp);
146 #endif // _LP64
147
148 // dst = reduce(op, src2) using vtmp as temps
149 void reduce_fp(int opcode, int vlen,
150 XMMRegister dst, XMMRegister src,
151 XMMRegister vtmp1, XMMRegister vtmp2 = xnoreg);
152 void unordered_reduce_fp(int opcode, int vlen,
153 XMMRegister dst, XMMRegister src,
154 XMMRegister vtmp1 = xnoreg, XMMRegister vtmp2 = xnoreg);
155 void reduceB(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
156 void mulreduceB(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
157 void reduceS(int opcode, int vlen, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
158 void reduceFloatMinMax(int opcode, int vlen, bool is_dst_valid,
159 XMMRegister dst, XMMRegister src,
160 XMMRegister tmp, XMMRegister atmp, XMMRegister btmp, XMMRegister xmm_0, XMMRegister xmm_1 = xnoreg);
161 void reduceDoubleMinMax(int opcode, int vlen, bool is_dst_valid,
162 XMMRegister dst, XMMRegister src,
163 XMMRegister tmp, XMMRegister atmp, XMMRegister btmp, XMMRegister xmm_0, XMMRegister xmm_1 = xnoreg);
164 private:
165 void reduceF(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
166 void reduceD(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
167 void unorderedReduceF(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
168 void unorderedReduceD(int opcode, int vlen, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
169
170 // Int Reduction
171 void reduce2I (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
172 void reduce4I (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
173 void reduce8I (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
174 void reduce16I(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
175
176 // Byte Reduction
177 void reduce8B (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
178 void reduce16B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
179 void reduce32B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
180 void reduce64B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
181 void mulreduce8B (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
182 void mulreduce16B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
183 void mulreduce32B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
184 void mulreduce64B(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
185
186 // Short Reduction
187 void reduce4S (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
188 void reduce8S (int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
189 void reduce16S(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
190 void reduce32S(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
191
192 // Long Reduction
193 #ifdef _LP64
194 void reduce2L(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
195 void reduce4L(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
196 void reduce8L(int opcode, Register dst, Register src1, XMMRegister src2, XMMRegister vtmp1, XMMRegister vtmp2);
197 #endif // _LP64
198
199 // Float Reduction
200 void reduce2F (int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
201 void reduce4F (int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
202 void reduce8F (int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
203 void reduce16F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
204
205 // Unordered Float Reduction
206 void unorderedReduce2F(int opcode, XMMRegister dst, XMMRegister src);
207 void unorderedReduce4F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
208 void unorderedReduce8F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
209 void unorderedReduce16F(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
210
211 // Double Reduction
212 void reduce2D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
213 void reduce4D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
214 void reduce8D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
215
216 // Unordered Double Reduction
217 void unorderedReduce2D(int opcode, XMMRegister dst, XMMRegister src);
218 void unorderedReduce4D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp);
219 void unorderedReduce8D(int opcode, XMMRegister dst, XMMRegister src, XMMRegister vtmp1, XMMRegister vtmp2);
220
221 // Base reduction instruction
222 void reduce_operation_128(BasicType typ, int opcode, XMMRegister dst, XMMRegister src);
223 void reduce_operation_256(BasicType typ, int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2);
224 void unordered_reduce_operation_128(BasicType typ, int opcode, XMMRegister dst, XMMRegister src);
225 void unordered_reduce_operation_256(BasicType typ, int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2);
226
227 public:
228 #ifdef _LP64
229 void vector_mask_operation_helper(int opc, Register dst, Register tmp, int masklen);
230
231 void vector_mask_operation(int opc, Register dst, KRegister mask, Register tmp, int masklen, int masksize, int vec_enc);
232
233 void vector_mask_operation(int opc, Register dst, XMMRegister mask, XMMRegister xtmp,
234 Register tmp, int masklen, BasicType bt, int vec_enc);
235 void vector_long_to_maskvec(XMMRegister dst, Register src, Register rtmp1,
236 Register rtmp2, XMMRegister xtmp, int mask_len, int vec_enc);
237 #endif
238
239 void vector_maskall_operation(KRegister dst, Register src, int mask_len);
240
241 #ifndef _LP64
242 void vector_maskall_operation32(KRegister dst, Register src, KRegister ktmp, int mask_len);
243 #endif
244
245 void string_indexof_char(Register str1, Register cnt1, Register ch, Register result,
246 XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
247
248 void stringL_indexof_char(Register str1, Register cnt1, Register ch, Register result,
249 XMMRegister vec1, XMMRegister vec2, XMMRegister vec3, Register tmp);
250
251 // IndexOf strings.
252 // Small strings are loaded through stack if they cross page boundary.
253 void string_indexof(Register str1, Register str2,
254 Register cnt1, Register cnt2,
255 int int_cnt2, Register result,
256 XMMRegister vec, Register tmp,
257 int ae);
258
259 // IndexOf for constant substrings with size >= 8 elements
260 // which don't need to be loaded through stack.
261 void string_indexofC8(Register str1, Register str2,
262 Register cnt1, Register cnt2,
263 int int_cnt2, Register result,
264 XMMRegister vec, Register tmp,
265 int ae);
266
267 // Smallest code: we don't need to load through stack,
268 // check string tail.
269
270 // helper function for string_compare
271 void load_next_elements(Register elem1, Register elem2, Register str1, Register str2,
272 Address::ScaleFactor scale, Address::ScaleFactor scale1,
273 Address::ScaleFactor scale2, Register index, int ae);
274 // Compare strings.
275 void string_compare(Register str1, Register str2,
276 Register cnt1, Register cnt2, Register result,
277 XMMRegister vec1, int ae, KRegister mask = knoreg);
278
279 // Search for Non-ASCII character (Negative byte value) in a byte array,
280 // return index of the first such character, otherwise len.
281 void count_positives(Register ary1, Register len,
282 Register result, Register tmp1,
283 XMMRegister vec1, XMMRegister vec2, KRegister mask1 = knoreg, KRegister mask2 = knoreg);
284
285 // Compare char[] or byte[] arrays.
286 void arrays_equals(bool is_array_equ, Register ary1, Register ary2, Register limit,
287 Register result, Register chr, XMMRegister vec1, XMMRegister vec2,
288 bool is_char, KRegister mask = knoreg, bool expand_ary2 = false);
289
290 void arrays_hashcode(Register str1, Register cnt1, Register result,
291 Register tmp1, Register tmp2, Register tmp3, XMMRegister vnext,
292 XMMRegister vcoef0, XMMRegister vcoef1, XMMRegister vcoef2, XMMRegister vcoef3,
293 XMMRegister vresult0, XMMRegister vresult1, XMMRegister vresult2, XMMRegister vresult3,
294 XMMRegister vtmp0, XMMRegister vtmp1, XMMRegister vtmp2, XMMRegister vtmp3,
295 BasicType eltype);
296
297 // helper functions for arrays_hashcode
298 int arrays_hashcode_elsize(BasicType eltype);
299 void arrays_hashcode_elload(Register dst, Address src, BasicType eltype);
300 void arrays_hashcode_elvload(XMMRegister dst, Address src, BasicType eltype);
301 void arrays_hashcode_elvload(XMMRegister dst, AddressLiteral src, BasicType eltype);
302 void arrays_hashcode_elvcast(XMMRegister dst, BasicType eltype);
303
304 #ifdef _LP64
305 void convertF2I(BasicType dst_bt, BasicType src_bt, Register dst, XMMRegister src);
306 #endif
307
308 void evmasked_op(int ideal_opc, BasicType eType, KRegister mask,
309 XMMRegister dst, XMMRegister src1, XMMRegister src2,
310 bool merge, int vlen_enc, bool is_varshift = false);
311
312 void evmasked_op(int ideal_opc, BasicType eType, KRegister mask,
313 XMMRegister dst, XMMRegister src1, Address src2,
314 bool merge, int vlen_enc);
315
316 void evmasked_op(int ideal_opc, BasicType eType, KRegister mask, XMMRegister dst,
317 XMMRegister src1, int imm8, bool merge, int vlen_enc);
318
319 void masked_op(int ideal_opc, int mask_len, KRegister dst,
320 KRegister src1, KRegister src2);
321
322 void vector_unsigned_cast(XMMRegister dst, XMMRegister src, int vlen_enc,
323 BasicType from_elem_bt, BasicType to_elem_bt);
324
325 void vector_signed_cast(XMMRegister dst, XMMRegister src, int vlen_enc,
326 BasicType from_elem_bt, BasicType to_elem_bt);
327
328 void vector_cast_int_to_subword(BasicType to_elem_bt, XMMRegister dst, XMMRegister zero,
329 XMMRegister xtmp, Register rscratch, int vec_enc);
330
331 void vector_castF2X_avx(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
332 XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4,
333 AddressLiteral float_sign_flip, Register rscratch, int vec_enc);
334
335 void vector_castF2X_evex(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
336 XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2, AddressLiteral float_sign_flip,
337 Register rscratch, int vec_enc);
338
339 void vector_castF2L_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
340 KRegister ktmp1, KRegister ktmp2, AddressLiteral double_sign_flip,
341 Register rscratch, int vec_enc);
342
343 void vector_castD2X_evex(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
344 XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2, AddressLiteral sign_flip,
345 Register rscratch, int vec_enc);
346
347 void vector_castD2X_avx(BasicType to_elem_bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
348 XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4, XMMRegister xtmp5,
349 AddressLiteral float_sign_flip, Register rscratch, int vec_enc);
350
351
352 void vector_cast_double_to_int_special_cases_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
353 XMMRegister xtmp3, XMMRegister xtmp4, XMMRegister xtmp5, Register rscratch,
354 AddressLiteral float_sign_flip, int vec_enc);
355
356 void vector_cast_double_to_int_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
357 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral float_sign_flip,
358 int vec_enc);
359
360 void vector_cast_double_to_long_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
361 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral double_sign_flip,
362 int vec_enc);
363
364 void vector_cast_float_to_int_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
365 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral float_sign_flip,
366 int vec_enc);
367
368 void vector_cast_float_to_long_special_cases_evex(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2,
369 KRegister ktmp1, KRegister ktmp2, Register rscratch, AddressLiteral double_sign_flip,
370 int vec_enc);
371
372 void vector_cast_float_to_int_special_cases_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3,
373 XMMRegister xtmp4, Register rscratch, AddressLiteral float_sign_flip,
374 int vec_enc);
375
376 void vector_crosslane_doubleword_pack_avx(XMMRegister dst, XMMRegister src, XMMRegister zero,
377 XMMRegister xtmp, int index, int vec_enc);
378
379 void vector_mask_cast(XMMRegister dst, XMMRegister src, BasicType dst_bt, BasicType src_bt, int vlen);
380
381 #ifdef _LP64
382 void vector_round_double_evex(XMMRegister dst, XMMRegister src, AddressLiteral double_sign_flip, AddressLiteral new_mxcsr, int vec_enc,
383 Register tmp, XMMRegister xtmp1, XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2);
384
385 void vector_round_float_evex(XMMRegister dst, XMMRegister src, AddressLiteral double_sign_flip, AddressLiteral new_mxcsr, int vec_enc,
386 Register tmp, XMMRegister xtmp1, XMMRegister xtmp2, KRegister ktmp1, KRegister ktmp2);
387
388 void vector_round_float_avx(XMMRegister dst, XMMRegister src, AddressLiteral float_sign_flip, AddressLiteral new_mxcsr, int vec_enc,
389 Register tmp, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4);
390
391 void vector_compress_expand_avx2(int opcode, XMMRegister dst, XMMRegister src, XMMRegister mask,
392 Register rtmp, Register rscratch, XMMRegister permv, XMMRegister xtmp,
393 BasicType bt, int vec_enc);
394 #endif // _LP64
395
396 void udivI(Register rax, Register divisor, Register rdx);
397 void umodI(Register rax, Register divisor, Register rdx);
398 void udivmodI(Register rax, Register divisor, Register rdx, Register tmp);
399
400 #ifdef _LP64
401 void reverseI(Register dst, Register src, XMMRegister xtmp1,
402 XMMRegister xtmp2, Register rtmp);
403 void reverseL(Register dst, Register src, XMMRegister xtmp1,
404 XMMRegister xtmp2, Register rtmp1, Register rtmp2);
405 void udivL(Register rax, Register divisor, Register rdx);
406 void umodL(Register rax, Register divisor, Register rdx);
407 void udivmodL(Register rax, Register divisor, Register rdx, Register tmp);
408 #endif
409
410 void evpternlog(XMMRegister dst, int func, KRegister mask, XMMRegister src2, XMMRegister src3,
411 bool merge, BasicType bt, int vlen_enc);
412
413 void evpternlog(XMMRegister dst, int func, KRegister mask, XMMRegister src2, Address src3,
414 bool merge, BasicType bt, int vlen_enc);
415
416 void vector_reverse_bit(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
417 XMMRegister xtmp2, Register rtmp, int vec_enc);
418
419 void vector_reverse_bit_gfni(BasicType bt, XMMRegister dst, XMMRegister src, AddressLiteral mask, int vec_enc,
420 XMMRegister xtmp, Register rscratch = noreg);
421
422 void vector_reverse_byte(BasicType bt, XMMRegister dst, XMMRegister src, int vec_enc);
423
424 void vector_popcount_int(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
425 XMMRegister xtmp2, Register rtmp, int vec_enc);
426
427 void vector_popcount_long(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
428 XMMRegister xtmp2, Register rtmp, int vec_enc);
429
430 void vector_popcount_short(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
431 XMMRegister xtmp2, Register rtmp, int vec_enc);
432
433 void vector_popcount_byte(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
434 XMMRegister xtmp2, Register rtmp, int vec_enc);
435
436 void vector_popcount_integral(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
437 XMMRegister xtmp2, Register rtmp, int vec_enc);
438
439 void vector_popcount_integral_evex(BasicType bt, XMMRegister dst, XMMRegister src,
440 KRegister mask, bool merge, int vec_enc);
441
442 void vbroadcast(BasicType bt, XMMRegister dst, int imm32, Register rtmp, int vec_enc);
443
444 void vector_reverse_byte64(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
445 XMMRegister xtmp2, Register rtmp, int vec_enc);
446
447 void vector_count_leading_zeros_evex(BasicType bt, XMMRegister dst, XMMRegister src,
448 XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3,
449 KRegister ktmp, Register rtmp, bool merge, int vec_enc);
450
451 void vector_count_leading_zeros_byte_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
452 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
453
454 void vector_count_leading_zeros_short_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
455 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
456
457 void vector_count_leading_zeros_int_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
458 XMMRegister xtmp2, XMMRegister xtmp3, int vec_enc);
459
460 void vector_count_leading_zeros_long_avx(XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
461 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
462
463 void vector_count_leading_zeros_avx(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
464 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
465
466 void vpadd(BasicType bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vec_enc);
467
468 void vpsub(BasicType bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vec_enc);
469
470 void vector_count_trailing_zeros_evex(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
471 XMMRegister xtmp2, XMMRegister xtmp3, XMMRegister xtmp4, KRegister ktmp,
472 Register rtmp, int vec_enc);
473
474 void vector_swap_nbits(int nbits, int bitmask, XMMRegister dst, XMMRegister src,
475 XMMRegister xtmp1, Register rtmp, int vec_enc);
476
477 void vector_count_trailing_zeros_avx(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
478 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc);
479
480 void vector_signum_avx(int opcode, XMMRegister dst, XMMRegister src, XMMRegister zero, XMMRegister one,
481 XMMRegister xtmp1, int vec_enc);
482
483 void vector_signum_evex(int opcode, XMMRegister dst, XMMRegister src, XMMRegister zero, XMMRegister one,
484 KRegister ktmp1, int vec_enc);
485
486 void vmovmask(BasicType elem_bt, XMMRegister dst, Address src, XMMRegister mask, int vec_enc);
487
488 void vmovmask(BasicType elem_bt, Address dst, XMMRegister src, XMMRegister mask, int vec_enc);
489
490 void rearrange_bytes(XMMRegister dst, XMMRegister shuffle, XMMRegister src, XMMRegister xtmp1,
491 XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, KRegister ktmp, int vlen_enc);
492
493 void vector_rearrange_int_float(BasicType bt, XMMRegister dst, XMMRegister shuffle,
494 XMMRegister src, int vlen_enc);
495
496
497 void vgather_subword(BasicType elem_ty, XMMRegister dst, Register base, Register idx_base, Register offset,
498 Register mask, XMMRegister xtmp1, XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp,
499 Register midx, Register length, int vector_len, int vlen_enc);
500
501 #ifdef _LP64
502 void vgather8b_masked_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
503 Register offset, Register mask, Register midx, Register rtmp, int vlen_enc);
504 #endif
505 void vgather8b_offset(BasicType elem_bt, XMMRegister dst, Register base, Register idx_base,
506 Register offset, Register rtmp, int vlen_enc);
507
508 void select_from_two_vectors_evex(BasicType elem_bt, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vlen_enc);
509
510 #endif // CPU_X86_C2_MACROASSEMBLER_X86_HPP