1 /*
  2  * Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "asm/macroAssembler.inline.hpp"
 27 #include "gc/g1/g1BarrierSet.hpp"
 28 #include "gc/g1/g1BarrierSetAssembler.hpp"
 29 #include "gc/g1/g1BarrierSetRuntime.hpp"
 30 #include "gc/g1/g1CardTable.hpp"
 31 #include "gc/g1/g1ThreadLocalData.hpp"
 32 #include "gc/g1/heapRegion.hpp"
 33 #include "interpreter/interp_masm.hpp"
 34 #include "runtime/sharedRuntime.hpp"
 35 #include "utilities/debug.hpp"
 36 #include "utilities/macros.hpp"
 37 #ifdef COMPILER1
 38 #include "c1/c1_LIRAssembler.hpp"
 39 #include "c1/c1_MacroAssembler.hpp"
 40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 41 #endif
 42 
 43 #define __ masm->
 44 
 45 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
 46                                                             Register addr, Register count) {
 47   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 48 
 49   if (!dest_uninitialized) {
 50     Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 51 #ifndef _LP64
 52     __ push(thread);
 53     __ get_thread(thread);
 54 #endif
 55 
 56     Label filtered;
 57     Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
 58     // Is marking active?
 59     if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 60       __ cmpl(in_progress, 0);
 61     } else {
 62       assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
 63       __ cmpb(in_progress, 0);
 64     }
 65 
 66     NOT_LP64(__ pop(thread);)
 67 
 68     __ jcc(Assembler::equal, filtered);
 69 
 70     __ push_call_clobbered_registers(false /* save_fpu */);
 71 #ifdef _LP64
 72     if (count == c_rarg0) {
 73       if (addr == c_rarg1) {
 74         // exactly backwards!!
 75         __ xchgptr(c_rarg1, c_rarg0);
 76       } else {
 77         __ movptr(c_rarg1, count);
 78         __ movptr(c_rarg0, addr);
 79       }
 80     } else {
 81       __ movptr(c_rarg0, addr);
 82       __ movptr(c_rarg1, count);
 83     }
 84     if (UseCompressedOops) {
 85       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 86     } else {
 87       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
 88     }
 89 #else
 90     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry),
 91                     addr, count);
 92 #endif
 93     __ pop_call_clobbered_registers(false /* save_fpu */);
 94 
 95     __ bind(filtered);
 96   }
 97 }
 98 
 99 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
100                                                              Register addr, Register count, Register tmp) {
101   __ push_call_clobbered_registers(false /* save_fpu */);
102 #ifdef _LP64
103   if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
104     assert_different_registers(c_rarg1, addr);
105     __ mov(c_rarg1, count);
106     __ mov(c_rarg0, addr);
107   } else {
108     assert_different_registers(c_rarg0, count);
109     __ mov(c_rarg0, addr);
110     __ mov(c_rarg1, count);
111   }
112   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
113 #else
114   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry),
115                   addr, count);
116 #endif
117   __ pop_call_clobbered_registers(false /* save_fpu */);
118 }
119 
120 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
121                                     Register dst, Address src, Register tmp1, Register tmp_thread) {
122   bool on_oop = is_reference_type(type);
123   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
124   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
125   bool on_reference = on_weak || on_phantom;
126   ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
127   if (on_oop && on_reference) {
128     const Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
129     NOT_LP64(__ get_thread(thread));
130 
131     // Generate the G1 pre-barrier code to log the value of
132     // the referent field in an SATB buffer.
133     g1_write_barrier_pre(masm /* masm */,
134                          noreg /* obj */,
135                          dst /* pre_val */,
136                          thread /* thread */,
137                          tmp1 /* tmp */,
138                          true /* tosca_live */,
139                          true /* expand_call */);
140   }
141 }
142 
143 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
144                                                  Register obj,
145                                                  Register pre_val,
146                                                  Register thread,
147                                                  Register tmp,
148                                                  bool tosca_live,
149                                                  bool expand_call) {
150   // If expand_call is true then we expand the call_VM_leaf macro
151   // directly to skip generating the check by
152   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
153 
154 #ifdef _LP64
155   assert(thread == r15_thread, "must be");
156 #endif // _LP64
157 
158   Label done;
159   Label runtime;
160 
161   assert(pre_val != noreg, "check this code");
162 
163   if (obj != noreg) {
164     assert_different_registers(obj, pre_val, tmp);
165     assert(pre_val != rax, "check this code");
166   }
167 
168   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
169   Address index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
170   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
171 
172   // Is marking active?
173   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
174     __ cmpl(in_progress, 0);
175   } else {
176     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
177     __ cmpb(in_progress, 0);
178   }
179   __ jcc(Assembler::equal, done);
180 
181   // Do we need to load the previous value?
182   if (obj != noreg) {
183     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
184   }
185 
186   // Is the previous value null?
187   __ cmpptr(pre_val, (int32_t) NULL_WORD);
188   __ jcc(Assembler::equal, done);
189 
190   // Can we store original value in the thread's buffer?
191   // Is index == 0?
192   // (The index field is typed as size_t.)
193   __ movptr(tmp, index);                   // tmp := *index_adr
194   __ cmpptr(tmp, 0);                       // tmp == 0?
195   __ jcc(Assembler::equal, runtime);       // If yes, goto runtime
196 
197   __ subptr(tmp, wordSize);                // tmp := tmp - wordSize
198   __ movptr(index, tmp);                   // *index_adr := tmp
199   __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr
200 
201   // Record the previous value
202   __ movptr(Address(tmp, 0), pre_val);
203   __ jmp(done);
204 
205   __ bind(runtime);
206   // Barriers might be emitted when converting between (scalarized) calling conventions for inline
207   // types. Save all argument registers before calling into the runtime.
208   // TODO: use push_set() (see JDK-8283327 push/pop_call_clobbered_registers & aarch64 )
209   __ pusha();
210   __ subptr(rsp, 64);
211   __ movdbl(Address(rsp, 0),  j_farg0);
212   __ movdbl(Address(rsp, 8),  j_farg1);
213   __ movdbl(Address(rsp, 16), j_farg2);
214   __ movdbl(Address(rsp, 24), j_farg3);
215   __ movdbl(Address(rsp, 32), j_farg4);
216   __ movdbl(Address(rsp, 40), j_farg5);
217   __ movdbl(Address(rsp, 48), j_farg6);
218   __ movdbl(Address(rsp, 56), j_farg7);
219 
220   // Calling the runtime using the regular call_VM_leaf mechanism generates
221   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
222   // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL.
223   //
224   // If we care generating the pre-barrier without a frame (e.g. in the
225   // intrinsified Reference.get() routine) then ebp might be pointing to
226   // the caller frame and so this check will most likely fail at runtime.
227   //
228   // Expanding the call directly bypasses the generation of the check.
229   // So when we do not have have a full interpreter frame on the stack
230   // expand_call should be passed true.
231 
232   if (expand_call) {
233     LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
234 #ifdef _LP64
235     if (c_rarg1 != thread) {
236       __ mov(c_rarg1, thread);
237     }
238     if (c_rarg0 != pre_val) {
239       __ mov(c_rarg0, pre_val);
240     }
241 #else
242     __ push(thread);
243     __ push(pre_val);
244 #endif
245     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), 2);
246   } else {
247     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
248   }
249 
250   // Restore registers
251   __ movdbl(j_farg0, Address(rsp, 0));
252   __ movdbl(j_farg1, Address(rsp, 8));
253   __ movdbl(j_farg2, Address(rsp, 16));
254   __ movdbl(j_farg3, Address(rsp, 24));
255   __ movdbl(j_farg4, Address(rsp, 32));
256   __ movdbl(j_farg5, Address(rsp, 40));
257   __ movdbl(j_farg6, Address(rsp, 48));
258   __ movdbl(j_farg7, Address(rsp, 56));
259   __ addptr(rsp, 64);
260   __ popa();
261 
262   __ bind(done);
263 }
264 
265 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
266                                                   Register store_addr,
267                                                   Register new_val,
268                                                   Register thread,
269                                                   Register tmp,
270                                                   Register tmp2) {
271   // Generated code assumes that buffer index is pointer sized.
272   STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t));
273 #ifdef _LP64
274   assert(thread == r15_thread, "must be");
275 #endif // _LP64
276 
277   Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
278   Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
279 
280   CardTableBarrierSet* ct =
281     barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
282 
283   Label done;
284   Label runtime;
285 
286   // Does store cross heap regions?
287 
288   __ movptr(tmp, store_addr);
289   __ xorptr(tmp, new_val);
290   __ shrptr(tmp, HeapRegion::LogOfHRGrainBytes);
291   __ jcc(Assembler::equal, done);
292 
293   // crosses regions, storing NULL?
294 
295   __ cmpptr(new_val, (int32_t) NULL_WORD);
296   __ jcc(Assembler::equal, done);
297 
298   // storing region crossing non-NULL, is card already dirty?
299 
300   const Register card_addr = tmp;
301   const Register cardtable = tmp2;
302 
303   __ movptr(card_addr, store_addr);
304   __ shrptr(card_addr, CardTable::card_shift());
305   // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
306   // a valid address and therefore is not properly handled by the relocation code.
307   __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base());
308   __ addptr(card_addr, cardtable);
309 
310   __ cmpb(Address(card_addr, 0), (int)G1CardTable::g1_young_card_val());
311   __ jcc(Assembler::equal, done);
312 
313   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
314   __ cmpb(Address(card_addr, 0), (int)G1CardTable::dirty_card_val());
315   __ jcc(Assembler::equal, done);
316 
317 
318   // storing a region crossing, non-NULL oop, card is clean.
319   // dirty card and log.
320 
321   __ movb(Address(card_addr, 0), (int)G1CardTable::dirty_card_val());
322 
323   __ movptr(tmp2, queue_index);
324   __ testptr(tmp2, tmp2);
325   __ jcc(Assembler::zero, runtime);
326   __ subptr(tmp2, wordSize);
327   __ movptr(queue_index, tmp2);
328   __ addptr(tmp2, buffer);
329   __ movptr(Address(tmp2, 0), card_addr);
330   __ jmp(done);
331 
332   __ bind(runtime);
333   // Barriers might be emitted when converting between (scalarized) calling conventions for inline
334   // types. Save all argument registers before calling into the runtime.
335   // TODO: use push_set() (see JDK-8283327 push/pop_call_clobbered_registers & aarch64)
336   __ pusha();
337   __ subptr(rsp, 64);
338   __ movdbl(Address(rsp, 0),  j_farg0);
339   __ movdbl(Address(rsp, 8),  j_farg1);
340   __ movdbl(Address(rsp, 16), j_farg2);
341   __ movdbl(Address(rsp, 24), j_farg3);
342   __ movdbl(Address(rsp, 32), j_farg4);
343   __ movdbl(Address(rsp, 40), j_farg5);
344   __ movdbl(Address(rsp, 48), j_farg6);
345   __ movdbl(Address(rsp, 56), j_farg7);
346 
347 #ifdef _LP64
348   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, r15_thread);
349 #else
350   __ push(thread);
351   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
352   __ pop(thread);
353 #endif
354 
355   // Restore registers
356   __ movdbl(j_farg0, Address(rsp, 0));
357   __ movdbl(j_farg1, Address(rsp, 8));
358   __ movdbl(j_farg2, Address(rsp, 16));
359   __ movdbl(j_farg3, Address(rsp, 24));
360   __ movdbl(j_farg4, Address(rsp, 32));
361   __ movdbl(j_farg5, Address(rsp, 40));
362   __ movdbl(j_farg6, Address(rsp, 48));
363   __ movdbl(j_farg7, Address(rsp, 56));
364   __ addptr(rsp, 64);
365   __ popa();
366 
367   __ bind(done);
368 }
369 
370 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
371                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
372   bool in_heap = (decorators & IN_HEAP) != 0;
373   bool as_normal = (decorators & AS_NORMAL) != 0;
374   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
375 
376   bool needs_pre_barrier = as_normal && !dest_uninitialized;
377   bool needs_post_barrier = val != noreg && in_heap;
378 
379   Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
380   // flatten object address if needed
381   // We do it regardless of precise because we need the registers
382   if (dst.index() == noreg && dst.disp() == 0) {
383     if (dst.base() != tmp1) {
384       __ movptr(tmp1, dst.base());
385     }
386   } else {
387     __ lea(tmp1, dst);
388   }
389 
390 #ifndef _LP64
391   InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
392 #endif
393 
394   NOT_LP64(__ get_thread(rcx));
395   NOT_LP64(imasm->save_bcp());
396 
397   if (needs_pre_barrier) {
398     g1_write_barrier_pre(masm /*masm*/,
399                          tmp1 /* obj */,
400                          tmp2 /* pre_val */,
401                          rthread /* thread */,
402                          tmp3  /* tmp */,
403                          val != noreg /* tosca_live */,
404                          false /* expand_call */);
405   }
406   if (val == noreg) {
407     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg);
408   } else {
409     Register new_val = val;
410     if (needs_post_barrier) {
411       // G1 barrier needs uncompressed oop for region cross check.
412       if (UseCompressedOops) {
413         new_val = tmp2;
414         __ movptr(new_val, val);
415       }
416     }
417     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg);
418     if (needs_post_barrier) {
419       g1_write_barrier_post(masm /*masm*/,
420                             tmp1 /* store_adr */,
421                             new_val /* new_val */,
422                             rthread /* thread */,
423                             tmp3 /* tmp */,
424                             tmp2 /* tmp2 */);
425     }
426   }
427   NOT_LP64(imasm->restore_bcp());
428 }
429 
430 #ifdef COMPILER1
431 
432 #undef __
433 #define __ ce->masm()->
434 
435 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
436   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
437   // At this point we know that marking is in progress.
438   // If do_load() is true then we have to emit the
439   // load of the previous value; otherwise it has already
440   // been loaded into _pre_val.
441 
442   __ bind(*stub->entry());
443   assert(stub->pre_val()->is_register(), "Precondition.");
444 
445   Register pre_val_reg = stub->pre_val()->as_register();
446 
447   if (stub->do_load()) {
448     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
449   }
450 
451   __ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
452   __ jcc(Assembler::equal, *stub->continuation());
453   ce->store_parameter(stub->pre_val()->as_register(), 0);
454   __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
455   __ jmp(*stub->continuation());
456 
457 }
458 
459 void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
460   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
461   __ bind(*stub->entry());
462   assert(stub->addr()->is_register(), "Precondition.");
463   assert(stub->new_val()->is_register(), "Precondition.");
464   Register new_val_reg = stub->new_val()->as_register();
465   __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
466   __ jcc(Assembler::equal, *stub->continuation());
467   ce->store_parameter(stub->addr()->as_pointer_register(), 0);
468   __ call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
469   __ jmp(*stub->continuation());
470 }
471 
472 #undef __
473 
474 #define __ sasm->
475 
476 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
477   // Generated code assumes that buffer index is pointer sized.
478   STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t));
479 
480   __ prologue("g1_pre_barrier", false);
481   // arg0 : previous value of memory
482 
483   __ push(rax);
484   __ push(rdx);
485 
486   const Register pre_val = rax;
487   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
488   const Register tmp = rdx;
489 
490   NOT_LP64(__ get_thread(thread);)
491 
492   Address queue_active(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
493   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
494   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
495 
496   Label done;
497   Label runtime;
498 
499   // Is marking still active?
500   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
501     __ cmpl(queue_active, 0);
502   } else {
503     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
504     __ cmpb(queue_active, 0);
505   }
506   __ jcc(Assembler::equal, done);
507 
508   // Can we store original value in the thread's buffer?
509 
510   __ movptr(tmp, queue_index);
511   __ testptr(tmp, tmp);
512   __ jcc(Assembler::zero, runtime);
513   __ subptr(tmp, wordSize);
514   __ movptr(queue_index, tmp);
515   __ addptr(tmp, buffer);
516 
517   // prev_val (rax)
518   __ load_parameter(0, pre_val);
519   __ movptr(Address(tmp, 0), pre_val);
520   __ jmp(done);
521 
522   __ bind(runtime);
523 
524   __ push_call_clobbered_registers();
525 
526   // load the pre-value
527   __ load_parameter(0, rcx);
528   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), rcx, thread);
529 
530   __ pop_call_clobbered_registers();
531 
532   __ bind(done);
533 
534   __ pop(rdx);
535   __ pop(rax);
536 
537   __ epilogue();
538 }
539 
540 void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
541   __ prologue("g1_post_barrier", false);
542 
543   CardTableBarrierSet* ct =
544     barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
545 
546   Label done;
547   Label enqueued;
548   Label runtime;
549 
550   // At this point we know new_value is non-NULL and the new_value crosses regions.
551   // Must check to see if card is already dirty
552 
553   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
554 
555   Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
556   Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
557 
558   __ push(rax);
559   __ push(rcx);
560 
561   const Register cardtable = rax;
562   const Register card_addr = rcx;
563 
564   __ load_parameter(0, card_addr);
565   __ shrptr(card_addr, CardTable::card_shift());
566   // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
567   // a valid address and therefore is not properly handled by the relocation code.
568   __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base());
569   __ addptr(card_addr, cardtable);
570 
571   NOT_LP64(__ get_thread(thread);)
572 
573   __ cmpb(Address(card_addr, 0), (int)G1CardTable::g1_young_card_val());
574   __ jcc(Assembler::equal, done);
575 
576   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
577   __ cmpb(Address(card_addr, 0), (int)CardTable::dirty_card_val());
578   __ jcc(Assembler::equal, done);
579 
580   // storing region crossing non-NULL, card is clean.
581   // dirty card and log.
582 
583   __ movb(Address(card_addr, 0), (int)CardTable::dirty_card_val());
584 
585   const Register tmp = rdx;
586   __ push(rdx);
587 
588   __ movptr(tmp, queue_index);
589   __ testptr(tmp, tmp);
590   __ jcc(Assembler::zero, runtime);
591   __ subptr(tmp, wordSize);
592   __ movptr(queue_index, tmp);
593   __ addptr(tmp, buffer);
594   __ movptr(Address(tmp, 0), card_addr);
595   __ jmp(enqueued);
596 
597   __ bind(runtime);
598   __ push_call_clobbered_registers();
599 
600   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
601 
602   __ pop_call_clobbered_registers();
603 
604   __ bind(enqueued);
605   __ pop(rdx);
606 
607   __ bind(done);
608   __ pop(rcx);
609   __ pop(rax);
610 
611   __ epilogue();
612 }
613 
614 #undef __
615 
616 #endif // COMPILER1