1 /* 2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "asm/macroAssembler.inline.hpp" 26 #include "code/aotCodeCache.hpp" 27 #include "gc/g1/g1BarrierSet.hpp" 28 #include "gc/g1/g1BarrierSetAssembler.hpp" 29 #include "gc/g1/g1BarrierSetRuntime.hpp" 30 #include "gc/g1/g1CardTable.hpp" 31 #include "gc/g1/g1HeapRegion.hpp" 32 #include "gc/g1/g1ThreadLocalData.hpp" 33 #include "interpreter/interp_masm.hpp" 34 #include "runtime/sharedRuntime.hpp" 35 #include "utilities/debug.hpp" 36 #include "utilities/macros.hpp" 37 #ifdef COMPILER1 38 #include "c1/c1_LIRAssembler.hpp" 39 #include "c1/c1_MacroAssembler.hpp" 40 #include "gc/g1/c1/g1BarrierSetC1.hpp" 41 #endif // COMPILER1 42 #ifdef COMPILER2 43 #include "gc/g1/c2/g1BarrierSetC2.hpp" 44 #endif // COMPILER2 45 46 #define __ masm-> 47 48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, 49 Register addr, Register count) { 50 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; 51 52 if (!dest_uninitialized) { 53 Register thread = r15_thread; 54 55 Label filtered; 56 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset())); 57 // Is marking active? 58 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 59 __ cmpl(in_progress, 0); 60 } else { 61 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 62 __ cmpb(in_progress, 0); 63 } 64 65 __ jcc(Assembler::equal, filtered); 66 67 __ push_call_clobbered_registers(false /* save_fpu */); 68 if (count == c_rarg0) { 69 if (addr == c_rarg1) { 70 // exactly backwards!! 71 __ xchgptr(c_rarg1, c_rarg0); 72 } else { 73 __ movptr(c_rarg1, count); 74 __ movptr(c_rarg0, addr); 75 } 76 } else { 77 __ movptr(c_rarg0, addr); 78 __ movptr(c_rarg1, count); 79 } 80 if (UseCompressedOops) { 81 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2); 82 } else { 83 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2); 84 } 85 __ pop_call_clobbered_registers(false /* save_fpu */); 86 87 __ bind(filtered); 88 } 89 } 90 91 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, 92 Register addr, Register count, Register tmp) { 93 Label L_done; 94 95 __ testptr(count, count); 96 __ jccb(Assembler::zero, L_done); 97 98 // Calculate end address in "count". 99 Address::ScaleFactor scale = UseCompressedOops ? Address::times_4 : Address::times_8; 100 __ leaq(count, Address(addr, count, scale)); 101 102 // Calculate start card address in "addr". 103 __ shrptr(addr, CardTable::card_shift()); 104 105 Register thread = r15_thread; 106 107 __ movptr(tmp, Address(thread, in_bytes(G1ThreadLocalData::card_table_base_offset()))); 108 __ addptr(addr, tmp); 109 110 // Calculate address of card of last word in the array. 111 __ subptr(count, 1); 112 __ shrptr(count, CardTable::card_shift()); 113 __ addptr(count, tmp); 114 115 Label L_loop; 116 // Iterate from start card to end card (inclusive). 117 __ bind(L_loop); 118 119 Label L_is_clean_card; 120 if (UseCondCardMark) { 121 __ cmpb(Address(addr, 0), G1CardTable::clean_card_val()); 122 __ jccb(Assembler::equal, L_is_clean_card); 123 } else { 124 __ movb(Address(addr, 0), G1CardTable::dirty_card_val()); 125 } 126 127 Label L_next_card; 128 __ bind(L_next_card); 129 __ addptr(addr, sizeof(CardTable::CardValue)); 130 __ cmpptr(addr, count); 131 __ jccb(Assembler::belowEqual, L_loop); 132 __ jmpb(L_done); 133 134 __ bind(L_is_clean_card); 135 // Card was clean. Dirty card and go to next. 136 __ movb(Address(addr, 0), G1CardTable::dirty_card_val()); 137 __ jmpb(L_next_card); 138 139 __ bind(L_done); 140 } 141 142 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, 143 Register dst, Address src, Register tmp1) { 144 bool on_oop = is_reference_type(type); 145 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0; 146 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0; 147 bool on_reference = on_weak || on_phantom; 148 CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1); 149 if (on_oop && on_reference) { 150 // Generate the G1 pre-barrier code to log the value of 151 // the referent field in an SATB buffer. 152 g1_write_barrier_pre(masm /* masm */, 153 noreg /* obj */, 154 dst /* pre_val */, 155 tmp1 /* tmp */, 156 true /* tosca_live */, 157 true /* expand_call */); 158 } 159 } 160 161 static void generate_pre_barrier_fast_path(MacroAssembler* masm, 162 const Register thread) { 163 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset())); 164 // Is marking active? 165 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 166 __ cmpl(in_progress, 0); 167 } else { 168 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 169 __ cmpb(in_progress, 0); 170 } 171 } 172 173 static void generate_pre_barrier_slow_path(MacroAssembler* masm, 174 const Register obj, 175 const Register pre_val, 176 const Register thread, 177 const Register tmp, 178 Label& L_done) { 179 Address index_addr(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset())); 180 Address buffer_addr(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset())); 181 182 // This code assumes that buffer index is pointer sized. 183 STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t)); 184 185 Label L_runtime; 186 187 // Do we need to load the previous value? 188 if (obj != noreg) { 189 __ load_heap_oop(pre_val, Address(obj, 0), noreg, AS_RAW); 190 } 191 192 // Is the previous value null? 193 __ testptr(pre_val, pre_val); 194 __ jcc(Assembler::equal, L_done); 195 196 // Can we store a value in the given thread's buffer? 197 // (The index field is typed as size_t.) 198 __ movptr(tmp, index_addr); // temp := *(index address) 199 __ testptr(tmp, tmp); // index == 0? 200 __ jccb(Assembler::zero, L_runtime); // jump to runtime if index == 0 (full buffer) 201 202 // The buffer is not full, store value into it. 203 __ subptr(tmp, wordSize); // temp := next index 204 __ movptr(index_addr, tmp); // *(index address) := next index 205 __ addptr(tmp, buffer_addr); // temp := buffer address + next index 206 __ movptr(Address(tmp, 0), pre_val); // *(buffer address + next index) := value 207 208 // Jump out if done, or fall-through to runtime. 209 // "L_done" is far away, so jump cannot be short. 210 __ jmp(L_done); 211 __ bind(L_runtime); 212 } 213 214 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm, 215 Register obj, 216 Register pre_val, 217 Register tmp, 218 bool tosca_live, 219 bool expand_call) { 220 // If expand_call is true then we expand the call_VM_leaf macro 221 // directly to skip generating the check by 222 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp. 223 const Register thread = r15_thread; 224 225 Label done; 226 227 assert(pre_val != noreg, "check this code"); 228 229 if (obj != noreg) { 230 assert_different_registers(obj, pre_val, tmp); 231 assert(pre_val != rax, "check this code"); 232 } 233 234 generate_pre_barrier_fast_path(masm, thread); 235 // If marking is not active (*(mark queue active address) == 0), jump to done 236 __ jcc(Assembler::equal, done); 237 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp, done); 238 239 // Determine and save the live input values 240 __ push_call_clobbered_registers(); 241 242 // Calling the runtime using the regular call_VM_leaf mechanism generates 243 // code (generated by InterpreterMacroAssember::call_VM_leaf_base) 244 // that checks that the *(ebp+frame::interpreter_frame_last_sp) == nullptr. 245 // 246 // If we care generating the pre-barrier without a frame (e.g. in the 247 // intrinsified Reference.get() routine) then ebp might be pointing to 248 // the caller frame and so this check will most likely fail at runtime. 249 // 250 // Expanding the call directly bypasses the generation of the check. 251 // So when we do not have have a full interpreter frame on the stack 252 // expand_call should be passed true. 253 254 if (expand_call) { 255 assert(pre_val != c_rarg1, "smashed arg"); 256 if (c_rarg1 != thread) { 257 __ mov(c_rarg1, thread); 258 } 259 if (c_rarg0 != pre_val) { 260 __ mov(c_rarg0, pre_val); 261 } 262 __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), 2); 263 } else { 264 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread); 265 } 266 267 __ pop_call_clobbered_registers(); 268 269 __ bind(done); 270 } 271 272 #if INCLUDE_CDS 273 // return a register that differs from reg1, reg2, reg3 and reg4 274 275 static Register pick_different_reg(Register reg1, Register reg2 = noreg, Register reg3= noreg, Register reg4 = noreg) { 276 RegSet available = (RegSet::of(rscratch1, rscratch2, rax, rbx) + rdx - 277 RegSet::of(reg1, reg2, reg3, reg4)); 278 return *(available.begin()); 279 } 280 #endif // INCLUDE_CDS 281 282 static void generate_post_barrier(MacroAssembler* masm, 283 const Register store_addr, 284 const Register new_val, 285 const Register tmp1, 286 bool new_val_may_be_null) { 287 288 assert_different_registers(store_addr, new_val, tmp1, noreg); 289 290 Register thread = r15_thread; 291 292 Label L_done; 293 // Does store cross heap regions? 294 #if INCLUDE_CDS 295 // AOT code needs to load the barrier grain shift from the aot 296 // runtime constants area in the code cache otherwise we can compile 297 // it as an immediate operand 298 299 if (AOTCodeCache::is_on_for_dump()) { 300 address grain_shift_addr = AOTRuntimeConstants::grain_shift_address(); 301 Register save = pick_different_reg(rcx, tmp1, new_val, store_addr); 302 __ push(save); 303 __ movptr(save, store_addr); 304 __ xorptr(save, new_val); 305 __ push(rcx); 306 __ lea(rcx, ExternalAddress(grain_shift_addr)); 307 __ movl(rcx, Address(rcx, 0)); 308 __ shrptr(save); 309 __ pop(rcx); 310 __ pop(save); 311 __ jcc(Assembler::equal, L_done); 312 } else 313 #endif // INCLUDE_CDS 314 { 315 __ movptr(tmp1, store_addr); // tmp1 := store address 316 __ xorptr(tmp1, new_val); // tmp1 := store address ^ new value 317 __ shrptr(tmp1, G1HeapRegion::LogOfHRGrainBytes); // ((store address ^ new value) >> LogOfHRGrainBytes) == 0? 318 __ jccb(Assembler::equal, L_done); 319 } 320 321 // Crosses regions, storing null? 322 if (new_val_may_be_null) { 323 __ testptr(new_val, new_val); // new value == null? 324 __ jccb(Assembler::equal, L_done); 325 } 326 327 __ movptr(tmp1, store_addr); // tmp1 := store address 328 __ shrptr(tmp1, CardTable::card_shift()); // tmp1 := card address relative to card table base 329 330 Address card_table_addr(thread, in_bytes(G1ThreadLocalData::card_table_base_offset())); 331 __ addptr(tmp1, card_table_addr); // tmp1 := card address 332 if (UseCondCardMark) { 333 __ cmpb(Address(tmp1, 0), G1CardTable::clean_card_val()); // *(card address) == clean_card_val? 334 __ jccb(Assembler::notEqual, L_done); 335 } 336 // Storing a region crossing, non-null oop, card is clean. 337 // Dirty card. 338 __ movb(Address(tmp1, 0), G1CardTable::dirty_card_val()); // *(card address) := dirty_card_val 339 __ bind(L_done); 340 } 341 342 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm, 343 Register store_addr, 344 Register new_val, 345 Register tmp) { 346 generate_post_barrier(masm, store_addr, new_val, tmp, true /* new_val_may_be_null */); 347 } 348 349 #if defined(COMPILER2) 350 351 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) { 352 SaveLiveRegisters save_registers(masm, stub); 353 if (c_rarg0 != arg) { 354 __ mov(c_rarg0, arg); 355 } 356 __ mov(c_rarg1, r15_thread); 357 // rax is a caller-saved, non-argument-passing register, so it does not 358 // interfere with c_rarg0 or c_rarg1. If it contained any live value before 359 // entering this stub, it is saved at this point, and restored after the 360 // call. If it did not contain any live value, it is free to be used. In 361 // either case, it is safe to use it here as a call scratch register. 362 __ call(RuntimeAddress(runtime_path), rax); 363 } 364 365 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm, 366 Register obj, 367 Register pre_val, 368 Register tmp, 369 G1PreBarrierStubC2* stub) { 370 const Register thread = r15_thread; 371 372 assert(pre_val != noreg, "check this code"); 373 if (obj != noreg) { 374 assert_different_registers(obj, pre_val, tmp); 375 } 376 377 stub->initialize_registers(obj, pre_val, thread, tmp); 378 379 generate_pre_barrier_fast_path(masm, thread); 380 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path) 381 __ jcc(Assembler::notEqual, *stub->entry()); 382 383 __ bind(*stub->continuation()); 384 } 385 386 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm, 387 G1PreBarrierStubC2* stub) const { 388 Assembler::InlineSkippedInstructionsCounter skip_counter(masm); 389 Register obj = stub->obj(); 390 Register pre_val = stub->pre_val(); 391 Register thread = stub->thread(); 392 Register tmp = stub->tmp1(); 393 assert(stub->tmp2() == noreg, "not needed in this platform"); 394 395 __ bind(*stub->entry()); 396 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp, *stub->continuation()); 397 398 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry)); 399 __ jmp(*stub->continuation()); 400 } 401 402 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm, 403 Register store_addr, 404 Register new_val, 405 Register tmp, 406 bool new_val_may_be_null) { 407 generate_post_barrier(masm, store_addr, new_val, tmp, new_val_may_be_null); 408 } 409 410 #endif // COMPILER2 411 412 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, 413 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) { 414 bool in_heap = (decorators & IN_HEAP) != 0; 415 bool as_normal = (decorators & AS_NORMAL) != 0; 416 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; 417 418 bool needs_pre_barrier = as_normal && !dest_uninitialized; 419 bool needs_post_barrier = val != noreg && in_heap; 420 421 // flatten object address if needed 422 // We do it regardless of precise because we need the registers 423 if (dst.index() == noreg && dst.disp() == 0) { 424 if (dst.base() != tmp1) { 425 __ movptr(tmp1, dst.base()); 426 } 427 } else { 428 __ lea(tmp1, dst); 429 } 430 431 if (needs_pre_barrier) { 432 g1_write_barrier_pre(masm /*masm*/, 433 tmp1 /* obj */, 434 tmp2 /* pre_val */, 435 tmp3 /* tmp */, 436 val != noreg /* tosca_live */, 437 false /* expand_call */); 438 } 439 if (val == noreg) { 440 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg); 441 } else { 442 Register new_val = val; 443 if (needs_post_barrier) { 444 // G1 barrier needs uncompressed oop for region cross check. 445 if (UseCompressedOops) { 446 new_val = tmp2; 447 __ movptr(new_val, val); 448 } 449 } 450 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg); 451 if (needs_post_barrier) { 452 g1_write_barrier_post(masm /*masm*/, 453 tmp1 /* store_adr */, 454 new_val /* new_val */, 455 tmp3 /* tmp */); 456 } 457 } 458 } 459 460 #ifdef COMPILER1 461 462 #undef __ 463 #define __ ce->masm()-> 464 465 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) { 466 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1(); 467 // At this point we know that marking is in progress. 468 // If do_load() is true then we have to emit the 469 // load of the previous value; otherwise it has already 470 // been loaded into _pre_val. 471 472 __ bind(*stub->entry()); 473 assert(stub->pre_val()->is_register(), "Precondition."); 474 475 Register pre_val_reg = stub->pre_val()->as_register(); 476 477 if (stub->do_load()) { 478 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/); 479 } 480 481 __ testptr(pre_val_reg, pre_val_reg); 482 __ jcc(Assembler::equal, *stub->continuation()); 483 ce->store_parameter(stub->pre_val()->as_register(), 0); 484 __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin())); 485 __ jmp(*stub->continuation()); 486 487 } 488 489 #undef __ 490 491 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm, 492 Register store_addr, 493 Register new_val, 494 Register thread, 495 Register tmp1, 496 Register tmp2 /* unused on x86 */) { 497 generate_post_barrier(masm, store_addr, new_val, tmp1, true /* new_val_may_be_null */); 498 } 499 500 #define __ sasm-> 501 502 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) { 503 // Generated code assumes that buffer index is pointer sized. 504 STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t)); 505 506 __ prologue("g1_pre_barrier", false); 507 // arg0 : previous value of memory 508 509 __ push_ppx(rax); 510 __ push_ppx(rdx); 511 512 const Register pre_val = rax; 513 const Register thread = r15_thread; 514 const Register tmp = rdx; 515 516 Address queue_active(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset())); 517 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset())); 518 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset())); 519 520 Label L_done, L_runtime; 521 522 // Is marking still active? 523 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 524 __ cmpl(queue_active, 0); 525 } else { 526 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 527 __ cmpb(queue_active, 0); 528 } 529 __ jcc(Assembler::equal, L_done); 530 531 // Can we store original value in the thread's buffer? 532 533 __ movptr(tmp, queue_index); 534 __ testptr(tmp, tmp); 535 __ jccb(Assembler::zero, L_runtime); 536 __ subptr(tmp, wordSize); 537 __ movptr(queue_index, tmp); 538 __ addptr(tmp, buffer); 539 540 // prev_val (rax) 541 __ load_parameter(0, pre_val); 542 __ movptr(Address(tmp, 0), pre_val); 543 __ jmp(L_done); 544 545 __ bind(L_runtime); 546 547 __ push_call_clobbered_registers(); 548 549 // load the pre-value 550 __ load_parameter(0, rcx); 551 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), rcx, thread); 552 553 __ pop_call_clobbered_registers(); 554 555 __ bind(L_done); 556 557 __ pop_ppx(rdx); 558 __ pop_ppx(rax); 559 560 __ epilogue(); 561 } 562 563 #undef __ 564 565 #endif // COMPILER1 --- EOF ---