1 /* 2 * Copyright (c) 2018, 2023, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.inline.hpp" 27 #include "gc/g1/g1BarrierSet.hpp" 28 #include "gc/g1/g1BarrierSetAssembler.hpp" 29 #include "gc/g1/g1BarrierSetRuntime.hpp" 30 #include "gc/g1/g1CardTable.hpp" 31 #include "gc/g1/g1HeapRegion.hpp" 32 #include "gc/g1/g1ThreadLocalData.hpp" 33 #include "interpreter/interp_masm.hpp" 34 #include "runtime/sharedRuntime.hpp" 35 #include "utilities/debug.hpp" 36 #include "utilities/macros.hpp" 37 #ifdef COMPILER1 38 #include "c1/c1_LIRAssembler.hpp" 39 #include "c1/c1_MacroAssembler.hpp" 40 #include "gc/g1/c1/g1BarrierSetC1.hpp" 41 #endif 42 43 #define __ masm-> 44 45 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators, 46 Register addr, Register count) { 47 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; 48 49 if (!dest_uninitialized) { 50 Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); 51 #ifndef _LP64 52 __ push(thread); 53 __ get_thread(thread); 54 #endif 55 56 Label filtered; 57 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset())); 58 // Is marking active? 59 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 60 __ cmpl(in_progress, 0); 61 } else { 62 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 63 __ cmpb(in_progress, 0); 64 } 65 66 NOT_LP64(__ pop(thread);) 67 68 __ jcc(Assembler::equal, filtered); 69 70 __ push_call_clobbered_registers(false /* save_fpu */); 71 #ifdef _LP64 72 if (count == c_rarg0) { 73 if (addr == c_rarg1) { 74 // exactly backwards!! 75 __ xchgptr(c_rarg1, c_rarg0); 76 } else { 77 __ movptr(c_rarg1, count); 78 __ movptr(c_rarg0, addr); 79 } 80 } else { 81 __ movptr(c_rarg0, addr); 82 __ movptr(c_rarg1, count); 83 } 84 if (UseCompressedOops) { 85 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2); 86 } else { 87 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2); 88 } 89 #else 90 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 91 addr, count); 92 #endif 93 __ pop_call_clobbered_registers(false /* save_fpu */); 94 95 __ bind(filtered); 96 } 97 } 98 99 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, 100 Register addr, Register count, Register tmp) { 101 __ push_call_clobbered_registers(false /* save_fpu */); 102 #ifdef _LP64 103 if (c_rarg0 == count) { // On win64 c_rarg0 == rcx 104 assert_different_registers(c_rarg1, addr); 105 __ mov(c_rarg1, count); 106 __ mov(c_rarg0, addr); 107 } else { 108 assert_different_registers(c_rarg0, count); 109 __ mov(c_rarg0, addr); 110 __ mov(c_rarg1, count); 111 } 112 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2); 113 #else 114 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 115 addr, count); 116 #endif 117 __ pop_call_clobbered_registers(false /* save_fpu */); 118 } 119 120 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, 121 Register dst, Address src, Register tmp1, Register tmp_thread) { 122 bool on_oop = is_reference_type(type); 123 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0; 124 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0; 125 bool on_reference = on_weak || on_phantom; 126 ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread); 127 if (on_oop && on_reference) { 128 Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread); 129 130 #ifndef _LP64 131 // Work around the x86_32 bug that only manifests with Loom for some reason. 132 // MacroAssembler::resolve_weak_handle calls this barrier with tmp_thread == noreg. 133 if (thread == noreg) { 134 if (dst != rcx && tmp1 != rcx) { 135 thread = rcx; 136 } else if (dst != rdx && tmp1 != rdx) { 137 thread = rdx; 138 } else if (dst != rdi && tmp1 != rdi) { 139 thread = rdi; 140 } 141 } 142 assert_different_registers(dst, tmp1, thread); 143 __ push(thread); 144 __ get_thread(thread); 145 #endif 146 147 // Generate the G1 pre-barrier code to log the value of 148 // the referent field in an SATB buffer. 149 g1_write_barrier_pre(masm /* masm */, 150 noreg /* obj */, 151 dst /* pre_val */, 152 thread /* thread */, 153 tmp1 /* tmp */, 154 true /* tosca_live */, 155 true /* expand_call */); 156 157 #ifndef _LP64 158 __ pop(thread); 159 #endif 160 } 161 } 162 163 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm, 164 Register obj, 165 Register pre_val, 166 Register thread, 167 Register tmp, 168 bool tosca_live, 169 bool expand_call) { 170 // If expand_call is true then we expand the call_VM_leaf macro 171 // directly to skip generating the check by 172 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp. 173 174 #ifdef _LP64 175 assert(thread == r15_thread, "must be"); 176 #endif // _LP64 177 178 Label done; 179 Label runtime; 180 181 assert(pre_val != noreg, "check this code"); 182 183 if (obj != noreg) { 184 assert_different_registers(obj, pre_val, tmp); 185 assert(pre_val != rax, "check this code"); 186 } 187 188 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset())); 189 Address index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset())); 190 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset())); 191 192 // Is marking active? 193 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 194 __ cmpl(in_progress, 0); 195 } else { 196 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 197 __ cmpb(in_progress, 0); 198 } 199 __ jcc(Assembler::equal, done); 200 201 // Do we need to load the previous value? 202 if (obj != noreg) { 203 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW); 204 } 205 206 // Is the previous value null? 207 __ cmpptr(pre_val, NULL_WORD); 208 __ jcc(Assembler::equal, done); 209 210 // Can we store original value in the thread's buffer? 211 // Is index == 0? 212 // (The index field is typed as size_t.) 213 __ movptr(tmp, index); // tmp := *index_adr 214 __ cmpptr(tmp, 0); // tmp == 0? 215 __ jcc(Assembler::equal, runtime); // If yes, goto runtime 216 217 __ subptr(tmp, wordSize); // tmp := tmp - wordSize 218 __ movptr(index, tmp); // *index_adr := tmp 219 __ addptr(tmp, buffer); // tmp := tmp + *buffer_adr 220 221 // Record the previous value 222 __ movptr(Address(tmp, 0), pre_val); 223 __ jmp(done); 224 225 __ bind(runtime); 226 227 if (EnableValhalla && InlineTypePassFieldsAsArgs) { 228 // Barriers might be emitted when converting between (scalarized) calling conventions for inline 229 // types. Save all argument registers before calling into the runtime. 230 // TODO: use push_set() (see JDK-8283327 push/pop_call_clobbered_registers & aarch64 ) 231 __ pusha(); 232 __ subptr(rsp, 64); 233 __ movdbl(Address(rsp, 0), j_farg0); 234 __ movdbl(Address(rsp, 8), j_farg1); 235 __ movdbl(Address(rsp, 16), j_farg2); 236 __ movdbl(Address(rsp, 24), j_farg3); 237 __ movdbl(Address(rsp, 32), j_farg4); 238 __ movdbl(Address(rsp, 40), j_farg5); 239 __ movdbl(Address(rsp, 48), j_farg6); 240 __ movdbl(Address(rsp, 56), j_farg7); 241 } else { 242 // Determine and save the live input values 243 __ push_call_clobbered_registers(); 244 } 245 246 // Calling the runtime using the regular call_VM_leaf mechanism generates 247 // code (generated by InterpreterMacroAssember::call_VM_leaf_base) 248 // that checks that the *(ebp+frame::interpreter_frame_last_sp) == nullptr. 249 // 250 // If we care generating the pre-barrier without a frame (e.g. in the 251 // intrinsified Reference.get() routine) then ebp might be pointing to 252 // the caller frame and so this check will most likely fail at runtime. 253 // 254 // Expanding the call directly bypasses the generation of the check. 255 // So when we do not have have a full interpreter frame on the stack 256 // expand_call should be passed true. 257 258 if (expand_call) { 259 LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); ) 260 #ifdef _LP64 261 if (c_rarg1 != thread) { 262 __ mov(c_rarg1, thread); 263 } 264 if (c_rarg0 != pre_val) { 265 __ mov(c_rarg0, pre_val); 266 } 267 #else 268 __ push(thread); 269 __ push(pre_val); 270 #endif 271 __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), 2); 272 } else { 273 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread); 274 } 275 276 if (EnableValhalla && InlineTypePassFieldsAsArgs) { 277 // Restore registers 278 __ movdbl(j_farg0, Address(rsp, 0)); 279 __ movdbl(j_farg1, Address(rsp, 8)); 280 __ movdbl(j_farg2, Address(rsp, 16)); 281 __ movdbl(j_farg3, Address(rsp, 24)); 282 __ movdbl(j_farg4, Address(rsp, 32)); 283 __ movdbl(j_farg5, Address(rsp, 40)); 284 __ movdbl(j_farg6, Address(rsp, 48)); 285 __ movdbl(j_farg7, Address(rsp, 56)); 286 __ addptr(rsp, 64); 287 __ popa(); 288 } else { 289 __ pop_call_clobbered_registers(); 290 } 291 292 __ bind(done); 293 } 294 295 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm, 296 Register store_addr, 297 Register new_val, 298 Register thread, 299 Register tmp, 300 Register tmp2) { 301 #ifdef _LP64 302 assert(thread == r15_thread, "must be"); 303 #endif // _LP64 304 305 Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset())); 306 Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset())); 307 308 CardTableBarrierSet* ct = 309 barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set()); 310 311 Label done; 312 Label runtime; 313 314 // Does store cross heap regions? 315 316 __ movptr(tmp, store_addr); 317 __ xorptr(tmp, new_val); 318 __ shrptr(tmp, G1HeapRegion::LogOfHRGrainBytes); 319 __ jcc(Assembler::equal, done); 320 321 // crosses regions, storing null? 322 323 __ cmpptr(new_val, NULL_WORD); 324 __ jcc(Assembler::equal, done); 325 326 // storing region crossing non-null, is card already dirty? 327 328 const Register card_addr = tmp; 329 const Register cardtable = tmp2; 330 331 __ movptr(card_addr, store_addr); 332 __ shrptr(card_addr, CardTable::card_shift()); 333 // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT 334 // a valid address and therefore is not properly handled by the relocation code. 335 __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base()); 336 __ addptr(card_addr, cardtable); 337 338 __ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val()); 339 __ jcc(Assembler::equal, done); 340 341 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); 342 __ cmpb(Address(card_addr, 0), G1CardTable::dirty_card_val()); 343 __ jcc(Assembler::equal, done); 344 345 346 // storing a region crossing, non-null oop, card is clean. 347 // dirty card and log. 348 349 __ movb(Address(card_addr, 0), G1CardTable::dirty_card_val()); 350 351 // The code below assumes that buffer index is pointer sized. 352 STATIC_ASSERT(in_bytes(G1DirtyCardQueue::byte_width_of_index()) == sizeof(intptr_t)); 353 354 __ movptr(tmp2, queue_index); 355 __ testptr(tmp2, tmp2); 356 __ jcc(Assembler::zero, runtime); 357 __ subptr(tmp2, wordSize); 358 __ movptr(queue_index, tmp2); 359 __ addptr(tmp2, buffer); 360 __ movptr(Address(tmp2, 0), card_addr); 361 __ jmp(done); 362 363 __ bind(runtime); 364 // Barriers might be emitted when converting between (scalarized) calling conventions for inline 365 // types. Save all argument registers before calling into the runtime. 366 // TODO: use push_set() (see JDK-8283327 push/pop_call_clobbered_registers & aarch64) 367 __ pusha(); 368 __ subptr(rsp, 64); 369 __ movdbl(Address(rsp, 0), j_farg0); 370 __ movdbl(Address(rsp, 8), j_farg1); 371 __ movdbl(Address(rsp, 16), j_farg2); 372 __ movdbl(Address(rsp, 24), j_farg3); 373 __ movdbl(Address(rsp, 32), j_farg4); 374 __ movdbl(Address(rsp, 40), j_farg5); 375 __ movdbl(Address(rsp, 48), j_farg6); 376 __ movdbl(Address(rsp, 56), j_farg7); 377 378 #ifdef _LP64 379 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, r15_thread); 380 #else 381 __ push(thread); 382 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread); 383 __ pop(thread); 384 #endif 385 386 // Restore registers 387 __ movdbl(j_farg0, Address(rsp, 0)); 388 __ movdbl(j_farg1, Address(rsp, 8)); 389 __ movdbl(j_farg2, Address(rsp, 16)); 390 __ movdbl(j_farg3, Address(rsp, 24)); 391 __ movdbl(j_farg4, Address(rsp, 32)); 392 __ movdbl(j_farg5, Address(rsp, 40)); 393 __ movdbl(j_farg6, Address(rsp, 48)); 394 __ movdbl(j_farg7, Address(rsp, 56)); 395 __ addptr(rsp, 64); 396 __ popa(); 397 398 __ bind(done); 399 } 400 401 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, 402 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) { 403 bool in_heap = (decorators & IN_HEAP) != 0; 404 bool as_normal = (decorators & AS_NORMAL) != 0; 405 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; 406 407 bool needs_pre_barrier = as_normal && !dest_uninitialized; 408 bool needs_post_barrier = val != noreg && in_heap; 409 410 Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx); 411 // flatten object address if needed 412 // We do it regardless of precise because we need the registers 413 if (dst.index() == noreg && dst.disp() == 0) { 414 if (dst.base() != tmp1) { 415 __ movptr(tmp1, dst.base()); 416 } 417 } else { 418 __ lea(tmp1, dst); 419 } 420 421 #ifndef _LP64 422 InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm); 423 #endif 424 425 NOT_LP64(__ get_thread(rcx)); 426 NOT_LP64(imasm->save_bcp()); 427 428 if (needs_pre_barrier) { 429 g1_write_barrier_pre(masm /*masm*/, 430 tmp1 /* obj */, 431 tmp2 /* pre_val */, 432 rthread /* thread */, 433 tmp3 /* tmp */, 434 val != noreg /* tosca_live */, 435 false /* expand_call */); 436 } 437 if (val == noreg) { 438 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg); 439 } else { 440 Register new_val = val; 441 if (needs_post_barrier) { 442 // G1 barrier needs uncompressed oop for region cross check. 443 if (UseCompressedOops) { 444 new_val = tmp2; 445 __ movptr(new_val, val); 446 } 447 } 448 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg); 449 if (needs_post_barrier) { 450 g1_write_barrier_post(masm /*masm*/, 451 tmp1 /* store_adr */, 452 new_val /* new_val */, 453 rthread /* thread */, 454 tmp3 /* tmp */, 455 tmp2 /* tmp2 */); 456 } 457 } 458 NOT_LP64(imasm->restore_bcp()); 459 } 460 461 #ifdef COMPILER1 462 463 #undef __ 464 #define __ ce->masm()-> 465 466 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) { 467 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1(); 468 // At this point we know that marking is in progress. 469 // If do_load() is true then we have to emit the 470 // load of the previous value; otherwise it has already 471 // been loaded into _pre_val. 472 473 __ bind(*stub->entry()); 474 assert(stub->pre_val()->is_register(), "Precondition."); 475 476 Register pre_val_reg = stub->pre_val()->as_register(); 477 478 if (stub->do_load()) { 479 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/); 480 } 481 482 __ cmpptr(pre_val_reg, NULL_WORD); 483 __ jcc(Assembler::equal, *stub->continuation()); 484 ce->store_parameter(stub->pre_val()->as_register(), 0); 485 __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin())); 486 __ jmp(*stub->continuation()); 487 488 } 489 490 void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) { 491 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1(); 492 __ bind(*stub->entry()); 493 assert(stub->addr()->is_register(), "Precondition."); 494 assert(stub->new_val()->is_register(), "Precondition."); 495 Register new_val_reg = stub->new_val()->as_register(); 496 __ cmpptr(new_val_reg, NULL_WORD); 497 __ jcc(Assembler::equal, *stub->continuation()); 498 ce->store_parameter(stub->addr()->as_pointer_register(), 0); 499 __ call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin())); 500 __ jmp(*stub->continuation()); 501 } 502 503 #undef __ 504 505 #define __ sasm-> 506 507 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) { 508 // Generated code assumes that buffer index is pointer sized. 509 STATIC_ASSERT(in_bytes(SATBMarkQueue::byte_width_of_index()) == sizeof(intptr_t)); 510 511 __ prologue("g1_pre_barrier", false); 512 // arg0 : previous value of memory 513 514 __ push(rax); 515 __ push(rdx); 516 517 const Register pre_val = rax; 518 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); 519 const Register tmp = rdx; 520 521 NOT_LP64(__ get_thread(thread);) 522 523 Address queue_active(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset())); 524 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset())); 525 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset())); 526 527 Label done; 528 Label runtime; 529 530 // Is marking still active? 531 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 532 __ cmpl(queue_active, 0); 533 } else { 534 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 535 __ cmpb(queue_active, 0); 536 } 537 __ jcc(Assembler::equal, done); 538 539 // Can we store original value in the thread's buffer? 540 541 __ movptr(tmp, queue_index); 542 __ testptr(tmp, tmp); 543 __ jcc(Assembler::zero, runtime); 544 __ subptr(tmp, wordSize); 545 __ movptr(queue_index, tmp); 546 __ addptr(tmp, buffer); 547 548 // prev_val (rax) 549 __ load_parameter(0, pre_val); 550 __ movptr(Address(tmp, 0), pre_val); 551 __ jmp(done); 552 553 __ bind(runtime); 554 555 __ push_call_clobbered_registers(); 556 557 // load the pre-value 558 __ load_parameter(0, rcx); 559 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), rcx, thread); 560 561 __ pop_call_clobbered_registers(); 562 563 __ bind(done); 564 565 __ pop(rdx); 566 __ pop(rax); 567 568 __ epilogue(); 569 } 570 571 void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) { 572 __ prologue("g1_post_barrier", false); 573 574 CardTableBarrierSet* ct = 575 barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set()); 576 577 Label done; 578 Label enqueued; 579 Label runtime; 580 581 // At this point we know new_value is non-null and the new_value crosses regions. 582 // Must check to see if card is already dirty 583 584 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); 585 586 Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset())); 587 Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset())); 588 589 __ push(rax); 590 __ push(rcx); 591 592 const Register cardtable = rax; 593 const Register card_addr = rcx; 594 595 __ load_parameter(0, card_addr); 596 __ shrptr(card_addr, CardTable::card_shift()); 597 // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT 598 // a valid address and therefore is not properly handled by the relocation code. 599 __ movptr(cardtable, (intptr_t)ct->card_table()->byte_map_base()); 600 __ addptr(card_addr, cardtable); 601 602 NOT_LP64(__ get_thread(thread);) 603 604 __ cmpb(Address(card_addr, 0), G1CardTable::g1_young_card_val()); 605 __ jcc(Assembler::equal, done); 606 607 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); 608 __ cmpb(Address(card_addr, 0), CardTable::dirty_card_val()); 609 __ jcc(Assembler::equal, done); 610 611 // storing region crossing non-null, card is clean. 612 // dirty card and log. 613 614 __ movb(Address(card_addr, 0), CardTable::dirty_card_val()); 615 616 const Register tmp = rdx; 617 __ push(rdx); 618 619 __ movptr(tmp, queue_index); 620 __ testptr(tmp, tmp); 621 __ jcc(Assembler::zero, runtime); 622 __ subptr(tmp, wordSize); 623 __ movptr(queue_index, tmp); 624 __ addptr(tmp, buffer); 625 __ movptr(Address(tmp, 0), card_addr); 626 __ jmp(enqueued); 627 628 __ bind(runtime); 629 __ push_call_clobbered_registers(); 630 631 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread); 632 633 __ pop_call_clobbered_registers(); 634 635 __ bind(enqueued); 636 __ pop(rdx); 637 638 __ bind(done); 639 __ pop(rcx); 640 __ pop(rax); 641 642 __ epilogue(); 643 } 644 645 #undef __ 646 647 #endif // COMPILER1 --- EOF ---