1 /*
2 * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
396 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp, *stub->continuation());
397
398 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
399 __ jmp(*stub->continuation());
400 }
401
402 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
403 Register store_addr,
404 Register new_val,
405 Register tmp,
406 bool new_val_may_be_null) {
407 generate_post_barrier(masm, store_addr, new_val, tmp, new_val_may_be_null);
408 }
409
410 #endif // COMPILER2
411
412 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
413 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
414 bool in_heap = (decorators & IN_HEAP) != 0;
415 bool as_normal = (decorators & AS_NORMAL) != 0;
416
417 bool needs_pre_barrier = as_normal;
418 bool needs_post_barrier = val != noreg && in_heap;
419
420 // flatten object address if needed
421 // We do it regardless of precise because we need the registers
422 if (dst.index() == noreg && dst.disp() == 0) {
423 if (dst.base() != tmp1) {
424 __ movptr(tmp1, dst.base());
425 }
426 } else {
427 __ lea(tmp1, dst);
428 }
429
430 if (needs_pre_barrier) {
431 g1_write_barrier_pre(masm /*masm*/,
432 tmp1 /* obj */,
433 tmp2 /* pre_val */,
434 tmp3 /* tmp */,
435 val != noreg /* tosca_live */,
436 false /* expand_call */);
437 }
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1 /*
2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
396 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp, *stub->continuation());
397
398 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
399 __ jmp(*stub->continuation());
400 }
401
402 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
403 Register store_addr,
404 Register new_val,
405 Register tmp,
406 bool new_val_may_be_null) {
407 generate_post_barrier(masm, store_addr, new_val, tmp, new_val_may_be_null);
408 }
409
410 #endif // COMPILER2
411
412 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
413 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
414 bool in_heap = (decorators & IN_HEAP) != 0;
415 bool as_normal = (decorators & AS_NORMAL) != 0;
416 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
417
418 bool needs_pre_barrier = as_normal && !dest_uninitialized;
419 bool needs_post_barrier = val != noreg && in_heap;
420
421 // flatten object address if needed
422 // We do it regardless of precise because we need the registers
423 if (dst.index() == noreg && dst.disp() == 0) {
424 if (dst.base() != tmp1) {
425 __ movptr(tmp1, dst.base());
426 }
427 } else {
428 __ lea(tmp1, dst);
429 }
430
431 if (needs_pre_barrier) {
432 g1_write_barrier_pre(masm /*masm*/,
433 tmp1 /* obj */,
434 tmp2 /* pre_val */,
435 tmp3 /* tmp */,
436 val != noreg /* tosca_live */,
437 false /* expand_call */);
438 }
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