1 /*
  2  * Copyright (c) 2000, 2024, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
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 24 
 25 #ifndef CPU_X86_GLOBALS_X86_HPP
 26 #define CPU_X86_GLOBALS_X86_HPP
 27 
 28 #include "utilities/globalDefinitions.hpp"
 29 #include "utilities/macros.hpp"
 30 
 31 // Sets the default values for platform dependent flags used by the runtime system.
 32 // (see globals.hpp)
 33 
 34 define_pd_global(bool, ImplicitNullChecks,       true);  // Generate code for implicit null checks
 35 define_pd_global(bool, TrapBasedNullChecks,      false); // Not needed on x86.
 36 define_pd_global(bool, UncommonNullCast,         true);  // Uncommon-trap nulls passed to check cast
 37 
 38 define_pd_global(bool, DelayCompilerStubsGeneration, COMPILER2_OR_JVMCI);
 39 
 40 define_pd_global(uintx, CodeCacheSegmentSize,    64 COMPILER1_AND_COMPILER2_PRESENT(+64)); // Tiered compilation has large code-entry alignment.
 41 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't
 42 // assign a different value for C2 without touching a number of files. Use
 43 // #ifdef to minimize the change as it's late in Mantis. -- FIXME.
 44 // c1 doesn't have this problem because the fix to 4858033 assures us
 45 // the vep is aligned at CodeEntryAlignment whereas c2 only aligns
 46 // the uep and the vep doesn't get real alignment but just slops on by
 47 // only assured that the entry instruction meets the 5 byte size requirement.
 48 #if COMPILER2_OR_JVMCI
 49 define_pd_global(intx, CodeEntryAlignment,       32);
 50 #else
 51 define_pd_global(intx, CodeEntryAlignment,       16);
 52 #endif // COMPILER2_OR_JVMCI
 53 define_pd_global(intx, OptoLoopAlignment,        16);
 54 define_pd_global(intx, InlineSmallCode,          1000);
 55 
 56 #define DEFAULT_STACK_YELLOW_PAGES (NOT_WINDOWS(2) WINDOWS_ONLY(3))
 57 #define DEFAULT_STACK_RED_PAGES (1)
 58 #define DEFAULT_STACK_RESERVED_PAGES (NOT_WINDOWS(1) WINDOWS_ONLY(0))
 59 
 60 #define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES
 61 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
 62 #define MIN_STACK_RESERVED_PAGES (0)
 63 
 64 // Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the
 65 // stack if compiled for unix. To pass stack overflow tests we need 20 shadow pages.
 66 #define DEFAULT_STACK_SHADOW_PAGES (NOT_WIN64(20) WIN64_ONLY(8) DEBUG_ONLY(+4))
 67 // For those clients that do not use write socket, we allow
 68 // the min range value to be below that of the default
 69 #define MIN_STACK_SHADOW_PAGES (NOT_WIN64(10) WIN64_ONLY(8) DEBUG_ONLY(+4))
 70 
 71 define_pd_global(intx, StackYellowPages, DEFAULT_STACK_YELLOW_PAGES);
 72 define_pd_global(intx, StackRedPages, DEFAULT_STACK_RED_PAGES);
 73 define_pd_global(intx, StackShadowPages, DEFAULT_STACK_SHADOW_PAGES);
 74 define_pd_global(intx, StackReservedPages, DEFAULT_STACK_RESERVED_PAGES);
 75 
 76 define_pd_global(bool, VMContinuations, true);
 77 
 78 define_pd_global(bool, RewriteBytecodes,     true);
 79 define_pd_global(bool, RewriteFrequentPairs, true);
 80 
 81 define_pd_global(uintx, TypeProfileLevel, 111);
 82 
 83 define_pd_global(bool, CompactStrings, true);
 84 
 85 define_pd_global(bool, PreserveFramePointer, false);
 86 
 87 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
 88 
 89 define_pd_global(bool, InlineTypePassFieldsAsArgs, LP64_ONLY(true) NOT_LP64(false));
 90 define_pd_global(bool, InlineTypeReturnedAsFields, LP64_ONLY(true) NOT_LP64(false));
 91 
 92 #define ARCH_FLAGS(develop,                                                 \
 93                    product,                                                 \
 94                    range,                                                   \
 95                    constraint)                                              \
 96                                                                             \
 97   develop(bool, IEEEPrecision, true,                                        \
 98           "Enables IEEE precision (for INTEL only)")                        \
 99                                                                             \
100   product(bool, UseStoreImmI16, true,                                       \
101           "Use store immediate 16-bits value instruction on x86")           \
102                                                                             \
103   product(int, UseSSE, 4,                                                   \
104           "Highest supported SSE instructions set on x86/x64")              \
105           range(0, 4)                                                       \
106                                                                             \
107   product(int, UseAVX, 3,                                                   \
108           "Highest supported AVX instructions set on x86/x64")              \
109           range(0, 3)                                                       \
110                                                                             \
111   product(bool, UseAPX, false, EXPERIMENTAL,                                \
112           "Use Intel Advanced Performance Extensions")                      \
113                                                                             \
114   product(bool, UseKNLSetting, false, DIAGNOSTIC,                           \
115           "Control whether Knights platform setting should be used")        \
116                                                                             \
117   product(bool, UseCLMUL, false,                                            \
118           "Control whether CLMUL instructions can be used on x86/x64")      \
119                                                                             \
120   product(bool, UseIncDec, true, DIAGNOSTIC,                                \
121           "Use INC, DEC instructions on x86")                               \
122                                                                             \
123   product(bool, UseNewLongLShift, false,                                    \
124           "Use optimized bitwise shift left")                               \
125                                                                             \
126   product(bool, UseAddressNop, false,                                       \
127           "Use '0F 1F [addr]' NOP instructions on x86 cpus")                \
128                                                                             \
129   product(bool, UseXmmLoadAndClearUpper, true,                              \
130           "Load low part of XMM register and clear upper part")             \
131                                                                             \
132   product(bool, UseXmmRegToRegMoveAll, false,                               \
133           "Copy all XMM register bits when moving value between registers") \
134                                                                             \
135   product(bool, UseXmmI2D, false,                                           \
136           "Use SSE2 CVTDQ2PD instruction to convert Integer to Double")     \
137                                                                             \
138   product(bool, UseXmmI2F, false,                                           \
139           "Use SSE2 CVTDQ2PS instruction to convert Integer to Float")      \
140                                                                             \
141   product(bool, UseUnalignedLoadStores, false,                              \
142           "Use SSE2 MOVDQU instruction for Arraycopy")                      \
143                                                                             \
144   product(bool, UseXMMForObjInit, false,                                    \
145           "Use XMM/YMM MOVDQU instruction for Object Initialization")       \
146                                                                             \
147   product(bool, UseFastStosb, false,                                        \
148           "Use fast-string operation for zeroing: rep stosb")               \
149                                                                             \
150   /* assembler */                                                           \
151   product(bool, UseCountLeadingZerosInstruction, false,                     \
152           "Use count leading zeros instruction")                            \
153                                                                             \
154   product(bool, UseCountTrailingZerosInstruction, false,                    \
155           "Use count trailing zeros instruction")                           \
156                                                                             \
157   product(bool, UseSSE42Intrinsics, false,                                  \
158           "SSE4.2 versions of intrinsics")                                  \
159                                                                             \
160   product(bool, UseBMI1Instructions, false,                                 \
161           "Use BMI1 instructions")                                          \
162                                                                             \
163   product(bool, UseBMI2Instructions, false,                                 \
164           "Use BMI2 instructions")                                          \
165                                                                             \
166   product(bool, UseLibmIntrinsic, true, DIAGNOSTIC,                         \
167           "Use Libm Intrinsics")                                            \
168                                                                             \
169   /* Autodetected, see vm_version_x86.cpp */                                \
170   product(bool, EnableX86ECoreOpts, false, DIAGNOSTIC,                      \
171           "Perform Ecore Optimization")                                     \
172                                                                             \
173   /* Minimum array size in bytes to use AVX512 intrinsics */                \
174   /* for copy, inflate and fill which don't bail out early based on any */  \
175   /* condition. When this value is set to zero compare operations like */   \
176   /* compare, vectorizedMismatch, compress can also use AVX512 intrinsics.*/\
177   product(int, AVX3Threshold, 4096, DIAGNOSTIC,                             \
178              "Minimum array size in bytes to use AVX512 intrinsics"         \
179              "for copy, inflate and fill. When this value is set as zero"   \
180              "compare operations can also use AVX512 intrinsics.")          \
181              range(0, max_jint)                                             \
182              constraint(AVX3ThresholdConstraintFunc,AfterErgo)              \
183                                                                             \
184   product(bool, IntelJccErratumMitigation, true, DIAGNOSTIC,                \
185              "Turn off JVM mitigations related to Intel micro code "        \
186              "mitigations for the Intel JCC erratum")                       \
187                                                                             \
188   product(int, X86ICacheSync, -1, DIAGNOSTIC,                               \
189              "Select the X86 ICache sync mechanism: -1 = auto-select; "     \
190              "0 = none (dangerous); 1 = CLFLUSH loop; 2 = CLFLUSHOPT loop; "\
191              "3 = CLWB loop; 4 = single CPUID; 5 = single SERIALIZE. "      \
192              "Explicitly selected mechanism will fail at startup if "       \
193              "hardware does not support it.")                               \
194              range(-1, 5)                                                   \
195                                                                             \
196 // end of ARCH_FLAGS
197 
198 #endif // CPU_X86_GLOBALS_X86_HPP