1 /*
2 * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/nativeInst.hpp"
31 #include "code/vtableStubs.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/gcLocker.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "logging/log.hpp"
38 #include "memory/resourceArea.hpp"
39 #include "oops/compiledICHolder.hpp"
40 #include "oops/klass.inline.hpp"
41 #include "prims/methodHandles.hpp"
42 #include "runtime/jniHandles.hpp"
43 #include "runtime/safepointMechanism.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/signature.hpp"
46 #include "runtime/stubRoutines.hpp"
47 #include "runtime/vframeArray.hpp"
48 #include "runtime/vm_version.hpp"
49 #include "utilities/align.hpp"
50 #include "vmreg_x86.inline.hpp"
51 #ifdef COMPILER1
52 #include "c1/c1_Runtime1.hpp"
53 #endif
54 #ifdef COMPILER2
55 #include "opto/runtime.hpp"
56 #endif
57
58 #define __ masm->
59
60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
61
62 class RegisterSaver {
63 // Capture info about frame layout
64 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
65 enum layout {
66 fpu_state_off = 0,
67 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
68 st0_off, st0H_off,
69 st1_off, st1H_off,
70 st2_off, st2H_off,
71 st3_off, st3H_off,
72 st4_off, st4H_off,
73 st5_off, st5H_off,
74 st6_off, st6H_off,
75 st7_off, st7H_off,
76 xmm_off,
77 DEF_XMM_OFFS(0),
78 DEF_XMM_OFFS(1),
79 DEF_XMM_OFFS(2),
80 DEF_XMM_OFFS(3),
81 DEF_XMM_OFFS(4),
82 DEF_XMM_OFFS(5),
83 DEF_XMM_OFFS(6),
84 DEF_XMM_OFFS(7),
85 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
86 rdi_off,
87 rsi_off,
88 ignore_off, // extra copy of rbp,
89 rsp_off,
90 rbx_off,
91 rdx_off,
92 rcx_off,
93 rax_off,
94 // The frame sender code expects that rbp will be in the "natural" place and
95 // will override any oopMap setting for it. We must therefore force the layout
96 // so that it agrees with the frame sender code.
97 rbp_off,
98 return_off, // slot for return address
99 reg_save_size };
100 enum { FPU_regs_live = flags_off - fpu_state_end };
101
102 public:
103
104 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
105 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
106 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
107
108 static int rax_offset() { return rax_off; }
109 static int rbx_offset() { return rbx_off; }
110
111 // Offsets into the register save area
112 // Used by deoptimization when it is managing result register
113 // values on its own
114
115 static int raxOffset(void) { return rax_off; }
116 static int rdxOffset(void) { return rdx_off; }
117 static int rbxOffset(void) { return rbx_off; }
118 static int xmm0Offset(void) { return xmm0_off; }
119 // This really returns a slot in the fp save area, which one is not important
120 static int fpResultOffset(void) { return st0_off; }
121
122 // During deoptimization only the result register need to be restored
123 // all the other values have already been extracted.
124
125 static void restore_result_registers(MacroAssembler* masm);
126
127 };
128
129 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
130 int* total_frame_words, bool verify_fpu, bool save_vectors) {
131 int num_xmm_regs = XMMRegister::number_of_registers;
132 int ymm_bytes = num_xmm_regs * 16;
133 int zmm_bytes = num_xmm_regs * 32;
134 #ifdef COMPILER2
135 int opmask_state_bytes = KRegister::number_of_registers * 8;
136 if (save_vectors) {
137 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
138 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
139 // Save upper half of YMM registers
140 int vect_bytes = ymm_bytes;
141 if (UseAVX > 2) {
142 // Save upper half of ZMM registers as well
143 vect_bytes += zmm_bytes;
144 additional_frame_words += opmask_state_bytes / wordSize;
145 }
146 additional_frame_words += vect_bytes / wordSize;
147 }
148 #else
149 assert(!save_vectors, "vectors are generated only by C2");
150 #endif
151 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
152 int frame_words = frame_size_in_bytes / wordSize;
153 *total_frame_words = frame_words;
154
155 assert(FPUStateSizeInWords == 27, "update stack layout");
156
157 // save registers, fpu state, and flags
158 // We assume caller has already has return address slot on the stack
159 // We push epb twice in this sequence because we want the real rbp,
160 // to be under the return like a normal enter and we want to use pusha
161 // We push by hand instead of using push.
162 __ enter();
163 __ pusha();
164 __ pushf();
165 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
166 __ push_FPU_state(); // Save FPU state & init
167
168 if (verify_fpu) {
169 // Some stubs may have non standard FPU control word settings so
170 // only check and reset the value when it required to be the
171 // standard value. The safepoint blob in particular can be used
172 // in methods which are using the 24 bit control word for
173 // optimized float math.
174
175 #ifdef ASSERT
176 // Make sure the control word has the expected value
177 Label ok;
178 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
179 __ jccb(Assembler::equal, ok);
180 __ stop("corrupted control word detected");
181 __ bind(ok);
182 #endif
183
184 // Reset the control word to guard against exceptions being unmasked
185 // since fstp_d can cause FPU stack underflow exceptions. Write it
186 // into the on stack copy and then reload that to make sure that the
187 // current and future values are correct.
188 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
189 }
190
191 __ frstor(Address(rsp, 0));
192 if (!verify_fpu) {
193 // Set the control word so that exceptions are masked for the
194 // following code.
195 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
196 }
197
198 int off = st0_off;
199 int delta = st1_off - off;
200
201 // Save the FPU registers in de-opt-able form
202 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
203 __ fstp_d(Address(rsp, off*wordSize));
204 off += delta;
205 }
206
207 off = xmm0_off;
208 delta = xmm1_off - off;
209 if(UseSSE == 1) {
210 // Save the XMM state
211 for (int n = 0; n < num_xmm_regs; n++) {
212 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
213 off += delta;
214 }
215 } else if(UseSSE >= 2) {
216 // Save whole 128bit (16 bytes) XMM registers
217 for (int n = 0; n < num_xmm_regs; n++) {
218 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
219 off += delta;
220 }
221 }
222
223 #ifdef COMPILER2
224 if (save_vectors) {
225 __ subptr(rsp, ymm_bytes);
226 // Save upper half of YMM registers
227 for (int n = 0; n < num_xmm_regs; n++) {
228 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
229 }
230 if (UseAVX > 2) {
231 __ subptr(rsp, zmm_bytes);
232 // Save upper half of ZMM registers
233 for (int n = 0; n < num_xmm_regs; n++) {
234 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
235 }
236 __ subptr(rsp, opmask_state_bytes);
237 // Save opmask registers
238 for (int n = 0; n < KRegister::number_of_registers; n++) {
239 __ kmov(Address(rsp, n*8), as_KRegister(n));
240 }
241 }
242 }
243 #else
244 assert(!save_vectors, "vectors are generated only by C2");
245 #endif
246
247 __ vzeroupper();
248
249 // Set an oopmap for the call site. This oopmap will map all
250 // oop-registers and debug-info registers as callee-saved. This
251 // will allow deoptimization at this safepoint to find all possible
252 // debug-info recordings, as well as let GC find all oops.
253
254 OopMapSet *oop_maps = new OopMapSet();
255 OopMap* map = new OopMap( frame_words, 0 );
256
257 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
258 #define NEXTREG(x) (x)->as_VMReg()->next()
259
260 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
261 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
262 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
263 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
264 // rbp, location is known implicitly, no oopMap
265 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
266 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
267
268 // %%% This is really a waste but we'll keep things as they were for now for the upper component
269 off = st0_off;
270 delta = st1_off - off;
271 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
272 FloatRegister freg_name = as_FloatRegister(n);
273 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
274 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
275 off += delta;
276 }
277 off = xmm0_off;
278 delta = xmm1_off - off;
279 for (int n = 0; n < num_xmm_regs; n++) {
280 XMMRegister xmm_name = as_XMMRegister(n);
281 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
282 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
283 off += delta;
284 }
285 #undef NEXTREG
286 #undef STACK_OFFSET
287
288 return map;
289 }
290
291 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
292 int opmask_state_bytes = 0;
293 int additional_frame_bytes = 0;
294 int num_xmm_regs = XMMRegister::number_of_registers;
295 int ymm_bytes = num_xmm_regs * 16;
296 int zmm_bytes = num_xmm_regs * 32;
297 // Recover XMM & FPU state
298 #ifdef COMPILER2
299 if (restore_vectors) {
300 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
301 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
302 // Save upper half of YMM registers
303 additional_frame_bytes = ymm_bytes;
304 if (UseAVX > 2) {
305 // Save upper half of ZMM registers as well
306 additional_frame_bytes += zmm_bytes;
307 opmask_state_bytes = KRegister::number_of_registers * 8;
308 additional_frame_bytes += opmask_state_bytes;
309 }
310 }
311 #else
312 assert(!restore_vectors, "vectors are generated only by C2");
313 #endif
314
315 int off = xmm0_off;
316 int delta = xmm1_off - off;
317
318 __ vzeroupper();
319
320 if (UseSSE == 1) {
321 // Restore XMM registers
322 assert(additional_frame_bytes == 0, "");
323 for (int n = 0; n < num_xmm_regs; n++) {
324 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
325 off += delta;
326 }
327 } else if (UseSSE >= 2) {
328 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
329 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
330 for (int n = 0; n < num_xmm_regs; n++) {
331 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
332 off += delta;
333 }
334 }
335
336 if (restore_vectors) {
337 off = additional_frame_bytes - ymm_bytes;
338 // Restore upper half of YMM registers.
339 for (int n = 0; n < num_xmm_regs; n++) {
340 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
341 }
342 if (UseAVX > 2) {
343 // Restore upper half of ZMM registers.
344 off = opmask_state_bytes;
345 for (int n = 0; n < num_xmm_regs; n++) {
346 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
347 }
348 for (int n = 0; n < KRegister::number_of_registers; n++) {
349 __ kmov(as_KRegister(n), Address(rsp, n*8));
350 }
351 }
352 __ addptr(rsp, additional_frame_bytes);
353 }
354
355 __ pop_FPU_state();
356 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
357
358 __ popf();
359 __ popa();
360 // Get the rbp, described implicitly by the frame sender code (no oopMap)
361 __ pop(rbp);
362 }
363
364 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
365
366 // Just restore result register. Only used by deoptimization. By
367 // now any callee save register that needs to be restore to a c2
368 // caller of the deoptee has been extracted into the vframeArray
369 // and will be stuffed into the c2i adapter we create for later
370 // restoration so only result registers need to be restored here.
371 //
372
373 __ frstor(Address(rsp, 0)); // Restore fpu state
374
375 // Recover XMM & FPU state
376 if( UseSSE == 1 ) {
377 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
378 } else if( UseSSE >= 2 ) {
379 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
380 }
381 __ movptr(rax, Address(rsp, rax_off*wordSize));
382 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
383 // Pop all of the register save are off the stack except the return address
384 __ addptr(rsp, return_off * wordSize);
385 }
386
387 // Is vector's size (in bytes) bigger than a size saved by default?
388 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
389 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
390 bool SharedRuntime::is_wide_vector(int size) {
391 return size > 16;
392 }
393
394 // The java_calling_convention describes stack locations as ideal slots on
395 // a frame with no abi restrictions. Since we must observe abi restrictions
396 // (like the placement of the register window) the slots must be biased by
397 // the following value.
398 static int reg2offset_in(VMReg r) {
399 // Account for saved rbp, and return address
400 // This should really be in_preserve_stack_slots
401 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
402 }
403
404 static int reg2offset_out(VMReg r) {
405 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
406 }
407
408 // ---------------------------------------------------------------------------
409 // Read the array of BasicTypes from a signature, and compute where the
410 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
411 // quantities. Values less than SharedInfo::stack0 are registers, those above
412 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
413 // as framesizes are fixed.
414 // VMRegImpl::stack0 refers to the first slot 0(sp).
415 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
416 // Register up to Register::number_of_registers are the 32-bit
417 // integer registers.
418
419 // Pass first two oop/int args in registers ECX and EDX.
420 // Pass first two float/double args in registers XMM0 and XMM1.
421 // Doubles have precedence, so if you pass a mix of floats and doubles
422 // the doubles will grab the registers before the floats will.
423
424 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
425 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
426 // units regardless of build. Of course for i486 there is no 64 bit build
427
428
429 // ---------------------------------------------------------------------------
430 // The compiled Java calling convention.
431 // Pass first two oop/int args in registers ECX and EDX.
432 // Pass first two float/double args in registers XMM0 and XMM1.
433 // Doubles have precedence, so if you pass a mix of floats and doubles
434 // the doubles will grab the registers before the floats will.
435 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
436 VMRegPair *regs,
437 int total_args_passed) {
438 uint stack = 0; // Starting stack position for args on stack
439
440
441 // Pass first two oop/int args in registers ECX and EDX.
442 uint reg_arg0 = 9999;
443 uint reg_arg1 = 9999;
444
445 // Pass first two float/double args in registers XMM0 and XMM1.
446 // Doubles have precedence, so if you pass a mix of floats and doubles
447 // the doubles will grab the registers before the floats will.
448 // CNC - TURNED OFF FOR non-SSE.
449 // On Intel we have to round all doubles (and most floats) at
450 // call sites by storing to the stack in any case.
451 // UseSSE=0 ==> Don't Use ==> 9999+0
452 // UseSSE=1 ==> Floats only ==> 9999+1
453 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
454 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
455 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
456 uint freg_arg0 = 9999+fargs;
457 uint freg_arg1 = 9999+fargs;
458
459 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
460 int i;
461 for( i = 0; i < total_args_passed; i++) {
462 if( sig_bt[i] == T_DOUBLE ) {
463 // first 2 doubles go in registers
464 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
465 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
466 else // Else double is passed low on the stack to be aligned.
467 stack += 2;
468 } else if( sig_bt[i] == T_LONG ) {
469 stack += 2;
470 }
471 }
472 int dstack = 0; // Separate counter for placing doubles
473
474 // Now pick where all else goes.
475 for( i = 0; i < total_args_passed; i++) {
476 // From the type and the argument number (count) compute the location
477 switch( sig_bt[i] ) {
478 case T_SHORT:
479 case T_CHAR:
480 case T_BYTE:
481 case T_BOOLEAN:
482 case T_INT:
483 case T_ARRAY:
484 case T_OBJECT:
485 case T_ADDRESS:
486 if( reg_arg0 == 9999 ) {
487 reg_arg0 = i;
488 regs[i].set1(rcx->as_VMReg());
489 } else if( reg_arg1 == 9999 ) {
490 reg_arg1 = i;
491 regs[i].set1(rdx->as_VMReg());
492 } else {
493 regs[i].set1(VMRegImpl::stack2reg(stack++));
494 }
495 break;
496 case T_FLOAT:
497 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
498 freg_arg0 = i;
499 regs[i].set1(xmm0->as_VMReg());
500 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
501 freg_arg1 = i;
502 regs[i].set1(xmm1->as_VMReg());
503 } else {
504 regs[i].set1(VMRegImpl::stack2reg(stack++));
505 }
506 break;
507 case T_LONG:
508 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
509 regs[i].set2(VMRegImpl::stack2reg(dstack));
510 dstack += 2;
511 break;
512 case T_DOUBLE:
513 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
514 if( freg_arg0 == (uint)i ) {
515 regs[i].set2(xmm0->as_VMReg());
516 } else if( freg_arg1 == (uint)i ) {
517 regs[i].set2(xmm1->as_VMReg());
518 } else {
519 regs[i].set2(VMRegImpl::stack2reg(dstack));
520 dstack += 2;
521 }
522 break;
523 case T_VOID: regs[i].set_bad(); break;
524 break;
525 default:
526 ShouldNotReachHere();
527 break;
528 }
529 }
530
531 // return value can be odd number of VMRegImpl stack slots make multiple of 2
532 return align_up(stack, 2);
533 }
534
535 // Patch the callers callsite with entry to compiled code if it exists.
536 static void patch_callers_callsite(MacroAssembler *masm) {
537 Label L;
538 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
539 __ jcc(Assembler::equal, L);
540 // Schedule the branch target address early.
541 // Call into the VM to patch the caller, then jump to compiled callee
542 // rax, isn't live so capture return address while we easily can
543 __ movptr(rax, Address(rsp, 0));
544 __ pusha();
545 __ pushf();
546
547 if (UseSSE == 1) {
548 __ subptr(rsp, 2*wordSize);
549 __ movflt(Address(rsp, 0), xmm0);
550 __ movflt(Address(rsp, wordSize), xmm1);
551 }
552 if (UseSSE >= 2) {
553 __ subptr(rsp, 4*wordSize);
554 __ movdbl(Address(rsp, 0), xmm0);
555 __ movdbl(Address(rsp, 2*wordSize), xmm1);
556 }
557 #ifdef COMPILER2
558 // C2 may leave the stack dirty if not in SSE2+ mode
559 if (UseSSE >= 2) {
560 __ verify_FPU(0, "c2i transition should have clean FPU stack");
561 } else {
562 __ empty_FPU_stack();
563 }
564 #endif /* COMPILER2 */
565
566 // VM needs caller's callsite
567 __ push(rax);
568 // VM needs target method
569 __ push(rbx);
570 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
571 __ addptr(rsp, 2*wordSize);
572
573 if (UseSSE == 1) {
574 __ movflt(xmm0, Address(rsp, 0));
575 __ movflt(xmm1, Address(rsp, wordSize));
576 __ addptr(rsp, 2*wordSize);
577 }
578 if (UseSSE >= 2) {
579 __ movdbl(xmm0, Address(rsp, 0));
580 __ movdbl(xmm1, Address(rsp, 2*wordSize));
581 __ addptr(rsp, 4*wordSize);
582 }
583
584 __ popf();
585 __ popa();
586 __ bind(L);
587 }
588
589
590 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
591 int next_off = st_off - Interpreter::stackElementSize;
592 __ movdbl(Address(rsp, next_off), r);
593 }
594
595 static void gen_c2i_adapter(MacroAssembler *masm,
596 int total_args_passed,
597 int comp_args_on_stack,
598 const BasicType *sig_bt,
599 const VMRegPair *regs,
600 Label& skip_fixup) {
601 // Before we get into the guts of the C2I adapter, see if we should be here
602 // at all. We've come from compiled code and are attempting to jump to the
603 // interpreter, which means the caller made a static call to get here
604 // (vcalls always get a compiled target if there is one). Check for a
605 // compiled target. If there is one, we need to patch the caller's call.
606 patch_callers_callsite(masm);
607
608 __ bind(skip_fixup);
609
610 #ifdef COMPILER2
611 // C2 may leave the stack dirty if not in SSE2+ mode
612 if (UseSSE >= 2) {
613 __ verify_FPU(0, "c2i transition should have clean FPU stack");
614 } else {
615 __ empty_FPU_stack();
616 }
617 #endif /* COMPILER2 */
618
619 // Since all args are passed on the stack, total_args_passed * interpreter_
620 // stack_element_size is the
621 // space we need.
622 int extraspace = total_args_passed * Interpreter::stackElementSize;
623
624 // Get return address
625 __ pop(rax);
626
627 // set senderSP value
628 __ movptr(rsi, rsp);
629
630 __ subptr(rsp, extraspace);
631
632 // Now write the args into the outgoing interpreter space
633 for (int i = 0; i < total_args_passed; i++) {
634 if (sig_bt[i] == T_VOID) {
635 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
636 continue;
637 }
638
639 // st_off points to lowest address on stack.
640 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
641 int next_off = st_off - Interpreter::stackElementSize;
642
643 // Say 4 args:
644 // i st_off
645 // 0 12 T_LONG
646 // 1 8 T_VOID
647 // 2 4 T_OBJECT
648 // 3 0 T_BOOL
649 VMReg r_1 = regs[i].first();
650 VMReg r_2 = regs[i].second();
651 if (!r_1->is_valid()) {
652 assert(!r_2->is_valid(), "");
653 continue;
654 }
655
656 if (r_1->is_stack()) {
657 // memory to memory use fpu stack top
658 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
659
660 if (!r_2->is_valid()) {
661 __ movl(rdi, Address(rsp, ld_off));
662 __ movptr(Address(rsp, st_off), rdi);
663 } else {
664
665 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
666 // st_off == MSW, st_off-wordSize == LSW
667
668 __ movptr(rdi, Address(rsp, ld_off));
669 __ movptr(Address(rsp, next_off), rdi);
670 __ movptr(rdi, Address(rsp, ld_off + wordSize));
671 __ movptr(Address(rsp, st_off), rdi);
672 }
673 } else if (r_1->is_Register()) {
674 Register r = r_1->as_Register();
675 if (!r_2->is_valid()) {
676 __ movl(Address(rsp, st_off), r);
677 } else {
678 // long/double in gpr
679 ShouldNotReachHere();
680 }
681 } else {
682 assert(r_1->is_XMMRegister(), "");
683 if (!r_2->is_valid()) {
684 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
685 } else {
686 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
687 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
688 }
689 }
690 }
691
692 // Schedule the branch target address early.
693 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
694 // And repush original return address
695 __ push(rax);
696 __ jmp(rcx);
697 }
698
699
700 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
701 int next_val_off = ld_off - Interpreter::stackElementSize;
702 __ movdbl(r, Address(saved_sp, next_val_off));
703 }
704
705 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
706 address code_start, address code_end,
707 Label& L_ok) {
708 Label L_fail;
709 __ lea(temp_reg, ExternalAddress(code_start));
710 __ cmpptr(pc_reg, temp_reg);
711 __ jcc(Assembler::belowEqual, L_fail);
712 __ lea(temp_reg, ExternalAddress(code_end));
713 __ cmpptr(pc_reg, temp_reg);
714 __ jcc(Assembler::below, L_ok);
715 __ bind(L_fail);
716 }
717
718 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
719 int total_args_passed,
720 int comp_args_on_stack,
721 const BasicType *sig_bt,
722 const VMRegPair *regs) {
723 // Note: rsi contains the senderSP on entry. We must preserve it since
724 // we may do a i2c -> c2i transition if we lose a race where compiled
725 // code goes non-entrant while we get args ready.
726
727 // Adapters can be frameless because they do not require the caller
728 // to perform additional cleanup work, such as correcting the stack pointer.
729 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
730 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
731 // even if a callee has modified the stack pointer.
732 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
733 // routinely repairs its caller's stack pointer (from sender_sp, which is set
734 // up via the senderSP register).
735 // In other words, if *either* the caller or callee is interpreted, we can
736 // get the stack pointer repaired after a call.
737 // This is why c2i and i2c adapters cannot be indefinitely composed.
738 // In particular, if a c2i adapter were to somehow call an i2c adapter,
739 // both caller and callee would be compiled methods, and neither would
740 // clean up the stack pointer changes performed by the two adapters.
741 // If this happens, control eventually transfers back to the compiled
742 // caller, but with an uncorrected stack, causing delayed havoc.
743
744 // Pick up the return address
745 __ movptr(rax, Address(rsp, 0));
746
747 if (VerifyAdapterCalls &&
748 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) {
749 // So, let's test for cascading c2i/i2c adapters right now.
750 // assert(Interpreter::contains($return_addr) ||
751 // StubRoutines::contains($return_addr),
752 // "i2c adapter must return to an interpreter frame");
753 __ block_comment("verify_i2c { ");
754 Label L_ok;
755 if (Interpreter::code() != nullptr) {
756 range_check(masm, rax, rdi,
757 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
758 L_ok);
759 }
760 if (StubRoutines::initial_stubs_code() != nullptr) {
761 range_check(masm, rax, rdi,
762 StubRoutines::initial_stubs_code()->code_begin(),
763 StubRoutines::initial_stubs_code()->code_end(),
764 L_ok);
765 }
766 if (StubRoutines::final_stubs_code() != nullptr) {
767 range_check(masm, rax, rdi,
768 StubRoutines::final_stubs_code()->code_begin(),
769 StubRoutines::final_stubs_code()->code_end(),
770 L_ok);
771 }
772 const char* msg = "i2c adapter must return to an interpreter frame";
773 __ block_comment(msg);
774 __ stop(msg);
775 __ bind(L_ok);
776 __ block_comment("} verify_i2ce ");
777 }
778
779 // Must preserve original SP for loading incoming arguments because
780 // we need to align the outgoing SP for compiled code.
781 __ movptr(rdi, rsp);
782
783 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
784 // in registers, we will occasionally have no stack args.
785 int comp_words_on_stack = 0;
786 if (comp_args_on_stack) {
787 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
788 // registers are below. By subtracting stack0, we either get a negative
789 // number (all values in registers) or the maximum stack slot accessed.
790 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
791 // Convert 4-byte stack slots to words.
792 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
793 // Round up to miminum stack alignment, in wordSize
794 comp_words_on_stack = align_up(comp_words_on_stack, 2);
795 __ subptr(rsp, comp_words_on_stack * wordSize);
796 }
797
798 // Align the outgoing SP
799 __ andptr(rsp, -(StackAlignmentInBytes));
800
801 // push the return address on the stack (note that pushing, rather
802 // than storing it, yields the correct frame alignment for the callee)
803 __ push(rax);
804
805 // Put saved SP in another register
806 const Register saved_sp = rax;
807 __ movptr(saved_sp, rdi);
808
809
810 // Will jump to the compiled code just as if compiled code was doing it.
811 // Pre-load the register-jump target early, to schedule it better.
812 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
813
814 // Now generate the shuffle code. Pick up all register args and move the
815 // rest through the floating point stack top.
816 for (int i = 0; i < total_args_passed; i++) {
817 if (sig_bt[i] == T_VOID) {
818 // Longs and doubles are passed in native word order, but misaligned
819 // in the 32-bit build.
820 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
821 continue;
822 }
823
824 // Pick up 0, 1 or 2 words from SP+offset.
825
826 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
827 "scrambled load targets?");
828 // Load in argument order going down.
829 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
830 // Point to interpreter value (vs. tag)
831 int next_off = ld_off - Interpreter::stackElementSize;
832 //
833 //
834 //
835 VMReg r_1 = regs[i].first();
836 VMReg r_2 = regs[i].second();
837 if (!r_1->is_valid()) {
838 assert(!r_2->is_valid(), "");
839 continue;
840 }
841 if (r_1->is_stack()) {
842 // Convert stack slot to an SP offset (+ wordSize to account for return address )
843 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
844
845 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
846 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
847 // we be generated.
848 if (!r_2->is_valid()) {
849 // __ fld_s(Address(saved_sp, ld_off));
850 // __ fstp_s(Address(rsp, st_off));
851 __ movl(rsi, Address(saved_sp, ld_off));
852 __ movptr(Address(rsp, st_off), rsi);
853 } else {
854 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
855 // are accessed as negative so LSW is at LOW address
856
857 // ld_off is MSW so get LSW
858 // st_off is LSW (i.e. reg.first())
859 // __ fld_d(Address(saved_sp, next_off));
860 // __ fstp_d(Address(rsp, st_off));
861 //
862 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
863 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
864 // So we must adjust where to pick up the data to match the interpreter.
865 //
866 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
867 // are accessed as negative so LSW is at LOW address
868
869 // ld_off is MSW so get LSW
870 __ movptr(rsi, Address(saved_sp, next_off));
871 __ movptr(Address(rsp, st_off), rsi);
872 __ movptr(rsi, Address(saved_sp, ld_off));
873 __ movptr(Address(rsp, st_off + wordSize), rsi);
874 }
875 } else if (r_1->is_Register()) { // Register argument
876 Register r = r_1->as_Register();
877 assert(r != rax, "must be different");
878 if (r_2->is_valid()) {
879 //
880 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
881 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
882 // So we must adjust where to pick up the data to match the interpreter.
883
884 // this can be a misaligned move
885 __ movptr(r, Address(saved_sp, next_off));
886 assert(r_2->as_Register() != rax, "need another temporary register");
887 // Remember r_1 is low address (and LSB on x86)
888 // So r_2 gets loaded from high address regardless of the platform
889 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
890 } else {
891 __ movl(r, Address(saved_sp, ld_off));
892 }
893 } else {
894 assert(r_1->is_XMMRegister(), "");
895 if (!r_2->is_valid()) {
896 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
897 } else {
898 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
899 }
900 }
901 }
902
903 // 6243940 We might end up in handle_wrong_method if
904 // the callee is deoptimized as we race thru here. If that
905 // happens we don't want to take a safepoint because the
906 // caller frame will look interpreted and arguments are now
907 // "compiled" so it is much better to make this transition
908 // invisible to the stack walking code. Unfortunately if
909 // we try and find the callee by normal means a safepoint
910 // is possible. So we stash the desired callee in the thread
911 // and the vm will find there should this case occur.
912
913 __ get_thread(rax);
914 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
915
916 // move Method* to rax, in case we end up in an c2i adapter.
917 // the c2i adapters expect Method* in rax, (c2) because c2's
918 // resolve stubs return the result (the method) in rax,.
919 // I'd love to fix this.
920 __ mov(rax, rbx);
921
922 __ jmp(rdi);
923 }
924
925 // ---------------------------------------------------------------
926 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
927 int total_args_passed,
928 int comp_args_on_stack,
929 const BasicType *sig_bt,
930 const VMRegPair *regs,
931 AdapterFingerPrint* fingerprint) {
932 address i2c_entry = __ pc();
933
934 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
935
936 // -------------------------------------------------------------------------
937 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
938 // to the interpreter. The args start out packed in the compiled layout. They
939 // need to be unpacked into the interpreter layout. This will almost always
940 // require some stack space. We grow the current (compiled) stack, then repack
941 // the args. We finally end in a jump to the generic interpreter entry point.
942 // On exit from the interpreter, the interpreter will restore our SP (lest the
943 // compiled code, which relies solely on SP and not EBP, get sick).
944
945 address c2i_unverified_entry = __ pc();
946 Label skip_fixup;
947
948 Register holder = rax;
949 Register receiver = rcx;
950 Register temp = rbx;
951
952 {
953
954 Label missed;
955 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
956 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
957 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
958 __ jcc(Assembler::notEqual, missed);
959 // Method might have been compiled since the call site was patched to
960 // interpreted if that is the case treat it as a miss so we can get
961 // the call site corrected.
962 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
963 __ jcc(Assembler::equal, skip_fixup);
964
965 __ bind(missed);
966 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
967 }
968
969 address c2i_entry = __ pc();
970
971 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
972 bs->c2i_entry_barrier(masm);
973
974 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
975
976 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
977 }
978
979 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
980 VMRegPair *regs,
981 int total_args_passed) {
982
983 // We return the amount of VMRegImpl stack slots we need to reserve for all
984 // the arguments NOT counting out_preserve_stack_slots.
985
986 uint stack = 0; // All arguments on stack
987
988 for( int i = 0; i < total_args_passed; i++) {
989 // From the type and the argument number (count) compute the location
990 switch( sig_bt[i] ) {
991 case T_BOOLEAN:
992 case T_CHAR:
993 case T_FLOAT:
994 case T_BYTE:
995 case T_SHORT:
996 case T_INT:
997 case T_OBJECT:
998 case T_ARRAY:
999 case T_ADDRESS:
1000 case T_METADATA:
1001 regs[i].set1(VMRegImpl::stack2reg(stack++));
1002 break;
1003 case T_LONG:
1004 case T_DOUBLE: // The stack numbering is reversed from Java
1005 // Since C arguments do not get reversed, the ordering for
1006 // doubles on the stack must be opposite the Java convention
1007 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1008 regs[i].set2(VMRegImpl::stack2reg(stack));
1009 stack += 2;
1010 break;
1011 case T_VOID: regs[i].set_bad(); break;
1012 default:
1013 ShouldNotReachHere();
1014 break;
1015 }
1016 }
1017 return stack;
1018 }
1019
1020 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1021 uint num_bits,
1022 uint total_args_passed) {
1023 Unimplemented();
1024 return 0;
1025 }
1026
1027 // A simple move of integer like type
1028 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1029 if (src.first()->is_stack()) {
1030 if (dst.first()->is_stack()) {
1031 // stack to stack
1032 // __ ld(FP, reg2offset(src.first()), L5);
1033 // __ st(L5, SP, reg2offset(dst.first()));
1034 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1035 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1036 } else {
1037 // stack to reg
1038 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1039 }
1040 } else if (dst.first()->is_stack()) {
1041 // reg to stack
1042 // no need to sign extend on 64bit
1043 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1044 } else {
1045 if (dst.first() != src.first()) {
1046 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1047 }
1048 }
1049 }
1050
1051 // An oop arg. Must pass a handle not the oop itself
1052 static void object_move(MacroAssembler* masm,
1053 OopMap* map,
1054 int oop_handle_offset,
1055 int framesize_in_slots,
1056 VMRegPair src,
1057 VMRegPair dst,
1058 bool is_receiver,
1059 int* receiver_offset) {
1060
1061 // Because of the calling conventions we know that src can be a
1062 // register or a stack location. dst can only be a stack location.
1063
1064 assert(dst.first()->is_stack(), "must be stack");
1065 // must pass a handle. First figure out the location we use as a handle
1066
1067 if (src.first()->is_stack()) {
1068 // Oop is already on the stack as an argument
1069 Register rHandle = rax;
1070 Label nil;
1071 __ xorptr(rHandle, rHandle);
1072 __ cmpptr(Address(rbp, reg2offset_in(src.first())), NULL_WORD);
1073 __ jcc(Assembler::equal, nil);
1074 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1075 __ bind(nil);
1076 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1077
1078 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1079 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1080 if (is_receiver) {
1081 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1082 }
1083 } else {
1084 // Oop is in a register we must store it to the space we reserve
1085 // on the stack for oop_handles
1086 const Register rOop = src.first()->as_Register();
1087 const Register rHandle = rax;
1088 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1089 int offset = oop_slot*VMRegImpl::stack_slot_size;
1090 Label skip;
1091 __ movptr(Address(rsp, offset), rOop);
1092 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1093 __ xorptr(rHandle, rHandle);
1094 __ cmpptr(rOop, NULL_WORD);
1095 __ jcc(Assembler::equal, skip);
1096 __ lea(rHandle, Address(rsp, offset));
1097 __ bind(skip);
1098 // Store the handle parameter
1099 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1100 if (is_receiver) {
1101 *receiver_offset = offset;
1102 }
1103 }
1104 }
1105
1106 // A float arg may have to do float reg int reg conversion
1107 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1108 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1109
1110 // Because of the calling convention we know that src is either a stack location
1111 // or an xmm register. dst can only be a stack location.
1112
1113 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1114
1115 if (src.first()->is_stack()) {
1116 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1117 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1118 } else {
1119 // reg to stack
1120 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1121 }
1122 }
1123
1124 // A long move
1125 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1126
1127 // The only legal possibility for a long_move VMRegPair is:
1128 // 1: two stack slots (possibly unaligned)
1129 // as neither the java or C calling convention will use registers
1130 // for longs.
1131
1132 if (src.first()->is_stack() && dst.first()->is_stack()) {
1133 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1134 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1135 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1136 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1137 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1138 } else {
1139 ShouldNotReachHere();
1140 }
1141 }
1142
1143 // A double move
1144 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1145
1146 // The only legal possibilities for a double_move VMRegPair are:
1147 // The painful thing here is that like long_move a VMRegPair might be
1148
1149 // Because of the calling convention we know that src is either
1150 // 1: a single physical register (xmm registers only)
1151 // 2: two stack slots (possibly unaligned)
1152 // dst can only be a pair of stack slots.
1153
1154 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1155
1156 if (src.first()->is_stack()) {
1157 // source is all stack
1158 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1159 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1160 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1161 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1162 } else {
1163 // reg to stack
1164 // No worries about stack alignment
1165 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1166 }
1167 }
1168
1169
1170 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1171 // We always ignore the frame_slots arg and just use the space just below frame pointer
1172 // which by this time is free to use
1173 switch (ret_type) {
1174 case T_FLOAT:
1175 __ fstp_s(Address(rbp, -wordSize));
1176 break;
1177 case T_DOUBLE:
1178 __ fstp_d(Address(rbp, -2*wordSize));
1179 break;
1180 case T_VOID: break;
1181 case T_LONG:
1182 __ movptr(Address(rbp, -wordSize), rax);
1183 __ movptr(Address(rbp, -2*wordSize), rdx);
1184 break;
1185 default: {
1186 __ movptr(Address(rbp, -wordSize), rax);
1187 }
1188 }
1189 }
1190
1191 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1192 // We always ignore the frame_slots arg and just use the space just below frame pointer
1193 // which by this time is free to use
1194 switch (ret_type) {
1195 case T_FLOAT:
1196 __ fld_s(Address(rbp, -wordSize));
1197 break;
1198 case T_DOUBLE:
1199 __ fld_d(Address(rbp, -2*wordSize));
1200 break;
1201 case T_LONG:
1202 __ movptr(rax, Address(rbp, -wordSize));
1203 __ movptr(rdx, Address(rbp, -2*wordSize));
1204 break;
1205 case T_VOID: break;
1206 default: {
1207 __ movptr(rax, Address(rbp, -wordSize));
1208 }
1209 }
1210 }
1211
1212 static void verify_oop_args(MacroAssembler* masm,
1213 const methodHandle& method,
1214 const BasicType* sig_bt,
1215 const VMRegPair* regs) {
1216 Register temp_reg = rbx; // not part of any compiled calling seq
1217 if (VerifyOops) {
1218 for (int i = 0; i < method->size_of_parameters(); i++) {
1219 if (is_reference_type(sig_bt[i])) {
1220 VMReg r = regs[i].first();
1221 assert(r->is_valid(), "bad oop arg");
1222 if (r->is_stack()) {
1223 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1224 __ verify_oop(temp_reg);
1225 } else {
1226 __ verify_oop(r->as_Register());
1227 }
1228 }
1229 }
1230 }
1231 }
1232
1233 static void gen_special_dispatch(MacroAssembler* masm,
1234 const methodHandle& method,
1235 const BasicType* sig_bt,
1236 const VMRegPair* regs) {
1237 verify_oop_args(masm, method, sig_bt, regs);
1238 vmIntrinsics::ID iid = method->intrinsic_id();
1239
1240 // Now write the args into the outgoing interpreter space
1241 bool has_receiver = false;
1242 Register receiver_reg = noreg;
1243 int member_arg_pos = -1;
1244 Register member_reg = noreg;
1245 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1246 if (ref_kind != 0) {
1247 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1248 member_reg = rbx; // known to be free at this point
1249 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1250 } else if (iid == vmIntrinsics::_invokeBasic) {
1251 has_receiver = true;
1252 } else {
1253 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1254 }
1255
1256 if (member_reg != noreg) {
1257 // Load the member_arg into register, if necessary.
1258 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1259 VMReg r = regs[member_arg_pos].first();
1260 if (r->is_stack()) {
1261 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1262 } else {
1263 // no data motion is needed
1264 member_reg = r->as_Register();
1265 }
1266 }
1267
1268 if (has_receiver) {
1269 // Make sure the receiver is loaded into a register.
1270 assert(method->size_of_parameters() > 0, "oob");
1271 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1272 VMReg r = regs[0].first();
1273 assert(r->is_valid(), "bad receiver arg");
1274 if (r->is_stack()) {
1275 // Porting note: This assumes that compiled calling conventions always
1276 // pass the receiver oop in a register. If this is not true on some
1277 // platform, pick a temp and load the receiver from stack.
1278 fatal("receiver always in a register");
1279 receiver_reg = rcx; // known to be free at this point
1280 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1281 } else {
1282 // no data motion is needed
1283 receiver_reg = r->as_Register();
1284 }
1285 }
1286
1287 // Figure out which address we are really jumping to:
1288 MethodHandles::generate_method_handle_dispatch(masm, iid,
1289 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1290 }
1291
1292 // ---------------------------------------------------------------------------
1293 // Generate a native wrapper for a given method. The method takes arguments
1294 // in the Java compiled code convention, marshals them to the native
1295 // convention (handlizes oops, etc), transitions to native, makes the call,
1296 // returns to java state (possibly blocking), unhandlizes any result and
1297 // returns.
1298 //
1299 // Critical native functions are a shorthand for the use of
1300 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1301 // functions. The wrapper is expected to unpack the arguments before
1302 // passing them to the callee. Critical native functions leave the state _in_Java,
1303 // since they cannot stop for GC.
1304 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1305 // block and the check for pending exceptions it's impossible for them
1306 // to be thrown.
1307 //
1308 //
1309 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1310 const methodHandle& method,
1311 int compile_id,
1312 BasicType* in_sig_bt,
1313 VMRegPair* in_regs,
1314 BasicType ret_type) {
1315 if (method->is_method_handle_intrinsic()) {
1316 vmIntrinsics::ID iid = method->intrinsic_id();
1317 intptr_t start = (intptr_t)__ pc();
1318 int vep_offset = ((intptr_t)__ pc()) - start;
1319 gen_special_dispatch(masm,
1320 method,
1321 in_sig_bt,
1322 in_regs);
1323 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1324 __ flush();
1325 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1326 return nmethod::new_native_nmethod(method,
1327 compile_id,
1328 masm->code(),
1329 vep_offset,
1330 frame_complete,
1331 stack_slots / VMRegImpl::slots_per_word,
1332 in_ByteSize(-1),
1333 in_ByteSize(-1),
1334 (OopMapSet*)nullptr);
1335 }
1336 address native_func = method->native_function();
1337 assert(native_func != nullptr, "must have function");
1338
1339 // An OopMap for lock (and class if static)
1340 OopMapSet *oop_maps = new OopMapSet();
1341
1342 // We have received a description of where all the java arg are located
1343 // on entry to the wrapper. We need to convert these args to where
1344 // the jni function will expect them. To figure out where they go
1345 // we convert the java signature to a C signature by inserting
1346 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1347
1348 const int total_in_args = method->size_of_parameters();
1349 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1350
1351 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1352 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1353 BasicType* in_elem_bt = nullptr;
1354
1355 int argc = 0;
1356 out_sig_bt[argc++] = T_ADDRESS;
1357 if (method->is_static()) {
1358 out_sig_bt[argc++] = T_OBJECT;
1359 }
1360
1361 for (int i = 0; i < total_in_args ; i++ ) {
1362 out_sig_bt[argc++] = in_sig_bt[i];
1363 }
1364
1365 // Now figure out where the args must be stored and how much stack space
1366 // they require.
1367 int out_arg_slots;
1368 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1369
1370 // Compute framesize for the wrapper. We need to handlize all oops in
1371 // registers a max of 2 on x86.
1372
1373 // Calculate the total number of stack slots we will need.
1374
1375 // First count the abi requirement plus all of the outgoing args
1376 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1377
1378 // Now the space for the inbound oop handle area
1379 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1380
1381 int oop_handle_offset = stack_slots;
1382 stack_slots += total_save_slots;
1383
1384 // Now any space we need for handlizing a klass if static method
1385
1386 int klass_slot_offset = 0;
1387 int klass_offset = -1;
1388 int lock_slot_offset = 0;
1389 bool is_static = false;
1390
1391 if (method->is_static()) {
1392 klass_slot_offset = stack_slots;
1393 stack_slots += VMRegImpl::slots_per_word;
1394 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1395 is_static = true;
1396 }
1397
1398 // Plus a lock if needed
1399
1400 if (method->is_synchronized()) {
1401 lock_slot_offset = stack_slots;
1402 stack_slots += VMRegImpl::slots_per_word;
1403 }
1404
1405 // Now a place (+2) to save return values or temp during shuffling
1406 // + 2 for return address (which we own) and saved rbp,
1407 stack_slots += 4;
1408
1409 // Ok The space we have allocated will look like:
1410 //
1411 //
1412 // FP-> | |
1413 // |---------------------|
1414 // | 2 slots for moves |
1415 // |---------------------|
1416 // | lock box (if sync) |
1417 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1418 // | klass (if static) |
1419 // |---------------------| <- klass_slot_offset
1420 // | oopHandle area |
1421 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1422 // | outbound memory |
1423 // | based arguments |
1424 // | |
1425 // |---------------------|
1426 // | |
1427 // SP-> | out_preserved_slots |
1428 //
1429 //
1430 // ****************************************************************************
1431 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1432 // arguments off of the stack after the jni call. Before the call we can use
1433 // instructions that are SP relative. After the jni call we switch to FP
1434 // relative instructions instead of re-adjusting the stack on windows.
1435 // ****************************************************************************
1436
1437
1438 // Now compute actual number of stack words we need rounding to make
1439 // stack properly aligned.
1440 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1441
1442 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1443
1444 intptr_t start = (intptr_t)__ pc();
1445
1446 // First thing make an ic check to see if we should even be here
1447
1448 // We are free to use all registers as temps without saving them and
1449 // restoring them except rbp. rbp is the only callee save register
1450 // as far as the interpreter and the compiler(s) are concerned.
1451
1452
1453 const Register ic_reg = rax;
1454 const Register receiver = rcx;
1455 Label hit;
1456 Label exception_pending;
1457
1458 __ verify_oop(receiver);
1459 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1460 __ jcc(Assembler::equal, hit);
1461
1462 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1463
1464 // verified entry must be aligned for code patching.
1465 // and the first 5 bytes must be in the same cache line
1466 // if we align at 8 then we will be sure 5 bytes are in the same line
1467 __ align(8);
1468
1469 __ bind(hit);
1470
1471 int vep_offset = ((intptr_t)__ pc()) - start;
1472
1473 #ifdef COMPILER1
1474 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1475 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1476 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1477 }
1478 #endif // COMPILER1
1479
1480 // The instruction at the verified entry point must be 5 bytes or longer
1481 // because it can be patched on the fly by make_non_entrant. The stack bang
1482 // instruction fits that requirement.
1483
1484 // Generate stack overflow check
1485 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1486
1487 // Generate a new frame for the wrapper.
1488 __ enter();
1489 // -2 because return address is already present and so is saved rbp
1490 __ subptr(rsp, stack_size - 2*wordSize);
1491
1492
1493 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1494 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */);
1495
1496 // Frame is now completed as far as size and linkage.
1497 int frame_complete = ((intptr_t)__ pc()) - start;
1498
1499 if (UseRTMLocking) {
1500 // Abort RTM transaction before calling JNI
1501 // because critical section will be large and will be
1502 // aborted anyway. Also nmethod could be deoptimized.
1503 __ xabort(0);
1504 }
1505
1506 // Calculate the difference between rsp and rbp,. We need to know it
1507 // after the native call because on windows Java Natives will pop
1508 // the arguments and it is painful to do rsp relative addressing
1509 // in a platform independent way. So after the call we switch to
1510 // rbp, relative addressing.
1511
1512 int fp_adjustment = stack_size - 2*wordSize;
1513
1514 #ifdef COMPILER2
1515 // C2 may leave the stack dirty if not in SSE2+ mode
1516 if (UseSSE >= 2) {
1517 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1518 } else {
1519 __ empty_FPU_stack();
1520 }
1521 #endif /* COMPILER2 */
1522
1523 // Compute the rbp, offset for any slots used after the jni call
1524
1525 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1526
1527 // We use rdi as a thread pointer because it is callee save and
1528 // if we load it once it is usable thru the entire wrapper
1529 const Register thread = rdi;
1530
1531 // We use rsi as the oop handle for the receiver/klass
1532 // It is callee save so it survives the call to native
1533
1534 const Register oop_handle_reg = rsi;
1535
1536 __ get_thread(thread);
1537
1538 //
1539 // We immediately shuffle the arguments so that any vm call we have to
1540 // make from here on out (sync slow path, jvmti, etc.) we will have
1541 // captured the oops from our caller and have a valid oopMap for
1542 // them.
1543
1544 // -----------------
1545 // The Grand Shuffle
1546 //
1547 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1548 // and, if static, the class mirror instead of a receiver. This pretty much
1549 // guarantees that register layout will not match (and x86 doesn't use reg
1550 // parms though amd does). Since the native abi doesn't use register args
1551 // and the java conventions does we don't have to worry about collisions.
1552 // All of our moved are reg->stack or stack->stack.
1553 // We ignore the extra arguments during the shuffle and handle them at the
1554 // last moment. The shuffle is described by the two calling convention
1555 // vectors we have in our possession. We simply walk the java vector to
1556 // get the source locations and the c vector to get the destinations.
1557
1558 int c_arg = method->is_static() ? 2 : 1;
1559
1560 // Record rsp-based slot for receiver on stack for non-static methods
1561 int receiver_offset = -1;
1562
1563 // This is a trick. We double the stack slots so we can claim
1564 // the oops in the caller's frame. Since we are sure to have
1565 // more args than the caller doubling is enough to make
1566 // sure we can capture all the incoming oop args from the
1567 // caller.
1568 //
1569 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1570
1571 // Mark location of rbp,
1572 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1573
1574 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1575 // Are free to temporaries if we have to do stack to steck moves.
1576 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1577
1578 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1579 switch (in_sig_bt[i]) {
1580 case T_ARRAY:
1581 case T_OBJECT:
1582 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1583 ((i == 0) && (!is_static)),
1584 &receiver_offset);
1585 break;
1586 case T_VOID:
1587 break;
1588
1589 case T_FLOAT:
1590 float_move(masm, in_regs[i], out_regs[c_arg]);
1591 break;
1592
1593 case T_DOUBLE:
1594 assert( i + 1 < total_in_args &&
1595 in_sig_bt[i + 1] == T_VOID &&
1596 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1597 double_move(masm, in_regs[i], out_regs[c_arg]);
1598 break;
1599
1600 case T_LONG :
1601 long_move(masm, in_regs[i], out_regs[c_arg]);
1602 break;
1603
1604 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1605
1606 default:
1607 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1608 }
1609 }
1610
1611 // Pre-load a static method's oop into rsi. Used both by locking code and
1612 // the normal JNI call code.
1613 if (method->is_static()) {
1614
1615 // load opp into a register
1616 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1617
1618 // Now handlize the static class mirror it's known not-null.
1619 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1620 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1621
1622 // Now get the handle
1623 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1624 // store the klass handle as second argument
1625 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1626 }
1627
1628 // Change state to native (we save the return address in the thread, since it might not
1629 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1630 // points into the right code segment. It does not have to be the correct return pc.
1631 // We use the same pc/oopMap repeatedly when we call out
1632
1633 intptr_t the_pc = (intptr_t) __ pc();
1634 oop_maps->add_gc_map(the_pc - start, map);
1635
1636 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc, noreg);
1637
1638
1639 // We have all of the arguments setup at this point. We must not touch any register
1640 // argument registers at this point (what if we save/restore them there are no oop?
1641
1642 {
1643 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0, noreg);
1644 __ mov_metadata(rax, method());
1645 __ call_VM_leaf(
1646 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1647 thread, rax);
1648 }
1649
1650 // RedefineClasses() tracing support for obsolete method entry
1651 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1652 __ mov_metadata(rax, method());
1653 __ call_VM_leaf(
1654 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1655 thread, rax);
1656 }
1657
1658 // These are register definitions we need for locking/unlocking
1659 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1660 const Register obj_reg = rcx; // Will contain the oop
1661 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1662
1663 Label slow_path_lock;
1664 Label lock_done;
1665
1666 // Lock a synchronized method
1667 if (method->is_synchronized()) {
1668 Label count_mon;
1669
1670 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1671
1672 // Get the handle (the 2nd argument)
1673 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1674
1675 // Get address of the box
1676
1677 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1678
1679 // Load the oop from the handle
1680 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1681
1682 if (LockingMode == LM_MONITOR) {
1683 __ jmp(slow_path_lock);
1684 } else if (LockingMode == LM_LEGACY) {
1685 // Load immediate 1 into swap_reg %rax,
1686 __ movptr(swap_reg, 1);
1687
1688 // Load (object->mark() | 1) into swap_reg %rax,
1689 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1690
1691 // Save (object->mark() | 1) into BasicLock's displaced header
1692 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1693
1694 // src -> dest iff dest == rax, else rax, <- dest
1695 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1696 __ lock();
1697 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1698 __ jcc(Assembler::equal, count_mon);
1699
1700 // Test if the oopMark is an obvious stack pointer, i.e.,
1701 // 1) (mark & 3) == 0, and
1702 // 2) rsp <= mark < mark + os::pagesize()
1703 // These 3 tests can be done by evaluating the following
1704 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1705 // assuming both stack pointer and pagesize have their
1706 // least significant 2 bits clear.
1707 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1708
1709 __ subptr(swap_reg, rsp);
1710 __ andptr(swap_reg, 3 - (int)os::vm_page_size());
1711
1712 // Save the test result, for recursive case, the result is zero
1713 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1714 __ jcc(Assembler::notEqual, slow_path_lock);
1715 } else {
1716 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1717 // Load object header
1718 __ movptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1719 __ lightweight_lock(obj_reg, swap_reg, thread, lock_reg, slow_path_lock);
1720 }
1721 __ bind(count_mon);
1722 __ inc_held_monitor_count();
1723
1724 // Slow path will re-enter here
1725 __ bind(lock_done);
1726 }
1727
1728
1729 // Finally just about ready to make the JNI call
1730
1731 // get JNIEnv* which is first argument to native
1732 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1733 __ movptr(Address(rsp, 0), rdx);
1734
1735 // Now set thread in native
1736 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1737
1738 __ call(RuntimeAddress(native_func));
1739
1740 // Verify or restore cpu control state after JNI call
1741 __ restore_cpu_control_state_after_jni(noreg);
1742
1743 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1744 // arguments off of the stack. We could just re-adjust the stack pointer here
1745 // and continue to do SP relative addressing but we instead switch to FP
1746 // relative addressing.
1747
1748 // Unpack native results.
1749 switch (ret_type) {
1750 case T_BOOLEAN: __ c2bool(rax); break;
1751 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1752 case T_BYTE : __ sign_extend_byte (rax); break;
1753 case T_SHORT : __ sign_extend_short(rax); break;
1754 case T_INT : /* nothing to do */ break;
1755 case T_DOUBLE :
1756 case T_FLOAT :
1757 // Result is in st0 we'll save as needed
1758 break;
1759 case T_ARRAY: // Really a handle
1760 case T_OBJECT: // Really a handle
1761 break; // can't de-handlize until after safepoint check
1762 case T_VOID: break;
1763 case T_LONG: break;
1764 default : ShouldNotReachHere();
1765 }
1766
1767 Label after_transition;
1768
1769 // Switch thread to "native transition" state before reading the synchronization state.
1770 // This additional state is necessary because reading and testing the synchronization
1771 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1772 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1773 // VM thread changes sync state to synchronizing and suspends threads for GC.
1774 // Thread A is resumed to finish this native method, but doesn't block here since it
1775 // didn't see any synchronization is progress, and escapes.
1776 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1777
1778 // Force this write out before the read below
1779 if (!UseSystemMemoryBarrier) {
1780 __ membar(Assembler::Membar_mask_bits(
1781 Assembler::LoadLoad | Assembler::LoadStore |
1782 Assembler::StoreLoad | Assembler::StoreStore));
1783 }
1784
1785 if (AlwaysRestoreFPU) {
1786 // Make sure the control word is correct.
1787 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1788 }
1789
1790 // check for safepoint operation in progress and/or pending suspend requests
1791 { Label Continue, slow_path;
1792
1793 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1794
1795 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1796 __ jcc(Assembler::equal, Continue);
1797 __ bind(slow_path);
1798
1799 // Don't use call_VM as it will see a possible pending exception and forward it
1800 // and never return here preventing us from clearing _last_native_pc down below.
1801 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1802 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1803 // by hand.
1804 //
1805 __ vzeroupper();
1806
1807 save_native_result(masm, ret_type, stack_slots);
1808 __ push(thread);
1809 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1810 JavaThread::check_special_condition_for_native_trans)));
1811 __ increment(rsp, wordSize);
1812 // Restore any method result value
1813 restore_native_result(masm, ret_type, stack_slots);
1814 __ bind(Continue);
1815 }
1816
1817 // change thread state
1818 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1819 __ bind(after_transition);
1820
1821 Label reguard;
1822 Label reguard_done;
1823 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1824 __ jcc(Assembler::equal, reguard);
1825
1826 // slow path reguard re-enters here
1827 __ bind(reguard_done);
1828
1829 // Handle possible exception (will unlock if necessary)
1830
1831 // native result if any is live
1832
1833 // Unlock
1834 Label slow_path_unlock;
1835 Label unlock_done;
1836 if (method->is_synchronized()) {
1837
1838 Label fast_done;
1839
1840 // Get locked oop from the handle we passed to jni
1841 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1842
1843 if (LockingMode == LM_LEGACY) {
1844 Label not_recur;
1845 // Simple recursive lock?
1846 __ cmpptr(Address(rbp, lock_slot_rbp_offset), NULL_WORD);
1847 __ jcc(Assembler::notEqual, not_recur);
1848 __ dec_held_monitor_count();
1849 __ jmpb(fast_done);
1850 __ bind(not_recur);
1851 }
1852
1853 // Must save rax, if it is live now because cmpxchg must use it
1854 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1855 save_native_result(masm, ret_type, stack_slots);
1856 }
1857
1858 if (LockingMode == LM_MONITOR) {
1859 __ jmp(slow_path_unlock);
1860 } else if (LockingMode == LM_LEGACY) {
1861 // get old displaced header
1862 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1863
1864 // get address of the stack lock
1865 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1866
1867 // Atomic swap old header if oop still contains the stack lock
1868 // src -> dest iff dest == rax, else rax, <- dest
1869 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1870 __ lock();
1871 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1872 __ jcc(Assembler::notEqual, slow_path_unlock);
1873 __ dec_held_monitor_count();
1874 } else {
1875 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1876 __ movptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1877 __ andptr(swap_reg, ~(int32_t)markWord::lock_mask_in_place);
1878 __ lightweight_unlock(obj_reg, swap_reg, lock_reg, slow_path_unlock);
1879 __ dec_held_monitor_count();
1880 }
1881
1882 // slow path re-enters here
1883 __ bind(unlock_done);
1884 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1885 restore_native_result(masm, ret_type, stack_slots);
1886 }
1887
1888 __ bind(fast_done);
1889 }
1890
1891 {
1892 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0, noreg);
1893 // Tell dtrace about this method exit
1894 save_native_result(masm, ret_type, stack_slots);
1895 __ mov_metadata(rax, method());
1896 __ call_VM_leaf(
1897 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1898 thread, rax);
1899 restore_native_result(masm, ret_type, stack_slots);
1900 }
1901
1902 // We can finally stop using that last_Java_frame we setup ages ago
1903
1904 __ reset_last_Java_frame(thread, false);
1905
1906 // Unbox oop result, e.g. JNIHandles::resolve value.
1907 if (is_reference_type(ret_type)) {
1908 __ resolve_jobject(rax /* value */,
1909 thread /* thread */,
1910 rcx /* tmp */);
1911 }
1912
1913 if (CheckJNICalls) {
1914 // clear_pending_jni_exception_check
1915 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
1916 }
1917
1918 // reset handle block
1919 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1920 __ movl(Address(rcx, JNIHandleBlock::top_offset()), NULL_WORD);
1921
1922 // Any exception pending?
1923 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1924 __ jcc(Assembler::notEqual, exception_pending);
1925
1926 // no exception, we're almost done
1927
1928 // check that only result value is on FPU stack
1929 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1930
1931 // Fixup floating pointer results so that result looks like a return from a compiled method
1932 if (ret_type == T_FLOAT) {
1933 if (UseSSE >= 1) {
1934 // Pop st0 and store as float and reload into xmm register
1935 __ fstp_s(Address(rbp, -4));
1936 __ movflt(xmm0, Address(rbp, -4));
1937 }
1938 } else if (ret_type == T_DOUBLE) {
1939 if (UseSSE >= 2) {
1940 // Pop st0 and store as double and reload into xmm register
1941 __ fstp_d(Address(rbp, -8));
1942 __ movdbl(xmm0, Address(rbp, -8));
1943 }
1944 }
1945
1946 // Return
1947
1948 __ leave();
1949 __ ret(0);
1950
1951 // Unexpected paths are out of line and go here
1952
1953 // Slow path locking & unlocking
1954 if (method->is_synchronized()) {
1955
1956 // BEGIN Slow path lock
1957
1958 __ bind(slow_path_lock);
1959
1960 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1961 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1962 __ push(thread);
1963 __ push(lock_reg);
1964 __ push(obj_reg);
1965 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1966 __ addptr(rsp, 3*wordSize);
1967
1968 #ifdef ASSERT
1969 { Label L;
1970 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1971 __ jcc(Assembler::equal, L);
1972 __ stop("no pending exception allowed on exit from monitorenter");
1973 __ bind(L);
1974 }
1975 #endif
1976 __ jmp(lock_done);
1977
1978 // END Slow path lock
1979
1980 // BEGIN Slow path unlock
1981 __ bind(slow_path_unlock);
1982 __ vzeroupper();
1983 // Slow path unlock
1984
1985 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1986 save_native_result(masm, ret_type, stack_slots);
1987 }
1988 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1989
1990 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
1991 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1992
1993
1994 // should be a peal
1995 // +wordSize because of the push above
1996 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1997 __ push(thread);
1998 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1999 __ push(rax);
2000
2001 __ push(obj_reg);
2002 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2003 __ addptr(rsp, 3*wordSize);
2004 #ifdef ASSERT
2005 {
2006 Label L;
2007 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2008 __ jcc(Assembler::equal, L);
2009 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2010 __ bind(L);
2011 }
2012 #endif /* ASSERT */
2013
2014 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2015
2016 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2017 restore_native_result(masm, ret_type, stack_slots);
2018 }
2019 __ jmp(unlock_done);
2020 // END Slow path unlock
2021
2022 }
2023
2024 // SLOW PATH Reguard the stack if needed
2025
2026 __ bind(reguard);
2027 __ vzeroupper();
2028 save_native_result(masm, ret_type, stack_slots);
2029 {
2030 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2031 }
2032 restore_native_result(masm, ret_type, stack_slots);
2033 __ jmp(reguard_done);
2034
2035
2036 // BEGIN EXCEPTION PROCESSING
2037
2038 // Forward the exception
2039 __ bind(exception_pending);
2040
2041 // remove possible return value from FPU register stack
2042 __ empty_FPU_stack();
2043
2044 // pop our frame
2045 __ leave();
2046 // and forward the exception
2047 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2048
2049 __ flush();
2050
2051 nmethod *nm = nmethod::new_native_nmethod(method,
2052 compile_id,
2053 masm->code(),
2054 vep_offset,
2055 frame_complete,
2056 stack_slots / VMRegImpl::slots_per_word,
2057 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2058 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2059 oop_maps);
2060
2061 return nm;
2062
2063 }
2064
2065 // this function returns the adjust size (in number of words) to a c2i adapter
2066 // activation for use during deoptimization
2067 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2068 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2069 }
2070
2071
2072 // Number of stack slots between incoming argument block and the start of
2073 // a new frame. The PROLOG must add this many slots to the stack. The
2074 // EPILOG must remove this many slots. Intel needs one slot for
2075 // return address and one for rbp, (must save rbp)
2076 uint SharedRuntime::in_preserve_stack_slots() {
2077 return 2+VerifyStackAtCalls;
2078 }
2079
2080 uint SharedRuntime::out_preserve_stack_slots() {
2081 return 0;
2082 }
2083
2084 //------------------------------generate_deopt_blob----------------------------
2085 void SharedRuntime::generate_deopt_blob() {
2086 // allocate space for the code
2087 ResourceMark rm;
2088 // setup code generation tools
2089 // note: the buffer code size must account for StackShadowPages=50
2090 CodeBuffer buffer("deopt_blob", 1536, 1024);
2091 MacroAssembler* masm = new MacroAssembler(&buffer);
2092 int frame_size_in_words;
2093 OopMap* map = nullptr;
2094 // Account for the extra args we place on the stack
2095 // by the time we call fetch_unroll_info
2096 const int additional_words = 2; // deopt kind, thread
2097
2098 OopMapSet *oop_maps = new OopMapSet();
2099
2100 // -------------
2101 // This code enters when returning to a de-optimized nmethod. A return
2102 // address has been pushed on the stack, and return values are in
2103 // registers.
2104 // If we are doing a normal deopt then we were called from the patched
2105 // nmethod from the point we returned to the nmethod. So the return
2106 // address on the stack is wrong by NativeCall::instruction_size
2107 // We will adjust the value to it looks like we have the original return
2108 // address on the stack (like when we eagerly deoptimized).
2109 // In the case of an exception pending with deoptimized then we enter
2110 // with a return address on the stack that points after the call we patched
2111 // into the exception handler. We have the following register state:
2112 // rax,: exception
2113 // rbx,: exception handler
2114 // rdx: throwing pc
2115 // So in this case we simply jam rdx into the useless return address and
2116 // the stack looks just like we want.
2117 //
2118 // At this point we need to de-opt. We save the argument return
2119 // registers. We call the first C routine, fetch_unroll_info(). This
2120 // routine captures the return values and returns a structure which
2121 // describes the current frame size and the sizes of all replacement frames.
2122 // The current frame is compiled code and may contain many inlined
2123 // functions, each with their own JVM state. We pop the current frame, then
2124 // push all the new frames. Then we call the C routine unpack_frames() to
2125 // populate these frames. Finally unpack_frames() returns us the new target
2126 // address. Notice that callee-save registers are BLOWN here; they have
2127 // already been captured in the vframeArray at the time the return PC was
2128 // patched.
2129 address start = __ pc();
2130 Label cont;
2131
2132 // Prolog for non exception case!
2133
2134 // Save everything in sight.
2135
2136 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2137 // Normal deoptimization
2138 __ push(Deoptimization::Unpack_deopt);
2139 __ jmp(cont);
2140
2141 int reexecute_offset = __ pc() - start;
2142
2143 // Reexecute case
2144 // return address is the pc describes what bci to do re-execute at
2145
2146 // No need to update map as each call to save_live_registers will produce identical oopmap
2147 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2148
2149 __ push(Deoptimization::Unpack_reexecute);
2150 __ jmp(cont);
2151
2152 int exception_offset = __ pc() - start;
2153
2154 // Prolog for exception case
2155
2156 // all registers are dead at this entry point, except for rax, and
2157 // rdx which contain the exception oop and exception pc
2158 // respectively. Set them in TLS and fall thru to the
2159 // unpack_with_exception_in_tls entry point.
2160
2161 __ get_thread(rdi);
2162 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2163 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2164
2165 int exception_in_tls_offset = __ pc() - start;
2166
2167 // new implementation because exception oop is now passed in JavaThread
2168
2169 // Prolog for exception case
2170 // All registers must be preserved because they might be used by LinearScan
2171 // Exceptiop oop and throwing PC are passed in JavaThread
2172 // tos: stack at point of call to method that threw the exception (i.e. only
2173 // args are on the stack, no return address)
2174
2175 // make room on stack for the return address
2176 // It will be patched later with the throwing pc. The correct value is not
2177 // available now because loading it from memory would destroy registers.
2178 __ push(0);
2179
2180 // Save everything in sight.
2181
2182 // No need to update map as each call to save_live_registers will produce identical oopmap
2183 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2184
2185 // Now it is safe to overwrite any register
2186
2187 // store the correct deoptimization type
2188 __ push(Deoptimization::Unpack_exception);
2189
2190 // load throwing pc from JavaThread and patch it as the return address
2191 // of the current frame. Then clear the field in JavaThread
2192 __ get_thread(rdi);
2193 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2194 __ movptr(Address(rbp, wordSize), rdx);
2195 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2196
2197 #ifdef ASSERT
2198 // verify that there is really an exception oop in JavaThread
2199 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2200 __ verify_oop(rax);
2201
2202 // verify that there is no pending exception
2203 Label no_pending_exception;
2204 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2205 __ testptr(rax, rax);
2206 __ jcc(Assembler::zero, no_pending_exception);
2207 __ stop("must not have pending exception here");
2208 __ bind(no_pending_exception);
2209 #endif
2210
2211 __ bind(cont);
2212
2213 // Compiled code leaves the floating point stack dirty, empty it.
2214 __ empty_FPU_stack();
2215
2216
2217 // Call C code. Need thread and this frame, but NOT official VM entry
2218 // crud. We cannot block on this call, no GC can happen.
2219 __ get_thread(rcx);
2220 __ push(rcx);
2221 // fetch_unroll_info needs to call last_java_frame()
2222 __ set_last_Java_frame(rcx, noreg, noreg, nullptr, noreg);
2223
2224 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2225
2226 // Need to have an oopmap that tells fetch_unroll_info where to
2227 // find any register it might need.
2228
2229 oop_maps->add_gc_map( __ pc()-start, map);
2230
2231 // Discard args to fetch_unroll_info
2232 __ pop(rcx);
2233 __ pop(rcx);
2234
2235 __ get_thread(rcx);
2236 __ reset_last_Java_frame(rcx, false);
2237
2238 // Load UnrollBlock into EDI
2239 __ mov(rdi, rax);
2240
2241 // Move the unpack kind to a safe place in the UnrollBlock because
2242 // we are very short of registers
2243
2244 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset());
2245 // retrieve the deopt kind from the UnrollBlock.
2246 __ movl(rax, unpack_kind);
2247
2248 Label noException;
2249 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2250 __ jcc(Assembler::notEqual, noException);
2251 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2252 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2253 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2254 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2255
2256 __ verify_oop(rax);
2257
2258 // Overwrite the result registers with the exception results.
2259 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2260 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2261
2262 __ bind(noException);
2263
2264 // Stack is back to only having register save data on the stack.
2265 // Now restore the result registers. Everything else is either dead or captured
2266 // in the vframeArray.
2267
2268 RegisterSaver::restore_result_registers(masm);
2269
2270 // Non standard control word may be leaked out through a safepoint blob, and we can
2271 // deopt at a poll point with the non standard control word. However, we should make
2272 // sure the control word is correct after restore_result_registers.
2273 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2274
2275 // All of the register save area has been popped of the stack. Only the
2276 // return address remains.
2277
2278 // Pop all the frames we must move/replace.
2279 //
2280 // Frame picture (youngest to oldest)
2281 // 1: self-frame (no frame link)
2282 // 2: deopting frame (no frame link)
2283 // 3: caller of deopting frame (could be compiled/interpreted).
2284 //
2285 // Note: by leaving the return address of self-frame on the stack
2286 // and using the size of frame 2 to adjust the stack
2287 // when we are done the return to frame 3 will still be on the stack.
2288
2289 // Pop deoptimized frame
2290 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2291
2292 // sp should be pointing at the return address to the caller (3)
2293
2294 // Pick up the initial fp we should save
2295 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2296 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset()));
2297
2298 #ifdef ASSERT
2299 // Compilers generate code that bang the stack by as much as the
2300 // interpreter would need. So this stack banging should never
2301 // trigger a fault. Verify that it does not on non product builds.
2302 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2303 __ bang_stack_size(rbx, rcx);
2304 #endif
2305
2306 // Load array of frame pcs into ECX
2307 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset()));
2308
2309 __ pop(rsi); // trash the old pc
2310
2311 // Load array of frame sizes into ESI
2312 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset()));
2313
2314 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset());
2315
2316 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset()));
2317 __ movl(counter, rbx);
2318
2319 // Now adjust the caller's stack to make up for the extra locals
2320 // but record the original sp so that we can save it in the skeletal interpreter
2321 // frame and the stack walking of interpreter_sender will get the unextended sp
2322 // value and not the "real" sp value.
2323
2324 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset());
2325 __ movptr(sp_temp, rsp);
2326 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset()));
2327 __ subptr(rsp, rbx);
2328
2329 // Push interpreter frames in a loop
2330 Label loop;
2331 __ bind(loop);
2332 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2333 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2334 __ pushptr(Address(rcx, 0)); // save return address
2335 __ enter(); // save old & set new rbp,
2336 __ subptr(rsp, rbx); // Prolog!
2337 __ movptr(rbx, sp_temp); // sender's sp
2338 // This value is corrected by layout_activation_impl
2339 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2340 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2341 __ movptr(sp_temp, rsp); // pass to next frame
2342 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2343 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2344 __ decrementl(counter); // decrement counter
2345 __ jcc(Assembler::notZero, loop);
2346 __ pushptr(Address(rcx, 0)); // save final return address
2347
2348 // Re-push self-frame
2349 __ enter(); // save old & set new rbp,
2350
2351 // Return address and rbp, are in place
2352 // We'll push additional args later. Just allocate a full sized
2353 // register save area
2354 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2355
2356 // Restore frame locals after moving the frame
2357 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2358 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2359 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2360 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2361 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2362
2363 // Set up the args to unpack_frame
2364
2365 __ pushl(unpack_kind); // get the unpack_kind value
2366 __ get_thread(rcx);
2367 __ push(rcx);
2368
2369 // set last_Java_sp, last_Java_fp
2370 __ set_last_Java_frame(rcx, noreg, rbp, nullptr, noreg);
2371
2372 // Call C code. Need thread but NOT official VM entry
2373 // crud. We cannot block on this call, no GC can happen. Call should
2374 // restore return values to their stack-slots with the new SP.
2375 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2376 // Set an oopmap for the call site
2377 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2378
2379 // rax, contains the return result type
2380 __ push(rax);
2381
2382 __ get_thread(rcx);
2383 __ reset_last_Java_frame(rcx, false);
2384
2385 // Collect return values
2386 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2387 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2388
2389 // Clear floating point stack before returning to interpreter
2390 __ empty_FPU_stack();
2391
2392 // Check if we should push the float or double return value.
2393 Label results_done, yes_double_value;
2394 __ cmpl(Address(rsp, 0), T_DOUBLE);
2395 __ jcc (Assembler::zero, yes_double_value);
2396 __ cmpl(Address(rsp, 0), T_FLOAT);
2397 __ jcc (Assembler::notZero, results_done);
2398
2399 // return float value as expected by interpreter
2400 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2401 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2402 __ jmp(results_done);
2403
2404 // return double value as expected by interpreter
2405 __ bind(yes_double_value);
2406 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2407 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2408
2409 __ bind(results_done);
2410
2411 // Pop self-frame.
2412 __ leave(); // Epilog!
2413
2414 // Jump to interpreter
2415 __ ret(0);
2416
2417 // -------------
2418 // make sure all code is generated
2419 masm->flush();
2420
2421 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2422 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2423 }
2424
2425
2426 #ifdef COMPILER2
2427 //------------------------------generate_uncommon_trap_blob--------------------
2428 void SharedRuntime::generate_uncommon_trap_blob() {
2429 // allocate space for the code
2430 ResourceMark rm;
2431 // setup code generation tools
2432 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2433 MacroAssembler* masm = new MacroAssembler(&buffer);
2434
2435 enum frame_layout {
2436 arg0_off, // thread sp + 0 // Arg location for
2437 arg1_off, // unloaded_class_index sp + 1 // calling C
2438 arg2_off, // exec_mode sp + 2
2439 // The frame sender code expects that rbp will be in the "natural" place and
2440 // will override any oopMap setting for it. We must therefore force the layout
2441 // so that it agrees with the frame sender code.
2442 rbp_off, // callee saved register sp + 3
2443 return_off, // slot for return address sp + 4
2444 framesize
2445 };
2446
2447 address start = __ pc();
2448
2449 if (UseRTMLocking) {
2450 // Abort RTM transaction before possible nmethod deoptimization.
2451 __ xabort(0);
2452 }
2453
2454 // Push self-frame.
2455 __ subptr(rsp, return_off*wordSize); // Epilog!
2456
2457 // rbp, is an implicitly saved callee saved register (i.e. the calling
2458 // convention will save restore it in prolog/epilog) Other than that
2459 // there are no callee save registers no that adapter frames are gone.
2460 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2461
2462 // Clear the floating point exception stack
2463 __ empty_FPU_stack();
2464
2465 // set last_Java_sp
2466 __ get_thread(rdx);
2467 __ set_last_Java_frame(rdx, noreg, noreg, nullptr, noreg);
2468
2469 // Call C code. Need thread but NOT official VM entry
2470 // crud. We cannot block on this call, no GC can happen. Call should
2471 // capture callee-saved registers as well as return values.
2472 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2473 // argument already in ECX
2474 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2475 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2476 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2477
2478 // Set an oopmap for the call site
2479 OopMapSet *oop_maps = new OopMapSet();
2480 OopMap* map = new OopMap( framesize, 0 );
2481 // No oopMap for rbp, it is known implicitly
2482
2483 oop_maps->add_gc_map( __ pc()-start, map);
2484
2485 __ get_thread(rcx);
2486
2487 __ reset_last_Java_frame(rcx, false);
2488
2489 // Load UnrollBlock into EDI
2490 __ movptr(rdi, rax);
2491
2492 #ifdef ASSERT
2493 { Label L;
2494 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset()),
2495 (int32_t)Deoptimization::Unpack_uncommon_trap);
2496 __ jcc(Assembler::equal, L);
2497 __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap");
2498 __ bind(L);
2499 }
2500 #endif
2501
2502 // Pop all the frames we must move/replace.
2503 //
2504 // Frame picture (youngest to oldest)
2505 // 1: self-frame (no frame link)
2506 // 2: deopting frame (no frame link)
2507 // 3: caller of deopting frame (could be compiled/interpreted).
2508
2509 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2510 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2511
2512 // Pop deoptimized frame
2513 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2514 __ addptr(rsp, rcx);
2515
2516 // sp should be pointing at the return address to the caller (3)
2517
2518 // Pick up the initial fp we should save
2519 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2520 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset()));
2521
2522 #ifdef ASSERT
2523 // Compilers generate code that bang the stack by as much as the
2524 // interpreter would need. So this stack banging should never
2525 // trigger a fault. Verify that it does not on non product builds.
2526 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2527 __ bang_stack_size(rbx, rcx);
2528 #endif
2529
2530 // Load array of frame pcs into ECX
2531 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset()));
2532
2533 __ pop(rsi); // trash the pc
2534
2535 // Load array of frame sizes into ESI
2536 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset()));
2537
2538 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset());
2539
2540 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset()));
2541 __ movl(counter, rbx);
2542
2543 // Now adjust the caller's stack to make up for the extra locals
2544 // but record the original sp so that we can save it in the skeletal interpreter
2545 // frame and the stack walking of interpreter_sender will get the unextended sp
2546 // value and not the "real" sp value.
2547
2548 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset());
2549 __ movptr(sp_temp, rsp);
2550 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset()));
2551 __ subptr(rsp, rbx);
2552
2553 // Push interpreter frames in a loop
2554 Label loop;
2555 __ bind(loop);
2556 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2557 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2558 __ pushptr(Address(rcx, 0)); // save return address
2559 __ enter(); // save old & set new rbp,
2560 __ subptr(rsp, rbx); // Prolog!
2561 __ movptr(rbx, sp_temp); // sender's sp
2562 // This value is corrected by layout_activation_impl
2563 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2564 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2565 __ movptr(sp_temp, rsp); // pass to next frame
2566 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2567 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2568 __ decrementl(counter); // decrement counter
2569 __ jcc(Assembler::notZero, loop);
2570 __ pushptr(Address(rcx, 0)); // save final return address
2571
2572 // Re-push self-frame
2573 __ enter(); // save old & set new rbp,
2574 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2575
2576
2577 // set last_Java_sp, last_Java_fp
2578 __ get_thread(rdi);
2579 __ set_last_Java_frame(rdi, noreg, rbp, nullptr, noreg);
2580
2581 // Call C code. Need thread but NOT official VM entry
2582 // crud. We cannot block on this call, no GC can happen. Call should
2583 // restore return values to their stack-slots with the new SP.
2584 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2585 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2586 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2587 // Set an oopmap for the call site
2588 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2589
2590 __ get_thread(rdi);
2591 __ reset_last_Java_frame(rdi, true);
2592
2593 // Pop self-frame.
2594 __ leave(); // Epilog!
2595
2596 // Jump to interpreter
2597 __ ret(0);
2598
2599 // -------------
2600 // make sure all code is generated
2601 masm->flush();
2602
2603 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2604 }
2605 #endif // COMPILER2
2606
2607 //------------------------------generate_handler_blob------
2608 //
2609 // Generate a special Compile2Runtime blob that saves all registers,
2610 // setup oopmap, and calls safepoint code to stop the compiled code for
2611 // a safepoint.
2612 //
2613 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2614
2615 // Account for thread arg in our frame
2616 const int additional_words = 1;
2617 int frame_size_in_words;
2618
2619 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2620
2621 ResourceMark rm;
2622 OopMapSet *oop_maps = new OopMapSet();
2623 OopMap* map;
2624
2625 // allocate space for the code
2626 // setup code generation tools
2627 CodeBuffer buffer("handler_blob", 2048, 1024);
2628 MacroAssembler* masm = new MacroAssembler(&buffer);
2629
2630 const Register java_thread = rdi; // callee-saved for VC++
2631 address start = __ pc();
2632 address call_pc = nullptr;
2633 bool cause_return = (poll_type == POLL_AT_RETURN);
2634 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2635
2636 if (UseRTMLocking) {
2637 // Abort RTM transaction before calling runtime
2638 // because critical section will be large and will be
2639 // aborted anyway. Also nmethod could be deoptimized.
2640 __ xabort(0);
2641 }
2642
2643 // If cause_return is true we are at a poll_return and there is
2644 // the return address on the stack to the caller on the nmethod
2645 // that is safepoint. We can leave this return on the stack and
2646 // effectively complete the return and safepoint in the caller.
2647 // Otherwise we push space for a return address that the safepoint
2648 // handler will install later to make the stack walking sensible.
2649 if (!cause_return)
2650 __ push(rbx); // Make room for return address (or push it again)
2651
2652 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2653
2654 // The following is basically a call_VM. However, we need the precise
2655 // address of the call in order to generate an oopmap. Hence, we do all the
2656 // work ourselves.
2657
2658 // Push thread argument and setup last_Java_sp
2659 __ get_thread(java_thread);
2660 __ push(java_thread);
2661 __ set_last_Java_frame(java_thread, noreg, noreg, nullptr, noreg);
2662
2663 // if this was not a poll_return then we need to correct the return address now.
2664 if (!cause_return) {
2665 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2666 // Additionally, rbx is a callee saved register and we can look at it later to determine
2667 // if someone changed the return address for us!
2668 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2669 __ movptr(Address(rbp, wordSize), rbx);
2670 }
2671
2672 // do the call
2673 __ call(RuntimeAddress(call_ptr));
2674
2675 // Set an oopmap for the call site. This oopmap will map all
2676 // oop-registers and debug-info registers as callee-saved. This
2677 // will allow deoptimization at this safepoint to find all possible
2678 // debug-info recordings, as well as let GC find all oops.
2679
2680 oop_maps->add_gc_map( __ pc() - start, map);
2681
2682 // Discard arg
2683 __ pop(rcx);
2684
2685 Label noException;
2686
2687 // Clear last_Java_sp again
2688 __ get_thread(java_thread);
2689 __ reset_last_Java_frame(java_thread, false);
2690
2691 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
2692 __ jcc(Assembler::equal, noException);
2693
2694 // Exception pending
2695 RegisterSaver::restore_live_registers(masm, save_vectors);
2696
2697 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2698
2699 __ bind(noException);
2700
2701 Label no_adjust, bail, not_special;
2702 if (!cause_return) {
2703 // If our stashed return pc was modified by the runtime we avoid touching it
2704 __ cmpptr(rbx, Address(rbp, wordSize));
2705 __ jccb(Assembler::notEqual, no_adjust);
2706
2707 // Skip over the poll instruction.
2708 // See NativeInstruction::is_safepoint_poll()
2709 // Possible encodings:
2710 // 85 00 test %eax,(%rax)
2711 // 85 01 test %eax,(%rcx)
2712 // 85 02 test %eax,(%rdx)
2713 // 85 03 test %eax,(%rbx)
2714 // 85 06 test %eax,(%rsi)
2715 // 85 07 test %eax,(%rdi)
2716 //
2717 // 85 04 24 test %eax,(%rsp)
2718 // 85 45 00 test %eax,0x0(%rbp)
2719
2720 #ifdef ASSERT
2721 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2722 #endif
2723 // rsp/rbp base encoding takes 3 bytes with the following register values:
2724 // rsp 0x04
2725 // rbp 0x05
2726 __ movzbl(rcx, Address(rbx, 1));
2727 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2728 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
2729 __ cmpptr(rcx, 1);
2730 __ jcc(Assembler::above, not_special);
2731 __ addptr(rbx, 1);
2732 __ bind(not_special);
2733 #ifdef ASSERT
2734 // Verify the correct encoding of the poll we're about to skip.
2735 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2736 __ jcc(Assembler::notEqual, bail);
2737 // Mask out the modrm bits
2738 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2739 // rax encodes to 0, so if the bits are nonzero it's incorrect
2740 __ jcc(Assembler::notZero, bail);
2741 #endif
2742 // Adjust return pc forward to step over the safepoint poll instruction
2743 __ addptr(rbx, 2);
2744 __ movptr(Address(rbp, wordSize), rbx);
2745 }
2746
2747 __ bind(no_adjust);
2748 // Normal exit, register restoring and exit
2749 RegisterSaver::restore_live_registers(masm, save_vectors);
2750
2751 __ ret(0);
2752
2753 #ifdef ASSERT
2754 __ bind(bail);
2755 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2756 #endif
2757
2758 // make sure all code is generated
2759 masm->flush();
2760
2761 // Fill-out other meta info
2762 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2763 }
2764
2765 //
2766 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2767 //
2768 // Generate a stub that calls into vm to find out the proper destination
2769 // of a java call. All the argument registers are live at this point
2770 // but since this is generic code we don't know what they are and the caller
2771 // must do any gc of the args.
2772 //
2773 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2774 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2775
2776 // allocate space for the code
2777 ResourceMark rm;
2778
2779 CodeBuffer buffer(name, 1000, 512);
2780 MacroAssembler* masm = new MacroAssembler(&buffer);
2781
2782 int frame_size_words;
2783 enum frame_layout {
2784 thread_off,
2785 extra_words };
2786
2787 OopMapSet *oop_maps = new OopMapSet();
2788 OopMap* map = nullptr;
2789
2790 int start = __ offset();
2791
2792 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2793
2794 int frame_complete = __ offset();
2795
2796 const Register thread = rdi;
2797 __ get_thread(rdi);
2798
2799 __ push(thread);
2800 __ set_last_Java_frame(thread, noreg, rbp, nullptr, noreg);
2801
2802 __ call(RuntimeAddress(destination));
2803
2804
2805 // Set an oopmap for the call site.
2806 // We need this not only for callee-saved registers, but also for volatile
2807 // registers that the compiler might be keeping live across a safepoint.
2808
2809 oop_maps->add_gc_map( __ offset() - start, map);
2810
2811 // rax, contains the address we are going to jump to assuming no exception got installed
2812
2813 __ addptr(rsp, wordSize);
2814
2815 // clear last_Java_sp
2816 __ reset_last_Java_frame(thread, true);
2817 // check for pending exceptions
2818 Label pending;
2819 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
2820 __ jcc(Assembler::notEqual, pending);
2821
2822 // get the returned Method*
2823 __ get_vm_result_2(rbx, thread);
2824 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2825
2826 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2827
2828 RegisterSaver::restore_live_registers(masm);
2829
2830 // We are back to the original state on entry and ready to go.
2831
2832 __ jmp(rax);
2833
2834 // Pending exception after the safepoint
2835
2836 __ bind(pending);
2837
2838 RegisterSaver::restore_live_registers(masm);
2839
2840 // exception pending => remove activation and forward to exception handler
2841
2842 __ get_thread(thread);
2843 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2844 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2845 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2846
2847 // -------------
2848 // make sure all code is generated
2849 masm->flush();
2850
2851 // return the blob
2852 // frame_size_words or bytes??
2853 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2854 }