1 /*
2 * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/nativeInst.hpp"
31 #include "code/vtableStubs.hpp"
32 #include "compiler/oopMap.hpp"
33 #include "gc/shared/gcLocker.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "logging/log.hpp"
38 #include "memory/resourceArea.hpp"
39 #include "oops/compiledICHolder.hpp"
40 #include "oops/klass.inline.hpp"
41 #include "prims/methodHandles.hpp"
42 #include "runtime/jniHandles.hpp"
43 #include "runtime/safepointMechanism.hpp"
44 #include "runtime/sharedRuntime.hpp"
45 #include "runtime/signature.hpp"
46 #include "runtime/stubRoutines.hpp"
47 #include "runtime/vframeArray.hpp"
48 #include "runtime/vm_version.hpp"
49 #include "utilities/align.hpp"
50 #include "vmreg_x86.inline.hpp"
51 #ifdef COMPILER1
52 #include "c1/c1_Runtime1.hpp"
53 #endif
54 #ifdef COMPILER2
55 #include "opto/runtime.hpp"
56 #endif
57
58 #define __ masm->
59
60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
61
62 class RegisterSaver {
63 // Capture info about frame layout
64 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
65 enum layout {
66 fpu_state_off = 0,
67 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
68 st0_off, st0H_off,
69 st1_off, st1H_off,
70 st2_off, st2H_off,
71 st3_off, st3H_off,
72 st4_off, st4H_off,
73 st5_off, st5H_off,
74 st6_off, st6H_off,
75 st7_off, st7H_off,
76 xmm_off,
77 DEF_XMM_OFFS(0),
78 DEF_XMM_OFFS(1),
79 DEF_XMM_OFFS(2),
80 DEF_XMM_OFFS(3),
81 DEF_XMM_OFFS(4),
82 DEF_XMM_OFFS(5),
83 DEF_XMM_OFFS(6),
84 DEF_XMM_OFFS(7),
85 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
86 rdi_off,
87 rsi_off,
88 ignore_off, // extra copy of rbp,
89 rsp_off,
90 rbx_off,
91 rdx_off,
92 rcx_off,
93 rax_off,
94 // The frame sender code expects that rbp will be in the "natural" place and
95 // will override any oopMap setting for it. We must therefore force the layout
96 // so that it agrees with the frame sender code.
97 rbp_off,
98 return_off, // slot for return address
99 reg_save_size };
100 enum { FPU_regs_live = flags_off - fpu_state_end };
101
102 public:
103
104 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
105 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
106 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
107
108 static int rax_offset() { return rax_off; }
109 static int rbx_offset() { return rbx_off; }
110
111 // Offsets into the register save area
112 // Used by deoptimization when it is managing result register
113 // values on its own
114
115 static int raxOffset(void) { return rax_off; }
116 static int rdxOffset(void) { return rdx_off; }
117 static int rbxOffset(void) { return rbx_off; }
118 static int xmm0Offset(void) { return xmm0_off; }
119 // This really returns a slot in the fp save area, which one is not important
120 static int fpResultOffset(void) { return st0_off; }
121
122 // During deoptimization only the result register need to be restored
123 // all the other values have already been extracted.
124
125 static void restore_result_registers(MacroAssembler* masm);
126
127 };
128
129 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
130 int* total_frame_words, bool verify_fpu, bool save_vectors) {
131 int num_xmm_regs = XMMRegister::number_of_registers;
132 int ymm_bytes = num_xmm_regs * 16;
133 int zmm_bytes = num_xmm_regs * 32;
134 #ifdef COMPILER2
135 int opmask_state_bytes = KRegister::number_of_registers * 8;
136 if (save_vectors) {
137 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
138 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
139 // Save upper half of YMM registers
140 int vect_bytes = ymm_bytes;
141 if (UseAVX > 2) {
142 // Save upper half of ZMM registers as well
143 vect_bytes += zmm_bytes;
144 additional_frame_words += opmask_state_bytes / wordSize;
145 }
146 additional_frame_words += vect_bytes / wordSize;
147 }
148 #else
149 assert(!save_vectors, "vectors are generated only by C2");
150 #endif
151 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
152 int frame_words = frame_size_in_bytes / wordSize;
153 *total_frame_words = frame_words;
154
155 assert(FPUStateSizeInWords == 27, "update stack layout");
156
157 // save registers, fpu state, and flags
158 // We assume caller has already has return address slot on the stack
159 // We push epb twice in this sequence because we want the real rbp,
160 // to be under the return like a normal enter and we want to use pusha
161 // We push by hand instead of using push.
162 __ enter();
163 __ pusha();
164 __ pushf();
165 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
166 __ push_FPU_state(); // Save FPU state & init
167
168 if (verify_fpu) {
169 // Some stubs may have non standard FPU control word settings so
170 // only check and reset the value when it required to be the
171 // standard value. The safepoint blob in particular can be used
172 // in methods which are using the 24 bit control word for
173 // optimized float math.
174
175 #ifdef ASSERT
176 // Make sure the control word has the expected value
177 Label ok;
178 __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
179 __ jccb(Assembler::equal, ok);
180 __ stop("corrupted control word detected");
181 __ bind(ok);
182 #endif
183
184 // Reset the control word to guard against exceptions being unmasked
185 // since fstp_d can cause FPU stack underflow exceptions. Write it
186 // into the on stack copy and then reload that to make sure that the
187 // current and future values are correct.
188 __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
189 }
190
191 __ frstor(Address(rsp, 0));
192 if (!verify_fpu) {
193 // Set the control word so that exceptions are masked for the
194 // following code.
195 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
196 }
197
198 int off = st0_off;
199 int delta = st1_off - off;
200
201 // Save the FPU registers in de-opt-able form
202 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
203 __ fstp_d(Address(rsp, off*wordSize));
204 off += delta;
205 }
206
207 off = xmm0_off;
208 delta = xmm1_off - off;
209 if(UseSSE == 1) {
210 // Save the XMM state
211 for (int n = 0; n < num_xmm_regs; n++) {
212 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
213 off += delta;
214 }
215 } else if(UseSSE >= 2) {
216 // Save whole 128bit (16 bytes) XMM registers
217 for (int n = 0; n < num_xmm_regs; n++) {
218 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
219 off += delta;
220 }
221 }
222
223 #ifdef COMPILER2
224 if (save_vectors) {
225 __ subptr(rsp, ymm_bytes);
226 // Save upper half of YMM registers
227 for (int n = 0; n < num_xmm_regs; n++) {
228 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
229 }
230 if (UseAVX > 2) {
231 __ subptr(rsp, zmm_bytes);
232 // Save upper half of ZMM registers
233 for (int n = 0; n < num_xmm_regs; n++) {
234 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
235 }
236 __ subptr(rsp, opmask_state_bytes);
237 // Save opmask registers
238 for (int n = 0; n < KRegister::number_of_registers; n++) {
239 __ kmov(Address(rsp, n*8), as_KRegister(n));
240 }
241 }
242 }
243 #else
244 assert(!save_vectors, "vectors are generated only by C2");
245 #endif
246
247 __ vzeroupper();
248
249 // Set an oopmap for the call site. This oopmap will map all
250 // oop-registers and debug-info registers as callee-saved. This
251 // will allow deoptimization at this safepoint to find all possible
252 // debug-info recordings, as well as let GC find all oops.
253
254 OopMapSet *oop_maps = new OopMapSet();
255 OopMap* map = new OopMap( frame_words, 0 );
256
257 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
258 #define NEXTREG(x) (x)->as_VMReg()->next()
259
260 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
261 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
262 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
263 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
264 // rbp, location is known implicitly, no oopMap
265 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
266 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
267
268 // %%% This is really a waste but we'll keep things as they were for now for the upper component
269 off = st0_off;
270 delta = st1_off - off;
271 for (int n = 0; n < FloatRegister::number_of_registers; n++) {
272 FloatRegister freg_name = as_FloatRegister(n);
273 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
274 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
275 off += delta;
276 }
277 off = xmm0_off;
278 delta = xmm1_off - off;
279 for (int n = 0; n < num_xmm_regs; n++) {
280 XMMRegister xmm_name = as_XMMRegister(n);
281 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
282 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
283 off += delta;
284 }
285 #undef NEXTREG
286 #undef STACK_OFFSET
287
288 return map;
289 }
290
291 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
292 int opmask_state_bytes = 0;
293 int additional_frame_bytes = 0;
294 int num_xmm_regs = XMMRegister::number_of_registers;
295 int ymm_bytes = num_xmm_regs * 16;
296 int zmm_bytes = num_xmm_regs * 32;
297 // Recover XMM & FPU state
298 #ifdef COMPILER2
299 if (restore_vectors) {
300 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
301 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
302 // Save upper half of YMM registers
303 additional_frame_bytes = ymm_bytes;
304 if (UseAVX > 2) {
305 // Save upper half of ZMM registers as well
306 additional_frame_bytes += zmm_bytes;
307 opmask_state_bytes = KRegister::number_of_registers * 8;
308 additional_frame_bytes += opmask_state_bytes;
309 }
310 }
311 #else
312 assert(!restore_vectors, "vectors are generated only by C2");
313 #endif
314
315 int off = xmm0_off;
316 int delta = xmm1_off - off;
317
318 __ vzeroupper();
319
320 if (UseSSE == 1) {
321 // Restore XMM registers
322 assert(additional_frame_bytes == 0, "");
323 for (int n = 0; n < num_xmm_regs; n++) {
324 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
325 off += delta;
326 }
327 } else if (UseSSE >= 2) {
328 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
329 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
330 for (int n = 0; n < num_xmm_regs; n++) {
331 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
332 off += delta;
333 }
334 }
335
336 if (restore_vectors) {
337 off = additional_frame_bytes - ymm_bytes;
338 // Restore upper half of YMM registers.
339 for (int n = 0; n < num_xmm_regs; n++) {
340 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
341 }
342 if (UseAVX > 2) {
343 // Restore upper half of ZMM registers.
344 off = opmask_state_bytes;
345 for (int n = 0; n < num_xmm_regs; n++) {
346 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
347 }
348 for (int n = 0; n < KRegister::number_of_registers; n++) {
349 __ kmov(as_KRegister(n), Address(rsp, n*8));
350 }
351 }
352 __ addptr(rsp, additional_frame_bytes);
353 }
354
355 __ pop_FPU_state();
356 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
357
358 __ popf();
359 __ popa();
360 // Get the rbp, described implicitly by the frame sender code (no oopMap)
361 __ pop(rbp);
362 }
363
364 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
365
366 // Just restore result register. Only used by deoptimization. By
367 // now any callee save register that needs to be restore to a c2
368 // caller of the deoptee has been extracted into the vframeArray
369 // and will be stuffed into the c2i adapter we create for later
370 // restoration so only result registers need to be restored here.
371 //
372
373 __ frstor(Address(rsp, 0)); // Restore fpu state
374
375 // Recover XMM & FPU state
376 if( UseSSE == 1 ) {
377 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
378 } else if( UseSSE >= 2 ) {
379 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
380 }
381 __ movptr(rax, Address(rsp, rax_off*wordSize));
382 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
383 // Pop all of the register save are off the stack except the return address
384 __ addptr(rsp, return_off * wordSize);
385 }
386
387 // Is vector's size (in bytes) bigger than a size saved by default?
388 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
389 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
390 bool SharedRuntime::is_wide_vector(int size) {
391 return size > 16;
392 }
393
394 // The java_calling_convention describes stack locations as ideal slots on
395 // a frame with no abi restrictions. Since we must observe abi restrictions
396 // (like the placement of the register window) the slots must be biased by
397 // the following value.
398 static int reg2offset_in(VMReg r) {
399 // Account for saved rbp, and return address
400 // This should really be in_preserve_stack_slots
401 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
402 }
403
404 static int reg2offset_out(VMReg r) {
405 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
406 }
407
408 // ---------------------------------------------------------------------------
409 // Read the array of BasicTypes from a signature, and compute where the
410 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
411 // quantities. Values less than SharedInfo::stack0 are registers, those above
412 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
413 // as framesizes are fixed.
414 // VMRegImpl::stack0 refers to the first slot 0(sp).
415 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
416 // Register up to Register::number_of_registers are the 32-bit
417 // integer registers.
418
419 // Pass first two oop/int args in registers ECX and EDX.
420 // Pass first two float/double args in registers XMM0 and XMM1.
421 // Doubles have precedence, so if you pass a mix of floats and doubles
422 // the doubles will grab the registers before the floats will.
423
424 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
425 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
426 // units regardless of build. Of course for i486 there is no 64 bit build
427
428
429 // ---------------------------------------------------------------------------
430 // The compiled Java calling convention.
431 // Pass first two oop/int args in registers ECX and EDX.
432 // Pass first two float/double args in registers XMM0 and XMM1.
433 // Doubles have precedence, so if you pass a mix of floats and doubles
434 // the doubles will grab the registers before the floats will.
435 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
436 VMRegPair *regs,
437 int total_args_passed) {
438 uint stack = 0; // Starting stack position for args on stack
439
440
441 // Pass first two oop/int args in registers ECX and EDX.
442 uint reg_arg0 = 9999;
443 uint reg_arg1 = 9999;
444
445 // Pass first two float/double args in registers XMM0 and XMM1.
446 // Doubles have precedence, so if you pass a mix of floats and doubles
447 // the doubles will grab the registers before the floats will.
448 // CNC - TURNED OFF FOR non-SSE.
449 // On Intel we have to round all doubles (and most floats) at
450 // call sites by storing to the stack in any case.
451 // UseSSE=0 ==> Don't Use ==> 9999+0
452 // UseSSE=1 ==> Floats only ==> 9999+1
453 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
454 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
455 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
456 uint freg_arg0 = 9999+fargs;
457 uint freg_arg1 = 9999+fargs;
458
459 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
460 int i;
461 for( i = 0; i < total_args_passed; i++) {
462 if( sig_bt[i] == T_DOUBLE ) {
463 // first 2 doubles go in registers
464 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
465 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
466 else // Else double is passed low on the stack to be aligned.
467 stack += 2;
468 } else if( sig_bt[i] == T_LONG ) {
469 stack += 2;
470 }
471 }
472 int dstack = 0; // Separate counter for placing doubles
473
474 // Now pick where all else goes.
475 for( i = 0; i < total_args_passed; i++) {
476 // From the type and the argument number (count) compute the location
477 switch( sig_bt[i] ) {
478 case T_SHORT:
479 case T_CHAR:
480 case T_BYTE:
481 case T_BOOLEAN:
482 case T_INT:
483 case T_ARRAY:
484 case T_OBJECT:
485 case T_ADDRESS:
486 if( reg_arg0 == 9999 ) {
487 reg_arg0 = i;
488 regs[i].set1(rcx->as_VMReg());
489 } else if( reg_arg1 == 9999 ) {
490 reg_arg1 = i;
491 regs[i].set1(rdx->as_VMReg());
492 } else {
493 regs[i].set1(VMRegImpl::stack2reg(stack++));
494 }
495 break;
496 case T_FLOAT:
497 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
498 freg_arg0 = i;
499 regs[i].set1(xmm0->as_VMReg());
500 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
501 freg_arg1 = i;
502 regs[i].set1(xmm1->as_VMReg());
503 } else {
504 regs[i].set1(VMRegImpl::stack2reg(stack++));
505 }
506 break;
507 case T_LONG:
508 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
509 regs[i].set2(VMRegImpl::stack2reg(dstack));
510 dstack += 2;
511 break;
512 case T_DOUBLE:
513 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
514 if( freg_arg0 == (uint)i ) {
515 regs[i].set2(xmm0->as_VMReg());
516 } else if( freg_arg1 == (uint)i ) {
517 regs[i].set2(xmm1->as_VMReg());
518 } else {
519 regs[i].set2(VMRegImpl::stack2reg(dstack));
520 dstack += 2;
521 }
522 break;
523 case T_VOID: regs[i].set_bad(); break;
524 break;
525 default:
526 ShouldNotReachHere();
527 break;
528 }
529 }
530
531 // return value can be odd number of VMRegImpl stack slots make multiple of 2
532 return align_up(stack, 2);
533 }
534
535 const uint SharedRuntime::java_return_convention_max_int = 1;
536 const uint SharedRuntime::java_return_convention_max_float = 1;
537 int SharedRuntime::java_return_convention(const BasicType *sig_bt,
538 VMRegPair *regs,
539 int total_args_passed) {
540 Unimplemented();
541 return 0;
542 }
543
544 // Patch the callers callsite with entry to compiled code if it exists.
545 static void patch_callers_callsite(MacroAssembler *masm) {
546 Label L;
547 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
548 __ jcc(Assembler::equal, L);
549 // Schedule the branch target address early.
550 // Call into the VM to patch the caller, then jump to compiled callee
551 // rax, isn't live so capture return address while we easily can
552 __ movptr(rax, Address(rsp, 0));
553 __ pusha();
554 __ pushf();
555
556 if (UseSSE == 1) {
557 __ subptr(rsp, 2*wordSize);
558 __ movflt(Address(rsp, 0), xmm0);
559 __ movflt(Address(rsp, wordSize), xmm1);
560 }
561 if (UseSSE >= 2) {
562 __ subptr(rsp, 4*wordSize);
563 __ movdbl(Address(rsp, 0), xmm0);
564 __ movdbl(Address(rsp, 2*wordSize), xmm1);
565 }
566 #ifdef COMPILER2
567 // C2 may leave the stack dirty if not in SSE2+ mode
568 if (UseSSE >= 2) {
569 __ verify_FPU(0, "c2i transition should have clean FPU stack");
570 } else {
571 __ empty_FPU_stack();
572 }
573 #endif /* COMPILER2 */
574
575 // VM needs caller's callsite
576 __ push(rax);
577 // VM needs target method
578 __ push(rbx);
579 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
580 __ addptr(rsp, 2*wordSize);
581
582 if (UseSSE == 1) {
583 __ movflt(xmm0, Address(rsp, 0));
584 __ movflt(xmm1, Address(rsp, wordSize));
585 __ addptr(rsp, 2*wordSize);
586 }
587 if (UseSSE >= 2) {
588 __ movdbl(xmm0, Address(rsp, 0));
589 __ movdbl(xmm1, Address(rsp, 2*wordSize));
590 __ addptr(rsp, 4*wordSize);
591 }
592
593 __ popf();
594 __ popa();
595 __ bind(L);
596 }
597
598
599 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
600 int next_off = st_off - Interpreter::stackElementSize;
601 __ movdbl(Address(rsp, next_off), r);
602 }
603
604 static void gen_c2i_adapter(MacroAssembler *masm,
605 const GrowableArray<SigEntry>& sig_extended,
606 const VMRegPair *regs,
607 Label& skip_fixup,
608 address start,
609 OopMapSet*& oop_maps,
610 int& frame_complete,
611 int& frame_size_in_words) {
612 // Before we get into the guts of the C2I adapter, see if we should be here
613 // at all. We've come from compiled code and are attempting to jump to the
614 // interpreter, which means the caller made a static call to get here
615 // (vcalls always get a compiled target if there is one). Check for a
616 // compiled target. If there is one, we need to patch the caller's call.
617 patch_callers_callsite(masm);
618
619 __ bind(skip_fixup);
620
621 #ifdef COMPILER2
622 // C2 may leave the stack dirty if not in SSE2+ mode
623 if (UseSSE >= 2) {
624 __ verify_FPU(0, "c2i transition should have clean FPU stack");
625 } else {
626 __ empty_FPU_stack();
627 }
628 #endif /* COMPILER2 */
629
630 // Since all args are passed on the stack, total_args_passed * interpreter_
631 // stack_element_size is the
632 // space we need.
633 int extraspace = sig_extended.length() * Interpreter::stackElementSize;
634
635 // Get return address
636 __ pop(rax);
637
638 // set senderSP value
639 __ movptr(rsi, rsp);
640
641 __ subptr(rsp, extraspace);
642
643 // Now write the args into the outgoing interpreter space
644 for (int i = 0; i < sig_extended.length(); i++) {
645 if (sig_extended.at(i)._bt == T_VOID) {
646 assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
647 continue;
648 }
649
650 // st_off points to lowest address on stack.
651 int st_off = ((sig_extended.length() - 1) - i) * Interpreter::stackElementSize;
652 int next_off = st_off - Interpreter::stackElementSize;
653
654 // Say 4 args:
655 // i st_off
656 // 0 12 T_LONG
657 // 1 8 T_VOID
658 // 2 4 T_OBJECT
659 // 3 0 T_BOOL
660 VMReg r_1 = regs[i].first();
661 VMReg r_2 = regs[i].second();
662 if (!r_1->is_valid()) {
663 assert(!r_2->is_valid(), "");
664 continue;
665 }
666
667 if (r_1->is_stack()) {
668 // memory to memory use fpu stack top
669 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
670
671 if (!r_2->is_valid()) {
672 __ movl(rdi, Address(rsp, ld_off));
673 __ movptr(Address(rsp, st_off), rdi);
674 } else {
675
676 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
677 // st_off == MSW, st_off-wordSize == LSW
678
679 __ movptr(rdi, Address(rsp, ld_off));
680 __ movptr(Address(rsp, next_off), rdi);
681 __ movptr(rdi, Address(rsp, ld_off + wordSize));
682 __ movptr(Address(rsp, st_off), rdi);
683 }
684 } else if (r_1->is_Register()) {
685 Register r = r_1->as_Register();
686 if (!r_2->is_valid()) {
687 __ movl(Address(rsp, st_off), r);
688 } else {
689 // long/double in gpr
690 ShouldNotReachHere();
691 }
692 } else {
693 assert(r_1->is_XMMRegister(), "");
694 if (!r_2->is_valid()) {
695 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
696 } else {
697 assert(sig_extended.at(i)._bt == T_DOUBLE || sig_extended.at(i)._bt == T_LONG, "wrong type");
698 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
699 }
700 }
701 }
702
703 // Schedule the branch target address early.
704 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
705 // And repush original return address
706 __ push(rax);
707 __ jmp(rcx);
708 }
709
710
711 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
712 int next_val_off = ld_off - Interpreter::stackElementSize;
713 __ movdbl(r, Address(saved_sp, next_val_off));
714 }
715
716 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
717 address code_start, address code_end,
718 Label& L_ok) {
719 Label L_fail;
720 __ lea(temp_reg, ExternalAddress(code_start));
721 __ cmpptr(pc_reg, temp_reg);
722 __ jcc(Assembler::belowEqual, L_fail);
723 __ lea(temp_reg, ExternalAddress(code_end));
724 __ cmpptr(pc_reg, temp_reg);
725 __ jcc(Assembler::below, L_ok);
726 __ bind(L_fail);
727 }
728
729 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
730 int comp_args_on_stack,
731 const GrowableArray<SigEntry>& sig_extended,
732 const VMRegPair *regs) {
733
734 // Note: rsi contains the senderSP on entry. We must preserve it since
735 // we may do a i2c -> c2i transition if we lose a race where compiled
736 // code goes non-entrant while we get args ready.
737
738 // Adapters can be frameless because they do not require the caller
739 // to perform additional cleanup work, such as correcting the stack pointer.
740 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
741 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
742 // even if a callee has modified the stack pointer.
743 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
744 // routinely repairs its caller's stack pointer (from sender_sp, which is set
745 // up via the senderSP register).
746 // In other words, if *either* the caller or callee is interpreted, we can
747 // get the stack pointer repaired after a call.
748 // This is why c2i and i2c adapters cannot be indefinitely composed.
749 // In particular, if a c2i adapter were to somehow call an i2c adapter,
750 // both caller and callee would be compiled methods, and neither would
751 // clean up the stack pointer changes performed by the two adapters.
752 // If this happens, control eventually transfers back to the compiled
753 // caller, but with an uncorrected stack, causing delayed havoc.
754
755 // Pick up the return address
756 __ movptr(rax, Address(rsp, 0));
757
758 if (VerifyAdapterCalls &&
759 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) {
760 // So, let's test for cascading c2i/i2c adapters right now.
761 // assert(Interpreter::contains($return_addr) ||
762 // StubRoutines::contains($return_addr),
763 // "i2c adapter must return to an interpreter frame");
764 __ block_comment("verify_i2c { ");
765 Label L_ok;
766 if (Interpreter::code() != nullptr) {
767 range_check(masm, rax, rdi,
768 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
769 L_ok);
770 }
771 if (StubRoutines::initial_stubs_code() != nullptr) {
772 range_check(masm, rax, rdi,
773 StubRoutines::initial_stubs_code()->code_begin(),
774 StubRoutines::initial_stubs_code()->code_end(),
775 L_ok);
776 }
777 if (StubRoutines::final_stubs_code() != nullptr) {
778 range_check(masm, rax, rdi,
779 StubRoutines::final_stubs_code()->code_begin(),
780 StubRoutines::final_stubs_code()->code_end(),
781 L_ok);
782 }
783 const char* msg = "i2c adapter must return to an interpreter frame";
784 __ block_comment(msg);
785 __ stop(msg);
786 __ bind(L_ok);
787 __ block_comment("} verify_i2ce ");
788 }
789
790 // Must preserve original SP for loading incoming arguments because
791 // we need to align the outgoing SP for compiled code.
792 __ movptr(rdi, rsp);
793
794 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
795 // in registers, we will occasionally have no stack args.
796 int comp_words_on_stack = 0;
797 if (comp_args_on_stack) {
798 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
799 // registers are below. By subtracting stack0, we either get a negative
800 // number (all values in registers) or the maximum stack slot accessed.
801 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
802 // Convert 4-byte stack slots to words.
803 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
804 // Round up to miminum stack alignment, in wordSize
805 comp_words_on_stack = align_up(comp_words_on_stack, 2);
806 __ subptr(rsp, comp_words_on_stack * wordSize);
807 }
808
809 // Align the outgoing SP
810 __ andptr(rsp, -(StackAlignmentInBytes));
811
812 // push the return address on the stack (note that pushing, rather
813 // than storing it, yields the correct frame alignment for the callee)
814 __ push(rax);
815
816 // Put saved SP in another register
817 const Register saved_sp = rax;
818 __ movptr(saved_sp, rdi);
819
820
821 // Will jump to the compiled code just as if compiled code was doing it.
822 // Pre-load the register-jump target early, to schedule it better.
823 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
824
825 // Now generate the shuffle code. Pick up all register args and move the
826 // rest through the floating point stack top.
827 for (int i = 0; i < sig_extended.length(); i++) {
828 if (sig_extended.at(i)._bt == T_VOID) {
829 // Longs and doubles are passed in native word order, but misaligned
830 // in the 32-bit build.
831 assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
832 continue;
833 }
834
835 // Pick up 0, 1 or 2 words from SP+offset.
836
837 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
838 "scrambled load targets?");
839 // Load in argument order going down.
840 int ld_off = (sig_extended.length() - i) * Interpreter::stackElementSize;
841 // Point to interpreter value (vs. tag)
842 int next_off = ld_off - Interpreter::stackElementSize;
843 //
844 //
845 //
846 VMReg r_1 = regs[i].first();
847 VMReg r_2 = regs[i].second();
848 if (!r_1->is_valid()) {
849 assert(!r_2->is_valid(), "");
850 continue;
851 }
852 if (r_1->is_stack()) {
853 // Convert stack slot to an SP offset (+ wordSize to account for return address )
854 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
855
856 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
857 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
858 // we be generated.
859 if (!r_2->is_valid()) {
860 // __ fld_s(Address(saved_sp, ld_off));
861 // __ fstp_s(Address(rsp, st_off));
862 __ movl(rsi, Address(saved_sp, ld_off));
863 __ movptr(Address(rsp, st_off), rsi);
864 } else {
865 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
866 // are accessed as negative so LSW is at LOW address
867
868 // ld_off is MSW so get LSW
869 // st_off is LSW (i.e. reg.first())
870 // __ fld_d(Address(saved_sp, next_off));
871 // __ fstp_d(Address(rsp, st_off));
872 //
873 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
874 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
875 // So we must adjust where to pick up the data to match the interpreter.
876 //
877 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
878 // are accessed as negative so LSW is at LOW address
879
880 // ld_off is MSW so get LSW
881 __ movptr(rsi, Address(saved_sp, next_off));
882 __ movptr(Address(rsp, st_off), rsi);
883 __ movptr(rsi, Address(saved_sp, ld_off));
884 __ movptr(Address(rsp, st_off + wordSize), rsi);
885 }
886 } else if (r_1->is_Register()) { // Register argument
887 Register r = r_1->as_Register();
888 assert(r != rax, "must be different");
889 if (r_2->is_valid()) {
890 //
891 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
892 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
893 // So we must adjust where to pick up the data to match the interpreter.
894
895 // this can be a misaligned move
896 __ movptr(r, Address(saved_sp, next_off));
897 assert(r_2->as_Register() != rax, "need another temporary register");
898 // Remember r_1 is low address (and LSB on x86)
899 // So r_2 gets loaded from high address regardless of the platform
900 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
901 } else {
902 __ movl(r, Address(saved_sp, ld_off));
903 }
904 } else {
905 assert(r_1->is_XMMRegister(), "");
906 if (!r_2->is_valid()) {
907 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
908 } else {
909 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
910 }
911 }
912 }
913
914 // 6243940 We might end up in handle_wrong_method if
915 // the callee is deoptimized as we race thru here. If that
916 // happens we don't want to take a safepoint because the
917 // caller frame will look interpreted and arguments are now
918 // "compiled" so it is much better to make this transition
919 // invisible to the stack walking code. Unfortunately if
920 // we try and find the callee by normal means a safepoint
921 // is possible. So we stash the desired callee in the thread
922 // and the vm will find there should this case occur.
923
924 __ get_thread(rax);
925 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
926
927 // move Method* to rax, in case we end up in an c2i adapter.
928 // the c2i adapters expect Method* in rax, (c2) because c2's
929 // resolve stubs return the result (the method) in rax,.
930 // I'd love to fix this.
931 __ mov(rax, rbx);
932
933 __ jmp(rdi);
934 }
935
936 // ---------------------------------------------------------------
937 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
938 int comp_args_on_stack,
939 const GrowableArray<SigEntry>& sig_extended,
940 const VMRegPair *regs,
941 AdapterFingerPrint* fingerprint,
942 AdapterBlob*& new_adapter) {
943 address i2c_entry = __ pc();
944
945 gen_i2c_adapter(masm, comp_args_on_stack, sig_extended, regs);
946
947 // -------------------------------------------------------------------------
948 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
949 // to the interpreter. The args start out packed in the compiled layout. They
950 // need to be unpacked into the interpreter layout. This will almost always
951 // require some stack space. We grow the current (compiled) stack, then repack
952 // the args. We finally end in a jump to the generic interpreter entry point.
953 // On exit from the interpreter, the interpreter will restore our SP (lest the
954 // compiled code, which relies solely on SP and not EBP, get sick).
955
956 address c2i_unverified_entry = __ pc();
957 Label skip_fixup;
958
959 Register holder = rax;
960 Register receiver = rcx;
961 Register temp = rbx;
962
963 {
964
965 Label missed;
966 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
967 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
968 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
969 __ jcc(Assembler::notEqual, missed);
970 // Method might have been compiled since the call site was patched to
971 // interpreted if that is the case treat it as a miss so we can get
972 // the call site corrected.
973 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), NULL_WORD);
974 __ jcc(Assembler::equal, skip_fixup);
975
976 __ bind(missed);
977 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
978 }
979
980 address c2i_entry = __ pc();
981
982 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
983 bs->c2i_entry_barrier(masm);
984
985 OopMapSet* oop_maps = nullptr;
986 int frame_complete = CodeOffsets::frame_never_safe;
987 int frame_size_in_words = 0;
988 gen_c2i_adapter(masm, sig_extended, regs, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words);
989
990 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps);
991 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
992 }
993
994 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
995 VMRegPair *regs,
996 int total_args_passed) {
997
998 // We return the amount of VMRegImpl stack slots we need to reserve for all
999 // the arguments NOT counting out_preserve_stack_slots.
1000
1001 uint stack = 0; // All arguments on stack
1002
1003 for( int i = 0; i < total_args_passed; i++) {
1004 // From the type and the argument number (count) compute the location
1005 switch( sig_bt[i] ) {
1006 case T_BOOLEAN:
1007 case T_CHAR:
1008 case T_FLOAT:
1009 case T_BYTE:
1010 case T_SHORT:
1011 case T_INT:
1012 case T_OBJECT:
1013 case T_ARRAY:
1014 case T_ADDRESS:
1015 case T_METADATA:
1016 regs[i].set1(VMRegImpl::stack2reg(stack++));
1017 break;
1018 case T_LONG:
1019 case T_DOUBLE: // The stack numbering is reversed from Java
1020 // Since C arguments do not get reversed, the ordering for
1021 // doubles on the stack must be opposite the Java convention
1022 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1023 regs[i].set2(VMRegImpl::stack2reg(stack));
1024 stack += 2;
1025 break;
1026 case T_VOID: regs[i].set_bad(); break;
1027 default:
1028 ShouldNotReachHere();
1029 break;
1030 }
1031 }
1032 return stack;
1033 }
1034
1035 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1036 uint num_bits,
1037 uint total_args_passed) {
1038 Unimplemented();
1039 return 0;
1040 }
1041
1042 // A simple move of integer like type
1043 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1044 if (src.first()->is_stack()) {
1045 if (dst.first()->is_stack()) {
1046 // stack to stack
1047 // __ ld(FP, reg2offset(src.first()), L5);
1048 // __ st(L5, SP, reg2offset(dst.first()));
1049 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1050 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1051 } else {
1052 // stack to reg
1053 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1054 }
1055 } else if (dst.first()->is_stack()) {
1056 // reg to stack
1057 // no need to sign extend on 64bit
1058 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1059 } else {
1060 if (dst.first() != src.first()) {
1061 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1062 }
1063 }
1064 }
1065
1066 // An oop arg. Must pass a handle not the oop itself
1067 static void object_move(MacroAssembler* masm,
1068 OopMap* map,
1069 int oop_handle_offset,
1070 int framesize_in_slots,
1071 VMRegPair src,
1072 VMRegPair dst,
1073 bool is_receiver,
1074 int* receiver_offset) {
1075
1076 // Because of the calling conventions we know that src can be a
1077 // register or a stack location. dst can only be a stack location.
1078
1079 assert(dst.first()->is_stack(), "must be stack");
1080 // must pass a handle. First figure out the location we use as a handle
1081
1082 if (src.first()->is_stack()) {
1083 // Oop is already on the stack as an argument
1084 Register rHandle = rax;
1085 Label nil;
1086 __ xorptr(rHandle, rHandle);
1087 __ cmpptr(Address(rbp, reg2offset_in(src.first())), NULL_WORD);
1088 __ jcc(Assembler::equal, nil);
1089 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1090 __ bind(nil);
1091 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1092
1093 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1094 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1095 if (is_receiver) {
1096 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1097 }
1098 } else {
1099 // Oop is in a register we must store it to the space we reserve
1100 // on the stack for oop_handles
1101 const Register rOop = src.first()->as_Register();
1102 const Register rHandle = rax;
1103 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1104 int offset = oop_slot*VMRegImpl::stack_slot_size;
1105 Label skip;
1106 __ movptr(Address(rsp, offset), rOop);
1107 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1108 __ xorptr(rHandle, rHandle);
1109 __ cmpptr(rOop, NULL_WORD);
1110 __ jcc(Assembler::equal, skip);
1111 __ lea(rHandle, Address(rsp, offset));
1112 __ bind(skip);
1113 // Store the handle parameter
1114 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1115 if (is_receiver) {
1116 *receiver_offset = offset;
1117 }
1118 }
1119 }
1120
1121 // A float arg may have to do float reg int reg conversion
1122 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1123 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1124
1125 // Because of the calling convention we know that src is either a stack location
1126 // or an xmm register. dst can only be a stack location.
1127
1128 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1129
1130 if (src.first()->is_stack()) {
1131 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1132 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1133 } else {
1134 // reg to stack
1135 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1136 }
1137 }
1138
1139 // A long move
1140 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1141
1142 // The only legal possibility for a long_move VMRegPair is:
1143 // 1: two stack slots (possibly unaligned)
1144 // as neither the java or C calling convention will use registers
1145 // for longs.
1146
1147 if (src.first()->is_stack() && dst.first()->is_stack()) {
1148 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1149 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1150 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1151 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1152 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1153 } else {
1154 ShouldNotReachHere();
1155 }
1156 }
1157
1158 // A double move
1159 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1160
1161 // The only legal possibilities for a double_move VMRegPair are:
1162 // The painful thing here is that like long_move a VMRegPair might be
1163
1164 // Because of the calling convention we know that src is either
1165 // 1: a single physical register (xmm registers only)
1166 // 2: two stack slots (possibly unaligned)
1167 // dst can only be a pair of stack slots.
1168
1169 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1170
1171 if (src.first()->is_stack()) {
1172 // source is all stack
1173 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1174 __ movptr(rbx, Address(rbp, reg2offset_in(src.second())));
1175 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1176 __ movptr(Address(rsp, reg2offset_out(dst.second())), rbx);
1177 } else {
1178 // reg to stack
1179 // No worries about stack alignment
1180 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1181 }
1182 }
1183
1184
1185 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1186 // We always ignore the frame_slots arg and just use the space just below frame pointer
1187 // which by this time is free to use
1188 switch (ret_type) {
1189 case T_FLOAT:
1190 __ fstp_s(Address(rbp, -wordSize));
1191 break;
1192 case T_DOUBLE:
1193 __ fstp_d(Address(rbp, -2*wordSize));
1194 break;
1195 case T_VOID: break;
1196 case T_LONG:
1197 __ movptr(Address(rbp, -wordSize), rax);
1198 __ movptr(Address(rbp, -2*wordSize), rdx);
1199 break;
1200 default: {
1201 __ movptr(Address(rbp, -wordSize), rax);
1202 }
1203 }
1204 }
1205
1206 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1207 // We always ignore the frame_slots arg and just use the space just below frame pointer
1208 // which by this time is free to use
1209 switch (ret_type) {
1210 case T_FLOAT:
1211 __ fld_s(Address(rbp, -wordSize));
1212 break;
1213 case T_DOUBLE:
1214 __ fld_d(Address(rbp, -2*wordSize));
1215 break;
1216 case T_LONG:
1217 __ movptr(rax, Address(rbp, -wordSize));
1218 __ movptr(rdx, Address(rbp, -2*wordSize));
1219 break;
1220 case T_VOID: break;
1221 default: {
1222 __ movptr(rax, Address(rbp, -wordSize));
1223 }
1224 }
1225 }
1226
1227 static void verify_oop_args(MacroAssembler* masm,
1228 const methodHandle& method,
1229 const BasicType* sig_bt,
1230 const VMRegPair* regs) {
1231 Register temp_reg = rbx; // not part of any compiled calling seq
1232 if (VerifyOops) {
1233 for (int i = 0; i < method->size_of_parameters(); i++) {
1234 if (is_reference_type(sig_bt[i])) {
1235 VMReg r = regs[i].first();
1236 assert(r->is_valid(), "bad oop arg");
1237 if (r->is_stack()) {
1238 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1239 __ verify_oop(temp_reg);
1240 } else {
1241 __ verify_oop(r->as_Register());
1242 }
1243 }
1244 }
1245 }
1246 }
1247
1248 static void gen_special_dispatch(MacroAssembler* masm,
1249 const methodHandle& method,
1250 const BasicType* sig_bt,
1251 const VMRegPair* regs) {
1252 verify_oop_args(masm, method, sig_bt, regs);
1253 vmIntrinsics::ID iid = method->intrinsic_id();
1254
1255 // Now write the args into the outgoing interpreter space
1256 bool has_receiver = false;
1257 Register receiver_reg = noreg;
1258 int member_arg_pos = -1;
1259 Register member_reg = noreg;
1260 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1261 if (ref_kind != 0) {
1262 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1263 member_reg = rbx; // known to be free at this point
1264 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1265 } else if (iid == vmIntrinsics::_invokeBasic) {
1266 has_receiver = true;
1267 } else {
1268 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1269 }
1270
1271 if (member_reg != noreg) {
1272 // Load the member_arg into register, if necessary.
1273 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1274 VMReg r = regs[member_arg_pos].first();
1275 if (r->is_stack()) {
1276 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1277 } else {
1278 // no data motion is needed
1279 member_reg = r->as_Register();
1280 }
1281 }
1282
1283 if (has_receiver) {
1284 // Make sure the receiver is loaded into a register.
1285 assert(method->size_of_parameters() > 0, "oob");
1286 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1287 VMReg r = regs[0].first();
1288 assert(r->is_valid(), "bad receiver arg");
1289 if (r->is_stack()) {
1290 // Porting note: This assumes that compiled calling conventions always
1291 // pass the receiver oop in a register. If this is not true on some
1292 // platform, pick a temp and load the receiver from stack.
1293 fatal("receiver always in a register");
1294 receiver_reg = rcx; // known to be free at this point
1295 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1296 } else {
1297 // no data motion is needed
1298 receiver_reg = r->as_Register();
1299 }
1300 }
1301
1302 // Figure out which address we are really jumping to:
1303 MethodHandles::generate_method_handle_dispatch(masm, iid,
1304 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1305 }
1306
1307 // ---------------------------------------------------------------------------
1308 // Generate a native wrapper for a given method. The method takes arguments
1309 // in the Java compiled code convention, marshals them to the native
1310 // convention (handlizes oops, etc), transitions to native, makes the call,
1311 // returns to java state (possibly blocking), unhandlizes any result and
1312 // returns.
1313 //
1314 // Critical native functions are a shorthand for the use of
1315 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1316 // functions. The wrapper is expected to unpack the arguments before
1317 // passing them to the callee. Critical native functions leave the state _in_Java,
1318 // since they cannot stop for GC.
1319 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1320 // block and the check for pending exceptions it's impossible for them
1321 // to be thrown.
1322 //
1323 //
1324 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1325 const methodHandle& method,
1326 int compile_id,
1327 BasicType* in_sig_bt,
1328 VMRegPair* in_regs,
1329 BasicType ret_type) {
1330 if (method->is_method_handle_intrinsic()) {
1331 vmIntrinsics::ID iid = method->intrinsic_id();
1332 intptr_t start = (intptr_t)__ pc();
1333 int vep_offset = ((intptr_t)__ pc()) - start;
1334 gen_special_dispatch(masm,
1335 method,
1336 in_sig_bt,
1337 in_regs);
1338 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1339 __ flush();
1340 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1341 return nmethod::new_native_nmethod(method,
1342 compile_id,
1343 masm->code(),
1344 vep_offset,
1345 frame_complete,
1346 stack_slots / VMRegImpl::slots_per_word,
1347 in_ByteSize(-1),
1348 in_ByteSize(-1),
1349 (OopMapSet*)nullptr);
1350 }
1351 address native_func = method->native_function();
1352 assert(native_func != nullptr, "must have function");
1353
1354 // An OopMap for lock (and class if static)
1355 OopMapSet *oop_maps = new OopMapSet();
1356
1357 // We have received a description of where all the java arg are located
1358 // on entry to the wrapper. We need to convert these args to where
1359 // the jni function will expect them. To figure out where they go
1360 // we convert the java signature to a C signature by inserting
1361 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1362
1363 const int total_in_args = method->size_of_parameters();
1364 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1365
1366 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1367 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1368 BasicType* in_elem_bt = nullptr;
1369
1370 int argc = 0;
1371 out_sig_bt[argc++] = T_ADDRESS;
1372 if (method->is_static()) {
1373 out_sig_bt[argc++] = T_OBJECT;
1374 }
1375
1376 for (int i = 0; i < total_in_args ; i++ ) {
1377 out_sig_bt[argc++] = in_sig_bt[i];
1378 }
1379
1380 // Now figure out where the args must be stored and how much stack space
1381 // they require.
1382 int out_arg_slots;
1383 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1384
1385 // Compute framesize for the wrapper. We need to handlize all oops in
1386 // registers a max of 2 on x86.
1387
1388 // Calculate the total number of stack slots we will need.
1389
1390 // First count the abi requirement plus all of the outgoing args
1391 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1392
1393 // Now the space for the inbound oop handle area
1394 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1395
1396 int oop_handle_offset = stack_slots;
1397 stack_slots += total_save_slots;
1398
1399 // Now any space we need for handlizing a klass if static method
1400
1401 int klass_slot_offset = 0;
1402 int klass_offset = -1;
1403 int lock_slot_offset = 0;
1404 bool is_static = false;
1405
1406 if (method->is_static()) {
1407 klass_slot_offset = stack_slots;
1408 stack_slots += VMRegImpl::slots_per_word;
1409 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1410 is_static = true;
1411 }
1412
1413 // Plus a lock if needed
1414
1415 if (method->is_synchronized()) {
1416 lock_slot_offset = stack_slots;
1417 stack_slots += VMRegImpl::slots_per_word;
1418 }
1419
1420 // Now a place (+2) to save return values or temp during shuffling
1421 // + 2 for return address (which we own) and saved rbp,
1422 stack_slots += 4;
1423
1424 // Ok The space we have allocated will look like:
1425 //
1426 //
1427 // FP-> | |
1428 // |---------------------|
1429 // | 2 slots for moves |
1430 // |---------------------|
1431 // | lock box (if sync) |
1432 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1433 // | klass (if static) |
1434 // |---------------------| <- klass_slot_offset
1435 // | oopHandle area |
1436 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1437 // | outbound memory |
1438 // | based arguments |
1439 // | |
1440 // |---------------------|
1441 // | |
1442 // SP-> | out_preserved_slots |
1443 //
1444 //
1445 // ****************************************************************************
1446 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1447 // arguments off of the stack after the jni call. Before the call we can use
1448 // instructions that are SP relative. After the jni call we switch to FP
1449 // relative instructions instead of re-adjusting the stack on windows.
1450 // ****************************************************************************
1451
1452
1453 // Now compute actual number of stack words we need rounding to make
1454 // stack properly aligned.
1455 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1456
1457 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1458
1459 intptr_t start = (intptr_t)__ pc();
1460
1461 // First thing make an ic check to see if we should even be here
1462
1463 // We are free to use all registers as temps without saving them and
1464 // restoring them except rbp. rbp is the only callee save register
1465 // as far as the interpreter and the compiler(s) are concerned.
1466
1467
1468 const Register ic_reg = rax;
1469 const Register receiver = rcx;
1470 Label hit;
1471 Label exception_pending;
1472
1473 __ verify_oop(receiver);
1474 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1475 __ jcc(Assembler::equal, hit);
1476
1477 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1478
1479 // verified entry must be aligned for code patching.
1480 // and the first 5 bytes must be in the same cache line
1481 // if we align at 8 then we will be sure 5 bytes are in the same line
1482 __ align(8);
1483
1484 __ bind(hit);
1485
1486 int vep_offset = ((intptr_t)__ pc()) - start;
1487
1488 #ifdef COMPILER1
1489 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1490 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1491 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1492 }
1493 #endif // COMPILER1
1494
1495 // The instruction at the verified entry point must be 5 bytes or longer
1496 // because it can be patched on the fly by make_non_entrant. The stack bang
1497 // instruction fits that requirement.
1498
1499 // Generate stack overflow check
1500 __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1501
1502 // Generate a new frame for the wrapper.
1503 __ enter();
1504 // -2 because return address is already present and so is saved rbp
1505 __ subptr(rsp, stack_size - 2*wordSize);
1506
1507
1508 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1509 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */);
1510
1511 // Frame is now completed as far as size and linkage.
1512 int frame_complete = ((intptr_t)__ pc()) - start;
1513
1514 if (UseRTMLocking) {
1515 // Abort RTM transaction before calling JNI
1516 // because critical section will be large and will be
1517 // aborted anyway. Also nmethod could be deoptimized.
1518 __ xabort(0);
1519 }
1520
1521 // Calculate the difference between rsp and rbp,. We need to know it
1522 // after the native call because on windows Java Natives will pop
1523 // the arguments and it is painful to do rsp relative addressing
1524 // in a platform independent way. So after the call we switch to
1525 // rbp, relative addressing.
1526
1527 int fp_adjustment = stack_size - 2*wordSize;
1528
1529 #ifdef COMPILER2
1530 // C2 may leave the stack dirty if not in SSE2+ mode
1531 if (UseSSE >= 2) {
1532 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1533 } else {
1534 __ empty_FPU_stack();
1535 }
1536 #endif /* COMPILER2 */
1537
1538 // Compute the rbp, offset for any slots used after the jni call
1539
1540 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1541
1542 // We use rdi as a thread pointer because it is callee save and
1543 // if we load it once it is usable thru the entire wrapper
1544 const Register thread = rdi;
1545
1546 // We use rsi as the oop handle for the receiver/klass
1547 // It is callee save so it survives the call to native
1548
1549 const Register oop_handle_reg = rsi;
1550
1551 __ get_thread(thread);
1552
1553 //
1554 // We immediately shuffle the arguments so that any vm call we have to
1555 // make from here on out (sync slow path, jvmti, etc.) we will have
1556 // captured the oops from our caller and have a valid oopMap for
1557 // them.
1558
1559 // -----------------
1560 // The Grand Shuffle
1561 //
1562 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1563 // and, if static, the class mirror instead of a receiver. This pretty much
1564 // guarantees that register layout will not match (and x86 doesn't use reg
1565 // parms though amd does). Since the native abi doesn't use register args
1566 // and the java conventions does we don't have to worry about collisions.
1567 // All of our moved are reg->stack or stack->stack.
1568 // We ignore the extra arguments during the shuffle and handle them at the
1569 // last moment. The shuffle is described by the two calling convention
1570 // vectors we have in our possession. We simply walk the java vector to
1571 // get the source locations and the c vector to get the destinations.
1572
1573 int c_arg = method->is_static() ? 2 : 1;
1574
1575 // Record rsp-based slot for receiver on stack for non-static methods
1576 int receiver_offset = -1;
1577
1578 // This is a trick. We double the stack slots so we can claim
1579 // the oops in the caller's frame. Since we are sure to have
1580 // more args than the caller doubling is enough to make
1581 // sure we can capture all the incoming oop args from the
1582 // caller.
1583 //
1584 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1585
1586 // Mark location of rbp,
1587 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1588
1589 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1590 // Are free to temporaries if we have to do stack to steck moves.
1591 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1592
1593 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1594 switch (in_sig_bt[i]) {
1595 case T_ARRAY:
1596 case T_OBJECT:
1597 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1598 ((i == 0) && (!is_static)),
1599 &receiver_offset);
1600 break;
1601 case T_VOID:
1602 break;
1603
1604 case T_FLOAT:
1605 float_move(masm, in_regs[i], out_regs[c_arg]);
1606 break;
1607
1608 case T_DOUBLE:
1609 assert( i + 1 < total_in_args &&
1610 in_sig_bt[i + 1] == T_VOID &&
1611 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1612 double_move(masm, in_regs[i], out_regs[c_arg]);
1613 break;
1614
1615 case T_LONG :
1616 long_move(masm, in_regs[i], out_regs[c_arg]);
1617 break;
1618
1619 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1620
1621 default:
1622 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1623 }
1624 }
1625
1626 // Pre-load a static method's oop into rsi. Used both by locking code and
1627 // the normal JNI call code.
1628 if (method->is_static()) {
1629
1630 // load opp into a register
1631 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1632
1633 // Now handlize the static class mirror it's known not-null.
1634 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1635 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1636
1637 // Now get the handle
1638 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1639 // store the klass handle as second argument
1640 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1641 }
1642
1643 // Change state to native (we save the return address in the thread, since it might not
1644 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1645 // points into the right code segment. It does not have to be the correct return pc.
1646 // We use the same pc/oopMap repeatedly when we call out
1647
1648 intptr_t the_pc = (intptr_t) __ pc();
1649 oop_maps->add_gc_map(the_pc - start, map);
1650
1651 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc, noreg);
1652
1653
1654 // We have all of the arguments setup at this point. We must not touch any register
1655 // argument registers at this point (what if we save/restore them there are no oop?
1656
1657 {
1658 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0, noreg);
1659 __ mov_metadata(rax, method());
1660 __ call_VM_leaf(
1661 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1662 thread, rax);
1663 }
1664
1665 // RedefineClasses() tracing support for obsolete method entry
1666 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1667 __ mov_metadata(rax, method());
1668 __ call_VM_leaf(
1669 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1670 thread, rax);
1671 }
1672
1673 // These are register definitions we need for locking/unlocking
1674 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1675 const Register obj_reg = rcx; // Will contain the oop
1676 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1677
1678 Label slow_path_lock;
1679 Label lock_done;
1680
1681 // Lock a synchronized method
1682 if (method->is_synchronized()) {
1683 Label count_mon;
1684
1685 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1686
1687 // Get the handle (the 2nd argument)
1688 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1689
1690 // Get address of the box
1691
1692 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1693
1694 // Load the oop from the handle
1695 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1696
1697 if (LockingMode == LM_MONITOR) {
1698 __ jmp(slow_path_lock);
1699 } else if (LockingMode == LM_LEGACY) {
1700 // Load immediate 1 into swap_reg %rax,
1701 __ movptr(swap_reg, 1);
1702
1703 // Load (object->mark() | 1) into swap_reg %rax,
1704 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1705
1706 // Save (object->mark() | 1) into BasicLock's displaced header
1707 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1708
1709 // src -> dest iff dest == rax, else rax, <- dest
1710 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1711 __ lock();
1712 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1713 __ jcc(Assembler::equal, count_mon);
1714
1715 // Test if the oopMark is an obvious stack pointer, i.e.,
1716 // 1) (mark & 3) == 0, and
1717 // 2) rsp <= mark < mark + os::pagesize()
1718 // These 3 tests can be done by evaluating the following
1719 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1720 // assuming both stack pointer and pagesize have their
1721 // least significant 2 bits clear.
1722 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1723
1724 __ subptr(swap_reg, rsp);
1725 __ andptr(swap_reg, 3 - (int)os::vm_page_size());
1726
1727 // Save the test result, for recursive case, the result is zero
1728 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1729 __ jcc(Assembler::notEqual, slow_path_lock);
1730 } else {
1731 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1732 // Load object header
1733 __ movptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1734 __ lightweight_lock(obj_reg, swap_reg, thread, lock_reg, slow_path_lock);
1735 }
1736 __ bind(count_mon);
1737 __ inc_held_monitor_count();
1738
1739 // Slow path will re-enter here
1740 __ bind(lock_done);
1741 }
1742
1743
1744 // Finally just about ready to make the JNI call
1745
1746 // get JNIEnv* which is first argument to native
1747 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1748 __ movptr(Address(rsp, 0), rdx);
1749
1750 // Now set thread in native
1751 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1752
1753 __ call(RuntimeAddress(native_func));
1754
1755 // Verify or restore cpu control state after JNI call
1756 __ restore_cpu_control_state_after_jni(noreg);
1757
1758 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1759 // arguments off of the stack. We could just re-adjust the stack pointer here
1760 // and continue to do SP relative addressing but we instead switch to FP
1761 // relative addressing.
1762
1763 // Unpack native results.
1764 switch (ret_type) {
1765 case T_BOOLEAN: __ c2bool(rax); break;
1766 case T_CHAR : __ andptr(rax, 0xFFFF); break;
1767 case T_BYTE : __ sign_extend_byte (rax); break;
1768 case T_SHORT : __ sign_extend_short(rax); break;
1769 case T_INT : /* nothing to do */ break;
1770 case T_DOUBLE :
1771 case T_FLOAT :
1772 // Result is in st0 we'll save as needed
1773 break;
1774 case T_ARRAY: // Really a handle
1775 case T_OBJECT: // Really a handle
1776 break; // can't de-handlize until after safepoint check
1777 case T_VOID: break;
1778 case T_LONG: break;
1779 default : ShouldNotReachHere();
1780 }
1781
1782 Label after_transition;
1783
1784 // Switch thread to "native transition" state before reading the synchronization state.
1785 // This additional state is necessary because reading and testing the synchronization
1786 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1787 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1788 // VM thread changes sync state to synchronizing and suspends threads for GC.
1789 // Thread A is resumed to finish this native method, but doesn't block here since it
1790 // didn't see any synchronization is progress, and escapes.
1791 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1792
1793 // Force this write out before the read below
1794 if (!UseSystemMemoryBarrier) {
1795 __ membar(Assembler::Membar_mask_bits(
1796 Assembler::LoadLoad | Assembler::LoadStore |
1797 Assembler::StoreLoad | Assembler::StoreStore));
1798 }
1799
1800 if (AlwaysRestoreFPU) {
1801 // Make sure the control word is correct.
1802 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1803 }
1804
1805 // check for safepoint operation in progress and/or pending suspend requests
1806 { Label Continue, slow_path;
1807
1808 __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1809
1810 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1811 __ jcc(Assembler::equal, Continue);
1812 __ bind(slow_path);
1813
1814 // Don't use call_VM as it will see a possible pending exception and forward it
1815 // and never return here preventing us from clearing _last_native_pc down below.
1816 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1817 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1818 // by hand.
1819 //
1820 __ vzeroupper();
1821
1822 save_native_result(masm, ret_type, stack_slots);
1823 __ push(thread);
1824 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1825 JavaThread::check_special_condition_for_native_trans)));
1826 __ increment(rsp, wordSize);
1827 // Restore any method result value
1828 restore_native_result(masm, ret_type, stack_slots);
1829 __ bind(Continue);
1830 }
1831
1832 // change thread state
1833 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1834 __ bind(after_transition);
1835
1836 Label reguard;
1837 Label reguard_done;
1838 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1839 __ jcc(Assembler::equal, reguard);
1840
1841 // slow path reguard re-enters here
1842 __ bind(reguard_done);
1843
1844 // Handle possible exception (will unlock if necessary)
1845
1846 // native result if any is live
1847
1848 // Unlock
1849 Label slow_path_unlock;
1850 Label unlock_done;
1851 if (method->is_synchronized()) {
1852
1853 Label fast_done;
1854
1855 // Get locked oop from the handle we passed to jni
1856 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1857
1858 if (LockingMode == LM_LEGACY) {
1859 Label not_recur;
1860 // Simple recursive lock?
1861 __ cmpptr(Address(rbp, lock_slot_rbp_offset), NULL_WORD);
1862 __ jcc(Assembler::notEqual, not_recur);
1863 __ dec_held_monitor_count();
1864 __ jmpb(fast_done);
1865 __ bind(not_recur);
1866 }
1867
1868 // Must save rax, if it is live now because cmpxchg must use it
1869 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1870 save_native_result(masm, ret_type, stack_slots);
1871 }
1872
1873 if (LockingMode == LM_MONITOR) {
1874 __ jmp(slow_path_unlock);
1875 } else if (LockingMode == LM_LEGACY) {
1876 // get old displaced header
1877 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
1878
1879 // get address of the stack lock
1880 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
1881
1882 // Atomic swap old header if oop still contains the stack lock
1883 // src -> dest iff dest == rax, else rax, <- dest
1884 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
1885 __ lock();
1886 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1887 __ jcc(Assembler::notEqual, slow_path_unlock);
1888 __ dec_held_monitor_count();
1889 } else {
1890 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1891 __ movptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1892 __ andptr(swap_reg, ~(int32_t)markWord::lock_mask_in_place);
1893 __ lightweight_unlock(obj_reg, swap_reg, lock_reg, slow_path_unlock);
1894 __ dec_held_monitor_count();
1895 }
1896
1897 // slow path re-enters here
1898 __ bind(unlock_done);
1899 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1900 restore_native_result(masm, ret_type, stack_slots);
1901 }
1902
1903 __ bind(fast_done);
1904 }
1905
1906 {
1907 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0, noreg);
1908 // Tell dtrace about this method exit
1909 save_native_result(masm, ret_type, stack_slots);
1910 __ mov_metadata(rax, method());
1911 __ call_VM_leaf(
1912 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
1913 thread, rax);
1914 restore_native_result(masm, ret_type, stack_slots);
1915 }
1916
1917 // We can finally stop using that last_Java_frame we setup ages ago
1918
1919 __ reset_last_Java_frame(thread, false);
1920
1921 // Unbox oop result, e.g. JNIHandles::resolve value.
1922 if (is_reference_type(ret_type)) {
1923 __ resolve_jobject(rax /* value */,
1924 thread /* thread */,
1925 rcx /* tmp */);
1926 }
1927
1928 if (CheckJNICalls) {
1929 // clear_pending_jni_exception_check
1930 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
1931 }
1932
1933 // reset handle block
1934 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
1935 __ movl(Address(rcx, JNIHandleBlock::top_offset()), NULL_WORD);
1936
1937 // Any exception pending?
1938 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1939 __ jcc(Assembler::notEqual, exception_pending);
1940
1941 // no exception, we're almost done
1942
1943 // check that only result value is on FPU stack
1944 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
1945
1946 // Fixup floating pointer results so that result looks like a return from a compiled method
1947 if (ret_type == T_FLOAT) {
1948 if (UseSSE >= 1) {
1949 // Pop st0 and store as float and reload into xmm register
1950 __ fstp_s(Address(rbp, -4));
1951 __ movflt(xmm0, Address(rbp, -4));
1952 }
1953 } else if (ret_type == T_DOUBLE) {
1954 if (UseSSE >= 2) {
1955 // Pop st0 and store as double and reload into xmm register
1956 __ fstp_d(Address(rbp, -8));
1957 __ movdbl(xmm0, Address(rbp, -8));
1958 }
1959 }
1960
1961 // Return
1962
1963 __ leave();
1964 __ ret(0);
1965
1966 // Unexpected paths are out of line and go here
1967
1968 // Slow path locking & unlocking
1969 if (method->is_synchronized()) {
1970
1971 // BEGIN Slow path lock
1972
1973 __ bind(slow_path_lock);
1974
1975 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1976 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1977 __ push(thread);
1978 __ push(lock_reg);
1979 __ push(obj_reg);
1980 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
1981 __ addptr(rsp, 3*wordSize);
1982
1983 #ifdef ASSERT
1984 { Label L;
1985 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
1986 __ jcc(Assembler::equal, L);
1987 __ stop("no pending exception allowed on exit from monitorenter");
1988 __ bind(L);
1989 }
1990 #endif
1991 __ jmp(lock_done);
1992
1993 // END Slow path lock
1994
1995 // BEGIN Slow path unlock
1996 __ bind(slow_path_unlock);
1997 __ vzeroupper();
1998 // Slow path unlock
1999
2000 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2001 save_native_result(masm, ret_type, stack_slots);
2002 }
2003 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2004
2005 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2006 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2007
2008
2009 // should be a peal
2010 // +wordSize because of the push above
2011 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2012 __ push(thread);
2013 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2014 __ push(rax);
2015
2016 __ push(obj_reg);
2017 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2018 __ addptr(rsp, 3*wordSize);
2019 #ifdef ASSERT
2020 {
2021 Label L;
2022 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2023 __ jcc(Assembler::equal, L);
2024 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2025 __ bind(L);
2026 }
2027 #endif /* ASSERT */
2028
2029 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2030
2031 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2032 restore_native_result(masm, ret_type, stack_slots);
2033 }
2034 __ jmp(unlock_done);
2035 // END Slow path unlock
2036
2037 }
2038
2039 // SLOW PATH Reguard the stack if needed
2040
2041 __ bind(reguard);
2042 __ vzeroupper();
2043 save_native_result(masm, ret_type, stack_slots);
2044 {
2045 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2046 }
2047 restore_native_result(masm, ret_type, stack_slots);
2048 __ jmp(reguard_done);
2049
2050
2051 // BEGIN EXCEPTION PROCESSING
2052
2053 // Forward the exception
2054 __ bind(exception_pending);
2055
2056 // remove possible return value from FPU register stack
2057 __ empty_FPU_stack();
2058
2059 // pop our frame
2060 __ leave();
2061 // and forward the exception
2062 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2063
2064 __ flush();
2065
2066 nmethod *nm = nmethod::new_native_nmethod(method,
2067 compile_id,
2068 masm->code(),
2069 vep_offset,
2070 frame_complete,
2071 stack_slots / VMRegImpl::slots_per_word,
2072 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2073 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2074 oop_maps);
2075
2076 return nm;
2077
2078 }
2079
2080 // this function returns the adjust size (in number of words) to a c2i adapter
2081 // activation for use during deoptimization
2082 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2083 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2084 }
2085
2086
2087 // Number of stack slots between incoming argument block and the start of
2088 // a new frame. The PROLOG must add this many slots to the stack. The
2089 // EPILOG must remove this many slots. Intel needs one slot for
2090 // return address and one for rbp, (must save rbp)
2091 uint SharedRuntime::in_preserve_stack_slots() {
2092 return 2+VerifyStackAtCalls;
2093 }
2094
2095 uint SharedRuntime::out_preserve_stack_slots() {
2096 return 0;
2097 }
2098
2099 //------------------------------generate_deopt_blob----------------------------
2100 void SharedRuntime::generate_deopt_blob() {
2101 // allocate space for the code
2102 ResourceMark rm;
2103 // setup code generation tools
2104 // note: the buffer code size must account for StackShadowPages=50
2105 CodeBuffer buffer("deopt_blob", 1536, 1024);
2106 MacroAssembler* masm = new MacroAssembler(&buffer);
2107 int frame_size_in_words;
2108 OopMap* map = nullptr;
2109 // Account for the extra args we place on the stack
2110 // by the time we call fetch_unroll_info
2111 const int additional_words = 2; // deopt kind, thread
2112
2113 OopMapSet *oop_maps = new OopMapSet();
2114
2115 // -------------
2116 // This code enters when returning to a de-optimized nmethod. A return
2117 // address has been pushed on the stack, and return values are in
2118 // registers.
2119 // If we are doing a normal deopt then we were called from the patched
2120 // nmethod from the point we returned to the nmethod. So the return
2121 // address on the stack is wrong by NativeCall::instruction_size
2122 // We will adjust the value to it looks like we have the original return
2123 // address on the stack (like when we eagerly deoptimized).
2124 // In the case of an exception pending with deoptimized then we enter
2125 // with a return address on the stack that points after the call we patched
2126 // into the exception handler. We have the following register state:
2127 // rax,: exception
2128 // rbx,: exception handler
2129 // rdx: throwing pc
2130 // So in this case we simply jam rdx into the useless return address and
2131 // the stack looks just like we want.
2132 //
2133 // At this point we need to de-opt. We save the argument return
2134 // registers. We call the first C routine, fetch_unroll_info(). This
2135 // routine captures the return values and returns a structure which
2136 // describes the current frame size and the sizes of all replacement frames.
2137 // The current frame is compiled code and may contain many inlined
2138 // functions, each with their own JVM state. We pop the current frame, then
2139 // push all the new frames. Then we call the C routine unpack_frames() to
2140 // populate these frames. Finally unpack_frames() returns us the new target
2141 // address. Notice that callee-save registers are BLOWN here; they have
2142 // already been captured in the vframeArray at the time the return PC was
2143 // patched.
2144 address start = __ pc();
2145 Label cont;
2146
2147 // Prolog for non exception case!
2148
2149 // Save everything in sight.
2150
2151 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2152 // Normal deoptimization
2153 __ push(Deoptimization::Unpack_deopt);
2154 __ jmp(cont);
2155
2156 int reexecute_offset = __ pc() - start;
2157
2158 // Reexecute case
2159 // return address is the pc describes what bci to do re-execute at
2160
2161 // No need to update map as each call to save_live_registers will produce identical oopmap
2162 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2163
2164 __ push(Deoptimization::Unpack_reexecute);
2165 __ jmp(cont);
2166
2167 int exception_offset = __ pc() - start;
2168
2169 // Prolog for exception case
2170
2171 // all registers are dead at this entry point, except for rax, and
2172 // rdx which contain the exception oop and exception pc
2173 // respectively. Set them in TLS and fall thru to the
2174 // unpack_with_exception_in_tls entry point.
2175
2176 __ get_thread(rdi);
2177 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2178 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2179
2180 int exception_in_tls_offset = __ pc() - start;
2181
2182 // new implementation because exception oop is now passed in JavaThread
2183
2184 // Prolog for exception case
2185 // All registers must be preserved because they might be used by LinearScan
2186 // Exceptiop oop and throwing PC are passed in JavaThread
2187 // tos: stack at point of call to method that threw the exception (i.e. only
2188 // args are on the stack, no return address)
2189
2190 // make room on stack for the return address
2191 // It will be patched later with the throwing pc. The correct value is not
2192 // available now because loading it from memory would destroy registers.
2193 __ push(0);
2194
2195 // Save everything in sight.
2196
2197 // No need to update map as each call to save_live_registers will produce identical oopmap
2198 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2199
2200 // Now it is safe to overwrite any register
2201
2202 // store the correct deoptimization type
2203 __ push(Deoptimization::Unpack_exception);
2204
2205 // load throwing pc from JavaThread and patch it as the return address
2206 // of the current frame. Then clear the field in JavaThread
2207 __ get_thread(rdi);
2208 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2209 __ movptr(Address(rbp, wordSize), rdx);
2210 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2211
2212 #ifdef ASSERT
2213 // verify that there is really an exception oop in JavaThread
2214 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2215 __ verify_oop(rax);
2216
2217 // verify that there is no pending exception
2218 Label no_pending_exception;
2219 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2220 __ testptr(rax, rax);
2221 __ jcc(Assembler::zero, no_pending_exception);
2222 __ stop("must not have pending exception here");
2223 __ bind(no_pending_exception);
2224 #endif
2225
2226 __ bind(cont);
2227
2228 // Compiled code leaves the floating point stack dirty, empty it.
2229 __ empty_FPU_stack();
2230
2231
2232 // Call C code. Need thread and this frame, but NOT official VM entry
2233 // crud. We cannot block on this call, no GC can happen.
2234 __ get_thread(rcx);
2235 __ push(rcx);
2236 // fetch_unroll_info needs to call last_java_frame()
2237 __ set_last_Java_frame(rcx, noreg, noreg, nullptr, noreg);
2238
2239 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2240
2241 // Need to have an oopmap that tells fetch_unroll_info where to
2242 // find any register it might need.
2243
2244 oop_maps->add_gc_map( __ pc()-start, map);
2245
2246 // Discard args to fetch_unroll_info
2247 __ pop(rcx);
2248 __ pop(rcx);
2249
2250 __ get_thread(rcx);
2251 __ reset_last_Java_frame(rcx, false);
2252
2253 // Load UnrollBlock into EDI
2254 __ mov(rdi, rax);
2255
2256 // Move the unpack kind to a safe place in the UnrollBlock because
2257 // we are very short of registers
2258
2259 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset());
2260 // retrieve the deopt kind from the UnrollBlock.
2261 __ movl(rax, unpack_kind);
2262
2263 Label noException;
2264 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2265 __ jcc(Assembler::notEqual, noException);
2266 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2267 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2268 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2269 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2270
2271 __ verify_oop(rax);
2272
2273 // Overwrite the result registers with the exception results.
2274 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2275 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2276
2277 __ bind(noException);
2278
2279 // Stack is back to only having register save data on the stack.
2280 // Now restore the result registers. Everything else is either dead or captured
2281 // in the vframeArray.
2282
2283 RegisterSaver::restore_result_registers(masm);
2284
2285 // Non standard control word may be leaked out through a safepoint blob, and we can
2286 // deopt at a poll point with the non standard control word. However, we should make
2287 // sure the control word is correct after restore_result_registers.
2288 __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2289
2290 // All of the register save area has been popped of the stack. Only the
2291 // return address remains.
2292
2293 // Pop all the frames we must move/replace.
2294 //
2295 // Frame picture (youngest to oldest)
2296 // 1: self-frame (no frame link)
2297 // 2: deopting frame (no frame link)
2298 // 3: caller of deopting frame (could be compiled/interpreted).
2299 //
2300 // Note: by leaving the return address of self-frame on the stack
2301 // and using the size of frame 2 to adjust the stack
2302 // when we are done the return to frame 3 will still be on the stack.
2303
2304 // Pop deoptimized frame
2305 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2306
2307 // sp should be pointing at the return address to the caller (3)
2308
2309 // Pick up the initial fp we should save
2310 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2311 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset()));
2312
2313 #ifdef ASSERT
2314 // Compilers generate code that bang the stack by as much as the
2315 // interpreter would need. So this stack banging should never
2316 // trigger a fault. Verify that it does not on non product builds.
2317 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2318 __ bang_stack_size(rbx, rcx);
2319 #endif
2320
2321 // Load array of frame pcs into ECX
2322 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset()));
2323
2324 __ pop(rsi); // trash the old pc
2325
2326 // Load array of frame sizes into ESI
2327 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset()));
2328
2329 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset());
2330
2331 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset()));
2332 __ movl(counter, rbx);
2333
2334 // Now adjust the caller's stack to make up for the extra locals
2335 // but record the original sp so that we can save it in the skeletal interpreter
2336 // frame and the stack walking of interpreter_sender will get the unextended sp
2337 // value and not the "real" sp value.
2338
2339 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset());
2340 __ movptr(sp_temp, rsp);
2341 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset()));
2342 __ subptr(rsp, rbx);
2343
2344 // Push interpreter frames in a loop
2345 Label loop;
2346 __ bind(loop);
2347 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2348 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2349 __ pushptr(Address(rcx, 0)); // save return address
2350 __ enter(); // save old & set new rbp,
2351 __ subptr(rsp, rbx); // Prolog!
2352 __ movptr(rbx, sp_temp); // sender's sp
2353 // This value is corrected by layout_activation_impl
2354 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2355 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2356 __ movptr(sp_temp, rsp); // pass to next frame
2357 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2358 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2359 __ decrementl(counter); // decrement counter
2360 __ jcc(Assembler::notZero, loop);
2361 __ pushptr(Address(rcx, 0)); // save final return address
2362
2363 // Re-push self-frame
2364 __ enter(); // save old & set new rbp,
2365
2366 // Return address and rbp, are in place
2367 // We'll push additional args later. Just allocate a full sized
2368 // register save area
2369 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2370
2371 // Restore frame locals after moving the frame
2372 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2373 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2374 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2375 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2376 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2377
2378 // Set up the args to unpack_frame
2379
2380 __ pushl(unpack_kind); // get the unpack_kind value
2381 __ get_thread(rcx);
2382 __ push(rcx);
2383
2384 // set last_Java_sp, last_Java_fp
2385 __ set_last_Java_frame(rcx, noreg, rbp, nullptr, noreg);
2386
2387 // Call C code. Need thread but NOT official VM entry
2388 // crud. We cannot block on this call, no GC can happen. Call should
2389 // restore return values to their stack-slots with the new SP.
2390 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2391 // Set an oopmap for the call site
2392 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2393
2394 // rax, contains the return result type
2395 __ push(rax);
2396
2397 __ get_thread(rcx);
2398 __ reset_last_Java_frame(rcx, false);
2399
2400 // Collect return values
2401 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2402 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2403
2404 // Clear floating point stack before returning to interpreter
2405 __ empty_FPU_stack();
2406
2407 // Check if we should push the float or double return value.
2408 Label results_done, yes_double_value;
2409 __ cmpl(Address(rsp, 0), T_DOUBLE);
2410 __ jcc (Assembler::zero, yes_double_value);
2411 __ cmpl(Address(rsp, 0), T_FLOAT);
2412 __ jcc (Assembler::notZero, results_done);
2413
2414 // return float value as expected by interpreter
2415 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2416 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2417 __ jmp(results_done);
2418
2419 // return double value as expected by interpreter
2420 __ bind(yes_double_value);
2421 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2422 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2423
2424 __ bind(results_done);
2425
2426 // Pop self-frame.
2427 __ leave(); // Epilog!
2428
2429 // Jump to interpreter
2430 __ ret(0);
2431
2432 // -------------
2433 // make sure all code is generated
2434 masm->flush();
2435
2436 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2437 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2438 }
2439
2440
2441 #ifdef COMPILER2
2442 //------------------------------generate_uncommon_trap_blob--------------------
2443 void SharedRuntime::generate_uncommon_trap_blob() {
2444 // allocate space for the code
2445 ResourceMark rm;
2446 // setup code generation tools
2447 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2448 MacroAssembler* masm = new MacroAssembler(&buffer);
2449
2450 enum frame_layout {
2451 arg0_off, // thread sp + 0 // Arg location for
2452 arg1_off, // unloaded_class_index sp + 1 // calling C
2453 arg2_off, // exec_mode sp + 2
2454 // The frame sender code expects that rbp will be in the "natural" place and
2455 // will override any oopMap setting for it. We must therefore force the layout
2456 // so that it agrees with the frame sender code.
2457 rbp_off, // callee saved register sp + 3
2458 return_off, // slot for return address sp + 4
2459 framesize
2460 };
2461
2462 address start = __ pc();
2463
2464 if (UseRTMLocking) {
2465 // Abort RTM transaction before possible nmethod deoptimization.
2466 __ xabort(0);
2467 }
2468
2469 // Push self-frame.
2470 __ subptr(rsp, return_off*wordSize); // Epilog!
2471
2472 // rbp, is an implicitly saved callee saved register (i.e. the calling
2473 // convention will save restore it in prolog/epilog) Other than that
2474 // there are no callee save registers no that adapter frames are gone.
2475 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2476
2477 // Clear the floating point exception stack
2478 __ empty_FPU_stack();
2479
2480 // set last_Java_sp
2481 __ get_thread(rdx);
2482 __ set_last_Java_frame(rdx, noreg, noreg, nullptr, noreg);
2483
2484 // Call C code. Need thread but NOT official VM entry
2485 // crud. We cannot block on this call, no GC can happen. Call should
2486 // capture callee-saved registers as well as return values.
2487 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2488 // argument already in ECX
2489 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2490 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2491 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2492
2493 // Set an oopmap for the call site
2494 OopMapSet *oop_maps = new OopMapSet();
2495 OopMap* map = new OopMap( framesize, 0 );
2496 // No oopMap for rbp, it is known implicitly
2497
2498 oop_maps->add_gc_map( __ pc()-start, map);
2499
2500 __ get_thread(rcx);
2501
2502 __ reset_last_Java_frame(rcx, false);
2503
2504 // Load UnrollBlock into EDI
2505 __ movptr(rdi, rax);
2506
2507 #ifdef ASSERT
2508 { Label L;
2509 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset()),
2510 (int32_t)Deoptimization::Unpack_uncommon_trap);
2511 __ jcc(Assembler::equal, L);
2512 __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap");
2513 __ bind(L);
2514 }
2515 #endif
2516
2517 // Pop all the frames we must move/replace.
2518 //
2519 // Frame picture (youngest to oldest)
2520 // 1: self-frame (no frame link)
2521 // 2: deopting frame (no frame link)
2522 // 3: caller of deopting frame (could be compiled/interpreted).
2523
2524 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2525 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2526
2527 // Pop deoptimized frame
2528 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2529 __ addptr(rsp, rcx);
2530
2531 // sp should be pointing at the return address to the caller (3)
2532
2533 // Pick up the initial fp we should save
2534 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2535 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset()));
2536
2537 #ifdef ASSERT
2538 // Compilers generate code that bang the stack by as much as the
2539 // interpreter would need. So this stack banging should never
2540 // trigger a fault. Verify that it does not on non product builds.
2541 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2542 __ bang_stack_size(rbx, rcx);
2543 #endif
2544
2545 // Load array of frame pcs into ECX
2546 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset()));
2547
2548 __ pop(rsi); // trash the pc
2549
2550 // Load array of frame sizes into ESI
2551 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset()));
2552
2553 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset());
2554
2555 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset()));
2556 __ movl(counter, rbx);
2557
2558 // Now adjust the caller's stack to make up for the extra locals
2559 // but record the original sp so that we can save it in the skeletal interpreter
2560 // frame and the stack walking of interpreter_sender will get the unextended sp
2561 // value and not the "real" sp value.
2562
2563 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset());
2564 __ movptr(sp_temp, rsp);
2565 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset()));
2566 __ subptr(rsp, rbx);
2567
2568 // Push interpreter frames in a loop
2569 Label loop;
2570 __ bind(loop);
2571 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2572 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2573 __ pushptr(Address(rcx, 0)); // save return address
2574 __ enter(); // save old & set new rbp,
2575 __ subptr(rsp, rbx); // Prolog!
2576 __ movptr(rbx, sp_temp); // sender's sp
2577 // This value is corrected by layout_activation_impl
2578 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2579 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2580 __ movptr(sp_temp, rsp); // pass to next frame
2581 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2582 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2583 __ decrementl(counter); // decrement counter
2584 __ jcc(Assembler::notZero, loop);
2585 __ pushptr(Address(rcx, 0)); // save final return address
2586
2587 // Re-push self-frame
2588 __ enter(); // save old & set new rbp,
2589 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2590
2591
2592 // set last_Java_sp, last_Java_fp
2593 __ get_thread(rdi);
2594 __ set_last_Java_frame(rdi, noreg, rbp, nullptr, noreg);
2595
2596 // Call C code. Need thread but NOT official VM entry
2597 // crud. We cannot block on this call, no GC can happen. Call should
2598 // restore return values to their stack-slots with the new SP.
2599 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2600 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2601 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2602 // Set an oopmap for the call site
2603 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2604
2605 __ get_thread(rdi);
2606 __ reset_last_Java_frame(rdi, true);
2607
2608 // Pop self-frame.
2609 __ leave(); // Epilog!
2610
2611 // Jump to interpreter
2612 __ ret(0);
2613
2614 // -------------
2615 // make sure all code is generated
2616 masm->flush();
2617
2618 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2619 }
2620 #endif // COMPILER2
2621
2622 //------------------------------generate_handler_blob------
2623 //
2624 // Generate a special Compile2Runtime blob that saves all registers,
2625 // setup oopmap, and calls safepoint code to stop the compiled code for
2626 // a safepoint.
2627 //
2628 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2629
2630 // Account for thread arg in our frame
2631 const int additional_words = 1;
2632 int frame_size_in_words;
2633
2634 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2635
2636 ResourceMark rm;
2637 OopMapSet *oop_maps = new OopMapSet();
2638 OopMap* map;
2639
2640 // allocate space for the code
2641 // setup code generation tools
2642 CodeBuffer buffer("handler_blob", 2048, 1024);
2643 MacroAssembler* masm = new MacroAssembler(&buffer);
2644
2645 const Register java_thread = rdi; // callee-saved for VC++
2646 address start = __ pc();
2647 address call_pc = nullptr;
2648 bool cause_return = (poll_type == POLL_AT_RETURN);
2649 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2650
2651 if (UseRTMLocking) {
2652 // Abort RTM transaction before calling runtime
2653 // because critical section will be large and will be
2654 // aborted anyway. Also nmethod could be deoptimized.
2655 __ xabort(0);
2656 }
2657
2658 // If cause_return is true we are at a poll_return and there is
2659 // the return address on the stack to the caller on the nmethod
2660 // that is safepoint. We can leave this return on the stack and
2661 // effectively complete the return and safepoint in the caller.
2662 // Otherwise we push space for a return address that the safepoint
2663 // handler will install later to make the stack walking sensible.
2664 if (!cause_return)
2665 __ push(rbx); // Make room for return address (or push it again)
2666
2667 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2668
2669 // The following is basically a call_VM. However, we need the precise
2670 // address of the call in order to generate an oopmap. Hence, we do all the
2671 // work ourselves.
2672
2673 // Push thread argument and setup last_Java_sp
2674 __ get_thread(java_thread);
2675 __ push(java_thread);
2676 __ set_last_Java_frame(java_thread, noreg, noreg, nullptr, noreg);
2677
2678 // if this was not a poll_return then we need to correct the return address now.
2679 if (!cause_return) {
2680 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2681 // Additionally, rbx is a callee saved register and we can look at it later to determine
2682 // if someone changed the return address for us!
2683 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2684 __ movptr(Address(rbp, wordSize), rbx);
2685 }
2686
2687 // do the call
2688 __ call(RuntimeAddress(call_ptr));
2689
2690 // Set an oopmap for the call site. This oopmap will map all
2691 // oop-registers and debug-info registers as callee-saved. This
2692 // will allow deoptimization at this safepoint to find all possible
2693 // debug-info recordings, as well as let GC find all oops.
2694
2695 oop_maps->add_gc_map( __ pc() - start, map);
2696
2697 // Discard arg
2698 __ pop(rcx);
2699
2700 Label noException;
2701
2702 // Clear last_Java_sp again
2703 __ get_thread(java_thread);
2704 __ reset_last_Java_frame(java_thread, false);
2705
2706 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), NULL_WORD);
2707 __ jcc(Assembler::equal, noException);
2708
2709 // Exception pending
2710 RegisterSaver::restore_live_registers(masm, save_vectors);
2711
2712 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2713
2714 __ bind(noException);
2715
2716 Label no_adjust, bail, not_special;
2717 if (!cause_return) {
2718 // If our stashed return pc was modified by the runtime we avoid touching it
2719 __ cmpptr(rbx, Address(rbp, wordSize));
2720 __ jccb(Assembler::notEqual, no_adjust);
2721
2722 // Skip over the poll instruction.
2723 // See NativeInstruction::is_safepoint_poll()
2724 // Possible encodings:
2725 // 85 00 test %eax,(%rax)
2726 // 85 01 test %eax,(%rcx)
2727 // 85 02 test %eax,(%rdx)
2728 // 85 03 test %eax,(%rbx)
2729 // 85 06 test %eax,(%rsi)
2730 // 85 07 test %eax,(%rdi)
2731 //
2732 // 85 04 24 test %eax,(%rsp)
2733 // 85 45 00 test %eax,0x0(%rbp)
2734
2735 #ifdef ASSERT
2736 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2737 #endif
2738 // rsp/rbp base encoding takes 3 bytes with the following register values:
2739 // rsp 0x04
2740 // rbp 0x05
2741 __ movzbl(rcx, Address(rbx, 1));
2742 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2743 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
2744 __ cmpptr(rcx, 1);
2745 __ jcc(Assembler::above, not_special);
2746 __ addptr(rbx, 1);
2747 __ bind(not_special);
2748 #ifdef ASSERT
2749 // Verify the correct encoding of the poll we're about to skip.
2750 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2751 __ jcc(Assembler::notEqual, bail);
2752 // Mask out the modrm bits
2753 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2754 // rax encodes to 0, so if the bits are nonzero it's incorrect
2755 __ jcc(Assembler::notZero, bail);
2756 #endif
2757 // Adjust return pc forward to step over the safepoint poll instruction
2758 __ addptr(rbx, 2);
2759 __ movptr(Address(rbp, wordSize), rbx);
2760 }
2761
2762 __ bind(no_adjust);
2763 // Normal exit, register restoring and exit
2764 RegisterSaver::restore_live_registers(masm, save_vectors);
2765
2766 __ ret(0);
2767
2768 #ifdef ASSERT
2769 __ bind(bail);
2770 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2771 #endif
2772
2773 // make sure all code is generated
2774 masm->flush();
2775
2776 // Fill-out other meta info
2777 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2778 }
2779
2780 //
2781 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2782 //
2783 // Generate a stub that calls into vm to find out the proper destination
2784 // of a java call. All the argument registers are live at this point
2785 // but since this is generic code we don't know what they are and the caller
2786 // must do any gc of the args.
2787 //
2788 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2789 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2790
2791 // allocate space for the code
2792 ResourceMark rm;
2793
2794 CodeBuffer buffer(name, 1000, 512);
2795 MacroAssembler* masm = new MacroAssembler(&buffer);
2796
2797 int frame_size_words;
2798 enum frame_layout {
2799 thread_off,
2800 extra_words };
2801
2802 OopMapSet *oop_maps = new OopMapSet();
2803 OopMap* map = nullptr;
2804
2805 int start = __ offset();
2806
2807 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2808
2809 int frame_complete = __ offset();
2810
2811 const Register thread = rdi;
2812 __ get_thread(rdi);
2813
2814 __ push(thread);
2815 __ set_last_Java_frame(thread, noreg, rbp, nullptr, noreg);
2816
2817 __ call(RuntimeAddress(destination));
2818
2819
2820 // Set an oopmap for the call site.
2821 // We need this not only for callee-saved registers, but also for volatile
2822 // registers that the compiler might be keeping live across a safepoint.
2823
2824 oop_maps->add_gc_map( __ offset() - start, map);
2825
2826 // rax, contains the address we are going to jump to assuming no exception got installed
2827
2828 __ addptr(rsp, wordSize);
2829
2830 // clear last_Java_sp
2831 __ reset_last_Java_frame(thread, true);
2832 // check for pending exceptions
2833 Label pending;
2834 __ cmpptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
2835 __ jcc(Assembler::notEqual, pending);
2836
2837 // get the returned Method*
2838 __ get_vm_result_2(rbx, thread);
2839 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2840
2841 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2842
2843 RegisterSaver::restore_live_registers(masm);
2844
2845 // We are back to the original state on entry and ready to go.
2846
2847 __ jmp(rax);
2848
2849 // Pending exception after the safepoint
2850
2851 __ bind(pending);
2852
2853 RegisterSaver::restore_live_registers(masm);
2854
2855 // exception pending => remove activation and forward to exception handler
2856
2857 __ get_thread(thread);
2858 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2859 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2860 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2861
2862 // -------------
2863 // make sure all code is generated
2864 masm->flush();
2865
2866 // return the blob
2867 // frame_size_words or bytes??
2868 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
2869 }
2870
2871 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) {
2872 Unimplemented();
2873 return nullptr;
2874 }