1 /*
   2  * Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "code/debugInfoRec.hpp"
  29 #include "code/icBuffer.hpp"
  30 #include "code/nativeInst.hpp"
  31 #include "code/vtableStubs.hpp"
  32 #include "compiler/oopMap.hpp"
  33 #include "gc/shared/gcLocker.hpp"
  34 #include "gc/shared/barrierSet.hpp"
  35 #include "gc/shared/barrierSetAssembler.hpp"
  36 #include "interpreter/interpreter.hpp"
  37 #include "logging/log.hpp"
  38 #include "memory/resourceArea.hpp"
  39 #include "oops/compiledICHolder.hpp"
  40 #include "oops/klass.inline.hpp"
  41 #include "prims/methodHandles.hpp"
  42 #include "runtime/jniHandles.hpp"
  43 #include "runtime/safepointMechanism.hpp"
  44 #include "runtime/sharedRuntime.hpp"
  45 #include "runtime/signature.hpp"
  46 #include "runtime/stubRoutines.hpp"
  47 #include "runtime/vframeArray.hpp"
  48 #include "runtime/vm_version.hpp"
  49 #include "utilities/align.hpp"
  50 #include "vmreg_x86.inline.hpp"
  51 #ifdef COMPILER1
  52 #include "c1/c1_Runtime1.hpp"
  53 #endif
  54 #ifdef COMPILER2
  55 #include "opto/runtime.hpp"
  56 #endif
  57 
  58 #define __ masm->
  59 
  60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  61 
  62 class RegisterSaver {
  63   // Capture info about frame layout
  64 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  65   enum layout {
  66                 fpu_state_off = 0,
  67                 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
  68                 st0_off, st0H_off,
  69                 st1_off, st1H_off,
  70                 st2_off, st2H_off,
  71                 st3_off, st3H_off,
  72                 st4_off, st4H_off,
  73                 st5_off, st5H_off,
  74                 st6_off, st6H_off,
  75                 st7_off, st7H_off,
  76                 xmm_off,
  77                 DEF_XMM_OFFS(0),
  78                 DEF_XMM_OFFS(1),
  79                 DEF_XMM_OFFS(2),
  80                 DEF_XMM_OFFS(3),
  81                 DEF_XMM_OFFS(4),
  82                 DEF_XMM_OFFS(5),
  83                 DEF_XMM_OFFS(6),
  84                 DEF_XMM_OFFS(7),
  85                 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
  86                 rdi_off,
  87                 rsi_off,
  88                 ignore_off,  // extra copy of rbp,
  89                 rsp_off,
  90                 rbx_off,
  91                 rdx_off,
  92                 rcx_off,
  93                 rax_off,
  94                 // The frame sender code expects that rbp will be in the "natural" place and
  95                 // will override any oopMap setting for it. We must therefore force the layout
  96                 // so that it agrees with the frame sender code.
  97                 rbp_off,
  98                 return_off,      // slot for return address
  99                 reg_save_size };
 100   enum { FPU_regs_live = flags_off - fpu_state_end };
 101 
 102   public:
 103 
 104   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
 105                                      int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
 106   static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
 107 
 108   static int rax_offset() { return rax_off; }
 109   static int rbx_offset() { return rbx_off; }
 110 
 111   // Offsets into the register save area
 112   // Used by deoptimization when it is managing result register
 113   // values on its own
 114 
 115   static int raxOffset(void) { return rax_off; }
 116   static int rdxOffset(void) { return rdx_off; }
 117   static int rbxOffset(void) { return rbx_off; }
 118   static int xmm0Offset(void) { return xmm0_off; }
 119   // This really returns a slot in the fp save area, which one is not important
 120   static int fpResultOffset(void) { return st0_off; }
 121 
 122   // During deoptimization only the result register need to be restored
 123   // all the other values have already been extracted.
 124 
 125   static void restore_result_registers(MacroAssembler* masm);
 126 
 127 };
 128 
 129 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
 130                                            int* total_frame_words, bool verify_fpu, bool save_vectors) {
 131   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 132   int ymm_bytes = num_xmm_regs * 16;
 133   int zmm_bytes = num_xmm_regs * 32;
 134 #ifdef COMPILER2
 135   int opmask_state_bytes = KRegisterImpl::number_of_registers * 8;
 136   if (save_vectors) {
 137     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 138     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 139     // Save upper half of YMM registers
 140     int vect_bytes = ymm_bytes;
 141     if (UseAVX > 2) {
 142       // Save upper half of ZMM registers as well
 143       vect_bytes += zmm_bytes;
 144       additional_frame_words += opmask_state_bytes / wordSize;
 145     }
 146     additional_frame_words += vect_bytes / wordSize;
 147   }
 148 #else
 149   assert(!save_vectors, "vectors are generated only by C2");
 150 #endif
 151   int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
 152   int frame_words = frame_size_in_bytes / wordSize;
 153   *total_frame_words = frame_words;
 154 
 155   assert(FPUStateSizeInWords == 27, "update stack layout");
 156 
 157   // save registers, fpu state, and flags
 158   // We assume caller has already has return address slot on the stack
 159   // We push epb twice in this sequence because we want the real rbp,
 160   // to be under the return like a normal enter and we want to use pusha
 161   // We push by hand instead of using push.
 162   __ enter();
 163   __ pusha();
 164   __ pushf();
 165   __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
 166   __ push_FPU_state();          // Save FPU state & init
 167 
 168   if (verify_fpu) {
 169     // Some stubs may have non standard FPU control word settings so
 170     // only check and reset the value when it required to be the
 171     // standard value.  The safepoint blob in particular can be used
 172     // in methods which are using the 24 bit control word for
 173     // optimized float math.
 174 
 175 #ifdef ASSERT
 176     // Make sure the control word has the expected value
 177     Label ok;
 178     __ cmpw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
 179     __ jccb(Assembler::equal, ok);
 180     __ stop("corrupted control word detected");
 181     __ bind(ok);
 182 #endif
 183 
 184     // Reset the control word to guard against exceptions being unmasked
 185     // since fstp_d can cause FPU stack underflow exceptions.  Write it
 186     // into the on stack copy and then reload that to make sure that the
 187     // current and future values are correct.
 188     __ movw(Address(rsp, 0), StubRoutines::x86::fpu_cntrl_wrd_std());
 189   }
 190 
 191   __ frstor(Address(rsp, 0));
 192   if (!verify_fpu) {
 193     // Set the control word so that exceptions are masked for the
 194     // following code.
 195     __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
 196   }
 197 
 198   int off = st0_off;
 199   int delta = st1_off - off;
 200 
 201   // Save the FPU registers in de-opt-able form
 202   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 203     __ fstp_d(Address(rsp, off*wordSize));
 204     off += delta;
 205   }
 206 
 207   off = xmm0_off;
 208   delta = xmm1_off - off;
 209   if(UseSSE == 1) {
 210     // Save the XMM state
 211     for (int n = 0; n < num_xmm_regs; n++) {
 212       __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
 213       off += delta;
 214     }
 215   } else if(UseSSE >= 2) {
 216     // Save whole 128bit (16 bytes) XMM registers
 217     for (int n = 0; n < num_xmm_regs; n++) {
 218       __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
 219       off += delta;
 220     }
 221   }
 222 
 223 #ifdef COMPILER2
 224   if (save_vectors) {
 225     __ subptr(rsp, ymm_bytes);
 226     // Save upper half of YMM registers
 227     for (int n = 0; n < num_xmm_regs; n++) {
 228       __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
 229     }
 230     if (UseAVX > 2) {
 231       __ subptr(rsp, zmm_bytes);
 232       // Save upper half of ZMM registers
 233       for (int n = 0; n < num_xmm_regs; n++) {
 234         __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
 235       }
 236       __ subptr(rsp, opmask_state_bytes);
 237       // Save opmask registers
 238       for (int n = 0; n < KRegisterImpl::number_of_registers; n++) {
 239         __ kmov(Address(rsp, n*8), as_KRegister(n));
 240       }
 241     }
 242   }
 243 #else
 244   assert(!save_vectors, "vectors are generated only by C2");
 245 #endif
 246 
 247   __ vzeroupper();
 248 
 249   // Set an oopmap for the call site.  This oopmap will map all
 250   // oop-registers and debug-info registers as callee-saved.  This
 251   // will allow deoptimization at this safepoint to find all possible
 252   // debug-info recordings, as well as let GC find all oops.
 253 
 254   OopMapSet *oop_maps = new OopMapSet();
 255   OopMap* map =  new OopMap( frame_words, 0 );
 256 
 257 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
 258 #define NEXTREG(x) (x)->as_VMReg()->next()
 259 
 260   map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
 261   map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
 262   map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
 263   map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
 264   // rbp, location is known implicitly, no oopMap
 265   map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
 266   map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
 267 
 268   // %%% This is really a waste but we'll keep things as they were for now for the upper component
 269   off = st0_off;
 270   delta = st1_off - off;
 271   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 272     FloatRegister freg_name = as_FloatRegister(n);
 273     map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
 274     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
 275     off += delta;
 276   }
 277   off = xmm0_off;
 278   delta = xmm1_off - off;
 279   for (int n = 0; n < num_xmm_regs; n++) {
 280     XMMRegister xmm_name = as_XMMRegister(n);
 281     map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
 282     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
 283     off += delta;
 284   }
 285 #undef NEXTREG
 286 #undef STACK_OFFSET
 287 
 288   return map;
 289 }
 290 
 291 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 292   int opmask_state_bytes = 0;
 293   int additional_frame_bytes = 0;
 294   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 295   int ymm_bytes = num_xmm_regs * 16;
 296   int zmm_bytes = num_xmm_regs * 32;
 297   // Recover XMM & FPU state
 298 #ifdef COMPILER2
 299   if (restore_vectors) {
 300     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 301     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 302     // Save upper half of YMM registers
 303     additional_frame_bytes = ymm_bytes;
 304     if (UseAVX > 2) {
 305       // Save upper half of ZMM registers as well
 306       additional_frame_bytes += zmm_bytes;
 307       opmask_state_bytes = KRegisterImpl::number_of_registers * 8;
 308       additional_frame_bytes += opmask_state_bytes;
 309     }
 310   }
 311 #else
 312   assert(!restore_vectors, "vectors are generated only by C2");
 313 #endif
 314 
 315   int off = xmm0_off;
 316   int delta = xmm1_off - off;
 317 
 318   __ vzeroupper();
 319 
 320   if (UseSSE == 1) {
 321     // Restore XMM registers
 322     assert(additional_frame_bytes == 0, "");
 323     for (int n = 0; n < num_xmm_regs; n++) {
 324       __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
 325       off += delta;
 326     }
 327   } else if (UseSSE >= 2) {
 328     // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
 329     // ZMM because the movdqu instruction zeros the upper part of the XMM register.
 330     for (int n = 0; n < num_xmm_regs; n++) {
 331       __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
 332       off += delta;
 333     }
 334   }
 335 
 336   if (restore_vectors) {
 337     off = additional_frame_bytes - ymm_bytes;
 338     // Restore upper half of YMM registers.
 339     for (int n = 0; n < num_xmm_regs; n++) {
 340       __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16+off));
 341     }
 342     if (UseAVX > 2) {
 343       // Restore upper half of ZMM registers.
 344       off = opmask_state_bytes;
 345       for (int n = 0; n < num_xmm_regs; n++) {
 346         __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32+off));
 347       }
 348       for (int n = 0; n < KRegisterImpl::number_of_registers; n++) {
 349         __ kmov(as_KRegister(n), Address(rsp, n*8));
 350       }
 351     }
 352     __ addptr(rsp, additional_frame_bytes);
 353   }
 354 
 355   __ pop_FPU_state();
 356   __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
 357 
 358   __ popf();
 359   __ popa();
 360   // Get the rbp, described implicitly by the frame sender code (no oopMap)
 361   __ pop(rbp);
 362 }
 363 
 364 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 365 
 366   // Just restore result register. Only used by deoptimization. By
 367   // now any callee save register that needs to be restore to a c2
 368   // caller of the deoptee has been extracted into the vframeArray
 369   // and will be stuffed into the c2i adapter we create for later
 370   // restoration so only result registers need to be restored here.
 371   //
 372 
 373   __ frstor(Address(rsp, 0));      // Restore fpu state
 374 
 375   // Recover XMM & FPU state
 376   if( UseSSE == 1 ) {
 377     __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
 378   } else if( UseSSE >= 2 ) {
 379     __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
 380   }
 381   __ movptr(rax, Address(rsp, rax_off*wordSize));
 382   __ movptr(rdx, Address(rsp, rdx_off*wordSize));
 383   // Pop all of the register save are off the stack except the return address
 384   __ addptr(rsp, return_off * wordSize);
 385 }
 386 
 387 // Is vector's size (in bytes) bigger than a size saved by default?
 388 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
 389 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
 390 bool SharedRuntime::is_wide_vector(int size) {
 391   return size > 16;
 392 }
 393 
 394 // The java_calling_convention describes stack locations as ideal slots on
 395 // a frame with no abi restrictions. Since we must observe abi restrictions
 396 // (like the placement of the register window) the slots must be biased by
 397 // the following value.
 398 static int reg2offset_in(VMReg r) {
 399   // Account for saved rbp, and return address
 400   // This should really be in_preserve_stack_slots
 401   return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
 402 }
 403 
 404 static int reg2offset_out(VMReg r) {
 405   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 406 }
 407 
 408 // ---------------------------------------------------------------------------
 409 // Read the array of BasicTypes from a signature, and compute where the
 410 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 411 // quantities.  Values less than SharedInfo::stack0 are registers, those above
 412 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 413 // as framesizes are fixed.
 414 // VMRegImpl::stack0 refers to the first slot 0(sp).
 415 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 416 // up to RegisterImpl::number_of_registers) are the 32-bit
 417 // integer registers.
 418 
 419 // Pass first two oop/int args in registers ECX and EDX.
 420 // Pass first two float/double args in registers XMM0 and XMM1.
 421 // Doubles have precedence, so if you pass a mix of floats and doubles
 422 // the doubles will grab the registers before the floats will.
 423 
 424 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 425 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 426 // units regardless of build. Of course for i486 there is no 64 bit build
 427 
 428 
 429 // ---------------------------------------------------------------------------
 430 // The compiled Java calling convention.
 431 // Pass first two oop/int args in registers ECX and EDX.
 432 // Pass first two float/double args in registers XMM0 and XMM1.
 433 // Doubles have precedence, so if you pass a mix of floats and doubles
 434 // the doubles will grab the registers before the floats will.
 435 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 436                                            VMRegPair *regs,
 437                                            int total_args_passed) {
 438   uint    stack = 0;          // Starting stack position for args on stack
 439 
 440 
 441   // Pass first two oop/int args in registers ECX and EDX.
 442   uint reg_arg0 = 9999;
 443   uint reg_arg1 = 9999;
 444 
 445   // Pass first two float/double args in registers XMM0 and XMM1.
 446   // Doubles have precedence, so if you pass a mix of floats and doubles
 447   // the doubles will grab the registers before the floats will.
 448   // CNC - TURNED OFF FOR non-SSE.
 449   //       On Intel we have to round all doubles (and most floats) at
 450   //       call sites by storing to the stack in any case.
 451   // UseSSE=0 ==> Don't Use ==> 9999+0
 452   // UseSSE=1 ==> Floats only ==> 9999+1
 453   // UseSSE>=2 ==> Floats or doubles ==> 9999+2
 454   enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
 455   uint fargs = (UseSSE>=2) ? 2 : UseSSE;
 456   uint freg_arg0 = 9999+fargs;
 457   uint freg_arg1 = 9999+fargs;
 458 
 459   // Pass doubles & longs aligned on the stack.  First count stack slots for doubles
 460   int i;
 461   for( i = 0; i < total_args_passed; i++) {
 462     if( sig_bt[i] == T_DOUBLE ) {
 463       // first 2 doubles go in registers
 464       if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
 465       else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
 466       else // Else double is passed low on the stack to be aligned.
 467         stack += 2;
 468     } else if( sig_bt[i] == T_LONG ) {
 469       stack += 2;
 470     }
 471   }
 472   int dstack = 0;             // Separate counter for placing doubles
 473 
 474   // Now pick where all else goes.
 475   for( i = 0; i < total_args_passed; i++) {
 476     // From the type and the argument number (count) compute the location
 477     switch( sig_bt[i] ) {
 478     case T_SHORT:
 479     case T_CHAR:
 480     case T_BYTE:
 481     case T_BOOLEAN:
 482     case T_INT:
 483     case T_ARRAY:
 484     case T_OBJECT:
 485     case T_INLINE_TYPE:
 486     case T_ADDRESS:
 487       if( reg_arg0 == 9999 )  {
 488         reg_arg0 = i;
 489         regs[i].set1(rcx->as_VMReg());
 490       } else if( reg_arg1 == 9999 )  {
 491         reg_arg1 = i;
 492         regs[i].set1(rdx->as_VMReg());
 493       } else {
 494         regs[i].set1(VMRegImpl::stack2reg(stack++));
 495       }
 496       break;
 497     case T_FLOAT:
 498       if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
 499         freg_arg0 = i;
 500         regs[i].set1(xmm0->as_VMReg());
 501       } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
 502         freg_arg1 = i;
 503         regs[i].set1(xmm1->as_VMReg());
 504       } else {
 505         regs[i].set1(VMRegImpl::stack2reg(stack++));
 506       }
 507       break;
 508     case T_LONG:
 509       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
 510       regs[i].set2(VMRegImpl::stack2reg(dstack));
 511       dstack += 2;
 512       break;
 513     case T_DOUBLE:
 514       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
 515       if( freg_arg0 == (uint)i ) {
 516         regs[i].set2(xmm0->as_VMReg());
 517       } else if( freg_arg1 == (uint)i ) {
 518         regs[i].set2(xmm1->as_VMReg());
 519       } else {
 520         regs[i].set2(VMRegImpl::stack2reg(dstack));
 521         dstack += 2;
 522       }
 523       break;
 524     case T_VOID: regs[i].set_bad(); break;
 525       break;
 526     default:
 527       ShouldNotReachHere();
 528       break;
 529     }
 530   }
 531 
 532   // return value can be odd number of VMRegImpl stack slots make multiple of 2
 533   return align_up(stack, 2);
 534 }
 535 
 536 const uint SharedRuntime::java_return_convention_max_int = 1;
 537 const uint SharedRuntime::java_return_convention_max_float = 1;
 538 int SharedRuntime::java_return_convention(const BasicType *sig_bt,
 539                                           VMRegPair *regs,
 540                                           int total_args_passed) {
 541   Unimplemented();
 542   return 0;
 543 }
 544 
 545 // Patch the callers callsite with entry to compiled code if it exists.
 546 static void patch_callers_callsite(MacroAssembler *masm) {
 547   Label L;
 548   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 549   __ jcc(Assembler::equal, L);
 550   // Schedule the branch target address early.
 551   // Call into the VM to patch the caller, then jump to compiled callee
 552   // rax, isn't live so capture return address while we easily can
 553   __ movptr(rax, Address(rsp, 0));
 554   __ pusha();
 555   __ pushf();
 556 
 557   if (UseSSE == 1) {
 558     __ subptr(rsp, 2*wordSize);
 559     __ movflt(Address(rsp, 0), xmm0);
 560     __ movflt(Address(rsp, wordSize), xmm1);
 561   }
 562   if (UseSSE >= 2) {
 563     __ subptr(rsp, 4*wordSize);
 564     __ movdbl(Address(rsp, 0), xmm0);
 565     __ movdbl(Address(rsp, 2*wordSize), xmm1);
 566   }
 567 #ifdef COMPILER2
 568   // C2 may leave the stack dirty if not in SSE2+ mode
 569   if (UseSSE >= 2) {
 570     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 571   } else {
 572     __ empty_FPU_stack();
 573   }
 574 #endif /* COMPILER2 */
 575 
 576   // VM needs caller's callsite
 577   __ push(rax);
 578   // VM needs target method
 579   __ push(rbx);
 580   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 581   __ addptr(rsp, 2*wordSize);
 582 
 583   if (UseSSE == 1) {
 584     __ movflt(xmm0, Address(rsp, 0));
 585     __ movflt(xmm1, Address(rsp, wordSize));
 586     __ addptr(rsp, 2*wordSize);
 587   }
 588   if (UseSSE >= 2) {
 589     __ movdbl(xmm0, Address(rsp, 0));
 590     __ movdbl(xmm1, Address(rsp, 2*wordSize));
 591     __ addptr(rsp, 4*wordSize);
 592   }
 593 
 594   __ popf();
 595   __ popa();
 596   __ bind(L);
 597 }
 598 
 599 
 600 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
 601   int next_off = st_off - Interpreter::stackElementSize;
 602   __ movdbl(Address(rsp, next_off), r);
 603 }
 604 
 605 static void gen_c2i_adapter(MacroAssembler *masm,
 606                             const GrowableArray<SigEntry>& sig_extended,


 607                             const VMRegPair *regs,
 608                             Label& skip_fixup,
 609                             address start,
 610                             OopMapSet*& oop_maps,
 611                             int& frame_complete,
 612                             int& frame_size_in_words) {
 613   // Before we get into the guts of the C2I adapter, see if we should be here
 614   // at all.  We've come from compiled code and are attempting to jump to the
 615   // interpreter, which means the caller made a static call to get here
 616   // (vcalls always get a compiled target if there is one).  Check for a
 617   // compiled target.  If there is one, we need to patch the caller's call.
 618   patch_callers_callsite(masm);
 619 
 620   __ bind(skip_fixup);
 621 
 622 #ifdef COMPILER2
 623   // C2 may leave the stack dirty if not in SSE2+ mode
 624   if (UseSSE >= 2) {
 625     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 626   } else {
 627     __ empty_FPU_stack();
 628   }
 629 #endif /* COMPILER2 */
 630 
 631   // Since all args are passed on the stack, total_args_passed * interpreter_
 632   // stack_element_size  is the
 633   // space we need.
 634   int extraspace = sig_extended.length() * Interpreter::stackElementSize;
 635 
 636   // Get return address
 637   __ pop(rax);
 638 
 639   // set senderSP value
 640   __ movptr(rsi, rsp);
 641 
 642   __ subptr(rsp, extraspace);
 643 
 644   // Now write the args into the outgoing interpreter space
 645   for (int i = 0; i < sig_extended.length(); i++) {
 646     if (sig_extended.at(i)._bt == T_VOID) {
 647       assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
 648       continue;
 649     }
 650 
 651     // st_off points to lowest address on stack.
 652     int st_off = ((sig_extended.length() - 1) - i) * Interpreter::stackElementSize;
 653     int next_off = st_off - Interpreter::stackElementSize;
 654 
 655     // Say 4 args:
 656     // i   st_off
 657     // 0   12 T_LONG
 658     // 1    8 T_VOID
 659     // 2    4 T_OBJECT
 660     // 3    0 T_BOOL
 661     VMReg r_1 = regs[i].first();
 662     VMReg r_2 = regs[i].second();
 663     if (!r_1->is_valid()) {
 664       assert(!r_2->is_valid(), "");
 665       continue;
 666     }
 667 
 668     if (r_1->is_stack()) {
 669       // memory to memory use fpu stack top
 670       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 671 
 672       if (!r_2->is_valid()) {
 673         __ movl(rdi, Address(rsp, ld_off));
 674         __ movptr(Address(rsp, st_off), rdi);
 675       } else {
 676 
 677         // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
 678         // st_off == MSW, st_off-wordSize == LSW
 679 
 680         __ movptr(rdi, Address(rsp, ld_off));
 681         __ movptr(Address(rsp, next_off), rdi);
 682 #ifndef _LP64
 683         __ movptr(rdi, Address(rsp, ld_off + wordSize));
 684         __ movptr(Address(rsp, st_off), rdi);
 685 #else
 686 #ifdef ASSERT
 687         // Overwrite the unused slot with known junk
 688         __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 689         __ movptr(Address(rsp, st_off), rax);
 690 #endif /* ASSERT */
 691 #endif // _LP64
 692       }
 693     } else if (r_1->is_Register()) {
 694       Register r = r_1->as_Register();
 695       if (!r_2->is_valid()) {
 696         __ movl(Address(rsp, st_off), r);
 697       } else {
 698         // long/double in gpr
 699         NOT_LP64(ShouldNotReachHere());
 700         // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 701         // T_DOUBLE and T_LONG use two slots in the interpreter
 702         if (sig_extended.at(i)._bt == T_LONG || sig_extended.at(i)._bt == T_DOUBLE) {
 703           // long/double in gpr
 704 #ifdef ASSERT
 705           // Overwrite the unused slot with known junk
 706           LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
 707           __ movptr(Address(rsp, st_off), rax);
 708 #endif /* ASSERT */
 709           __ movptr(Address(rsp, next_off), r);
 710         } else {
 711           __ movptr(Address(rsp, st_off), r);
 712         }
 713       }
 714     } else {
 715       assert(r_1->is_XMMRegister(), "");
 716       if (!r_2->is_valid()) {
 717         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 718       } else {
 719         assert(sig_extended.at(i)._bt == T_DOUBLE || sig_extended.at(i)._bt == T_LONG, "wrong type");
 720         move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
 721       }
 722     }
 723   }
 724 
 725   // Schedule the branch target address early.
 726   __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
 727   // And repush original return address
 728   __ push(rax);
 729   __ jmp(rcx);
 730 }
 731 
 732 
 733 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
 734   int next_val_off = ld_off - Interpreter::stackElementSize;
 735   __ movdbl(r, Address(saved_sp, next_val_off));
 736 }
 737 
 738 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
 739                         address code_start, address code_end,
 740                         Label& L_ok) {
 741   Label L_fail;
 742   __ lea(temp_reg, ExternalAddress(code_start));
 743   __ cmpptr(pc_reg, temp_reg);
 744   __ jcc(Assembler::belowEqual, L_fail);
 745   __ lea(temp_reg, ExternalAddress(code_end));
 746   __ cmpptr(pc_reg, temp_reg);
 747   __ jcc(Assembler::below, L_ok);
 748   __ bind(L_fail);
 749 }
 750 
 751 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,

 752                                     int comp_args_on_stack,
 753                                     const GrowableArray<SigEntry>& sig_extended,
 754                                     const VMRegPair *regs) {
 755 
 756   // Note: rsi contains the senderSP on entry. We must preserve it since
 757   // we may do a i2c -> c2i transition if we lose a race where compiled
 758   // code goes non-entrant while we get args ready.
 759 
 760   // Adapters can be frameless because they do not require the caller
 761   // to perform additional cleanup work, such as correcting the stack pointer.
 762   // An i2c adapter is frameless because the *caller* frame, which is interpreted,
 763   // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
 764   // even if a callee has modified the stack pointer.
 765   // A c2i adapter is frameless because the *callee* frame, which is interpreted,
 766   // routinely repairs its caller's stack pointer (from sender_sp, which is set
 767   // up via the senderSP register).
 768   // In other words, if *either* the caller or callee is interpreted, we can
 769   // get the stack pointer repaired after a call.
 770   // This is why c2i and i2c adapters cannot be indefinitely composed.
 771   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 772   // both caller and callee would be compiled methods, and neither would
 773   // clean up the stack pointer changes performed by the two adapters.
 774   // If this happens, control eventually transfers back to the compiled
 775   // caller, but with an uncorrected stack, causing delayed havoc.
 776 
 777   // Pick up the return address
 778   __ movptr(rax, Address(rsp, 0));
 779 
 780   if (VerifyAdapterCalls &&
 781       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 782     // So, let's test for cascading c2i/i2c adapters right now.
 783     //  assert(Interpreter::contains($return_addr) ||
 784     //         StubRoutines::contains($return_addr),
 785     //         "i2c adapter must return to an interpreter frame");
 786     __ block_comment("verify_i2c { ");
 787     Label L_ok;
 788     if (Interpreter::code() != NULL)
 789       range_check(masm, rax, rdi,
 790                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 791                   L_ok);
 792     if (StubRoutines::code1() != NULL)
 793       range_check(masm, rax, rdi,
 794                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 795                   L_ok);
 796     if (StubRoutines::code2() != NULL)
 797       range_check(masm, rax, rdi,
 798                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 799                   L_ok);
 800     const char* msg = "i2c adapter must return to an interpreter frame";
 801     __ block_comment(msg);
 802     __ stop(msg);
 803     __ bind(L_ok);
 804     __ block_comment("} verify_i2ce ");
 805   }
 806 
 807   // Must preserve original SP for loading incoming arguments because
 808   // we need to align the outgoing SP for compiled code.
 809   __ movptr(rdi, rsp);
 810 
 811   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 812   // in registers, we will occasionally have no stack args.
 813   int comp_words_on_stack = 0;
 814   if (comp_args_on_stack) {
 815     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 816     // registers are below.  By subtracting stack0, we either get a negative
 817     // number (all values in registers) or the maximum stack slot accessed.
 818     // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
 819     // Convert 4-byte stack slots to words.
 820     comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
 821     // Round up to miminum stack alignment, in wordSize
 822     comp_words_on_stack = align_up(comp_words_on_stack, 2);
 823     __ subptr(rsp, comp_words_on_stack * wordSize);
 824   }
 825 
 826   // Align the outgoing SP
 827   __ andptr(rsp, -(StackAlignmentInBytes));
 828 
 829   // push the return address on the stack (note that pushing, rather
 830   // than storing it, yields the correct frame alignment for the callee)
 831   __ push(rax);
 832 
 833   // Put saved SP in another register
 834   const Register saved_sp = rax;
 835   __ movptr(saved_sp, rdi);
 836 
 837 
 838   // Will jump to the compiled code just as if compiled code was doing it.
 839   // Pre-load the register-jump target early, to schedule it better.
 840   __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
 841 
 842   // Now generate the shuffle code.  Pick up all register args and move the
 843   // rest through the floating point stack top.
 844   for (int i = 0; i < sig_extended.length(); i++) {
 845     if (sig_extended.at(i)._bt == T_VOID) {
 846       // Longs and doubles are passed in native word order, but misaligned
 847       // in the 32-bit build.
 848       assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
 849       continue;
 850     }
 851 
 852     // Pick up 0, 1 or 2 words from SP+offset.
 853 
 854     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 855             "scrambled load targets?");
 856     // Load in argument order going down.
 857     int ld_off = (sig_extended.length() - i) * Interpreter::stackElementSize;
 858     // Point to interpreter value (vs. tag)
 859     int next_off = ld_off - Interpreter::stackElementSize;
 860     //
 861     //
 862     //
 863     VMReg r_1 = regs[i].first();
 864     VMReg r_2 = regs[i].second();
 865     if (!r_1->is_valid()) {
 866       assert(!r_2->is_valid(), "");
 867       continue;
 868     }
 869     if (r_1->is_stack()) {
 870       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 871       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 872 
 873       // We can use rsi as a temp here because compiled code doesn't need rsi as an input
 874       // and if we end up going thru a c2i because of a miss a reasonable value of rsi
 875       // we be generated.
 876       if (!r_2->is_valid()) {
 877         // __ fld_s(Address(saved_sp, ld_off));
 878         // __ fstp_s(Address(rsp, st_off));
 879         __ movl(rsi, Address(saved_sp, ld_off));
 880         __ movptr(Address(rsp, st_off), rsi);
 881       } else {
 882         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 883         // are accessed as negative so LSW is at LOW address
 884 
 885         // ld_off is MSW so get LSW
 886         // st_off is LSW (i.e. reg.first())
 887         // __ fld_d(Address(saved_sp, next_off));
 888         // __ fstp_d(Address(rsp, st_off));
 889         //
 890         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 891         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 892         // So we must adjust where to pick up the data to match the interpreter.
 893         //
 894         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 895         // are accessed as negative so LSW is at LOW address
 896 
 897         // ld_off is MSW so get LSW
 898         const int offset = (NOT_LP64(true ||) sig_extended.at(i)._bt==T_LONG||sig_extended.at(i)._bt==T_DOUBLE)?
 899                            next_off : ld_off;
 900         __ movptr(rsi, Address(saved_sp, offset));
 901         __ movptr(Address(rsp, st_off), rsi);
 902 #ifndef _LP64
 903         __ movptr(rsi, Address(saved_sp, ld_off));
 904         __ movptr(Address(rsp, st_off + wordSize), rsi);
 905 #endif // _LP64
 906       }
 907     } else if (r_1->is_Register()) {  // Register argument
 908       Register r = r_1->as_Register();
 909       assert(r != rax, "must be different");
 910       if (r_2->is_valid()) {
 911         //
 912         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 913         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 914         // So we must adjust where to pick up the data to match the interpreter.
 915 
 916         const int offset = (NOT_LP64(true ||) sig_extended.at(i)._bt==T_LONG||sig_extended.at(i)._bt==T_DOUBLE)?
 917                            next_off : ld_off;
 918 
 919         // this can be a misaligned move
 920         __ movptr(r, Address(saved_sp, offset));
 921 #ifndef _LP64
 922         assert(r_2->as_Register() != rax, "need another temporary register");
 923         // Remember r_1 is low address (and LSB on x86)
 924         // So r_2 gets loaded from high address regardless of the platform
 925         __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
 926 #endif // _LP64
 927       } else {
 928         __ movl(r, Address(saved_sp, ld_off));
 929       }
 930     } else {
 931       assert(r_1->is_XMMRegister(), "");
 932       if (!r_2->is_valid()) {
 933         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 934       } else {
 935         move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
 936       }
 937     }
 938   }
 939 
 940   // 6243940 We might end up in handle_wrong_method if
 941   // the callee is deoptimized as we race thru here. If that
 942   // happens we don't want to take a safepoint because the
 943   // caller frame will look interpreted and arguments are now
 944   // "compiled" so it is much better to make this transition
 945   // invisible to the stack walking code. Unfortunately if
 946   // we try and find the callee by normal means a safepoint
 947   // is possible. So we stash the desired callee in the thread
 948   // and the vm will find there should this case occur.
 949 
 950   __ get_thread(rax);
 951   __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
 952 
 953   // move Method* to rax, in case we end up in an c2i adapter.
 954   // the c2i adapters expect Method* in rax, (c2) because c2's
 955   // resolve stubs return the result (the method) in rax,.
 956   // I'd love to fix this.
 957   __ mov(rax, rbx);
 958 
 959   __ jmp(rdi);
 960 }
 961 
 962 // ---------------------------------------------------------------
 963 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,

 964                                                             int comp_args_on_stack,
 965                                                             const GrowableArray<SigEntry>& sig_extended,
 966                                                             const VMRegPair *regs,
 967                                                             AdapterFingerPrint* fingerprint,
 968                                                             AdapterBlob*& new_adapter) {
 969   address i2c_entry = __ pc();
 970 
 971   gen_i2c_adapter(masm, comp_args_on_stack, sig_extended, regs);
 972 
 973   // -------------------------------------------------------------------------
 974   // Generate a C2I adapter.  On entry we know rbx, holds the Method* during calls
 975   // to the interpreter.  The args start out packed in the compiled layout.  They
 976   // need to be unpacked into the interpreter layout.  This will almost always
 977   // require some stack space.  We grow the current (compiled) stack, then repack
 978   // the args.  We  finally end in a jump to the generic interpreter entry point.
 979   // On exit from the interpreter, the interpreter will restore our SP (lest the
 980   // compiled code, which relys solely on SP and not EBP, get sick).
 981 
 982   address c2i_unverified_entry = __ pc();
 983   Label skip_fixup;
 984 
 985   Register holder = rax;
 986   Register receiver = rcx;
 987   Register temp = rbx;
 988 
 989   {
 990 
 991     Label missed;
 992     __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
 993     __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
 994     __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
 995     __ jcc(Assembler::notEqual, missed);
 996     // Method might have been compiled since the call site was patched to
 997     // interpreted if that is the case treat it as a miss so we can get
 998     // the call site corrected.
 999     __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
1000     __ jcc(Assembler::equal, skip_fixup);
1001 
1002     __ bind(missed);
1003     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1004   }
1005 
1006   address c2i_entry = __ pc();
1007 
1008   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1009   bs->c2i_entry_barrier(masm);
1010 
1011   OopMapSet* oop_maps = NULL;
1012   int frame_complete = CodeOffsets::frame_never_safe;
1013   int frame_size_in_words = 0;
1014   gen_c2i_adapter(masm, sig_extended, regs, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words);
1015 
1016   __ flush();
1017   new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps);
1018   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1019 }
1020 
1021 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1022                                          VMRegPair *regs,
1023                                          VMRegPair *regs2,
1024                                          int total_args_passed) {
1025   assert(regs2 == NULL, "not needed on x86");
1026 // We return the amount of VMRegImpl stack slots we need to reserve for all
1027 // the arguments NOT counting out_preserve_stack_slots.
1028 
1029   uint    stack = 0;        // All arguments on stack
1030 
1031   for( int i = 0; i < total_args_passed; i++) {
1032     // From the type and the argument number (count) compute the location
1033     switch( sig_bt[i] ) {
1034     case T_BOOLEAN:
1035     case T_CHAR:
1036     case T_FLOAT:
1037     case T_BYTE:
1038     case T_SHORT:
1039     case T_INT:
1040     case T_OBJECT:
1041     case T_INLINE_TYPE:
1042     case T_ARRAY:
1043     case T_ADDRESS:
1044     case T_METADATA:
1045       regs[i].set1(VMRegImpl::stack2reg(stack++));
1046       break;
1047     case T_LONG:
1048     case T_DOUBLE: // The stack numbering is reversed from Java
1049       // Since C arguments do not get reversed, the ordering for
1050       // doubles on the stack must be opposite the Java convention
1051       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1052       regs[i].set2(VMRegImpl::stack2reg(stack));
1053       stack += 2;
1054       break;
1055     case T_VOID: regs[i].set_bad(); break;
1056     default:
1057       ShouldNotReachHere();
1058       break;
1059     }
1060   }
1061   return stack;
1062 }
1063 
1064 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1065                                              uint num_bits,
1066                                              uint total_args_passed) {
1067   Unimplemented();
1068   return 0;
1069 }
1070 
1071 // A simple move of integer like type
1072 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1073   if (src.first()->is_stack()) {
1074     if (dst.first()->is_stack()) {
1075       // stack to stack
1076       // __ ld(FP, reg2offset(src.first()), L5);
1077       // __ st(L5, SP, reg2offset(dst.first()));
1078       __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1079       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1080     } else {
1081       // stack to reg
1082       __ movl2ptr(dst.first()->as_Register(),  Address(rbp, reg2offset_in(src.first())));
1083     }
1084   } else if (dst.first()->is_stack()) {
1085     // reg to stack
1086     // no need to sign extend on 64bit
1087     __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1088   } else {
1089     if (dst.first() != src.first()) {
1090       __ mov(dst.first()->as_Register(), src.first()->as_Register());
1091     }
1092   }
1093 }
1094 
1095 // An oop arg. Must pass a handle not the oop itself
1096 static void object_move(MacroAssembler* masm,
1097                         OopMap* map,
1098                         int oop_handle_offset,
1099                         int framesize_in_slots,
1100                         VMRegPair src,
1101                         VMRegPair dst,
1102                         bool is_receiver,
1103                         int* receiver_offset) {
1104 
1105   // Because of the calling conventions we know that src can be a
1106   // register or a stack location. dst can only be a stack location.
1107 
1108   assert(dst.first()->is_stack(), "must be stack");
1109   // must pass a handle. First figure out the location we use as a handle
1110 
1111   if (src.first()->is_stack()) {
1112     // Oop is already on the stack as an argument
1113     Register rHandle = rax;
1114     Label nil;
1115     __ xorptr(rHandle, rHandle);
1116     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1117     __ jcc(Assembler::equal, nil);
1118     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1119     __ bind(nil);
1120     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1121 
1122     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1123     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1124     if (is_receiver) {
1125       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1126     }
1127   } else {
1128     // Oop is in an a register we must store it to the space we reserve
1129     // on the stack for oop_handles
1130     const Register rOop = src.first()->as_Register();
1131     const Register rHandle = rax;
1132     int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1133     int offset = oop_slot*VMRegImpl::stack_slot_size;
1134     Label skip;
1135     __ movptr(Address(rsp, offset), rOop);
1136     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1137     __ xorptr(rHandle, rHandle);
1138     __ cmpptr(rOop, (int32_t)NULL_WORD);
1139     __ jcc(Assembler::equal, skip);
1140     __ lea(rHandle, Address(rsp, offset));
1141     __ bind(skip);
1142     // Store the handle parameter
1143     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1144     if (is_receiver) {
1145       *receiver_offset = offset;
1146     }
1147   }
1148 }
1149 
1150 // A float arg may have to do float reg int reg conversion
1151 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1152   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1153 
1154   // Because of the calling convention we know that src is either a stack location
1155   // or an xmm register. dst can only be a stack location.
1156 
1157   assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1158 
1159   if (src.first()->is_stack()) {
1160     __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1161     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1162   } else {
1163     // reg to stack
1164     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1165   }
1166 }
1167 
1168 // A long move
1169 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1170 
1171   // The only legal possibility for a long_move VMRegPair is:
1172   // 1: two stack slots (possibly unaligned)
1173   // as neither the java  or C calling convention will use registers
1174   // for longs.
1175 
1176   if (src.first()->is_stack() && dst.first()->is_stack()) {
1177     assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1178     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1179     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1180     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1181     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1182   } else {
1183     ShouldNotReachHere();
1184   }
1185 }
1186 
1187 // A double move
1188 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1189 
1190   // The only legal possibilities for a double_move VMRegPair are:
1191   // The painful thing here is that like long_move a VMRegPair might be
1192 
1193   // Because of the calling convention we know that src is either
1194   //   1: a single physical register (xmm registers only)
1195   //   2: two stack slots (possibly unaligned)
1196   // dst can only be a pair of stack slots.
1197 
1198   assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1199 
1200   if (src.first()->is_stack()) {
1201     // source is all stack
1202     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1203     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1204     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1205     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1206   } else {
1207     // reg to stack
1208     // No worries about stack alignment
1209     __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1210   }
1211 }
1212 
1213 
1214 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1215   // We always ignore the frame_slots arg and just use the space just below frame pointer
1216   // which by this time is free to use
1217   switch (ret_type) {
1218   case T_FLOAT:
1219     __ fstp_s(Address(rbp, -wordSize));
1220     break;
1221   case T_DOUBLE:
1222     __ fstp_d(Address(rbp, -2*wordSize));
1223     break;
1224   case T_VOID:  break;
1225   case T_LONG:
1226     __ movptr(Address(rbp, -wordSize), rax);
1227     NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1228     break;
1229   default: {
1230     __ movptr(Address(rbp, -wordSize), rax);
1231     }
1232   }
1233 }
1234 
1235 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1236   // We always ignore the frame_slots arg and just use the space just below frame pointer
1237   // which by this time is free to use
1238   switch (ret_type) {
1239   case T_FLOAT:
1240     __ fld_s(Address(rbp, -wordSize));
1241     break;
1242   case T_DOUBLE:
1243     __ fld_d(Address(rbp, -2*wordSize));
1244     break;
1245   case T_LONG:
1246     __ movptr(rax, Address(rbp, -wordSize));
1247     NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1248     break;
1249   case T_VOID:  break;
1250   default: {
1251     __ movptr(rax, Address(rbp, -wordSize));
1252     }
1253   }
1254 }
1255 
1256 // Unpack an array argument into a pointer to the body and the length
1257 // if the array is non-null, otherwise pass 0 for both.
1258 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1259   Register tmp_reg = rax;
1260   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1261          "possible collision");
1262   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1263          "possible collision");
1264 
1265   // Pass the length, ptr pair
1266   Label is_null, done;
1267   VMRegPair tmp(tmp_reg->as_VMReg());
1268   if (reg.first()->is_stack()) {
1269     // Load the arg up from the stack
1270     simple_move32(masm, reg, tmp);
1271     reg = tmp;
1272   }
1273   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1274   __ jccb(Assembler::equal, is_null);
1275   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1276   simple_move32(masm, tmp, body_arg);
1277   // load the length relative to the body.
1278   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1279                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1280   simple_move32(masm, tmp, length_arg);
1281   __ jmpb(done);
1282   __ bind(is_null);
1283   // Pass zeros
1284   __ xorptr(tmp_reg, tmp_reg);
1285   simple_move32(masm, tmp, body_arg);
1286   simple_move32(masm, tmp, length_arg);
1287   __ bind(done);
1288 }
1289 
1290 static void verify_oop_args(MacroAssembler* masm,
1291                             const methodHandle& method,
1292                             const BasicType* sig_bt,
1293                             const VMRegPair* regs) {
1294   Register temp_reg = rbx;  // not part of any compiled calling seq
1295   if (VerifyOops) {
1296     for (int i = 0; i < method->size_of_parameters(); i++) {
1297       if (is_reference_type(sig_bt[i])) {
1298         VMReg r = regs[i].first();
1299         assert(r->is_valid(), "bad oop arg");
1300         if (r->is_stack()) {
1301           __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1302           __ verify_oop(temp_reg);
1303         } else {
1304           __ verify_oop(r->as_Register());
1305         }
1306       }
1307     }
1308   }
1309 }
1310 
1311 static void gen_special_dispatch(MacroAssembler* masm,
1312                                  const methodHandle& method,
1313                                  const BasicType* sig_bt,
1314                                  const VMRegPair* regs) {
1315   verify_oop_args(masm, method, sig_bt, regs);
1316   vmIntrinsics::ID iid = method->intrinsic_id();
1317 
1318   // Now write the args into the outgoing interpreter space
1319   bool     has_receiver   = false;
1320   Register receiver_reg   = noreg;
1321   int      member_arg_pos = -1;
1322   Register member_reg     = noreg;
1323   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1324   if (ref_kind != 0) {
1325     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1326     member_reg = rbx;  // known to be free at this point
1327     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1328   } else if (iid == vmIntrinsics::_invokeBasic) {
1329     has_receiver = true;
1330   } else {
1331     fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1332   }
1333 
1334   if (member_reg != noreg) {
1335     // Load the member_arg into register, if necessary.
1336     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1337     VMReg r = regs[member_arg_pos].first();
1338     if (r->is_stack()) {
1339       __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1340     } else {
1341       // no data motion is needed
1342       member_reg = r->as_Register();
1343     }
1344   }
1345 
1346   if (has_receiver) {
1347     // Make sure the receiver is loaded into a register.
1348     assert(method->size_of_parameters() > 0, "oob");
1349     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1350     VMReg r = regs[0].first();
1351     assert(r->is_valid(), "bad receiver arg");
1352     if (r->is_stack()) {
1353       // Porting note:  This assumes that compiled calling conventions always
1354       // pass the receiver oop in a register.  If this is not true on some
1355       // platform, pick a temp and load the receiver from stack.
1356       fatal("receiver always in a register");
1357       receiver_reg = rcx;  // known to be free at this point
1358       __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1359     } else {
1360       // no data motion is needed
1361       receiver_reg = r->as_Register();
1362     }
1363   }
1364 
1365   // Figure out which address we are really jumping to:
1366   MethodHandles::generate_method_handle_dispatch(masm, iid,
1367                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1368 }
1369 
1370 // ---------------------------------------------------------------------------
1371 // Generate a native wrapper for a given method.  The method takes arguments
1372 // in the Java compiled code convention, marshals them to the native
1373 // convention (handlizes oops, etc), transitions to native, makes the call,
1374 // returns to java state (possibly blocking), unhandlizes any result and
1375 // returns.
1376 //
1377 // Critical native functions are a shorthand for the use of
1378 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1379 // functions.  The wrapper is expected to unpack the arguments before
1380 // passing them to the callee. Critical native functions leave the state _in_Java,
1381 // since they cannot stop for GC.
1382 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1383 // block and the check for pending exceptions it's impossible for them
1384 // to be thrown.
1385 //
1386 //
1387 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1388                                                 const methodHandle& method,
1389                                                 int compile_id,
1390                                                 BasicType* in_sig_bt,
1391                                                 VMRegPair* in_regs,
1392                                                 BasicType ret_type,
1393                                                 address critical_entry) {
1394   if (method->is_method_handle_intrinsic()) {
1395     vmIntrinsics::ID iid = method->intrinsic_id();
1396     intptr_t start = (intptr_t)__ pc();
1397     int vep_offset = ((intptr_t)__ pc()) - start;
1398     gen_special_dispatch(masm,
1399                          method,
1400                          in_sig_bt,
1401                          in_regs);
1402     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1403     __ flush();
1404     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1405     return nmethod::new_native_nmethod(method,
1406                                        compile_id,
1407                                        masm->code(),
1408                                        vep_offset,
1409                                        frame_complete,
1410                                        stack_slots / VMRegImpl::slots_per_word,
1411                                        in_ByteSize(-1),
1412                                        in_ByteSize(-1),
1413                                        (OopMapSet*)NULL);
1414   }
1415   bool is_critical_native = true;
1416   address native_func = critical_entry;
1417   if (native_func == NULL) {
1418     native_func = method->native_function();
1419     is_critical_native = false;
1420   }
1421   assert(native_func != NULL, "must have function");
1422 
1423   // An OopMap for lock (and class if static)
1424   OopMapSet *oop_maps = new OopMapSet();
1425 
1426   // We have received a description of where all the java arg are located
1427   // on entry to the wrapper. We need to convert these args to where
1428   // the jni function will expect them. To figure out where they go
1429   // we convert the java signature to a C signature by inserting
1430   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1431 
1432   const int total_in_args = method->size_of_parameters();
1433   int total_c_args = total_in_args;
1434   if (!is_critical_native) {
1435     total_c_args += 1;
1436     if (method->is_static()) {
1437       total_c_args++;
1438     }
1439   } else {
1440     for (int i = 0; i < total_in_args; i++) {
1441       if (in_sig_bt[i] == T_ARRAY) {
1442         total_c_args++;
1443       }
1444     }
1445   }
1446 
1447   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1448   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1449   BasicType* in_elem_bt = NULL;
1450 
1451   int argc = 0;
1452   if (!is_critical_native) {
1453     out_sig_bt[argc++] = T_ADDRESS;
1454     if (method->is_static()) {
1455       out_sig_bt[argc++] = T_OBJECT;
1456     }
1457 
1458     for (int i = 0; i < total_in_args ; i++ ) {
1459       out_sig_bt[argc++] = in_sig_bt[i];
1460     }
1461   } else {
1462     in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1463     SignatureStream ss(method->signature());
1464     for (int i = 0; i < total_in_args ; i++ ) {
1465       if (in_sig_bt[i] == T_ARRAY) {
1466         // Arrays are passed as int, elem* pair
1467         out_sig_bt[argc++] = T_INT;
1468         out_sig_bt[argc++] = T_ADDRESS;
1469         ss.skip_array_prefix(1);  // skip one '['
1470         assert(ss.is_primitive(), "primitive type expected");
1471         in_elem_bt[i] = ss.type();
1472       } else {
1473         out_sig_bt[argc++] = in_sig_bt[i];
1474         in_elem_bt[i] = T_VOID;
1475       }
1476       if (in_sig_bt[i] != T_VOID) {
1477         assert(in_sig_bt[i] == ss.type() ||
1478                in_sig_bt[i] == T_ARRAY, "must match");
1479         ss.next();
1480       }
1481     }
1482   }
1483 
1484   // Now figure out where the args must be stored and how much stack space
1485   // they require.
1486   int out_arg_slots;
1487   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1488 
1489   // Compute framesize for the wrapper.  We need to handlize all oops in
1490   // registers a max of 2 on x86.
1491 
1492   // Calculate the total number of stack slots we will need.
1493 
1494   // First count the abi requirement plus all of the outgoing args
1495   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1496 
1497   // Now the space for the inbound oop handle area
1498   int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1499   if (is_critical_native) {
1500     // Critical natives may have to call out so they need a save area
1501     // for register arguments.
1502     int double_slots = 0;
1503     int single_slots = 0;
1504     for ( int i = 0; i < total_in_args; i++) {
1505       if (in_regs[i].first()->is_Register()) {
1506         const Register reg = in_regs[i].first()->as_Register();
1507         switch (in_sig_bt[i]) {
1508           case T_ARRAY:  // critical array (uses 2 slots on LP64)
1509           case T_BOOLEAN:
1510           case T_BYTE:
1511           case T_SHORT:
1512           case T_CHAR:
1513           case T_INT:  single_slots++; break;
1514           case T_LONG: double_slots++; break;
1515           default:  ShouldNotReachHere();
1516         }
1517       } else if (in_regs[i].first()->is_XMMRegister()) {
1518         switch (in_sig_bt[i]) {
1519           case T_FLOAT:  single_slots++; break;
1520           case T_DOUBLE: double_slots++; break;
1521           default:  ShouldNotReachHere();
1522         }
1523       } else if (in_regs[i].first()->is_FloatRegister()) {
1524         ShouldNotReachHere();
1525       }
1526     }
1527     total_save_slots = double_slots * 2 + single_slots;
1528     // align the save area
1529     if (double_slots != 0) {
1530       stack_slots = align_up(stack_slots, 2);
1531     }
1532   }
1533 
1534   int oop_handle_offset = stack_slots;
1535   stack_slots += total_save_slots;
1536 
1537   // Now any space we need for handlizing a klass if static method
1538 
1539   int klass_slot_offset = 0;
1540   int klass_offset = -1;
1541   int lock_slot_offset = 0;
1542   bool is_static = false;
1543 
1544   if (method->is_static()) {
1545     klass_slot_offset = stack_slots;
1546     stack_slots += VMRegImpl::slots_per_word;
1547     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1548     is_static = true;
1549   }
1550 
1551   // Plus a lock if needed
1552 
1553   if (method->is_synchronized()) {
1554     lock_slot_offset = stack_slots;
1555     stack_slots += VMRegImpl::slots_per_word;
1556   }
1557 
1558   // Now a place (+2) to save return values or temp during shuffling
1559   // + 2 for return address (which we own) and saved rbp,
1560   stack_slots += 4;
1561 
1562   // Ok The space we have allocated will look like:
1563   //
1564   //
1565   // FP-> |                     |
1566   //      |---------------------|
1567   //      | 2 slots for moves   |
1568   //      |---------------------|
1569   //      | lock box (if sync)  |
1570   //      |---------------------| <- lock_slot_offset  (-lock_slot_rbp_offset)
1571   //      | klass (if static)   |
1572   //      |---------------------| <- klass_slot_offset
1573   //      | oopHandle area      |
1574   //      |---------------------| <- oop_handle_offset (a max of 2 registers)
1575   //      | outbound memory     |
1576   //      | based arguments     |
1577   //      |                     |
1578   //      |---------------------|
1579   //      |                     |
1580   // SP-> | out_preserved_slots |
1581   //
1582   //
1583   // ****************************************************************************
1584   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1585   // arguments off of the stack after the jni call. Before the call we can use
1586   // instructions that are SP relative. After the jni call we switch to FP
1587   // relative instructions instead of re-adjusting the stack on windows.
1588   // ****************************************************************************
1589 
1590 
1591   // Now compute actual number of stack words we need rounding to make
1592   // stack properly aligned.
1593   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1594 
1595   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1596 
1597   intptr_t start = (intptr_t)__ pc();
1598 
1599   // First thing make an ic check to see if we should even be here
1600 
1601   // We are free to use all registers as temps without saving them and
1602   // restoring them except rbp. rbp is the only callee save register
1603   // as far as the interpreter and the compiler(s) are concerned.
1604 
1605 
1606   const Register ic_reg = rax;
1607   const Register receiver = rcx;
1608   Label hit;
1609   Label exception_pending;
1610 
1611   __ verify_oop(receiver);
1612   __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1613   __ jcc(Assembler::equal, hit);
1614 
1615   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1616 
1617   // verified entry must be aligned for code patching.
1618   // and the first 5 bytes must be in the same cache line
1619   // if we align at 8 then we will be sure 5 bytes are in the same line
1620   __ align(8);
1621 
1622   __ bind(hit);
1623 
1624   int vep_offset = ((intptr_t)__ pc()) - start;
1625 
1626 #ifdef COMPILER1
1627   // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1628   if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1629     inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1630    }
1631 #endif // COMPILER1
1632 
1633   // The instruction at the verified entry point must be 5 bytes or longer
1634   // because it can be patched on the fly by make_non_entrant. The stack bang
1635   // instruction fits that requirement.
1636 
1637   // Generate stack overflow check
1638   __ bang_stack_with_offset((int)StackOverflow::stack_shadow_zone_size());
1639 
1640   // Generate a new frame for the wrapper.
1641   __ enter();
1642   // -2 because return address is already present and so is saved rbp
1643   __ subptr(rsp, stack_size - 2*wordSize);
1644 
1645 
1646   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1647   bs->nmethod_entry_barrier(masm);
1648 
1649   // Frame is now completed as far as size and linkage.
1650   int frame_complete = ((intptr_t)__ pc()) - start;
1651 
1652   if (UseRTMLocking) {
1653     // Abort RTM transaction before calling JNI
1654     // because critical section will be large and will be
1655     // aborted anyway. Also nmethod could be deoptimized.
1656     __ xabort(0);
1657   }
1658 
1659   // Calculate the difference between rsp and rbp,. We need to know it
1660   // after the native call because on windows Java Natives will pop
1661   // the arguments and it is painful to do rsp relative addressing
1662   // in a platform independent way. So after the call we switch to
1663   // rbp, relative addressing.
1664 
1665   int fp_adjustment = stack_size - 2*wordSize;
1666 
1667 #ifdef COMPILER2
1668   // C2 may leave the stack dirty if not in SSE2+ mode
1669   if (UseSSE >= 2) {
1670     __ verify_FPU(0, "c2i transition should have clean FPU stack");
1671   } else {
1672     __ empty_FPU_stack();
1673   }
1674 #endif /* COMPILER2 */
1675 
1676   // Compute the rbp, offset for any slots used after the jni call
1677 
1678   int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1679 
1680   // We use rdi as a thread pointer because it is callee save and
1681   // if we load it once it is usable thru the entire wrapper
1682   const Register thread = rdi;
1683 
1684    // We use rsi as the oop handle for the receiver/klass
1685    // It is callee save so it survives the call to native
1686 
1687    const Register oop_handle_reg = rsi;
1688 
1689    __ get_thread(thread);
1690 
1691   //
1692   // We immediately shuffle the arguments so that any vm call we have to
1693   // make from here on out (sync slow path, jvmti, etc.) we will have
1694   // captured the oops from our caller and have a valid oopMap for
1695   // them.
1696 
1697   // -----------------
1698   // The Grand Shuffle
1699   //
1700   // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1701   // and, if static, the class mirror instead of a receiver.  This pretty much
1702   // guarantees that register layout will not match (and x86 doesn't use reg
1703   // parms though amd does).  Since the native abi doesn't use register args
1704   // and the java conventions does we don't have to worry about collisions.
1705   // All of our moved are reg->stack or stack->stack.
1706   // We ignore the extra arguments during the shuffle and handle them at the
1707   // last moment. The shuffle is described by the two calling convention
1708   // vectors we have in our possession. We simply walk the java vector to
1709   // get the source locations and the c vector to get the destinations.
1710 
1711   int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1712 
1713   // Record rsp-based slot for receiver on stack for non-static methods
1714   int receiver_offset = -1;
1715 
1716   // This is a trick. We double the stack slots so we can claim
1717   // the oops in the caller's frame. Since we are sure to have
1718   // more args than the caller doubling is enough to make
1719   // sure we can capture all the incoming oop args from the
1720   // caller.
1721   //
1722   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1723 
1724   // Mark location of rbp,
1725   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1726 
1727   // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1728   // Are free to temporaries if we have to do  stack to steck moves.
1729   // All inbound args are referenced based on rbp, and all outbound args via rsp.
1730 
1731   for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1732     switch (in_sig_bt[i]) {
1733       case T_ARRAY:
1734         if (is_critical_native) {
1735           VMRegPair in_arg = in_regs[i];
1736           unpack_array_argument(masm, in_arg, in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1737           c_arg++;
1738           break;
1739         }
1740       case T_INLINE_TYPE:
1741       case T_OBJECT:
1742         assert(!is_critical_native, "no oop arguments");
1743         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1744                     ((i == 0) && (!is_static)),
1745                     &receiver_offset);
1746         break;
1747       case T_VOID:
1748         break;
1749 
1750       case T_FLOAT:
1751         float_move(masm, in_regs[i], out_regs[c_arg]);
1752           break;
1753 
1754       case T_DOUBLE:
1755         assert( i + 1 < total_in_args &&
1756                 in_sig_bt[i + 1] == T_VOID &&
1757                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1758         double_move(masm, in_regs[i], out_regs[c_arg]);
1759         break;
1760 
1761       case T_LONG :
1762         long_move(masm, in_regs[i], out_regs[c_arg]);
1763         break;
1764 
1765       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1766 
1767       default:
1768         simple_move32(masm, in_regs[i], out_regs[c_arg]);
1769     }
1770   }
1771 
1772   // Pre-load a static method's oop into rsi.  Used both by locking code and
1773   // the normal JNI call code.
1774   if (method->is_static() && !is_critical_native) {
1775 
1776     //  load opp into a register
1777     __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1778 
1779     // Now handlize the static class mirror it's known not-null.
1780     __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1781     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1782 
1783     // Now get the handle
1784     __ lea(oop_handle_reg, Address(rsp, klass_offset));
1785     // store the klass handle as second argument
1786     __ movptr(Address(rsp, wordSize), oop_handle_reg);
1787   }
1788 
1789   // Change state to native (we save the return address in the thread, since it might not
1790   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1791   // points into the right code segment. It does not have to be the correct return pc.
1792   // We use the same pc/oopMap repeatedly when we call out
1793 
1794   intptr_t the_pc = (intptr_t) __ pc();
1795   oop_maps->add_gc_map(the_pc - start, map);
1796 
1797   __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1798 
1799 
1800   // We have all of the arguments setup at this point. We must not touch any register
1801   // argument registers at this point (what if we save/restore them there are no oop?
1802 
1803   {
1804     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1805     __ mov_metadata(rax, method());
1806     __ call_VM_leaf(
1807          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1808          thread, rax);
1809   }
1810 
1811   // RedefineClasses() tracing support for obsolete method entry
1812   if (log_is_enabled(Trace, redefine, class, obsolete)) {
1813     __ mov_metadata(rax, method());
1814     __ call_VM_leaf(
1815          CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1816          thread, rax);
1817   }
1818 
1819   // These are register definitions we need for locking/unlocking
1820   const Register swap_reg = rax;  // Must use rax, for cmpxchg instruction
1821   const Register obj_reg  = rcx;  // Will contain the oop
1822   const Register lock_reg = rdx;  // Address of compiler lock object (BasicLock)
1823 
1824   Label slow_path_lock;
1825   Label lock_done;
1826 
1827   // Lock a synchronized method
1828   if (method->is_synchronized()) {
1829     assert(!is_critical_native, "unhandled");
1830 
1831 
1832     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1833 
1834     // Get the handle (the 2nd argument)
1835     __ movptr(oop_handle_reg, Address(rsp, wordSize));
1836 
1837     // Get address of the box
1838 
1839     __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1840 
1841     // Load the oop from the handle
1842     __ movptr(obj_reg, Address(oop_handle_reg, 0));
1843 
1844     // Load immediate 1 into swap_reg %rax,
1845     __ movptr(swap_reg, 1);
1846 
1847     // Load (object->mark() | 1) into swap_reg %rax,
1848     __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1849 
1850     // Save (object->mark() | 1) into BasicLock's displaced header
1851     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1852 
1853     // src -> dest iff dest == rax, else rax, <- dest
1854     // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
1855     __ lock();
1856     __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1857     __ jcc(Assembler::equal, lock_done);
1858 
1859     // Test if the oopMark is an obvious stack pointer, i.e.,
1860     //  1) (mark & 3) == 0, and
1861     //  2) rsp <= mark < mark + os::pagesize()
1862     // These 3 tests can be done by evaluating the following
1863     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
1864     // assuming both stack pointer and pagesize have their
1865     // least significant 2 bits clear.
1866     // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
1867 
1868     __ subptr(swap_reg, rsp);
1869     __ andptr(swap_reg, 3 - os::vm_page_size());
1870 
1871     // Save the test result, for recursive case, the result is zero
1872     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
1873     __ jcc(Assembler::notEqual, slow_path_lock);
1874     // Slow path will re-enter here
1875     __ bind(lock_done);
1876   }
1877 
1878 
1879   // Finally just about ready to make the JNI call
1880 
1881   // get JNIEnv* which is first argument to native
1882   if (!is_critical_native) {
1883     __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
1884     __ movptr(Address(rsp, 0), rdx);
1885 
1886     // Now set thread in native
1887     __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
1888   }
1889 
1890   __ call(RuntimeAddress(native_func));
1891 
1892   // Verify or restore cpu control state after JNI call
1893   __ restore_cpu_control_state_after_jni();
1894 
1895   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1896   // arguments off of the stack. We could just re-adjust the stack pointer here
1897   // and continue to do SP relative addressing but we instead switch to FP
1898   // relative addressing.
1899 
1900   // Unpack native results.
1901   switch (ret_type) {
1902   case T_BOOLEAN: __ c2bool(rax);            break;
1903   case T_CHAR   : __ andptr(rax, 0xFFFF);    break;
1904   case T_BYTE   : __ sign_extend_byte (rax); break;
1905   case T_SHORT  : __ sign_extend_short(rax); break;
1906   case T_INT    : /* nothing to do */        break;
1907   case T_DOUBLE :
1908   case T_FLOAT  :
1909     // Result is in st0 we'll save as needed
1910     break;
1911   case T_ARRAY:                 // Really a handle
1912   case T_INLINE_TYPE:           // Really a handle
1913   case T_OBJECT:                // Really a handle
1914       break; // can't de-handlize until after safepoint check
1915   case T_VOID: break;
1916   case T_LONG: break;
1917   default       : ShouldNotReachHere();
1918   }
1919 
1920   Label after_transition;
1921 
1922   // If this is a critical native, check for a safepoint or suspend request after the call.
1923   // If a safepoint is needed, transition to native, then to native_trans to handle
1924   // safepoints like the native methods that are not critical natives.
1925   if (is_critical_native) {
1926     Label needs_safepoint;
1927     __ safepoint_poll(needs_safepoint, thread, false /* at_return */, false /* in_nmethod */);
1928     __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1929     __ jcc(Assembler::equal, after_transition);
1930     __ bind(needs_safepoint);
1931   }
1932 
1933   // Switch thread to "native transition" state before reading the synchronization state.
1934   // This additional state is necessary because reading and testing the synchronization
1935   // state is not atomic w.r.t. GC, as this scenario demonstrates:
1936   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1937   //     VM thread changes sync state to synchronizing and suspends threads for GC.
1938   //     Thread A is resumed to finish this native method, but doesn't block here since it
1939   //     didn't see any synchronization is progress, and escapes.
1940   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
1941 
1942   // Force this write out before the read below
1943   __ membar(Assembler::Membar_mask_bits(
1944             Assembler::LoadLoad | Assembler::LoadStore |
1945             Assembler::StoreLoad | Assembler::StoreStore));
1946 
1947   if (AlwaysRestoreFPU) {
1948     // Make sure the control word is correct.
1949     __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
1950   }
1951 
1952   // check for safepoint operation in progress and/or pending suspend requests
1953   { Label Continue, slow_path;
1954 
1955     __ safepoint_poll(slow_path, thread, true /* at_return */, false /* in_nmethod */);
1956 
1957     __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
1958     __ jcc(Assembler::equal, Continue);
1959     __ bind(slow_path);
1960 
1961     // Don't use call_VM as it will see a possible pending exception and forward it
1962     // and never return here preventing us from clearing _last_native_pc down below.
1963     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
1964     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
1965     // by hand.
1966     //
1967     __ vzeroupper();
1968 
1969     save_native_result(masm, ret_type, stack_slots);
1970     __ push(thread);
1971     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
1972                                               JavaThread::check_special_condition_for_native_trans)));
1973     __ increment(rsp, wordSize);
1974     // Restore any method result value
1975     restore_native_result(masm, ret_type, stack_slots);
1976     __ bind(Continue);
1977   }
1978 
1979   // change thread state
1980   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
1981   __ bind(after_transition);
1982 
1983   Label reguard;
1984   Label reguard_done;
1985   __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), StackOverflow::stack_guard_yellow_reserved_disabled);
1986   __ jcc(Assembler::equal, reguard);
1987 
1988   // slow path reguard  re-enters here
1989   __ bind(reguard_done);
1990 
1991   // Handle possible exception (will unlock if necessary)
1992 
1993   // native result if any is live
1994 
1995   // Unlock
1996   Label slow_path_unlock;
1997   Label unlock_done;
1998   if (method->is_synchronized()) {
1999 
2000     Label done;
2001 
2002     // Get locked oop from the handle we passed to jni
2003     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2004 
2005     // Simple recursive lock?
2006 
2007     __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2008     __ jcc(Assembler::equal, done);
2009 
2010     // Must save rax, if if it is live now because cmpxchg must use it
2011     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2012       save_native_result(masm, ret_type, stack_slots);
2013     }
2014 
2015     //  get old displaced header
2016     __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2017 
2018     // get address of the stack lock
2019     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2020 
2021     // Atomic swap old header if oop still contains the stack lock
2022     // src -> dest iff dest == rax, else rax, <- dest
2023     // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2024     __ lock();
2025     __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2026     __ jcc(Assembler::notEqual, slow_path_unlock);
2027 
2028     // slow path re-enters here
2029     __ bind(unlock_done);
2030     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2031       restore_native_result(masm, ret_type, stack_slots);
2032     }
2033 
2034     __ bind(done);
2035 
2036   }
2037 
2038   {
2039     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2040     // Tell dtrace about this method exit
2041     save_native_result(masm, ret_type, stack_slots);
2042     __ mov_metadata(rax, method());
2043     __ call_VM_leaf(
2044          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2045          thread, rax);
2046     restore_native_result(masm, ret_type, stack_slots);
2047   }
2048 
2049   // We can finally stop using that last_Java_frame we setup ages ago
2050 
2051   __ reset_last_Java_frame(thread, false);
2052 
2053   // Unbox oop result, e.g. JNIHandles::resolve value.
2054   if (is_reference_type(ret_type)) {
2055     __ resolve_jobject(rax /* value */,
2056                        thread /* thread */,
2057                        rcx /* tmp */);
2058   }
2059 
2060   if (CheckJNICalls) {
2061     // clear_pending_jni_exception_check
2062     __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2063   }
2064 
2065   if (!is_critical_native) {
2066     // reset handle block
2067     __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2068     __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2069 
2070     // Any exception pending?
2071     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2072     __ jcc(Assembler::notEqual, exception_pending);
2073   }
2074 
2075   // no exception, we're almost done
2076 
2077   // check that only result value is on FPU stack
2078   __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2079 
2080   // Fixup floating pointer results so that result looks like a return from a compiled method
2081   if (ret_type == T_FLOAT) {
2082     if (UseSSE >= 1) {
2083       // Pop st0 and store as float and reload into xmm register
2084       __ fstp_s(Address(rbp, -4));
2085       __ movflt(xmm0, Address(rbp, -4));
2086     }
2087   } else if (ret_type == T_DOUBLE) {
2088     if (UseSSE >= 2) {
2089       // Pop st0 and store as double and reload into xmm register
2090       __ fstp_d(Address(rbp, -8));
2091       __ movdbl(xmm0, Address(rbp, -8));
2092     }
2093   }
2094 
2095   // Return
2096 
2097   __ leave();
2098   __ ret(0);
2099 
2100   // Unexpected paths are out of line and go here
2101 
2102   // Slow path locking & unlocking
2103   if (method->is_synchronized()) {
2104 
2105     // BEGIN Slow path lock
2106 
2107     __ bind(slow_path_lock);
2108 
2109     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2110     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2111     __ push(thread);
2112     __ push(lock_reg);
2113     __ push(obj_reg);
2114     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2115     __ addptr(rsp, 3*wordSize);
2116 
2117 #ifdef ASSERT
2118     { Label L;
2119     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2120     __ jcc(Assembler::equal, L);
2121     __ stop("no pending exception allowed on exit from monitorenter");
2122     __ bind(L);
2123     }
2124 #endif
2125     __ jmp(lock_done);
2126 
2127     // END Slow path lock
2128 
2129     // BEGIN Slow path unlock
2130     __ bind(slow_path_unlock);
2131     __ vzeroupper();
2132     // Slow path unlock
2133 
2134     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2135       save_native_result(masm, ret_type, stack_slots);
2136     }
2137     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2138 
2139     __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2140     __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2141 
2142 
2143     // should be a peal
2144     // +wordSize because of the push above
2145     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2146     __ push(thread);
2147     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2148     __ push(rax);
2149 
2150     __ push(obj_reg);
2151     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2152     __ addptr(rsp, 3*wordSize);
2153 #ifdef ASSERT
2154     {
2155       Label L;
2156       __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2157       __ jcc(Assembler::equal, L);
2158       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2159       __ bind(L);
2160     }
2161 #endif /* ASSERT */
2162 
2163     __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2164 
2165     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2166       restore_native_result(masm, ret_type, stack_slots);
2167     }
2168     __ jmp(unlock_done);
2169     // END Slow path unlock
2170 
2171   }
2172 
2173   // SLOW PATH Reguard the stack if needed
2174 
2175   __ bind(reguard);
2176   __ vzeroupper();
2177   save_native_result(masm, ret_type, stack_slots);
2178   {
2179     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2180   }
2181   restore_native_result(masm, ret_type, stack_slots);
2182   __ jmp(reguard_done);
2183 
2184 
2185   // BEGIN EXCEPTION PROCESSING
2186 
2187   if (!is_critical_native) {
2188     // Forward  the exception
2189     __ bind(exception_pending);
2190 
2191     // remove possible return value from FPU register stack
2192     __ empty_FPU_stack();
2193 
2194     // pop our frame
2195     __ leave();
2196     // and forward the exception
2197     __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2198   }
2199 
2200   __ flush();
2201 
2202   nmethod *nm = nmethod::new_native_nmethod(method,
2203                                             compile_id,
2204                                             masm->code(),
2205                                             vep_offset,
2206                                             frame_complete,
2207                                             stack_slots / VMRegImpl::slots_per_word,
2208                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2209                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2210                                             oop_maps);
2211 
2212   return nm;
2213 
2214 }
2215 
2216 // this function returns the adjust size (in number of words) to a c2i adapter
2217 // activation for use during deoptimization
2218 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2219   return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2220 }
2221 
2222 
2223 // Number of stack slots between incoming argument block and the start of
2224 // a new frame.  The PROLOG must add this many slots to the stack.  The
2225 // EPILOG must remove this many slots.  Intel needs one slot for
2226 // return address and one for rbp, (must save rbp)
2227 uint SharedRuntime::in_preserve_stack_slots() {
2228   return 2+VerifyStackAtCalls;
2229 }
2230 
2231 uint SharedRuntime::out_preserve_stack_slots() {
2232   return 0;
2233 }
2234 
2235 //------------------------------generate_deopt_blob----------------------------
2236 void SharedRuntime::generate_deopt_blob() {
2237   // allocate space for the code
2238   ResourceMark rm;
2239   // setup code generation tools
2240   // note: the buffer code size must account for StackShadowPages=50
2241   CodeBuffer   buffer("deopt_blob", 1536, 1024);
2242   MacroAssembler* masm = new MacroAssembler(&buffer);
2243   int frame_size_in_words;
2244   OopMap* map = NULL;
2245   // Account for the extra args we place on the stack
2246   // by the time we call fetch_unroll_info
2247   const int additional_words = 2; // deopt kind, thread
2248 
2249   OopMapSet *oop_maps = new OopMapSet();
2250 
2251   // -------------
2252   // This code enters when returning to a de-optimized nmethod.  A return
2253   // address has been pushed on the the stack, and return values are in
2254   // registers.
2255   // If we are doing a normal deopt then we were called from the patched
2256   // nmethod from the point we returned to the nmethod. So the return
2257   // address on the stack is wrong by NativeCall::instruction_size
2258   // We will adjust the value to it looks like we have the original return
2259   // address on the stack (like when we eagerly deoptimized).
2260   // In the case of an exception pending with deoptimized then we enter
2261   // with a return address on the stack that points after the call we patched
2262   // into the exception handler. We have the following register state:
2263   //    rax,: exception
2264   //    rbx,: exception handler
2265   //    rdx: throwing pc
2266   // So in this case we simply jam rdx into the useless return address and
2267   // the stack looks just like we want.
2268   //
2269   // At this point we need to de-opt.  We save the argument return
2270   // registers.  We call the first C routine, fetch_unroll_info().  This
2271   // routine captures the return values and returns a structure which
2272   // describes the current frame size and the sizes of all replacement frames.
2273   // The current frame is compiled code and may contain many inlined
2274   // functions, each with their own JVM state.  We pop the current frame, then
2275   // push all the new frames.  Then we call the C routine unpack_frames() to
2276   // populate these frames.  Finally unpack_frames() returns us the new target
2277   // address.  Notice that callee-save registers are BLOWN here; they have
2278   // already been captured in the vframeArray at the time the return PC was
2279   // patched.
2280   address start = __ pc();
2281   Label cont;
2282 
2283   // Prolog for non exception case!
2284 
2285   // Save everything in sight.
2286 
2287   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2288   // Normal deoptimization
2289   __ push(Deoptimization::Unpack_deopt);
2290   __ jmp(cont);
2291 
2292   int reexecute_offset = __ pc() - start;
2293 
2294   // Reexecute case
2295   // return address is the pc describes what bci to do re-execute at
2296 
2297   // No need to update map as each call to save_live_registers will produce identical oopmap
2298   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2299 
2300   __ push(Deoptimization::Unpack_reexecute);
2301   __ jmp(cont);
2302 
2303   int exception_offset = __ pc() - start;
2304 
2305   // Prolog for exception case
2306 
2307   // all registers are dead at this entry point, except for rax, and
2308   // rdx which contain the exception oop and exception pc
2309   // respectively.  Set them in TLS and fall thru to the
2310   // unpack_with_exception_in_tls entry point.
2311 
2312   __ get_thread(rdi);
2313   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2314   __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2315 
2316   int exception_in_tls_offset = __ pc() - start;
2317 
2318   // new implementation because exception oop is now passed in JavaThread
2319 
2320   // Prolog for exception case
2321   // All registers must be preserved because they might be used by LinearScan
2322   // Exceptiop oop and throwing PC are passed in JavaThread
2323   // tos: stack at point of call to method that threw the exception (i.e. only
2324   // args are on the stack, no return address)
2325 
2326   // make room on stack for the return address
2327   // It will be patched later with the throwing pc. The correct value is not
2328   // available now because loading it from memory would destroy registers.
2329   __ push(0);
2330 
2331   // Save everything in sight.
2332 
2333   // No need to update map as each call to save_live_registers will produce identical oopmap
2334   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2335 
2336   // Now it is safe to overwrite any register
2337 
2338   // store the correct deoptimization type
2339   __ push(Deoptimization::Unpack_exception);
2340 
2341   // load throwing pc from JavaThread and patch it as the return address
2342   // of the current frame. Then clear the field in JavaThread
2343   __ get_thread(rdi);
2344   __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2345   __ movptr(Address(rbp, wordSize), rdx);
2346   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2347 
2348 #ifdef ASSERT
2349   // verify that there is really an exception oop in JavaThread
2350   __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2351   __ verify_oop(rax);
2352 
2353   // verify that there is no pending exception
2354   Label no_pending_exception;
2355   __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2356   __ testptr(rax, rax);
2357   __ jcc(Assembler::zero, no_pending_exception);
2358   __ stop("must not have pending exception here");
2359   __ bind(no_pending_exception);
2360 #endif
2361 
2362   __ bind(cont);
2363 
2364   // Compiled code leaves the floating point stack dirty, empty it.
2365   __ empty_FPU_stack();
2366 
2367 
2368   // Call C code.  Need thread and this frame, but NOT official VM entry
2369   // crud.  We cannot block on this call, no GC can happen.
2370   __ get_thread(rcx);
2371   __ push(rcx);
2372   // fetch_unroll_info needs to call last_java_frame()
2373   __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2374 
2375   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2376 
2377   // Need to have an oopmap that tells fetch_unroll_info where to
2378   // find any register it might need.
2379 
2380   oop_maps->add_gc_map( __ pc()-start, map);
2381 
2382   // Discard args to fetch_unroll_info
2383   __ pop(rcx);
2384   __ pop(rcx);
2385 
2386   __ get_thread(rcx);
2387   __ reset_last_Java_frame(rcx, false);
2388 
2389   // Load UnrollBlock into EDI
2390   __ mov(rdi, rax);
2391 
2392   // Move the unpack kind to a safe place in the UnrollBlock because
2393   // we are very short of registers
2394 
2395   Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2396   // retrieve the deopt kind from the UnrollBlock.
2397   __ movl(rax, unpack_kind);
2398 
2399    Label noException;
2400   __ cmpl(rax, Deoptimization::Unpack_exception);   // Was exception pending?
2401   __ jcc(Assembler::notEqual, noException);
2402   __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2403   __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2404   __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2405   __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2406 
2407   __ verify_oop(rax);
2408 
2409   // Overwrite the result registers with the exception results.
2410   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2411   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2412 
2413   __ bind(noException);
2414 
2415   // Stack is back to only having register save data on the stack.
2416   // Now restore the result registers. Everything else is either dead or captured
2417   // in the vframeArray.
2418 
2419   RegisterSaver::restore_result_registers(masm);
2420 
2421   // Non standard control word may be leaked out through a safepoint blob, and we can
2422   // deopt at a poll point with the non standard control word. However, we should make
2423   // sure the control word is correct after restore_result_registers.
2424   __ fldcw(ExternalAddress(StubRoutines::x86::addr_fpu_cntrl_wrd_std()));
2425 
2426   // All of the register save area has been popped of the stack. Only the
2427   // return address remains.
2428 
2429   // Pop all the frames we must move/replace.
2430   //
2431   // Frame picture (youngest to oldest)
2432   // 1: self-frame (no frame link)
2433   // 2: deopting frame  (no frame link)
2434   // 3: caller of deopting frame (could be compiled/interpreted).
2435   //
2436   // Note: by leaving the return address of self-frame on the stack
2437   // and using the size of frame 2 to adjust the stack
2438   // when we are done the return to frame 3 will still be on the stack.
2439 
2440   // Pop deoptimized frame
2441   __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2442 
2443   // sp should be pointing at the return address to the caller (3)
2444 
2445   // Pick up the initial fp we should save
2446   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2447   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2448 
2449 #ifdef ASSERT
2450   // Compilers generate code that bang the stack by as much as the
2451   // interpreter would need. So this stack banging should never
2452   // trigger a fault. Verify that it does not on non product builds.
2453   __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2454   __ bang_stack_size(rbx, rcx);
2455 #endif
2456 
2457   // Load array of frame pcs into ECX
2458   __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2459 
2460   __ pop(rsi); // trash the old pc
2461 
2462   // Load array of frame sizes into ESI
2463   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2464 
2465   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2466 
2467   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2468   __ movl(counter, rbx);
2469 
2470   // Now adjust the caller's stack to make up for the extra locals
2471   // but record the original sp so that we can save it in the skeletal interpreter
2472   // frame and the stack walking of interpreter_sender will get the unextended sp
2473   // value and not the "real" sp value.
2474 
2475   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2476   __ movptr(sp_temp, rsp);
2477   __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2478   __ subptr(rsp, rbx);
2479 
2480   // Push interpreter frames in a loop
2481   Label loop;
2482   __ bind(loop);
2483   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2484   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2485   __ pushptr(Address(rcx, 0));          // save return address
2486   __ enter();                           // save old & set new rbp,
2487   __ subptr(rsp, rbx);                  // Prolog!
2488   __ movptr(rbx, sp_temp);              // sender's sp
2489   // This value is corrected by layout_activation_impl
2490   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2491   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2492   __ movptr(sp_temp, rsp);              // pass to next frame
2493   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2494   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2495   __ decrementl(counter);             // decrement counter
2496   __ jcc(Assembler::notZero, loop);
2497   __ pushptr(Address(rcx, 0));          // save final return address
2498 
2499   // Re-push self-frame
2500   __ enter();                           // save old & set new rbp,
2501 
2502   //  Return address and rbp, are in place
2503   // We'll push additional args later. Just allocate a full sized
2504   // register save area
2505   __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2506 
2507   // Restore frame locals after moving the frame
2508   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2509   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2510   __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize));   // Pop float stack and store in local
2511   if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2512   if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2513 
2514   // Set up the args to unpack_frame
2515 
2516   __ pushl(unpack_kind);                     // get the unpack_kind value
2517   __ get_thread(rcx);
2518   __ push(rcx);
2519 
2520   // set last_Java_sp, last_Java_fp
2521   __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2522 
2523   // Call C code.  Need thread but NOT official VM entry
2524   // crud.  We cannot block on this call, no GC can happen.  Call should
2525   // restore return values to their stack-slots with the new SP.
2526   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2527   // Set an oopmap for the call site
2528   oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2529 
2530   // rax, contains the return result type
2531   __ push(rax);
2532 
2533   __ get_thread(rcx);
2534   __ reset_last_Java_frame(rcx, false);
2535 
2536   // Collect return values
2537   __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2538   __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2539 
2540   // Clear floating point stack before returning to interpreter
2541   __ empty_FPU_stack();
2542 
2543   // Check if we should push the float or double return value.
2544   Label results_done, yes_double_value;
2545   __ cmpl(Address(rsp, 0), T_DOUBLE);
2546   __ jcc (Assembler::zero, yes_double_value);
2547   __ cmpl(Address(rsp, 0), T_FLOAT);
2548   __ jcc (Assembler::notZero, results_done);
2549 
2550   // return float value as expected by interpreter
2551   if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2552   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2553   __ jmp(results_done);
2554 
2555   // return double value as expected by interpreter
2556   __ bind(yes_double_value);
2557   if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2558   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2559 
2560   __ bind(results_done);
2561 
2562   // Pop self-frame.
2563   __ leave();                              // Epilog!
2564 
2565   // Jump to interpreter
2566   __ ret(0);
2567 
2568   // -------------
2569   // make sure all code is generated
2570   masm->flush();
2571 
2572   _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2573   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2574 }
2575 
2576 
2577 #ifdef COMPILER2
2578 //------------------------------generate_uncommon_trap_blob--------------------
2579 void SharedRuntime::generate_uncommon_trap_blob() {
2580   // allocate space for the code
2581   ResourceMark rm;
2582   // setup code generation tools
2583   CodeBuffer   buffer("uncommon_trap_blob", 512, 512);
2584   MacroAssembler* masm = new MacroAssembler(&buffer);
2585 
2586   enum frame_layout {
2587     arg0_off,      // thread                     sp + 0 // Arg location for
2588     arg1_off,      // unloaded_class_index       sp + 1 // calling C
2589     arg2_off,      // exec_mode                  sp + 2
2590     // The frame sender code expects that rbp will be in the "natural" place and
2591     // will override any oopMap setting for it. We must therefore force the layout
2592     // so that it agrees with the frame sender code.
2593     rbp_off,       // callee saved register      sp + 3
2594     return_off,    // slot for return address    sp + 4
2595     framesize
2596   };
2597 
2598   address start = __ pc();
2599 
2600   if (UseRTMLocking) {
2601     // Abort RTM transaction before possible nmethod deoptimization.
2602     __ xabort(0);
2603   }
2604 
2605   // Push self-frame.
2606   __ subptr(rsp, return_off*wordSize);     // Epilog!
2607 
2608   // rbp, is an implicitly saved callee saved register (i.e. the calling
2609   // convention will save restore it in prolog/epilog) Other than that
2610   // there are no callee save registers no that adapter frames are gone.
2611   __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2612 
2613   // Clear the floating point exception stack
2614   __ empty_FPU_stack();
2615 
2616   // set last_Java_sp
2617   __ get_thread(rdx);
2618   __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2619 
2620   // Call C code.  Need thread but NOT official VM entry
2621   // crud.  We cannot block on this call, no GC can happen.  Call should
2622   // capture callee-saved registers as well as return values.
2623   __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2624   // argument already in ECX
2625   __ movl(Address(rsp, arg1_off*wordSize),rcx);
2626   __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2627   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2628 
2629   // Set an oopmap for the call site
2630   OopMapSet *oop_maps = new OopMapSet();
2631   OopMap* map =  new OopMap( framesize, 0 );
2632   // No oopMap for rbp, it is known implicitly
2633 
2634   oop_maps->add_gc_map( __ pc()-start, map);
2635 
2636   __ get_thread(rcx);
2637 
2638   __ reset_last_Java_frame(rcx, false);
2639 
2640   // Load UnrollBlock into EDI
2641   __ movptr(rdi, rax);
2642 
2643 #ifdef ASSERT
2644   { Label L;
2645     __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2646             (int32_t)Deoptimization::Unpack_uncommon_trap);
2647     __ jcc(Assembler::equal, L);
2648     __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2649     __ bind(L);
2650   }
2651 #endif
2652 
2653   // Pop all the frames we must move/replace.
2654   //
2655   // Frame picture (youngest to oldest)
2656   // 1: self-frame (no frame link)
2657   // 2: deopting frame  (no frame link)
2658   // 3: caller of deopting frame (could be compiled/interpreted).
2659 
2660   // Pop self-frame.  We have no frame, and must rely only on EAX and ESP.
2661   __ addptr(rsp,(framesize-1)*wordSize);     // Epilog!
2662 
2663   // Pop deoptimized frame
2664   __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2665   __ addptr(rsp, rcx);
2666 
2667   // sp should be pointing at the return address to the caller (3)
2668 
2669   // Pick up the initial fp we should save
2670   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2671   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2672 
2673 #ifdef ASSERT
2674   // Compilers generate code that bang the stack by as much as the
2675   // interpreter would need. So this stack banging should never
2676   // trigger a fault. Verify that it does not on non product builds.
2677   __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2678   __ bang_stack_size(rbx, rcx);
2679 #endif
2680 
2681   // Load array of frame pcs into ECX
2682   __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2683 
2684   __ pop(rsi); // trash the pc
2685 
2686   // Load array of frame sizes into ESI
2687   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2688 
2689   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2690 
2691   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2692   __ movl(counter, rbx);
2693 
2694   // Now adjust the caller's stack to make up for the extra locals
2695   // but record the original sp so that we can save it in the skeletal interpreter
2696   // frame and the stack walking of interpreter_sender will get the unextended sp
2697   // value and not the "real" sp value.
2698 
2699   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2700   __ movptr(sp_temp, rsp);
2701   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2702   __ subptr(rsp, rbx);
2703 
2704   // Push interpreter frames in a loop
2705   Label loop;
2706   __ bind(loop);
2707   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2708   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2709   __ pushptr(Address(rcx, 0));          // save return address
2710   __ enter();                           // save old & set new rbp,
2711   __ subptr(rsp, rbx);                  // Prolog!
2712   __ movptr(rbx, sp_temp);              // sender's sp
2713   // This value is corrected by layout_activation_impl
2714   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2715   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2716   __ movptr(sp_temp, rsp);              // pass to next frame
2717   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2718   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2719   __ decrementl(counter);             // decrement counter
2720   __ jcc(Assembler::notZero, loop);
2721   __ pushptr(Address(rcx, 0));            // save final return address
2722 
2723   // Re-push self-frame
2724   __ enter();                           // save old & set new rbp,
2725   __ subptr(rsp, (framesize-2) * wordSize);   // Prolog!
2726 
2727 
2728   // set last_Java_sp, last_Java_fp
2729   __ get_thread(rdi);
2730   __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2731 
2732   // Call C code.  Need thread but NOT official VM entry
2733   // crud.  We cannot block on this call, no GC can happen.  Call should
2734   // restore return values to their stack-slots with the new SP.
2735   __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2736   __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2737   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2738   // Set an oopmap for the call site
2739   oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2740 
2741   __ get_thread(rdi);
2742   __ reset_last_Java_frame(rdi, true);
2743 
2744   // Pop self-frame.
2745   __ leave();     // Epilog!
2746 
2747   // Jump to interpreter
2748   __ ret(0);
2749 
2750   // -------------
2751   // make sure all code is generated
2752   masm->flush();
2753 
2754    _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2755 }
2756 #endif // COMPILER2
2757 
2758 //------------------------------generate_handler_blob------
2759 //
2760 // Generate a special Compile2Runtime blob that saves all registers,
2761 // setup oopmap, and calls safepoint code to stop the compiled code for
2762 // a safepoint.
2763 //
2764 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2765 
2766   // Account for thread arg in our frame
2767   const int additional_words = 1;
2768   int frame_size_in_words;
2769 
2770   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2771 
2772   ResourceMark rm;
2773   OopMapSet *oop_maps = new OopMapSet();
2774   OopMap* map;
2775 
2776   // allocate space for the code
2777   // setup code generation tools
2778   CodeBuffer   buffer("handler_blob", 1024, 512);
2779   MacroAssembler* masm = new MacroAssembler(&buffer);
2780 
2781   const Register java_thread = rdi; // callee-saved for VC++
2782   address start   = __ pc();
2783   address call_pc = NULL;
2784   bool cause_return = (poll_type == POLL_AT_RETURN);
2785   bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2786 
2787   if (UseRTMLocking) {
2788     // Abort RTM transaction before calling runtime
2789     // because critical section will be large and will be
2790     // aborted anyway. Also nmethod could be deoptimized.
2791     __ xabort(0);
2792   }
2793 
2794   // If cause_return is true we are at a poll_return and there is
2795   // the return address on the stack to the caller on the nmethod
2796   // that is safepoint. We can leave this return on the stack and
2797   // effectively complete the return and safepoint in the caller.
2798   // Otherwise we push space for a return address that the safepoint
2799   // handler will install later to make the stack walking sensible.
2800   if (!cause_return)
2801     __ push(rbx);  // Make room for return address (or push it again)
2802 
2803   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2804 
2805   // The following is basically a call_VM. However, we need the precise
2806   // address of the call in order to generate an oopmap. Hence, we do all the
2807   // work ourselves.
2808 
2809   // Push thread argument and setup last_Java_sp
2810   __ get_thread(java_thread);
2811   __ push(java_thread);
2812   __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
2813 
2814   // if this was not a poll_return then we need to correct the return address now.
2815   if (!cause_return) {
2816     // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
2817     // Additionally, rbx is a callee saved register and we can look at it later to determine
2818     // if someone changed the return address for us!
2819     __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
2820     __ movptr(Address(rbp, wordSize), rbx);
2821   }
2822 
2823   // do the call
2824   __ call(RuntimeAddress(call_ptr));
2825 
2826   // Set an oopmap for the call site.  This oopmap will map all
2827   // oop-registers and debug-info registers as callee-saved.  This
2828   // will allow deoptimization at this safepoint to find all possible
2829   // debug-info recordings, as well as let GC find all oops.
2830 
2831   oop_maps->add_gc_map( __ pc() - start, map);
2832 
2833   // Discard arg
2834   __ pop(rcx);
2835 
2836   Label noException;
2837 
2838   // Clear last_Java_sp again
2839   __ get_thread(java_thread);
2840   __ reset_last_Java_frame(java_thread, false);
2841 
2842   __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2843   __ jcc(Assembler::equal, noException);
2844 
2845   // Exception pending
2846   RegisterSaver::restore_live_registers(masm, save_vectors);
2847 
2848   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2849 
2850   __ bind(noException);
2851 
2852   Label no_adjust, bail, not_special;
2853   if (!cause_return) {
2854     // If our stashed return pc was modified by the runtime we avoid touching it
2855     __ cmpptr(rbx, Address(rbp, wordSize));
2856     __ jccb(Assembler::notEqual, no_adjust);
2857 
2858     // Skip over the poll instruction.
2859     // See NativeInstruction::is_safepoint_poll()
2860     // Possible encodings:
2861     //      85 00       test   %eax,(%rax)
2862     //      85 01       test   %eax,(%rcx)
2863     //      85 02       test   %eax,(%rdx)
2864     //      85 03       test   %eax,(%rbx)
2865     //      85 06       test   %eax,(%rsi)
2866     //      85 07       test   %eax,(%rdi)
2867     //
2868     //      85 04 24    test   %eax,(%rsp)
2869     //      85 45 00    test   %eax,0x0(%rbp)
2870 
2871 #ifdef ASSERT
2872     __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
2873 #endif
2874     // rsp/rbp base encoding takes 3 bytes with the following register values:
2875     // rsp 0x04
2876     // rbp 0x05
2877     __ movzbl(rcx, Address(rbx, 1));
2878     __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
2879     __ subptr(rcx, 4);    // looking for 0x00 .. 0x01
2880     __ cmpptr(rcx, 1);
2881     __ jcc(Assembler::above, not_special);
2882     __ addptr(rbx, 1);
2883     __ bind(not_special);
2884 #ifdef ASSERT
2885     // Verify the correct encoding of the poll we're about to skip.
2886     __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
2887     __ jcc(Assembler::notEqual, bail);
2888     // Mask out the modrm bits
2889     __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
2890     // rax encodes to 0, so if the bits are nonzero it's incorrect
2891     __ jcc(Assembler::notZero, bail);
2892 #endif
2893     // Adjust return pc forward to step over the safepoint poll instruction
2894     __ addptr(rbx, 2);
2895     __ movptr(Address(rbp, wordSize), rbx);
2896   }
2897 
2898   __ bind(no_adjust);
2899   // Normal exit, register restoring and exit
2900   RegisterSaver::restore_live_registers(masm, save_vectors);
2901 
2902   __ ret(0);
2903 
2904 #ifdef ASSERT
2905   __ bind(bail);
2906   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2907 #endif
2908 
2909   // make sure all code is generated
2910   masm->flush();
2911 
2912   // Fill-out other meta info
2913   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2914 }
2915 
2916 //
2917 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2918 //
2919 // Generate a stub that calls into vm to find out the proper destination
2920 // of a java call. All the argument registers are live at this point
2921 // but since this is generic code we don't know what they are and the caller
2922 // must do any gc of the args.
2923 //
2924 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2925   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2926 
2927   // allocate space for the code
2928   ResourceMark rm;
2929 
2930   CodeBuffer buffer(name, 1000, 512);
2931   MacroAssembler* masm                = new MacroAssembler(&buffer);
2932 
2933   int frame_size_words;
2934   enum frame_layout {
2935                 thread_off,
2936                 extra_words };
2937 
2938   OopMapSet *oop_maps = new OopMapSet();
2939   OopMap* map = NULL;
2940 
2941   int start = __ offset();
2942 
2943   map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
2944 
2945   int frame_complete = __ offset();
2946 
2947   const Register thread = rdi;
2948   __ get_thread(rdi);
2949 
2950   __ push(thread);
2951   __ set_last_Java_frame(thread, noreg, rbp, NULL);
2952 
2953   __ call(RuntimeAddress(destination));
2954 
2955 
2956   // Set an oopmap for the call site.
2957   // We need this not only for callee-saved registers, but also for volatile
2958   // registers that the compiler might be keeping live across a safepoint.
2959 
2960   oop_maps->add_gc_map( __ offset() - start, map);
2961 
2962   // rax, contains the address we are going to jump to assuming no exception got installed
2963 
2964   __ addptr(rsp, wordSize);
2965 
2966   // clear last_Java_sp
2967   __ reset_last_Java_frame(thread, true);
2968   // check for pending exceptions
2969   Label pending;
2970   __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
2971   __ jcc(Assembler::notEqual, pending);
2972 
2973   // get the returned Method*
2974   __ get_vm_result_2(rbx, thread);
2975   __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
2976 
2977   __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
2978 
2979   RegisterSaver::restore_live_registers(masm);
2980 
2981   // We are back the the original state on entry and ready to go.
2982 
2983   __ jmp(rax);
2984 
2985   // Pending exception after the safepoint
2986 
2987   __ bind(pending);
2988 
2989   RegisterSaver::restore_live_registers(masm);
2990 
2991   // exception pending => remove activation and forward to exception handler
2992 
2993   __ get_thread(thread);
2994   __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
2995   __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
2996   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2997 
2998   // -------------
2999   // make sure all code is generated
3000   masm->flush();
3001 
3002   // return the  blob
3003   // frame_size_words or bytes??
3004   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3005 }
3006 
3007 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) {
3008   Unimplemented();
3009   return NULL;
3010 }
3011 
3012 #ifdef COMPILER2
3013 RuntimeStub* SharedRuntime::make_native_invoker(address call_target,
3014                                                 int shadow_space_bytes,
3015                                                 const GrowableArray<VMReg>& input_registers,
3016                                                 const GrowableArray<VMReg>& output_registers) {
3017   ShouldNotCallThis();
3018   return nullptr;
3019 }
3020 #endif
--- EOF ---