1 /*
2 * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_STUBGENERATOR_X86_64_HPP
26 #define CPU_X86_STUBGENERATOR_X86_64_HPP
27
28 #include "code/codeBlob.hpp"
29 #include "runtime/continuation.hpp"
30 #include "runtime/stubCodeGenerator.hpp"
31
32 // Stub Code definitions
33
34 class StubGenerator: public StubCodeGenerator {
35 private:
36
37 // Call stubs are used to call Java from C.
38 address generate_call_stub(address& return_address);
39
40 // Return point for a Java call if there's an exception thrown in
41 // Java code. The exception is caught and transformed into a
42 // pending exception stored in JavaThread that can be tested from
43 // within the VM.
44 //
45 // Note: Usually the parameters are removed by the callee. In case
46 // of an exception crossing an activation frame boundary, that is
47 // not the case if the callee is compiled code => need to setup the
48 // rsp.
49 //
50 // rax: exception oop
51
52 address generate_catch_exception();
53
54 // Continuation point for runtime calls returning with a pending
55 // exception. The pending exception check happened in the runtime
56 // or native call stub. The pending exception in Thread is
57 // converted into a Java-level exception.
58 //
59 // Contract with Java-level exception handlers:
60 // rax: exception
61 // rdx: throwing pc
62 //
63 // NOTE: At entry of this stub, exception-pc must be on stack !!
64
65 address generate_forward_exception();
66
67 // Support for intptr_t OrderAccess::fence()
68 address generate_orderaccess_fence();
69
70 // Support for intptr_t get_previous_sp()
71 //
72 // This routine is used to find the previous stack pointer for the
73 // caller.
74 address generate_get_previous_sp();
75
76 //----------------------------------------------------------------------------------------------------
77 // Support for void verify_mxcsr()
78 //
79 // This routine is used with -Xcheck:jni to verify that native
80 // JNI code does not return to Java code without restoring the
81 // MXCSR register to our expected state.
82
83 address generate_verify_mxcsr();
84
85 address generate_f2i_fixup();
86 address generate_f2l_fixup();
87 address generate_d2i_fixup();
88 address generate_d2l_fixup();
89
90 address generate_count_leading_zeros_lut(const char *stub_name);
91 address generate_popcount_avx_lut(const char *stub_name);
92 address generate_iota_indices(const char *stub_name);
93 address generate_vector_reverse_bit_lut(const char *stub_name);
94
95 address generate_vector_reverse_byte_perm_mask_long(const char *stub_name);
96 address generate_vector_reverse_byte_perm_mask_int(const char *stub_name);
97 address generate_vector_reverse_byte_perm_mask_short(const char *stub_name);
98 address generate_vector_byte_shuffle_mask(const char *stub_name);
99
100 address generate_fp_mask(const char *stub_name, int64_t mask);
101
102 address generate_vector_mask(const char *stub_name, int64_t mask);
103
104 address generate_vector_byte_perm_mask(const char *stub_name);
105
106 address generate_vector_fp_mask(const char *stub_name, int64_t mask);
107
108 address generate_vector_custom_i32(const char *stub_name, Assembler::AvxVectorLen len,
109 int32_t val0, int32_t val1, int32_t val2, int32_t val3,
110 int32_t val4 = 0, int32_t val5 = 0, int32_t val6 = 0, int32_t val7 = 0,
111 int32_t val8 = 0, int32_t val9 = 0, int32_t val10 = 0, int32_t val11 = 0,
112 int32_t val12 = 0, int32_t val13 = 0, int32_t val14 = 0, int32_t val15 = 0);
113
114 // Non-destructive plausibility checks for oops
115 address generate_verify_oop();
116
117 // Verify that a register contains clean 32-bits positive value
118 // (high 32-bits are 0) so it could be used in 64-bits shifts.
119 void assert_clean_int(Register Rint, Register Rtmp);
120
121 // Generate overlap test for array copy stubs
122 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf);
123
124 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
125 assert(no_overlap_target != nullptr, "must be generated");
126 array_overlap_test(no_overlap_target, nullptr, sf);
127 }
128 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
129 array_overlap_test(nullptr, &L_no_overlap, sf);
130 }
131
132
133 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
134 void setup_arg_regs(int nargs = 3);
135 void restore_arg_regs();
136
137 #ifdef ASSERT
138 bool _regs_in_thread;
139 #endif
140
141 // This is used in places where r10 is a scratch register, and can
142 // be adapted if r9 is needed also.
143 void setup_arg_regs_using_thread(int nargs = 3);
144
145 void restore_arg_regs_using_thread();
146
147 // Copy big chunks forward
148 void copy_bytes_forward(Register end_from, Register end_to,
149 Register qword_count, Register tmp1,
150 Register tmp2, Label& L_copy_bytes,
151 Label& L_copy_8_bytes, DecoratorSet decorators,
152 BasicType type);
153
154 // Copy big chunks backward
155 void copy_bytes_backward(Register from, Register dest,
156 Register qword_count, Register tmp1,
157 Register tmp2, Label& L_copy_bytes,
158 Label& L_copy_8_bytes, DecoratorSet decorators,
159 BasicType type);
160
161 void setup_argument_regs(BasicType type);
162
163 void restore_argument_regs(BasicType type);
164
165 #if COMPILER2_OR_JVMCI
166 // Following rules apply to AVX3 optimized arraycopy stubs:
167 // - If target supports AVX3 features (BW+VL+F) then implementation uses 32 byte vectors (YMMs)
168 // for both special cases (various small block sizes) and aligned copy loop. This is the
169 // default configuration.
170 // - If copy length is above AVX3Threshold, then implementation use 64 byte vectors (ZMMs)
171 // for main copy loop (and subsequent tail) since bulk of the cycles will be consumed in it.
172 // - If user forces MaxVectorSize=32 then above 4096 bytes its seen that REP MOVs shows a
173 // better performance for disjoint copies. For conjoint/backward copy vector based
174 // copy performs better.
175 // - If user sets AVX3Threshold=0, then special cases for small blocks sizes operate over
176 // 64 byte vector registers (ZMMs).
177
178 address generate_disjoint_copy_avx3_masked(address* entry, const char *name, int shift,
179 bool aligned, bool is_oop, bool dest_uninitialized);
180
181 address generate_conjoint_copy_avx3_masked(address* entry, const char *name, int shift,
182 address nooverlap_target, bool aligned, bool is_oop,
183 bool dest_uninitialized);
184
185 void arraycopy_avx3_special_cases(XMMRegister xmm, KRegister mask, Register from,
186 Register to, Register count, int shift,
187 Register index, Register temp,
188 bool use64byteVector, Label& L_entry, Label& L_exit);
189
190 void arraycopy_avx3_special_cases_256(XMMRegister xmm, KRegister mask, Register from,
191 Register to, Register count, int shift,
192 Register index, Register temp, Label& L_exit);
193
194 void arraycopy_avx3_special_cases_conjoint(XMMRegister xmm, KRegister mask, Register from,
195 Register to, Register start_index, Register end_index,
196 Register count, int shift, Register temp,
197 bool use64byteVector, Label& L_entry, Label& L_exit);
198
199 void arraycopy_avx3_large(Register to, Register from, Register temp1, Register temp2,
200 Register temp3, Register temp4, Register count,
201 XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
202 XMMRegister xmm4, int shift);
203
204 void copy32_avx(Register dst, Register src, Register index, XMMRegister xmm,
205 int shift = Address::times_1, int offset = 0);
206
207 void copy64_avx(Register dst, Register src, Register index, XMMRegister xmm,
208 bool conjoint, int shift = Address::times_1, int offset = 0,
209 bool use64byteVector = false);
210
211 void copy256_avx3(Register dst, Register src, Register index, XMMRegister xmm1, XMMRegister xmm2,
212 XMMRegister xmm3, XMMRegister xmm4, int shift, int offset = 0);
213
214 void copy64_masked_avx(Register dst, Register src, XMMRegister xmm,
215 KRegister mask, Register length, Register index,
216 Register temp, int shift = Address::times_1, int offset = 0,
217 bool use64byteVector = false);
218
219 void copy32_masked_avx(Register dst, Register src, XMMRegister xmm,
220 KRegister mask, Register length, Register index,
221 Register temp, int shift = Address::times_1, int offset = 0);
222 #endif // COMPILER2_OR_JVMCI
223
224 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name);
225
226 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
227 address* entry, const char *name);
228
229 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name);
230
231 address generate_fill(BasicType t, bool aligned, const char *name);
232
233 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
234 address *entry, const char *name);
235 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
236 const char *name, bool dest_uninitialized = false);
237 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
238 address *entry, const char *name,
239 bool dest_uninitialized = false);
240 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
241 const char *name, bool dest_uninitialized = false);
242 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
243 address nooverlap_target, address *entry,
244 const char *name, bool dest_uninitialized = false);
245
246 // Helper for generating a dynamic type check.
247 // Smashes no registers.
248 void generate_type_check(Register sub_klass,
249 Register super_check_offset,
250 Register super_klass,
251 Label& L_success);
252
253 // Generate checkcasting array copy stub
254 address generate_checkcast_copy(const char *name, address *entry,
255 bool dest_uninitialized = false);
256
257 // Generate 'unsafe' array copy stub
258 // Though just as safe as the other stubs, it takes an unscaled
259 // size_t argument instead of an element count.
260 //
261 // Examines the alignment of the operands and dispatches
262 // to a long, int, short, or byte copy loop.
263 address generate_unsafe_copy(const char *name,
264 address byte_copy_entry, address short_copy_entry,
265 address int_copy_entry, address long_copy_entry);
266
267 // Perform range checks on the proposed arraycopy.
268 // Kills temp, but nothing else.
269 // Also, clean the sign bits of src_pos and dst_pos.
270 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
271 Register src_pos, // source position (c_rarg1)
272 Register dst, // destination array oo (c_rarg2)
273 Register dst_pos, // destination position (c_rarg3)
274 Register length,
275 Register temp,
276 Label& L_failed);
277
278 // Generate generic array copy stubs
279 address generate_generic_copy(const char *name,
280 address byte_copy_entry, address short_copy_entry,
281 address int_copy_entry, address oop_copy_entry,
282 address long_copy_entry, address checkcast_copy_entry);
283
284 address generate_data_cache_writeback();
285
286 address generate_data_cache_writeback_sync();
287
288 void generate_arraycopy_stubs();
289
290
291 // MD5 stubs
292
293 // ofs and limit are use for multi-block byte array.
294 // int com.sun.security.provider.MD5.implCompress(byte[] b, int ofs)
295 address generate_md5_implCompress(bool multi_block, const char *name);
296
297
298 // SHA stubs
299
300 // ofs and limit are use for multi-block byte array.
301 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
302 address generate_sha1_implCompress(bool multi_block, const char *name);
303
304 // ofs and limit are use for multi-block byte array.
305 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
306 address generate_sha256_implCompress(bool multi_block, const char *name);
307 address generate_sha512_implCompress(bool multi_block, const char *name);
308
309 // Mask for byte-swapping a couple of qwords in an XMM register using (v)pshufb.
310 address generate_pshuffle_byte_flip_mask_sha512();
311
312 address generate_upper_word_mask();
313 address generate_shuffle_byte_flip_mask();
314 address generate_pshuffle_byte_flip_mask();
315
316
317 // AES intrinsic stubs
318
319 address generate_aescrypt_encryptBlock();
320
321 address generate_aescrypt_decryptBlock();
322
323 address generate_cipherBlockChaining_encryptAESCrypt();
324
325 // A version of CBC/AES Decrypt which does 4 blocks in a loop at a time
326 // to hide instruction latency
327 address generate_cipherBlockChaining_decryptAESCrypt_Parallel();
328
329 address generate_electronicCodeBook_encryptAESCrypt();
330
331 void aesecb_encrypt(Register source_addr, Register dest_addr, Register key, Register len);
332
333 address generate_electronicCodeBook_decryptAESCrypt();
334
335 void aesecb_decrypt(Register source_addr, Register dest_addr, Register key, Register len);
336
337 // Vector AES Galois Counter Mode implementation
338 address generate_galoisCounterMode_AESCrypt();
339 void aesgcm_encrypt(Register in, Register len, Register ct, Register out, Register key,
340 Register state, Register subkeyHtbl, Register avx512_subkeyHtbl, Register counter);
341
342 // AVX2 AES Galois Counter Mode implementation
343 address generate_avx2_galoisCounterMode_AESCrypt();
344 void aesgcm_avx2(Register in, Register len, Register ct, Register out, Register key,
345 Register state, Register subkeyHtbl, Register counter);
346
347 // Vector AES Counter implementation
348 address generate_counterMode_VectorAESCrypt();
349 void aesctr_encrypt(Register src_addr, Register dest_addr, Register key, Register counter,
350 Register len_reg, Register used, Register used_addr, Register saved_encCounter_start);
351
352 // This is a version of CTR/AES crypt which does 6 blocks in a loop at a time
353 // to hide instruction latency
354 address generate_counterMode_AESCrypt_Parallel();
355
356 address generate_cipherBlockChaining_decryptVectorAESCrypt();
357
358 address generate_key_shuffle_mask();
359
360 void roundDec(XMMRegister xmm_reg);
361 void roundDeclast(XMMRegister xmm_reg);
362 void roundEnc(XMMRegister key, int rnum);
363 void lastroundEnc(XMMRegister key, int rnum);
364 void roundDec(XMMRegister key, int rnum);
365 void lastroundDec(XMMRegister key, int rnum);
366 void gfmul_avx512(XMMRegister ghash, XMMRegister hkey);
367 void generateHtbl_48_block_zmm(Register htbl, Register avx512_subkeyHtbl, Register rscratch);
368 void ghash16_encrypt16_parallel(Register key, Register subkeyHtbl, XMMRegister ctr_blockx,
369 XMMRegister aad_hashx, Register in, Register out, Register data, Register pos, bool reduction,
370 XMMRegister addmask, bool no_ghash_input, Register rounds, Register ghash_pos,
371 bool final_reduction, int index, XMMRegister counter_inc_mask);
372 // AVX2 AES-GCM related functions
373 void initial_blocks_avx2(XMMRegister ctr, Register rounds, Register key, Register len,
374 Register in, Register out, Register ct, XMMRegister aad_hashx, Register pos);
375 void gfmul_avx2(XMMRegister GH, XMMRegister HK);
376 void generateHtbl_8_block_avx2(Register htbl);
377 void ghash8_encrypt8_parallel_avx2(Register key, Register subkeyHtbl, XMMRegister ctr_blockx, Register in,
378 Register out, Register ct, Register pos, bool out_order, Register rounds,
379 XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
380 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, XMMRegister xmm8);
381 void ghash_last_8_avx2(Register subkeyHtbl);
382
383 // Load key and shuffle operation
384 void ev_load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask);
385 void ev_load_key(XMMRegister xmmdst, Register key, int offset, Register rscratch);
386
387 // Utility routine for loading a 128-bit key word in little endian format
388 // can optionally specify that the shuffle mask is already in an xmmregister
389 void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask);
390 void load_key(XMMRegister xmmdst, Register key, int offset, Register rscratch);
391
392 // Utility routine for increase 128bit counter (iv in CTR mode)
393 void inc_counter(Register reg, XMMRegister xmmdst, int inc_delta, Label& next_block);
394 void ev_add128(XMMRegister xmmdst, XMMRegister xmmsrc1, XMMRegister xmmsrc2,
395 int vector_len, KRegister ktmp, XMMRegister ones);
396 void generate_aes_stubs();
397
398
399 // GHASH stubs
400
401 void generate_ghash_stubs();
402
403 void schoolbookAAD(int i, Register subkeyH, XMMRegister data, XMMRegister tmp0,
404 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3);
405 void gfmul(XMMRegister tmp0, XMMRegister t);
406 void generateHtbl_one_block(Register htbl, Register rscratch);
407 void generateHtbl_eight_blocks(Register htbl);
408 void avx_ghash(Register state, Register htbl, Register data, Register blocks);
409
410 // Used by GHASH and AES stubs.
411 address ghash_polynomial_addr();
412 address ghash_shufflemask_addr();
413 address ghash_long_swap_mask_addr(); // byte swap x86 long
414 address ghash_byte_swap_mask_addr(); // byte swap x86 byte array
415
416 // Single and multi-block ghash operations
417 address generate_ghash_processBlocks();
418
419 // Ghash single and multi block operations using AVX instructions
420 address generate_avx_ghash_processBlocks();
421
422 // ChaCha20 stubs and helper functions
423 void generate_chacha_stubs();
424 address generate_chacha20Block_avx();
425 address generate_chacha20Block_avx512();
426 void cc20_quarter_round_avx(XMMRegister aVec, XMMRegister bVec,
427 XMMRegister cVec, XMMRegister dVec, XMMRegister scratch,
428 XMMRegister lrot8, XMMRegister lrot16, int vector_len);
429 void cc20_shift_lane_org(XMMRegister bVec, XMMRegister cVec,
430 XMMRegister dVec, int vector_len, bool colToDiag);
431 void cc20_keystream_collate_avx512(XMMRegister aVec, XMMRegister bVec,
432 XMMRegister cVec, XMMRegister dVec, Register baseAddr, int baseOffset);
433
434 // Poly1305 multiblock using IFMA instructions
435 address generate_poly1305_processBlocks();
436 void poly1305_process_blocks_avx512(const Register input, const Register length,
437 const Register A0, const Register A1, const Register A2,
438 const Register R0, const Register R1, const Register C1);
439 void poly1305_multiply_scalar(const Register a0, const Register a1, const Register a2,
440 const Register r0, const Register r1, const Register c1, bool only128,
441 const Register t0, const Register t1, const Register t2,
442 const Register mulql, const Register mulqh);
443 void poly1305_multiply8_avx512(const XMMRegister A0, const XMMRegister A1, const XMMRegister A2,
444 const XMMRegister R0, const XMMRegister R1, const XMMRegister R2, const XMMRegister R1P, const XMMRegister R2P,
445 const XMMRegister P0L, const XMMRegister P0H, const XMMRegister P1L, const XMMRegister P1H, const XMMRegister P2L, const XMMRegister P2H,
446 const XMMRegister TMP, const Register rscratch);
447 void poly1305_limbs(const Register limbs, const Register a0, const Register a1, const Register a2, const Register t0, const Register t1);
448 void poly1305_limbs_out(const Register a0, const Register a1, const Register a2, const Register limbs, const Register t0, const Register t1);
449 void poly1305_limbs_avx512(const XMMRegister D0, const XMMRegister D1,
450 const XMMRegister L0, const XMMRegister L1, const XMMRegister L2, bool padMSG,
451 const XMMRegister TMP, const Register rscratch);
452
453 // BASE64 stubs
454
455 address base64_shuffle_addr();
456 address base64_avx2_shuffle_addr();
457 address base64_avx2_input_mask_addr();
458 address base64_avx2_lut_addr();
459 address base64_encoding_table_addr();
460
461 // Code for generating Base64 encoding.
462 // Intrinsic function prototype in Base64.java:
463 // private void encodeBlock(byte[] src, int sp, int sl, byte[] dst, int dp, boolean isURL)
464 address generate_base64_encodeBlock();
465
466 // base64 AVX512vbmi tables
467 address base64_vbmi_lookup_lo_addr();
468 address base64_vbmi_lookup_hi_addr();
469 address base64_vbmi_lookup_lo_url_addr();
470 address base64_vbmi_lookup_hi_url_addr();
471 address base64_vbmi_pack_vec_addr();
472 address base64_vbmi_join_0_1_addr();
473 address base64_vbmi_join_1_2_addr();
474 address base64_vbmi_join_2_3_addr();
475 address base64_decoding_table_addr();
476 address base64_AVX2_decode_tables_addr();
477 address base64_AVX2_decode_LUT_tables_addr();
478
479 // Code for generating Base64 decoding.
480 //
481 // Based on the article (and associated code) from https://arxiv.org/abs/1910.05109.
482 //
483 // Intrinsic function prototype in Base64.java:
484 // private void decodeBlock(byte[] src, int sp, int sl, byte[] dst, int dp, boolean isURL, isMIME);
485 address generate_base64_decodeBlock();
486
487 address generate_updateBytesCRC32();
488 address generate_updateBytesCRC32C(bool is_pclmulqdq_supported);
489
490 address generate_updateBytesAdler32();
491
492 address generate_multiplyToLen();
493
494 address generate_vectorizedMismatch();
495
496 address generate_squareToLen();
497
498 address generate_method_entry_barrier();
499
500 address generate_mulAdd();
501
502 address generate_bigIntegerRightShift();
503 address generate_bigIntegerLeftShift();
504
505 address generate_float16ToFloat();
506 address generate_floatToFloat16();
507
508 // Libm trigonometric stubs
509
510 address generate_libmSin();
511 address generate_libmCos();
512 address generate_libmTan();
513 address generate_libmExp();
514 address generate_libmPow();
515 address generate_libmLog();
516 address generate_libmLog10();
517 address generate_libmFmod();
518
519 // Shared constants
520 static address ZERO;
521 static address NEG_ZERO;
522 static address ONE;
523 static address ONEHALF;
524 static address SIGN_MASK;
525 static address TWO_POW_55;
526 static address TWO_POW_M55;
527 static address SHIFTER;
528 static address PI32INV;
529 static address PI_INV_TABLE;
530 static address Ctable;
531 static address SC_1;
532 static address SC_2;
533 static address SC_3;
534 static address SC_4;
535 static address PI_4;
536 static address P_1;
537 static address P_3;
538 static address P_2;
539
540 void generate_libm_stubs();
541
542
543 address generate_cont_thaw(const char* label, Continuation::thaw_kind kind);
544 address generate_cont_thaw();
545
546 // TODO: will probably need multiple return barriers depending on return type
547 address generate_cont_returnBarrier();
548 address generate_cont_returnBarrier_exception();
549
550 #if INCLUDE_JFR
551 void generate_jfr_stubs();
552 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
553 // It returns a jobject handle to the event writer.
554 // The handle is dereferenced and the return value is the event writer oop.
555 RuntimeStub* generate_jfr_write_checkpoint();
556 // For c2: call to runtime to return a buffer lease.
557 RuntimeStub* generate_jfr_return_lease();
558 #endif // INCLUDE_JFR
559
560 // Continuation point for throwing of implicit exceptions that are
561 // not handled in the current activation. Fabricates an exception
562 // oop and initiates normal exception dispatching in this
563 // frame. Since we need to preserve callee-saved values (currently
564 // only for C2, but done for C1 as well) we need a callee-saved oop
565 // map and therefore have to make these stubs into RuntimeStubs
566 // rather than BufferBlobs. If the compiler needs all registers to
567 // be preserved between the fault point and the exception handler
568 // then it must assume responsibility for that in
569 // AbstractCompiler::continuation_for_implicit_null_exception or
570 // continuation_for_implicit_division_by_zero_exception. All other
571 // implicit exceptions (e.g., NullPointerException or
572 // AbstractMethodError on entry) are either at call sites or
573 // otherwise assume that stack unwinding will be initiated, so
574 // caller saved registers were assumed volatile in the compiler.
575 address generate_throw_exception(const char* name,
576 address runtime_entry,
577 Register arg1 = noreg,
578 Register arg2 = noreg);
579
580 // shared exception handler for FFM upcall stubs
581 address generate_upcall_stub_exception_handler();
582
583 void create_control_words();
584
585 // Initialization
586 void generate_initial_stubs();
587 void generate_continuation_stubs();
588 void generate_compiler_stubs();
589 void generate_final_stubs();
590
591 public:
592 StubGenerator(CodeBuffer* code, StubsKind kind);
593 };
594
595 #endif // CPU_X86_STUBGENERATOR_X86_64_HPP