1 /*
2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_STUBGENERATOR_X86_64_HPP
26 #define CPU_X86_STUBGENERATOR_X86_64_HPP
27
28 #include "code/codeBlob.hpp"
29 #include "runtime/continuation.hpp"
30 #include "runtime/stubCodeGenerator.hpp"
31
32 // Stub Code definitions
33
34 class StubGenerator: public StubCodeGenerator {
35 private:
36
37 // Call stubs are used to call Java from C.
38 address generate_call_stub(address& return_address);
39
40 // Return point for a Java call if there's an exception thrown in
41 // Java code. The exception is caught and transformed into a
42 // pending exception stored in JavaThread that can be tested from
43 // within the VM.
44 //
45 // Note: Usually the parameters are removed by the callee. In case
46 // of an exception crossing an activation frame boundary, that is
47 // not the case if the callee is compiled code => need to setup the
48 // rsp.
49 //
50 // rax: exception oop
51
52 address generate_catch_exception();
53
54 // Continuation point for runtime calls returning with a pending
55 // exception. The pending exception check happened in the runtime
56 // or native call stub. The pending exception in Thread is
57 // converted into a Java-level exception.
58 //
59 // Contract with Java-level exception handlers:
60 // rax: exception
61 // rdx: throwing pc
62 //
63 // NOTE: At entry of this stub, exception-pc must be on stack !!
64
65 address generate_forward_exception();
66
67 // Support for intptr_t OrderAccess::fence()
68 address generate_orderaccess_fence();
69
70 // Support for intptr_t get_previous_sp()
71 //
72 // This routine is used to find the previous stack pointer for the
73 // caller.
74 address generate_get_previous_sp();
75
76 //----------------------------------------------------------------------------------------------------
77 // Support for void verify_mxcsr()
78 //
79 // This routine is used with -Xcheck:jni to verify that native
80 // JNI code does not return to Java code without restoring the
81 // MXCSR register to our expected state.
82
83 address generate_verify_mxcsr();
84
85 address generate_f2i_fixup();
86 address generate_f2l_fixup();
87 address generate_d2i_fixup();
88 address generate_d2l_fixup();
89
90 address generate_count_leading_zeros_lut(const char *stub_name);
91 address generate_popcount_avx_lut(const char *stub_name);
92 address generate_iota_indices(const char *stub_name);
93 address generate_vector_reverse_bit_lut(const char *stub_name);
94
95 address generate_vector_reverse_byte_perm_mask_long(const char *stub_name);
96 address generate_vector_reverse_byte_perm_mask_int(const char *stub_name);
97 address generate_vector_reverse_byte_perm_mask_short(const char *stub_name);
98 address generate_vector_byte_shuffle_mask(const char *stub_name);
99
100 address generate_fp_mask(const char *stub_name, int64_t mask);
101
102 address generate_compress_perm_table(const char *stub_name, int32_t esize);
103
104 address generate_expand_perm_table(const char *stub_name, int32_t esize);
105
106 address generate_vector_mask(const char *stub_name, int64_t mask);
107
108 address generate_vector_byte_perm_mask(const char *stub_name);
109
110 address generate_vector_fp_mask(const char *stub_name, int64_t mask);
111
112 address generate_vector_custom_i32(const char *stub_name, Assembler::AvxVectorLen len,
113 int32_t val0, int32_t val1, int32_t val2, int32_t val3,
114 int32_t val4 = 0, int32_t val5 = 0, int32_t val6 = 0, int32_t val7 = 0,
115 int32_t val8 = 0, int32_t val9 = 0, int32_t val10 = 0, int32_t val11 = 0,
116 int32_t val12 = 0, int32_t val13 = 0, int32_t val14 = 0, int32_t val15 = 0);
117
118 // Non-destructive plausibility checks for oops
119 address generate_verify_oop();
120
121 // Verify that a register contains clean 32-bits positive value
122 // (high 32-bits are 0) so it could be used in 64-bits shifts.
123 void assert_clean_int(Register Rint, Register Rtmp);
124
125 // Generate overlap test for array copy stubs
126 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf);
127
128 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
129 assert(no_overlap_target != nullptr, "must be generated");
130 array_overlap_test(no_overlap_target, nullptr, sf);
131 }
132 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
133 array_overlap_test(nullptr, &L_no_overlap, sf);
134 }
135
136
137 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
138 void setup_arg_regs(int nargs = 3);
139 void restore_arg_regs();
140
141 #ifdef ASSERT
142 bool _regs_in_thread;
143 #endif
144
145 // This is used in places where r10 is a scratch register, and can
146 // be adapted if r9 is needed also.
147 void setup_arg_regs_using_thread(int nargs = 3);
148
149 void restore_arg_regs_using_thread();
150
151 // Copy big chunks forward
152 void copy_bytes_forward(Register end_from, Register end_to,
153 Register qword_count, Register tmp1,
154 Register tmp2, Label& L_copy_bytes,
155 Label& L_copy_8_bytes, DecoratorSet decorators,
156 BasicType type);
157
158 // Copy big chunks backward
159 void copy_bytes_backward(Register from, Register dest,
160 Register qword_count, Register tmp1,
161 Register tmp2, Label& L_copy_bytes,
162 Label& L_copy_8_bytes, DecoratorSet decorators,
163 BasicType type);
164
165 void setup_argument_regs(BasicType type);
166
167 void restore_argument_regs(BasicType type);
168
169 #if COMPILER2_OR_JVMCI
170 // Following rules apply to AVX3 optimized arraycopy stubs:
171 // - If target supports AVX3 features (BW+VL+F) then implementation uses 32 byte vectors (YMMs)
172 // for both special cases (various small block sizes) and aligned copy loop. This is the
173 // default configuration.
174 // - If copy length is above AVX3Threshold, then implementation use 64 byte vectors (ZMMs)
175 // for main copy loop (and subsequent tail) since bulk of the cycles will be consumed in it.
176 // - If user forces MaxVectorSize=32 then above 4096 bytes its seen that REP MOVs shows a
177 // better performance for disjoint copies. For conjoint/backward copy vector based
178 // copy performs better.
179 // - If user sets AVX3Threshold=0, then special cases for small blocks sizes operate over
180 // 64 byte vector registers (ZMMs).
181
182 address generate_disjoint_copy_avx3_masked(address* entry, const char *name, int shift,
183 bool aligned, bool is_oop, bool dest_uninitialized);
184
185 address generate_conjoint_copy_avx3_masked(address* entry, const char *name, int shift,
186 address nooverlap_target, bool aligned, bool is_oop,
187 bool dest_uninitialized);
188
189 void arraycopy_avx3_special_cases(XMMRegister xmm, KRegister mask, Register from,
190 Register to, Register count, int shift,
191 Register index, Register temp,
192 bool use64byteVector, Label& L_entry, Label& L_exit);
193
194 void arraycopy_avx3_special_cases_256(XMMRegister xmm, KRegister mask, Register from,
195 Register to, Register count, int shift,
196 Register index, Register temp, Label& L_exit);
197
198 void arraycopy_avx3_special_cases_conjoint(XMMRegister xmm, KRegister mask, Register from,
199 Register to, Register start_index, Register end_index,
200 Register count, int shift, Register temp,
201 bool use64byteVector, Label& L_entry, Label& L_exit);
202
203 void arraycopy_avx3_large(Register to, Register from, Register temp1, Register temp2,
204 Register temp3, Register temp4, Register count,
205 XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
206 XMMRegister xmm4, int shift);
207
208 void copy32_avx(Register dst, Register src, Register index, XMMRegister xmm,
209 int shift = Address::times_1, int offset = 0);
210
211 void copy64_avx(Register dst, Register src, Register index, XMMRegister xmm,
212 bool conjoint, int shift = Address::times_1, int offset = 0,
213 bool use64byteVector = false);
214
215 void copy256_avx3(Register dst, Register src, Register index, XMMRegister xmm1, XMMRegister xmm2,
216 XMMRegister xmm3, XMMRegister xmm4, int shift, int offset = 0);
217
218 void copy64_masked_avx(Register dst, Register src, XMMRegister xmm,
219 KRegister mask, Register length, Register index,
220 Register temp, int shift = Address::times_1, int offset = 0,
221 bool use64byteVector = false);
222
223 void copy32_masked_avx(Register dst, Register src, XMMRegister xmm,
224 KRegister mask, Register length, Register index,
225 Register temp, int shift = Address::times_1, int offset = 0);
226 #endif // COMPILER2_OR_JVMCI
227
228 address generate_disjoint_byte_copy(bool aligned, address* entry, const char *name);
229
230 address generate_conjoint_byte_copy(bool aligned, address nooverlap_target,
231 address* entry, const char *name);
232
233 address generate_disjoint_short_copy(bool aligned, address *entry, const char *name);
234
235 address generate_fill(BasicType t, bool aligned, const char *name);
236
237 address generate_conjoint_short_copy(bool aligned, address nooverlap_target,
238 address *entry, const char *name);
239 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, address* entry,
240 const char *name, bool dest_uninitialized = false);
241 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, address nooverlap_target,
242 address *entry, const char *name,
243 bool dest_uninitialized = false);
244 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, address *entry,
245 const char *name, bool dest_uninitialized = false);
246 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop,
247 address nooverlap_target, address *entry,
248 const char *name, bool dest_uninitialized = false);
249
250 // Helper for generating a dynamic type check.
251 // Smashes no registers.
252 void generate_type_check(Register sub_klass,
253 Register super_check_offset,
254 Register super_klass,
255 Label& L_success);
256
257 // Generate checkcasting array copy stub
258 address generate_checkcast_copy(const char *name, address *entry,
259 bool dest_uninitialized = false);
260
261 // Generate 'unsafe' array copy stub
262 // Though just as safe as the other stubs, it takes an unscaled
263 // size_t argument instead of an element count.
264 //
265 // Examines the alignment of the operands and dispatches
266 // to a long, int, short, or byte copy loop.
267 address generate_unsafe_copy(const char *name,
268 address byte_copy_entry, address short_copy_entry,
269 address int_copy_entry, address long_copy_entry);
270
271 // Perform range checks on the proposed arraycopy.
272 // Kills temp, but nothing else.
273 // Also, clean the sign bits of src_pos and dst_pos.
274 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
275 Register src_pos, // source position (c_rarg1)
276 Register dst, // destination array oo (c_rarg2)
277 Register dst_pos, // destination position (c_rarg3)
278 Register length,
279 Register temp,
280 Label& L_failed);
281
282 // Generate generic array copy stubs
283 address generate_generic_copy(const char *name,
284 address byte_copy_entry, address short_copy_entry,
285 address int_copy_entry, address oop_copy_entry,
286 address long_copy_entry, address checkcast_copy_entry);
287
288 address generate_data_cache_writeback();
289
290 address generate_data_cache_writeback_sync();
291
292 void generate_arraycopy_stubs();
293
294
295 // MD5 stubs
296
297 // ofs and limit are use for multi-block byte array.
298 // int com.sun.security.provider.MD5.implCompress(byte[] b, int ofs)
299 address generate_md5_implCompress(bool multi_block, const char *name);
300
301
302 // SHA stubs
303
304 // ofs and limit are use for multi-block byte array.
305 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
306 address generate_sha1_implCompress(bool multi_block, const char *name);
307
308 // ofs and limit are use for multi-block byte array.
309 // int com.sun.security.provider.DigestBase.implCompressMultiBlock(byte[] b, int ofs, int limit)
310 address generate_sha256_implCompress(bool multi_block, const char *name);
311 address generate_sha512_implCompress(bool multi_block, const char *name);
312
313 // Mask for byte-swapping a couple of qwords in an XMM register using (v)pshufb.
314 address generate_pshuffle_byte_flip_mask_sha512();
315
316 address generate_upper_word_mask();
317 address generate_shuffle_byte_flip_mask();
318 address generate_pshuffle_byte_flip_mask();
319
320
321 // AES intrinsic stubs
322
323 address generate_aescrypt_encryptBlock();
324
325 address generate_aescrypt_decryptBlock();
326
327 address generate_cipherBlockChaining_encryptAESCrypt();
328
329 // A version of CBC/AES Decrypt which does 4 blocks in a loop at a time
330 // to hide instruction latency
331 address generate_cipherBlockChaining_decryptAESCrypt_Parallel();
332
333 address generate_electronicCodeBook_encryptAESCrypt();
334
335 void aesecb_encrypt(Register source_addr, Register dest_addr, Register key, Register len);
336
337 address generate_electronicCodeBook_decryptAESCrypt();
338
339 void aesecb_decrypt(Register source_addr, Register dest_addr, Register key, Register len);
340
341 // Vector AES Galois Counter Mode implementation
342 address generate_galoisCounterMode_AESCrypt();
343 void aesgcm_encrypt(Register in, Register len, Register ct, Register out, Register key,
344 Register state, Register subkeyHtbl, Register avx512_subkeyHtbl, Register counter);
345
346 // AVX2 AES Galois Counter Mode implementation
347 address generate_avx2_galoisCounterMode_AESCrypt();
348 void aesgcm_avx2(Register in, Register len, Register ct, Register out, Register key,
349 Register state, Register subkeyHtbl, Register counter);
350
351 // Vector AES Counter implementation
352 address generate_counterMode_VectorAESCrypt();
353 void aesctr_encrypt(Register src_addr, Register dest_addr, Register key, Register counter,
354 Register len_reg, Register used, Register used_addr, Register saved_encCounter_start);
355
356 // This is a version of CTR/AES crypt which does 6 blocks in a loop at a time
357 // to hide instruction latency
358 address generate_counterMode_AESCrypt_Parallel();
359
360 address generate_cipherBlockChaining_decryptVectorAESCrypt();
361
362 address generate_key_shuffle_mask();
363
364 void roundDec(XMMRegister xmm_reg);
365 void roundDeclast(XMMRegister xmm_reg);
366 void roundEnc(XMMRegister key, int rnum);
367 void lastroundEnc(XMMRegister key, int rnum);
368 void roundDec(XMMRegister key, int rnum);
369 void lastroundDec(XMMRegister key, int rnum);
370 void gfmul_avx512(XMMRegister ghash, XMMRegister hkey);
371 void generateHtbl_48_block_zmm(Register htbl, Register avx512_subkeyHtbl, Register rscratch);
372 void ghash16_encrypt16_parallel(Register key, Register subkeyHtbl, XMMRegister ctr_blockx,
373 XMMRegister aad_hashx, Register in, Register out, Register data, Register pos, bool reduction,
374 XMMRegister addmask, bool no_ghash_input, Register rounds, Register ghash_pos,
375 bool final_reduction, int index, XMMRegister counter_inc_mask);
376 // AVX2 AES-GCM related functions
377 void initial_blocks_avx2(XMMRegister ctr, Register rounds, Register key, Register len,
378 Register in, Register out, Register ct, XMMRegister aad_hashx, Register pos);
379 void gfmul_avx2(XMMRegister GH, XMMRegister HK);
380 void generateHtbl_8_block_avx2(Register htbl);
381 void ghash8_encrypt8_parallel_avx2(Register key, Register subkeyHtbl, XMMRegister ctr_blockx, Register in,
382 Register out, Register ct, Register pos, bool out_order, Register rounds,
383 XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4,
384 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, XMMRegister xmm8);
385 void ghash_last_8_avx2(Register subkeyHtbl);
386
387 // Load key and shuffle operation
388 void ev_load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask);
389 void ev_load_key(XMMRegister xmmdst, Register key, int offset, Register rscratch);
390
391 // Utility routine for loading a 128-bit key word in little endian format
392 // can optionally specify that the shuffle mask is already in an xmmregister
393 void load_key(XMMRegister xmmdst, Register key, int offset, XMMRegister xmm_shuf_mask);
394 void load_key(XMMRegister xmmdst, Register key, int offset, Register rscratch);
395
396 // Utility routine for increase 128bit counter (iv in CTR mode)
397 void inc_counter(Register reg, XMMRegister xmmdst, int inc_delta, Label& next_block);
398 void ev_add128(XMMRegister xmmdst, XMMRegister xmmsrc1, XMMRegister xmmsrc2,
399 int vector_len, KRegister ktmp, XMMRegister ones);
400 void generate_aes_stubs();
401
402
403 // GHASH stubs
404
405 void generate_ghash_stubs();
406
407 void schoolbookAAD(int i, Register subkeyH, XMMRegister data, XMMRegister tmp0,
408 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3);
409 void gfmul(XMMRegister tmp0, XMMRegister t);
410 void generateHtbl_one_block(Register htbl, Register rscratch);
411 void generateHtbl_eight_blocks(Register htbl);
412 void avx_ghash(Register state, Register htbl, Register data, Register blocks);
413
414 // Used by GHASH and AES stubs.
415 address ghash_polynomial_addr();
416 address ghash_shufflemask_addr();
417 address ghash_long_swap_mask_addr(); // byte swap x86 long
418 address ghash_byte_swap_mask_addr(); // byte swap x86 byte array
419
420 // Single and multi-block ghash operations
421 address generate_ghash_processBlocks();
422
423 // Ghash single and multi block operations using AVX instructions
424 address generate_avx_ghash_processBlocks();
425
426 // ChaCha20 stubs and helper functions
427 void generate_chacha_stubs();
428 address generate_chacha20Block_avx();
429 address generate_chacha20Block_avx512();
430 void cc20_quarter_round_avx(XMMRegister aVec, XMMRegister bVec,
431 XMMRegister cVec, XMMRegister dVec, XMMRegister scratch,
432 XMMRegister lrot8, XMMRegister lrot16, int vector_len);
433 void cc20_shift_lane_org(XMMRegister bVec, XMMRegister cVec,
434 XMMRegister dVec, int vector_len, bool colToDiag);
435 void cc20_keystream_collate_avx512(XMMRegister aVec, XMMRegister bVec,
436 XMMRegister cVec, XMMRegister dVec, Register baseAddr, int baseOffset);
437
438 // Poly1305 multiblock using IFMA instructions
439 address generate_poly1305_processBlocks();
440 void poly1305_process_blocks_avx512(const Register input, const Register length,
441 const Register A0, const Register A1, const Register A2,
442 const Register R0, const Register R1, const Register C1);
443 void poly1305_multiply_scalar(const Register a0, const Register a1, const Register a2,
444 const Register r0, const Register r1, const Register c1, bool only128,
445 const Register t0, const Register t1, const Register t2,
446 const Register mulql, const Register mulqh);
447 void poly1305_multiply8_avx512(const XMMRegister A0, const XMMRegister A1, const XMMRegister A2,
448 const XMMRegister R0, const XMMRegister R1, const XMMRegister R2, const XMMRegister R1P, const XMMRegister R2P,
449 const XMMRegister P0L, const XMMRegister P0H, const XMMRegister P1L, const XMMRegister P1H, const XMMRegister P2L, const XMMRegister P2H,
450 const XMMRegister TMP, const Register rscratch);
451 void poly1305_limbs(const Register limbs, const Register a0, const Register a1, const Register a2, const Register t0, const Register t1);
452 void poly1305_limbs_out(const Register a0, const Register a1, const Register a2, const Register limbs, const Register t0, const Register t1);
453 void poly1305_limbs_avx512(const XMMRegister D0, const XMMRegister D1,
454 const XMMRegister L0, const XMMRegister L1, const XMMRegister L2, bool padMSG,
455 const XMMRegister TMP, const Register rscratch);
456
457 // BASE64 stubs
458
459 address base64_shuffle_addr();
460 address base64_avx2_shuffle_addr();
461 address base64_avx2_input_mask_addr();
462 address base64_avx2_lut_addr();
463 address base64_encoding_table_addr();
464
465 // Code for generating Base64 encoding.
466 // Intrinsic function prototype in Base64.java:
467 // private void encodeBlock(byte[] src, int sp, int sl, byte[] dst, int dp, boolean isURL)
468 address generate_base64_encodeBlock();
469
470 // base64 AVX512vbmi tables
471 address base64_vbmi_lookup_lo_addr();
472 address base64_vbmi_lookup_hi_addr();
473 address base64_vbmi_lookup_lo_url_addr();
474 address base64_vbmi_lookup_hi_url_addr();
475 address base64_vbmi_pack_vec_addr();
476 address base64_vbmi_join_0_1_addr();
477 address base64_vbmi_join_1_2_addr();
478 address base64_vbmi_join_2_3_addr();
479 address base64_decoding_table_addr();
480 address base64_AVX2_decode_tables_addr();
481 address base64_AVX2_decode_LUT_tables_addr();
482
483 // Code for generating Base64 decoding.
484 //
485 // Based on the article (and associated code) from https://arxiv.org/abs/1910.05109.
486 //
487 // Intrinsic function prototype in Base64.java:
488 // private void decodeBlock(byte[] src, int sp, int sl, byte[] dst, int dp, boolean isURL, isMIME);
489 address generate_base64_decodeBlock();
490
491 address generate_updateBytesCRC32();
492 address generate_updateBytesCRC32C(bool is_pclmulqdq_supported);
493
494 address generate_updateBytesAdler32();
495
496 address generate_multiplyToLen();
497
498 address generate_vectorizedMismatch();
499
500 address generate_squareToLen();
501
502 address generate_method_entry_barrier();
503
504 address generate_mulAdd();
505
506 address generate_bigIntegerRightShift();
507 address generate_bigIntegerLeftShift();
508
509 address generate_float16ToFloat();
510 address generate_floatToFloat16();
511
512 // Libm trigonometric stubs
513
514 address generate_libmSin();
515 address generate_libmCos();
516 address generate_libmTan();
517 address generate_libmExp();
518 address generate_libmPow();
519 address generate_libmLog();
520 address generate_libmLog10();
521 address generate_libmFmod();
522
523 // Shared constants
524 static address ZERO;
525 static address NEG_ZERO;
526 static address ONE;
527 static address ONEHALF;
528 static address SIGN_MASK;
529 static address TWO_POW_55;
530 static address TWO_POW_M55;
531 static address SHIFTER;
532 static address PI32INV;
533 static address PI_INV_TABLE;
534 static address Ctable;
535 static address SC_1;
536 static address SC_2;
537 static address SC_3;
538 static address SC_4;
539 static address PI_4;
540 static address P_1;
541 static address P_3;
542 static address P_2;
543
544 void generate_libm_stubs();
545
546
547 address generate_cont_thaw(const char* label, Continuation::thaw_kind kind);
548 address generate_cont_thaw();
549
550 // TODO: will probably need multiple return barriers depending on return type
551 address generate_cont_returnBarrier();
552 address generate_cont_returnBarrier_exception();
553
554 #if INCLUDE_JFR
555 void generate_jfr_stubs();
556 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
557 // It returns a jobject handle to the event writer.
558 // The handle is dereferenced and the return value is the event writer oop.
559 RuntimeStub* generate_jfr_write_checkpoint();
560 // For c2: call to runtime to return a buffer lease.
561 RuntimeStub* generate_jfr_return_lease();
562 #endif // INCLUDE_JFR
563
564 // Continuation point for throwing of implicit exceptions that are
565 // not handled in the current activation. Fabricates an exception
566 // oop and initiates normal exception dispatching in this
567 // frame. Since we need to preserve callee-saved values (currently
568 // only for C2, but done for C1 as well) we need a callee-saved oop
569 // map and therefore have to make these stubs into RuntimeStubs
570 // rather than BufferBlobs. If the compiler needs all registers to
571 // be preserved between the fault point and the exception handler
572 // then it must assume responsibility for that in
573 // AbstractCompiler::continuation_for_implicit_null_exception or
574 // continuation_for_implicit_division_by_zero_exception. All other
575 // implicit exceptions (e.g., NullPointerException or
576 // AbstractMethodError on entry) are either at call sites or
577 // otherwise assume that stack unwinding will be initiated, so
578 // caller saved registers were assumed volatile in the compiler.
579 address generate_throw_exception(const char* name,
580 address runtime_entry,
581 Register arg1 = noreg,
582 Register arg2 = noreg);
583
584 // shared exception handler for FFM upcall stubs
585 address generate_upcall_stub_exception_handler();
586
587 // interpreter or compiled code marshalling registers to/from inline type instance
588 address generate_return_value_stub(address destination, const char* name, bool has_res);
589
590 void create_control_words();
591
592 // Initialization
593 void generate_initial_stubs();
594 void generate_continuation_stubs();
595 void generate_compiler_stubs();
596 void generate_final_stubs();
597
598 public:
599 StubGenerator(CodeBuffer* code, StubsKind kind);
600 };
601
602 #endif // CPU_X86_STUBGENERATOR_X86_64_HPP