1 /*
 2  * Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
 3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 4  *
 5  * This code is free software; you can redistribute it and/or modify it
 6  * under the terms of the GNU General Public License version 2 only, as
 7  * published by the Free Software Foundation.
 8  *
 9  * This code is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * version 2 for more details (a copy is included in the LICENSE file that
13  * accompanied this code).
14  *
15  * You should have received a copy of the GNU General Public License version
16  * 2 along with this work; if not, write to the Free Software Foundation,
17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
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20  * or visit www.oracle.com if you need additional information or have any
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24 
25 #ifndef CPU_X86_TEMPLATETABLE_X86_HPP
26 #define CPU_X86_TEMPLATETABLE_X86_HPP
27 
28   static void prepare_invoke(Register cache,
29                              Register recv,
30                              Register flags);
31   static void invokevirtual_helper(Register index, Register recv,
32                                    Register flags);
33   static void volatile_barrier(Assembler::Membar_mask_bits order_constraint);
34 
35   // Helpers
36   static void index_check(Register array, Register index);
37   static void index_check_without_pop(Register array, Register index);
38 
39   static void putfield_or_static_helper(int byte_no, bool is_static, RewriteControl rc,
40                                         Register obj, Register off, Register flags);
41   static void fast_storefield_helper(Address field, Register rax);
42 
43 #endif // CPU_X86_TEMPLATETABLE_X86_HPP