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src/hotspot/cpu/x86/x86_64.ad

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@@ -466,10 +466,14 @@
    offset += clear_avx_size();
    return offset;
  }
  
  int MachCallRuntimeNode::ret_addr_offset() {
+   if (_entry_point == NULL) {
+     // CallLeafNoFPInDirect
+     return 3; // callq (register)
+   }
    int offset = 13; // movq r10,#addr; callq (r10)
    if (this->ideal_Opcode() != Op_CallLeafVector) {
      offset += clear_avx_size();
    }
    return offset;

@@ -478,10 +482,11 @@
  int MachCallNativeNode::ret_addr_offset() {
    int offset = 13; // movq r10,#addr; callq (r10)
    offset += clear_avx_size();
    return offset;
  }
+ 
  //
  // Compute padding required for nodes which need alignment
  //
  
  // The address of the call instruction needs to be 4-byte aligned to

@@ -886,13 +891,10 @@
  
  void MachPrologNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
    Compile* C = ra_->C;
    MacroAssembler _masm(&cbuf);
  
-   int framesize = C->output()->frame_size_in_bytes();
-   int bangsize = C->output()->bang_size_in_bytes();
- 
    if (C->clinit_barrier_on_entry()) {
      assert(VM_Version::supports_fast_class_init_checks(), "sanity");
      assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
  
      Label L_skip_barrier;

@@ -904,11 +906,17 @@
      __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path
  
      __ bind(L_skip_barrier);
    }
  
-   __ verified_entry(framesize, C->output()->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != NULL);
+   __ verified_entry(C);
+   __ bind(*_verified_entry);
+ 
+   if (C->stub_function() == NULL) {
+     BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
+     bs->nmethod_entry_barrier(&_masm);
+   }
  
    C->output()->set_frame_complete(cbuf.insts_size());
  
    if (C->has_mach_constant_base_node()) {
      // NOTE: We set the table base offset here because users might be

@@ -916,16 +924,10 @@
      ConstantTable& constant_table = C->output()->constant_table();
      constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
    }
  }
  
- uint MachPrologNode::size(PhaseRegAlloc* ra_) const
- {
-   return MachNode::size(ra_); // too many variables; just compute it
-                               // the hard way
- }
- 
  int MachPrologNode::reloc() const
  {
    return 0; // a large enough number
  }
  

@@ -969,33 +971,13 @@
      // Clear upper bits of YMM registers when current compiled code uses
      // wide vectors to avoid AVX <-> SSE transition penalty during call.
      __ vzeroupper();
    }
  
-   int framesize = C->output()->frame_size_in_bytes();
-   assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
-   // Remove word for return adr already pushed
-   // and RBP
-   framesize -= 2*wordSize;
- 
-   // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
- 
-   if (framesize) {
-     emit_opcode(cbuf, Assembler::REX_W);
-     if (framesize < 0x80) {
-       emit_opcode(cbuf, 0x83); // addq rsp, #framesize
-       emit_rm(cbuf, 0x3, 0x00, RSP_enc);
-       emit_d8(cbuf, framesize);
-     } else {
-       emit_opcode(cbuf, 0x81); // addq rsp, #framesize
-       emit_rm(cbuf, 0x3, 0x00, RSP_enc);
-       emit_d32(cbuf, framesize);
-     }
-   }
- 
-   // popq rbp
-   emit_opcode(cbuf, 0x58 | RBP_enc);
+   // Subtract two words to account for return address and rbp
+   int initial_framesize = C->output()->frame_size_in_bytes() - 2*wordSize;
+   __ remove_frame(initial_framesize, C->needs_stack_repair());
  
    if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
      __ reserved_stack_check();
    }
  

@@ -1009,16 +991,10 @@
      __ relocate(relocInfo::poll_return_type);
      __ safepoint_poll(*code_stub, r15_thread, true /* at_return */, true /* in_nmethod */);
    }
  }
  
- uint MachEpilogNode::size(PhaseRegAlloc* ra_) const
- {
-   return MachNode::size(ra_); // too many variables; just compute it
-                               // the hard way
- }
- 
  int MachEpilogNode::reloc() const
  {
    return 2; // a large enough number
  }
  

@@ -1647,10 +1623,40 @@
  {
    int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
    return (offset < 0x80) ? 5 : 8; // REX
  }
  
+ //=============================================================================
+ #ifndef PRODUCT
+ void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
+ {
+   st->print_cr("MachVEPNode");
+ }
+ #endif
+ 
+ void MachVEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
+ {
+   MacroAssembler _masm(&cbuf);
+   if (!_verified) {
+     uint insts_size = cbuf.insts_size();
+     if (UseCompressedClassPointers) {
+       __ load_klass(rscratch1, j_rarg0, rscratch2);
+       __ cmpptr(rax, rscratch1);
+     } else {
+       __ cmpptr(rax, Address(j_rarg0, oopDesc::klass_offset_in_bytes()));
+     }
+     __ jump_cc(Assembler::notEqual, RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
+   } else {
+     // Unpack inline type args passed as oop and then jump to
+     // the verified entry point (skipping the unverified entry).
+     int sp_inc = __ unpack_inline_args(ra_->C, _receiver_only);
+     // Emit code for verified entry and save increment for stack repair on return
+     __ verified_entry(ra_->C, sp_inc);
+     __ jmp(*_verified_entry);
+   }
+ }
+ 
  //=============================================================================
  #ifndef PRODUCT
  void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
  {
    if (UseCompressedClassPointers) {

@@ -1689,17 +1695,10 @@
    nops_cnt &= 0x3; // Do not add nops if code is aligned.
    if (nops_cnt > 0)
      masm.nop(nops_cnt);
  }
  
- uint MachUEPNode::size(PhaseRegAlloc* ra_) const
- {
-   return MachNode::size(ra_); // too many variables; just compute it
-                               // the hard way
- }
- 
- 
  //=============================================================================
  
  const bool Matcher::supports_vector_calling_convention(void) {
    if (EnableVectorSupport && UseVectorStubs) {
      return true;

@@ -3973,10 +3972,26 @@
      scale($scale);
      disp($off);
    %}
  %}
  
+ // Indirect Narrow Oop Operand
+ operand indCompressedOop(rRegN reg) %{
+   predicate(UseCompressedOops && (CompressedOops::shift() == Address::times_8));
+   constraint(ALLOC_IN_RC(ptr_reg));
+   match(DecodeN reg);
+ 
+   op_cost(10);
+   format %{"[R12 + $reg << 3] (compressed oop addressing)" %}
+   interface(MEMORY_INTER) %{
+     base(0xc); // R12
+     index($reg);
+     scale(0x3);
+     disp(0x0);
+   %}
+ %}
+ 
  // Indirect Narrow Oop Plus Offset Operand
  // Note: x86 architecture doesn't support "scale * index + offset" without a base
  // we can't free r12 even with CompressedOops::base() == NULL.
  operand indCompressedOopOffset(rRegN reg, immL32 off) %{
    predicate(UseCompressedOops && (CompressedOops::shift() == Address::times_8));

@@ -4315,11 +4330,11 @@
  // multiple operand types with the same basic encoding and format.  The classic
  // case of this is memory operands.
  
  opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex,
                 indIndexScale, indPosIndexScale, indIndexScaleOffset, indPosIndexOffset, indPosIndexScaleOffset,
-                indCompressedOopOffset,
+                indCompressedOop, indCompressedOopOffset,
                 indirectNarrow, indOffset8Narrow, indOffset32Narrow,
                 indIndexOffsetNarrow, indIndexNarrow, indIndexScaleNarrow,
                 indIndexScaleOffsetNarrow, indPosIndexOffsetNarrow, indPosIndexScaleOffsetNarrow);
  
  //----------PIPELINE-----------------------------------------------------------

@@ -6808,10 +6823,23 @@
      }
    %}
    ins_pipe(ialu_reg_reg); // XXX
  %}
  
+ instruct castN2X(rRegL dst, rRegN src)
+ %{
+   match(Set dst (CastP2X src));
+ 
+   format %{ "movq    $dst, $src\t# ptr -> long" %}
+   ins_encode %{
+     if ($dst$$reg != $src$$reg) {
+       __ movptr($dst$$Register, $src$$Register);
+     }
+   %}
+   ins_pipe(ialu_reg_reg); // XXX
+ %}
+ 
  instruct castP2X(rRegL dst, rRegP src)
  %{
    match(Set dst (CastP2X src));
  
    format %{ "movq    $dst, $src\t# ptr -> long" %}

@@ -11038,18 +11066,136 @@
       __ movdq($dst$$XMMRegister, $src$$Register);
    %}
    ins_pipe( pipe_slow );
  %}
  
+ 
  // Fast clearing of an array
  // Small ClearArray non-AVX512.
- instruct rep_stos(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegI zero,
+ instruct rep_stos(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
                    Universe dummy, rFlagsReg cr)
  %{
-   predicate(!((ClearArrayNode*)n)->is_large() && (UseAVX <= 2));
-   match(Set dummy (ClearArray cnt base));
-   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL zero, KILL cr);
+   predicate(!((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only() && (UseAVX <= 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, USE_KILL val, KILL cr);
+ 
+   format %{ $$template
+     $$emit$$"cmp     InitArrayShortSize,rcx\n\t"
+     $$emit$$"jg      LARGE\n\t"
+     $$emit$$"dec     rcx\n\t"
+     $$emit$$"js      DONE\t# Zero length\n\t"
+     $$emit$$"mov     rax,(rdi,rcx,8)\t# LOOP\n\t"
+     $$emit$$"dec     rcx\n\t"
+     $$emit$$"jge     LOOP\n\t"
+     $$emit$$"jmp     DONE\n\t"
+     $$emit$$"# LARGE:\n\t"
+     if (UseFastStosb) {
+        $$emit$$"shlq    rcx,3\t# Convert doublewords to bytes\n\t"
+        $$emit$$"rep     stosb\t# Store rax to *rdi++ while rcx--\n\t"
+     } else if (UseXMMForObjInit) {
+        $$emit$$"movdq   $tmp, $val\n\t"
+        $$emit$$"punpcklqdq $tmp, $tmp\n\t"
+        $$emit$$"vinserti128_high $tmp, $tmp\n\t"
+        $$emit$$"jmpq    L_zero_64_bytes\n\t"
+        $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
+        $$emit$$"add     0x40,rax\n\t"
+        $$emit$$"# L_zero_64_bytes:\n\t"
+        $$emit$$"sub     0x8,rcx\n\t"
+        $$emit$$"jge     L_loop\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jl      L_tail\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"add     0x20,rax\n\t"
+        $$emit$$"sub     0x4,rcx\n\t"
+        $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jle     L_end\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
+        $$emit$$"vmovq   xmm0,(rax)\n\t"
+        $$emit$$"add     0x8,rax\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"jge     L_sloop\n\t"
+        $$emit$$"# L_end:\n\t"
+     } else {
+        $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--\n\t"
+     }
+     $$emit$$"# DONE"
+   %}
+   ins_encode %{
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, false, false);
+   %}
+   ins_pipe(pipe_slow);
+ %}
+ 
+ instruct rep_stos_word_copy(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
+                             Universe dummy, rFlagsReg cr)
+ %{
+   predicate(!((ClearArrayNode*)n)->is_large() && ((ClearArrayNode*)n)->word_copy_only() && (UseAVX <= 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, USE_KILL val, KILL cr);
+ 
+   format %{ $$template
+     $$emit$$"cmp     InitArrayShortSize,rcx\n\t"
+     $$emit$$"jg      LARGE\n\t"
+     $$emit$$"dec     rcx\n\t"
+     $$emit$$"js      DONE\t# Zero length\n\t"
+     $$emit$$"mov     rax,(rdi,rcx,8)\t# LOOP\n\t"
+     $$emit$$"dec     rcx\n\t"
+     $$emit$$"jge     LOOP\n\t"
+     $$emit$$"jmp     DONE\n\t"
+     $$emit$$"# LARGE:\n\t"
+     if (UseXMMForObjInit) {
+        $$emit$$"movdq   $tmp, $val\n\t"
+        $$emit$$"punpcklqdq $tmp, $tmp\n\t"
+        $$emit$$"vinserti128_high $tmp, $tmp\n\t"
+        $$emit$$"jmpq    L_zero_64_bytes\n\t"
+        $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
+        $$emit$$"add     0x40,rax\n\t"
+        $$emit$$"# L_zero_64_bytes:\n\t"
+        $$emit$$"sub     0x8,rcx\n\t"
+        $$emit$$"jge     L_loop\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jl      L_tail\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"add     0x20,rax\n\t"
+        $$emit$$"sub     0x4,rcx\n\t"
+        $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jle     L_end\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
+        $$emit$$"vmovq   xmm0,(rax)\n\t"
+        $$emit$$"add     0x8,rax\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"jge     L_sloop\n\t"
+        $$emit$$"# L_end:\n\t"
+     } else {
+        $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--\n\t"
+     }
+     $$emit$$"# DONE"
+   %}
+   ins_encode %{
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, false, true);
+   %}
+   ins_pipe(pipe_slow);
+ %}
+ 
+ // Small ClearArray AVX512 non-constant length.
+ instruct rep_stos_evex(rcx_RegL cnt, rdi_RegP base, legRegD tmp, kReg ktmp, rax_RegL val,
+                        Universe dummy, rFlagsReg cr)
+ %{
+   predicate(!((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only() && (UseAVX > 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   ins_cost(125);
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, TEMP ktmp, USE_KILL val, KILL cr);
  
    format %{ $$template
      $$emit$$"xorq    rax, rax\t# ClearArray:\n\t"
      $$emit$$"cmp     InitArrayShortSize,rcx\n\t"
      $$emit$$"jg      LARGE\n\t"

@@ -11093,24 +11239,23 @@
         $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--\n\t"
      }
      $$emit$$"# DONE"
    %}
    ins_encode %{
-     __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register,
-                  $tmp$$XMMRegister, false, knoreg);
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, false, false, $ktmp$$KRegister);
    %}
    ins_pipe(pipe_slow);
  %}
  
- // Small ClearArray AVX512 non-constant length.
- instruct rep_stos_evex(rcx_RegL cnt, rdi_RegP base, legRegD tmp, kReg ktmp, rax_RegI zero,
-                        Universe dummy, rFlagsReg cr)
+ instruct rep_stos_evex_word_copy(rcx_RegL cnt, rdi_RegP base, legRegD tmp, kReg ktmp, rax_RegL val,
+                                  Universe dummy, rFlagsReg cr)
  %{
-   predicate(!((ClearArrayNode*)n)->is_large() && (UseAVX > 2));
-   match(Set dummy (ClearArray cnt base));
+   predicate(!((ClearArrayNode*)n)->is_large() && ((ClearArrayNode*)n)->word_copy_only() && (UseAVX > 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
    ins_cost(125);
-   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, TEMP ktmp, KILL zero, KILL cr);
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, TEMP ktmp, USE_KILL val, KILL cr);
  
    format %{ $$template
      $$emit$$"xorq    rax, rax\t# ClearArray:\n\t"
      $$emit$$"cmp     InitArrayShortSize,rcx\n\t"
      $$emit$$"jg      LARGE\n\t"

@@ -11154,23 +11299,119 @@
         $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--\n\t"
      }
      $$emit$$"# DONE"
    %}
    ins_encode %{
-     __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register,
-                  $tmp$$XMMRegister, false, $ktmp$$KRegister);
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, false, true, $ktmp$$KRegister);
    %}
    ins_pipe(pipe_slow);
  %}
  
  // Large ClearArray non-AVX512.
- instruct rep_stos_large(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegI zero,
+ instruct rep_stos_large(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
                          Universe dummy, rFlagsReg cr)
  %{
-   predicate((UseAVX <=2) && ((ClearArrayNode*)n)->is_large());
-   match(Set dummy (ClearArray cnt base));
-   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, KILL zero, KILL cr);
+   predicate(((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only() && (UseAVX <= 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, USE_KILL val, KILL cr);
+ 
+   format %{ $$template
+     if (UseFastStosb) {
+        $$emit$$"shlq    rcx,3\t# Convert doublewords to bytes\n\t"
+        $$emit$$"rep     stosb\t# Store rax to *rdi++ while rcx--"
+     } else if (UseXMMForObjInit) {
+        $$emit$$"movdq   $tmp, $val\n\t"
+        $$emit$$"punpcklqdq $tmp, $tmp\n\t"
+        $$emit$$"vinserti128_high $tmp, $tmp\n\t"
+        $$emit$$"jmpq    L_zero_64_bytes\n\t"
+        $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
+        $$emit$$"add     0x40,rax\n\t"
+        $$emit$$"# L_zero_64_bytes:\n\t"
+        $$emit$$"sub     0x8,rcx\n\t"
+        $$emit$$"jge     L_loop\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jl      L_tail\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"add     0x20,rax\n\t"
+        $$emit$$"sub     0x4,rcx\n\t"
+        $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jle     L_end\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
+        $$emit$$"vmovq   xmm0,(rax)\n\t"
+        $$emit$$"add     0x8,rax\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"jge     L_sloop\n\t"
+        $$emit$$"# L_end:\n\t"
+     } else {
+        $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--"
+     }
+   %}
+   ins_encode %{
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, true, false);
+   %}
+   ins_pipe(pipe_slow);
+ %}
+ 
+ instruct rep_stos_large_word_copy(rcx_RegL cnt, rdi_RegP base, regD tmp, rax_RegL val,
+                                   Universe dummy, rFlagsReg cr)
+ %{
+   predicate(((ClearArrayNode*)n)->is_large() && ((ClearArrayNode*)n)->word_copy_only() && (UseAVX <= 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, USE_KILL val, KILL cr);
+ 
+   format %{ $$template
+     if (UseXMMForObjInit) {
+        $$emit$$"movdq   $tmp, $val\n\t"
+        $$emit$$"punpcklqdq $tmp, $tmp\n\t"
+        $$emit$$"vinserti128_high $tmp, $tmp\n\t"
+        $$emit$$"jmpq    L_zero_64_bytes\n\t"
+        $$emit$$"# L_loop:\t# 64-byte LOOP\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"vmovdqu $tmp,0x20(rax)\n\t"
+        $$emit$$"add     0x40,rax\n\t"
+        $$emit$$"# L_zero_64_bytes:\n\t"
+        $$emit$$"sub     0x8,rcx\n\t"
+        $$emit$$"jge     L_loop\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jl      L_tail\n\t"
+        $$emit$$"vmovdqu $tmp,(rax)\n\t"
+        $$emit$$"add     0x20,rax\n\t"
+        $$emit$$"sub     0x4,rcx\n\t"
+        $$emit$$"# L_tail:\t# Clearing tail bytes\n\t"
+        $$emit$$"add     0x4,rcx\n\t"
+        $$emit$$"jle     L_end\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"# L_sloop:\t# 8-byte short loop\n\t"
+        $$emit$$"vmovq   xmm0,(rax)\n\t"
+        $$emit$$"add     0x8,rax\n\t"
+        $$emit$$"dec     rcx\n\t"
+        $$emit$$"jge     L_sloop\n\t"
+        $$emit$$"# L_end:\n\t"
+     } else {
+        $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--"
+     }
+   %}
+   ins_encode %{
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, true, true);
+   %}
+   ins_pipe(pipe_slow);
+ %}
+ 
+ // Large ClearArray AVX512.
+ instruct rep_stos_large_evex(rcx_RegL cnt, rdi_RegP base, legRegD tmp, kReg ktmp, rax_RegL val,
+                              Universe dummy, rFlagsReg cr)
+ %{
+   predicate(((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only() && (UseAVX > 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, TEMP ktmp, USE_KILL val, KILL cr);
  
    format %{ $$template
      if (UseFastStosb) {
         $$emit$$"xorq    rax, rax\t# ClearArray:\n\t"
         $$emit$$"shlq    rcx,3\t# Convert doublewords to bytes\n\t"

@@ -11205,23 +11446,22 @@
         $$emit$$"xorq    rax, rax\t# ClearArray:\n\t"
         $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--"
      }
    %}
    ins_encode %{
-     __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register,
-                  $tmp$$XMMRegister, true, knoreg);
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, true, false, $ktmp$$KRegister);
    %}
    ins_pipe(pipe_slow);
  %}
  
- // Large ClearArray AVX512.
- instruct rep_stos_large_evex(rcx_RegL cnt, rdi_RegP base, legRegD tmp, kReg ktmp, rax_RegI zero,
-                              Universe dummy, rFlagsReg cr)
+ instruct rep_stos_large_evex_word_copy(rcx_RegL cnt, rdi_RegP base, legRegD tmp, kReg ktmp, rax_RegL val,
+                                        Universe dummy, rFlagsReg cr)
  %{
-   predicate((UseAVX > 2) && ((ClearArrayNode*)n)->is_large());
-   match(Set dummy (ClearArray cnt base));
-   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, TEMP ktmp, KILL zero, KILL cr);
+   predicate(((ClearArrayNode*)n)->is_large() && ((ClearArrayNode*)n)->word_copy_only() && (UseAVX > 2));
+   match(Set dummy (ClearArray (Binary cnt base) val));
+   effect(USE_KILL cnt, USE_KILL base, TEMP tmp, TEMP ktmp, USE_KILL val, KILL cr);
  
    format %{ $$template
      if (UseFastStosb) {
         $$emit$$"xorq    rax, rax\t# ClearArray:\n\t"
         $$emit$$"shlq    rcx,3\t# Convert doublewords to bytes\n\t"

@@ -11256,27 +11496,27 @@
         $$emit$$"xorq    rax, rax\t# ClearArray:\n\t"
         $$emit$$"rep     stosq\t# Store rax to *rdi++ while rcx--"
      }
    %}
    ins_encode %{
-     __ clear_mem($base$$Register, $cnt$$Register, $zero$$Register,
-                  $tmp$$XMMRegister, true, $ktmp$$KRegister);
+     __ clear_mem($base$$Register, $cnt$$Register, $val$$Register,
+                  $tmp$$XMMRegister, true, true, $ktmp$$KRegister);
    %}
    ins_pipe(pipe_slow);
  %}
  
  // Small ClearArray AVX512 constant length.
- instruct rep_stos_im(immL cnt, rRegP base, regD tmp, rRegI zero, kReg ktmp, Universe dummy, rFlagsReg cr)
+ instruct rep_stos_im(immL cnt, rRegP base, regD tmp, rax_RegL val, kReg ktmp, Universe dummy, rFlagsReg cr)
  %{
-   predicate(!((ClearArrayNode*)n)->is_large() &&
-               ((UseAVX > 2) && VM_Version::supports_avx512vlbw()));
-   match(Set dummy (ClearArray cnt base));
+   predicate(!((ClearArrayNode*)n)->is_large() && !((ClearArrayNode*)n)->word_copy_only() &&
+             ((UseAVX > 2) && VM_Version::supports_avx512vlbw()));
+   match(Set dummy (ClearArray (Binary cnt base) val));
    ins_cost(100);
-   effect(TEMP tmp, TEMP zero, TEMP ktmp, KILL cr);
+   effect(TEMP tmp, USE_KILL val, TEMP ktmp, KILL cr);
    format %{ "clear_mem_imm $base , $cnt  \n\t" %}
    ins_encode %{
-    __ clear_mem($base$$Register, $cnt$$constant, $zero$$Register, $tmp$$XMMRegister, $ktmp$$KRegister);
+     __ clear_mem($base$$Register, $cnt$$constant, $val$$Register, $tmp$$XMMRegister, $ktmp$$KRegister);
    %}
    ins_pipe(pipe_slow);
  %}
  
  instruct string_compareL(rdi_RegP str1, rcx_RegI cnt1, rsi_RegP str2, rdx_RegI cnt2,

@@ -13077,12 +13317,28 @@
    ins_encode(clear_avx, Java_To_Runtime(meth));
    ins_pipe(pipe_slow);
  %}
  
  // Call runtime without safepoint
+ // entry point is null, target holds the address to call
+ instruct CallLeafNoFPInDirect(rRegP target)
+ %{
+   predicate(n->as_Call()->entry_point() == NULL);
+   match(CallLeafNoFP target);
+ 
+   ins_cost(300);
+   format %{ "call_leaf_nofp,runtime indirect " %}
+   ins_encode %{
+      __ call($target$$Register);
+   %}
+ 
+   ins_pipe(pipe_slow);
+ %}
+ 
  instruct CallLeafNoFPDirect(method meth)
  %{
+   predicate(n->as_Call()->entry_point() != NULL);
    match(CallLeafNoFP);
    effect(USE meth);
  
    ins_cost(300);
    format %{ "call_leaf_nofp,runtime " %}
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