1 /*
2 * Copyright (c) 2000, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "c1/c1_CodeStubs.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/safepointMechanism.inline.hpp"
32 #include "runtime/sharedRuntime.hpp"
33 #include "runtime/vm_version.hpp"
34
35 Register LIR_Opr::as_register() const {
36 return FrameMap::cpu_rnr2reg(cpu_regnr());
37 }
38
39 Register LIR_Opr::as_register_lo() const {
40 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
41 }
42
43 Register LIR_Opr::as_register_hi() const {
44 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
45 }
46
47 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
48 LIR_Opr LIR_OprFact::nullOpr = LIR_Opr();
49
50 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
51 ValueTag tag = type->tag();
52 switch (tag) {
53 case metaDataTag : {
54 ClassConstant* c = type->as_ClassConstant();
55 if (c != nullptr && !c->value()->is_loaded()) {
56 return LIR_OprFact::metadataConst(nullptr);
57 } else if (c != nullptr) {
58 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
59 } else {
60 MethodConstant* m = type->as_MethodConstant();
61 assert (m != nullptr, "not a class or a method?");
62 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
63 }
64 }
65 case objectTag : {
66 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
67 }
68 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
69 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
70 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
71 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
72 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
73 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
74 }
75 }
76
77
78 //---------------------------------------------------
79
80
81 LIR_Address::Scale LIR_Address::scale(BasicType type) {
82 int elem_size = type2aelembytes(type);
83 switch (elem_size) {
84 case 1: return LIR_Address::times_1;
85 case 2: return LIR_Address::times_2;
86 case 4: return LIR_Address::times_4;
87 case 8: return LIR_Address::times_8;
88 }
89 ShouldNotReachHere();
90 return LIR_Address::times_1;
91 }
92
93 //---------------------------------------------------
94
95 char LIR_Opr::type_char(BasicType t) {
96 switch (t) {
97 case T_ARRAY:
98 t = T_OBJECT;
99 case T_BOOLEAN:
100 case T_CHAR:
101 case T_FLOAT:
102 case T_DOUBLE:
103 case T_BYTE:
104 case T_SHORT:
105 case T_INT:
106 case T_LONG:
107 case T_OBJECT:
108 case T_ADDRESS:
109 case T_VOID:
110 return ::type2char(t);
111 case T_METADATA:
112 return 'M';
113 case T_ILLEGAL:
114 return '?';
115
116 default:
117 ShouldNotReachHere();
118 return '?';
119 }
120 }
121
122 #ifndef PRODUCT
123 void LIR_Opr::validate_type() const {
124
125 #ifdef ASSERT
126 if (!is_pointer() && !is_illegal()) {
127 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
128 switch (as_BasicType(type_field())) {
129 case T_LONG:
130 assert((kindfield == cpu_register || kindfield == stack_value) &&
131 size_field() == double_size, "must match");
132 break;
133 case T_FLOAT:
134 // FP return values can be also in CPU registers on ARM (softfp ABI)
135 assert((kindfield == fpu_register || kindfield == stack_value
136 ARM_ONLY(|| kindfield == cpu_register) ) &&
137 size_field() == single_size, "must match");
138 break;
139 case T_DOUBLE:
140 // FP return values can be also in CPU registers on ARM (softfp ABI)
141 assert((kindfield == fpu_register || kindfield == stack_value
142 ARM_ONLY(|| kindfield == cpu_register) ) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_BOOLEAN:
146 case T_CHAR:
147 case T_BYTE:
148 case T_SHORT:
149 case T_INT:
150 case T_ADDRESS:
151 case T_OBJECT:
152 case T_METADATA:
153 case T_ARRAY:
154 assert((kindfield == cpu_register || kindfield == stack_value) &&
155 size_field() == single_size, "must match");
156 break;
157
158 case T_ILLEGAL:
159 // XXX TKR also means unknown right now
160 // assert(is_illegal(), "must match");
161 break;
162
163 default:
164 ShouldNotReachHere();
165 }
166 }
167 #endif
168
169 }
170 #endif // PRODUCT
171
172
173 bool LIR_Opr::is_oop() const {
174 if (is_pointer()) {
175 return pointer()->is_oop_pointer();
176 } else {
177 OprType t= type_field();
178 assert(t != unknown_type, "not set");
179 return t == object_type;
180 }
181 }
182
183
184
185 void LIR_Op2::verify() const {
186 #ifdef ASSERT
187 switch (code()) {
188 case lir_xchg:
189 break;
190
191 default:
192 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
193 "can't produce oops from arith");
194 }
195
196 if (two_operand_lir_form) {
197
198 bool threeOperandForm = false;
199 #ifdef S390
200 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
201 threeOperandForm =
202 code() == lir_shl ||
203 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
204 #endif
205
206 switch (code()) {
207 case lir_add:
208 case lir_sub:
209 case lir_mul:
210 case lir_div:
211 case lir_rem:
212 case lir_logic_and:
213 case lir_logic_or:
214 case lir_logic_xor:
215 case lir_shl:
216 case lir_shr:
217 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
218 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
219 break;
220
221 // special handling for lir_ushr because of write barriers
222 case lir_ushr:
223 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
224 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
225 break;
226
227 default:
228 break;
229 }
230 }
231 #endif
232 }
233
234
235 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
236 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
237 , _label(block->label())
238 , _block(block)
239 , _ublock(nullptr)
240 , _stub(nullptr) {
241 }
242
243 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
244 LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
245 , _label(stub->entry())
246 , _block(nullptr)
247 , _ublock(nullptr)
248 , _stub(stub) {
249 }
250
251 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
252 : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
253 , _label(block->label())
254 , _block(block)
255 , _ublock(ublock)
256 , _stub(nullptr)
257 {
258 }
259
260 void LIR_OpBranch::change_block(BlockBegin* b) {
261 assert(_block != nullptr, "must have old block");
262 assert(_block->label() == label(), "must be equal");
263
264 _block = b;
265 _label = b->label();
266 }
267
268 void LIR_OpBranch::change_ublock(BlockBegin* b) {
269 assert(_ublock != nullptr, "must have old block");
270 _ublock = b;
271 }
272
273 void LIR_OpBranch::negate_cond() {
274 switch (cond()) {
275 case lir_cond_equal: set_cond(lir_cond_notEqual); break;
276 case lir_cond_notEqual: set_cond(lir_cond_equal); break;
277 case lir_cond_less: set_cond(lir_cond_greaterEqual); break;
278 case lir_cond_lessEqual: set_cond(lir_cond_greater); break;
279 case lir_cond_greaterEqual: set_cond(lir_cond_less); break;
280 case lir_cond_greater: set_cond(lir_cond_lessEqual); break;
281 default: ShouldNotReachHere();
282 }
283 }
284
285
286 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
287 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
288 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
289 CodeStub* stub)
290
291 : LIR_Op(code, result, nullptr)
292 , _object(object)
293 , _array(LIR_OprFact::illegalOpr)
294 , _klass(klass)
295 , _tmp1(tmp1)
296 , _tmp2(tmp2)
297 , _tmp3(tmp3)
298 , _info_for_patch(info_for_patch)
299 , _info_for_exception(info_for_exception)
300 , _stub(stub)
301 , _profiled_method(nullptr)
302 , _profiled_bci(-1)
303 , _should_profile(false)
304 , _fast_check(fast_check)
305 {
306 if (code == lir_checkcast) {
307 assert(info_for_exception != nullptr, "checkcast throws exceptions");
308 } else if (code == lir_instanceof) {
309 assert(info_for_exception == nullptr, "instanceof throws no exceptions");
310 } else {
311 ShouldNotReachHere();
312 }
313 }
314
315
316
317 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
318 : LIR_Op(code, LIR_OprFact::illegalOpr, nullptr)
319 , _object(object)
320 , _array(array)
321 , _klass(nullptr)
322 , _tmp1(tmp1)
323 , _tmp2(tmp2)
324 , _tmp3(tmp3)
325 , _info_for_patch(nullptr)
326 , _info_for_exception(info_for_exception)
327 , _stub(nullptr)
328 , _profiled_method(nullptr)
329 , _profiled_bci(-1)
330 , _should_profile(false)
331 , _fast_check(false)
332 {
333 if (code == lir_store_check) {
334 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
335 assert(info_for_exception != nullptr, "store_check throws exceptions");
336 } else {
337 ShouldNotReachHere();
338 }
339 }
340
341
342 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
343 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
344 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
345 , _src(src)
346 , _src_pos(src_pos)
347 , _dst(dst)
348 , _dst_pos(dst_pos)
349 , _length(length)
350 , _tmp(tmp)
351 , _expected_type(expected_type)
352 , _flags(flags) {
353 #if defined(X86) || defined(AARCH64) || defined(S390) || defined(RISCV) || defined(PPC64)
354 if (expected_type != nullptr && flags == 0) {
355 _stub = nullptr;
356 } else {
357 _stub = new ArrayCopyStub(this);
358 }
359 #else
360 _stub = new ArrayCopyStub(this);
361 #endif
362 }
363
364 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
365 : LIR_Op(lir_updatecrc32, res, nullptr)
366 , _crc(crc)
367 , _val(val) {
368 }
369
370 //-------------------verify--------------------------
371
372 void LIR_Op1::verify() const {
373 switch(code()) {
374 case lir_move:
375 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
376 break;
377 case lir_null_check:
378 assert(in_opr()->is_register(), "must be");
379 break;
380 case lir_return:
381 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
382 break;
383 default:
384 break;
385 }
386 }
387
388 void LIR_OpRTCall::verify() const {
389 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
390 }
391
392 //-------------------visits--------------------------
393
394 // complete rework of LIR instruction visitor.
395 // The virtual call for each instruction type is replaced by a big
396 // switch that adds the operands for each instruction
397
398 void LIR_OpVisitState::visit(LIR_Op* op) {
399 // copy information from the LIR_Op
400 reset();
401 set_op(op);
402
403 switch (op->code()) {
404
405 // LIR_Op0
406 case lir_breakpoint: // result and info always invalid
407 case lir_membar: // result and info always invalid
408 case lir_membar_acquire: // result and info always invalid
409 case lir_membar_release: // result and info always invalid
410 case lir_membar_loadload: // result and info always invalid
411 case lir_membar_storestore: // result and info always invalid
412 case lir_membar_loadstore: // result and info always invalid
413 case lir_membar_storeload: // result and info always invalid
414 case lir_on_spin_wait:
415 {
416 assert(op->as_Op0() != nullptr, "must be");
417 assert(op->_info == nullptr, "info not used by this instruction");
418 assert(op->_result->is_illegal(), "not used");
419 break;
420 }
421
422 case lir_nop: // may have info, result always invalid
423 case lir_std_entry: // may have result, info always invalid
424 case lir_osr_entry: // may have result, info always invalid
425 case lir_get_thread: // may have result, info always invalid
426 {
427 assert(op->as_Op0() != nullptr, "must be");
428 if (op->_info != nullptr) do_info(op->_info);
429 if (op->_result->is_valid()) do_output(op->_result);
430 break;
431 }
432
433
434 // LIR_OpLabel
435 case lir_label: // result and info always invalid
436 {
437 assert(op->as_OpLabel() != nullptr, "must be");
438 assert(op->_info == nullptr, "info not used by this instruction");
439 assert(op->_result->is_illegal(), "not used");
440 break;
441 }
442
443
444 // LIR_Op1
445 case lir_push: // input always valid, result and info always invalid
446 case lir_pop: // input always valid, result and info always invalid
447 case lir_leal: // input and result always valid, info always invalid
448 case lir_monaddr: // input and result always valid, info always invalid
449 case lir_null_check: // input and info always valid, result always invalid
450 case lir_move: // input and result always valid, may have info
451 case lir_sqrt: // FP Ops have no info, but input and result
452 case lir_abs:
453 case lir_neg:
454 case lir_f2hf:
455 case lir_hf2f:
456 {
457 assert(op->as_Op1() != nullptr, "must be");
458 LIR_Op1* op1 = (LIR_Op1*)op;
459
460 if (op1->_info) do_info(op1->_info);
461 if (op1->_opr->is_valid()) do_input(op1->_opr);
462 if (op1->_tmp->is_valid()) do_temp(op1->_tmp);
463 if (op1->_result->is_valid()) do_output(op1->_result);
464
465 break;
466 }
467
468 case lir_return:
469 {
470 assert(op->as_OpReturn() != nullptr, "must be");
471 LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
472
473 if (op_ret->_info) do_info(op_ret->_info);
474 if (op_ret->_opr->is_valid()) do_input(op_ret->_opr);
475 if (op_ret->_result->is_valid()) do_output(op_ret->_result);
476 if (op_ret->stub() != nullptr) do_stub(op_ret->stub());
477
478 break;
479 }
480
481 case lir_safepoint:
482 {
483 assert(op->as_Op1() != nullptr, "must be");
484 LIR_Op1* op1 = (LIR_Op1*)op;
485
486 assert(op1->_info != nullptr, ""); do_info(op1->_info);
487 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
488 assert(op1->_tmp->is_illegal(), "not used");
489 assert(op1->_result->is_illegal(), "safepoint does not produce value");
490
491 break;
492 }
493
494 // LIR_OpConvert;
495 case lir_convert: // input and result always valid, info always invalid
496 {
497 assert(op->as_OpConvert() != nullptr, "must be");
498 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
499
500 assert(opConvert->_info == nullptr, "must be");
501 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
502 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
503 do_stub(opConvert->_stub);
504
505 break;
506 }
507
508 // LIR_OpBranch;
509 case lir_branch: // may have info, input and result register always invalid
510 case lir_cond_float_branch: // may have info, input and result register always invalid
511 {
512 assert(op->as_OpBranch() != nullptr, "must be");
513 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
514
515 assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() &&
516 opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() &&
517 opBranch->_tmp5->is_illegal(), "not used");
518
519 if (opBranch->_opr1->is_valid()) do_input(opBranch->_opr1);
520 if (opBranch->_opr2->is_valid()) do_input(opBranch->_opr2);
521
522 if (opBranch->_info != nullptr) do_info(opBranch->_info);
523 assert(opBranch->_result->is_illegal(), "not used");
524 if (opBranch->_stub != nullptr) opBranch->stub()->visit(this);
525
526 break;
527 }
528
529
530 // LIR_OpAllocObj
531 case lir_alloc_object:
532 {
533 assert(op->as_OpAllocObj() != nullptr, "must be");
534 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
535
536 if (opAllocObj->_info) do_info(opAllocObj->_info);
537 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
538 do_temp(opAllocObj->_opr);
539 }
540 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
541 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
542 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
543 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
544 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
545 if (opAllocObj->_stub != nullptr) do_stub(opAllocObj->_stub);
546 break;
547 }
548
549
550 // LIR_Op2
551 case lir_cmp:
552 case lir_cmp_l2i:
553 case lir_ucmp_fd2i:
554 case lir_cmp_fd2i:
555 case lir_add:
556 case lir_sub:
557 case lir_rem:
558 case lir_logic_and:
559 case lir_logic_or:
560 case lir_logic_xor:
561 case lir_shl:
562 case lir_shr:
563 case lir_ushr:
564 case lir_xadd:
565 case lir_xchg:
566 case lir_assert:
567 {
568 assert(op->as_Op2() != nullptr, "must be");
569 LIR_Op2* op2 = (LIR_Op2*)op;
570 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
571 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
572
573 if (op2->_info) do_info(op2->_info);
574 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
575 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
576 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
577 if (op2->_result->is_valid()) do_output(op2->_result);
578 if (op->code() == lir_xchg || op->code() == lir_xadd) {
579 // on ARM and PPC, return value is loaded first so could
580 // destroy inputs. On other platforms that implement those
581 // (x86, sparc), the extra constrainsts are harmless.
582 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
583 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
584 }
585
586 break;
587 }
588
589 // special handling for cmove: right input operand must not be equal
590 // to the result operand, otherwise the backend fails
591 case lir_cmove:
592 {
593 assert(op->as_Op4() != nullptr, "must be");
594 LIR_Op4* op4 = (LIR_Op4*)op;
595
596 assert(op4->_info == nullptr && op4->_tmp1->is_illegal() && op4->_tmp2->is_illegal() &&
597 op4->_tmp3->is_illegal() && op4->_tmp4->is_illegal() && op4->_tmp5->is_illegal(), "not used");
598 assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && op4->_result->is_valid(), "used");
599
600 do_input(op4->_opr1);
601 do_input(op4->_opr2);
602 if (op4->_opr3->is_valid()) do_input(op4->_opr3);
603 if (op4->_opr4->is_valid()) do_input(op4->_opr4);
604 do_temp(op4->_opr2);
605 do_output(op4->_result);
606
607 break;
608 }
609
610 // vspecial handling for strict operations: register input operands
611 // as temp to guarantee that they do not overlap with other
612 // registers
613 case lir_mul:
614 case lir_div:
615 {
616 assert(op->as_Op2() != nullptr, "must be");
617 LIR_Op2* op2 = (LIR_Op2*)op;
618
619 assert(op2->_info == nullptr, "not used");
620 assert(op2->_opr1->is_valid(), "used");
621 assert(op2->_opr2->is_valid(), "used");
622 assert(op2->_result->is_valid(), "used");
623 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
624 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
625
626 do_input(op2->_opr1); do_temp(op2->_opr1);
627 do_input(op2->_opr2); do_temp(op2->_opr2);
628 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
629 do_output(op2->_result);
630
631 break;
632 }
633
634 case lir_throw: {
635 assert(op->as_Op2() != nullptr, "must be");
636 LIR_Op2* op2 = (LIR_Op2*)op;
637
638 if (op2->_info) do_info(op2->_info);
639 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
640 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
641 assert(op2->_result->is_illegal(), "no result");
642 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
643 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
644
645 break;
646 }
647
648 case lir_unwind: {
649 assert(op->as_Op1() != nullptr, "must be");
650 LIR_Op1* op1 = (LIR_Op1*)op;
651
652 assert(op1->_info == nullptr, "no info");
653 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
654 assert(op1->_tmp->is_illegal(), "not used");
655 assert(op1->_result->is_illegal(), "no result");
656
657 break;
658 }
659
660 // LIR_Op3
661 case lir_idiv:
662 case lir_irem: {
663 assert(op->as_Op3() != nullptr, "must be");
664 LIR_Op3* op3= (LIR_Op3*)op;
665
666 if (op3->_info) do_info(op3->_info);
667 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
668
669 // second operand is input and temp, so ensure that second operand
670 // and third operand get not the same register
671 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
672 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
673 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
674
675 if (op3->_result->is_valid()) do_output(op3->_result);
676
677 break;
678 }
679
680 case lir_fmad:
681 case lir_fmaf: {
682 assert(op->as_Op3() != nullptr, "must be");
683 LIR_Op3* op3= (LIR_Op3*)op;
684 assert(op3->_info == nullptr, "no info");
685 do_input(op3->_opr1);
686 do_input(op3->_opr2);
687 do_input(op3->_opr3);
688 do_output(op3->_result);
689 break;
690 }
691
692 // LIR_OpJavaCall
693 case lir_static_call:
694 case lir_optvirtual_call:
695 case lir_icvirtual_call:
696 case lir_dynamic_call: {
697 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
698 assert(opJavaCall != nullptr, "must be");
699
700 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
701
702 // only visit register parameters
703 int n = opJavaCall->_arguments->length();
704 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
705 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
706 do_input(*opJavaCall->_arguments->adr_at(i));
707 }
708 }
709
710 if (opJavaCall->_info) do_info(opJavaCall->_info);
711 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
712 opJavaCall->is_method_handle_invoke()) {
713 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
714 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
715 }
716 do_call();
717 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
718
719 break;
720 }
721
722
723 // LIR_OpRTCall
724 case lir_rtcall: {
725 assert(op->as_OpRTCall() != nullptr, "must be");
726 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
727
728 // only visit register parameters
729 int n = opRTCall->_arguments->length();
730 for (int i = 0; i < n; i++) {
731 if (!opRTCall->_arguments->at(i)->is_pointer()) {
732 do_input(*opRTCall->_arguments->adr_at(i));
733 }
734 }
735 if (opRTCall->_info) do_info(opRTCall->_info);
736 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
737 do_call();
738 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
739
740 break;
741 }
742
743
744 // LIR_OpArrayCopy
745 case lir_arraycopy: {
746 assert(op->as_OpArrayCopy() != nullptr, "must be");
747 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
748
749 assert(opArrayCopy->_result->is_illegal(), "unused");
750 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
751 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
752 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
753 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
754 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
755 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
756 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
757
758 // the implementation of arraycopy always has a call into the runtime
759 do_call();
760
761 break;
762 }
763
764
765 // LIR_OpUpdateCRC32
766 case lir_updatecrc32: {
767 assert(op->as_OpUpdateCRC32() != nullptr, "must be");
768 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
769
770 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
771 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
772 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
773 assert(opUp->_info == nullptr, "no info for LIR_OpUpdateCRC32");
774
775 break;
776 }
777
778
779 // LIR_OpLock
780 case lir_lock:
781 case lir_unlock: {
782 assert(op->as_OpLock() != nullptr, "must be");
783 LIR_OpLock* opLock = (LIR_OpLock*)op;
784
785 if (opLock->_info) do_info(opLock->_info);
786
787 // TODO: check if these operands really have to be temp
788 // (or if input is sufficient). This may have influence on the oop map!
789 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
790 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
791 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
792
793 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
794 assert(opLock->_result->is_illegal(), "unused");
795
796 do_stub(opLock->_stub);
797
798 break;
799 }
800
801
802 // LIR_OpDelay
803 case lir_delay_slot: {
804 assert(op->as_OpDelay() != nullptr, "must be");
805 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
806
807 visit(opDelay->delay_op());
808 break;
809 }
810
811 // LIR_OpTypeCheck
812 case lir_instanceof:
813 case lir_checkcast:
814 case lir_store_check: {
815 assert(op->as_OpTypeCheck() != nullptr, "must be");
816 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
817
818 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
819 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
820 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
821 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
822 do_temp(opTypeCheck->_object);
823 }
824 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
825 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
826 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
827 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
828 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
829 if (opTypeCheck->_stub != nullptr) do_stub(opTypeCheck->_stub);
830 break;
831 }
832
833 // LIR_OpCompareAndSwap
834 case lir_cas_long:
835 case lir_cas_obj:
836 case lir_cas_int: {
837 assert(op->as_OpCompareAndSwap() != nullptr, "must be");
838 LIR_OpCompareAndSwap* opCmpAndSwap = (LIR_OpCompareAndSwap*)op;
839
840 if (opCmpAndSwap->_info) do_info(opCmpAndSwap->_info);
841 assert(opCmpAndSwap->_addr->is_valid(), "used"); do_input(opCmpAndSwap->_addr);
842 do_temp(opCmpAndSwap->_addr);
843 assert(opCmpAndSwap->_cmp_value->is_valid(), "used"); do_input(opCmpAndSwap->_cmp_value);
844 do_temp(opCmpAndSwap->_cmp_value);
845 assert(opCmpAndSwap->_new_value->is_valid(), "used"); do_input(opCmpAndSwap->_new_value);
846 do_temp(opCmpAndSwap->_new_value);
847 if (opCmpAndSwap->_tmp1->is_valid()) do_temp(opCmpAndSwap->_tmp1);
848 if (opCmpAndSwap->_tmp2->is_valid()) do_temp(opCmpAndSwap->_tmp2);
849 if (opCmpAndSwap->_result->is_valid()) do_output(opCmpAndSwap->_result);
850
851 break;
852 }
853
854
855 // LIR_OpAllocArray;
856 case lir_alloc_array: {
857 assert(op->as_OpAllocArray() != nullptr, "must be");
858 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
859
860 if (opAllocArray->_info) do_info(opAllocArray->_info);
861 if (opAllocArray->_klass->is_valid()) { do_input(opAllocArray->_klass);
862 do_temp(opAllocArray->_klass);
863 }
864 if (opAllocArray->_len->is_valid()) { do_input(opAllocArray->_len);
865 do_temp(opAllocArray->_len);
866 }
867 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
868 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
869 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
870 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
871 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
872 if (opAllocArray->_stub != nullptr) do_stub(opAllocArray->_stub);
873 break;
874 }
875
876 // LIR_OpLoadKlass
877 case lir_load_klass:
878 {
879 LIR_OpLoadKlass* opLoadKlass = op->as_OpLoadKlass();
880 assert(opLoadKlass != nullptr, "must be");
881
882 do_input(opLoadKlass->_obj);
883 do_output(opLoadKlass->_result);
884 if (opLoadKlass->_info) do_info(opLoadKlass->_info);
885 break;
886 }
887
888
889 // LIR_OpProfileCall:
890 case lir_profile_call: {
891 assert(op->as_OpProfileCall() != nullptr, "must be");
892 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
893
894 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
895 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
896 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
897 break;
898 }
899
900 // LIR_OpProfileType:
901 case lir_profile_type: {
902 assert(op->as_OpProfileType() != nullptr, "must be");
903 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
904
905 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
906 do_input(opProfileType->_obj);
907 do_temp(opProfileType->_tmp);
908 break;
909 }
910 default:
911 op->visit(this);
912 }
913 }
914
915 void LIR_Op::visit(LIR_OpVisitState* state) {
916 ShouldNotReachHere();
917 }
918
919 void LIR_OpVisitState::do_stub(CodeStub* stub) {
920 if (stub != nullptr) {
921 stub->visit(this);
922 }
923 }
924
925 XHandlers* LIR_OpVisitState::all_xhandler() {
926 XHandlers* result = nullptr;
927
928 int i;
929 for (i = 0; i < info_count(); i++) {
930 if (info_at(i)->exception_handlers() != nullptr) {
931 result = info_at(i)->exception_handlers();
932 break;
933 }
934 }
935
936 #ifdef ASSERT
937 for (i = 0; i < info_count(); i++) {
938 assert(info_at(i)->exception_handlers() == nullptr ||
939 info_at(i)->exception_handlers() == result,
940 "only one xhandler list allowed per LIR-operation");
941 }
942 #endif
943
944 if (result != nullptr) {
945 return result;
946 } else {
947 return new XHandlers();
948 }
949
950 return result;
951 }
952
953
954 #ifdef ASSERT
955 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
956 visit(op);
957
958 return opr_count(inputMode) == 0 &&
959 opr_count(outputMode) == 0 &&
960 opr_count(tempMode) == 0 &&
961 info_count() == 0 &&
962 !has_call() &&
963 !has_slow_case();
964 }
965 #endif
966
967 // LIR_OpReturn
968 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
969 LIR_Op1(lir_return, opr, (CodeEmitInfo*)nullptr /* info */),
970 _stub(nullptr) {
971 if (VM_Version::supports_stack_watermark_barrier()) {
972 _stub = new C1SafepointPollStub();
973 }
974 }
975
976 //---------------------------------------------------
977
978
979 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
980 masm->emit_call(this);
981 }
982
983 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
984 masm->emit_rtcall(this);
985 }
986
987 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
988 masm->emit_opLabel(this);
989 }
990
991 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
992 masm->emit_arraycopy(this);
993 ArrayCopyStub* code_stub = stub();
994 if (code_stub != nullptr) {
995 masm->append_code_stub(code_stub);
996 }
997 }
998
999 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1000 masm->emit_updatecrc32(this);
1001 }
1002
1003 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1004 masm->emit_op0(this);
1005 }
1006
1007 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1008 masm->emit_op1(this);
1009 }
1010
1011 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1012 masm->emit_alloc_obj(this);
1013 masm->append_code_stub(stub());
1014 }
1015
1016 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1017 masm->emit_opBranch(this);
1018 if (stub()) {
1019 masm->append_code_stub(stub());
1020 }
1021 }
1022
1023 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1024 masm->emit_opConvert(this);
1025 if (stub() != nullptr) {
1026 masm->append_code_stub(stub());
1027 }
1028 }
1029
1030 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1031 masm->emit_op2(this);
1032 }
1033
1034 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1035 masm->emit_alloc_array(this);
1036 masm->append_code_stub(stub());
1037 }
1038
1039 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1040 masm->emit_opTypeCheck(this);
1041 if (stub()) {
1042 masm->append_code_stub(stub());
1043 }
1044 }
1045
1046 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1047 masm->emit_compare_and_swap(this);
1048 }
1049
1050 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1051 masm->emit_op3(this);
1052 }
1053
1054 void LIR_Op4::emit_code(LIR_Assembler* masm) {
1055 masm->emit_op4(this);
1056 }
1057
1058 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1059 masm->emit_lock(this);
1060 if (stub()) {
1061 masm->append_code_stub(stub());
1062 }
1063 }
1064
1065 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1066 masm->emit_load_klass(this);
1067 }
1068
1069 #ifdef ASSERT
1070 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1071 masm->emit_assert(this);
1072 }
1073 #endif
1074
1075 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1076 masm->emit_delay(this);
1077 }
1078
1079 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1080 masm->emit_profile_call(this);
1081 }
1082
1083 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1084 masm->emit_profile_type(this);
1085 }
1086
1087 // LIR_List
1088 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1089 : _operations(8)
1090 , _compilation(compilation)
1091 #ifndef PRODUCT
1092 , _block(block)
1093 #endif
1094 #ifdef ASSERT
1095 , _file(nullptr)
1096 , _line(0)
1097 #endif
1098 #ifdef RISCV
1099 , _cmp_opr1(LIR_OprFact::illegalOpr)
1100 , _cmp_opr2(LIR_OprFact::illegalOpr)
1101 #endif
1102 { }
1103
1104
1105 #ifdef ASSERT
1106 void LIR_List::set_file_and_line(const char * file, int line) {
1107 const char * f = strrchr(file, '/');
1108 if (f == nullptr) f = strrchr(file, '\\');
1109 if (f == nullptr) {
1110 f = file;
1111 } else {
1112 f++;
1113 }
1114 _file = f;
1115 _line = line;
1116 }
1117 #endif
1118
1119 #ifdef RISCV
1120 void LIR_List::set_cmp_oprs(LIR_Op* op) {
1121 switch (op->code()) {
1122 case lir_cmp:
1123 _cmp_opr1 = op->as_Op2()->in_opr1();
1124 _cmp_opr2 = op->as_Op2()->in_opr2();
1125 break;
1126 case lir_branch: // fall through
1127 case lir_cond_float_branch:
1128 assert(op->as_OpBranch()->cond() == lir_cond_always ||
1129 (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr),
1130 "conditional branches must have legal operands");
1131 if (op->as_OpBranch()->cond() != lir_cond_always) {
1132 op->as_Op2()->set_in_opr1(_cmp_opr1);
1133 op->as_Op2()->set_in_opr2(_cmp_opr2);
1134 }
1135 break;
1136 case lir_cmove:
1137 op->as_Op4()->set_in_opr3(_cmp_opr1);
1138 op->as_Op4()->set_in_opr4(_cmp_opr2);
1139 break;
1140 case lir_cas_long:
1141 case lir_cas_obj:
1142 case lir_cas_int:
1143 _cmp_opr1 = op->as_OpCompareAndSwap()->result_opr();
1144 _cmp_opr2 = LIR_OprFact::intConst(0);
1145 break;
1146 #if INCLUDE_ZGC
1147 case lir_xloadbarrier_test:
1148 _cmp_opr1 = FrameMap::as_opr(t1);
1149 _cmp_opr2 = LIR_OprFact::intConst(0);
1150 break;
1151 #endif
1152 default:
1153 break;
1154 }
1155 }
1156 #endif
1157
1158 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1159 assert(this == buffer->lir_list(), "wrong lir list");
1160 const int n = _operations.length();
1161
1162 if (buffer->number_of_ops() > 0) {
1163 // increase size of instructions list
1164 _operations.at_grow(n + buffer->number_of_ops() - 1, nullptr);
1165 // insert ops from buffer into instructions list
1166 int op_index = buffer->number_of_ops() - 1;
1167 int ip_index = buffer->number_of_insertion_points() - 1;
1168 int from_index = n - 1;
1169 int to_index = _operations.length() - 1;
1170 for (; ip_index >= 0; ip_index --) {
1171 int index = buffer->index_at(ip_index);
1172 // make room after insertion point
1173 while (index < from_index) {
1174 _operations.at_put(to_index --, _operations.at(from_index --));
1175 }
1176 // insert ops from buffer
1177 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1178 _operations.at_put(to_index --, buffer->op_at(op_index --));
1179 }
1180 }
1181 }
1182
1183 buffer->finish();
1184 }
1185
1186
1187 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1188 assert(reg->type() == T_OBJECT, "bad reg");
1189 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1190 }
1191
1192 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1193 assert(reg->type() == T_METADATA, "bad reg");
1194 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1195 }
1196
1197 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1198 append(new LIR_Op1(
1199 lir_move,
1200 LIR_OprFact::address(addr),
1201 src,
1202 addr->type(),
1203 patch_code,
1204 info));
1205 }
1206
1207
1208 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1209 append(new LIR_Op1(
1210 lir_move,
1211 LIR_OprFact::address(address),
1212 dst,
1213 address->type(),
1214 patch_code,
1215 info, lir_move_volatile));
1216 }
1217
1218 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1219 append(new LIR_Op1(
1220 lir_move,
1221 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1222 dst,
1223 type,
1224 patch_code,
1225 info, lir_move_volatile));
1226 }
1227
1228
1229 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1230 append(new LIR_Op1(
1231 lir_move,
1232 LIR_OprFact::intConst(v),
1233 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1234 type,
1235 patch_code,
1236 info));
1237 }
1238
1239
1240 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1241 append(new LIR_Op1(
1242 lir_move,
1243 LIR_OprFact::oopConst(o),
1244 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1245 type,
1246 patch_code,
1247 info));
1248 }
1249
1250
1251 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1252 append(new LIR_Op1(
1253 lir_move,
1254 src,
1255 LIR_OprFact::address(addr),
1256 addr->type(),
1257 patch_code,
1258 info));
1259 }
1260
1261
1262 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1263 append(new LIR_Op1(
1264 lir_move,
1265 src,
1266 LIR_OprFact::address(addr),
1267 addr->type(),
1268 patch_code,
1269 info,
1270 lir_move_volatile));
1271 }
1272
1273 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1274 append(new LIR_Op1(
1275 lir_move,
1276 src,
1277 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1278 type,
1279 patch_code,
1280 info, lir_move_volatile));
1281 }
1282
1283
1284 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1285 append(new LIR_Op3(
1286 lir_idiv,
1287 left,
1288 right,
1289 tmp,
1290 res,
1291 info));
1292 }
1293
1294
1295 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1296 append(new LIR_Op3(
1297 lir_idiv,
1298 left,
1299 LIR_OprFact::intConst(right),
1300 tmp,
1301 res,
1302 info));
1303 }
1304
1305
1306 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1307 append(new LIR_Op3(
1308 lir_irem,
1309 left,
1310 right,
1311 tmp,
1312 res,
1313 info));
1314 }
1315
1316
1317 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1318 append(new LIR_Op3(
1319 lir_irem,
1320 left,
1321 LIR_OprFact::intConst(right),
1322 tmp,
1323 res,
1324 info));
1325 }
1326
1327
1328 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1329 append(new LIR_Op2(
1330 lir_cmp,
1331 condition,
1332 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1333 LIR_OprFact::intConst(c),
1334 info));
1335 }
1336
1337
1338 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1339 append(new LIR_Op2(
1340 lir_cmp,
1341 condition,
1342 reg,
1343 LIR_OprFact::address(addr),
1344 info));
1345 }
1346
1347 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1348 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1349 append(new LIR_OpAllocObj(
1350 klass,
1351 dst,
1352 t1,
1353 t2,
1354 t3,
1355 t4,
1356 header_size,
1357 object_size,
1358 init_check,
1359 stub));
1360 }
1361
1362 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub, bool zero_array) {
1363 append(new LIR_OpAllocArray(
1364 klass,
1365 len,
1366 dst,
1367 t1,
1368 t2,
1369 t3,
1370 t4,
1371 type,
1372 stub,
1373 zero_array));
1374 }
1375
1376 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1377 append(new LIR_Op2(
1378 lir_shl,
1379 value,
1380 count,
1381 dst,
1382 tmp));
1383 }
1384
1385 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1386 append(new LIR_Op2(
1387 lir_shr,
1388 value,
1389 count,
1390 dst,
1391 tmp));
1392 }
1393
1394
1395 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1396 append(new LIR_Op2(
1397 lir_ushr,
1398 value,
1399 count,
1400 dst,
1401 tmp));
1402 }
1403
1404 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1405 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1406 left,
1407 right,
1408 dst));
1409 }
1410
1411 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1412 append(new LIR_OpLock(
1413 lir_lock,
1414 hdr,
1415 obj,
1416 lock,
1417 scratch,
1418 stub,
1419 info));
1420 }
1421
1422 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1423 append(new LIR_OpLock(
1424 lir_unlock,
1425 hdr,
1426 obj,
1427 lock,
1428 scratch,
1429 stub,
1430 nullptr));
1431 }
1432
1433
1434 void check_LIR() {
1435 // cannot do the proper checking as PRODUCT and other modes return different results
1436 // guarantee(sizeof(LIR_Opr) == wordSize, "may not have a v-table");
1437 }
1438
1439
1440
1441 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1442 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1443 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1444 ciMethod* profiled_method, int profiled_bci) {
1445 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1446 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1447 if (profiled_method != nullptr) {
1448 c->set_profiled_method(profiled_method);
1449 c->set_profiled_bci(profiled_bci);
1450 c->set_should_profile(true);
1451 }
1452 append(c);
1453 }
1454
1455 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1456 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, nullptr, info_for_patch, nullptr);
1457 if (profiled_method != nullptr) {
1458 c->set_profiled_method(profiled_method);
1459 c->set_profiled_bci(profiled_bci);
1460 c->set_should_profile(true);
1461 }
1462 append(c);
1463 }
1464
1465
1466 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1467 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1468 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1469 if (profiled_method != nullptr) {
1470 c->set_profiled_method(profiled_method);
1471 c->set_profiled_bci(profiled_bci);
1472 c->set_should_profile(true);
1473 }
1474 append(c);
1475 }
1476
1477 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1478 if (deoptimize_on_null) {
1479 // Emit an explicit null check and deoptimize if opr is null
1480 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1481 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(nullptr));
1482 branch(lir_cond_equal, deopt);
1483 } else {
1484 // Emit an implicit null check
1485 append(new LIR_Op1(lir_null_check, opr, info));
1486 }
1487 }
1488
1489 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1490 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1491 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1492 }
1493
1494 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1495 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1496 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1497 }
1498
1499 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1500 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1501 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1502 }
1503
1504
1505 #ifdef PRODUCT
1506
1507 void print_LIR(BlockList* blocks) {
1508 }
1509
1510 #else
1511 // LIR_Opr
1512 void LIR_Opr::print() const {
1513 print(tty);
1514 }
1515
1516 void LIR_Opr::print(outputStream* out) const {
1517 if (is_illegal()) {
1518 return;
1519 }
1520
1521 out->print("[");
1522 if (is_pointer()) {
1523 pointer()->print_value_on(out);
1524 } else if (is_single_stack()) {
1525 out->print("stack:%d", single_stack_ix());
1526 } else if (is_double_stack()) {
1527 out->print("dbl_stack:%d",double_stack_ix());
1528 } else if (is_virtual()) {
1529 out->print("R%d", vreg_number());
1530 } else if (is_single_cpu()) {
1531 out->print("%s", as_register()->name());
1532 } else if (is_double_cpu()) {
1533 out->print("%s", as_register_hi()->name());
1534 out->print("%s", as_register_lo()->name());
1535 #if defined(X86)
1536 } else if (is_single_xmm()) {
1537 out->print("%s", as_xmm_float_reg()->name());
1538 } else if (is_double_xmm()) {
1539 out->print("%s", as_xmm_double_reg()->name());
1540 } else if (is_single_fpu()) {
1541 out->print("fpu%d", fpu_regnr());
1542 } else if (is_double_fpu()) {
1543 out->print("fpu%d", fpu_regnrLo());
1544 #elif defined(AARCH64)
1545 } else if (is_single_fpu()) {
1546 out->print("fpu%d", fpu_regnr());
1547 } else if (is_double_fpu()) {
1548 out->print("fpu%d", fpu_regnrLo());
1549 #elif defined(ARM)
1550 } else if (is_single_fpu()) {
1551 out->print("s%d", fpu_regnr());
1552 } else if (is_double_fpu()) {
1553 out->print("d%d", fpu_regnrLo() >> 1);
1554 #else
1555 } else if (is_single_fpu()) {
1556 out->print("%s", as_float_reg()->name());
1557 } else if (is_double_fpu()) {
1558 out->print("%s", as_double_reg()->name());
1559 #endif
1560
1561 } else if (is_illegal()) {
1562 out->print("-");
1563 } else {
1564 out->print("Unknown Operand");
1565 }
1566 if (!is_illegal()) {
1567 out->print("|%c", type_char());
1568 }
1569 if (is_register() && is_last_use()) {
1570 out->print("(last_use)");
1571 }
1572 out->print("]");
1573 }
1574
1575
1576 // LIR_Address
1577 void LIR_Const::print_value_on(outputStream* out) const {
1578 switch (type()) {
1579 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1580 case T_INT: out->print("int:%d", as_jint()); break;
1581 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1582 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1583 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1584 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1585 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1586 default: out->print("%3d:" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1587 }
1588 }
1589
1590 // LIR_Address
1591 void LIR_Address::print_value_on(outputStream* out) const {
1592 out->print("Base:"); _base->print(out);
1593 if (!_index->is_illegal()) {
1594 out->print(" Index:"); _index->print(out);
1595 switch (scale()) {
1596 case times_1: break;
1597 case times_2: out->print(" * 2"); break;
1598 case times_4: out->print(" * 4"); break;
1599 case times_8: out->print(" * 8"); break;
1600 }
1601 }
1602 out->print(" Disp: %zd", _disp);
1603 }
1604
1605 // debug output of block header without InstructionPrinter
1606 // (because phi functions are not necessary for LIR)
1607 static void print_block(BlockBegin* x) {
1608 // print block id
1609 BlockEnd* end = x->end();
1610 tty->print("B%d ", x->block_id());
1611
1612 // print flags
1613 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1614 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1615 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1616 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1617 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1618 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1619 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1620
1621 // print block bci range
1622 tty->print("[%d, %d] ", x->bci(), (end == nullptr ? -1 : end->printable_bci()));
1623
1624 // print predecessors and successors
1625 if (x->number_of_preds() > 0) {
1626 tty->print("preds: ");
1627 for (int i = 0; i < x->number_of_preds(); i ++) {
1628 tty->print("B%d ", x->pred_at(i)->block_id());
1629 }
1630 }
1631
1632 if (end != nullptr && x->number_of_sux() > 0) {
1633 tty->print("sux: ");
1634 for (int i = 0; i < x->number_of_sux(); i ++) {
1635 tty->print("B%d ", x->sux_at(i)->block_id());
1636 }
1637 }
1638
1639 // print exception handlers
1640 if (x->number_of_exception_handlers() > 0) {
1641 tty->print("xhandler: ");
1642 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1643 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1644 }
1645 }
1646
1647 tty->cr();
1648 }
1649
1650 void print_LIR(BlockList* blocks) {
1651 tty->print_cr("LIR:");
1652 int i;
1653 for (i = 0; i < blocks->length(); i++) {
1654 BlockBegin* bb = blocks->at(i);
1655 print_block(bb);
1656 tty->print("__id_Instruction___________________________________________"); tty->cr();
1657 bb->lir()->print_instructions();
1658 }
1659 }
1660
1661 void LIR_List::print_instructions() {
1662 for (int i = 0; i < _operations.length(); i++) {
1663 _operations.at(i)->print(); tty->cr();
1664 }
1665 tty->cr();
1666 }
1667
1668 // LIR_Ops printing routines
1669 // LIR_Op
1670 void LIR_Op::print_on(outputStream* out) const {
1671 if (id() != -1 || PrintCFGToFile) {
1672 out->print("%4d ", id());
1673 } else {
1674 out->print(" ");
1675 }
1676 out->print("%s ", name());
1677 print_instr(out);
1678 if (info() != nullptr) out->print(" [bci:%d]", info()->stack()->bci());
1679 #ifdef ASSERT
1680 if (Verbose && _file != nullptr) {
1681 out->print(" (%s:%d)", _file, _line);
1682 }
1683 #endif
1684 }
1685
1686 const char * LIR_Op::name() const {
1687 const char* s = nullptr;
1688 switch(code()) {
1689 // LIR_Op0
1690 case lir_membar: s = "membar"; break;
1691 case lir_membar_acquire: s = "membar_acquire"; break;
1692 case lir_membar_release: s = "membar_release"; break;
1693 case lir_membar_loadload: s = "membar_loadload"; break;
1694 case lir_membar_storestore: s = "membar_storestore"; break;
1695 case lir_membar_loadstore: s = "membar_loadstore"; break;
1696 case lir_membar_storeload: s = "membar_storeload"; break;
1697 case lir_label: s = "label"; break;
1698 case lir_nop: s = "nop"; break;
1699 case lir_on_spin_wait: s = "on_spin_wait"; break;
1700 case lir_std_entry: s = "std_entry"; break;
1701 case lir_osr_entry: s = "osr_entry"; break;
1702 case lir_breakpoint: s = "breakpoint"; break;
1703 case lir_get_thread: s = "get_thread"; break;
1704 // LIR_Op1
1705 case lir_push: s = "push"; break;
1706 case lir_pop: s = "pop"; break;
1707 case lir_null_check: s = "null_check"; break;
1708 case lir_return: s = "return"; break;
1709 case lir_safepoint: s = "safepoint"; break;
1710 case lir_leal: s = "leal"; break;
1711 case lir_branch: s = "branch"; break;
1712 case lir_cond_float_branch: s = "flt_cond_br"; break;
1713 case lir_move: s = "move"; break;
1714 case lir_abs: s = "abs"; break;
1715 case lir_neg: s = "neg"; break;
1716 case lir_sqrt: s = "sqrt"; break;
1717 case lir_f2hf: s = "f2hf"; break;
1718 case lir_hf2f: s = "hf2f"; break;
1719 case lir_rtcall: s = "rtcall"; break;
1720 case lir_throw: s = "throw"; break;
1721 case lir_unwind: s = "unwind"; break;
1722 case lir_convert: s = "convert"; break;
1723 case lir_alloc_object: s = "alloc_obj"; break;
1724 case lir_monaddr: s = "mon_addr"; break;
1725 // LIR_Op2
1726 case lir_cmp: s = "cmp"; break;
1727 case lir_cmp_l2i: s = "cmp_l2i"; break;
1728 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1729 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1730 case lir_add: s = "add"; break;
1731 case lir_sub: s = "sub"; break;
1732 case lir_mul: s = "mul"; break;
1733 case lir_div: s = "div"; break;
1734 case lir_rem: s = "rem"; break;
1735 case lir_logic_and: s = "logic_and"; break;
1736 case lir_logic_or: s = "logic_or"; break;
1737 case lir_logic_xor: s = "logic_xor"; break;
1738 case lir_shl: s = "shift_left"; break;
1739 case lir_shr: s = "shift_right"; break;
1740 case lir_ushr: s = "ushift_right"; break;
1741 case lir_alloc_array: s = "alloc_array"; break;
1742 case lir_xadd: s = "xadd"; break;
1743 case lir_xchg: s = "xchg"; break;
1744 // LIR_Op3
1745 case lir_idiv: s = "idiv"; break;
1746 case lir_irem: s = "irem"; break;
1747 case lir_fmad: s = "fmad"; break;
1748 case lir_fmaf: s = "fmaf"; break;
1749 // LIR_Op4
1750 case lir_cmove: s = "cmove"; break;
1751 // LIR_OpJavaCall
1752 case lir_static_call: s = "static"; break;
1753 case lir_optvirtual_call: s = "optvirtual"; break;
1754 case lir_icvirtual_call: s = "icvirtual"; break;
1755 case lir_dynamic_call: s = "dynamic"; break;
1756 // LIR_OpArrayCopy
1757 case lir_arraycopy: s = "arraycopy"; break;
1758 // LIR_OpUpdateCRC32
1759 case lir_updatecrc32: s = "updatecrc32"; break;
1760 // LIR_OpLock
1761 case lir_lock: s = "lock"; break;
1762 case lir_unlock: s = "unlock"; break;
1763 // LIR_OpDelay
1764 case lir_delay_slot: s = "delay"; break;
1765 // LIR_OpTypeCheck
1766 case lir_instanceof: s = "instanceof"; break;
1767 case lir_checkcast: s = "checkcast"; break;
1768 case lir_store_check: s = "store_check"; break;
1769 // LIR_OpCompareAndSwap
1770 case lir_cas_long: s = "cas_long"; break;
1771 case lir_cas_obj: s = "cas_obj"; break;
1772 case lir_cas_int: s = "cas_int"; break;
1773 // LIR_OpProfileCall
1774 case lir_profile_call: s = "profile_call"; break;
1775 // LIR_OpProfileType
1776 case lir_profile_type: s = "profile_type"; break;
1777 // LIR_OpAssert
1778 #ifdef ASSERT
1779 case lir_assert: s = "assert"; break;
1780 #endif
1781 case lir_none: ShouldNotReachHere();break;
1782 default: s = "illegal_op"; break;
1783 }
1784 return s;
1785 }
1786
1787 // LIR_OpJavaCall
1788 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1789 out->print("call: ");
1790 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1791 if (receiver()->is_valid()) {
1792 out->print(" [recv: "); receiver()->print(out); out->print("]");
1793 }
1794 if (result_opr()->is_valid()) {
1795 out->print(" [result: "); result_opr()->print(out); out->print("]");
1796 }
1797 }
1798
1799 // LIR_OpLabel
1800 void LIR_OpLabel::print_instr(outputStream* out) const {
1801 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1802 }
1803
1804 // LIR_OpArrayCopy
1805 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1806 src()->print(out); out->print(" ");
1807 src_pos()->print(out); out->print(" ");
1808 dst()->print(out); out->print(" ");
1809 dst_pos()->print(out); out->print(" ");
1810 length()->print(out); out->print(" ");
1811 tmp()->print(out); out->print(" ");
1812 }
1813
1814 // LIR_OpUpdateCRC32
1815 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1816 crc()->print(out); out->print(" ");
1817 val()->print(out); out->print(" ");
1818 result_opr()->print(out); out->print(" ");
1819 }
1820
1821 // LIR_OpCompareAndSwap
1822 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1823 addr()->print(out); out->print(" ");
1824 cmp_value()->print(out); out->print(" ");
1825 new_value()->print(out); out->print(" ");
1826 tmp1()->print(out); out->print(" ");
1827 tmp2()->print(out); out->print(" ");
1828
1829 }
1830
1831 // LIR_Op0
1832 void LIR_Op0::print_instr(outputStream* out) const {
1833 result_opr()->print(out);
1834 }
1835
1836 // LIR_Op1
1837 const char * LIR_Op1::name() const {
1838 if (code() == lir_move) {
1839 switch (move_kind()) {
1840 case lir_move_normal:
1841 return "move";
1842 case lir_move_volatile:
1843 return "volatile_move";
1844 case lir_move_wide:
1845 return "wide_move";
1846 default:
1847 ShouldNotReachHere();
1848 return "illegal_op";
1849 }
1850 } else {
1851 return LIR_Op::name();
1852 }
1853 }
1854
1855
1856 void LIR_Op1::print_instr(outputStream* out) const {
1857 _opr->print(out); out->print(" ");
1858 result_opr()->print(out); out->print(" ");
1859 print_patch_code(out, patch_code());
1860 }
1861
1862
1863 // LIR_Op1
1864 void LIR_OpRTCall::print_instr(outputStream* out) const {
1865 intx a = (intx)addr();
1866 out->print("%s", Runtime1::name_for_address(addr()));
1867 out->print(" ");
1868 tmp()->print(out);
1869 }
1870
1871 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1872 switch(code) {
1873 case lir_patch_none: break;
1874 case lir_patch_low: out->print("[patch_low]"); break;
1875 case lir_patch_high: out->print("[patch_high]"); break;
1876 case lir_patch_normal: out->print("[patch_normal]"); break;
1877 default: ShouldNotReachHere();
1878 }
1879 }
1880
1881 // LIR_OpBranch
1882 void LIR_OpBranch::print_instr(outputStream* out) const {
1883 print_condition(out, cond()); out->print(" ");
1884 in_opr1()->print(out); out->print(" ");
1885 in_opr2()->print(out); out->print(" ");
1886 if (block() != nullptr) {
1887 out->print("[B%d] ", block()->block_id());
1888 } else if (stub() != nullptr) {
1889 out->print("[");
1890 stub()->print_name(out);
1891 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1892 if (stub()->info() != nullptr) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1893 } else {
1894 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1895 }
1896 if (ublock() != nullptr) {
1897 out->print("unordered: [B%d] ", ublock()->block_id());
1898 }
1899 }
1900
1901 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1902 switch(cond) {
1903 case lir_cond_equal: out->print("[EQ]"); break;
1904 case lir_cond_notEqual: out->print("[NE]"); break;
1905 case lir_cond_less: out->print("[LT]"); break;
1906 case lir_cond_lessEqual: out->print("[LE]"); break;
1907 case lir_cond_greaterEqual: out->print("[GE]"); break;
1908 case lir_cond_greater: out->print("[GT]"); break;
1909 case lir_cond_belowEqual: out->print("[BE]"); break;
1910 case lir_cond_aboveEqual: out->print("[AE]"); break;
1911 case lir_cond_always: out->print("[AL]"); break;
1912 default: out->print("[%d]",cond); break;
1913 }
1914 }
1915
1916 // LIR_OpConvert
1917 void LIR_OpConvert::print_instr(outputStream* out) const {
1918 print_bytecode(out, bytecode());
1919 in_opr()->print(out); out->print(" ");
1920 result_opr()->print(out); out->print(" ");
1921 }
1922
1923 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1924 switch(code) {
1925 case Bytecodes::_d2f: out->print("[d2f] "); break;
1926 case Bytecodes::_d2i: out->print("[d2i] "); break;
1927 case Bytecodes::_d2l: out->print("[d2l] "); break;
1928 case Bytecodes::_f2d: out->print("[f2d] "); break;
1929 case Bytecodes::_f2i: out->print("[f2i] "); break;
1930 case Bytecodes::_f2l: out->print("[f2l] "); break;
1931 case Bytecodes::_i2b: out->print("[i2b] "); break;
1932 case Bytecodes::_i2c: out->print("[i2c] "); break;
1933 case Bytecodes::_i2d: out->print("[i2d] "); break;
1934 case Bytecodes::_i2f: out->print("[i2f] "); break;
1935 case Bytecodes::_i2l: out->print("[i2l] "); break;
1936 case Bytecodes::_i2s: out->print("[i2s] "); break;
1937 case Bytecodes::_l2i: out->print("[l2i] "); break;
1938 case Bytecodes::_l2f: out->print("[l2f] "); break;
1939 case Bytecodes::_l2d: out->print("[l2d] "); break;
1940 default:
1941 out->print("[?%d]",code);
1942 break;
1943 }
1944 }
1945
1946 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1947 klass()->print(out); out->print(" ");
1948 obj()->print(out); out->print(" ");
1949 tmp1()->print(out); out->print(" ");
1950 tmp2()->print(out); out->print(" ");
1951 tmp3()->print(out); out->print(" ");
1952 tmp4()->print(out); out->print(" ");
1953 out->print("[hdr:%d]", header_size()); out->print(" ");
1954 out->print("[obj:%d]", object_size()); out->print(" ");
1955 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1956 }
1957
1958 // LIR_Op2
1959 void LIR_Op2::print_instr(outputStream* out) const {
1960 if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) {
1961 print_condition(out, condition()); out->print(" ");
1962 }
1963 in_opr1()->print(out); out->print(" ");
1964 in_opr2()->print(out); out->print(" ");
1965 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1966 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1967 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1968 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1969 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1970 result_opr()->print(out);
1971 }
1972
1973 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1974 klass()->print(out); out->print(" ");
1975 len()->print(out); out->print(" ");
1976 obj()->print(out); out->print(" ");
1977 tmp1()->print(out); out->print(" ");
1978 tmp2()->print(out); out->print(" ");
1979 tmp3()->print(out); out->print(" ");
1980 tmp4()->print(out); out->print(" ");
1981 out->print("[type:0x%x]", type()); out->print(" ");
1982 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1983 }
1984
1985
1986 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1987 object()->print(out); out->print(" ");
1988 if (code() == lir_store_check) {
1989 array()->print(out); out->print(" ");
1990 }
1991 if (code() != lir_store_check) {
1992 klass()->print_name_on(out); out->print(" ");
1993 if (fast_check()) out->print("fast_check ");
1994 }
1995 tmp1()->print(out); out->print(" ");
1996 tmp2()->print(out); out->print(" ");
1997 tmp3()->print(out); out->print(" ");
1998 result_opr()->print(out); out->print(" ");
1999 if (info_for_exception() != nullptr) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
2000 }
2001
2002
2003 // LIR_Op3
2004 void LIR_Op3::print_instr(outputStream* out) const {
2005 in_opr1()->print(out); out->print(" ");
2006 in_opr2()->print(out); out->print(" ");
2007 in_opr3()->print(out); out->print(" ");
2008 result_opr()->print(out);
2009 }
2010
2011 // LIR_Op4
2012 void LIR_Op4::print_instr(outputStream* out) const {
2013 print_condition(out, condition()); out->print(" ");
2014 in_opr1()->print(out); out->print(" ");
2015 in_opr2()->print(out); out->print(" ");
2016 in_opr3()->print(out); out->print(" ");
2017 in_opr4()->print(out); out->print(" ");
2018 result_opr()->print(out);
2019 }
2020
2021 void LIR_OpLock::print_instr(outputStream* out) const {
2022 hdr_opr()->print(out); out->print(" ");
2023 obj_opr()->print(out); out->print(" ");
2024 lock_opr()->print(out); out->print(" ");
2025 if (_scratch->is_valid()) {
2026 _scratch->print(out); out->print(" ");
2027 }
2028 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2029 }
2030
2031 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
2032 obj()->print(out); out->print(" ");
2033 result_opr()->print(out); out->print(" ");
2034 }
2035
2036 #ifdef ASSERT
2037 void LIR_OpAssert::print_instr(outputStream* out) const {
2038 print_condition(out, condition()); out->print(" ");
2039 in_opr1()->print(out); out->print(" ");
2040 in_opr2()->print(out); out->print(", \"");
2041 out->print("%s", msg()); out->print("\"");
2042 }
2043 #endif
2044
2045
2046 void LIR_OpDelay::print_instr(outputStream* out) const {
2047 _op->print_on(out);
2048 }
2049
2050
2051 // LIR_OpProfileCall
2052 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2053 profiled_method()->name()->print_symbol_on(out);
2054 out->print(".");
2055 profiled_method()->holder()->name()->print_symbol_on(out);
2056 out->print(" @ %d ", profiled_bci());
2057 mdo()->print(out); out->print(" ");
2058 recv()->print(out); out->print(" ");
2059 tmp1()->print(out); out->print(" ");
2060 }
2061
2062 // LIR_OpProfileType
2063 void LIR_OpProfileType::print_instr(outputStream* out) const {
2064 out->print("exact = ");
2065 if (exact_klass() == nullptr) {
2066 out->print("unknown");
2067 } else {
2068 exact_klass()->print_name_on(out);
2069 }
2070 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2071 out->print(" ");
2072 mdp()->print(out); out->print(" ");
2073 obj()->print(out); out->print(" ");
2074 tmp()->print(out); out->print(" ");
2075 }
2076
2077 #endif // PRODUCT
2078
2079 // Implementation of LIR_InsertionBuffer
2080
2081 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2082 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2083
2084 int i = number_of_insertion_points() - 1;
2085 if (i < 0 || index_at(i) < index) {
2086 append_new(index, 1);
2087 } else {
2088 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2089 assert(count_at(i) > 0, "check");
2090 set_count_at(i, count_at(i) + 1);
2091 }
2092 _ops.push(op);
2093
2094 DEBUG_ONLY(verify());
2095 }
2096
2097 #ifdef ASSERT
2098 void LIR_InsertionBuffer::verify() {
2099 int sum = 0;
2100 int prev_idx = -1;
2101
2102 for (int i = 0; i < number_of_insertion_points(); i++) {
2103 assert(prev_idx < index_at(i), "index must be ordered ascending");
2104 sum += count_at(i);
2105 }
2106 assert(sum == number_of_ops(), "wrong total sum");
2107 }
2108 #endif