1 /*
2 * Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_CodeStubs.hpp"
27 #include "c1/c1_InstructionPrinter.hpp"
28 #include "c1/c1_LIR.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_ValueStack.hpp"
31 #include "ci/ciInstance.hpp"
32 #include "runtime/safepointMechanism.inline.hpp"
33 #include "runtime/sharedRuntime.hpp"
34 #include "runtime/vm_version.hpp"
35
36 Register LIR_Opr::as_register() const {
37 return FrameMap::cpu_rnr2reg(cpu_regnr());
38 }
39
40 Register LIR_Opr::as_register_lo() const {
41 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
42 }
43
44 Register LIR_Opr::as_register_hi() const {
45 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
46 }
47
48 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
49 LIR_Opr LIR_OprFact::nullOpr = LIR_Opr();
50
51 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
52 ValueTag tag = type->tag();
53 switch (tag) {
54 case metaDataTag : {
55 ClassConstant* c = type->as_ClassConstant();
56 if (c != nullptr && !c->value()->is_loaded()) {
57 return LIR_OprFact::metadataConst(nullptr);
58 } else if (c != nullptr) {
59 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
60 } else {
61 MethodConstant* m = type->as_MethodConstant();
62 assert (m != nullptr, "not a class or a method?");
63 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
64 }
65 }
66 case objectTag : {
67 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
68 }
69 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
70 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
71 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
72 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
73 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
74 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
75 }
76 }
77
78
79 //---------------------------------------------------
80
81
82 LIR_Address::Scale LIR_Address::scale(BasicType type) {
83 int elem_size = type2aelembytes(type);
84 switch (elem_size) {
85 case 1: return LIR_Address::times_1;
86 case 2: return LIR_Address::times_2;
87 case 4: return LIR_Address::times_4;
88 case 8: return LIR_Address::times_8;
89 }
90 ShouldNotReachHere();
91 return LIR_Address::times_1;
92 }
93
94 //---------------------------------------------------
95
96 char LIR_Opr::type_char(BasicType t) {
97 switch (t) {
98 case T_ARRAY:
99 t = T_OBJECT;
100 case T_BOOLEAN:
101 case T_CHAR:
102 case T_FLOAT:
103 case T_DOUBLE:
104 case T_BYTE:
105 case T_SHORT:
106 case T_INT:
107 case T_LONG:
108 case T_OBJECT:
109 case T_ADDRESS:
110 case T_VOID:
111 return ::type2char(t);
112 case T_METADATA:
113 return 'M';
114 case T_ILLEGAL:
115 return '?';
116
117 default:
118 ShouldNotReachHere();
119 return '?';
120 }
121 }
122
123 #ifndef PRODUCT
124 void LIR_Opr::validate_type() const {
125
126 #ifdef ASSERT
127 if (!is_pointer() && !is_illegal()) {
128 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
129 switch (as_BasicType(type_field())) {
130 case T_LONG:
131 assert((kindfield == cpu_register || kindfield == stack_value) &&
132 size_field() == double_size, "must match");
133 break;
134 case T_FLOAT:
135 // FP return values can be also in CPU registers on ARM (softfp ABI)
136 assert((kindfield == fpu_register || kindfield == stack_value
137 ARM_ONLY(|| kindfield == cpu_register) ) &&
138 size_field() == single_size, "must match");
139 break;
140 case T_DOUBLE:
141 // FP return values can be also in CPU registers on ARM (softfp ABI)
142 assert((kindfield == fpu_register || kindfield == stack_value
143 ARM_ONLY(|| kindfield == cpu_register) ) &&
144 size_field() == double_size, "must match");
145 break;
146 case T_BOOLEAN:
147 case T_CHAR:
148 case T_BYTE:
149 case T_SHORT:
150 case T_INT:
151 case T_ADDRESS:
152 case T_OBJECT:
153 case T_METADATA:
154 case T_ARRAY:
155 assert((kindfield == cpu_register || kindfield == stack_value) &&
156 size_field() == single_size, "must match");
157 break;
158
159 case T_ILLEGAL:
160 // XXX TKR also means unknown right now
161 // assert(is_illegal(), "must match");
162 break;
163
164 default:
165 ShouldNotReachHere();
166 }
167 }
168 #endif
169
170 }
171 #endif // PRODUCT
172
173
174 bool LIR_Opr::is_oop() const {
175 if (is_pointer()) {
176 return pointer()->is_oop_pointer();
177 } else {
178 OprType t= type_field();
179 assert(t != unknown_type, "not set");
180 return t == object_type;
181 }
182 }
183
184
185
186 void LIR_Op2::verify() const {
187 #ifdef ASSERT
188 switch (code()) {
189 case lir_xchg:
190 break;
191
192 default:
193 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
194 "can't produce oops from arith");
195 }
196
197 if (two_operand_lir_form) {
198
199 #ifdef ASSERT
200 bool threeOperandForm = false;
201 #ifdef S390
202 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
203 threeOperandForm =
204 code() == lir_shl ||
205 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
206 #endif
207 #endif
208
209 switch (code()) {
210 case lir_add:
211 case lir_sub:
212 case lir_mul:
213 case lir_div:
214 case lir_rem:
215 case lir_logic_and:
216 case lir_logic_or:
217 case lir_logic_xor:
218 case lir_shl:
219 case lir_shr:
220 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
221 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
222 break;
223
224 // special handling for lir_ushr because of write barriers
225 case lir_ushr:
226 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
227 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
228 break;
229
230 default:
231 break;
232 }
233 }
234 #endif
235 }
236
237
238 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
239 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
240 , _label(block->label())
241 , _block(block)
242 , _ublock(nullptr)
243 , _stub(nullptr) {
244 }
245
246 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
247 LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
248 , _label(stub->entry())
249 , _block(nullptr)
250 , _ublock(nullptr)
251 , _stub(stub) {
252 }
253
254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
255 : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
256 , _label(block->label())
257 , _block(block)
258 , _ublock(ublock)
259 , _stub(nullptr)
260 {
261 }
262
263 void LIR_OpBranch::change_block(BlockBegin* b) {
264 assert(_block != nullptr, "must have old block");
265 assert(_block->label() == label(), "must be equal");
266
267 _block = b;
268 _label = b->label();
269 }
270
271 void LIR_OpBranch::change_ublock(BlockBegin* b) {
272 assert(_ublock != nullptr, "must have old block");
273 _ublock = b;
274 }
275
276 void LIR_OpBranch::negate_cond() {
277 switch (cond()) {
278 case lir_cond_equal: set_cond(lir_cond_notEqual); break;
279 case lir_cond_notEqual: set_cond(lir_cond_equal); break;
280 case lir_cond_less: set_cond(lir_cond_greaterEqual); break;
281 case lir_cond_lessEqual: set_cond(lir_cond_greater); break;
282 case lir_cond_greaterEqual: set_cond(lir_cond_less); break;
283 case lir_cond_greater: set_cond(lir_cond_lessEqual); break;
284 default: ShouldNotReachHere();
285 }
286 }
287
288
289 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
290 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
291 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
292 CodeStub* stub)
293
294 : LIR_Op(code, result, nullptr)
295 , _object(object)
296 , _array(LIR_OprFact::illegalOpr)
297 , _klass(klass)
298 , _tmp1(tmp1)
299 , _tmp2(tmp2)
300 , _tmp3(tmp3)
301 , _fast_check(fast_check)
302 , _info_for_patch(info_for_patch)
303 , _info_for_exception(info_for_exception)
304 , _stub(stub)
305 , _profiled_method(nullptr)
306 , _profiled_bci(-1)
307 , _should_profile(false)
308 {
309 if (code == lir_checkcast) {
310 assert(info_for_exception != nullptr, "checkcast throws exceptions");
311 } else if (code == lir_instanceof) {
312 assert(info_for_exception == nullptr, "instanceof throws no exceptions");
313 } else {
314 ShouldNotReachHere();
315 }
316 }
317
318
319
320 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
321 : LIR_Op(code, LIR_OprFact::illegalOpr, nullptr)
322 , _object(object)
323 , _array(array)
324 , _klass(nullptr)
325 , _tmp1(tmp1)
326 , _tmp2(tmp2)
327 , _tmp3(tmp3)
328 , _fast_check(false)
329 , _info_for_patch(nullptr)
330 , _info_for_exception(info_for_exception)
331 , _stub(nullptr)
332 , _profiled_method(nullptr)
333 , _profiled_bci(-1)
334 , _should_profile(false)
335 {
336 if (code == lir_store_check) {
337 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
338 assert(info_for_exception != nullptr, "store_check throws exceptions");
339 } else {
340 ShouldNotReachHere();
341 }
342 }
343
344
345 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
346 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
347 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
348 , _src(src)
349 , _src_pos(src_pos)
350 , _dst(dst)
351 , _dst_pos(dst_pos)
352 , _length(length)
353 , _tmp(tmp)
354 , _expected_type(expected_type)
355 , _flags(flags) {
356 _stub = new ArrayCopyStub(this);
357 }
358
359 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
360 : LIR_Op(lir_updatecrc32, res, nullptr)
361 , _crc(crc)
362 , _val(val) {
363 }
364
365 //-------------------verify--------------------------
366
367 void LIR_Op1::verify() const {
368 switch(code()) {
369 case lir_move:
370 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
371 break;
372 case lir_null_check:
373 assert(in_opr()->is_register(), "must be");
374 break;
375 case lir_return:
376 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
377 break;
378 default:
379 break;
380 }
381 }
382
383 void LIR_OpRTCall::verify() const {
384 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
385 }
386
387 //-------------------visits--------------------------
388
389 // complete rework of LIR instruction visitor.
390 // The virtual call for each instruction type is replaced by a big
391 // switch that adds the operands for each instruction
392
393 void LIR_OpVisitState::visit(LIR_Op* op) {
394 // copy information from the LIR_Op
395 reset();
396 set_op(op);
397
398 switch (op->code()) {
399
400 // LIR_Op0
401 case lir_fpop_raw: // result and info always invalid
402 case lir_breakpoint: // result and info always invalid
403 case lir_membar: // result and info always invalid
404 case lir_membar_acquire: // result and info always invalid
405 case lir_membar_release: // result and info always invalid
406 case lir_membar_loadload: // result and info always invalid
407 case lir_membar_storestore: // result and info always invalid
408 case lir_membar_loadstore: // result and info always invalid
409 case lir_membar_storeload: // result and info always invalid
410 case lir_on_spin_wait:
411 {
412 assert(op->as_Op0() != nullptr, "must be");
413 assert(op->_info == nullptr, "info not used by this instruction");
414 assert(op->_result->is_illegal(), "not used");
415 break;
416 }
417
418 case lir_nop: // may have info, result always invalid
419 case lir_std_entry: // may have result, info always invalid
420 case lir_osr_entry: // may have result, info always invalid
421 case lir_get_thread: // may have result, info always invalid
422 {
423 assert(op->as_Op0() != nullptr, "must be");
424 if (op->_info != nullptr) do_info(op->_info);
425 if (op->_result->is_valid()) do_output(op->_result);
426 break;
427 }
428
429
430 // LIR_OpLabel
431 case lir_label: // result and info always invalid
432 {
433 assert(op->as_OpLabel() != nullptr, "must be");
434 assert(op->_info == nullptr, "info not used by this instruction");
435 assert(op->_result->is_illegal(), "not used");
436 break;
437 }
438
439
440 // LIR_Op1
441 case lir_fxch: // input always valid, result and info always invalid
442 case lir_fld: // input always valid, result and info always invalid
443 case lir_push: // input always valid, result and info always invalid
444 case lir_pop: // input always valid, result and info always invalid
445 case lir_leal: // input and result always valid, info always invalid
446 case lir_monaddr: // input and result always valid, info always invalid
447 case lir_null_check: // input and info always valid, result always invalid
448 case lir_move: // input and result always valid, may have info
449 {
450 assert(op->as_Op1() != nullptr, "must be");
451 LIR_Op1* op1 = (LIR_Op1*)op;
452
453 if (op1->_info) do_info(op1->_info);
454 if (op1->_opr->is_valid()) do_input(op1->_opr);
455 if (op1->_result->is_valid()) do_output(op1->_result);
456
457 break;
458 }
459
460 case lir_return:
461 {
462 assert(op->as_OpReturn() != nullptr, "must be");
463 LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
464
465 if (op_ret->_info) do_info(op_ret->_info);
466 if (op_ret->_opr->is_valid()) do_input(op_ret->_opr);
467 if (op_ret->_result->is_valid()) do_output(op_ret->_result);
468 if (op_ret->stub() != nullptr) do_stub(op_ret->stub());
469
470 break;
471 }
472
473 case lir_safepoint:
474 {
475 assert(op->as_Op1() != nullptr, "must be");
476 LIR_Op1* op1 = (LIR_Op1*)op;
477
478 assert(op1->_info != nullptr, ""); do_info(op1->_info);
479 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
480 assert(op1->_result->is_illegal(), "safepoint does not produce value");
481
482 break;
483 }
484
485 // LIR_OpConvert;
486 case lir_convert: // input and result always valid, info always invalid
487 {
488 assert(op->as_OpConvert() != nullptr, "must be");
489 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
490
491 assert(opConvert->_info == nullptr, "must be");
492 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
493 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
494 do_stub(opConvert->_stub);
495
496 break;
497 }
498
499 // LIR_OpBranch;
500 case lir_branch: // may have info, input and result register always invalid
501 case lir_cond_float_branch: // may have info, input and result register always invalid
502 {
503 assert(op->as_OpBranch() != nullptr, "must be");
504 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
505
506 assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() &&
507 opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() &&
508 opBranch->_tmp5->is_illegal(), "not used");
509
510 if (opBranch->_opr1->is_valid()) do_input(opBranch->_opr1);
511 if (opBranch->_opr2->is_valid()) do_input(opBranch->_opr2);
512
513 if (opBranch->_info != nullptr) do_info(opBranch->_info);
514 assert(opBranch->_result->is_illegal(), "not used");
515 if (opBranch->_stub != nullptr) opBranch->stub()->visit(this);
516
517 break;
518 }
519
520
521 // LIR_OpAllocObj
522 case lir_alloc_object:
523 {
524 assert(op->as_OpAllocObj() != nullptr, "must be");
525 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
526
527 if (opAllocObj->_info) do_info(opAllocObj->_info);
528 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
529 do_temp(opAllocObj->_opr);
530 }
531 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
532 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
533 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
534 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
535 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
536 if (opAllocObj->_stub != nullptr) do_stub(opAllocObj->_stub);
537 break;
538 }
539
540
541 // LIR_OpRoundFP;
542 case lir_roundfp: {
543 assert(op->as_OpRoundFP() != nullptr, "must be");
544 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
545
546 assert(op->_info == nullptr, "info not used by this instruction");
547 assert(opRoundFP->_tmp->is_illegal(), "not used");
548 do_input(opRoundFP->_opr);
549 do_output(opRoundFP->_result);
550
551 break;
552 }
553
554
555 // LIR_Op2
556 case lir_cmp:
557 case lir_cmp_l2i:
558 case lir_ucmp_fd2i:
559 case lir_cmp_fd2i:
560 case lir_add:
561 case lir_sub:
562 case lir_rem:
563 case lir_sqrt:
564 case lir_abs:
565 case lir_neg:
566 case lir_f2hf:
567 case lir_hf2f:
568 case lir_logic_and:
569 case lir_logic_or:
570 case lir_logic_xor:
571 case lir_shl:
572 case lir_shr:
573 case lir_ushr:
574 case lir_xadd:
575 case lir_xchg:
576 case lir_assert:
577 {
578 assert(op->as_Op2() != nullptr, "must be");
579 LIR_Op2* op2 = (LIR_Op2*)op;
580 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
581 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
582
583 if (op2->_info) do_info(op2->_info);
584 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
585 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
586 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
587 if (op2->_result->is_valid()) do_output(op2->_result);
588 if (op->code() == lir_xchg || op->code() == lir_xadd) {
589 // on ARM and PPC, return value is loaded first so could
590 // destroy inputs. On other platforms that implement those
591 // (x86, sparc), the extra constrainsts are harmless.
592 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
593 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
594 }
595
596 break;
597 }
598
599 // special handling for cmove: right input operand must not be equal
600 // to the result operand, otherwise the backend fails
601 case lir_cmove:
602 {
603 assert(op->as_Op4() != nullptr, "must be");
604 LIR_Op4* op4 = (LIR_Op4*)op;
605
606 assert(op4->_info == nullptr && op4->_tmp1->is_illegal() && op4->_tmp2->is_illegal() &&
607 op4->_tmp3->is_illegal() && op4->_tmp4->is_illegal() && op4->_tmp5->is_illegal(), "not used");
608 assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && op4->_result->is_valid(), "used");
609
610 do_input(op4->_opr1);
611 do_input(op4->_opr2);
612 if (op4->_opr3->is_valid()) do_input(op4->_opr3);
613 if (op4->_opr4->is_valid()) do_input(op4->_opr4);
614 do_temp(op4->_opr2);
615 do_output(op4->_result);
616
617 break;
618 }
619
620 // vspecial handling for strict operations: register input operands
621 // as temp to guarantee that they do not overlap with other
622 // registers
623 case lir_mul:
624 case lir_div:
625 {
626 assert(op->as_Op2() != nullptr, "must be");
627 LIR_Op2* op2 = (LIR_Op2*)op;
628
629 assert(op2->_info == nullptr, "not used");
630 assert(op2->_opr1->is_valid(), "used");
631 assert(op2->_opr2->is_valid(), "used");
632 assert(op2->_result->is_valid(), "used");
633 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
634 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
635
636 do_input(op2->_opr1); do_temp(op2->_opr1);
637 do_input(op2->_opr2); do_temp(op2->_opr2);
638 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
639 do_output(op2->_result);
640
641 break;
642 }
643
644 case lir_throw: {
645 assert(op->as_Op2() != nullptr, "must be");
646 LIR_Op2* op2 = (LIR_Op2*)op;
647
648 if (op2->_info) do_info(op2->_info);
649 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
650 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
651 assert(op2->_result->is_illegal(), "no result");
652 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
653 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
654
655 break;
656 }
657
658 case lir_unwind: {
659 assert(op->as_Op1() != nullptr, "must be");
660 LIR_Op1* op1 = (LIR_Op1*)op;
661
662 assert(op1->_info == nullptr, "no info");
663 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
664 assert(op1->_result->is_illegal(), "no result");
665
666 break;
667 }
668
669 // LIR_Op3
670 case lir_idiv:
671 case lir_irem: {
672 assert(op->as_Op3() != nullptr, "must be");
673 LIR_Op3* op3= (LIR_Op3*)op;
674
675 if (op3->_info) do_info(op3->_info);
676 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
677
678 // second operand is input and temp, so ensure that second operand
679 // and third operand get not the same register
680 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
681 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
682 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
683
684 if (op3->_result->is_valid()) do_output(op3->_result);
685
686 break;
687 }
688
689 case lir_fmad:
690 case lir_fmaf: {
691 assert(op->as_Op3() != nullptr, "must be");
692 LIR_Op3* op3= (LIR_Op3*)op;
693 assert(op3->_info == nullptr, "no info");
694 do_input(op3->_opr1);
695 do_input(op3->_opr2);
696 do_input(op3->_opr3);
697 do_output(op3->_result);
698 break;
699 }
700
701 // LIR_OpJavaCall
702 case lir_static_call:
703 case lir_optvirtual_call:
704 case lir_icvirtual_call:
705 case lir_dynamic_call: {
706 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
707 assert(opJavaCall != nullptr, "must be");
708
709 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
710
711 // only visit register parameters
712 int n = opJavaCall->_arguments->length();
713 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
714 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
715 do_input(*opJavaCall->_arguments->adr_at(i));
716 }
717 }
718
719 if (opJavaCall->_info) do_info(opJavaCall->_info);
720 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
721 opJavaCall->is_method_handle_invoke()) {
722 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
723 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
724 }
725 do_call();
726 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
727
728 break;
729 }
730
731
732 // LIR_OpRTCall
733 case lir_rtcall: {
734 assert(op->as_OpRTCall() != nullptr, "must be");
735 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
736
737 // only visit register parameters
738 int n = opRTCall->_arguments->length();
739 for (int i = 0; i < n; i++) {
740 if (!opRTCall->_arguments->at(i)->is_pointer()) {
741 do_input(*opRTCall->_arguments->adr_at(i));
742 }
743 }
744 if (opRTCall->_info) do_info(opRTCall->_info);
745 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
746 do_call();
747 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
748
749 break;
750 }
751
752
753 // LIR_OpArrayCopy
754 case lir_arraycopy: {
755 assert(op->as_OpArrayCopy() != nullptr, "must be");
756 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
757
758 assert(opArrayCopy->_result->is_illegal(), "unused");
759 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
760 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
761 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
762 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
763 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
764 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
765 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
766
767 // the implementation of arraycopy always has a call into the runtime
768 do_call();
769
770 break;
771 }
772
773
774 // LIR_OpUpdateCRC32
775 case lir_updatecrc32: {
776 assert(op->as_OpUpdateCRC32() != nullptr, "must be");
777 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
778
779 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
780 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
781 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
782 assert(opUp->_info == nullptr, "no info for LIR_OpUpdateCRC32");
783
784 break;
785 }
786
787
788 // LIR_OpLock
789 case lir_lock:
790 case lir_unlock: {
791 assert(op->as_OpLock() != nullptr, "must be");
792 LIR_OpLock* opLock = (LIR_OpLock*)op;
793
794 if (opLock->_info) do_info(opLock->_info);
795
796 // TODO: check if these operands really have to be temp
797 // (or if input is sufficient). This may have influence on the oop map!
798 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
799 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
800 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
801
802 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
803 assert(opLock->_result->is_illegal(), "unused");
804
805 do_stub(opLock->_stub);
806
807 break;
808 }
809
810
811 // LIR_OpDelay
812 case lir_delay_slot: {
813 assert(op->as_OpDelay() != nullptr, "must be");
814 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
815
816 visit(opDelay->delay_op());
817 break;
818 }
819
820 // LIR_OpTypeCheck
821 case lir_instanceof:
822 case lir_checkcast:
823 case lir_store_check: {
824 assert(op->as_OpTypeCheck() != nullptr, "must be");
825 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
826
827 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
828 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
829 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
830 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
831 do_temp(opTypeCheck->_object);
832 }
833 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
834 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
835 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
836 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
837 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
838 if (opTypeCheck->_stub != nullptr) do_stub(opTypeCheck->_stub);
839 break;
840 }
841
842 // LIR_OpCompareAndSwap
843 case lir_cas_long:
844 case lir_cas_obj:
845 case lir_cas_int: {
846 assert(op->as_OpCompareAndSwap() != nullptr, "must be");
847 LIR_OpCompareAndSwap* opCmpAndSwap = (LIR_OpCompareAndSwap*)op;
848
849 if (opCmpAndSwap->_info) do_info(opCmpAndSwap->_info);
850 assert(opCmpAndSwap->_addr->is_valid(), "used"); do_input(opCmpAndSwap->_addr);
851 do_temp(opCmpAndSwap->_addr);
852 assert(opCmpAndSwap->_cmp_value->is_valid(), "used"); do_input(opCmpAndSwap->_cmp_value);
853 do_temp(opCmpAndSwap->_cmp_value);
854 assert(opCmpAndSwap->_new_value->is_valid(), "used"); do_input(opCmpAndSwap->_new_value);
855 do_temp(opCmpAndSwap->_new_value);
856 if (opCmpAndSwap->_tmp1->is_valid()) do_temp(opCmpAndSwap->_tmp1);
857 if (opCmpAndSwap->_tmp2->is_valid()) do_temp(opCmpAndSwap->_tmp2);
858 if (opCmpAndSwap->_result->is_valid()) do_output(opCmpAndSwap->_result);
859
860 break;
861 }
862
863
864 // LIR_OpAllocArray;
865 case lir_alloc_array: {
866 assert(op->as_OpAllocArray() != nullptr, "must be");
867 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
868
869 if (opAllocArray->_info) do_info(opAllocArray->_info);
870 if (opAllocArray->_klass->is_valid()) { do_input(opAllocArray->_klass);
871 do_temp(opAllocArray->_klass);
872 }
873 if (opAllocArray->_len->is_valid()) { do_input(opAllocArray->_len);
874 do_temp(opAllocArray->_len);
875 }
876 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
877 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
878 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
879 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
880 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
881 if (opAllocArray->_stub != nullptr) do_stub(opAllocArray->_stub);
882 break;
883 }
884
885 // LIR_OpLoadKlass
886 case lir_load_klass:
887 {
888 LIR_OpLoadKlass* opLoadKlass = op->as_OpLoadKlass();
889 assert(opLoadKlass != nullptr, "must be");
890
891 do_input(opLoadKlass->_obj);
892 do_output(opLoadKlass->_result);
893 if (opLoadKlass->_info) do_info(opLoadKlass->_info);
894 break;
895 }
896
897
898 // LIR_OpProfileCall:
899 case lir_profile_call: {
900 assert(op->as_OpProfileCall() != nullptr, "must be");
901 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
902
903 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
904 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
905 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
906 break;
907 }
908
909 // LIR_OpProfileType:
910 case lir_profile_type: {
911 assert(op->as_OpProfileType() != nullptr, "must be");
912 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
913
914 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
915 do_input(opProfileType->_obj);
916 do_temp(opProfileType->_tmp);
917 break;
918 }
919 default:
920 op->visit(this);
921 }
922 }
923
924 void LIR_Op::visit(LIR_OpVisitState* state) {
925 ShouldNotReachHere();
926 }
927
928 void LIR_OpVisitState::do_stub(CodeStub* stub) {
929 if (stub != nullptr) {
930 stub->visit(this);
931 }
932 }
933
934 XHandlers* LIR_OpVisitState::all_xhandler() {
935 XHandlers* result = nullptr;
936
937 int i;
938 for (i = 0; i < info_count(); i++) {
939 if (info_at(i)->exception_handlers() != nullptr) {
940 result = info_at(i)->exception_handlers();
941 break;
942 }
943 }
944
945 #ifdef ASSERT
946 for (i = 0; i < info_count(); i++) {
947 assert(info_at(i)->exception_handlers() == nullptr ||
948 info_at(i)->exception_handlers() == result,
949 "only one xhandler list allowed per LIR-operation");
950 }
951 #endif
952
953 if (result != nullptr) {
954 return result;
955 } else {
956 return new XHandlers();
957 }
958
959 return result;
960 }
961
962
963 #ifdef ASSERT
964 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
965 visit(op);
966
967 return opr_count(inputMode) == 0 &&
968 opr_count(outputMode) == 0 &&
969 opr_count(tempMode) == 0 &&
970 info_count() == 0 &&
971 !has_call() &&
972 !has_slow_case();
973 }
974 #endif
975
976 // LIR_OpReturn
977 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
978 LIR_Op1(lir_return, opr, (CodeEmitInfo*)nullptr /* info */),
979 _stub(nullptr) {
980 if (VM_Version::supports_stack_watermark_barrier()) {
981 _stub = new C1SafepointPollStub();
982 }
983 }
984
985 //---------------------------------------------------
986
987
988 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
989 masm->emit_call(this);
990 }
991
992 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
993 masm->emit_rtcall(this);
994 }
995
996 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
997 masm->emit_opLabel(this);
998 }
999
1000 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
1001 masm->emit_arraycopy(this);
1002 masm->append_code_stub(stub());
1003 }
1004
1005 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1006 masm->emit_updatecrc32(this);
1007 }
1008
1009 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1010 masm->emit_op0(this);
1011 }
1012
1013 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1014 masm->emit_op1(this);
1015 }
1016
1017 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1018 masm->emit_alloc_obj(this);
1019 masm->append_code_stub(stub());
1020 }
1021
1022 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1023 masm->emit_opBranch(this);
1024 if (stub()) {
1025 masm->append_code_stub(stub());
1026 }
1027 }
1028
1029 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1030 masm->emit_opConvert(this);
1031 if (stub() != nullptr) {
1032 masm->append_code_stub(stub());
1033 }
1034 }
1035
1036 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1037 masm->emit_op2(this);
1038 }
1039
1040 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1041 masm->emit_alloc_array(this);
1042 masm->append_code_stub(stub());
1043 }
1044
1045 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1046 masm->emit_opTypeCheck(this);
1047 if (stub()) {
1048 masm->append_code_stub(stub());
1049 }
1050 }
1051
1052 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1053 masm->emit_compare_and_swap(this);
1054 }
1055
1056 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1057 masm->emit_op3(this);
1058 }
1059
1060 void LIR_Op4::emit_code(LIR_Assembler* masm) {
1061 masm->emit_op4(this);
1062 }
1063
1064 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1065 masm->emit_lock(this);
1066 if (stub()) {
1067 masm->append_code_stub(stub());
1068 }
1069 }
1070
1071 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1072 masm->emit_load_klass(this);
1073 }
1074
1075 #ifdef ASSERT
1076 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1077 masm->emit_assert(this);
1078 }
1079 #endif
1080
1081 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1082 masm->emit_delay(this);
1083 }
1084
1085 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1086 masm->emit_profile_call(this);
1087 }
1088
1089 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1090 masm->emit_profile_type(this);
1091 }
1092
1093 // LIR_List
1094 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1095 : _operations(8)
1096 , _compilation(compilation)
1097 #ifndef PRODUCT
1098 , _block(block)
1099 #endif
1100 #ifdef ASSERT
1101 , _file(nullptr)
1102 , _line(0)
1103 #endif
1104 #ifdef RISCV
1105 , _cmp_opr1(LIR_OprFact::illegalOpr)
1106 , _cmp_opr2(LIR_OprFact::illegalOpr)
1107 #endif
1108 { }
1109
1110
1111 #ifdef ASSERT
1112 void LIR_List::set_file_and_line(const char * file, int line) {
1113 const char * f = strrchr(file, '/');
1114 if (f == nullptr) f = strrchr(file, '\\');
1115 if (f == nullptr) {
1116 f = file;
1117 } else {
1118 f++;
1119 }
1120 _file = f;
1121 _line = line;
1122 }
1123 #endif
1124
1125 #ifdef RISCV
1126 void LIR_List::set_cmp_oprs(LIR_Op* op) {
1127 switch (op->code()) {
1128 case lir_cmp:
1129 _cmp_opr1 = op->as_Op2()->in_opr1();
1130 _cmp_opr2 = op->as_Op2()->in_opr2();
1131 break;
1132 case lir_branch: // fall through
1133 case lir_cond_float_branch:
1134 assert(op->as_OpBranch()->cond() == lir_cond_always ||
1135 (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr),
1136 "conditional branches must have legal operands");
1137 if (op->as_OpBranch()->cond() != lir_cond_always) {
1138 op->as_Op2()->set_in_opr1(_cmp_opr1);
1139 op->as_Op2()->set_in_opr2(_cmp_opr2);
1140 }
1141 break;
1142 case lir_cmove:
1143 op->as_Op4()->set_in_opr3(_cmp_opr1);
1144 op->as_Op4()->set_in_opr4(_cmp_opr2);
1145 break;
1146 case lir_cas_long:
1147 case lir_cas_obj:
1148 case lir_cas_int:
1149 _cmp_opr1 = op->as_OpCompareAndSwap()->result_opr();
1150 _cmp_opr2 = LIR_OprFact::intConst(0);
1151 break;
1152 #if INCLUDE_ZGC
1153 case lir_xloadbarrier_test:
1154 _cmp_opr1 = FrameMap::as_opr(t1);
1155 _cmp_opr2 = LIR_OprFact::intConst(0);
1156 break;
1157 #endif
1158 default:
1159 break;
1160 }
1161 }
1162 #endif
1163
1164 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1165 assert(this == buffer->lir_list(), "wrong lir list");
1166 const int n = _operations.length();
1167
1168 if (buffer->number_of_ops() > 0) {
1169 // increase size of instructions list
1170 _operations.at_grow(n + buffer->number_of_ops() - 1, nullptr);
1171 // insert ops from buffer into instructions list
1172 int op_index = buffer->number_of_ops() - 1;
1173 int ip_index = buffer->number_of_insertion_points() - 1;
1174 int from_index = n - 1;
1175 int to_index = _operations.length() - 1;
1176 for (; ip_index >= 0; ip_index --) {
1177 int index = buffer->index_at(ip_index);
1178 // make room after insertion point
1179 while (index < from_index) {
1180 _operations.at_put(to_index --, _operations.at(from_index --));
1181 }
1182 // insert ops from buffer
1183 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1184 _operations.at_put(to_index --, buffer->op_at(op_index --));
1185 }
1186 }
1187 }
1188
1189 buffer->finish();
1190 }
1191
1192
1193 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1194 assert(reg->type() == T_OBJECT, "bad reg");
1195 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1196 }
1197
1198 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1199 assert(reg->type() == T_METADATA, "bad reg");
1200 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1201 }
1202
1203 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1204 append(new LIR_Op1(
1205 lir_move,
1206 LIR_OprFact::address(addr),
1207 src,
1208 addr->type(),
1209 patch_code,
1210 info));
1211 }
1212
1213
1214 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1215 append(new LIR_Op1(
1216 lir_move,
1217 LIR_OprFact::address(address),
1218 dst,
1219 address->type(),
1220 patch_code,
1221 info, lir_move_volatile));
1222 }
1223
1224 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1225 append(new LIR_Op1(
1226 lir_move,
1227 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1228 dst,
1229 type,
1230 patch_code,
1231 info, lir_move_volatile));
1232 }
1233
1234
1235 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1236 append(new LIR_Op1(
1237 lir_move,
1238 LIR_OprFact::intConst(v),
1239 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1240 type,
1241 patch_code,
1242 info));
1243 }
1244
1245
1246 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1247 append(new LIR_Op1(
1248 lir_move,
1249 LIR_OprFact::oopConst(o),
1250 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1251 type,
1252 patch_code,
1253 info));
1254 }
1255
1256
1257 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1258 append(new LIR_Op1(
1259 lir_move,
1260 src,
1261 LIR_OprFact::address(addr),
1262 addr->type(),
1263 patch_code,
1264 info));
1265 }
1266
1267
1268 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1269 append(new LIR_Op1(
1270 lir_move,
1271 src,
1272 LIR_OprFact::address(addr),
1273 addr->type(),
1274 patch_code,
1275 info,
1276 lir_move_volatile));
1277 }
1278
1279 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1280 append(new LIR_Op1(
1281 lir_move,
1282 src,
1283 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1284 type,
1285 patch_code,
1286 info, lir_move_volatile));
1287 }
1288
1289
1290 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1291 append(new LIR_Op3(
1292 lir_idiv,
1293 left,
1294 right,
1295 tmp,
1296 res,
1297 info));
1298 }
1299
1300
1301 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1302 append(new LIR_Op3(
1303 lir_idiv,
1304 left,
1305 LIR_OprFact::intConst(right),
1306 tmp,
1307 res,
1308 info));
1309 }
1310
1311
1312 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1313 append(new LIR_Op3(
1314 lir_irem,
1315 left,
1316 right,
1317 tmp,
1318 res,
1319 info));
1320 }
1321
1322
1323 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1324 append(new LIR_Op3(
1325 lir_irem,
1326 left,
1327 LIR_OprFact::intConst(right),
1328 tmp,
1329 res,
1330 info));
1331 }
1332
1333
1334 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1335 append(new LIR_Op2(
1336 lir_cmp,
1337 condition,
1338 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1339 LIR_OprFact::intConst(c),
1340 info));
1341 }
1342
1343
1344 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1345 append(new LIR_Op2(
1346 lir_cmp,
1347 condition,
1348 reg,
1349 LIR_OprFact::address(addr),
1350 info));
1351 }
1352
1353 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1354 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1355 append(new LIR_OpAllocObj(
1356 klass,
1357 dst,
1358 t1,
1359 t2,
1360 t3,
1361 t4,
1362 header_size,
1363 object_size,
1364 init_check,
1365 stub));
1366 }
1367
1368 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1369 append(new LIR_OpAllocArray(
1370 klass,
1371 len,
1372 dst,
1373 t1,
1374 t2,
1375 t3,
1376 t4,
1377 type,
1378 stub));
1379 }
1380
1381 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1382 append(new LIR_Op2(
1383 lir_shl,
1384 value,
1385 count,
1386 dst,
1387 tmp));
1388 }
1389
1390 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1391 append(new LIR_Op2(
1392 lir_shr,
1393 value,
1394 count,
1395 dst,
1396 tmp));
1397 }
1398
1399
1400 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1401 append(new LIR_Op2(
1402 lir_ushr,
1403 value,
1404 count,
1405 dst,
1406 tmp));
1407 }
1408
1409 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1410 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1411 left,
1412 right,
1413 dst));
1414 }
1415
1416 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1417 append(new LIR_OpLock(
1418 lir_lock,
1419 hdr,
1420 obj,
1421 lock,
1422 scratch,
1423 stub,
1424 info));
1425 }
1426
1427 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1428 append(new LIR_OpLock(
1429 lir_unlock,
1430 hdr,
1431 obj,
1432 lock,
1433 scratch,
1434 stub,
1435 nullptr));
1436 }
1437
1438
1439 void check_LIR() {
1440 // cannot do the proper checking as PRODUCT and other modes return different results
1441 // guarantee(sizeof(LIR_Opr) == wordSize, "may not have a v-table");
1442 }
1443
1444
1445
1446 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1447 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1448 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1449 ciMethod* profiled_method, int profiled_bci) {
1450 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1451 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1452 if (profiled_method != nullptr) {
1453 c->set_profiled_method(profiled_method);
1454 c->set_profiled_bci(profiled_bci);
1455 c->set_should_profile(true);
1456 }
1457 append(c);
1458 }
1459
1460 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1461 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, nullptr, info_for_patch, nullptr);
1462 if (profiled_method != nullptr) {
1463 c->set_profiled_method(profiled_method);
1464 c->set_profiled_bci(profiled_bci);
1465 c->set_should_profile(true);
1466 }
1467 append(c);
1468 }
1469
1470
1471 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1472 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1473 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1474 if (profiled_method != nullptr) {
1475 c->set_profiled_method(profiled_method);
1476 c->set_profiled_bci(profiled_bci);
1477 c->set_should_profile(true);
1478 }
1479 append(c);
1480 }
1481
1482 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1483 if (deoptimize_on_null) {
1484 // Emit an explicit null check and deoptimize if opr is null
1485 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1486 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(nullptr));
1487 branch(lir_cond_equal, deopt);
1488 } else {
1489 // Emit an implicit null check
1490 append(new LIR_Op1(lir_null_check, opr, info));
1491 }
1492 }
1493
1494 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1495 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1496 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1497 }
1498
1499 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1500 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1501 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1502 }
1503
1504 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1505 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1506 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1507 }
1508
1509
1510 #ifdef PRODUCT
1511
1512 void print_LIR(BlockList* blocks) {
1513 }
1514
1515 #else
1516 // LIR_Opr
1517 void LIR_Opr::print() const {
1518 print(tty);
1519 }
1520
1521 void LIR_Opr::print(outputStream* out) const {
1522 if (is_illegal()) {
1523 return;
1524 }
1525
1526 out->print("[");
1527 if (is_pointer()) {
1528 pointer()->print_value_on(out);
1529 } else if (is_single_stack()) {
1530 out->print("stack:%d", single_stack_ix());
1531 } else if (is_double_stack()) {
1532 out->print("dbl_stack:%d",double_stack_ix());
1533 } else if (is_virtual()) {
1534 out->print("R%d", vreg_number());
1535 } else if (is_single_cpu()) {
1536 out->print("%s", as_register()->name());
1537 } else if (is_double_cpu()) {
1538 out->print("%s", as_register_hi()->name());
1539 out->print("%s", as_register_lo()->name());
1540 #if defined(X86)
1541 } else if (is_single_xmm()) {
1542 out->print("%s", as_xmm_float_reg()->name());
1543 } else if (is_double_xmm()) {
1544 out->print("%s", as_xmm_double_reg()->name());
1545 } else if (is_single_fpu()) {
1546 out->print("fpu%d", fpu_regnr());
1547 } else if (is_double_fpu()) {
1548 out->print("fpu%d", fpu_regnrLo());
1549 #elif defined(AARCH64)
1550 } else if (is_single_fpu()) {
1551 out->print("fpu%d", fpu_regnr());
1552 } else if (is_double_fpu()) {
1553 out->print("fpu%d", fpu_regnrLo());
1554 #elif defined(ARM)
1555 } else if (is_single_fpu()) {
1556 out->print("s%d", fpu_regnr());
1557 } else if (is_double_fpu()) {
1558 out->print("d%d", fpu_regnrLo() >> 1);
1559 #else
1560 } else if (is_single_fpu()) {
1561 out->print("%s", as_float_reg()->name());
1562 } else if (is_double_fpu()) {
1563 out->print("%s", as_double_reg()->name());
1564 #endif
1565
1566 } else if (is_illegal()) {
1567 out->print("-");
1568 } else {
1569 out->print("Unknown Operand");
1570 }
1571 if (!is_illegal()) {
1572 out->print("|%c", type_char());
1573 }
1574 if (is_register() && is_last_use()) {
1575 out->print("(last_use)");
1576 }
1577 out->print("]");
1578 }
1579
1580
1581 // LIR_Address
1582 void LIR_Const::print_value_on(outputStream* out) const {
1583 switch (type()) {
1584 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1585 case T_INT: out->print("int:%d", as_jint()); break;
1586 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1587 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1588 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1589 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1590 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1591 default: out->print("%3d:" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1592 }
1593 }
1594
1595 // LIR_Address
1596 void LIR_Address::print_value_on(outputStream* out) const {
1597 out->print("Base:"); _base->print(out);
1598 if (!_index->is_illegal()) {
1599 out->print(" Index:"); _index->print(out);
1600 switch (scale()) {
1601 case times_1: break;
1602 case times_2: out->print(" * 2"); break;
1603 case times_4: out->print(" * 4"); break;
1604 case times_8: out->print(" * 8"); break;
1605 }
1606 }
1607 out->print(" Disp: " INTX_FORMAT, _disp);
1608 }
1609
1610 // debug output of block header without InstructionPrinter
1611 // (because phi functions are not necessary for LIR)
1612 static void print_block(BlockBegin* x) {
1613 // print block id
1614 BlockEnd* end = x->end();
1615 tty->print("B%d ", x->block_id());
1616
1617 // print flags
1618 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1619 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1620 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1621 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1622 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1623 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1624 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1625
1626 // print block bci range
1627 tty->print("[%d, %d] ", x->bci(), (end == nullptr ? -1 : end->printable_bci()));
1628
1629 // print predecessors and successors
1630 if (x->number_of_preds() > 0) {
1631 tty->print("preds: ");
1632 for (int i = 0; i < x->number_of_preds(); i ++) {
1633 tty->print("B%d ", x->pred_at(i)->block_id());
1634 }
1635 }
1636
1637 if (end != nullptr && x->number_of_sux() > 0) {
1638 tty->print("sux: ");
1639 for (int i = 0; i < x->number_of_sux(); i ++) {
1640 tty->print("B%d ", x->sux_at(i)->block_id());
1641 }
1642 }
1643
1644 // print exception handlers
1645 if (x->number_of_exception_handlers() > 0) {
1646 tty->print("xhandler: ");
1647 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1648 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1649 }
1650 }
1651
1652 tty->cr();
1653 }
1654
1655 void print_LIR(BlockList* blocks) {
1656 tty->print_cr("LIR:");
1657 int i;
1658 for (i = 0; i < blocks->length(); i++) {
1659 BlockBegin* bb = blocks->at(i);
1660 print_block(bb);
1661 tty->print("__id_Instruction___________________________________________"); tty->cr();
1662 bb->lir()->print_instructions();
1663 }
1664 }
1665
1666 void LIR_List::print_instructions() {
1667 for (int i = 0; i < _operations.length(); i++) {
1668 _operations.at(i)->print(); tty->cr();
1669 }
1670 tty->cr();
1671 }
1672
1673 // LIR_Ops printing routines
1674 // LIR_Op
1675 void LIR_Op::print_on(outputStream* out) const {
1676 if (id() != -1 || PrintCFGToFile) {
1677 out->print("%4d ", id());
1678 } else {
1679 out->print(" ");
1680 }
1681 out->print("%s ", name());
1682 print_instr(out);
1683 if (info() != nullptr) out->print(" [bci:%d]", info()->stack()->bci());
1684 #ifdef ASSERT
1685 if (Verbose && _file != nullptr) {
1686 out->print(" (%s:%d)", _file, _line);
1687 }
1688 #endif
1689 }
1690
1691 const char * LIR_Op::name() const {
1692 const char* s = nullptr;
1693 switch(code()) {
1694 // LIR_Op0
1695 case lir_membar: s = "membar"; break;
1696 case lir_membar_acquire: s = "membar_acquire"; break;
1697 case lir_membar_release: s = "membar_release"; break;
1698 case lir_membar_loadload: s = "membar_loadload"; break;
1699 case lir_membar_storestore: s = "membar_storestore"; break;
1700 case lir_membar_loadstore: s = "membar_loadstore"; break;
1701 case lir_membar_storeload: s = "membar_storeload"; break;
1702 case lir_label: s = "label"; break;
1703 case lir_nop: s = "nop"; break;
1704 case lir_on_spin_wait: s = "on_spin_wait"; break;
1705 case lir_std_entry: s = "std_entry"; break;
1706 case lir_osr_entry: s = "osr_entry"; break;
1707 case lir_fpop_raw: s = "fpop_raw"; break;
1708 case lir_breakpoint: s = "breakpoint"; break;
1709 case lir_get_thread: s = "get_thread"; break;
1710 // LIR_Op1
1711 case lir_fxch: s = "fxch"; break;
1712 case lir_fld: s = "fld"; break;
1713 case lir_push: s = "push"; break;
1714 case lir_pop: s = "pop"; break;
1715 case lir_null_check: s = "null_check"; break;
1716 case lir_return: s = "return"; break;
1717 case lir_safepoint: s = "safepoint"; break;
1718 case lir_leal: s = "leal"; break;
1719 case lir_branch: s = "branch"; break;
1720 case lir_cond_float_branch: s = "flt_cond_br"; break;
1721 case lir_move: s = "move"; break;
1722 case lir_roundfp: s = "roundfp"; break;
1723 case lir_rtcall: s = "rtcall"; break;
1724 case lir_throw: s = "throw"; break;
1725 case lir_unwind: s = "unwind"; break;
1726 case lir_convert: s = "convert"; break;
1727 case lir_alloc_object: s = "alloc_obj"; break;
1728 case lir_monaddr: s = "mon_addr"; break;
1729 // LIR_Op2
1730 case lir_cmp: s = "cmp"; break;
1731 case lir_cmp_l2i: s = "cmp_l2i"; break;
1732 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1733 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1734 case lir_add: s = "add"; break;
1735 case lir_sub: s = "sub"; break;
1736 case lir_mul: s = "mul"; break;
1737 case lir_div: s = "div"; break;
1738 case lir_rem: s = "rem"; break;
1739 case lir_abs: s = "abs"; break;
1740 case lir_neg: s = "neg"; break;
1741 case lir_sqrt: s = "sqrt"; break;
1742 case lir_f2hf: s = "f2hf"; break;
1743 case lir_hf2f: s = "hf2f"; break;
1744 case lir_logic_and: s = "logic_and"; break;
1745 case lir_logic_or: s = "logic_or"; break;
1746 case lir_logic_xor: s = "logic_xor"; break;
1747 case lir_shl: s = "shift_left"; break;
1748 case lir_shr: s = "shift_right"; break;
1749 case lir_ushr: s = "ushift_right"; break;
1750 case lir_alloc_array: s = "alloc_array"; break;
1751 case lir_xadd: s = "xadd"; break;
1752 case lir_xchg: s = "xchg"; break;
1753 // LIR_Op3
1754 case lir_idiv: s = "idiv"; break;
1755 case lir_irem: s = "irem"; break;
1756 case lir_fmad: s = "fmad"; break;
1757 case lir_fmaf: s = "fmaf"; break;
1758 // LIR_Op4
1759 case lir_cmove: s = "cmove"; break;
1760 // LIR_OpJavaCall
1761 case lir_static_call: s = "static"; break;
1762 case lir_optvirtual_call: s = "optvirtual"; break;
1763 case lir_icvirtual_call: s = "icvirtual"; break;
1764 case lir_dynamic_call: s = "dynamic"; break;
1765 // LIR_OpArrayCopy
1766 case lir_arraycopy: s = "arraycopy"; break;
1767 // LIR_OpUpdateCRC32
1768 case lir_updatecrc32: s = "updatecrc32"; break;
1769 // LIR_OpLock
1770 case lir_lock: s = "lock"; break;
1771 case lir_unlock: s = "unlock"; break;
1772 // LIR_OpDelay
1773 case lir_delay_slot: s = "delay"; break;
1774 // LIR_OpTypeCheck
1775 case lir_instanceof: s = "instanceof"; break;
1776 case lir_checkcast: s = "checkcast"; break;
1777 case lir_store_check: s = "store_check"; break;
1778 // LIR_OpCompareAndSwap
1779 case lir_cas_long: s = "cas_long"; break;
1780 case lir_cas_obj: s = "cas_obj"; break;
1781 case lir_cas_int: s = "cas_int"; break;
1782 // LIR_OpProfileCall
1783 case lir_profile_call: s = "profile_call"; break;
1784 // LIR_OpProfileType
1785 case lir_profile_type: s = "profile_type"; break;
1786 // LIR_OpAssert
1787 #ifdef ASSERT
1788 case lir_assert: s = "assert"; break;
1789 #endif
1790 case lir_none: ShouldNotReachHere();break;
1791 default: s = "illegal_op"; break;
1792 }
1793 return s;
1794 }
1795
1796 // LIR_OpJavaCall
1797 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1798 out->print("call: ");
1799 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1800 if (receiver()->is_valid()) {
1801 out->print(" [recv: "); receiver()->print(out); out->print("]");
1802 }
1803 if (result_opr()->is_valid()) {
1804 out->print(" [result: "); result_opr()->print(out); out->print("]");
1805 }
1806 }
1807
1808 // LIR_OpLabel
1809 void LIR_OpLabel::print_instr(outputStream* out) const {
1810 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1811 }
1812
1813 // LIR_OpArrayCopy
1814 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1815 src()->print(out); out->print(" ");
1816 src_pos()->print(out); out->print(" ");
1817 dst()->print(out); out->print(" ");
1818 dst_pos()->print(out); out->print(" ");
1819 length()->print(out); out->print(" ");
1820 tmp()->print(out); out->print(" ");
1821 }
1822
1823 // LIR_OpUpdateCRC32
1824 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1825 crc()->print(out); out->print(" ");
1826 val()->print(out); out->print(" ");
1827 result_opr()->print(out); out->print(" ");
1828 }
1829
1830 // LIR_OpCompareAndSwap
1831 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1832 addr()->print(out); out->print(" ");
1833 cmp_value()->print(out); out->print(" ");
1834 new_value()->print(out); out->print(" ");
1835 tmp1()->print(out); out->print(" ");
1836 tmp2()->print(out); out->print(" ");
1837
1838 }
1839
1840 // LIR_Op0
1841 void LIR_Op0::print_instr(outputStream* out) const {
1842 result_opr()->print(out);
1843 }
1844
1845 // LIR_Op1
1846 const char * LIR_Op1::name() const {
1847 if (code() == lir_move) {
1848 switch (move_kind()) {
1849 case lir_move_normal:
1850 return "move";
1851 case lir_move_volatile:
1852 return "volatile_move";
1853 case lir_move_wide:
1854 return "wide_move";
1855 default:
1856 ShouldNotReachHere();
1857 return "illegal_op";
1858 }
1859 } else {
1860 return LIR_Op::name();
1861 }
1862 }
1863
1864
1865 void LIR_Op1::print_instr(outputStream* out) const {
1866 _opr->print(out); out->print(" ");
1867 result_opr()->print(out); out->print(" ");
1868 print_patch_code(out, patch_code());
1869 }
1870
1871
1872 // LIR_Op1
1873 void LIR_OpRTCall::print_instr(outputStream* out) const {
1874 intx a = (intx)addr();
1875 out->print("%s", Runtime1::name_for_address(addr()));
1876 out->print(" ");
1877 tmp()->print(out);
1878 }
1879
1880 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1881 switch(code) {
1882 case lir_patch_none: break;
1883 case lir_patch_low: out->print("[patch_low]"); break;
1884 case lir_patch_high: out->print("[patch_high]"); break;
1885 case lir_patch_normal: out->print("[patch_normal]"); break;
1886 default: ShouldNotReachHere();
1887 }
1888 }
1889
1890 // LIR_OpBranch
1891 void LIR_OpBranch::print_instr(outputStream* out) const {
1892 print_condition(out, cond()); out->print(" ");
1893 in_opr1()->print(out); out->print(" ");
1894 in_opr2()->print(out); out->print(" ");
1895 if (block() != nullptr) {
1896 out->print("[B%d] ", block()->block_id());
1897 } else if (stub() != nullptr) {
1898 out->print("[");
1899 stub()->print_name(out);
1900 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1901 if (stub()->info() != nullptr) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1902 } else {
1903 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1904 }
1905 if (ublock() != nullptr) {
1906 out->print("unordered: [B%d] ", ublock()->block_id());
1907 }
1908 }
1909
1910 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1911 switch(cond) {
1912 case lir_cond_equal: out->print("[EQ]"); break;
1913 case lir_cond_notEqual: out->print("[NE]"); break;
1914 case lir_cond_less: out->print("[LT]"); break;
1915 case lir_cond_lessEqual: out->print("[LE]"); break;
1916 case lir_cond_greaterEqual: out->print("[GE]"); break;
1917 case lir_cond_greater: out->print("[GT]"); break;
1918 case lir_cond_belowEqual: out->print("[BE]"); break;
1919 case lir_cond_aboveEqual: out->print("[AE]"); break;
1920 case lir_cond_always: out->print("[AL]"); break;
1921 default: out->print("[%d]",cond); break;
1922 }
1923 }
1924
1925 // LIR_OpConvert
1926 void LIR_OpConvert::print_instr(outputStream* out) const {
1927 print_bytecode(out, bytecode());
1928 in_opr()->print(out); out->print(" ");
1929 result_opr()->print(out); out->print(" ");
1930 }
1931
1932 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1933 switch(code) {
1934 case Bytecodes::_d2f: out->print("[d2f] "); break;
1935 case Bytecodes::_d2i: out->print("[d2i] "); break;
1936 case Bytecodes::_d2l: out->print("[d2l] "); break;
1937 case Bytecodes::_f2d: out->print("[f2d] "); break;
1938 case Bytecodes::_f2i: out->print("[f2i] "); break;
1939 case Bytecodes::_f2l: out->print("[f2l] "); break;
1940 case Bytecodes::_i2b: out->print("[i2b] "); break;
1941 case Bytecodes::_i2c: out->print("[i2c] "); break;
1942 case Bytecodes::_i2d: out->print("[i2d] "); break;
1943 case Bytecodes::_i2f: out->print("[i2f] "); break;
1944 case Bytecodes::_i2l: out->print("[i2l] "); break;
1945 case Bytecodes::_i2s: out->print("[i2s] "); break;
1946 case Bytecodes::_l2i: out->print("[l2i] "); break;
1947 case Bytecodes::_l2f: out->print("[l2f] "); break;
1948 case Bytecodes::_l2d: out->print("[l2d] "); break;
1949 default:
1950 out->print("[?%d]",code);
1951 break;
1952 }
1953 }
1954
1955 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1956 klass()->print(out); out->print(" ");
1957 obj()->print(out); out->print(" ");
1958 tmp1()->print(out); out->print(" ");
1959 tmp2()->print(out); out->print(" ");
1960 tmp3()->print(out); out->print(" ");
1961 tmp4()->print(out); out->print(" ");
1962 out->print("[hdr:%d]", header_size()); out->print(" ");
1963 out->print("[obj:%d]", object_size()); out->print(" ");
1964 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1965 }
1966
1967 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1968 _opr->print(out); out->print(" ");
1969 tmp()->print(out); out->print(" ");
1970 result_opr()->print(out); out->print(" ");
1971 }
1972
1973 // LIR_Op2
1974 void LIR_Op2::print_instr(outputStream* out) const {
1975 if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) {
1976 print_condition(out, condition()); out->print(" ");
1977 }
1978 in_opr1()->print(out); out->print(" ");
1979 in_opr2()->print(out); out->print(" ");
1980 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1981 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1982 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1983 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1984 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1985 result_opr()->print(out);
1986 }
1987
1988 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1989 klass()->print(out); out->print(" ");
1990 len()->print(out); out->print(" ");
1991 obj()->print(out); out->print(" ");
1992 tmp1()->print(out); out->print(" ");
1993 tmp2()->print(out); out->print(" ");
1994 tmp3()->print(out); out->print(" ");
1995 tmp4()->print(out); out->print(" ");
1996 out->print("[type:0x%x]", type()); out->print(" ");
1997 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1998 }
1999
2000
2001 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
2002 object()->print(out); out->print(" ");
2003 if (code() == lir_store_check) {
2004 array()->print(out); out->print(" ");
2005 }
2006 if (code() != lir_store_check) {
2007 klass()->print_name_on(out); out->print(" ");
2008 if (fast_check()) out->print("fast_check ");
2009 }
2010 tmp1()->print(out); out->print(" ");
2011 tmp2()->print(out); out->print(" ");
2012 tmp3()->print(out); out->print(" ");
2013 result_opr()->print(out); out->print(" ");
2014 if (info_for_exception() != nullptr) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
2015 }
2016
2017
2018 // LIR_Op3
2019 void LIR_Op3::print_instr(outputStream* out) const {
2020 in_opr1()->print(out); out->print(" ");
2021 in_opr2()->print(out); out->print(" ");
2022 in_opr3()->print(out); out->print(" ");
2023 result_opr()->print(out);
2024 }
2025
2026 // LIR_Op4
2027 void LIR_Op4::print_instr(outputStream* out) const {
2028 print_condition(out, condition()); out->print(" ");
2029 in_opr1()->print(out); out->print(" ");
2030 in_opr2()->print(out); out->print(" ");
2031 in_opr3()->print(out); out->print(" ");
2032 in_opr4()->print(out); out->print(" ");
2033 result_opr()->print(out);
2034 }
2035
2036 void LIR_OpLock::print_instr(outputStream* out) const {
2037 hdr_opr()->print(out); out->print(" ");
2038 obj_opr()->print(out); out->print(" ");
2039 lock_opr()->print(out); out->print(" ");
2040 if (_scratch->is_valid()) {
2041 _scratch->print(out); out->print(" ");
2042 }
2043 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2044 }
2045
2046 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
2047 obj()->print(out); out->print(" ");
2048 result_opr()->print(out); out->print(" ");
2049 }
2050
2051 #ifdef ASSERT
2052 void LIR_OpAssert::print_instr(outputStream* out) const {
2053 print_condition(out, condition()); out->print(" ");
2054 in_opr1()->print(out); out->print(" ");
2055 in_opr2()->print(out); out->print(", \"");
2056 out->print("%s", msg()); out->print("\"");
2057 }
2058 #endif
2059
2060
2061 void LIR_OpDelay::print_instr(outputStream* out) const {
2062 _op->print_on(out);
2063 }
2064
2065
2066 // LIR_OpProfileCall
2067 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2068 profiled_method()->name()->print_symbol_on(out);
2069 out->print(".");
2070 profiled_method()->holder()->name()->print_symbol_on(out);
2071 out->print(" @ %d ", profiled_bci());
2072 mdo()->print(out); out->print(" ");
2073 recv()->print(out); out->print(" ");
2074 tmp1()->print(out); out->print(" ");
2075 }
2076
2077 // LIR_OpProfileType
2078 void LIR_OpProfileType::print_instr(outputStream* out) const {
2079 out->print("exact = ");
2080 if (exact_klass() == nullptr) {
2081 out->print("unknown");
2082 } else {
2083 exact_klass()->print_name_on(out);
2084 }
2085 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2086 out->print(" ");
2087 mdp()->print(out); out->print(" ");
2088 obj()->print(out); out->print(" ");
2089 tmp()->print(out); out->print(" ");
2090 }
2091
2092 #endif // PRODUCT
2093
2094 // Implementation of LIR_InsertionBuffer
2095
2096 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2097 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2098
2099 int i = number_of_insertion_points() - 1;
2100 if (i < 0 || index_at(i) < index) {
2101 append_new(index, 1);
2102 } else {
2103 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2104 assert(count_at(i) > 0, "check");
2105 set_count_at(i, count_at(i) + 1);
2106 }
2107 _ops.push(op);
2108
2109 DEBUG_ONLY(verify());
2110 }
2111
2112 #ifdef ASSERT
2113 void LIR_InsertionBuffer::verify() {
2114 int sum = 0;
2115 int prev_idx = -1;
2116
2117 for (int i = 0; i < number_of_insertion_points(); i++) {
2118 assert(prev_idx < index_at(i), "index must be ordered ascending");
2119 sum += count_at(i);
2120 }
2121 assert(sum == number_of_ops(), "wrong total sum");
2122 }
2123 #endif