1 /*
2 * Copyright (c) 2000, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "c1/c1_CodeStubs.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/safepointMechanism.inline.hpp"
32 #include "runtime/sharedRuntime.hpp"
33 #include "runtime/vm_version.hpp"
34
35 Register LIR_Opr::as_register() const {
36 return FrameMap::cpu_rnr2reg(cpu_regnr());
37 }
38
39 Register LIR_Opr::as_register_lo() const {
40 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
41 }
42
43 Register LIR_Opr::as_register_hi() const {
44 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
45 }
46
47 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
48 LIR_Opr LIR_OprFact::nullOpr = LIR_Opr();
49
50 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
51 ValueTag tag = type->tag();
52 switch (tag) {
53 case metaDataTag : {
54 ClassConstant* c = type->as_ClassConstant();
55 if (c != nullptr && !c->value()->is_loaded()) {
56 return LIR_OprFact::metadataConst(nullptr);
57 } else if (c != nullptr) {
58 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
59 } else {
60 MethodConstant* m = type->as_MethodConstant();
61 assert (m != nullptr, "not a class or a method?");
62 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
63 }
64 }
65 case objectTag : {
66 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
67 }
68 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
69 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
70 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
71 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
72 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
73 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
74 }
75 }
76
77
78 //---------------------------------------------------
79
80
81 LIR_Address::Scale LIR_Address::scale(BasicType type) {
82 int elem_size = type2aelembytes(type);
83 switch (elem_size) {
84 case 1: return LIR_Address::times_1;
85 case 2: return LIR_Address::times_2;
86 case 4: return LIR_Address::times_4;
87 case 8: return LIR_Address::times_8;
88 }
89 ShouldNotReachHere();
90 return LIR_Address::times_1;
91 }
92
93 //---------------------------------------------------
94
95 char LIR_Opr::type_char(BasicType t) {
96 switch (t) {
97 case T_ARRAY:
98 t = T_OBJECT;
99 case T_BOOLEAN:
100 case T_CHAR:
101 case T_FLOAT:
102 case T_DOUBLE:
103 case T_BYTE:
104 case T_SHORT:
105 case T_INT:
106 case T_LONG:
107 case T_OBJECT:
108 case T_ADDRESS:
109 case T_VOID:
110 return ::type2char(t);
111 case T_METADATA:
112 return 'M';
113 case T_ILLEGAL:
114 return '?';
115
116 default:
117 ShouldNotReachHere();
118 return '?';
119 }
120 }
121
122 #ifndef PRODUCT
123 void LIR_Opr::validate_type() const {
124
125 #ifdef ASSERT
126 if (!is_pointer() && !is_illegal()) {
127 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
128 switch (as_BasicType(type_field())) {
129 case T_LONG:
130 assert((kindfield == cpu_register || kindfield == stack_value) &&
131 size_field() == double_size, "must match");
132 break;
133 case T_FLOAT:
134 // FP return values can be also in CPU registers on ARM (softfp ABI)
135 assert((kindfield == fpu_register || kindfield == stack_value
136 ARM_ONLY(|| kindfield == cpu_register) ) &&
137 size_field() == single_size, "must match");
138 break;
139 case T_DOUBLE:
140 // FP return values can be also in CPU registers on ARM (softfp ABI)
141 assert((kindfield == fpu_register || kindfield == stack_value
142 ARM_ONLY(|| kindfield == cpu_register) ) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_BOOLEAN:
146 case T_CHAR:
147 case T_BYTE:
148 case T_SHORT:
149 case T_INT:
150 case T_ADDRESS:
151 case T_OBJECT:
152 case T_METADATA:
153 case T_ARRAY:
154 assert((kindfield == cpu_register || kindfield == stack_value) &&
155 size_field() == single_size, "must match");
156 break;
157
158 case T_ILLEGAL:
159 // XXX TKR also means unknown right now
160 // assert(is_illegal(), "must match");
161 break;
162
163 default:
164 ShouldNotReachHere();
165 }
166 }
167 #endif
168
169 }
170 #endif // PRODUCT
171
172
173 bool LIR_Opr::is_oop() const {
174 if (is_pointer()) {
175 return pointer()->is_oop_pointer();
176 } else {
177 OprType t= type_field();
178 assert(t != unknown_type, "not set");
179 return t == object_type;
180 }
181 }
182
183
184
185 void LIR_Op2::verify() const {
186 #ifdef ASSERT
187 switch (code()) {
188 case lir_xchg:
189 break;
190
191 default:
192 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
193 "can't produce oops from arith");
194 }
195
196 if (two_operand_lir_form) {
197
198 bool threeOperandForm = false;
199 #ifdef S390
200 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
201 threeOperandForm =
202 code() == lir_shl ||
203 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
204 #endif
205
206 switch (code()) {
207 case lir_add:
208 case lir_sub:
209 case lir_mul:
210 case lir_div:
211 case lir_rem:
212 case lir_logic_and:
213 case lir_logic_or:
214 case lir_logic_xor:
215 case lir_shl:
216 case lir_shr:
217 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
218 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
219 break;
220
221 // special handling for lir_ushr because of write barriers
222 case lir_ushr:
223 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
224 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
225 break;
226
227 default:
228 break;
229 }
230 }
231 #endif
232 }
233
234
235 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
236 : LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
237 , _label(block->label())
238 , _block(block)
239 , _ublock(nullptr)
240 , _stub(nullptr) {
241 }
242
243 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
244 LIR_Op2(lir_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
245 , _label(stub->entry())
246 , _block(nullptr)
247 , _ublock(nullptr)
248 , _stub(stub) {
249 }
250
251 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
252 : LIR_Op2(lir_cond_float_branch, cond, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, (CodeEmitInfo*)nullptr)
253 , _label(block->label())
254 , _block(block)
255 , _ublock(ublock)
256 , _stub(nullptr)
257 {
258 }
259
260 void LIR_OpBranch::change_block(BlockBegin* b) {
261 assert(_block != nullptr, "must have old block");
262 assert(_block->label() == label(), "must be equal");
263
264 _block = b;
265 _label = b->label();
266 }
267
268 void LIR_OpBranch::change_ublock(BlockBegin* b) {
269 assert(_ublock != nullptr, "must have old block");
270 _ublock = b;
271 }
272
273 void LIR_OpBranch::negate_cond() {
274 switch (cond()) {
275 case lir_cond_equal: set_cond(lir_cond_notEqual); break;
276 case lir_cond_notEqual: set_cond(lir_cond_equal); break;
277 case lir_cond_less: set_cond(lir_cond_greaterEqual); break;
278 case lir_cond_lessEqual: set_cond(lir_cond_greater); break;
279 case lir_cond_greaterEqual: set_cond(lir_cond_less); break;
280 case lir_cond_greater: set_cond(lir_cond_lessEqual); break;
281 default: ShouldNotReachHere();
282 }
283 }
284
285
286 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
287 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
288 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
289 CodeStub* stub)
290
291 : LIR_Op(code, result, nullptr)
292 , _object(object)
293 , _array(LIR_OprFact::illegalOpr)
294 , _klass(klass)
295 , _tmp1(tmp1)
296 , _tmp2(tmp2)
297 , _tmp3(tmp3)
298 , _info_for_patch(info_for_patch)
299 , _info_for_exception(info_for_exception)
300 , _stub(stub)
301 , _profiled_method(nullptr)
302 , _profiled_bci(-1)
303 , _should_profile(false)
304 , _fast_check(fast_check)
305 {
306 if (code == lir_checkcast) {
307 assert(info_for_exception != nullptr, "checkcast throws exceptions");
308 } else if (code == lir_instanceof) {
309 assert(info_for_exception == nullptr, "instanceof throws no exceptions");
310 } else {
311 ShouldNotReachHere();
312 }
313 }
314
315
316
317 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
318 : LIR_Op(code, LIR_OprFact::illegalOpr, nullptr)
319 , _object(object)
320 , _array(array)
321 , _klass(nullptr)
322 , _tmp1(tmp1)
323 , _tmp2(tmp2)
324 , _tmp3(tmp3)
325 , _info_for_patch(nullptr)
326 , _info_for_exception(info_for_exception)
327 , _stub(nullptr)
328 , _profiled_method(nullptr)
329 , _profiled_bci(-1)
330 , _should_profile(false)
331 , _fast_check(false)
332 {
333 if (code == lir_store_check) {
334 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
335 assert(info_for_exception != nullptr, "store_check throws exceptions");
336 } else {
337 ShouldNotReachHere();
338 }
339 }
340
341
342 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
343 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
344 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
345 , _src(src)
346 , _src_pos(src_pos)
347 , _dst(dst)
348 , _dst_pos(dst_pos)
349 , _length(length)
350 , _tmp(tmp)
351 , _expected_type(expected_type)
352 , _flags(flags) {
353 #if defined(X86) || defined(AARCH64) || defined(S390) || defined(RISCV64) || defined(PPC64)
354 if (expected_type != nullptr &&
355 ((flags & ~LIR_OpArrayCopy::get_initial_copy_flags()) == 0)) {
356 _stub = nullptr;
357 } else {
358 _stub = new ArrayCopyStub(this);
359 }
360 #else
361 _stub = new ArrayCopyStub(this);
362 #endif
363 }
364
365 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
366 : LIR_Op(lir_updatecrc32, res, nullptr)
367 , _crc(crc)
368 , _val(val) {
369 }
370
371 //-------------------verify--------------------------
372
373 void LIR_Op1::verify() const {
374 switch(code()) {
375 case lir_move:
376 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
377 break;
378 case lir_null_check:
379 assert(in_opr()->is_register(), "must be");
380 break;
381 case lir_return:
382 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
383 break;
384 default:
385 break;
386 }
387 }
388
389 void LIR_OpRTCall::verify() const {
390 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
391 }
392
393 //-------------------visits--------------------------
394
395 // complete rework of LIR instruction visitor.
396 // The virtual call for each instruction type is replaced by a big
397 // switch that adds the operands for each instruction
398
399 void LIR_OpVisitState::visit(LIR_Op* op) {
400 // copy information from the LIR_Op
401 reset();
402 set_op(op);
403
404 switch (op->code()) {
405
406 // LIR_Op0
407 case lir_breakpoint: // result and info always invalid
408 case lir_membar: // result and info always invalid
409 case lir_membar_acquire: // result and info always invalid
410 case lir_membar_release: // result and info always invalid
411 case lir_membar_loadload: // result and info always invalid
412 case lir_membar_storestore: // result and info always invalid
413 case lir_membar_loadstore: // result and info always invalid
414 case lir_membar_storeload: // result and info always invalid
415 case lir_on_spin_wait:
416 {
417 assert(op->as_Op0() != nullptr, "must be");
418 assert(op->_info == nullptr, "info not used by this instruction");
419 assert(op->_result->is_illegal(), "not used");
420 break;
421 }
422
423 case lir_nop: // may have info, result always invalid
424 case lir_std_entry: // may have result, info always invalid
425 case lir_osr_entry: // may have result, info always invalid
426 case lir_get_thread: // may have result, info always invalid
427 {
428 assert(op->as_Op0() != nullptr, "must be");
429 if (op->_info != nullptr) do_info(op->_info);
430 if (op->_result->is_valid()) do_output(op->_result);
431 break;
432 }
433
434
435 // LIR_OpLabel
436 case lir_label: // result and info always invalid
437 {
438 assert(op->as_OpLabel() != nullptr, "must be");
439 assert(op->_info == nullptr, "info not used by this instruction");
440 assert(op->_result->is_illegal(), "not used");
441 break;
442 }
443
444
445 // LIR_Op1
446 case lir_push: // input always valid, result and info always invalid
447 case lir_pop: // input always valid, result and info always invalid
448 case lir_leal: // input and result always valid, info always invalid
449 case lir_monaddr: // input and result always valid, info always invalid
450 case lir_null_check: // input and info always valid, result always invalid
451 case lir_move: // input and result always valid, may have info
452 case lir_sqrt: // FP Ops have no info, but input and result
453 case lir_abs:
454 case lir_neg:
455 case lir_f2hf:
456 case lir_hf2f:
457 {
458 assert(op->as_Op1() != nullptr, "must be");
459 LIR_Op1* op1 = (LIR_Op1*)op;
460
461 if (op1->_info) do_info(op1->_info);
462 if (op1->_opr->is_valid()) do_input(op1->_opr);
463 if (op1->_tmp->is_valid()) do_temp(op1->_tmp);
464 if (op1->_result->is_valid()) do_output(op1->_result);
465
466 break;
467 }
468
469 case lir_return:
470 {
471 assert(op->as_OpReturn() != nullptr, "must be");
472 LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
473
474 if (op_ret->_info) do_info(op_ret->_info);
475 if (op_ret->_opr->is_valid()) do_input(op_ret->_opr);
476 if (op_ret->_result->is_valid()) do_output(op_ret->_result);
477 if (op_ret->stub() != nullptr) do_stub(op_ret->stub());
478
479 break;
480 }
481
482 case lir_safepoint:
483 {
484 assert(op->as_Op1() != nullptr, "must be");
485 LIR_Op1* op1 = (LIR_Op1*)op;
486
487 assert(op1->_info != nullptr, ""); do_info(op1->_info);
488 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
489 assert(op1->_tmp->is_illegal(), "not used");
490 assert(op1->_result->is_illegal(), "safepoint does not produce value");
491
492 break;
493 }
494
495 // LIR_OpConvert;
496 case lir_convert: // input and result always valid, info always invalid
497 {
498 assert(op->as_OpConvert() != nullptr, "must be");
499 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
500
501 assert(opConvert->_info == nullptr, "must be");
502 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
503 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
504 do_stub(opConvert->_stub);
505
506 break;
507 }
508
509 // LIR_OpBranch;
510 case lir_branch: // may have info, input and result register always invalid
511 case lir_cond_float_branch: // may have info, input and result register always invalid
512 {
513 assert(op->as_OpBranch() != nullptr, "must be");
514 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
515
516 assert(opBranch->_tmp1->is_illegal() && opBranch->_tmp2->is_illegal() &&
517 opBranch->_tmp3->is_illegal() && opBranch->_tmp4->is_illegal() &&
518 opBranch->_tmp5->is_illegal(), "not used");
519
520 if (opBranch->_opr1->is_valid()) do_input(opBranch->_opr1);
521 if (opBranch->_opr2->is_valid()) do_input(opBranch->_opr2);
522
523 if (opBranch->_info != nullptr) do_info(opBranch->_info);
524 assert(opBranch->_result->is_illegal(), "not used");
525 if (opBranch->_stub != nullptr) opBranch->stub()->visit(this);
526
527 break;
528 }
529
530
531 // LIR_OpAllocObj
532 case lir_alloc_object:
533 {
534 assert(op->as_OpAllocObj() != nullptr, "must be");
535 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
536
537 if (opAllocObj->_info) do_info(opAllocObj->_info);
538 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
539 do_temp(opAllocObj->_opr);
540 }
541 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
542 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
543 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
544 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
545 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
546 if (opAllocObj->_stub != nullptr) do_stub(opAllocObj->_stub);
547 break;
548 }
549
550
551 // LIR_Op2
552 case lir_cmp:
553 case lir_cmp_l2i:
554 case lir_ucmp_fd2i:
555 case lir_cmp_fd2i:
556 case lir_add:
557 case lir_sub:
558 case lir_rem:
559 case lir_logic_and:
560 case lir_logic_or:
561 case lir_logic_xor:
562 case lir_shl:
563 case lir_shr:
564 case lir_ushr:
565 case lir_xadd:
566 case lir_xchg:
567 case lir_assert:
568 {
569 assert(op->as_Op2() != nullptr, "must be");
570 LIR_Op2* op2 = (LIR_Op2*)op;
571 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
572 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
573
574 if (op2->_info) do_info(op2->_info);
575 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
576 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
577 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
578 if (op2->_result->is_valid()) do_output(op2->_result);
579 if (op->code() == lir_xchg || op->code() == lir_xadd) {
580 // on ARM and PPC, return value is loaded first so could
581 // destroy inputs. On other platforms that implement those
582 // (x86, sparc), the extra constrainsts are harmless.
583 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
584 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
585 }
586
587 break;
588 }
589
590 // special handling for cmove: right input operand must not be equal
591 // to the result operand, otherwise the backend fails
592 case lir_cmove:
593 {
594 assert(op->as_Op4() != nullptr, "must be");
595 LIR_Op4* op4 = (LIR_Op4*)op;
596
597 assert(op4->_info == nullptr && op4->_tmp1->is_illegal() && op4->_tmp2->is_illegal() &&
598 op4->_tmp3->is_illegal() && op4->_tmp4->is_illegal() && op4->_tmp5->is_illegal(), "not used");
599 assert(op4->_opr1->is_valid() && op4->_opr2->is_valid() && op4->_result->is_valid(), "used");
600
601 do_input(op4->_opr1);
602 do_input(op4->_opr2);
603 if (op4->_opr3->is_valid()) do_input(op4->_opr3);
604 if (op4->_opr4->is_valid()) do_input(op4->_opr4);
605 do_temp(op4->_opr2);
606 do_output(op4->_result);
607
608 break;
609 }
610
611 // vspecial handling for strict operations: register input operands
612 // as temp to guarantee that they do not overlap with other
613 // registers
614 case lir_mul:
615 case lir_div:
616 {
617 assert(op->as_Op2() != nullptr, "must be");
618 LIR_Op2* op2 = (LIR_Op2*)op;
619
620 assert(op2->_info == nullptr, "not used");
621 assert(op2->_opr1->is_valid(), "used");
622 assert(op2->_opr2->is_valid(), "used");
623 assert(op2->_result->is_valid(), "used");
624 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
625 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
626
627 do_input(op2->_opr1); do_temp(op2->_opr1);
628 do_input(op2->_opr2); do_temp(op2->_opr2);
629 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
630 do_output(op2->_result);
631
632 break;
633 }
634
635 case lir_throw: {
636 assert(op->as_Op2() != nullptr, "must be");
637 LIR_Op2* op2 = (LIR_Op2*)op;
638
639 if (op2->_info) do_info(op2->_info);
640 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
641 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
642 assert(op2->_result->is_illegal(), "no result");
643 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
644 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
645
646 break;
647 }
648
649 case lir_unwind: {
650 assert(op->as_Op1() != nullptr, "must be");
651 LIR_Op1* op1 = (LIR_Op1*)op;
652
653 assert(op1->_info == nullptr, "no info");
654 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
655 assert(op1->_tmp->is_illegal(), "not used");
656 assert(op1->_result->is_illegal(), "no result");
657
658 break;
659 }
660
661 // LIR_Op3
662 case lir_idiv:
663 case lir_irem: {
664 assert(op->as_Op3() != nullptr, "must be");
665 LIR_Op3* op3= (LIR_Op3*)op;
666
667 if (op3->_info) do_info(op3->_info);
668 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
669
670 // second operand is input and temp, so ensure that second operand
671 // and third operand get not the same register
672 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
673 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
674 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
675
676 if (op3->_result->is_valid()) do_output(op3->_result);
677
678 break;
679 }
680
681 case lir_fmad:
682 case lir_fmaf: {
683 assert(op->as_Op3() != nullptr, "must be");
684 LIR_Op3* op3= (LIR_Op3*)op;
685 assert(op3->_info == nullptr, "no info");
686 do_input(op3->_opr1);
687 do_input(op3->_opr2);
688 do_input(op3->_opr3);
689 do_output(op3->_result);
690 break;
691 }
692
693 // LIR_OpJavaCall
694 case lir_static_call:
695 case lir_optvirtual_call:
696 case lir_icvirtual_call:
697 case lir_dynamic_call: {
698 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
699 assert(opJavaCall != nullptr, "must be");
700
701 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
702
703 // only visit register parameters
704 int n = opJavaCall->_arguments->length();
705 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
706 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
707 do_input(*opJavaCall->_arguments->adr_at(i));
708 }
709 }
710
711 if (opJavaCall->_info) do_info(opJavaCall->_info);
712 do_call();
713 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
714
715 break;
716 }
717
718
719 // LIR_OpRTCall
720 case lir_rtcall: {
721 assert(op->as_OpRTCall() != nullptr, "must be");
722 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
723
724 // only visit register parameters
725 int n = opRTCall->_arguments->length();
726 for (int i = 0; i < n; i++) {
727 if (!opRTCall->_arguments->at(i)->is_pointer()) {
728 do_input(*opRTCall->_arguments->adr_at(i));
729 }
730 }
731 if (opRTCall->_info) do_info(opRTCall->_info);
732 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
733 do_call();
734 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
735
736 break;
737 }
738
739
740 // LIR_OpArrayCopy
741 case lir_arraycopy: {
742 assert(op->as_OpArrayCopy() != nullptr, "must be");
743 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
744
745 assert(opArrayCopy->_result->is_illegal(), "unused");
746 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
747 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
748 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
749 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
750 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
751 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
752 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
753
754 // the implementation of arraycopy always has a call into the runtime
755 do_call();
756
757 break;
758 }
759
760
761 // LIR_OpUpdateCRC32
762 case lir_updatecrc32: {
763 assert(op->as_OpUpdateCRC32() != nullptr, "must be");
764 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
765
766 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
767 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
768 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
769 assert(opUp->_info == nullptr, "no info for LIR_OpUpdateCRC32");
770
771 break;
772 }
773
774
775 // LIR_OpLock
776 case lir_lock:
777 case lir_unlock: {
778 assert(op->as_OpLock() != nullptr, "must be");
779 LIR_OpLock* opLock = (LIR_OpLock*)op;
780
781 if (opLock->_info) do_info(opLock->_info);
782
783 // TODO: check if these operands really have to be temp
784 // (or if input is sufficient). This may have influence on the oop map!
785 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
786 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
787 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
788
789 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
790 assert(opLock->_result->is_illegal(), "unused");
791
792 do_stub(opLock->_stub);
793
794 break;
795 }
796
797
798 // LIR_OpTypeCheck
799 case lir_instanceof:
800 case lir_checkcast:
801 case lir_store_check: {
802 assert(op->as_OpTypeCheck() != nullptr, "must be");
803 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
804
805 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
806 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
807 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
808 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
809 do_temp(opTypeCheck->_object);
810 }
811 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
812 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
813 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
814 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
815 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
816 if (opTypeCheck->_stub != nullptr) do_stub(opTypeCheck->_stub);
817 break;
818 }
819
820 // LIR_OpCompareAndSwap
821 case lir_cas_long:
822 case lir_cas_obj:
823 case lir_cas_int: {
824 assert(op->as_OpCompareAndSwap() != nullptr, "must be");
825 LIR_OpCompareAndSwap* opCmpAndSwap = (LIR_OpCompareAndSwap*)op;
826
827 if (opCmpAndSwap->_info) do_info(opCmpAndSwap->_info);
828 assert(opCmpAndSwap->_addr->is_valid(), "used"); do_input(opCmpAndSwap->_addr);
829 do_temp(opCmpAndSwap->_addr);
830 assert(opCmpAndSwap->_cmp_value->is_valid(), "used"); do_input(opCmpAndSwap->_cmp_value);
831 do_temp(opCmpAndSwap->_cmp_value);
832 assert(opCmpAndSwap->_new_value->is_valid(), "used"); do_input(opCmpAndSwap->_new_value);
833 do_temp(opCmpAndSwap->_new_value);
834 if (opCmpAndSwap->_tmp1->is_valid()) do_temp(opCmpAndSwap->_tmp1);
835 if (opCmpAndSwap->_tmp2->is_valid()) do_temp(opCmpAndSwap->_tmp2);
836 if (opCmpAndSwap->_result->is_valid()) do_output(opCmpAndSwap->_result);
837
838 break;
839 }
840
841
842 // LIR_OpAllocArray;
843 case lir_alloc_array: {
844 assert(op->as_OpAllocArray() != nullptr, "must be");
845 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
846
847 if (opAllocArray->_info) do_info(opAllocArray->_info);
848 if (opAllocArray->_klass->is_valid()) { do_input(opAllocArray->_klass);
849 do_temp(opAllocArray->_klass);
850 }
851 if (opAllocArray->_len->is_valid()) { do_input(opAllocArray->_len);
852 do_temp(opAllocArray->_len);
853 }
854 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
855 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
856 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
857 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
858 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
859 if (opAllocArray->_stub != nullptr) do_stub(opAllocArray->_stub);
860 break;
861 }
862
863 // LIR_OpLoadKlass
864 case lir_load_klass:
865 {
866 LIR_OpLoadKlass* opLoadKlass = op->as_OpLoadKlass();
867 assert(opLoadKlass != nullptr, "must be");
868
869 do_input(opLoadKlass->_obj);
870 do_output(opLoadKlass->_result);
871 if (opLoadKlass->_info) do_info(opLoadKlass->_info);
872 break;
873 }
874
875
876 // LIR_OpProfileCall:
877 case lir_profile_call: {
878 assert(op->as_OpProfileCall() != nullptr, "must be");
879 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
880
881 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
882 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
883 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
884 break;
885 }
886
887 // LIR_OpProfileType:
888 case lir_profile_type: {
889 assert(op->as_OpProfileType() != nullptr, "must be");
890 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
891
892 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
893 do_input(opProfileType->_obj);
894 do_temp(opProfileType->_tmp);
895 break;
896 }
897 default:
898 op->visit(this);
899 }
900 }
901
902 void LIR_Op::visit(LIR_OpVisitState* state) {
903 ShouldNotReachHere();
904 }
905
906 void LIR_OpVisitState::do_stub(CodeStub* stub) {
907 if (stub != nullptr) {
908 stub->visit(this);
909 }
910 }
911
912 XHandlers* LIR_OpVisitState::all_xhandler() {
913 XHandlers* result = nullptr;
914
915 int i;
916 for (i = 0; i < info_count(); i++) {
917 if (info_at(i)->exception_handlers() != nullptr) {
918 result = info_at(i)->exception_handlers();
919 break;
920 }
921 }
922
923 #ifdef ASSERT
924 for (i = 0; i < info_count(); i++) {
925 assert(info_at(i)->exception_handlers() == nullptr ||
926 info_at(i)->exception_handlers() == result,
927 "only one xhandler list allowed per LIR-operation");
928 }
929 #endif
930
931 if (result != nullptr) {
932 return result;
933 } else {
934 return new XHandlers();
935 }
936
937 return result;
938 }
939
940
941 #ifdef ASSERT
942 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
943 visit(op);
944
945 return opr_count(inputMode) == 0 &&
946 opr_count(outputMode) == 0 &&
947 opr_count(tempMode) == 0 &&
948 info_count() == 0 &&
949 !has_call() &&
950 !has_slow_case();
951 }
952 #endif
953
954 // LIR_OpReturn
955 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
956 LIR_Op1(lir_return, opr, (CodeEmitInfo*)nullptr /* info */),
957 _stub(nullptr) {
958 if (VM_Version::supports_stack_watermark_barrier()) {
959 _stub = new C1SafepointPollStub();
960 }
961 }
962
963 //---------------------------------------------------
964
965
966 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
967 masm->emit_call(this);
968 }
969
970 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
971 masm->emit_rtcall(this);
972 }
973
974 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
975 masm->emit_opLabel(this);
976 }
977
978 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
979 masm->emit_arraycopy(this);
980 ArrayCopyStub* code_stub = stub();
981 if (code_stub != nullptr) {
982 masm->append_code_stub(code_stub);
983 }
984 }
985
986 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
987 masm->emit_updatecrc32(this);
988 }
989
990 void LIR_Op0::emit_code(LIR_Assembler* masm) {
991 masm->emit_op0(this);
992 }
993
994 void LIR_Op1::emit_code(LIR_Assembler* masm) {
995 masm->emit_op1(this);
996 }
997
998 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
999 masm->emit_alloc_obj(this);
1000 masm->append_code_stub(stub());
1001 }
1002
1003 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1004 masm->emit_opBranch(this);
1005 if (stub()) {
1006 masm->append_code_stub(stub());
1007 }
1008 }
1009
1010 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1011 masm->emit_opConvert(this);
1012 if (stub() != nullptr) {
1013 masm->append_code_stub(stub());
1014 }
1015 }
1016
1017 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1018 masm->emit_op2(this);
1019 }
1020
1021 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1022 masm->emit_alloc_array(this);
1023 masm->append_code_stub(stub());
1024 }
1025
1026 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1027 masm->emit_opTypeCheck(this);
1028 if (stub()) {
1029 masm->append_code_stub(stub());
1030 }
1031 }
1032
1033 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1034 masm->emit_compare_and_swap(this);
1035 }
1036
1037 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1038 masm->emit_op3(this);
1039 }
1040
1041 void LIR_Op4::emit_code(LIR_Assembler* masm) {
1042 masm->emit_op4(this);
1043 }
1044
1045 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1046 masm->emit_lock(this);
1047 if (stub()) {
1048 masm->append_code_stub(stub());
1049 }
1050 }
1051
1052 void LIR_OpLoadKlass::emit_code(LIR_Assembler* masm) {
1053 masm->emit_load_klass(this);
1054 }
1055
1056 #ifdef ASSERT
1057 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1058 masm->emit_assert(this);
1059 }
1060 #endif
1061
1062 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1063 masm->emit_profile_call(this);
1064 }
1065
1066 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1067 masm->emit_profile_type(this);
1068 }
1069
1070 // LIR_List
1071 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1072 : _operations(8)
1073 , _compilation(compilation)
1074 #ifndef PRODUCT
1075 , _block(block)
1076 #endif
1077 #ifdef ASSERT
1078 , _file(nullptr)
1079 , _line(0)
1080 #endif
1081 #ifdef RISCV
1082 , _cmp_opr1(LIR_OprFact::illegalOpr)
1083 , _cmp_opr2(LIR_OprFact::illegalOpr)
1084 #endif
1085 { }
1086
1087
1088 #ifdef ASSERT
1089 void LIR_List::set_file_and_line(const char * file, int line) {
1090 const char * f = strrchr(file, '/');
1091 if (f == nullptr) f = strrchr(file, '\\');
1092 if (f == nullptr) {
1093 f = file;
1094 } else {
1095 f++;
1096 }
1097 _file = f;
1098 _line = line;
1099 }
1100 #endif
1101
1102 #ifdef RISCV
1103 void LIR_List::set_cmp_oprs(LIR_Op* op) {
1104 switch (op->code()) {
1105 case lir_cmp:
1106 _cmp_opr1 = op->as_Op2()->in_opr1();
1107 _cmp_opr2 = op->as_Op2()->in_opr2();
1108 break;
1109 case lir_branch: // fall through
1110 case lir_cond_float_branch:
1111 assert(op->as_OpBranch()->cond() == lir_cond_always ||
1112 (_cmp_opr1 != LIR_OprFact::illegalOpr && _cmp_opr2 != LIR_OprFact::illegalOpr),
1113 "conditional branches must have legal operands");
1114 if (op->as_OpBranch()->cond() != lir_cond_always) {
1115 op->as_Op2()->set_in_opr1(_cmp_opr1);
1116 op->as_Op2()->set_in_opr2(_cmp_opr2);
1117 }
1118 break;
1119 case lir_cmove:
1120 op->as_Op4()->set_in_opr3(_cmp_opr1);
1121 op->as_Op4()->set_in_opr4(_cmp_opr2);
1122 break;
1123 case lir_cas_long:
1124 case lir_cas_obj:
1125 case lir_cas_int:
1126 _cmp_opr1 = op->as_OpCompareAndSwap()->result_opr();
1127 _cmp_opr2 = LIR_OprFact::intConst(0);
1128 break;
1129 #if INCLUDE_ZGC
1130 case lir_xloadbarrier_test:
1131 _cmp_opr1 = FrameMap::as_opr(t1);
1132 _cmp_opr2 = LIR_OprFact::intConst(0);
1133 break;
1134 #endif
1135 default:
1136 break;
1137 }
1138 }
1139 #endif
1140
1141 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1142 assert(this == buffer->lir_list(), "wrong lir list");
1143 const int n = _operations.length();
1144
1145 if (buffer->number_of_ops() > 0) {
1146 // increase size of instructions list
1147 _operations.at_grow(n + buffer->number_of_ops() - 1, nullptr);
1148 // insert ops from buffer into instructions list
1149 int op_index = buffer->number_of_ops() - 1;
1150 int ip_index = buffer->number_of_insertion_points() - 1;
1151 int from_index = n - 1;
1152 int to_index = _operations.length() - 1;
1153 for (; ip_index >= 0; ip_index --) {
1154 int index = buffer->index_at(ip_index);
1155 // make room after insertion point
1156 while (index < from_index) {
1157 _operations.at_put(to_index --, _operations.at(from_index --));
1158 }
1159 // insert ops from buffer
1160 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1161 _operations.at_put(to_index --, buffer->op_at(op_index --));
1162 }
1163 }
1164 }
1165
1166 buffer->finish();
1167 }
1168
1169
1170 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1171 assert(reg->type() == T_OBJECT, "bad reg");
1172 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1173 }
1174
1175 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1176 assert(reg->type() == T_METADATA, "bad reg");
1177 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1178 }
1179
1180 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1181 append(new LIR_Op1(
1182 lir_move,
1183 LIR_OprFact::address(addr),
1184 src,
1185 addr->type(),
1186 patch_code,
1187 info));
1188 }
1189
1190
1191 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1192 append(new LIR_Op1(
1193 lir_move,
1194 LIR_OprFact::address(address),
1195 dst,
1196 address->type(),
1197 patch_code,
1198 info, lir_move_volatile));
1199 }
1200
1201 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1202 append(new LIR_Op1(
1203 lir_move,
1204 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1205 dst,
1206 type,
1207 patch_code,
1208 info, lir_move_volatile));
1209 }
1210
1211
1212 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1213 append(new LIR_Op1(
1214 lir_move,
1215 LIR_OprFact::intConst(v),
1216 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1217 type,
1218 patch_code,
1219 info));
1220 }
1221
1222
1223 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1224 append(new LIR_Op1(
1225 lir_move,
1226 LIR_OprFact::oopConst(o),
1227 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1228 type,
1229 patch_code,
1230 info));
1231 }
1232
1233
1234 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1235 append(new LIR_Op1(
1236 lir_move,
1237 src,
1238 LIR_OprFact::address(addr),
1239 addr->type(),
1240 patch_code,
1241 info));
1242 }
1243
1244
1245 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1246 append(new LIR_Op1(
1247 lir_move,
1248 src,
1249 LIR_OprFact::address(addr),
1250 addr->type(),
1251 patch_code,
1252 info,
1253 lir_move_volatile));
1254 }
1255
1256 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1257 append(new LIR_Op1(
1258 lir_move,
1259 src,
1260 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1261 type,
1262 patch_code,
1263 info, lir_move_volatile));
1264 }
1265
1266
1267 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1268 append(new LIR_Op3(
1269 lir_idiv,
1270 left,
1271 right,
1272 tmp,
1273 res,
1274 info));
1275 }
1276
1277
1278 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1279 append(new LIR_Op3(
1280 lir_idiv,
1281 left,
1282 LIR_OprFact::intConst(right),
1283 tmp,
1284 res,
1285 info));
1286 }
1287
1288
1289 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1290 append(new LIR_Op3(
1291 lir_irem,
1292 left,
1293 right,
1294 tmp,
1295 res,
1296 info));
1297 }
1298
1299
1300 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1301 append(new LIR_Op3(
1302 lir_irem,
1303 left,
1304 LIR_OprFact::intConst(right),
1305 tmp,
1306 res,
1307 info));
1308 }
1309
1310
1311 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1312 append(new LIR_Op2(
1313 lir_cmp,
1314 condition,
1315 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1316 LIR_OprFact::intConst(c),
1317 info));
1318 }
1319
1320
1321 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1322 append(new LIR_Op2(
1323 lir_cmp,
1324 condition,
1325 reg,
1326 LIR_OprFact::address(addr),
1327 info));
1328 }
1329
1330 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1331 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1332 append(new LIR_OpAllocObj(
1333 klass,
1334 dst,
1335 t1,
1336 t2,
1337 t3,
1338 t4,
1339 header_size,
1340 object_size,
1341 init_check,
1342 stub));
1343 }
1344
1345 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub, bool zero_array) {
1346 append(new LIR_OpAllocArray(
1347 klass,
1348 len,
1349 dst,
1350 t1,
1351 t2,
1352 t3,
1353 t4,
1354 type,
1355 stub,
1356 zero_array));
1357 }
1358
1359 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1360 append(new LIR_Op2(
1361 lir_shl,
1362 value,
1363 count,
1364 dst,
1365 tmp));
1366 }
1367
1368 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1369 append(new LIR_Op2(
1370 lir_shr,
1371 value,
1372 count,
1373 dst,
1374 tmp));
1375 }
1376
1377
1378 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1379 append(new LIR_Op2(
1380 lir_ushr,
1381 value,
1382 count,
1383 dst,
1384 tmp));
1385 }
1386
1387 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1388 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1389 left,
1390 right,
1391 dst));
1392 }
1393
1394 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1395 append(new LIR_OpLock(
1396 lir_lock,
1397 hdr,
1398 obj,
1399 lock,
1400 scratch,
1401 stub,
1402 info));
1403 }
1404
1405 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1406 append(new LIR_OpLock(
1407 lir_unlock,
1408 hdr,
1409 obj,
1410 lock,
1411 scratch,
1412 stub,
1413 nullptr));
1414 }
1415
1416
1417 void check_LIR() {
1418 // cannot do the proper checking as PRODUCT and other modes return different results
1419 // guarantee(sizeof(LIR_Opr) == wordSize, "may not have a v-table");
1420 }
1421
1422
1423
1424 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1425 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1426 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1427 ciMethod* profiled_method, int profiled_bci) {
1428 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1429 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1430 if (profiled_method != nullptr && TypeProfileCasts) {
1431 c->set_profiled_method(profiled_method);
1432 c->set_profiled_bci(profiled_bci);
1433 c->set_should_profile(true);
1434 }
1435 append(c);
1436 }
1437
1438 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1439 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, nullptr, info_for_patch, nullptr);
1440 if (profiled_method != nullptr && TypeProfileCasts) {
1441 c->set_profiled_method(profiled_method);
1442 c->set_profiled_bci(profiled_bci);
1443 c->set_should_profile(true);
1444 }
1445 append(c);
1446 }
1447
1448
1449 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1450 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1451 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1452 if (profiled_method != nullptr && TypeProfileCasts) {
1453 c->set_profiled_method(profiled_method);
1454 c->set_profiled_bci(profiled_bci);
1455 c->set_should_profile(true);
1456 }
1457 append(c);
1458 }
1459
1460 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1461 if (deoptimize_on_null) {
1462 // Emit an explicit null check and deoptimize if opr is null
1463 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1464 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(nullptr));
1465 branch(lir_cond_equal, deopt);
1466 } else {
1467 // Emit an implicit null check
1468 append(new LIR_Op1(lir_null_check, opr, info));
1469 }
1470 }
1471
1472 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1473 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1474 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1475 }
1476
1477 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1478 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1479 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1480 }
1481
1482 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1483 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1484 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1485 }
1486
1487
1488 #ifdef PRODUCT
1489
1490 void print_LIR(BlockList* blocks) {
1491 }
1492
1493 #else
1494 // LIR_Opr
1495 void LIR_Opr::print() const {
1496 print(tty);
1497 }
1498
1499 void LIR_Opr::print(outputStream* out) const {
1500 if (is_illegal()) {
1501 return;
1502 }
1503
1504 out->print("[");
1505 if (is_pointer()) {
1506 pointer()->print_value_on(out);
1507 } else if (is_single_stack()) {
1508 out->print("stack:%d", single_stack_ix());
1509 } else if (is_double_stack()) {
1510 out->print("dbl_stack:%d",double_stack_ix());
1511 } else if (is_virtual()) {
1512 out->print("R%d", vreg_number());
1513 } else if (is_single_cpu()) {
1514 out->print("%s", as_register()->name());
1515 } else if (is_double_cpu()) {
1516 out->print("%s", as_register_hi()->name());
1517 out->print("%s", as_register_lo()->name());
1518 #if defined(X86)
1519 } else if (is_single_xmm()) {
1520 out->print("%s", as_xmm_float_reg()->name());
1521 } else if (is_double_xmm()) {
1522 out->print("%s", as_xmm_double_reg()->name());
1523 } else if (is_single_fpu()) {
1524 out->print("fpu%d", fpu_regnr());
1525 } else if (is_double_fpu()) {
1526 out->print("fpu%d", fpu_regnrLo());
1527 #elif defined(AARCH64)
1528 } else if (is_single_fpu()) {
1529 out->print("fpu%d", fpu_regnr());
1530 } else if (is_double_fpu()) {
1531 out->print("fpu%d", fpu_regnrLo());
1532 #elif defined(ARM)
1533 } else if (is_single_fpu()) {
1534 out->print("s%d", fpu_regnr());
1535 } else if (is_double_fpu()) {
1536 out->print("d%d", fpu_regnrLo() >> 1);
1537 #else
1538 } else if (is_single_fpu()) {
1539 out->print("%s", as_float_reg()->name());
1540 } else if (is_double_fpu()) {
1541 out->print("%s", as_double_reg()->name());
1542 #endif
1543
1544 } else if (is_illegal()) {
1545 out->print("-");
1546 } else {
1547 out->print("Unknown Operand");
1548 }
1549 if (!is_illegal()) {
1550 out->print("|%c", type_char());
1551 }
1552 if (is_register() && is_last_use()) {
1553 out->print("(last_use)");
1554 }
1555 out->print("]");
1556 }
1557
1558
1559 // LIR_Address
1560 void LIR_Const::print_value_on(outputStream* out) const {
1561 switch (type()) {
1562 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1563 case T_INT: out->print("int:%d", as_jint()); break;
1564 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1565 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1566 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1567 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1568 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1569 default: out->print("%3d:" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1570 }
1571 }
1572
1573 // LIR_Address
1574 void LIR_Address::print_value_on(outputStream* out) const {
1575 out->print("Base:"); _base->print(out);
1576 if (!_index->is_illegal()) {
1577 out->print(" Index:"); _index->print(out);
1578 switch (scale()) {
1579 case times_1: break;
1580 case times_2: out->print(" * 2"); break;
1581 case times_4: out->print(" * 4"); break;
1582 case times_8: out->print(" * 8"); break;
1583 }
1584 }
1585 out->print(" Disp: %zd", _disp);
1586 }
1587
1588 // debug output of block header without InstructionPrinter
1589 // (because phi functions are not necessary for LIR)
1590 static void print_block(BlockBegin* x) {
1591 // print block id
1592 BlockEnd* end = x->end();
1593 tty->print("B%d ", x->block_id());
1594
1595 // print flags
1596 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1597 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1598 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1599 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1600 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1601 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1602 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1603
1604 // print block bci range
1605 tty->print("[%d, %d] ", x->bci(), (end == nullptr ? -1 : end->printable_bci()));
1606
1607 // print predecessors and successors
1608 if (x->number_of_preds() > 0) {
1609 tty->print("preds: ");
1610 for (int i = 0; i < x->number_of_preds(); i ++) {
1611 tty->print("B%d ", x->pred_at(i)->block_id());
1612 }
1613 }
1614
1615 if (end != nullptr && x->number_of_sux() > 0) {
1616 tty->print("sux: ");
1617 for (int i = 0; i < x->number_of_sux(); i ++) {
1618 tty->print("B%d ", x->sux_at(i)->block_id());
1619 }
1620 }
1621
1622 // print exception handlers
1623 if (x->number_of_exception_handlers() > 0) {
1624 tty->print("xhandler: ");
1625 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1626 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1627 }
1628 }
1629
1630 tty->cr();
1631 }
1632
1633 void print_LIR(BlockList* blocks) {
1634 tty->print_cr("LIR:");
1635 int i;
1636 for (i = 0; i < blocks->length(); i++) {
1637 BlockBegin* bb = blocks->at(i);
1638 print_block(bb);
1639 tty->print("__id_Instruction___________________________________________"); tty->cr();
1640 bb->lir()->print_instructions();
1641 }
1642 }
1643
1644 void LIR_List::print_instructions() {
1645 for (int i = 0; i < _operations.length(); i++) {
1646 _operations.at(i)->print(); tty->cr();
1647 }
1648 tty->cr();
1649 }
1650
1651 // LIR_Ops printing routines
1652 // LIR_Op
1653 void LIR_Op::print_on(outputStream* out) const {
1654 if (id() != -1 || PrintCFGToFile) {
1655 out->print("%4d ", id());
1656 } else {
1657 out->print(" ");
1658 }
1659 out->print("%s ", name());
1660 print_instr(out);
1661 if (info() != nullptr) out->print(" [bci:%d]", info()->stack()->bci());
1662 #ifdef ASSERT
1663 if (Verbose && _file != nullptr) {
1664 out->print(" (%s:%d)", _file, _line);
1665 }
1666 #endif
1667 }
1668
1669 const char * LIR_Op::name() const {
1670 const char* s = nullptr;
1671 switch(code()) {
1672 // LIR_Op0
1673 case lir_membar: s = "membar"; break;
1674 case lir_membar_acquire: s = "membar_acquire"; break;
1675 case lir_membar_release: s = "membar_release"; break;
1676 case lir_membar_loadload: s = "membar_loadload"; break;
1677 case lir_membar_storestore: s = "membar_storestore"; break;
1678 case lir_membar_loadstore: s = "membar_loadstore"; break;
1679 case lir_membar_storeload: s = "membar_storeload"; break;
1680 case lir_label: s = "label"; break;
1681 case lir_nop: s = "nop"; break;
1682 case lir_on_spin_wait: s = "on_spin_wait"; break;
1683 case lir_std_entry: s = "std_entry"; break;
1684 case lir_osr_entry: s = "osr_entry"; break;
1685 case lir_breakpoint: s = "breakpoint"; break;
1686 case lir_get_thread: s = "get_thread"; break;
1687 // LIR_Op1
1688 case lir_push: s = "push"; break;
1689 case lir_pop: s = "pop"; break;
1690 case lir_null_check: s = "null_check"; break;
1691 case lir_return: s = "return"; break;
1692 case lir_safepoint: s = "safepoint"; break;
1693 case lir_leal: s = "leal"; break;
1694 case lir_branch: s = "branch"; break;
1695 case lir_cond_float_branch: s = "flt_cond_br"; break;
1696 case lir_move: s = "move"; break;
1697 case lir_abs: s = "abs"; break;
1698 case lir_neg: s = "neg"; break;
1699 case lir_sqrt: s = "sqrt"; break;
1700 case lir_f2hf: s = "f2hf"; break;
1701 case lir_hf2f: s = "hf2f"; break;
1702 case lir_rtcall: s = "rtcall"; break;
1703 case lir_throw: s = "throw"; break;
1704 case lir_unwind: s = "unwind"; break;
1705 case lir_convert: s = "convert"; break;
1706 case lir_alloc_object: s = "alloc_obj"; break;
1707 case lir_monaddr: s = "mon_addr"; break;
1708 // LIR_Op2
1709 case lir_cmp: s = "cmp"; break;
1710 case lir_cmp_l2i: s = "cmp_l2i"; break;
1711 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1712 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1713 case lir_add: s = "add"; break;
1714 case lir_sub: s = "sub"; break;
1715 case lir_mul: s = "mul"; break;
1716 case lir_div: s = "div"; break;
1717 case lir_rem: s = "rem"; break;
1718 case lir_logic_and: s = "logic_and"; break;
1719 case lir_logic_or: s = "logic_or"; break;
1720 case lir_logic_xor: s = "logic_xor"; break;
1721 case lir_shl: s = "shift_left"; break;
1722 case lir_shr: s = "shift_right"; break;
1723 case lir_ushr: s = "ushift_right"; break;
1724 case lir_alloc_array: s = "alloc_array"; break;
1725 case lir_xadd: s = "xadd"; break;
1726 case lir_xchg: s = "xchg"; break;
1727 // LIR_Op3
1728 case lir_idiv: s = "idiv"; break;
1729 case lir_irem: s = "irem"; break;
1730 case lir_fmad: s = "fmad"; break;
1731 case lir_fmaf: s = "fmaf"; break;
1732 // LIR_Op4
1733 case lir_cmove: s = "cmove"; break;
1734 // LIR_OpJavaCall
1735 case lir_static_call: s = "static"; break;
1736 case lir_optvirtual_call: s = "optvirtual"; break;
1737 case lir_icvirtual_call: s = "icvirtual"; break;
1738 case lir_dynamic_call: s = "dynamic"; break;
1739 // LIR_OpArrayCopy
1740 case lir_arraycopy: s = "arraycopy"; break;
1741 // LIR_OpUpdateCRC32
1742 case lir_updatecrc32: s = "updatecrc32"; break;
1743 // LIR_OpLock
1744 case lir_lock: s = "lock"; break;
1745 case lir_unlock: s = "unlock"; break;
1746 // LIR_OpTypeCheck
1747 case lir_instanceof: s = "instanceof"; break;
1748 case lir_checkcast: s = "checkcast"; break;
1749 case lir_store_check: s = "store_check"; break;
1750 // LIR_OpCompareAndSwap
1751 case lir_cas_long: s = "cas_long"; break;
1752 case lir_cas_obj: s = "cas_obj"; break;
1753 case lir_cas_int: s = "cas_int"; break;
1754 // LIR_OpProfileCall
1755 case lir_profile_call: s = "profile_call"; break;
1756 // LIR_OpProfileType
1757 case lir_profile_type: s = "profile_type"; break;
1758 // LIR_OpAssert
1759 #ifdef ASSERT
1760 case lir_assert: s = "assert"; break;
1761 #endif
1762 case lir_none: ShouldNotReachHere();break;
1763 default: s = "illegal_op"; break;
1764 }
1765 return s;
1766 }
1767
1768 // LIR_OpJavaCall
1769 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1770 out->print("call: ");
1771 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1772 if (receiver()->is_valid()) {
1773 out->print(" [recv: "); receiver()->print(out); out->print("]");
1774 }
1775 if (result_opr()->is_valid()) {
1776 out->print(" [result: "); result_opr()->print(out); out->print("]");
1777 }
1778 }
1779
1780 // LIR_OpLabel
1781 void LIR_OpLabel::print_instr(outputStream* out) const {
1782 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1783 }
1784
1785 // LIR_OpArrayCopy
1786 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1787 src()->print(out); out->print(" ");
1788 src_pos()->print(out); out->print(" ");
1789 dst()->print(out); out->print(" ");
1790 dst_pos()->print(out); out->print(" ");
1791 length()->print(out); out->print(" ");
1792 tmp()->print(out); out->print(" ");
1793 }
1794
1795 // LIR_OpUpdateCRC32
1796 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1797 crc()->print(out); out->print(" ");
1798 val()->print(out); out->print(" ");
1799 result_opr()->print(out); out->print(" ");
1800 }
1801
1802 // LIR_OpCompareAndSwap
1803 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1804 addr()->print(out); out->print(" ");
1805 cmp_value()->print(out); out->print(" ");
1806 new_value()->print(out); out->print(" ");
1807 tmp1()->print(out); out->print(" ");
1808 tmp2()->print(out); out->print(" ");
1809
1810 }
1811
1812 // LIR_Op0
1813 void LIR_Op0::print_instr(outputStream* out) const {
1814 result_opr()->print(out);
1815 }
1816
1817 // LIR_Op1
1818 const char * LIR_Op1::name() const {
1819 if (code() == lir_move) {
1820 switch (move_kind()) {
1821 case lir_move_normal:
1822 return "move";
1823 case lir_move_volatile:
1824 return "volatile_move";
1825 case lir_move_wide:
1826 return "wide_move";
1827 default:
1828 ShouldNotReachHere();
1829 return "illegal_op";
1830 }
1831 } else {
1832 return LIR_Op::name();
1833 }
1834 }
1835
1836
1837 void LIR_Op1::print_instr(outputStream* out) const {
1838 _opr->print(out); out->print(" ");
1839 result_opr()->print(out); out->print(" ");
1840 print_patch_code(out, patch_code());
1841 }
1842
1843
1844 // LIR_Op1
1845 void LIR_OpRTCall::print_instr(outputStream* out) const {
1846 intx a = (intx)addr();
1847 out->print("%s", Runtime1::name_for_address(addr()));
1848 out->print(" ");
1849 tmp()->print(out);
1850 }
1851
1852 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1853 switch(code) {
1854 case lir_patch_none: break;
1855 case lir_patch_low: out->print("[patch_low]"); break;
1856 case lir_patch_high: out->print("[patch_high]"); break;
1857 case lir_patch_normal: out->print("[patch_normal]"); break;
1858 default: ShouldNotReachHere();
1859 }
1860 }
1861
1862 // LIR_OpBranch
1863 void LIR_OpBranch::print_instr(outputStream* out) const {
1864 print_condition(out, cond()); out->print(" ");
1865 in_opr1()->print(out); out->print(" ");
1866 in_opr2()->print(out); out->print(" ");
1867 if (block() != nullptr) {
1868 out->print("[B%d] ", block()->block_id());
1869 } else if (stub() != nullptr) {
1870 out->print("[");
1871 stub()->print_name(out);
1872 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1873 if (stub()->info() != nullptr) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1874 } else {
1875 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1876 }
1877 if (ublock() != nullptr) {
1878 out->print("unordered: [B%d] ", ublock()->block_id());
1879 }
1880 }
1881
1882 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1883 switch(cond) {
1884 case lir_cond_equal: out->print("[EQ]"); break;
1885 case lir_cond_notEqual: out->print("[NE]"); break;
1886 case lir_cond_less: out->print("[LT]"); break;
1887 case lir_cond_lessEqual: out->print("[LE]"); break;
1888 case lir_cond_greaterEqual: out->print("[GE]"); break;
1889 case lir_cond_greater: out->print("[GT]"); break;
1890 case lir_cond_belowEqual: out->print("[BE]"); break;
1891 case lir_cond_aboveEqual: out->print("[AE]"); break;
1892 case lir_cond_always: out->print("[AL]"); break;
1893 default: out->print("[%d]",cond); break;
1894 }
1895 }
1896
1897 // LIR_OpConvert
1898 void LIR_OpConvert::print_instr(outputStream* out) const {
1899 print_bytecode(out, bytecode());
1900 in_opr()->print(out); out->print(" ");
1901 result_opr()->print(out); out->print(" ");
1902 }
1903
1904 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1905 switch(code) {
1906 case Bytecodes::_d2f: out->print("[d2f] "); break;
1907 case Bytecodes::_d2i: out->print("[d2i] "); break;
1908 case Bytecodes::_d2l: out->print("[d2l] "); break;
1909 case Bytecodes::_f2d: out->print("[f2d] "); break;
1910 case Bytecodes::_f2i: out->print("[f2i] "); break;
1911 case Bytecodes::_f2l: out->print("[f2l] "); break;
1912 case Bytecodes::_i2b: out->print("[i2b] "); break;
1913 case Bytecodes::_i2c: out->print("[i2c] "); break;
1914 case Bytecodes::_i2d: out->print("[i2d] "); break;
1915 case Bytecodes::_i2f: out->print("[i2f] "); break;
1916 case Bytecodes::_i2l: out->print("[i2l] "); break;
1917 case Bytecodes::_i2s: out->print("[i2s] "); break;
1918 case Bytecodes::_l2i: out->print("[l2i] "); break;
1919 case Bytecodes::_l2f: out->print("[l2f] "); break;
1920 case Bytecodes::_l2d: out->print("[l2d] "); break;
1921 default:
1922 out->print("[?%d]",code);
1923 break;
1924 }
1925 }
1926
1927 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1928 klass()->print(out); out->print(" ");
1929 obj()->print(out); out->print(" ");
1930 tmp1()->print(out); out->print(" ");
1931 tmp2()->print(out); out->print(" ");
1932 tmp3()->print(out); out->print(" ");
1933 tmp4()->print(out); out->print(" ");
1934 out->print("[hdr:%d]", header_size()); out->print(" ");
1935 out->print("[obj:%d]", object_size()); out->print(" ");
1936 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1937 }
1938
1939 // LIR_Op2
1940 void LIR_Op2::print_instr(outputStream* out) const {
1941 if (code() == lir_cmp || code() == lir_branch || code() == lir_cond_float_branch) {
1942 print_condition(out, condition()); out->print(" ");
1943 }
1944 in_opr1()->print(out); out->print(" ");
1945 in_opr2()->print(out); out->print(" ");
1946 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1947 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1948 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1949 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1950 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1951 result_opr()->print(out);
1952 }
1953
1954 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1955 klass()->print(out); out->print(" ");
1956 len()->print(out); out->print(" ");
1957 obj()->print(out); out->print(" ");
1958 tmp1()->print(out); out->print(" ");
1959 tmp2()->print(out); out->print(" ");
1960 tmp3()->print(out); out->print(" ");
1961 tmp4()->print(out); out->print(" ");
1962 out->print("[type:0x%x]", type()); out->print(" ");
1963 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1964 }
1965
1966
1967 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1968 object()->print(out); out->print(" ");
1969 if (code() == lir_store_check) {
1970 array()->print(out); out->print(" ");
1971 }
1972 if (code() != lir_store_check) {
1973 klass()->print_name_on(out); out->print(" ");
1974 if (fast_check()) out->print("fast_check ");
1975 }
1976 tmp1()->print(out); out->print(" ");
1977 tmp2()->print(out); out->print(" ");
1978 tmp3()->print(out); out->print(" ");
1979 result_opr()->print(out); out->print(" ");
1980 if (info_for_exception() != nullptr) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1981 }
1982
1983
1984 // LIR_Op3
1985 void LIR_Op3::print_instr(outputStream* out) const {
1986 in_opr1()->print(out); out->print(" ");
1987 in_opr2()->print(out); out->print(" ");
1988 in_opr3()->print(out); out->print(" ");
1989 result_opr()->print(out);
1990 }
1991
1992 // LIR_Op4
1993 void LIR_Op4::print_instr(outputStream* out) const {
1994 print_condition(out, condition()); out->print(" ");
1995 in_opr1()->print(out); out->print(" ");
1996 in_opr2()->print(out); out->print(" ");
1997 in_opr3()->print(out); out->print(" ");
1998 in_opr4()->print(out); out->print(" ");
1999 result_opr()->print(out);
2000 }
2001
2002 void LIR_OpLock::print_instr(outputStream* out) const {
2003 hdr_opr()->print(out); out->print(" ");
2004 obj_opr()->print(out); out->print(" ");
2005 lock_opr()->print(out); out->print(" ");
2006 if (_scratch->is_valid()) {
2007 _scratch->print(out); out->print(" ");
2008 }
2009 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2010 }
2011
2012 void LIR_OpLoadKlass::print_instr(outputStream* out) const {
2013 obj()->print(out); out->print(" ");
2014 result_opr()->print(out); out->print(" ");
2015 }
2016
2017 #ifdef ASSERT
2018 void LIR_OpAssert::print_instr(outputStream* out) const {
2019 print_condition(out, condition()); out->print(" ");
2020 in_opr1()->print(out); out->print(" ");
2021 in_opr2()->print(out); out->print(", \"");
2022 out->print("%s", msg()); out->print("\"");
2023 }
2024 #endif
2025
2026
2027 // LIR_OpProfileCall
2028 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2029 profiled_method()->name()->print_symbol_on(out);
2030 out->print(".");
2031 profiled_method()->holder()->name()->print_symbol_on(out);
2032 out->print(" @ %d ", profiled_bci());
2033 mdo()->print(out); out->print(" ");
2034 recv()->print(out); out->print(" ");
2035 tmp1()->print(out); out->print(" ");
2036 }
2037
2038 // LIR_OpProfileType
2039 void LIR_OpProfileType::print_instr(outputStream* out) const {
2040 out->print("exact = ");
2041 if (exact_klass() == nullptr) {
2042 out->print("unknown");
2043 } else {
2044 exact_klass()->print_name_on(out);
2045 }
2046 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2047 out->print(" ");
2048 mdp()->print(out); out->print(" ");
2049 obj()->print(out); out->print(" ");
2050 tmp()->print(out); out->print(" ");
2051 }
2052
2053 #endif // PRODUCT
2054
2055 // Implementation of LIR_InsertionBuffer
2056
2057 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2058 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2059
2060 int i = number_of_insertion_points() - 1;
2061 if (i < 0 || index_at(i) < index) {
2062 append_new(index, 1);
2063 } else {
2064 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2065 assert(count_at(i) > 0, "check");
2066 set_count_at(i, count_at(i) + 1);
2067 }
2068 _ops.push(op);
2069
2070 DEBUG_ONLY(verify());
2071 }
2072
2073 #ifdef ASSERT
2074 void LIR_InsertionBuffer::verify() {
2075 int sum = 0;
2076 int prev_idx = -1;
2077
2078 for (int i = 0; i < number_of_insertion_points(); i++) {
2079 assert(prev_idx < index_at(i), "index must be ordered ascending");
2080 sum += count_at(i);
2081 }
2082 assert(sum == number_of_ops(), "wrong total sum");
2083 }
2084 #endif