1 /*
2 * Copyright (c) 2000, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/assembler.inline.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_Instruction.hpp"
28 #include "c1/c1_InstructionPrinter.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_MacroAssembler.hpp"
31 #include "c1/c1_ValueStack.hpp"
32 #include "ci/ciInlineKlass.hpp"
33 #include "ci/ciUtilities.inline.hpp"
34 #include "compiler/compilerDefinitions.inline.hpp"
35 #include "compiler/oopMap.hpp"
36 #include "runtime/os.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/vm_version.hpp"
39
40 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
41 // We must have enough patching space so that call can be inserted.
42 // We cannot use fat nops here, since the concurrent code rewrite may transiently
43 // create the illegal instruction sequence.
44 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
45 _masm->nop();
46 }
47 info->set_force_reexecute();
48 patch->install(_masm, patch_code, obj, info);
49 append_code_stub(patch);
50
51 #ifdef ASSERT
52 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
53 if (patch->id() == PatchingStub::access_field_id) {
54 switch (code) {
55 case Bytecodes::_putstatic:
56 case Bytecodes::_getstatic:
57 case Bytecodes::_putfield:
58 case Bytecodes::_getfield:
59 break;
60 default:
61 ShouldNotReachHere();
62 }
63 } else if (patch->id() == PatchingStub::load_klass_id) {
64 switch (code) {
65 case Bytecodes::_new:
66 case Bytecodes::_anewarray:
67 case Bytecodes::_multianewarray:
68 case Bytecodes::_instanceof:
69 case Bytecodes::_checkcast:
70 break;
71 default:
72 ShouldNotReachHere();
73 }
74 } else if (patch->id() == PatchingStub::load_mirror_id) {
75 switch (code) {
76 case Bytecodes::_putstatic:
77 case Bytecodes::_getstatic:
78 case Bytecodes::_ldc:
79 case Bytecodes::_ldc_w:
80 case Bytecodes::_ldc2_w:
81 break;
82 default:
83 ShouldNotReachHere();
84 }
85 } else if (patch->id() == PatchingStub::load_appendix_id) {
86 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
87 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
88 } else {
89 ShouldNotReachHere();
90 }
91 #endif
92 }
93
94 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
95 IRScope* scope = info->scope();
96 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
97 if (Bytecodes::has_optional_appendix(bc_raw)) {
98 return PatchingStub::load_appendix_id;
99 }
100 return PatchingStub::load_mirror_id;
101 }
102
103 //---------------------------------------------------------------
104
105
106 LIR_Assembler::LIR_Assembler(Compilation* c):
107 _masm(c->masm())
108 , _compilation(c)
109 , _frame_map(c->frame_map())
110 , _current_block(nullptr)
111 , _pending_non_safepoint(nullptr)
112 , _pending_non_safepoint_offset(0)
113 , _immediate_oops_patched(0)
114 {
115 _slow_case_stubs = new CodeStubList();
116 }
117
118
119 LIR_Assembler::~LIR_Assembler() {
120 // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
121 // Reset it here to avoid an assertion.
122 _unwind_handler_entry.reset();
123 _verified_inline_entry.reset();
124 }
125
126
127 void LIR_Assembler::check_codespace() {
128 CodeSection* cs = _masm->code_section();
129 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
130 BAILOUT("CodeBuffer overflow");
131 }
132 }
133
134
135 void LIR_Assembler::append_code_stub(CodeStub* stub) {
136 _immediate_oops_patched += stub->nr_immediate_oops_patched();
137 _slow_case_stubs->append(stub);
138 }
139
140 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
141 for (int m = 0; m < stub_list->length(); m++) {
142 CodeStub* s = stub_list->at(m);
143
144 check_codespace();
145 CHECK_BAILOUT();
146
147 #ifndef PRODUCT
148 if (CommentedAssembly) {
149 stringStream st;
150 s->print_name(&st);
151 st.print(" slow case");
152 _masm->block_comment(st.freeze());
153 }
154 #endif
155 s->emit_code(this);
156 #ifdef ASSERT
157 s->assert_no_unbound_labels();
158 #endif
159 }
160 }
161
162
163 void LIR_Assembler::emit_slow_case_stubs() {
164 emit_stubs(_slow_case_stubs);
165 }
166
167
168 bool LIR_Assembler::needs_icache(ciMethod* method) const {
169 return !method->is_static();
170 }
171
172 bool LIR_Assembler::needs_clinit_barrier_on_entry(ciMethod* method) const {
173 return VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier();
174 }
175
176 int LIR_Assembler::code_offset() const {
177 return _masm->offset();
178 }
179
180
181 address LIR_Assembler::pc() const {
182 return _masm->pc();
183 }
184
185 // To bang the stack of this compiled method we use the stack size
186 // that the interpreter would need in case of a deoptimization. This
187 // removes the need to bang the stack in the deoptimization blob which
188 // in turn simplifies stack overflow handling.
189 int LIR_Assembler::bang_size_in_bytes() const {
190 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
191 }
192
193 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
194 for (int i = 0; i < info_list->length(); i++) {
195 XHandlers* handlers = info_list->at(i)->exception_handlers();
196
197 for (int j = 0; j < handlers->length(); j++) {
198 XHandler* handler = handlers->handler_at(j);
199 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
200 assert(handler->entry_code() == nullptr ||
201 handler->entry_code()->instructions_list()->last()->code() == lir_branch, "last operation must be branch");
202
203 if (handler->entry_pco() == -1) {
204 // entry code not emitted yet
205 if (handler->entry_code() != nullptr && handler->entry_code()->instructions_list()->length() > 1) {
206 handler->set_entry_pco(code_offset());
207 if (CommentedAssembly) {
208 _masm->block_comment("Exception adapter block");
209 }
210 emit_lir_list(handler->entry_code());
211 } else {
212 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
213 }
214
215 assert(handler->entry_pco() != -1, "must be set now");
216 }
217 }
218 }
219 }
220
221
222 void LIR_Assembler::emit_code(BlockList* hir) {
223 if (PrintLIR) {
224 print_LIR(hir);
225 }
226
227 int n = hir->length();
228 for (int i = 0; i < n; i++) {
229 emit_block(hir->at(i));
230 CHECK_BAILOUT();
231 }
232
233 flush_debug_info(code_offset());
234
235 DEBUG_ONLY(check_no_unbound_labels());
236 }
237
238
239 void LIR_Assembler::emit_block(BlockBegin* block) {
240 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
241 align_backward_branch_target();
242 }
243
244 // if this block is the start of an exception handler, record the
245 // PC offset of the first instruction for later construction of
246 // the ExceptionHandlerTable
247 if (block->is_set(BlockBegin::exception_entry_flag)) {
248 block->set_exception_handler_pco(code_offset());
249 }
250
251 #ifndef PRODUCT
252 if (PrintLIRWithAssembly) {
253 // don't print Phi's
254 InstructionPrinter ip(false);
255 block->print(ip);
256 }
257 #endif /* PRODUCT */
258
259 assert(block->lir() != nullptr, "must have LIR");
260 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
261
262 #ifndef PRODUCT
263 if (CommentedAssembly) {
264 stringStream st;
265 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
266 _masm->block_comment(st.freeze());
267 }
268 #endif
269
270 emit_lir_list(block->lir());
271
272 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
273 }
274
275
276 void LIR_Assembler::emit_lir_list(LIR_List* list) {
277 peephole(list);
278
279 int n = list->length();
280 for (int i = 0; i < n; i++) {
281 LIR_Op* op = list->at(i);
282
283 check_codespace();
284 CHECK_BAILOUT();
285
286 #ifndef PRODUCT
287 if (CommentedAssembly) {
288 // Don't record out every op since that's too verbose. Print
289 // branches since they include block and stub names. Also print
290 // patching moves since they generate funny looking code.
291 if (op->code() == lir_branch ||
292 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
293 (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
294 stringStream st;
295 op->print_on(&st);
296 _masm->block_comment(st.freeze());
297 }
298 }
299 if (PrintLIRWithAssembly) {
300 // print out the LIR operation followed by the resulting assembly
301 list->at(i)->print(); tty->cr();
302 }
303 #endif /* PRODUCT */
304
305 op->emit_code(this);
306
307 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
308 process_debug_info(op);
309 }
310
311 #ifndef PRODUCT
312 if (PrintLIRWithAssembly) {
313 _masm->code()->decode();
314 }
315 #endif /* PRODUCT */
316 }
317 }
318
319 #ifdef ASSERT
320 void LIR_Assembler::check_no_unbound_labels() {
321 CHECK_BAILOUT();
322
323 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
324 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
325 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
326 assert(false, "unbound label");
327 }
328 }
329 }
330 #endif
331
332 //----------------------------------debug info--------------------------------
333
334
335 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
336 int pc_offset = code_offset();
337 flush_debug_info(pc_offset);
338 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
339 if (info->exception_handlers() != nullptr) {
340 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
341 }
342 }
343
344 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool maybe_return_as_fields) {
345 flush_debug_info(pc_offset);
346 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset, maybe_return_as_fields);
347 if (cinfo->exception_handlers() != nullptr) {
348 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
349 }
350 }
351
352 static ValueStack* debug_info(Instruction* ins) {
353 StateSplit* ss = ins->as_StateSplit();
354 if (ss != nullptr) return ss->state();
355 return ins->state_before();
356 }
357
358 void LIR_Assembler::process_debug_info(LIR_Op* op) {
359 Instruction* src = op->source();
360 if (src == nullptr) return;
361 int pc_offset = code_offset();
362 if (_pending_non_safepoint == src) {
363 _pending_non_safepoint_offset = pc_offset;
364 return;
365 }
366 ValueStack* vstack = debug_info(src);
367 if (vstack == nullptr) return;
368 if (_pending_non_safepoint != nullptr) {
369 // Got some old debug info. Get rid of it.
370 if (debug_info(_pending_non_safepoint) == vstack) {
371 _pending_non_safepoint_offset = pc_offset;
372 return;
373 }
374 if (_pending_non_safepoint_offset < pc_offset) {
375 record_non_safepoint_debug_info();
376 }
377 _pending_non_safepoint = nullptr;
378 }
379 // Remember the debug info.
380 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
381 _pending_non_safepoint = src;
382 _pending_non_safepoint_offset = pc_offset;
383 }
384 }
385
386 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
387 // Return null if n is too large.
388 // Returns the caller_bci for the next-younger state, also.
389 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
390 ValueStack* t = s;
391 for (int i = 0; i < n; i++) {
392 if (t == nullptr) break;
393 t = t->caller_state();
394 }
395 if (t == nullptr) return nullptr;
396 for (;;) {
397 ValueStack* tc = t->caller_state();
398 if (tc == nullptr) return s;
399 t = tc;
400 bci_result = tc->bci();
401 s = s->caller_state();
402 }
403 }
404
405 void LIR_Assembler::record_non_safepoint_debug_info() {
406 int pc_offset = _pending_non_safepoint_offset;
407 ValueStack* vstack = debug_info(_pending_non_safepoint);
408 int bci = vstack->bci();
409
410 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
411 assert(debug_info->recording_non_safepoints(), "sanity");
412
413 debug_info->add_non_safepoint(pc_offset);
414
415 // Visit scopes from oldest to youngest.
416 for (int n = 0; ; n++) {
417 int s_bci = bci;
418 ValueStack* s = nth_oldest(vstack, n, s_bci);
419 if (s == nullptr) break;
420 IRScope* scope = s->scope();
421 //Always pass false for reexecute since these ScopeDescs are never used for deopt
422 methodHandle null_mh;
423 debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
424 }
425
426 debug_info->end_non_safepoint(pc_offset);
427 }
428
429
430 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
431 return add_debug_info_for_null_check(code_offset(), cinfo);
432 }
433
434 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
435 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
436 append_code_stub(stub);
437 return stub;
438 }
439
440 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
441 add_debug_info_for_div0(code_offset(), info);
442 }
443
444 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
445 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
446 append_code_stub(stub);
447 }
448
449 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
450 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
451 }
452
453 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
454 verify_oop_map(op->info());
455
456 // must align calls sites, otherwise they can't be updated atomically
457 align_call(op->code());
458
459 if (CodeBuffer::supports_shared_stubs() && op->method()->can_be_statically_bound()) {
460 // Calls of the same statically bound method can share
461 // a stub to the interpreter.
462 CodeBuffer::csize_t call_offset = pc() - _masm->code()->insts_begin();
463 _masm->code()->shared_stub_to_interp_for(op->method(), call_offset);
464 } else {
465 emit_static_call_stub();
466 }
467 CHECK_BAILOUT();
468
469 switch (op->code()) {
470 case lir_static_call:
471 case lir_dynamic_call:
472 call(op, relocInfo::static_call_type);
473 break;
474 case lir_optvirtual_call:
475 call(op, relocInfo::opt_virtual_call_type);
476 break;
477 case lir_icvirtual_call:
478 ic_call(op);
479 break;
480 default:
481 fatal("unexpected op code: %s", op->name());
482 break;
483 }
484
485 ciInlineKlass* vk = nullptr;
486 if (op->maybe_return_as_fields(&vk)) {
487 int offset = store_inline_type_fields_to_buf(vk);
488 add_call_info(offset, op->info(), true);
489 }
490 }
491
492
493 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
494 _masm->bind (*(op->label()));
495 }
496
497
498 void LIR_Assembler::emit_op1(LIR_Op1* op) {
499 switch (op->code()) {
500 case lir_move:
501 if (op->move_kind() == lir_move_volatile) {
502 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
503 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
504 } else {
505 move_op(op->in_opr(), op->result_opr(), op->type(),
506 op->patch_code(), op->info(),
507 op->move_kind() == lir_move_wide);
508 }
509 break;
510
511 case lir_abs:
512 case lir_sqrt:
513 case lir_f2hf:
514 case lir_hf2f:
515 intrinsic_op(op->code(), op->in_opr(), op->tmp_opr(), op->result_opr(), op);
516 break;
517
518 case lir_neg:
519 negate(op->in_opr(), op->result_opr(), op->tmp_opr());
520 break;
521
522 case lir_return: {
523 assert(op->as_OpReturn() != nullptr, "sanity");
524 LIR_OpReturn *ret_op = (LIR_OpReturn*)op;
525 return_op(ret_op->in_opr(), ret_op->stub());
526 if (ret_op->stub() != nullptr) {
527 append_code_stub(ret_op->stub());
528 }
529 break;
530 }
531
532 case lir_safepoint:
533 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
534 _masm->nop();
535 }
536 safepoint_poll(op->in_opr(), op->info());
537 break;
538
539 case lir_branch:
540 break;
541
542 case lir_push:
543 push(op->in_opr());
544 break;
545
546 case lir_pop:
547 pop(op->in_opr());
548 break;
549
550 case lir_leal:
551 leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
552 break;
553
554 case lir_null_check: {
555 ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
556
557 if (op->in_opr()->is_single_cpu()) {
558 _masm->null_check(op->in_opr()->as_register(), stub->entry());
559 } else {
560 Unimplemented();
561 }
562 break;
563 }
564
565 case lir_monaddr:
566 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
567 break;
568
569 case lir_unwind:
570 unwind_op(op->in_opr());
571 break;
572
573 default:
574 Unimplemented();
575 break;
576 }
577 }
578
579 void LIR_Assembler::add_scalarized_debug_info(int pc_offset) {
580 // The VEP and VIEP(RO) of a C1-compiled method call buffer_inline_args_xxx()
581 // before doing any argument shuffling. This call may cause GC. When GC happens,
582 // all the parameters are still as passed by the caller, so we just use
583 // map->set_include_argument_oops() inside frame::sender_for_compiled_frame(RegisterMap* map).
584 // Deoptimization is delayed until we enter the method body, so we only need a
585 // scope for stack walking here. There are no materialized locals, expression
586 // stack entries, or monitors yet.
587 flush_debug_info(pc_offset);
588 OopMap* oop_map = new OopMap(0, 0);
589 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
590 debug_info->add_safepoint(pc_offset, oop_map);
591 bool reexecute = false;
592 debug_info->describe_scope(pc_offset, methodHandle(), method(), 0, reexecute);
593 debug_info->end_safepoint(pc_offset);
594 }
595
596 // The entries points of C1-compiled methods can have the following types:
597 // (1) Methods with no inline type args
598 // (2) Methods with inline type receiver but no inline type args
599 // VIEP_RO is the same as VIEP
600 // (3) Methods with non-inline type receiver and some inline type args
601 // VIEP_RO is the same as VEP
602 // (4) Methods with inline type receiver and other inline type args
603 // Separate VEP, VIEP and VIEP_RO
604 //
605 // (1) (2) (3) (4)
606 // UEP/UIEP: VEP: UEP: UEP:
607 // check_icache pack receiver check_icache check_icache
608 // VEP/VIEP/VIEP_RO jump to VIEP VEP/VIEP_RO: VIEP_RO:
609 // body UEP/UIEP: pack inline args pack inline args (except receiver)
610 // check_icache jump to VIEP jump to VIEP
611 // VIEP/VIEP_RO UIEP: VEP:
612 // body check_icache pack all inline args
613 // VIEP: jump to VIEP
614 // body UIEP:
615 // check_icache
616 // VIEP:
617 // body
618 void LIR_Assembler::emit_std_entries() {
619 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
620
621 _masm->align(CodeEntryAlignment);
622
623 if (method()->has_scalarized_args()) {
624 VM_ENTRY_MARK;
625 assert(InlineTypePassFieldsAsArgs, "must be");
626 CompiledEntrySignature ces(method()->get_Method());
627 ces.compute_calling_conventions(false);
628 CodeOffsets::Entries ro_entry_type = ces.c1_inline_ro_entry_type();
629
630 // UEP: check icache and fall-through
631 if (ro_entry_type != CodeOffsets::Verified_Inline_Entry) {
632 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
633 if (needs_icache(method())) {
634 check_icache();
635 }
636 }
637
638 // VIEP_RO: pack all value parameters, except the receiver
639 if (ro_entry_type == CodeOffsets::Verified_Inline_Entry_RO) {
640 emit_std_entry(CodeOffsets::Verified_Inline_Entry_RO, &ces);
641 }
642
643 // VEP: pack all value parameters
644 _masm->align(CodeEntryAlignment);
645 emit_std_entry(CodeOffsets::Verified_Entry, &ces);
646
647 // UIEP: check icache and fall-through
648 _masm->align(CodeEntryAlignment);
649 offsets()->set_value(CodeOffsets::Inline_Entry, _masm->offset());
650 if (ro_entry_type == CodeOffsets::Verified_Inline_Entry) {
651 // Special case if we have VIEP == VIEP(RO):
652 // this means UIEP (called by C1) == UEP (called by C2).
653 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
654 }
655 if (needs_icache(method())) {
656 check_icache();
657 }
658
659 // VIEP: all value parameters are passed as refs - no packing.
660 emit_std_entry(CodeOffsets::Verified_Inline_Entry, nullptr);
661
662 if (ro_entry_type != CodeOffsets::Verified_Inline_Entry_RO) {
663 // The VIEP(RO) is the same as VEP or VIEP
664 assert(ro_entry_type == CodeOffsets::Verified_Entry ||
665 ro_entry_type == CodeOffsets::Verified_Inline_Entry, "must be");
666 offsets()->set_value(CodeOffsets::Verified_Inline_Entry_RO,
667 offsets()->value(ro_entry_type));
668 }
669 } else {
670 // All 3 entries are the same (no inline type packing)
671 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
672 offsets()->set_value(CodeOffsets::Inline_Entry, _masm->offset());
673 if (needs_icache(method())) {
674 check_icache();
675 }
676 emit_std_entry(CodeOffsets::Verified_Inline_Entry, nullptr);
677 offsets()->set_value(CodeOffsets::Verified_Entry, offsets()->value(CodeOffsets::Verified_Inline_Entry));
678 offsets()->set_value(CodeOffsets::Verified_Inline_Entry_RO, offsets()->value(CodeOffsets::Verified_Inline_Entry));
679 }
680 }
681
682 void LIR_Assembler::emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces) {
683 offsets()->set_value(entry, _masm->offset());
684 _masm->verified_entry(compilation()->directive()->BreakAtExecuteOption);
685 switch (entry) {
686 case CodeOffsets::Verified_Entry: {
687 if (needs_clinit_barrier_on_entry(method())) {
688 clinit_barrier(method());
689 }
690 int rt_call_offset = _masm->verified_entry(ces, initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()), _verified_inline_entry);
691 add_scalarized_debug_info(rt_call_offset);
692 break;
693 }
694 case CodeOffsets::Verified_Inline_Entry_RO: {
695 assert(!needs_clinit_barrier_on_entry(method()), "can't be static");
696 int rt_call_offset = _masm->verified_inline_ro_entry(ces, initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()), _verified_inline_entry);
697 add_scalarized_debug_info(rt_call_offset);
698 break;
699 }
700 case CodeOffsets::Verified_Inline_Entry: {
701 if (needs_clinit_barrier_on_entry(method())) {
702 clinit_barrier(method());
703 }
704 build_frame();
705 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
706 break;
707 }
708 default:
709 ShouldNotReachHere();
710 break;
711 }
712 }
713
714 void LIR_Assembler::emit_op0(LIR_Op0* op) {
715 switch (op->code()) {
716 case lir_nop:
717 assert(op->info() == nullptr, "not supported");
718 _masm->nop();
719 break;
720
721 case lir_label:
722 Unimplemented();
723 break;
724
725 case lir_std_entry:
726 emit_std_entries();
727 break;
728
729 case lir_osr_entry:
730 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
731 osr_entry();
732 break;
733
734 case lir_breakpoint:
735 breakpoint();
736 break;
737
738 case lir_membar:
739 membar();
740 break;
741
742 case lir_membar_acquire:
743 membar_acquire();
744 break;
745
746 case lir_membar_release:
747 membar_release();
748 break;
749
750 case lir_membar_loadload:
751 membar_loadload();
752 break;
753
754 case lir_membar_storestore:
755 membar_storestore();
756 break;
757
758 case lir_membar_loadstore:
759 membar_loadstore();
760 break;
761
762 case lir_membar_storeload:
763 membar_storeload();
764 break;
765
766 case lir_get_thread:
767 get_thread(op->result_opr());
768 break;
769
770 case lir_on_spin_wait:
771 on_spin_wait();
772 break;
773
774 case lir_check_orig_pc:
775 check_orig_pc();
776 break;
777
778 default:
779 ShouldNotReachHere();
780 break;
781 }
782 }
783
784
785 void LIR_Assembler::emit_op2(LIR_Op2* op) {
786 switch (op->code()) {
787 case lir_cmp:
788 if (op->info() != nullptr) {
789 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
790 "shouldn't be codeemitinfo for non-address operands");
791 add_debug_info_for_null_check_here(op->info()); // exception possible
792 }
793 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
794 break;
795
796 case lir_cmp_l2i:
797 case lir_cmp_fd2i:
798 case lir_ucmp_fd2i:
799 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
800 break;
801
802 case lir_shl:
803 case lir_shr:
804 case lir_ushr:
805 if (op->in_opr2()->is_constant()) {
806 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
807 } else {
808 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
809 }
810 break;
811
812 case lir_add:
813 case lir_sub:
814 case lir_mul:
815 case lir_div:
816 case lir_rem:
817 arith_op(
818 op->code(),
819 op->in_opr1(),
820 op->in_opr2(),
821 op->result_opr(),
822 op->info());
823 break;
824
825 case lir_logic_and:
826 case lir_logic_or:
827 case lir_logic_xor:
828 logic_op(
829 op->code(),
830 op->in_opr1(),
831 op->in_opr2(),
832 op->result_opr());
833 break;
834
835 case lir_throw:
836 throw_op(op->in_opr1(), op->in_opr2(), op->info());
837 break;
838
839 case lir_xadd:
840 case lir_xchg:
841 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
842 break;
843
844 default:
845 Unimplemented();
846 break;
847 }
848 }
849
850 void LIR_Assembler::emit_op4(LIR_Op4* op) {
851 switch(op->code()) {
852 case lir_cmove:
853 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type(), op->in_opr3(), op->in_opr4());
854 break;
855
856 default:
857 Unimplemented();
858 break;
859 }
860 }
861
862 void LIR_Assembler::build_frame() {
863 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()),
864 needs_stack_repair(), method()->has_scalarized_args(), &_verified_inline_entry);
865 }
866
867
868 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
869 if (src->is_register()) {
870 if (dest->is_register()) {
871 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
872 reg2reg(src, dest);
873 } else if (dest->is_stack()) {
874 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
875 reg2stack(src, dest, type);
876 } else if (dest->is_address()) {
877 reg2mem(src, dest, type, patch_code, info, wide);
878 } else {
879 ShouldNotReachHere();
880 }
881
882 } else if (src->is_stack()) {
883 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
884 if (dest->is_register()) {
885 stack2reg(src, dest, type);
886 } else if (dest->is_stack()) {
887 stack2stack(src, dest, type);
888 } else {
889 ShouldNotReachHere();
890 }
891
892 } else if (src->is_constant()) {
893 if (dest->is_register()) {
894 const2reg(src, dest, patch_code, info); // patching is possible
895 } else if (dest->is_stack()) {
896 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
897 const2stack(src, dest);
898 } else if (dest->is_address()) {
899 assert(patch_code == lir_patch_none, "no patching allowed here");
900 const2mem(src, dest, type, info, wide);
901 } else {
902 ShouldNotReachHere();
903 }
904
905 } else if (src->is_address()) {
906 mem2reg(src, dest, type, patch_code, info, wide);
907 } else {
908 ShouldNotReachHere();
909 }
910 }
911
912
913 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
914 #ifndef PRODUCT
915 if (VerifyOops) {
916 OopMapStream s(info->oop_map());
917 while (!s.is_done()) {
918 OopMapValue v = s.current();
919 if (v.is_oop()) {
920 VMReg r = v.reg();
921 if (!r->is_stack()) {
922 _masm->verify_oop(r->as_Register());
923 } else {
924 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
925 }
926 }
927 check_codespace();
928 CHECK_BAILOUT();
929
930 s.next();
931 }
932 }
933 #endif
934 }