1 /*
2 * Copyright (c) 2000, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_InstructionPrinter.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_MacroAssembler.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciInlineKlass.hpp"
34 #include "ci/ciInstance.hpp"
35 #include "compiler/compilerDefinitions.inline.hpp"
36 #include "compiler/oopMap.hpp"
37 #include "runtime/os.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/vm_version.hpp"
40
41 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
42 // We must have enough patching space so that call can be inserted.
43 // We cannot use fat nops here, since the concurrent code rewrite may transiently
44 // create the illegal instruction sequence.
45 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
46 _masm->nop();
47 }
48 info->set_force_reexecute();
49 patch->install(_masm, patch_code, obj, info);
50 append_code_stub(patch);
51
52 #ifdef ASSERT
53 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
54 if (patch->id() == PatchingStub::access_field_id) {
55 switch (code) {
56 case Bytecodes::_putstatic:
57 case Bytecodes::_getstatic:
58 case Bytecodes::_putfield:
59 case Bytecodes::_getfield:
60 break;
61 default:
62 ShouldNotReachHere();
63 }
64 } else if (patch->id() == PatchingStub::load_klass_id) {
65 switch (code) {
66 case Bytecodes::_new:
67 case Bytecodes::_anewarray:
68 case Bytecodes::_multianewarray:
69 case Bytecodes::_instanceof:
70 case Bytecodes::_checkcast:
71 break;
72 default:
73 ShouldNotReachHere();
74 }
75 } else if (patch->id() == PatchingStub::load_mirror_id) {
76 switch (code) {
77 case Bytecodes::_putstatic:
78 case Bytecodes::_getstatic:
79 case Bytecodes::_ldc:
80 case Bytecodes::_ldc_w:
81 case Bytecodes::_ldc2_w:
82 break;
83 default:
84 ShouldNotReachHere();
85 }
86 } else if (patch->id() == PatchingStub::load_appendix_id) {
87 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
88 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
89 } else {
90 ShouldNotReachHere();
91 }
92 #endif
93 }
94
95 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
96 IRScope* scope = info->scope();
97 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
98 if (Bytecodes::has_optional_appendix(bc_raw)) {
99 return PatchingStub::load_appendix_id;
100 }
101 return PatchingStub::load_mirror_id;
102 }
103
104 //---------------------------------------------------------------
105
106
107 LIR_Assembler::LIR_Assembler(Compilation* c):
108 _masm(c->masm())
109 , _compilation(c)
110 , _frame_map(c->frame_map())
111 , _current_block(nullptr)
112 , _pending_non_safepoint(nullptr)
113 , _pending_non_safepoint_offset(0)
114 , _immediate_oops_patched(0)
115 {
116 _slow_case_stubs = new CodeStubList();
117 }
118
119
120 LIR_Assembler::~LIR_Assembler() {
121 // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
122 // Reset it here to avoid an assertion.
123 _unwind_handler_entry.reset();
124 _verified_inline_entry.reset();
125 }
126
127
128 void LIR_Assembler::check_codespace() {
129 CodeSection* cs = _masm->code_section();
130 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
131 BAILOUT("CodeBuffer overflow");
132 }
133 }
134
135
136 void LIR_Assembler::append_code_stub(CodeStub* stub) {
137 _immediate_oops_patched += stub->nr_immediate_oops_patched();
138 _slow_case_stubs->append(stub);
139 }
140
141 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
142 for (int m = 0; m < stub_list->length(); m++) {
143 CodeStub* s = stub_list->at(m);
144
145 check_codespace();
146 CHECK_BAILOUT();
147
148 #ifndef PRODUCT
149 if (CommentedAssembly) {
150 stringStream st;
151 s->print_name(&st);
152 st.print(" slow case");
153 _masm->block_comment(st.freeze());
154 }
155 #endif
156 s->emit_code(this);
157 #ifdef ASSERT
158 s->assert_no_unbound_labels();
159 #endif
160 }
161 }
162
163
164 void LIR_Assembler::emit_slow_case_stubs() {
165 emit_stubs(_slow_case_stubs);
166 }
167
168
169 bool LIR_Assembler::needs_icache(ciMethod* method) const {
170 return !method->is_static();
171 }
172
173 bool LIR_Assembler::needs_clinit_barrier_on_entry(ciMethod* method) const {
174 return VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier();
175 }
176
177 int LIR_Assembler::code_offset() const {
178 return _masm->offset();
179 }
180
181
182 address LIR_Assembler::pc() const {
183 return _masm->pc();
184 }
185
186 // To bang the stack of this compiled method we use the stack size
187 // that the interpreter would need in case of a deoptimization. This
188 // removes the need to bang the stack in the deoptimization blob which
189 // in turn simplifies stack overflow handling.
190 int LIR_Assembler::bang_size_in_bytes() const {
191 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
192 }
193
194 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
195 for (int i = 0; i < info_list->length(); i++) {
196 XHandlers* handlers = info_list->at(i)->exception_handlers();
197
198 for (int j = 0; j < handlers->length(); j++) {
199 XHandler* handler = handlers->handler_at(j);
200 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
201 assert(handler->entry_code() == nullptr ||
202 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
203 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
204
205 if (handler->entry_pco() == -1) {
206 // entry code not emitted yet
207 if (handler->entry_code() != nullptr && handler->entry_code()->instructions_list()->length() > 1) {
208 handler->set_entry_pco(code_offset());
209 if (CommentedAssembly) {
210 _masm->block_comment("Exception adapter block");
211 }
212 emit_lir_list(handler->entry_code());
213 } else {
214 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
215 }
216
217 assert(handler->entry_pco() != -1, "must be set now");
218 }
219 }
220 }
221 }
222
223
224 void LIR_Assembler::emit_code(BlockList* hir) {
225 if (PrintLIR) {
226 print_LIR(hir);
227 }
228
229 int n = hir->length();
230 for (int i = 0; i < n; i++) {
231 emit_block(hir->at(i));
232 CHECK_BAILOUT();
233 }
234
235 flush_debug_info(code_offset());
236
237 DEBUG_ONLY(check_no_unbound_labels());
238 }
239
240
241 void LIR_Assembler::emit_block(BlockBegin* block) {
242 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
243 align_backward_branch_target();
244 }
245
246 // if this block is the start of an exception handler, record the
247 // PC offset of the first instruction for later construction of
248 // the ExceptionHandlerTable
249 if (block->is_set(BlockBegin::exception_entry_flag)) {
250 block->set_exception_handler_pco(code_offset());
251 }
252
253 #ifndef PRODUCT
254 if (PrintLIRWithAssembly) {
255 // don't print Phi's
256 InstructionPrinter ip(false);
257 block->print(ip);
258 }
259 #endif /* PRODUCT */
260
261 assert(block->lir() != nullptr, "must have LIR");
262 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
263
264 #ifndef PRODUCT
265 if (CommentedAssembly) {
266 stringStream st;
267 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
268 _masm->block_comment(st.freeze());
269 }
270 #endif
271
272 emit_lir_list(block->lir());
273
274 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
275 }
276
277
278 void LIR_Assembler::emit_lir_list(LIR_List* list) {
279 peephole(list);
280
281 int n = list->length();
282 for (int i = 0; i < n; i++) {
283 LIR_Op* op = list->at(i);
284
285 check_codespace();
286 CHECK_BAILOUT();
287
288 #ifndef PRODUCT
289 if (CommentedAssembly) {
290 // Don't record out every op since that's too verbose. Print
291 // branches since they include block and stub names. Also print
292 // patching moves since they generate funny looking code.
293 if (op->code() == lir_branch ||
294 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
295 (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
296 stringStream st;
297 op->print_on(&st);
298 _masm->block_comment(st.freeze());
299 }
300 }
301 if (PrintLIRWithAssembly) {
302 // print out the LIR operation followed by the resulting assembly
303 list->at(i)->print(); tty->cr();
304 }
305 #endif /* PRODUCT */
306
307 op->emit_code(this);
308
309 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
310 process_debug_info(op);
311 }
312
313 #ifndef PRODUCT
314 if (PrintLIRWithAssembly) {
315 _masm->code()->decode();
316 }
317 #endif /* PRODUCT */
318 }
319 }
320
321 #ifdef ASSERT
322 void LIR_Assembler::check_no_unbound_labels() {
323 CHECK_BAILOUT();
324
325 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
326 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
327 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
328 assert(false, "unbound label");
329 }
330 }
331 }
332 #endif
333
334 //----------------------------------debug info--------------------------------
335
336 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
337 int pc_offset = code_offset();
338 flush_debug_info(pc_offset);
339 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
340 if (info->exception_handlers() != nullptr) {
341 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
342 }
343 }
344
345 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool maybe_return_as_fields) {
346 flush_debug_info(pc_offset);
347 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset, maybe_return_as_fields);
348 if (cinfo->exception_handlers() != nullptr) {
349 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
350 }
351 }
352
353 static ValueStack* debug_info(Instruction* ins) {
354 StateSplit* ss = ins->as_StateSplit();
355 if (ss != nullptr) return ss->state();
356 return ins->state_before();
357 }
358
359 void LIR_Assembler::process_debug_info(LIR_Op* op) {
360 Instruction* src = op->source();
361 if (src == nullptr) return;
362 int pc_offset = code_offset();
363 if (_pending_non_safepoint == src) {
364 _pending_non_safepoint_offset = pc_offset;
365 return;
366 }
367 ValueStack* vstack = debug_info(src);
368 if (vstack == nullptr) return;
369 if (_pending_non_safepoint != nullptr) {
370 // Got some old debug info. Get rid of it.
371 if (debug_info(_pending_non_safepoint) == vstack) {
372 _pending_non_safepoint_offset = pc_offset;
373 return;
374 }
375 if (_pending_non_safepoint_offset < pc_offset) {
376 record_non_safepoint_debug_info();
377 }
378 _pending_non_safepoint = nullptr;
379 }
380 // Remember the debug info.
381 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
382 _pending_non_safepoint = src;
383 _pending_non_safepoint_offset = pc_offset;
384 }
385 }
386
387 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
388 // Return null if n is too large.
389 // Returns the caller_bci for the next-younger state, also.
390 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
391 ValueStack* t = s;
392 for (int i = 0; i < n; i++) {
393 if (t == nullptr) break;
394 t = t->caller_state();
395 }
396 if (t == nullptr) return nullptr;
397 for (;;) {
398 ValueStack* tc = t->caller_state();
399 if (tc == nullptr) return s;
400 t = tc;
401 bci_result = tc->bci();
402 s = s->caller_state();
403 }
404 }
405
406 void LIR_Assembler::record_non_safepoint_debug_info() {
407 int pc_offset = _pending_non_safepoint_offset;
408 ValueStack* vstack = debug_info(_pending_non_safepoint);
409 int bci = vstack->bci();
410
411 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
412 assert(debug_info->recording_non_safepoints(), "sanity");
413
414 debug_info->add_non_safepoint(pc_offset);
415
416 // Visit scopes from oldest to youngest.
417 for (int n = 0; ; n++) {
418 int s_bci = bci;
419 ValueStack* s = nth_oldest(vstack, n, s_bci);
420 if (s == nullptr) break;
421 IRScope* scope = s->scope();
422 //Always pass false for reexecute since these ScopeDescs are never used for deopt
423 methodHandle null_mh;
424 debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
425 }
426
427 debug_info->end_non_safepoint(pc_offset);
428 }
429
430
431 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
432 return add_debug_info_for_null_check(code_offset(), cinfo);
433 }
434
435 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
436 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
437 append_code_stub(stub);
438 return stub;
439 }
440
441 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
442 add_debug_info_for_div0(code_offset(), info);
443 }
444
445 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
446 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
447 append_code_stub(stub);
448 }
449
450 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
451 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
452 }
453
454 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
455 verify_oop_map(op->info());
456
457 // must align calls sites, otherwise they can't be updated atomically
458 align_call(op->code());
459
460 if (CodeBuffer::supports_shared_stubs() && op->method()->can_be_statically_bound()) {
461 // Calls of the same statically bound method can share
462 // a stub to the interpreter.
463 CodeBuffer::csize_t call_offset = pc() - _masm->code()->insts_begin();
464 _masm->code()->shared_stub_to_interp_for(op->method(), call_offset);
465 } else {
466 emit_static_call_stub();
467 }
468 CHECK_BAILOUT();
469
470 switch (op->code()) {
471 case lir_static_call:
472 case lir_dynamic_call:
473 call(op, relocInfo::static_call_type);
474 break;
475 case lir_optvirtual_call:
476 call(op, relocInfo::opt_virtual_call_type);
477 break;
478 case lir_icvirtual_call:
479 ic_call(op);
480 break;
481 default:
482 fatal("unexpected op code: %s", op->name());
483 break;
484 }
485
486 // JSR 292
487 // Record if this method has MethodHandle invokes.
488 if (op->is_method_handle_invoke()) {
489 compilation()->set_has_method_handle_invokes(true);
490 }
491
492 ciInlineKlass* vk = nullptr;
493 if (op->maybe_return_as_fields(&vk)) {
494 int offset = store_inline_type_fields_to_buf(vk);
495 add_call_info(offset, op->info(), true);
496 }
497
498 #if defined(IA32) && defined(COMPILER2)
499 // C2 leave fpu stack dirty clean it
500 if (UseSSE < 2 && !CompilerConfig::is_c1_only_no_jvmci()) {
501 int i;
502 for ( i = 1; i <= 7 ; i++ ) {
503 ffree(i);
504 }
505 if (!op->result_opr()->is_float_kind()) {
506 ffree(0);
507 }
508 }
509 #endif // IA32 && COMPILER2
510 }
511
512
513 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
514 _masm->bind (*(op->label()));
515 }
516
517
518 void LIR_Assembler::emit_op1(LIR_Op1* op) {
519 switch (op->code()) {
520 case lir_move:
521 if (op->move_kind() == lir_move_volatile) {
522 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
523 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
524 } else {
525 move_op(op->in_opr(), op->result_opr(), op->type(),
526 op->patch_code(), op->info(), op->pop_fpu_stack(),
527 op->move_kind() == lir_move_wide);
528 }
529 break;
530
531 case lir_roundfp: {
532 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
533 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
534 break;
535 }
536
537 case lir_return: {
538 assert(op->as_OpReturn() != nullptr, "sanity");
539 LIR_OpReturn *ret_op = (LIR_OpReturn*)op;
540 return_op(ret_op->in_opr(), ret_op->stub());
541 if (ret_op->stub() != nullptr) {
542 append_code_stub(ret_op->stub());
543 }
544 break;
545 }
546
547 case lir_safepoint:
548 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
549 _masm->nop();
550 }
551 safepoint_poll(op->in_opr(), op->info());
552 break;
553
554 #ifdef IA32
555 case lir_fxch:
556 fxch(op->in_opr()->as_jint());
557 break;
558
559 case lir_fld:
560 fld(op->in_opr()->as_jint());
561 break;
562 #endif // IA32
563
564 case lir_branch:
565 break;
566
567 case lir_push:
568 push(op->in_opr());
569 break;
570
571 case lir_pop:
572 pop(op->in_opr());
573 break;
574
575 case lir_leal:
576 leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
577 break;
578
579 case lir_null_check: {
580 ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
581
582 if (op->in_opr()->is_single_cpu()) {
583 _masm->null_check(op->in_opr()->as_register(), stub->entry());
584 } else {
585 Unimplemented();
586 }
587 break;
588 }
589
590 case lir_monaddr:
591 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
592 break;
593
594 case lir_unwind:
595 unwind_op(op->in_opr());
596 break;
597
598 default:
599 Unimplemented();
600 break;
601 }
602 }
603
604 void LIR_Assembler::add_scalarized_entry_info(int pc_offset) {
605 flush_debug_info(pc_offset);
606 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
607 // The VEP and VIEP(RO) of a C1-compiled method call buffer_inline_args_xxx()
608 // before doing any argument shuffling. This call may cause GC. When GC happens,
609 // all the parameters are still as passed by the caller, so we just use
610 // map->set_include_argument_oops() inside frame::sender_for_compiled_frame(RegisterMap* map).
611 // There's no need to build a GC map here.
612 OopMap* oop_map = new OopMap(0, 0);
613 debug_info->add_safepoint(pc_offset, oop_map);
614 DebugToken* locvals = debug_info->create_scope_values(nullptr); // FIXME is this needed (for Java debugging to work properly??)
615 DebugToken* expvals = debug_info->create_scope_values(nullptr); // FIXME is this needed (for Java debugging to work properly??)
616 DebugToken* monvals = debug_info->create_monitor_values(nullptr); // FIXME: need testing with synchronized method
617 bool reexecute = false;
618 bool return_oop = false; // This flag will be ignored since it used only for C2 with escape analysis.
619 bool rethrow_exception = false;
620 bool is_method_handle_invoke = false;
621 debug_info->describe_scope(pc_offset, methodHandle(), method(), 0, reexecute, rethrow_exception, is_method_handle_invoke, return_oop, false, locvals, expvals, monvals);
622 debug_info->end_safepoint(pc_offset);
623 }
624
625 // The entries points of C1-compiled methods can have the following types:
626 // (1) Methods with no inline type args
627 // (2) Methods with inline type receiver but no inline type args
628 // VIEP_RO is the same as VIEP
629 // (3) Methods with non-inline type receiver and some inline type args
630 // VIEP_RO is the same as VEP
631 // (4) Methods with inline type receiver and other inline type args
632 // Separate VEP, VIEP and VIEP_RO
633 //
634 // (1) (2) (3) (4)
635 // UEP/UIEP: VEP: UEP: UEP:
636 // check_icache pack receiver check_icache check_icache
637 // VEP/VIEP/VIEP_RO jump to VIEP VEP/VIEP_RO: VIEP_RO:
638 // body UEP/UIEP: pack inline args pack inline args (except receiver)
639 // check_icache jump to VIEP jump to VIEP
640 // VIEP/VIEP_RO UIEP: VEP:
641 // body check_icache pack all inline args
642 // VIEP: jump to VIEP
643 // body UIEP:
644 // check_icache
645 // VIEP:
646 // body
647 void LIR_Assembler::emit_std_entries() {
648 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
649
650 _masm->align(CodeEntryAlignment);
651 const CompiledEntrySignature* ces = compilation()->compiled_entry_signature();
652 if (ces->has_scalarized_args()) {
653 assert(InlineTypePassFieldsAsArgs && method()->get_Method()->has_scalarized_args(), "must be");
654 CodeOffsets::Entries ro_entry_type = ces->c1_inline_ro_entry_type();
655
656 // UEP: check icache and fall-through
657 if (ro_entry_type != CodeOffsets::Verified_Inline_Entry) {
658 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
659 if (needs_icache(method())) {
660 check_icache();
661 }
662 }
663
664 // VIEP_RO: pack all value parameters, except the receiver
665 if (ro_entry_type == CodeOffsets::Verified_Inline_Entry_RO) {
666 emit_std_entry(CodeOffsets::Verified_Inline_Entry_RO, ces);
667 }
668
669 // VEP: pack all value parameters
670 _masm->align(CodeEntryAlignment);
671 emit_std_entry(CodeOffsets::Verified_Entry, ces);
672
673 // UIEP: check icache and fall-through
674 _masm->align(CodeEntryAlignment);
675 offsets()->set_value(CodeOffsets::Inline_Entry, _masm->offset());
676 if (ro_entry_type == CodeOffsets::Verified_Inline_Entry) {
677 // Special case if we have VIEP == VIEP(RO):
678 // this means UIEP (called by C1) == UEP (called by C2).
679 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
680 }
681 if (needs_icache(method())) {
682 check_icache();
683 }
684
685 // VIEP: all value parameters are passed as refs - no packing.
686 emit_std_entry(CodeOffsets::Verified_Inline_Entry, nullptr);
687
688 if (ro_entry_type != CodeOffsets::Verified_Inline_Entry_RO) {
689 // The VIEP(RO) is the same as VEP or VIEP
690 assert(ro_entry_type == CodeOffsets::Verified_Entry ||
691 ro_entry_type == CodeOffsets::Verified_Inline_Entry, "must be");
692 offsets()->set_value(CodeOffsets::Verified_Inline_Entry_RO,
693 offsets()->value(ro_entry_type));
694 }
695 } else {
696 // All 3 entries are the same (no inline type packing)
697 offsets()->set_value(CodeOffsets::Entry, _masm->offset());
698 offsets()->set_value(CodeOffsets::Inline_Entry, _masm->offset());
699 if (needs_icache(method())) {
700 check_icache();
701 }
702 emit_std_entry(CodeOffsets::Verified_Inline_Entry, nullptr);
703 offsets()->set_value(CodeOffsets::Verified_Entry, offsets()->value(CodeOffsets::Verified_Inline_Entry));
704 offsets()->set_value(CodeOffsets::Verified_Inline_Entry_RO, offsets()->value(CodeOffsets::Verified_Inline_Entry));
705 }
706 }
707
708 void LIR_Assembler::emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces) {
709 offsets()->set_value(entry, _masm->offset());
710 _masm->verified_entry(compilation()->directive()->BreakAtExecuteOption);
711 switch (entry) {
712 case CodeOffsets::Verified_Entry: {
713 if (needs_clinit_barrier_on_entry(method())) {
714 clinit_barrier(method());
715 }
716 int rt_call_offset = _masm->verified_entry(ces, initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()), _verified_inline_entry);
717 add_scalarized_entry_info(rt_call_offset);
718 break;
719 }
720 case CodeOffsets::Verified_Inline_Entry_RO: {
721 assert(!needs_clinit_barrier_on_entry(method()), "can't be static");
722 int rt_call_offset = _masm->verified_inline_ro_entry(ces, initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()), _verified_inline_entry);
723 add_scalarized_entry_info(rt_call_offset);
724 break;
725 }
726 case CodeOffsets::Verified_Inline_Entry: {
727 if (needs_clinit_barrier_on_entry(method())) {
728 clinit_barrier(method());
729 }
730 build_frame();
731 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
732 break;
733 }
734 default:
735 ShouldNotReachHere();
736 break;
737 }
738 }
739
740 void LIR_Assembler::emit_op0(LIR_Op0* op) {
741 switch (op->code()) {
742 case lir_nop:
743 assert(op->info() == nullptr, "not supported");
744 _masm->nop();
745 break;
746
747 case lir_label:
748 Unimplemented();
749 break;
750
751 case lir_std_entry:
752 emit_std_entries();
753 break;
754
755 case lir_osr_entry:
756 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
757 osr_entry();
758 break;
759
760 #ifdef IA32
761 case lir_fpop_raw:
762 fpop();
763 break;
764 #endif // IA32
765
766 case lir_breakpoint:
767 breakpoint();
768 break;
769
770 case lir_membar:
771 membar();
772 break;
773
774 case lir_membar_acquire:
775 membar_acquire();
776 break;
777
778 case lir_membar_release:
779 membar_release();
780 break;
781
782 case lir_membar_loadload:
783 membar_loadload();
784 break;
785
786 case lir_membar_storestore:
787 membar_storestore();
788 break;
789
790 case lir_membar_loadstore:
791 membar_loadstore();
792 break;
793
794 case lir_membar_storeload:
795 membar_storeload();
796 break;
797
798 case lir_get_thread:
799 get_thread(op->result_opr());
800 break;
801
802 case lir_on_spin_wait:
803 on_spin_wait();
804 break;
805
806 case lir_check_orig_pc:
807 check_orig_pc();
808 break;
809
810 default:
811 ShouldNotReachHere();
812 break;
813 }
814 }
815
816
817 void LIR_Assembler::emit_op2(LIR_Op2* op) {
818 switch (op->code()) {
819 case lir_cmp:
820 if (op->info() != nullptr) {
821 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
822 "shouldn't be codeemitinfo for non-address operands");
823 add_debug_info_for_null_check_here(op->info()); // exception possible
824 }
825 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
826 break;
827
828 case lir_cmp_l2i:
829 case lir_cmp_fd2i:
830 case lir_ucmp_fd2i:
831 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
832 break;
833
834 case lir_shl:
835 case lir_shr:
836 case lir_ushr:
837 if (op->in_opr2()->is_constant()) {
838 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
839 } else {
840 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
841 }
842 break;
843
844 case lir_add:
845 case lir_sub:
846 case lir_mul:
847 case lir_div:
848 case lir_rem:
849 assert(op->fpu_pop_count() < 2, "");
850 arith_op(
851 op->code(),
852 op->in_opr1(),
853 op->in_opr2(),
854 op->result_opr(),
855 op->info(),
856 op->fpu_pop_count() == 1);
857 break;
858
859 case lir_abs:
860 case lir_sqrt:
861 case lir_tan:
862 case lir_log10:
863 case lir_f2hf:
864 case lir_hf2f:
865 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
866 break;
867
868 case lir_neg:
869 negate(op->in_opr1(), op->result_opr(), op->in_opr2());
870 break;
871
872 case lir_logic_and:
873 case lir_logic_or:
874 case lir_logic_xor:
875 logic_op(
876 op->code(),
877 op->in_opr1(),
878 op->in_opr2(),
879 op->result_opr());
880 break;
881
882 case lir_throw:
883 throw_op(op->in_opr1(), op->in_opr2(), op->info());
884 break;
885
886 case lir_xadd:
887 case lir_xchg:
888 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
889 break;
890
891 default:
892 Unimplemented();
893 break;
894 }
895 }
896
897 void LIR_Assembler::emit_op4(LIR_Op4* op) {
898 switch(op->code()) {
899 case lir_cmove:
900 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type(), op->in_opr3(), op->in_opr4());
901 break;
902
903 default:
904 Unimplemented();
905 break;
906 }
907 }
908
909 void LIR_Assembler::build_frame() {
910 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes(), in_bytes(frame_map()->sp_offset_for_orig_pc()),
911 needs_stack_repair(), method()->has_scalarized_args(), &_verified_inline_entry);
912 }
913
914
915 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
916 assert(strict_fp_requires_explicit_rounding, "not required");
917 assert((src->is_single_fpu() && dest->is_single_stack()) ||
918 (src->is_double_fpu() && dest->is_double_stack()),
919 "round_fp: rounds register -> stack location");
920
921 reg2stack (src, dest, src->type(), pop_fpu_stack);
922 }
923
924
925 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
926 if (src->is_register()) {
927 if (dest->is_register()) {
928 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
929 reg2reg(src, dest);
930 } else if (dest->is_stack()) {
931 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
932 reg2stack(src, dest, type, pop_fpu_stack);
933 } else if (dest->is_address()) {
934 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide);
935 } else {
936 ShouldNotReachHere();
937 }
938
939 } else if (src->is_stack()) {
940 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
941 if (dest->is_register()) {
942 stack2reg(src, dest, type);
943 } else if (dest->is_stack()) {
944 stack2stack(src, dest, type);
945 } else {
946 ShouldNotReachHere();
947 }
948
949 } else if (src->is_constant()) {
950 if (dest->is_register()) {
951 const2reg(src, dest, patch_code, info); // patching is possible
952 } else if (dest->is_stack()) {
953 assert(patch_code == lir_patch_none && info == nullptr, "no patching and info allowed here");
954 const2stack(src, dest);
955 } else if (dest->is_address()) {
956 assert(patch_code == lir_patch_none, "no patching allowed here");
957 const2mem(src, dest, type, info, wide);
958 } else {
959 ShouldNotReachHere();
960 }
961
962 } else if (src->is_address()) {
963 mem2reg(src, dest, type, patch_code, info, wide);
964 } else {
965 ShouldNotReachHere();
966 }
967 }
968
969
970 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
971 #ifndef PRODUCT
972 if (VerifyOops) {
973 OopMapStream s(info->oop_map());
974 while (!s.is_done()) {
975 OopMapValue v = s.current();
976 if (v.is_oop()) {
977 VMReg r = v.reg();
978 if (!r->is_stack()) {
979 _masm->verify_oop(r->as_Register());
980 } else {
981 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
982 }
983 }
984 check_codespace();
985 CHECK_BAILOUT();
986
987 s.next();
988 }
989 }
990 #endif
991 }