1 /*
2 * Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_C1_C1_LIRASSEMBLER_HPP
26 #define SHARE_C1_C1_LIRASSEMBLER_HPP
27
28 #include "c1/c1_CodeStubs.hpp"
29 #include "ci/ciMethodData.hpp"
30 #include "oops/methodData.hpp"
31 #include "utilities/macros.hpp"
32
33 class Compilation;
34 class CompiledEntrySignature;
35 class ScopeValue;
36
37 class LIR_Assembler: public CompilationResourceObj {
38 private:
39 C1_MacroAssembler* _masm;
40 CodeStubList* _slow_case_stubs;
41
42 Compilation* _compilation;
43 FrameMap* _frame_map;
44 BlockBegin* _current_block;
45
46 Instruction* _pending_non_safepoint;
47 int _pending_non_safepoint_offset;
48 int _immediate_oops_patched;
49
50 Label _unwind_handler_entry;
51 Label _verified_inline_entry;
52
53 #ifdef ASSERT
54 BlockList _branch_target_blocks;
55 void check_no_unbound_labels();
56 #endif
57
58 FrameMap* frame_map() const { return _frame_map; }
59
60 void set_current_block(BlockBegin* b) { _current_block = b; }
61 BlockBegin* current_block() const { return _current_block; }
62
63 // non-safepoint debug info management
64 void flush_debug_info(int before_pc_offset) {
65 if (_pending_non_safepoint != nullptr) {
66 if (_pending_non_safepoint_offset < before_pc_offset)
67 record_non_safepoint_debug_info();
68 _pending_non_safepoint = nullptr;
69 }
70 }
71 void process_debug_info(LIR_Op* op);
72 void record_non_safepoint_debug_info();
73
74 // unified bailout support
75 void bailout(const char* msg) const { compilation()->bailout(msg); }
76 bool bailed_out() const { return compilation()->bailed_out(); }
77
78 // code emission patterns and accessors
79 void check_codespace();
80 bool needs_icache(ciMethod* method) const;
81
82 // returns offset of icache check
83 int check_icache();
84
85 bool needs_clinit_barrier_on_entry(ciMethod* method) const;
86 void clinit_barrier(ciMethod* method);
87
88 void jobject2reg(jobject o, Register reg);
89 void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
90
91 void metadata2reg(Metadata* o, Register reg);
92 void klass2reg_with_patching(Register reg, CodeEmitInfo* info);
93
94 void emit_stubs(CodeStubList* stub_list);
95
96 bool needs_stack_repair() const {
97 return compilation()->needs_stack_repair();
98 }
99
100 public:
101 // addresses
102 Address as_Address(LIR_Address* addr);
103 Address as_Address_lo(LIR_Address* addr);
104 Address as_Address_hi(LIR_Address* addr);
105
106 // debug information
107 void add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool maybe_return_as_fields = false);
108 void add_debug_info_for_branch(CodeEmitInfo* info);
109 void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
110 void add_debug_info_for_div0_here(CodeEmitInfo* info);
111 ImplicitNullCheckStub* add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
112 ImplicitNullCheckStub* add_debug_info_for_null_check_here(CodeEmitInfo* info);
113
114 private:
115 void breakpoint();
116 void push(LIR_Opr opr);
117 void pop(LIR_Opr opr);
118
119 // patching
120 void append_patching_stub(PatchingStub* stub);
121 void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
122
123 void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
124
125 PatchingStub::PatchID patching_id(CodeEmitInfo* info);
126
127 public:
128 LIR_Assembler(Compilation* c);
129 ~LIR_Assembler();
130 C1_MacroAssembler* masm() const { return _masm; }
131 Compilation* compilation() const { return _compilation; }
132 ciMethod* method() const { return compilation()->method(); }
133
134 CodeOffsets* offsets() const { return _compilation->offsets(); }
135 int code_offset() const;
136 address pc() const;
137
138 int initial_frame_size_in_bytes() const;
139 int bang_size_in_bytes() const;
140
141 // test for constants which can be encoded directly in instructions
142 static bool is_small_constant(LIR_Opr opr);
143
144 static LIR_Opr receiverOpr();
145 static LIR_Opr osrBufferPointer();
146
147 // stubs
148 void emit_slow_case_stubs();
149 void emit_static_call_stub();
150 void append_code_stub(CodeStub* op);
151 void add_call_info_here(CodeEmitInfo* info) { add_call_info(code_offset(), info); }
152
153 // code patterns
154 int emit_exception_handler();
155 int emit_unwind_handler();
156 void emit_exception_entries(ExceptionInfoList* info_list);
157 int emit_deopt_handler();
158
159 void emit_code(BlockList* hir);
160 void emit_block(BlockBegin* block);
161 void emit_lir_list(LIR_List* list);
162
163 // any last minute peephole optimizations are performed here. In
164 // particular sparc uses this for delay slot filling.
165 void peephole(LIR_List* list);
166
167 void return_op(LIR_Opr result, C1SafepointPollStub* code_stub);
168
169 // returns offset of poll instruction
170 int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
171
172 void const2reg (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
173 void const2stack(LIR_Opr src, LIR_Opr dest);
174 void const2mem (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide);
175 void reg2stack (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
176 void reg2reg (LIR_Opr src, LIR_Opr dest);
177 void reg2mem (LIR_Opr src, LIR_Opr dest, BasicType type,
178 LIR_PatchCode patch_code, CodeEmitInfo* info,
179 bool pop_fpu_stack, bool wide);
180 void stack2reg (LIR_Opr src, LIR_Opr dest, BasicType type);
181 void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
182 void mem2reg (LIR_Opr src, LIR_Opr dest, BasicType type,
183 LIR_PatchCode patch_code,
184 CodeEmitInfo* info, bool wide);
185
186 void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
187 void shift_op(LIR_Code code, LIR_Opr left, jint count, LIR_Opr dest);
188
189 void move_regs(Register from_reg, Register to_reg);
190 void swap_reg(Register a, Register b);
191
192 void emit_op0(LIR_Op0* op);
193 void emit_op1(LIR_Op1* op);
194 void emit_op2(LIR_Op2* op);
195 void emit_op3(LIR_Op3* op);
196 void emit_op4(LIR_Op4* op);
197 void emit_opBranch(LIR_OpBranch* op);
198 void emit_opLabel(LIR_OpLabel* op);
199 void emit_arraycopy(LIR_OpArrayCopy* op);
200 void emit_updatecrc32(LIR_OpUpdateCRC32* op);
201 void emit_opConvert(LIR_OpConvert* op);
202 void emit_alloc_obj(LIR_OpAllocObj* op);
203 void emit_alloc_array(LIR_OpAllocArray* op);
204 void emit_opTypeCheck(LIR_OpTypeCheck* op);
205 void emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op);
206 void emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op);
207 void emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op);
208 void emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null);
209 void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
210 void emit_lock(LIR_OpLock* op);
211 void emit_load_klass(LIR_OpLoadKlass* op);
212 void emit_call(LIR_OpJavaCall* op);
213 void emit_rtcall(LIR_OpRTCall* op);
214 void emit_profile_call(LIR_OpProfileCall* op);
215 void emit_profile_type(LIR_OpProfileType* op);
216 void emit_profile_inline_type(LIR_OpProfileInlineType* op);
217 void emit_delay(LIR_OpDelay* op);
218 void emit_std_entries();
219 void emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces);
220 void add_scalarized_entry_info(int call_offset);
221
222 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
223 void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
224 void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
225 #ifdef ASSERT
226 void emit_assert(LIR_OpAssert* op);
227 #endif
228
229 void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
230
231 void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
232 void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
233 LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide);
234 void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
235 void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info); // info set for null exceptions
236 void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
237 void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type,
238 LIR_Opr cmp_opr1 = LIR_OprFact::illegalOpr, LIR_Opr cmp_opr2 = LIR_OprFact::illegalOpr);
239 void call( LIR_OpJavaCall* op, relocInfo::relocType rtype);
240 void ic_call( LIR_OpJavaCall* op);
241 void vtable_call( LIR_OpJavaCall* op);
242 int store_inline_type_fields_to_buf(ciInlineKlass* vk);
243
244 void osr_entry();
245
246 void build_frame();
247
248 void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
249 void unwind_op(LIR_Opr exceptionOop);
250 void monitor_address(int monitor_ix, LIR_Opr dst);
251
252 void align_backward_branch_target();
253 void align_call(LIR_Code code);
254
255 void negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp = LIR_OprFact::illegalOpr);
256 void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = nullptr);
257
258 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
259
260 void membar();
261 void membar_acquire();
262 void membar_release();
263 void membar_loadload();
264 void membar_storestore();
265 void membar_loadstore();
266 void membar_storeload();
267 void on_spin_wait();
268 void get_thread(LIR_Opr result);
269 void check_orig_pc();
270
271 void verify_oop_map(CodeEmitInfo* info);
272
273 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
274
275 #include CPU_HEADER(c1_LIRAssembler)
276
277 public:
278 int nr_immediate_oops_patched() const { return _immediate_oops_patched; }
279
280 static int call_stub_size() {
281 return _call_stub_size;
282 }
283
284 static int exception_handler_size() {
285 return _exception_handler_size;
286 }
287
288 static int deopt_handler_size() {
289 return _deopt_handler_size;
290 }
291 };
292
293 #endif // SHARE_C1_C1_LIRASSEMBLER_HPP