1 /*
  2  * Copyright (c) 2000, 2021, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #ifndef SHARE_C1_C1_LIRASSEMBLER_HPP
 26 #define SHARE_C1_C1_LIRASSEMBLER_HPP
 27 
 28 #include "c1/c1_CodeStubs.hpp"
 29 #include "ci/ciMethodData.hpp"
 30 #include "oops/methodData.hpp"
 31 #include "utilities/macros.hpp"
 32 
 33 class Compilation;
 34 class CompiledEntrySignature;
 35 class ScopeValue;
 36 class BarrierSet;
 37 
 38 class LIR_Assembler: public CompilationResourceObj {
 39  private:
 40   C1_MacroAssembler* _masm;
 41   CodeStubList*      _slow_case_stubs;
 42   BarrierSet*        _bs;
 43 
 44   Compilation*       _compilation;
 45   FrameMap*          _frame_map;
 46   BlockBegin*        _current_block;
 47 
 48   Instruction*       _pending_non_safepoint;
 49   int                _pending_non_safepoint_offset;
 50 
 51   Label              _unwind_handler_entry;
 52   Label              _verified_inline_entry;
 53 
 54 #ifdef ASSERT
 55   BlockList          _branch_target_blocks;
 56   void check_no_unbound_labels();
 57 #endif
 58 
 59   FrameMap* frame_map() const { return _frame_map; }
 60 
 61   void set_current_block(BlockBegin* b) { _current_block = b; }
 62   BlockBegin* current_block() const { return _current_block; }
 63 
 64   // non-safepoint debug info management
 65   void flush_debug_info(int before_pc_offset) {
 66     if (_pending_non_safepoint != NULL) {
 67       if (_pending_non_safepoint_offset < before_pc_offset)
 68         record_non_safepoint_debug_info();
 69       _pending_non_safepoint = NULL;
 70     }
 71   }
 72   void process_debug_info(LIR_Op* op);
 73   void record_non_safepoint_debug_info();
 74 
 75   // unified bailout support
 76   void bailout(const char* msg) const { compilation()->bailout(msg); }
 77   bool bailed_out() const                        { return compilation()->bailed_out(); }
 78 
 79   // code emission patterns and accessors
 80   void check_codespace();
 81   bool needs_icache(ciMethod* method) const;
 82 
 83   // returns offset of icache check
 84   int check_icache();
 85 
 86   bool needs_clinit_barrier_on_entry(ciMethod* method) const;
 87   void clinit_barrier(ciMethod* method);
 88 
 89   void jobject2reg(jobject o, Register reg);
 90   void jobject2reg_with_patching(Register reg, CodeEmitInfo* info);
 91 
 92   void metadata2reg(Metadata* o, Register reg);
 93   void klass2reg_with_patching(Register reg, CodeEmitInfo* info);
 94 
 95   void emit_stubs(CodeStubList* stub_list);
 96 
 97   bool needs_stack_repair() const {
 98     return compilation()->needs_stack_repair();
 99   }
100 
101   // addresses
102   Address as_Address(LIR_Address* addr);
103   Address as_Address_lo(LIR_Address* addr);
104   Address as_Address_hi(LIR_Address* addr);
105 
106   // debug information
107   void add_call_info(int pc_offset, CodeEmitInfo* cinfo, bool maybe_return_as_fields = false);
108   void add_debug_info_for_branch(CodeEmitInfo* info);
109   void add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo);
110   void add_debug_info_for_div0_here(CodeEmitInfo* info);
111   ImplicitNullCheckStub* add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo);
112   ImplicitNullCheckStub* add_debug_info_for_null_check_here(CodeEmitInfo* info);
113 
114   void breakpoint();
115   void push(LIR_Opr opr);
116   void pop(LIR_Opr opr);
117 
118   // patching
119   void append_patching_stub(PatchingStub* stub);
120   void patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info);
121 
122   void comp_op(LIR_Condition condition, LIR_Opr src, LIR_Opr result, LIR_Op2* op);
123 
124   PatchingStub::PatchID patching_id(CodeEmitInfo* info);
125 
126  public:
127   LIR_Assembler(Compilation* c);
128   ~LIR_Assembler();
129   C1_MacroAssembler* masm() const                { return _masm; }
130   Compilation* compilation() const               { return _compilation; }
131   ciMethod* method() const                       { return compilation()->method(); }
132 
133   CodeOffsets* offsets() const                   { return _compilation->offsets(); }
134   int code_offset() const;
135   address pc() const;
136 
137   int  initial_frame_size_in_bytes() const;
138   int  bang_size_in_bytes() const;
139 
140   // test for constants which can be encoded directly in instructions
141   static bool is_small_constant(LIR_Opr opr);
142 
143   static LIR_Opr receiverOpr();
144   static LIR_Opr osrBufferPointer();
145 
146   // stubs
147   void emit_slow_case_stubs();
148   void emit_static_call_stub();
149   void append_code_stub(CodeStub* op);
150   void add_call_info_here(CodeEmitInfo* info)                              { add_call_info(code_offset(), info); }
151 
152   // code patterns
153   int  emit_exception_handler();
154   int  emit_unwind_handler();
155   void emit_exception_entries(ExceptionInfoList* info_list);
156   int  emit_deopt_handler();
157 
158   void emit_code(BlockList* hir);
159   void emit_block(BlockBegin* block);
160   void emit_lir_list(LIR_List* list);
161 
162   // any last minute peephole optimizations are performed here.  In
163   // particular sparc uses this for delay slot filling.
164   void peephole(LIR_List* list);
165 
166   void return_op(LIR_Opr result, C1SafepointPollStub* code_stub);
167 
168   // returns offset of poll instruction
169   int safepoint_poll(LIR_Opr result, CodeEmitInfo* info);
170 
171   void const2reg  (LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info);
172   void const2stack(LIR_Opr src, LIR_Opr dest);
173   void const2mem  (LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info, bool wide);
174   void reg2stack  (LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack);
175   void reg2reg    (LIR_Opr src, LIR_Opr dest);
176   void reg2mem    (LIR_Opr src, LIR_Opr dest, BasicType type,
177                    LIR_PatchCode patch_code, CodeEmitInfo* info,
178                    bool pop_fpu_stack, bool wide);
179   void stack2reg  (LIR_Opr src, LIR_Opr dest, BasicType type);
180   void stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type);
181   void mem2reg    (LIR_Opr src, LIR_Opr dest, BasicType type,
182                    LIR_PatchCode patch_code,
183                    CodeEmitInfo* info, bool wide);
184 
185   void shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp);
186   void shift_op(LIR_Code code, LIR_Opr left, jint  count, LIR_Opr dest);
187 
188   void move_regs(Register from_reg, Register to_reg);
189   void swap_reg(Register a, Register b);
190 
191   void emit_op0(LIR_Op0* op);
192   void emit_op1(LIR_Op1* op);
193   void emit_op2(LIR_Op2* op);
194   void emit_op3(LIR_Op3* op);
195   void emit_opBranch(LIR_OpBranch* op);
196   void emit_opLabel(LIR_OpLabel* op);
197   void emit_arraycopy(LIR_OpArrayCopy* op);
198   void emit_updatecrc32(LIR_OpUpdateCRC32* op);
199   void emit_opConvert(LIR_OpConvert* op);
200   void emit_alloc_obj(LIR_OpAllocObj* op);
201   void emit_alloc_array(LIR_OpAllocArray* op);
202   void emit_opTypeCheck(LIR_OpTypeCheck* op);
203   void emit_opFlattenedArrayCheck(LIR_OpFlattenedArrayCheck* op);
204   void emit_opNullFreeArrayCheck(LIR_OpNullFreeArrayCheck* op);
205   void emit_opSubstitutabilityCheck(LIR_OpSubstitutabilityCheck* op);
206   void emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null);
207   void emit_compare_and_swap(LIR_OpCompareAndSwap* op);
208   void emit_lock(LIR_OpLock* op);
209   void emit_call(LIR_OpJavaCall* op);
210   void emit_rtcall(LIR_OpRTCall* op);
211   void emit_profile_call(LIR_OpProfileCall* op);
212   void emit_profile_type(LIR_OpProfileType* op);
213   void emit_profile_inline_type(LIR_OpProfileInlineType* op);
214   void emit_delay(LIR_OpDelay* op);
215   void emit_std_entries();
216   void emit_std_entry(CodeOffsets::Entries entry, const CompiledEntrySignature* ces);
217   void add_scalarized_entry_info(int call_offset);
218 
219   void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
220   void arithmetic_idiv(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr temp, LIR_Opr result, CodeEmitInfo* info);
221   void intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr unused, LIR_Opr dest, LIR_Op* op);
222 #ifdef ASSERT
223   void emit_assert(LIR_OpAssert* op);
224 #endif
225 
226   void logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest);
227 
228   void roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack);
229   void move_op(LIR_Opr src, LIR_Opr result, BasicType type,
230                LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide);
231   void volatile_move_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);
232   void comp_mem_op(LIR_Opr src, LIR_Opr result, BasicType type, CodeEmitInfo* info);  // info set for null exceptions
233   void comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr result, LIR_Op2* op);
234   void cmove(LIR_Condition code, LIR_Opr left, LIR_Opr right, LIR_Opr result, BasicType type);
235 
236   void call(        LIR_OpJavaCall* op, relocInfo::relocType rtype);
237   void ic_call(     LIR_OpJavaCall* op);
238   void vtable_call( LIR_OpJavaCall* op);
239   int  store_inline_type_fields_to_buf(ciInlineKlass* vk);
240 
241   void osr_entry();
242 
243   void build_frame();
244 
245   void throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info);
246   void unwind_op(LIR_Opr exceptionOop);
247   void monitor_address(int monitor_ix, LIR_Opr dst);
248 
249   void align_backward_branch_target();
250   void align_call(LIR_Code code);
251 
252   void negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp = LIR_OprFact::illegalOpr);
253   void leal(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL);
254 
255   void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
256 
257   void membar();
258   void membar_acquire();
259   void membar_release();
260   void membar_loadload();
261   void membar_storestore();
262   void membar_loadstore();
263   void membar_storeload();
264   void on_spin_wait();
265   void get_thread(LIR_Opr result);
266   void check_orig_pc();
267 
268   void verify_oop_map(CodeEmitInfo* info);
269 
270   void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
271 
272 #include CPU_HEADER(c1_LIRAssembler)
273 
274  public:
275 
276   static int call_stub_size() {
277     return _call_stub_size;
278   }
279 
280   static int exception_handler_size() {
281     return _exception_handler_size;
282   }
283 
284   static int deopt_handler_size() {
285     return _deopt_handler_size;
286   }
287 };
288 
289 #endif // SHARE_C1_C1_LIRASSEMBLER_HPP