1 /*
   2  * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "gc/shared/c2/barrierSetC2.hpp"
  27 #include "opto/arraycopynode.hpp"
  28 #include "opto/convertnode.hpp"
  29 #include "opto/graphKit.hpp"
  30 #include "opto/idealKit.hpp"
  31 #include "opto/macro.hpp"
  32 #include "opto/narrowptrnode.hpp"
  33 #include "utilities/macros.hpp"
  34 
  35 // By default this is a no-op.
  36 void BarrierSetC2::resolve_address(C2Access& access) const { }
  37 
  38 void* C2ParseAccess::barrier_set_state() const {
  39   return _kit->barrier_set_state();
  40 }
  41 
  42 PhaseGVN& C2ParseAccess::gvn() const { return _kit->gvn(); }
  43 
  44 Node* C2ParseAccess::control() const {
  45   return _ctl == NULL ? _kit->control() : _ctl;
  46 }
  47 
  48 bool C2Access::needs_cpu_membar() const {
  49   bool mismatched = (_decorators & C2_MISMATCHED) != 0;
  50   bool is_unordered = (_decorators & MO_UNORDERED) != 0;
  51   bool anonymous = (_decorators & C2_UNSAFE_ACCESS) != 0;
  52   bool in_heap = (_decorators & IN_HEAP) != 0;
  53 
  54   bool is_write = (_decorators & C2_WRITE_ACCESS) != 0;
  55   bool is_read = (_decorators & C2_READ_ACCESS) != 0;
  56   bool is_atomic = is_read && is_write;
  57 
  58   if (is_atomic) {
  59     // Atomics always need to be wrapped in CPU membars
  60     return true;
  61   }
  62 
  63   if (anonymous) {
  64     // We will need memory barriers unless we can determine a unique
  65     // alias category for this reference.  (Note:  If for some reason
  66     // the barriers get omitted and the unsafe reference begins to "pollute"
  67     // the alias analysis of the rest of the graph, either Compile::can_alias
  68     // or Compile::must_alias will throw a diagnostic assert.)
  69     if (!in_heap || !is_unordered || (mismatched && !_addr.type()->isa_aryptr())) {
  70       return true;
  71     }
  72   }
  73 
  74   return false;
  75 }
  76 
  77 Node* BarrierSetC2::store_at_resolved(C2Access& access, C2AccessValue& val) const {
  78   DecoratorSet decorators = access.decorators();
  79 
  80   bool mismatched = (decorators & C2_MISMATCHED) != 0;
  81   bool unaligned = (decorators & C2_UNALIGNED) != 0;
  82   bool unsafe = (decorators & C2_UNSAFE_ACCESS) != 0;
  83   bool requires_atomic_access = (decorators & MO_UNORDERED) == 0;
  84 
  85   bool in_native = (decorators & IN_NATIVE) != 0;
  86   assert(!in_native, "not supported yet");
  87 
  88   MemNode::MemOrd mo = access.mem_node_mo();
  89 
  90   Node* store;
  91   if (access.is_parse_access()) {
  92     C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
  93 
  94     GraphKit* kit = parse_access.kit();
  95     if (access.type() == T_DOUBLE) {
  96       Node* new_val = kit->dstore_rounding(val.node());
  97       val.set_node(new_val);
  98     }
  99 
 100     store = kit->store_to_memory(kit->control(), access.addr().node(), val.node(), access.type(),
 101                                      access.addr().type(), mo, requires_atomic_access, unaligned, mismatched, unsafe);
 102     access.set_raw_access(store);
 103   } else {
 104     assert(!requires_atomic_access, "not yet supported");
 105     assert(access.is_opt_access(), "either parse or opt access");
 106     C2OptAccess& opt_access = static_cast<C2OptAccess&>(access);
 107     Node* ctl = opt_access.ctl();
 108     MergeMemNode* mm = opt_access.mem();
 109     PhaseGVN& gvn = opt_access.gvn();
 110     const TypePtr* adr_type = access.addr().type();
 111     int alias = gvn.C->get_alias_index(adr_type);
 112     Node* mem = mm->memory_at(alias);
 113 
 114     StoreNode* st = StoreNode::make(gvn, ctl, mem, access.addr().node(), adr_type, val.node(), access.type(), mo);
 115     if (unaligned) {
 116       st->set_unaligned_access();
 117     }
 118     if (mismatched) {
 119       st->set_mismatched_access();
 120     }
 121     store = gvn.transform(st);
 122     if (store == st) {
 123       mm->set_memory_at(alias, st);
 124     }
 125   }
 126   return store;
 127 }
 128 
 129 Node* BarrierSetC2::load_at_resolved(C2Access& access, const Type* val_type) const {
 130   DecoratorSet decorators = access.decorators();
 131 
 132   Node* adr = access.addr().node();
 133   const TypePtr* adr_type = access.addr().type();
 134 
 135   bool mismatched = (decorators & C2_MISMATCHED) != 0;
 136   bool requires_atomic_access = (decorators & MO_UNORDERED) == 0;
 137   bool unaligned = (decorators & C2_UNALIGNED) != 0;
 138   bool control_dependent = (decorators & C2_CONTROL_DEPENDENT_LOAD) != 0;
 139   bool pinned = (decorators & C2_PINNED_LOAD) != 0;
 140   bool unsafe = (decorators & C2_UNSAFE_ACCESS) != 0;
 141 
 142   bool in_native = (decorators & IN_NATIVE) != 0;
 143 
 144   MemNode::MemOrd mo = access.mem_node_mo();
 145   LoadNode::ControlDependency dep = pinned ? LoadNode::Pinned : LoadNode::DependsOnlyOnTest;
 146 
 147   Node* load;
 148   if (access.is_parse_access()) {
 149     C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
 150     GraphKit* kit = parse_access.kit();
 151     Node* control = control_dependent ? parse_access.control() : NULL;
 152 
 153     if (in_native) {
 154       load = kit->make_load(control, adr, val_type, access.type(), mo);
 155     } else {
 156       load = kit->make_load(control, adr, val_type, access.type(), adr_type, mo,
 157                             dep, requires_atomic_access, unaligned, mismatched, unsafe);
 158     }
 159     access.set_raw_access(load);
 160   } else {
 161     assert(!requires_atomic_access, "not yet supported");
 162     assert(access.is_opt_access(), "either parse or opt access");
 163     C2OptAccess& opt_access = static_cast<C2OptAccess&>(access);
 164     Node* control = control_dependent ? opt_access.ctl() : NULL;
 165     MergeMemNode* mm = opt_access.mem();
 166     PhaseGVN& gvn = opt_access.gvn();
 167     Node* mem = mm->memory_at(gvn.C->get_alias_index(adr_type));
 168     load = LoadNode::make(gvn, control, mem, adr, adr_type, val_type, access.type(), mo, dep, unaligned, mismatched);
 169     load = gvn.transform(load);
 170   }
 171 
 172   return load;
 173 }
 174 
 175 class C2AccessFence: public StackObj {
 176   C2Access& _access;
 177   Node* _leading_membar;
 178 
 179 public:
 180   C2AccessFence(C2Access& access) :
 181     _access(access), _leading_membar(NULL) {
 182     GraphKit* kit = NULL;
 183     if (access.is_parse_access()) {
 184       C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
 185       kit = parse_access.kit();
 186     }
 187     DecoratorSet decorators = access.decorators();
 188 
 189     bool is_write = (decorators & C2_WRITE_ACCESS) != 0;
 190     bool is_read = (decorators & C2_READ_ACCESS) != 0;
 191     bool is_atomic = is_read && is_write;
 192 
 193     bool is_volatile = (decorators & MO_SEQ_CST) != 0;
 194     bool is_release = (decorators & MO_RELEASE) != 0;
 195 
 196     if (is_atomic) {
 197       assert(kit != NULL, "unsupported at optimization time");
 198       // Memory-model-wise, a LoadStore acts like a little synchronized
 199       // block, so needs barriers on each side.  These don't translate
 200       // into actual barriers on most machines, but we still need rest of
 201       // compiler to respect ordering.
 202       if (is_release) {
 203         _leading_membar = kit->insert_mem_bar(Op_MemBarRelease);
 204       } else if (is_volatile) {
 205         if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
 206           _leading_membar = kit->insert_mem_bar(Op_MemBarVolatile);
 207         } else {
 208           _leading_membar = kit->insert_mem_bar(Op_MemBarRelease);
 209         }
 210       }
 211     } else if (is_write) {
 212       // If reference is volatile, prevent following memory ops from
 213       // floating down past the volatile write.  Also prevents commoning
 214       // another volatile read.
 215       if (is_volatile || is_release) {
 216         assert(kit != NULL, "unsupported at optimization time");
 217         _leading_membar = kit->insert_mem_bar(Op_MemBarRelease);
 218       }
 219     } else {
 220       // Memory barrier to prevent normal and 'unsafe' accesses from
 221       // bypassing each other.  Happens after null checks, so the
 222       // exception paths do not take memory state from the memory barrier,
 223       // so there's no problems making a strong assert about mixing users
 224       // of safe & unsafe memory.
 225       if (is_volatile && support_IRIW_for_not_multiple_copy_atomic_cpu) {
 226         assert(kit != NULL, "unsupported at optimization time");
 227         _leading_membar = kit->insert_mem_bar(Op_MemBarVolatile);
 228       }
 229     }
 230 
 231     if (access.needs_cpu_membar()) {
 232       assert(kit != NULL, "unsupported at optimization time");
 233       kit->insert_mem_bar(Op_MemBarCPUOrder);
 234     }
 235 
 236     if (is_atomic) {
 237       // 4984716: MemBars must be inserted before this
 238       //          memory node in order to avoid a false
 239       //          dependency which will confuse the scheduler.
 240       access.set_memory();
 241     }
 242   }
 243 
 244   ~C2AccessFence() {
 245     GraphKit* kit = NULL;
 246     if (_access.is_parse_access()) {
 247       C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(_access);
 248       kit = parse_access.kit();
 249     }
 250     DecoratorSet decorators = _access.decorators();
 251 
 252     bool is_write = (decorators & C2_WRITE_ACCESS) != 0;
 253     bool is_read = (decorators & C2_READ_ACCESS) != 0;
 254     bool is_atomic = is_read && is_write;
 255 
 256     bool is_volatile = (decorators & MO_SEQ_CST) != 0;
 257     bool is_acquire = (decorators & MO_ACQUIRE) != 0;
 258 
 259     // If reference is volatile, prevent following volatiles ops from
 260     // floating up before the volatile access.
 261     if (_access.needs_cpu_membar()) {
 262       kit->insert_mem_bar(Op_MemBarCPUOrder);
 263     }
 264 
 265     if (is_atomic) {
 266       assert(kit != NULL, "unsupported at optimization time");
 267       if (is_acquire || is_volatile) {
 268         Node* n = _access.raw_access();
 269         Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n);
 270         if (_leading_membar != NULL) {
 271           MemBarNode::set_load_store_pair(_leading_membar->as_MemBar(), mb->as_MemBar());
 272         }
 273       }
 274     } else if (is_write) {
 275       // If not multiple copy atomic, we do the MemBarVolatile before the load.
 276       if (is_volatile && !support_IRIW_for_not_multiple_copy_atomic_cpu) {
 277         assert(kit != NULL, "unsupported at optimization time");
 278         Node* n = _access.raw_access();
 279         Node* mb = kit->insert_mem_bar(Op_MemBarVolatile, n); // Use fat membar
 280         if (_leading_membar != NULL) {
 281           MemBarNode::set_store_pair(_leading_membar->as_MemBar(), mb->as_MemBar());
 282         }
 283       }
 284     } else {
 285       if (is_volatile || is_acquire) {
 286         assert(kit != NULL, "unsupported at optimization time");
 287         Node* n = _access.raw_access();
 288         assert(_leading_membar == NULL || support_IRIW_for_not_multiple_copy_atomic_cpu, "no leading membar expected");
 289         Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n);
 290         mb->as_MemBar()->set_trailing_load();
 291       }
 292     }
 293   }
 294 };
 295 
 296 Node* BarrierSetC2::store_at(C2Access& access, C2AccessValue& val) const {
 297   C2AccessFence fence(access);
 298   resolve_address(access);
 299   return store_at_resolved(access, val);
 300 }
 301 
 302 Node* BarrierSetC2::load_at(C2Access& access, const Type* val_type) const {
 303   C2AccessFence fence(access);
 304   resolve_address(access);
 305   return load_at_resolved(access, val_type);
 306 }
 307 
 308 MemNode::MemOrd C2Access::mem_node_mo() const {
 309   bool is_write = (_decorators & C2_WRITE_ACCESS) != 0;
 310   bool is_read = (_decorators & C2_READ_ACCESS) != 0;
 311   if ((_decorators & MO_SEQ_CST) != 0) {
 312     if (is_write && is_read) {
 313       // For atomic operations
 314       return MemNode::seqcst;
 315     } else if (is_write) {
 316       return MemNode::release;
 317     } else {
 318       assert(is_read, "what else?");
 319       return MemNode::acquire;
 320     }
 321   } else if ((_decorators & MO_RELEASE) != 0) {
 322     return MemNode::release;
 323   } else if ((_decorators & MO_ACQUIRE) != 0) {
 324     return MemNode::acquire;
 325   } else if (is_write) {
 326     // Volatile fields need releasing stores.
 327     // Non-volatile fields also need releasing stores if they hold an
 328     // object reference, because the object reference might point to
 329     // a freshly created object.
 330     // Conservatively release stores of object references.
 331     return StoreNode::release_if_reference(_type);
 332   } else {
 333     return MemNode::unordered;
 334   }
 335 }
 336 
 337 void C2Access::fixup_decorators() {
 338   bool default_mo = (_decorators & MO_DECORATOR_MASK) == 0;
 339   bool is_unordered = (_decorators & MO_UNORDERED) != 0 || default_mo;
 340   bool anonymous = (_decorators & C2_UNSAFE_ACCESS) != 0;
 341 
 342   bool is_read = (_decorators & C2_READ_ACCESS) != 0;
 343   bool is_write = (_decorators & C2_WRITE_ACCESS) != 0;
 344 
 345   if (AlwaysAtomicAccesses && is_unordered) {
 346     _decorators &= ~MO_DECORATOR_MASK; // clear the MO bits
 347     _decorators |= MO_RELAXED; // Force the MO_RELAXED decorator with AlwaysAtomicAccess
 348   }
 349 
 350   _decorators = AccessInternal::decorator_fixup(_decorators);
 351 
 352   if (is_read && !is_write && anonymous) {
 353     // To be valid, unsafe loads may depend on other conditions than
 354     // the one that guards them: pin the Load node
 355     _decorators |= C2_CONTROL_DEPENDENT_LOAD;
 356     _decorators |= C2_PINNED_LOAD;
 357     const TypePtr* adr_type = _addr.type();
 358     Node* adr = _addr.node();
 359     if (!needs_cpu_membar() && adr_type->isa_instptr()) {
 360       assert(adr_type->meet(TypePtr::NULL_PTR) != adr_type->remove_speculative(), "should be not null");
 361       intptr_t offset = Type::OffsetBot;
 362       AddPNode::Ideal_base_and_offset(adr, &gvn(), offset);
 363       if (offset >= 0) {
 364         int s = Klass::layout_helper_size_in_bytes(adr_type->isa_instptr()->klass()->layout_helper());
 365         if (offset < s) {
 366           // Guaranteed to be a valid access, no need to pin it
 367           _decorators ^= C2_CONTROL_DEPENDENT_LOAD;
 368           _decorators ^= C2_PINNED_LOAD;
 369         }
 370       }
 371     }
 372   }
 373 }
 374 
 375 //--------------------------- atomic operations---------------------------------
 376 
 377 void BarrierSetC2::pin_atomic_op(C2AtomicParseAccess& access) const {
 378   if (!access.needs_pinning()) {
 379     return;
 380   }
 381   // SCMemProjNodes represent the memory state of a LoadStore. Their
 382   // main role is to prevent LoadStore nodes from being optimized away
 383   // when their results aren't used.
 384   assert(access.is_parse_access(), "entry not supported at optimization time");
 385   C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
 386   GraphKit* kit = parse_access.kit();
 387   Node* load_store = access.raw_access();
 388   assert(load_store != NULL, "must pin atomic op");
 389   Node* proj = kit->gvn().transform(new SCMemProjNode(load_store));
 390   kit->set_memory(proj, access.alias_idx());
 391 }
 392 
 393 void C2AtomicParseAccess::set_memory() {
 394   Node *mem = _kit->memory(_alias_idx);
 395   _memory = mem;
 396 }
 397 
 398 Node* BarrierSetC2::atomic_cmpxchg_val_at_resolved(C2AtomicParseAccess& access, Node* expected_val,
 399                                                    Node* new_val, const Type* value_type) const {
 400   GraphKit* kit = access.kit();
 401   MemNode::MemOrd mo = access.mem_node_mo();
 402   Node* mem = access.memory();
 403 
 404   Node* adr = access.addr().node();
 405   const TypePtr* adr_type = access.addr().type();
 406 
 407   Node* load_store = NULL;
 408 
 409   if (access.is_oop()) {
 410 #ifdef _LP64
 411     if (adr->bottom_type()->is_ptr_to_narrowoop()) {
 412       Node *newval_enc = kit->gvn().transform(new EncodePNode(new_val, new_val->bottom_type()->make_narrowoop()));
 413       Node *oldval_enc = kit->gvn().transform(new EncodePNode(expected_val, expected_val->bottom_type()->make_narrowoop()));
 414       load_store = kit->gvn().transform(new CompareAndExchangeNNode(kit->control(), mem, adr, newval_enc, oldval_enc, adr_type, value_type->make_narrowoop(), mo));
 415     } else
 416 #endif
 417     {
 418       load_store = kit->gvn().transform(new CompareAndExchangePNode(kit->control(), mem, adr, new_val, expected_val, adr_type, value_type->is_oopptr(), mo));
 419     }
 420   } else {
 421     switch (access.type()) {
 422       case T_BYTE: {
 423         load_store = kit->gvn().transform(new CompareAndExchangeBNode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo));
 424         break;
 425       }
 426       case T_SHORT: {
 427         load_store = kit->gvn().transform(new CompareAndExchangeSNode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo));
 428         break;
 429       }
 430       case T_INT: {
 431         load_store = kit->gvn().transform(new CompareAndExchangeINode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo));
 432         break;
 433       }
 434       case T_LONG: {
 435         load_store = kit->gvn().transform(new CompareAndExchangeLNode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo));
 436         break;
 437       }
 438       default:
 439         ShouldNotReachHere();
 440     }
 441   }
 442 
 443   access.set_raw_access(load_store);
 444   pin_atomic_op(access);
 445 
 446 #ifdef _LP64
 447   if (access.is_oop() && adr->bottom_type()->is_ptr_to_narrowoop()) {
 448     return kit->gvn().transform(new DecodeNNode(load_store, load_store->get_ptr_type()));
 449   }
 450 #endif
 451 
 452   return load_store;
 453 }
 454 
 455 Node* BarrierSetC2::atomic_cmpxchg_bool_at_resolved(C2AtomicParseAccess& access, Node* expected_val,
 456                                                     Node* new_val, const Type* value_type) const {
 457   GraphKit* kit = access.kit();
 458   DecoratorSet decorators = access.decorators();
 459   MemNode::MemOrd mo = access.mem_node_mo();
 460   Node* mem = access.memory();
 461   bool is_weak_cas = (decorators & C2_WEAK_CMPXCHG) != 0;
 462   Node* load_store = NULL;
 463   Node* adr = access.addr().node();
 464 
 465   if (access.is_oop()) {
 466 #ifdef _LP64
 467     if (adr->bottom_type()->is_ptr_to_narrowoop()) {
 468       Node *newval_enc = kit->gvn().transform(new EncodePNode(new_val, new_val->bottom_type()->make_narrowoop()));
 469       Node *oldval_enc = kit->gvn().transform(new EncodePNode(expected_val, expected_val->bottom_type()->make_narrowoop()));
 470       if (is_weak_cas) {
 471         load_store = kit->gvn().transform(new WeakCompareAndSwapNNode(kit->control(), mem, adr, newval_enc, oldval_enc, mo));
 472       } else {
 473         load_store = kit->gvn().transform(new CompareAndSwapNNode(kit->control(), mem, adr, newval_enc, oldval_enc, mo));
 474       }
 475     } else
 476 #endif
 477     {
 478       if (is_weak_cas) {
 479         load_store = kit->gvn().transform(new WeakCompareAndSwapPNode(kit->control(), mem, adr, new_val, expected_val, mo));
 480       } else {
 481         load_store = kit->gvn().transform(new CompareAndSwapPNode(kit->control(), mem, adr, new_val, expected_val, mo));
 482       }
 483     }
 484   } else {
 485     switch(access.type()) {
 486       case T_BYTE: {
 487         if (is_weak_cas) {
 488           load_store = kit->gvn().transform(new WeakCompareAndSwapBNode(kit->control(), mem, adr, new_val, expected_val, mo));
 489         } else {
 490           load_store = kit->gvn().transform(new CompareAndSwapBNode(kit->control(), mem, adr, new_val, expected_val, mo));
 491         }
 492         break;
 493       }
 494       case T_SHORT: {
 495         if (is_weak_cas) {
 496           load_store = kit->gvn().transform(new WeakCompareAndSwapSNode(kit->control(), mem, adr, new_val, expected_val, mo));
 497         } else {
 498           load_store = kit->gvn().transform(new CompareAndSwapSNode(kit->control(), mem, adr, new_val, expected_val, mo));
 499         }
 500         break;
 501       }
 502       case T_INT: {
 503         if (is_weak_cas) {
 504           load_store = kit->gvn().transform(new WeakCompareAndSwapINode(kit->control(), mem, adr, new_val, expected_val, mo));
 505         } else {
 506           load_store = kit->gvn().transform(new CompareAndSwapINode(kit->control(), mem, adr, new_val, expected_val, mo));
 507         }
 508         break;
 509       }
 510       case T_LONG: {
 511         if (is_weak_cas) {
 512           load_store = kit->gvn().transform(new WeakCompareAndSwapLNode(kit->control(), mem, adr, new_val, expected_val, mo));
 513         } else {
 514           load_store = kit->gvn().transform(new CompareAndSwapLNode(kit->control(), mem, adr, new_val, expected_val, mo));
 515         }
 516         break;
 517       }
 518       default:
 519         ShouldNotReachHere();
 520     }
 521   }
 522 
 523   access.set_raw_access(load_store);
 524   pin_atomic_op(access);
 525 
 526   return load_store;
 527 }
 528 
 529 Node* BarrierSetC2::atomic_xchg_at_resolved(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
 530   GraphKit* kit = access.kit();
 531   Node* mem = access.memory();
 532   Node* adr = access.addr().node();
 533   const TypePtr* adr_type = access.addr().type();
 534   Node* load_store = NULL;
 535 
 536   if (access.is_oop()) {
 537 #ifdef _LP64
 538     if (adr->bottom_type()->is_ptr_to_narrowoop()) {
 539       Node *newval_enc = kit->gvn().transform(new EncodePNode(new_val, new_val->bottom_type()->make_narrowoop()));
 540       load_store = kit->gvn().transform(new GetAndSetNNode(kit->control(), mem, adr, newval_enc, adr_type, value_type->make_narrowoop()));
 541     } else
 542 #endif
 543     {
 544       load_store = kit->gvn().transform(new GetAndSetPNode(kit->control(), mem, adr, new_val, adr_type, value_type->is_oopptr()));
 545     }
 546   } else  {
 547     switch (access.type()) {
 548       case T_BYTE:
 549         load_store = kit->gvn().transform(new GetAndSetBNode(kit->control(), mem, adr, new_val, adr_type));
 550         break;
 551       case T_SHORT:
 552         load_store = kit->gvn().transform(new GetAndSetSNode(kit->control(), mem, adr, new_val, adr_type));
 553         break;
 554       case T_INT:
 555         load_store = kit->gvn().transform(new GetAndSetINode(kit->control(), mem, adr, new_val, adr_type));
 556         break;
 557       case T_LONG:
 558         load_store = kit->gvn().transform(new GetAndSetLNode(kit->control(), mem, adr, new_val, adr_type));
 559         break;
 560       default:
 561         ShouldNotReachHere();
 562     }
 563   }
 564 
 565   access.set_raw_access(load_store);
 566   pin_atomic_op(access);
 567 
 568 #ifdef _LP64
 569   if (access.is_oop() && adr->bottom_type()->is_ptr_to_narrowoop()) {
 570     return kit->gvn().transform(new DecodeNNode(load_store, load_store->get_ptr_type()));
 571   }
 572 #endif
 573 
 574   return load_store;
 575 }
 576 
 577 Node* BarrierSetC2::atomic_add_at_resolved(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
 578   Node* load_store = NULL;
 579   GraphKit* kit = access.kit();
 580   Node* adr = access.addr().node();
 581   const TypePtr* adr_type = access.addr().type();
 582   Node* mem = access.memory();
 583 
 584   switch(access.type()) {
 585     case T_BYTE:
 586       load_store = kit->gvn().transform(new GetAndAddBNode(kit->control(), mem, adr, new_val, adr_type));
 587       break;
 588     case T_SHORT:
 589       load_store = kit->gvn().transform(new GetAndAddSNode(kit->control(), mem, adr, new_val, adr_type));
 590       break;
 591     case T_INT:
 592       load_store = kit->gvn().transform(new GetAndAddINode(kit->control(), mem, adr, new_val, adr_type));
 593       break;
 594     case T_LONG:
 595       load_store = kit->gvn().transform(new GetAndAddLNode(kit->control(), mem, adr, new_val, adr_type));
 596       break;
 597     default:
 598       ShouldNotReachHere();
 599   }
 600 
 601   access.set_raw_access(load_store);
 602   pin_atomic_op(access);
 603 
 604   return load_store;
 605 }
 606 
 607 Node* BarrierSetC2::atomic_cmpxchg_val_at(C2AtomicParseAccess& access, Node* expected_val,
 608                                           Node* new_val, const Type* value_type) const {
 609   C2AccessFence fence(access);
 610   resolve_address(access);
 611   return atomic_cmpxchg_val_at_resolved(access, expected_val, new_val, value_type);
 612 }
 613 
 614 Node* BarrierSetC2::atomic_cmpxchg_bool_at(C2AtomicParseAccess& access, Node* expected_val,
 615                                            Node* new_val, const Type* value_type) const {
 616   C2AccessFence fence(access);
 617   resolve_address(access);
 618   return atomic_cmpxchg_bool_at_resolved(access, expected_val, new_val, value_type);
 619 }
 620 
 621 Node* BarrierSetC2::atomic_xchg_at(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
 622   C2AccessFence fence(access);
 623   resolve_address(access);
 624   return atomic_xchg_at_resolved(access, new_val, value_type);
 625 }
 626 
 627 Node* BarrierSetC2::atomic_add_at(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
 628   C2AccessFence fence(access);
 629   resolve_address(access);
 630   return atomic_add_at_resolved(access, new_val, value_type);
 631 }
 632 
 633 void BarrierSetC2::clone(GraphKit* kit, Node* src_base, Node* dst_base, Node* countx, bool is_array) const {
 634 #ifdef ASSERT
 635   intptr_t src_offset;
 636   Node* src = AddPNode::Ideal_base_and_offset(src_base, &kit->gvn(), src_offset);
 637   intptr_t dst_offset;
 638   Node* dst = AddPNode::Ideal_base_and_offset(dst_base, &kit->gvn(), dst_offset);
 639   assert(src == NULL || (src_offset % BytesPerLong == 0), "expect 8 bytes alignment");
 640   assert(dst == NULL || (dst_offset % BytesPerLong == 0), "expect 8 bytes alignment");
 641 #endif
 642 
 643   const TypePtr* raw_adr_type = TypeRawPtr::BOTTOM;
 644 
 645   ArrayCopyNode* ac = ArrayCopyNode::make(kit, false, src_base, NULL, dst_base, NULL, countx, true, false);
 646   ac->set_clonebasic();
 647   Node* n = kit->gvn().transform(ac);
 648   if (n == ac) {
 649     ac->_adr_type = TypeRawPtr::BOTTOM;
 650     kit->set_predefined_output_for_runtime_call(ac, ac->in(TypeFunc::Memory), raw_adr_type);
 651   } else {
 652     kit->set_all_memory(n);
 653   }
 654 }
 655 
 656 Node* BarrierSetC2::obj_allocate(PhaseMacroExpand* macro, Node* ctrl, Node* mem, Node* toobig_false, Node* size_in_bytes,
 657                                  Node*& i_o, Node*& needgc_ctrl,
 658                                  Node*& fast_oop_ctrl, Node*& fast_oop_rawmem,
 659                                  intx prefetch_lines) const {
 660 
 661   Node* eden_top_adr;
 662   Node* eden_end_adr;
 663 
 664   macro->set_eden_pointers(eden_top_adr, eden_end_adr);
 665 
 666   // Load Eden::end.  Loop invariant and hoisted.
 667   //
 668   // Note: We set the control input on "eden_end" and "old_eden_top" when using
 669   //       a TLAB to work around a bug where these values were being moved across
 670   //       a safepoint.  These are not oops, so they cannot be include in the oop
 671   //       map, but they can be changed by a GC.   The proper way to fix this would
 672   //       be to set the raw memory state when generating a  SafepointNode.  However
 673   //       this will require extensive changes to the loop optimization in order to
 674   //       prevent a degradation of the optimization.
 675   //       See comment in memnode.hpp, around line 227 in class LoadPNode.
 676   Node *eden_end = macro->make_load(ctrl, mem, eden_end_adr, 0, TypeRawPtr::BOTTOM, T_ADDRESS);
 677 
 678   // We need a Region for the loop-back contended case.
 679   enum { fall_in_path = 1, contended_loopback_path = 2 };
 680   Node *contended_region;
 681   Node *contended_phi_rawmem;
 682   if (UseTLAB) {
 683     contended_region = toobig_false;
 684     contended_phi_rawmem = mem;
 685   } else {
 686     contended_region = new RegionNode(3);
 687     contended_phi_rawmem = new PhiNode(contended_region, Type::MEMORY, TypeRawPtr::BOTTOM);
 688     // Now handle the passing-too-big test.  We fall into the contended
 689     // loop-back merge point.
 690     contended_region    ->init_req(fall_in_path, toobig_false);
 691     contended_phi_rawmem->init_req(fall_in_path, mem);
 692     macro->transform_later(contended_region);
 693     macro->transform_later(contended_phi_rawmem);
 694   }
 695 
 696   // Load(-locked) the heap top.
 697   // See note above concerning the control input when using a TLAB
 698   Node *old_eden_top = UseTLAB
 699     ? new LoadPNode      (ctrl, contended_phi_rawmem, eden_top_adr, TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM, MemNode::unordered)
 700     : new LoadPLockedNode(contended_region, contended_phi_rawmem, eden_top_adr, MemNode::acquire);
 701 
 702   macro->transform_later(old_eden_top);
 703   // Add to heap top to get a new heap top
 704   Node *new_eden_top = new AddPNode(macro->top(), old_eden_top, size_in_bytes);
 705   macro->transform_later(new_eden_top);
 706   // Check for needing a GC; compare against heap end
 707   Node *needgc_cmp = new CmpPNode(new_eden_top, eden_end);
 708   macro->transform_later(needgc_cmp);
 709   Node *needgc_bol = new BoolNode(needgc_cmp, BoolTest::ge);
 710   macro->transform_later(needgc_bol);
 711   IfNode *needgc_iff = new IfNode(contended_region, needgc_bol, PROB_UNLIKELY_MAG(4), COUNT_UNKNOWN);
 712   macro->transform_later(needgc_iff);
 713 
 714   // Plug the failing-heap-space-need-gc test into the slow-path region
 715   Node *needgc_true = new IfTrueNode(needgc_iff);
 716   macro->transform_later(needgc_true);
 717   needgc_ctrl = needgc_true;
 718 
 719   // No need for a GC.  Setup for the Store-Conditional
 720   Node *needgc_false = new IfFalseNode(needgc_iff);
 721   macro->transform_later(needgc_false);
 722 
 723   i_o = macro->prefetch_allocation(i_o, needgc_false, contended_phi_rawmem,
 724                                    old_eden_top, new_eden_top, prefetch_lines);
 725 
 726   Node* fast_oop = old_eden_top;
 727 
 728   // Store (-conditional) the modified eden top back down.
 729   // StorePConditional produces flags for a test PLUS a modified raw
 730   // memory state.
 731   if (UseTLAB) {
 732     Node* store_eden_top =
 733       new StorePNode(needgc_false, contended_phi_rawmem, eden_top_adr,
 734                      TypeRawPtr::BOTTOM, new_eden_top, MemNode::unordered);
 735     macro->transform_later(store_eden_top);
 736     fast_oop_ctrl = needgc_false; // No contention, so this is the fast path
 737     fast_oop_rawmem = store_eden_top;
 738   } else {
 739     Node* store_eden_top =
 740       new StorePConditionalNode(needgc_false, contended_phi_rawmem, eden_top_adr,
 741                                 new_eden_top, fast_oop/*old_eden_top*/);
 742     macro->transform_later(store_eden_top);
 743     Node *contention_check = new BoolNode(store_eden_top, BoolTest::ne);
 744     macro->transform_later(contention_check);
 745     store_eden_top = new SCMemProjNode(store_eden_top);
 746     macro->transform_later(store_eden_top);
 747 
 748     // If not using TLABs, check to see if there was contention.
 749     IfNode *contention_iff = new IfNode (needgc_false, contention_check, PROB_MIN, COUNT_UNKNOWN);
 750     macro->transform_later(contention_iff);
 751     Node *contention_true = new IfTrueNode(contention_iff);
 752     macro->transform_later(contention_true);
 753     // If contention, loopback and try again.
 754     contended_region->init_req(contended_loopback_path, contention_true);
 755     contended_phi_rawmem->init_req(contended_loopback_path, store_eden_top);
 756 
 757     // Fast-path succeeded with no contention!
 758     Node *contention_false = new IfFalseNode(contention_iff);
 759     macro->transform_later(contention_false);
 760     fast_oop_ctrl = contention_false;
 761 
 762     // Bump total allocated bytes for this thread
 763     Node* thread = new ThreadLocalNode();
 764     macro->transform_later(thread);
 765     Node* alloc_bytes_adr = macro->basic_plus_adr(macro->top()/*not oop*/, thread,
 766                                                   in_bytes(JavaThread::allocated_bytes_offset()));
 767     Node* alloc_bytes = macro->make_load(fast_oop_ctrl, store_eden_top, alloc_bytes_adr,
 768                                          0, TypeLong::LONG, T_LONG);
 769 #ifdef _LP64
 770     Node* alloc_size = size_in_bytes;
 771 #else
 772     Node* alloc_size = new ConvI2LNode(size_in_bytes);
 773     macro->transform_later(alloc_size);
 774 #endif
 775     Node* new_alloc_bytes = new AddLNode(alloc_bytes, alloc_size);
 776     macro->transform_later(new_alloc_bytes);
 777     fast_oop_rawmem = macro->make_store(fast_oop_ctrl, store_eden_top, alloc_bytes_adr,
 778                                         0, new_alloc_bytes, T_LONG);
 779   }
 780   return fast_oop;
 781 }
 782 
 783 void BarrierSetC2::clone_barrier_at_expansion(ArrayCopyNode* ac, Node* call, PhaseIterGVN& igvn) const {
 784   // no barrier
 785   igvn.replace_node(ac, call);
 786 }