1 /*
2 * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "code/vmreg.inline.hpp"
26 #include "gc/shared/barrierSet.hpp"
27 #include "gc/shared/c2/barrierSetC2.hpp"
28 #include "gc/shared/tlab_globals.hpp"
29 #include "opto/arraycopynode.hpp"
30 #include "opto/block.hpp"
31 #include "opto/convertnode.hpp"
32 #include "opto/graphKit.hpp"
33 #include "opto/idealKit.hpp"
34 #include "opto/macro.hpp"
35 #include "opto/narrowptrnode.hpp"
36 #include "opto/output.hpp"
37 #include "opto/regalloc.hpp"
38 #include "opto/runtime.hpp"
39 #include "utilities/macros.hpp"
40 #include CPU_HEADER(gc/shared/barrierSetAssembler)
41
42 // By default this is a no-op.
43 void BarrierSetC2::resolve_address(C2Access& access) const { }
44
45 void* C2ParseAccess::barrier_set_state() const {
46 return _kit->barrier_set_state();
47 }
48
49 PhaseGVN& C2ParseAccess::gvn() const { return _kit->gvn(); }
50
51 Node* C2ParseAccess::control() const {
52 return _ctl == nullptr ? _kit->control() : _ctl;
53 }
54
55 bool C2Access::needs_cpu_membar() const {
56 bool mismatched = (_decorators & C2_MISMATCHED) != 0;
57 bool is_unordered = (_decorators & MO_UNORDERED) != 0;
58
59 bool anonymous = (_decorators & C2_UNSAFE_ACCESS) != 0;
60 bool in_heap = (_decorators & IN_HEAP) != 0;
61 bool in_native = (_decorators & IN_NATIVE) != 0;
62 bool is_mixed = !in_heap && !in_native;
63
64 bool is_write = (_decorators & C2_WRITE_ACCESS) != 0;
65 bool is_read = (_decorators & C2_READ_ACCESS) != 0;
66 bool is_atomic = is_read && is_write;
67
68 if (is_atomic) {
69 // Atomics always need to be wrapped in CPU membars
70 return true;
71 }
72
73 if (anonymous) {
74 // We will need memory barriers unless we can determine a unique
75 // alias category for this reference. (Note: If for some reason
76 // the barriers get omitted and the unsafe reference begins to "pollute"
77 // the alias analysis of the rest of the graph, either Compile::can_alias
78 // or Compile::must_alias will throw a diagnostic assert.)
79 if (is_mixed || !is_unordered || (mismatched && !_addr.type()->isa_aryptr())) {
80 return true;
81 }
82 } else {
83 assert(!is_mixed, "not unsafe");
84 }
85
86 return false;
87 }
88
89 static BarrierSetC2State* barrier_set_state() {
90 return reinterpret_cast<BarrierSetC2State*>(Compile::current()->barrier_set_state());
91 }
92
93 RegMask& BarrierStubC2::live() const {
94 return *barrier_set_state()->live(_node);
95 }
96
97 BarrierStubC2::BarrierStubC2(const MachNode* node)
98 : _node(node),
99 _entry(),
100 _continuation(),
101 _preserve(live()) {}
102
103 Label* BarrierStubC2::entry() {
104 // The _entry will never be bound when in_scratch_emit_size() is true.
105 // However, we still need to return a label that is not bound now, but
106 // will eventually be bound. Any eventually bound label will do, as it
107 // will only act as a placeholder, so we return the _continuation label.
108 return Compile::current()->output()->in_scratch_emit_size() ? &_continuation : &_entry;
109 }
110
111 Label* BarrierStubC2::continuation() {
112 return &_continuation;
113 }
114
115 uint8_t BarrierStubC2::barrier_data() const {
116 return _node->barrier_data();
117 }
118
119 void BarrierStubC2::preserve(Register r) {
120 const VMReg vm_reg = r->as_VMReg();
121 assert(vm_reg->is_Register(), "r must be a general-purpose register");
122 _preserve.insert(OptoReg::as_OptoReg(vm_reg));
123 }
124
125 void BarrierStubC2::dont_preserve(Register r) {
126 VMReg vm_reg = r->as_VMReg();
127 assert(vm_reg->is_Register(), "r must be a general-purpose register");
128 // Subtract the given register and all its sub-registers (e.g. {R11, R11_H}
129 // for r11 in aarch64).
130 do {
131 _preserve.remove(OptoReg::as_OptoReg(vm_reg));
132 vm_reg = vm_reg->next();
133 } while (vm_reg->is_Register() && !vm_reg->is_concrete());
134 }
135
136 const RegMask& BarrierStubC2::preserve_set() const {
137 return _preserve;
138 }
139
140 Node* BarrierSetC2::store_at_resolved(C2Access& access, C2AccessValue& val) const {
141 DecoratorSet decorators = access.decorators();
142
143 bool mismatched = (decorators & C2_MISMATCHED) != 0;
144 bool unaligned = (decorators & C2_UNALIGNED) != 0;
145 bool unsafe = (decorators & C2_UNSAFE_ACCESS) != 0;
146 bool requires_atomic_access = (decorators & MO_UNORDERED) == 0;
147
148 MemNode::MemOrd mo = access.mem_node_mo();
149
150 Node* store;
151 BasicType bt = access.type();
152 if (access.is_parse_access()) {
153 C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
154
155 GraphKit* kit = parse_access.kit();
156 store = kit->store_to_memory(kit->control(), access.addr().node(), val.node(), bt,
157 mo, requires_atomic_access, unaligned, mismatched,
158 unsafe, access.barrier_data());
159 } else {
160 assert(access.is_opt_access(), "either parse or opt access");
161 C2OptAccess& opt_access = static_cast<C2OptAccess&>(access);
162 Node* ctl = opt_access.ctl();
163 MergeMemNode* mm = opt_access.mem();
164 PhaseGVN& gvn = opt_access.gvn();
165 const TypePtr* adr_type = access.addr().type();
166 int alias = gvn.C->get_alias_index(adr_type);
167 Node* mem = mm->memory_at(alias);
168
169 StoreNode* st = StoreNode::make(gvn, ctl, mem, access.addr().node(), adr_type, val.node(), bt, mo, requires_atomic_access);
170 if (unaligned) {
171 st->set_unaligned_access();
172 }
173 if (mismatched) {
174 st->set_mismatched_access();
175 }
176 st->set_barrier_data(access.barrier_data());
177 store = gvn.transform(st);
178 if (store == st) {
179 mm->set_memory_at(alias, st);
180 }
181 }
182 access.set_raw_access(store);
183
184 return store;
185 }
186
187 Node* BarrierSetC2::load_at_resolved(C2Access& access, const Type* val_type) const {
188 DecoratorSet decorators = access.decorators();
189
190 Node* adr = access.addr().node();
191 const TypePtr* adr_type = access.addr().type();
192
193 bool mismatched = (decorators & C2_MISMATCHED) != 0;
194 bool requires_atomic_access = (decorators & MO_UNORDERED) == 0;
195 bool unaligned = (decorators & C2_UNALIGNED) != 0;
196 bool control_dependent = (decorators & C2_CONTROL_DEPENDENT_LOAD) != 0;
197 bool unknown_control = (decorators & C2_UNKNOWN_CONTROL_LOAD) != 0;
198 bool unsafe = (decorators & C2_UNSAFE_ACCESS) != 0;
199 bool immutable = (decorators & C2_IMMUTABLE_MEMORY) != 0;
200
201 MemNode::MemOrd mo = access.mem_node_mo();
202 LoadNode::ControlDependency dep = unknown_control ? LoadNode::UnknownControl : LoadNode::DependsOnlyOnTest;
203
204 Node* load;
205 if (access.is_parse_access()) {
206 C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
207 GraphKit* kit = parse_access.kit();
208 Node* control = control_dependent ? parse_access.control() : nullptr;
209
210 if (immutable) {
211 Compile* C = Compile::current();
212 Node* mem = kit->immutable_memory();
213 load = LoadNode::make(kit->gvn(), control, mem, adr,
214 adr_type, val_type, access.type(), mo, dep, requires_atomic_access,
215 unaligned, mismatched, unsafe, access.barrier_data());
216 load = kit->gvn().transform(load);
217 } else {
218 load = kit->make_load(control, adr, val_type, access.type(), mo,
219 dep, requires_atomic_access, unaligned, mismatched, unsafe,
220 access.barrier_data());
221 }
222 } else {
223 assert(access.is_opt_access(), "either parse or opt access");
224 C2OptAccess& opt_access = static_cast<C2OptAccess&>(access);
225 Node* control = control_dependent ? opt_access.ctl() : nullptr;
226 MergeMemNode* mm = opt_access.mem();
227 PhaseGVN& gvn = opt_access.gvn();
228 Node* mem = mm->memory_at(gvn.C->get_alias_index(adr_type));
229 load = LoadNode::make(gvn, control, mem, adr, adr_type, val_type, access.type(), mo, dep,
230 requires_atomic_access, unaligned, mismatched, unsafe, access.barrier_data());
231 load = gvn.transform(load);
232 }
233 access.set_raw_access(load);
234
235 return load;
236 }
237
238 class C2AccessFence: public StackObj {
239 C2Access& _access;
240 Node* _leading_membar;
241
242 public:
243 C2AccessFence(C2Access& access) :
244 _access(access), _leading_membar(nullptr) {
245 GraphKit* kit = nullptr;
246 if (access.is_parse_access()) {
247 C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
248 kit = parse_access.kit();
249 }
250 DecoratorSet decorators = access.decorators();
251
252 bool is_write = (decorators & C2_WRITE_ACCESS) != 0;
253 bool is_read = (decorators & C2_READ_ACCESS) != 0;
254 bool is_atomic = is_read && is_write;
255
256 bool is_volatile = (decorators & MO_SEQ_CST) != 0;
257 bool is_release = (decorators & MO_RELEASE) != 0;
258
259 if (is_atomic) {
260 assert(kit != nullptr, "unsupported at optimization time");
261 // Memory-model-wise, a LoadStore acts like a little synchronized
262 // block, so needs barriers on each side. These don't translate
263 // into actual barriers on most machines, but we still need rest of
264 // compiler to respect ordering.
265 if (is_release) {
266 _leading_membar = kit->insert_mem_bar(Op_MemBarRelease);
267 } else if (is_volatile) {
268 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
269 _leading_membar = kit->insert_mem_bar(Op_MemBarVolatile);
270 } else {
271 _leading_membar = kit->insert_mem_bar(Op_MemBarRelease);
272 }
273 }
274 } else if (is_write) {
275 // If reference is volatile, prevent following memory ops from
276 // floating down past the volatile write. Also prevents commoning
277 // another volatile read.
278 if (is_volatile || is_release) {
279 assert(kit != nullptr, "unsupported at optimization time");
280 _leading_membar = kit->insert_mem_bar(Op_MemBarRelease);
281 }
282 } else {
283 // Memory barrier to prevent normal and 'unsafe' accesses from
284 // bypassing each other. Happens after null checks, so the
285 // exception paths do not take memory state from the memory barrier,
286 // so there's no problems making a strong assert about mixing users
287 // of safe & unsafe memory.
288 if (is_volatile && support_IRIW_for_not_multiple_copy_atomic_cpu) {
289 assert(kit != nullptr, "unsupported at optimization time");
290 _leading_membar = kit->insert_mem_bar(Op_MemBarVolatile);
291 }
292 }
293
294 if (access.needs_cpu_membar()) {
295 assert(kit != nullptr, "unsupported at optimization time");
296 kit->insert_mem_bar(Op_MemBarCPUOrder);
297 }
298
299 if (is_atomic) {
300 // 4984716: MemBars must be inserted before this
301 // memory node in order to avoid a false
302 // dependency which will confuse the scheduler.
303 access.set_memory();
304 }
305 }
306
307 ~C2AccessFence() {
308 GraphKit* kit = nullptr;
309 if (_access.is_parse_access()) {
310 C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(_access);
311 kit = parse_access.kit();
312 }
313 DecoratorSet decorators = _access.decorators();
314
315 bool is_write = (decorators & C2_WRITE_ACCESS) != 0;
316 bool is_read = (decorators & C2_READ_ACCESS) != 0;
317 bool is_atomic = is_read && is_write;
318
319 bool is_volatile = (decorators & MO_SEQ_CST) != 0;
320 bool is_acquire = (decorators & MO_ACQUIRE) != 0;
321
322 // If reference is volatile, prevent following volatiles ops from
323 // floating up before the volatile access.
324 if (_access.needs_cpu_membar()) {
325 kit->insert_mem_bar(Op_MemBarCPUOrder);
326 }
327
328 if (is_atomic) {
329 assert(kit != nullptr, "unsupported at optimization time");
330 if (is_acquire || is_volatile) {
331 Node* n = _access.raw_access();
332 Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n);
333 if (_leading_membar != nullptr) {
334 MemBarNode::set_load_store_pair(_leading_membar->as_MemBar(), mb->as_MemBar());
335 }
336 }
337 } else if (is_write) {
338 // If not multiple copy atomic, we do the MemBarVolatile before the load.
339 if (is_volatile && !support_IRIW_for_not_multiple_copy_atomic_cpu) {
340 assert(kit != nullptr, "unsupported at optimization time");
341 Node* n = _access.raw_access();
342 Node* mb = kit->insert_mem_bar(Op_MemBarVolatile, n); // Use fat membar
343 if (_leading_membar != nullptr) {
344 MemBarNode::set_store_pair(_leading_membar->as_MemBar(), mb->as_MemBar());
345 }
346 }
347 } else {
348 if (is_volatile || is_acquire) {
349 assert(kit != nullptr, "unsupported at optimization time");
350 Node* n = _access.raw_access();
351 assert(_leading_membar == nullptr || support_IRIW_for_not_multiple_copy_atomic_cpu, "no leading membar expected");
352 Node* mb = kit->insert_mem_bar(Op_MemBarAcquire, n);
353 mb->as_MemBar()->set_trailing_load();
354 }
355 }
356 }
357 };
358
359 Node* BarrierSetC2::store_at(C2Access& access, C2AccessValue& val) const {
360 C2AccessFence fence(access);
361 resolve_address(access);
362 return store_at_resolved(access, val);
363 }
364
365 Node* BarrierSetC2::load_at(C2Access& access, const Type* val_type) const {
366 C2AccessFence fence(access);
367 resolve_address(access);
368 return load_at_resolved(access, val_type);
369 }
370
371 MemNode::MemOrd C2Access::mem_node_mo() const {
372 bool is_write = (_decorators & C2_WRITE_ACCESS) != 0;
373 bool is_read = (_decorators & C2_READ_ACCESS) != 0;
374 if ((_decorators & MO_SEQ_CST) != 0) {
375 if (is_write && is_read) {
376 // For atomic operations
377 return MemNode::seqcst;
378 } else if (is_write) {
379 return MemNode::release;
380 } else {
381 assert(is_read, "what else?");
382 return MemNode::acquire;
383 }
384 } else if ((_decorators & MO_RELEASE) != 0) {
385 return MemNode::release;
386 } else if ((_decorators & MO_ACQUIRE) != 0) {
387 return MemNode::acquire;
388 } else if (is_write) {
389 // Volatile fields need releasing stores.
390 // Non-volatile fields also need releasing stores if they hold an
391 // object reference, because the object reference might point to
392 // a freshly created object.
393 // Conservatively release stores of object references.
394 return StoreNode::release_if_reference(_type);
395 } else {
396 return MemNode::unordered;
397 }
398 }
399
400 void C2Access::fixup_decorators() {
401 bool default_mo = (_decorators & MO_DECORATOR_MASK) == 0;
402 bool anonymous = (_decorators & C2_UNSAFE_ACCESS) != 0;
403
404 bool is_read = (_decorators & C2_READ_ACCESS) != 0;
405 bool is_write = (_decorators & C2_WRITE_ACCESS) != 0;
406
407 _decorators = AccessInternal::decorator_fixup(_decorators, _type);
408
409 if (is_read && !is_write && anonymous) {
410 // To be valid, unsafe loads may depend on other conditions than
411 // the one that guards them: pin the Load node
412 _decorators |= C2_CONTROL_DEPENDENT_LOAD;
413 _decorators |= C2_UNKNOWN_CONTROL_LOAD;
414 const TypePtr* adr_type = _addr.type();
415 Node* adr = _addr.node();
416 if (!needs_cpu_membar() && adr_type->isa_instptr()) {
417 assert(adr_type->meet(TypePtr::NULL_PTR) != adr_type->remove_speculative(), "should be not null");
418 intptr_t offset = Type::OffsetBot;
419 AddPNode::Ideal_base_and_offset(adr, &gvn(), offset);
420 if (offset >= 0) {
421 int s = Klass::layout_helper_size_in_bytes(adr_type->isa_instptr()->instance_klass()->layout_helper());
422 if (offset < s) {
423 // Guaranteed to be a valid access, no need to pin it
424 _decorators ^= C2_CONTROL_DEPENDENT_LOAD;
425 _decorators ^= C2_UNKNOWN_CONTROL_LOAD;
426 }
427 }
428 }
429 }
430 }
431
432 //--------------------------- atomic operations---------------------------------
433
434 void BarrierSetC2::pin_atomic_op(C2AtomicParseAccess& access) const {
435 // SCMemProjNodes represent the memory state of a LoadStore. Their
436 // main role is to prevent LoadStore nodes from being optimized away
437 // when their results aren't used.
438 assert(access.is_parse_access(), "entry not supported at optimization time");
439 C2ParseAccess& parse_access = static_cast<C2ParseAccess&>(access);
440 GraphKit* kit = parse_access.kit();
441 Node* load_store = access.raw_access();
442 assert(load_store != nullptr, "must pin atomic op");
443 Node* proj = kit->gvn().transform(new SCMemProjNode(load_store));
444 kit->set_memory(proj, access.alias_idx());
445 }
446
447 void C2AtomicParseAccess::set_memory() {
448 Node *mem = _kit->memory(_alias_idx);
449 _memory = mem;
450 }
451
452 Node* BarrierSetC2::atomic_cmpxchg_val_at_resolved(C2AtomicParseAccess& access, Node* expected_val,
453 Node* new_val, const Type* value_type) const {
454 GraphKit* kit = access.kit();
455 MemNode::MemOrd mo = access.mem_node_mo();
456 Node* mem = access.memory();
457
458 Node* adr = access.addr().node();
459 const TypePtr* adr_type = access.addr().type();
460
461 Node* load_store = nullptr;
462
463 if (access.is_oop()) {
464 #ifdef _LP64
465 if (adr->bottom_type()->is_ptr_to_narrowoop()) {
466 Node *newval_enc = kit->gvn().transform(new EncodePNode(new_val, new_val->bottom_type()->make_narrowoop()));
467 Node *oldval_enc = kit->gvn().transform(new EncodePNode(expected_val, expected_val->bottom_type()->make_narrowoop()));
468 load_store = new CompareAndExchangeNNode(kit->control(), mem, adr, newval_enc, oldval_enc, adr_type, value_type->make_narrowoop(), mo);
469 } else
470 #endif
471 {
472 load_store = new CompareAndExchangePNode(kit->control(), mem, adr, new_val, expected_val, adr_type, value_type->is_oopptr(), mo);
473 }
474 } else {
475 switch (access.type()) {
476 case T_BYTE: {
477 load_store = new CompareAndExchangeBNode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo);
478 break;
479 }
480 case T_SHORT: {
481 load_store = new CompareAndExchangeSNode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo);
482 break;
483 }
484 case T_INT: {
485 load_store = new CompareAndExchangeINode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo);
486 break;
487 }
488 case T_LONG: {
489 load_store = new CompareAndExchangeLNode(kit->control(), mem, adr, new_val, expected_val, adr_type, mo);
490 break;
491 }
492 default:
493 ShouldNotReachHere();
494 }
495 }
496
497 load_store->as_LoadStore()->set_barrier_data(access.barrier_data());
498 load_store = kit->gvn().transform(load_store);
499
500 access.set_raw_access(load_store);
501 pin_atomic_op(access);
502
503 #ifdef _LP64
504 if (access.is_oop() && adr->bottom_type()->is_ptr_to_narrowoop()) {
505 return kit->gvn().transform(new DecodeNNode(load_store, load_store->get_ptr_type()));
506 }
507 #endif
508
509 return load_store;
510 }
511
512 Node* BarrierSetC2::atomic_cmpxchg_bool_at_resolved(C2AtomicParseAccess& access, Node* expected_val,
513 Node* new_val, const Type* value_type) const {
514 GraphKit* kit = access.kit();
515 DecoratorSet decorators = access.decorators();
516 MemNode::MemOrd mo = access.mem_node_mo();
517 Node* mem = access.memory();
518 bool is_weak_cas = (decorators & C2_WEAK_CMPXCHG) != 0;
519 Node* load_store = nullptr;
520 Node* adr = access.addr().node();
521
522 if (access.is_oop()) {
523 #ifdef _LP64
524 if (adr->bottom_type()->is_ptr_to_narrowoop()) {
525 Node *newval_enc = kit->gvn().transform(new EncodePNode(new_val, new_val->bottom_type()->make_narrowoop()));
526 Node *oldval_enc = kit->gvn().transform(new EncodePNode(expected_val, expected_val->bottom_type()->make_narrowoop()));
527 if (is_weak_cas) {
528 load_store = new WeakCompareAndSwapNNode(kit->control(), mem, adr, newval_enc, oldval_enc, mo);
529 } else {
530 load_store = new CompareAndSwapNNode(kit->control(), mem, adr, newval_enc, oldval_enc, mo);
531 }
532 } else
533 #endif
534 {
535 if (is_weak_cas) {
536 load_store = new WeakCompareAndSwapPNode(kit->control(), mem, adr, new_val, expected_val, mo);
537 } else {
538 load_store = new CompareAndSwapPNode(kit->control(), mem, adr, new_val, expected_val, mo);
539 }
540 }
541 } else {
542 switch(access.type()) {
543 case T_BYTE: {
544 if (is_weak_cas) {
545 load_store = new WeakCompareAndSwapBNode(kit->control(), mem, adr, new_val, expected_val, mo);
546 } else {
547 load_store = new CompareAndSwapBNode(kit->control(), mem, adr, new_val, expected_val, mo);
548 }
549 break;
550 }
551 case T_SHORT: {
552 if (is_weak_cas) {
553 load_store = new WeakCompareAndSwapSNode(kit->control(), mem, adr, new_val, expected_val, mo);
554 } else {
555 load_store = new CompareAndSwapSNode(kit->control(), mem, adr, new_val, expected_val, mo);
556 }
557 break;
558 }
559 case T_INT: {
560 if (is_weak_cas) {
561 load_store = new WeakCompareAndSwapINode(kit->control(), mem, adr, new_val, expected_val, mo);
562 } else {
563 load_store = new CompareAndSwapINode(kit->control(), mem, adr, new_val, expected_val, mo);
564 }
565 break;
566 }
567 case T_LONG: {
568 if (is_weak_cas) {
569 load_store = new WeakCompareAndSwapLNode(kit->control(), mem, adr, new_val, expected_val, mo);
570 } else {
571 load_store = new CompareAndSwapLNode(kit->control(), mem, adr, new_val, expected_val, mo);
572 }
573 break;
574 }
575 default:
576 ShouldNotReachHere();
577 }
578 }
579
580 load_store->as_LoadStore()->set_barrier_data(access.barrier_data());
581 load_store = kit->gvn().transform(load_store);
582
583 access.set_raw_access(load_store);
584 pin_atomic_op(access);
585
586 return load_store;
587 }
588
589 Node* BarrierSetC2::atomic_xchg_at_resolved(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
590 GraphKit* kit = access.kit();
591 Node* mem = access.memory();
592 Node* adr = access.addr().node();
593 const TypePtr* adr_type = access.addr().type();
594 Node* load_store = nullptr;
595
596 if (access.is_oop()) {
597 #ifdef _LP64
598 if (adr->bottom_type()->is_ptr_to_narrowoop()) {
599 Node *newval_enc = kit->gvn().transform(new EncodePNode(new_val, new_val->bottom_type()->make_narrowoop()));
600 load_store = kit->gvn().transform(new GetAndSetNNode(kit->control(), mem, adr, newval_enc, adr_type, value_type->make_narrowoop()));
601 } else
602 #endif
603 {
604 load_store = new GetAndSetPNode(kit->control(), mem, adr, new_val, adr_type, value_type->is_oopptr());
605 }
606 } else {
607 switch (access.type()) {
608 case T_BYTE:
609 load_store = new GetAndSetBNode(kit->control(), mem, adr, new_val, adr_type);
610 break;
611 case T_SHORT:
612 load_store = new GetAndSetSNode(kit->control(), mem, adr, new_val, adr_type);
613 break;
614 case T_INT:
615 load_store = new GetAndSetINode(kit->control(), mem, adr, new_val, adr_type);
616 break;
617 case T_LONG:
618 load_store = new GetAndSetLNode(kit->control(), mem, adr, new_val, adr_type);
619 break;
620 default:
621 ShouldNotReachHere();
622 }
623 }
624
625 load_store->as_LoadStore()->set_barrier_data(access.barrier_data());
626 load_store = kit->gvn().transform(load_store);
627
628 access.set_raw_access(load_store);
629 pin_atomic_op(access);
630
631 #ifdef _LP64
632 if (access.is_oop() && adr->bottom_type()->is_ptr_to_narrowoop()) {
633 return kit->gvn().transform(new DecodeNNode(load_store, load_store->get_ptr_type()));
634 }
635 #endif
636
637 return load_store;
638 }
639
640 Node* BarrierSetC2::atomic_add_at_resolved(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
641 Node* load_store = nullptr;
642 GraphKit* kit = access.kit();
643 Node* adr = access.addr().node();
644 const TypePtr* adr_type = access.addr().type();
645 Node* mem = access.memory();
646
647 switch(access.type()) {
648 case T_BYTE:
649 load_store = new GetAndAddBNode(kit->control(), mem, adr, new_val, adr_type);
650 break;
651 case T_SHORT:
652 load_store = new GetAndAddSNode(kit->control(), mem, adr, new_val, adr_type);
653 break;
654 case T_INT:
655 load_store = new GetAndAddINode(kit->control(), mem, adr, new_val, adr_type);
656 break;
657 case T_LONG:
658 load_store = new GetAndAddLNode(kit->control(), mem, adr, new_val, adr_type);
659 break;
660 default:
661 ShouldNotReachHere();
662 }
663
664 load_store->as_LoadStore()->set_barrier_data(access.barrier_data());
665 load_store = kit->gvn().transform(load_store);
666
667 access.set_raw_access(load_store);
668 pin_atomic_op(access);
669
670 return load_store;
671 }
672
673 Node* BarrierSetC2::atomic_cmpxchg_val_at(C2AtomicParseAccess& access, Node* expected_val,
674 Node* new_val, const Type* value_type) const {
675 C2AccessFence fence(access);
676 resolve_address(access);
677 return atomic_cmpxchg_val_at_resolved(access, expected_val, new_val, value_type);
678 }
679
680 Node* BarrierSetC2::atomic_cmpxchg_bool_at(C2AtomicParseAccess& access, Node* expected_val,
681 Node* new_val, const Type* value_type) const {
682 C2AccessFence fence(access);
683 resolve_address(access);
684 return atomic_cmpxchg_bool_at_resolved(access, expected_val, new_val, value_type);
685 }
686
687 Node* BarrierSetC2::atomic_xchg_at(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
688 C2AccessFence fence(access);
689 resolve_address(access);
690 return atomic_xchg_at_resolved(access, new_val, value_type);
691 }
692
693 Node* BarrierSetC2::atomic_add_at(C2AtomicParseAccess& access, Node* new_val, const Type* value_type) const {
694 C2AccessFence fence(access);
695 resolve_address(access);
696 return atomic_add_at_resolved(access, new_val, value_type);
697 }
698
699 int BarrierSetC2::arraycopy_payload_base_offset(bool is_array) {
700 // Exclude the header but include array length to copy by 8 bytes words.
701 // Can't use base_offset_in_bytes(bt) since basic type is unknown.
702 int base_off = is_array ? arrayOopDesc::length_offset_in_bytes() :
703 instanceOopDesc::base_offset_in_bytes();
704 // base_off:
705 // 8 - 32-bit VM or 64-bit VM, compact headers
706 // 12 - 64-bit VM, compressed klass
707 // 16 - 64-bit VM, normal klass
708 if (base_off % BytesPerLong != 0) {
709 assert(!UseCompactObjectHeaders, "");
710 if (is_array) {
711 // Exclude length to copy by 8 bytes words.
712 base_off += sizeof(int);
713 } else {
714 // Include klass to copy by 8 bytes words.
715 base_off = instanceOopDesc::klass_offset_in_bytes();
716 }
717 assert(base_off % BytesPerLong == 0, "expect 8 bytes alignment");
718 }
719 return base_off;
720 }
721
722 void BarrierSetC2::clone(GraphKit* kit, Node* src_base, Node* dst_base, Node* size, bool is_array) const {
723 int base_off = arraycopy_payload_base_offset(is_array);
724 Node* payload_size = size;
725 Node* offset = kit->MakeConX(base_off);
726 payload_size = kit->gvn().transform(new SubXNode(payload_size, offset));
727 if (is_array) {
728 // Ensure the array payload size is rounded up to the next BytesPerLong
729 // multiple when converting to double-words. This is necessary because array
730 // size does not include object alignment padding, so it might not be a
731 // multiple of BytesPerLong for sub-long element types.
732 payload_size = kit->gvn().transform(new AddXNode(payload_size, kit->MakeConX(BytesPerLong - 1)));
733 }
734 payload_size = kit->gvn().transform(new URShiftXNode(payload_size, kit->intcon(LogBytesPerLong)));
735 ArrayCopyNode* ac = ArrayCopyNode::make(kit, false, src_base, offset, dst_base, offset, payload_size, true, false);
736 if (is_array) {
737 ac->set_clone_array();
738 } else {
739 ac->set_clone_inst();
740 }
741 Node* n = kit->gvn().transform(ac);
742 if (n == ac) {
743 const TypePtr* raw_adr_type = TypeRawPtr::BOTTOM;
744 ac->set_adr_type(TypeRawPtr::BOTTOM);
745 kit->set_predefined_output_for_runtime_call(ac, ac->in(TypeFunc::Memory), raw_adr_type);
746 } else {
747 kit->set_all_memory(n);
748 }
749 }
750
751 Node* BarrierSetC2::obj_allocate(PhaseMacroExpand* macro, Node* mem, Node* toobig_false, Node* size_in_bytes,
752 Node*& i_o, Node*& needgc_ctrl,
753 Node*& fast_oop_ctrl, Node*& fast_oop_rawmem,
754 intx prefetch_lines) const {
755 assert(UseTLAB, "Only for TLAB enabled allocations");
756
757 Node* thread = macro->transform_later(new ThreadLocalNode());
758 Node* tlab_top_adr = macro->off_heap_plus_addr(thread, in_bytes(JavaThread::tlab_top_offset()));
759 Node* tlab_end_adr = macro->off_heap_plus_addr(thread, in_bytes(JavaThread::tlab_end_offset()));
760
761 // Load TLAB end.
762 //
763 // Note: We set the control input on "tlab_end" and "old_tlab_top" to work around
764 // a bug where these values were being moved across
765 // a safepoint. These are not oops, so they cannot be include in the oop
766 // map, but they can be changed by a GC. The proper way to fix this would
767 // be to set the raw memory state when generating a SafepointNode. However
768 // this will require extensive changes to the loop optimization in order to
769 // prevent a degradation of the optimization.
770 // See comment in memnode.hpp, around line 227 in class LoadPNode.
771 Node* tlab_end = macro->make_load_raw(toobig_false, mem, tlab_end_adr, 0, TypeRawPtr::BOTTOM, T_ADDRESS);
772
773 // Load the TLAB top.
774 Node* old_tlab_top = new LoadPNode(toobig_false, mem, tlab_top_adr, TypeRawPtr::BOTTOM, TypeRawPtr::BOTTOM, MemNode::unordered);
775 macro->transform_later(old_tlab_top);
776
777 // Add to heap top to get a new TLAB top
778 Node* new_tlab_top = AddPNode::make_off_heap(old_tlab_top, size_in_bytes);
779 macro->transform_later(new_tlab_top);
780
781 // Check against TLAB end
782 Node* tlab_full = new CmpPNode(new_tlab_top, tlab_end);
783 macro->transform_later(tlab_full);
784
785 Node* needgc_bol = new BoolNode(tlab_full, BoolTest::ge);
786 macro->transform_later(needgc_bol);
787 IfNode* needgc_iff = new IfNode(toobig_false, needgc_bol, PROB_UNLIKELY_MAG(4), COUNT_UNKNOWN);
788 macro->transform_later(needgc_iff);
789
790 // Plug the failing-heap-space-need-gc test into the slow-path region
791 Node* needgc_true = new IfTrueNode(needgc_iff);
792 macro->transform_later(needgc_true);
793 needgc_ctrl = needgc_true;
794
795 // No need for a GC.
796 Node* needgc_false = new IfFalseNode(needgc_iff);
797 macro->transform_later(needgc_false);
798
799 // Fast path:
800 i_o = macro->prefetch_allocation(i_o, needgc_false, mem,
801 old_tlab_top, new_tlab_top, prefetch_lines);
802
803 // Store the modified TLAB top back down.
804 Node* store_tlab_top = new StorePNode(needgc_false, mem, tlab_top_adr,
805 TypeRawPtr::BOTTOM, new_tlab_top, MemNode::unordered);
806 macro->transform_later(store_tlab_top);
807
808 fast_oop_ctrl = needgc_false;
809 fast_oop_rawmem = store_tlab_top;
810 return old_tlab_top;
811 }
812
813 const TypeFunc* BarrierSetC2::_clone_type_Type = nullptr;
814
815 void BarrierSetC2::make_clone_type() {
816 assert(BarrierSetC2::_clone_type_Type == nullptr, "should be");
817 // Create input type (domain)
818 int argcnt = NOT_LP64(3) LP64_ONLY(4);
819 const Type** const domain_fields = TypeTuple::fields(argcnt);
820 int argp = TypeFunc::Parms;
821 domain_fields[argp++] = TypeInstPtr::NOTNULL; // src
822 domain_fields[argp++] = TypeInstPtr::NOTNULL; // dst
823 domain_fields[argp++] = TypeX_X; // size lower
824 LP64_ONLY(domain_fields[argp++] = Type::HALF); // size upper
825 assert(argp == TypeFunc::Parms+argcnt, "correct decoding");
826 const TypeTuple* const domain = TypeTuple::make(TypeFunc::Parms + argcnt, domain_fields);
827
828 // Create result type (range)
829 const Type** const range_fields = TypeTuple::fields(0);
830 const TypeTuple* const range = TypeTuple::make(TypeFunc::Parms + 0, range_fields);
831
832 BarrierSetC2::_clone_type_Type = TypeFunc::make(domain, range);
833 }
834
835 inline const TypeFunc* BarrierSetC2::clone_type() {
836 assert(BarrierSetC2::_clone_type_Type != nullptr, "should be initialized");
837 return BarrierSetC2::_clone_type_Type;
838 }
839
840 #define XTOP LP64_ONLY(COMMA phase->top())
841
842 void BarrierSetC2::clone_in_runtime(PhaseMacroExpand* phase, ArrayCopyNode* ac,
843 address clone_addr, const char* clone_name) const {
844 Node* const ctrl = ac->in(TypeFunc::Control);
845 Node* const mem = ac->in(TypeFunc::Memory);
846 Node* const src = ac->in(ArrayCopyNode::Src);
847 Node* const dst = ac->in(ArrayCopyNode::Dest);
848 Node* const size = ac->in(ArrayCopyNode::Length);
849
850 assert(size->bottom_type()->base() == Type_X,
851 "Should be of object size type (int for 32 bits, long for 64 bits)");
852
853 // The native clone we are calling here expects the object size in words.
854 // Add header/offset size to payload size to get object size.
855 Node* const base_offset = phase->MakeConX(arraycopy_payload_base_offset(ac->is_clone_array()) >> LogBytesPerLong);
856 Node* const full_size = phase->transform_later(new AddXNode(size, base_offset));
857 // HeapAccess<>::clone expects size in heap words.
858 // For 64-bits platforms, this is a no-operation.
859 // For 32-bits platforms, we need to multiply full_size by HeapWordsPerLong (2).
860 Node* const full_size_in_heap_words = phase->transform_later(new LShiftXNode(full_size, phase->intcon(LogHeapWordsPerLong)));
861
862 Node* const call = phase->make_leaf_call(ctrl,
863 mem,
864 clone_type(),
865 clone_addr,
866 clone_name,
867 TypeRawPtr::BOTTOM,
868 src, dst, full_size_in_heap_words XTOP);
869 phase->transform_later(call);
870 phase->replace_node(ac, call);
871 }
872
873 void BarrierSetC2::clone_at_expansion(PhaseMacroExpand* phase, ArrayCopyNode* ac) const {
874 Node* ctrl = ac->in(TypeFunc::Control);
875 Node* mem = ac->in(TypeFunc::Memory);
876 Node* src = ac->in(ArrayCopyNode::Src);
877 Node* src_offset = ac->in(ArrayCopyNode::SrcPos);
878 Node* dest = ac->in(ArrayCopyNode::Dest);
879 Node* dest_offset = ac->in(ArrayCopyNode::DestPos);
880 Node* length = ac->in(ArrayCopyNode::Length);
881
882 Node* payload_src = phase->basic_plus_adr(src, src_offset);
883 Node* payload_dst = phase->basic_plus_adr(dest, dest_offset);
884
885 const char* copyfunc_name = "arraycopy";
886 address copyfunc_addr = phase->basictype2arraycopy(T_LONG, nullptr, nullptr, true, copyfunc_name, true);
887
888 const TypePtr* raw_adr_type = TypeRawPtr::BOTTOM;
889 const TypeFunc* call_type = OptoRuntime::fast_arraycopy_Type();
890
891 Node* call = phase->make_leaf_call(ctrl, mem, call_type, copyfunc_addr, copyfunc_name, raw_adr_type, payload_src, payload_dst, length XTOP);
892 phase->transform_later(call);
893
894 phase->replace_node(ac, call);
895 }
896
897 #undef XTOP
898
899 static bool block_has_safepoint(const Block* block, uint from, uint to) {
900 for (uint i = from; i < to; i++) {
901 if (block->get_node(i)->is_MachSafePoint()) {
902 // Safepoint found
903 return true;
904 }
905 }
906
907 // Safepoint not found
908 return false;
909 }
910
911 static bool block_has_safepoint(const Block* block) {
912 return block_has_safepoint(block, 0, block->number_of_nodes());
913 }
914
915 static uint block_index(const Block* block, const Node* node) {
916 for (uint j = 0; j < block->number_of_nodes(); ++j) {
917 if (block->get_node(j) == node) {
918 return j;
919 }
920 }
921 ShouldNotReachHere();
922 return 0;
923 }
924
925 // Look through various node aliases
926 static const Node* look_through_node(const Node* node) {
927 while (node != nullptr) {
928 const Node* new_node = node;
929 if (node->is_Mach()) {
930 const MachNode* const node_mach = node->as_Mach();
931 if (node_mach->ideal_Opcode() == Op_CheckCastPP) {
932 new_node = node->in(1);
933 }
934 if (node_mach->is_SpillCopy()) {
935 new_node = node->in(1);
936 }
937 }
938 if (new_node == node || new_node == nullptr) {
939 break;
940 } else {
941 node = new_node;
942 }
943 }
944
945 return node;
946 }
947
948 // Whether the given offset is undefined.
949 static bool is_undefined(intptr_t offset) {
950 return offset == Type::OffsetTop;
951 }
952
953 // Whether the given offset is unknown.
954 static bool is_unknown(intptr_t offset) {
955 return offset == Type::OffsetBot;
956 }
957
958 // Whether the given offset is concrete (defined and compile-time known).
959 static bool is_concrete(intptr_t offset) {
960 return !is_undefined(offset) && !is_unknown(offset);
961 }
962
963 // Compute base + offset components of the memory address accessed by mach.
964 // Return a node representing the base address, or null if the base cannot be
965 // found or the offset is undefined or a concrete negative value. If a non-null
966 // base is returned, the offset is a concrete, nonnegative value or unknown.
967 static const Node* get_base_and_offset(const MachNode* mach, intptr_t& offset) {
968 const TypePtr* adr_type = nullptr;
969 offset = 0;
970 const Node* base = mach->get_base_and_disp(offset, adr_type);
971
972 if (base == nullptr || base == NodeSentinel) {
973 return nullptr;
974 }
975
976 if (offset == 0 && base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_AddP) {
977 // The memory address is computed by 'base' and fed to 'mach' via an
978 // indirect memory operand (indicated by offset == 0). The ultimate base and
979 // offset can be fetched directly from the inputs and Ideal type of 'base'.
980 const TypeOopPtr* oopptr = base->bottom_type()->isa_oopptr();
981 if (oopptr == nullptr) return nullptr;
982 offset = oopptr->offset();
983 // Even if 'base' is not an Ideal AddP node anymore, Matcher::ReduceInst()
984 // guarantees that the base address is still available at the same slot.
985 base = base->in(AddPNode::Base);
986 assert(base != nullptr, "");
987 }
988
989 if (is_undefined(offset) || (is_concrete(offset) && offset < 0)) {
990 return nullptr;
991 }
992
993 return look_through_node(base);
994 }
995
996 // Whether a phi node corresponds to an array allocation.
997 // This test is incomplete: in some edge cases, it might return false even
998 // though the node does correspond to an array allocation.
999 static bool is_array_allocation(const Node* phi) {
1000 precond(phi->is_Phi());
1001 // Check whether phi has a successor cast (CheckCastPP) to Java array pointer,
1002 // possibly below spill copies and other cast nodes. Limit the exploration to
1003 // a single path from the phi node consisting of these node types.
1004 const Node* current = phi;
1005 while (true) {
1006 const Node* next = nullptr;
1007 for (DUIterator_Fast imax, i = current->fast_outs(imax); i < imax; i++) {
1008 if (!current->fast_out(i)->isa_Mach()) {
1009 continue;
1010 }
1011 const MachNode* succ = current->fast_out(i)->as_Mach();
1012 if (succ->ideal_Opcode() == Op_CheckCastPP) {
1013 if (succ->get_ptr_type()->isa_aryptr()) {
1014 // Cast to Java array pointer: phi corresponds to an array allocation.
1015 return true;
1016 }
1017 // Other cast: record as candidate for further exploration.
1018 next = succ;
1019 } else if (succ->is_SpillCopy() && next == nullptr) {
1020 // Spill copy, and no better candidate found: record as candidate.
1021 next = succ;
1022 }
1023 }
1024 if (next == nullptr) {
1025 // No evidence found that phi corresponds to an array allocation, and no
1026 // candidates available to continue exploring.
1027 return false;
1028 }
1029 // Continue exploring from the best candidate found.
1030 current = next;
1031 }
1032 ShouldNotReachHere();
1033 }
1034
1035 bool BarrierSetC2::is_allocation(const Node* node) {
1036 assert(node->is_Phi(), "expected phi node");
1037 if (node->req() != 3) {
1038 return false;
1039 }
1040 const Node* const fast_node = node->in(2);
1041 if (!fast_node->is_Mach()) {
1042 return false;
1043 }
1044 const MachNode* const fast_mach = fast_node->as_Mach();
1045 if (fast_mach->ideal_Opcode() != Op_LoadP) {
1046 return false;
1047 }
1048 intptr_t offset;
1049 const Node* const base = get_base_and_offset(fast_mach, offset);
1050 if (base == nullptr || !base->is_Mach() || !is_concrete(offset)) {
1051 return false;
1052 }
1053 const MachNode* const base_mach = base->as_Mach();
1054 if (base_mach->ideal_Opcode() != Op_ThreadLocal) {
1055 return false;
1056 }
1057 return offset == in_bytes(Thread::tlab_top_offset());
1058 }
1059
1060 void BarrierSetC2::elide_dominated_barriers(Node_List& accesses, Node_List& access_dominators) const {
1061 Compile* const C = Compile::current();
1062 PhaseCFG* const cfg = C->cfg();
1063
1064 for (uint i = 0; i < accesses.size(); i++) {
1065 MachNode* const access = accesses.at(i)->as_Mach();
1066 intptr_t access_offset;
1067 const Node* const access_obj = get_base_and_offset(access, access_offset);
1068 Block* const access_block = cfg->get_block_for_node(access);
1069 const uint access_index = block_index(access_block, access);
1070
1071 if (access_obj == nullptr) {
1072 // No information available
1073 continue;
1074 }
1075
1076 for (uint j = 0; j < access_dominators.size(); j++) {
1077 const Node* const mem = access_dominators.at(j);
1078 if (mem->is_Phi()) {
1079 assert(is_allocation(mem), "expected allocation phi node");
1080 if (mem != access_obj) {
1081 continue;
1082 }
1083 if (is_unknown(access_offset) && !is_array_allocation(mem)) {
1084 // The accessed address has an unknown offset, but the allocated
1085 // object cannot be determined to be an array. Avoid eliding in this
1086 // case, to be on the safe side.
1087 continue;
1088 }
1089 assert((is_concrete(access_offset) && access_offset >= 0) || (is_unknown(access_offset) && is_array_allocation(mem)),
1090 "candidate allocation-dominated access offsets must be either concrete and nonnegative, or unknown (for array allocations only)");
1091 } else {
1092 // Access node
1093 const MachNode* const mem_mach = mem->as_Mach();
1094 intptr_t mem_offset;
1095 const Node* const mem_obj = get_base_and_offset(mem_mach, mem_offset);
1096
1097 if (mem_obj == nullptr ||
1098 !is_concrete(access_offset) ||
1099 !is_concrete(mem_offset)) {
1100 // No information available
1101 continue;
1102 }
1103
1104 if (mem_obj != access_obj || mem_offset != access_offset) {
1105 // Not the same addresses, not a candidate
1106 continue;
1107 }
1108 assert(is_concrete(access_offset) && access_offset >= 0,
1109 "candidate non-allocation-dominated access offsets must be concrete and nonnegative");
1110 }
1111
1112 Block* mem_block = cfg->get_block_for_node(mem);
1113 const uint mem_index = block_index(mem_block, mem);
1114
1115 if (access_block == mem_block) {
1116 // Earlier accesses in the same block
1117 if (mem_index < access_index && !block_has_safepoint(mem_block, mem_index + 1, access_index)) {
1118 elide_dominated_barrier(access);
1119 }
1120 } else if (mem_block->dominates(access_block)) {
1121 // Dominating block? Look around for safepoints
1122 ResourceMark rm;
1123 Block_List stack;
1124 VectorSet visited;
1125 stack.push(access_block);
1126 bool safepoint_found = block_has_safepoint(access_block);
1127 while (!safepoint_found && stack.size() > 0) {
1128 const Block* const block = stack.pop();
1129 if (visited.test_set(block->_pre_order)) {
1130 continue;
1131 }
1132 if (block_has_safepoint(block)) {
1133 safepoint_found = true;
1134 break;
1135 }
1136 if (block == mem_block) {
1137 continue;
1138 }
1139
1140 // Push predecessor blocks
1141 for (uint p = 1; p < block->num_preds(); ++p) {
1142 Block* const pred = cfg->get_block_for_node(block->pred(p));
1143 stack.push(pred);
1144 }
1145 }
1146
1147 if (!safepoint_found) {
1148 elide_dominated_barrier(access);
1149 }
1150 }
1151 }
1152 }
1153 }
1154
1155 void BarrierSetC2::compute_liveness_at_stubs() const {
1156 ResourceMark rm;
1157 Compile* const C = Compile::current();
1158 Arena* const A = Thread::current()->resource_area();
1159 PhaseCFG* const cfg = C->cfg();
1160 PhaseRegAlloc* const regalloc = C->regalloc();
1161 RegMask* const live = NEW_ARENA_ARRAY(A, RegMask, cfg->number_of_blocks() * sizeof(RegMask));
1162 BarrierSetAssembler* const bs = BarrierSet::barrier_set()->barrier_set_assembler();
1163 BarrierSetC2State* bs_state = barrier_set_state();
1164 Block_List worklist;
1165
1166 for (uint i = 0; i < cfg->number_of_blocks(); ++i) {
1167 new ((void*)(live + i)) RegMask();
1168 worklist.push(cfg->get_block(i));
1169 }
1170
1171 while (worklist.size() > 0) {
1172 const Block* const block = worklist.pop();
1173 RegMask& old_live = live[block->_pre_order];
1174 RegMask new_live;
1175
1176 // Initialize to union of successors
1177 for (uint i = 0; i < block->_num_succs; i++) {
1178 const uint succ_id = block->_succs[i]->_pre_order;
1179 new_live.or_with(live[succ_id]);
1180 }
1181
1182 // Walk block backwards, computing liveness
1183 for (int i = block->number_of_nodes() - 1; i >= 0; --i) {
1184 const Node* const node = block->get_node(i);
1185
1186 // If this node tracks out-liveness, update it
1187 if (!bs_state->needs_livein_data()) {
1188 RegMask* const regs = bs_state->live(node);
1189 if (regs != nullptr) {
1190 regs->or_with(new_live);
1191 }
1192 }
1193
1194 // Remove def bits
1195 const OptoReg::Name first = bs->refine_register(node, regalloc->get_reg_first(node));
1196 const OptoReg::Name second = bs->refine_register(node, regalloc->get_reg_second(node));
1197 if (first != OptoReg::Bad) {
1198 new_live.remove(first);
1199 }
1200 if (second != OptoReg::Bad) {
1201 new_live.remove(second);
1202 }
1203
1204 // Add use bits
1205 for (uint j = 1; j < node->req(); ++j) {
1206 const Node* const use = node->in(j);
1207 const OptoReg::Name first = bs->refine_register(use, regalloc->get_reg_first(use));
1208 const OptoReg::Name second = bs->refine_register(use, regalloc->get_reg_second(use));
1209 if (first != OptoReg::Bad) {
1210 new_live.insert(first);
1211 }
1212 if (second != OptoReg::Bad) {
1213 new_live.insert(second);
1214 }
1215 }
1216
1217 // If this node tracks in-liveness, update it
1218 if (bs_state->needs_livein_data()) {
1219 RegMask* const regs = bs_state->live(node);
1220 if (regs != nullptr) {
1221 regs->or_with(new_live);
1222 }
1223 }
1224 }
1225
1226 // Now at block top, see if we have any changes
1227 new_live.subtract(old_live);
1228 if (!new_live.is_empty()) {
1229 // Liveness has refined, update and propagate to prior blocks
1230 old_live.or_with(new_live);
1231 for (uint i = 1; i < block->num_preds(); ++i) {
1232 Block* const pred = cfg->get_block_for_node(block->pred(i));
1233 worklist.push(pred);
1234 }
1235 }
1236 }
1237 }