165 int _inst_mem_id; // Instance memory id (node index of the memory Phi)
166 int _inst_id; // Instance id of the memory slice.
167 const int _inst_index; // Alias index of the instance memory slice.
168 // Array elements references have the same alias_idx but different offset.
169 const int _inst_offset; // Offset of the instance memory slice.
170 // Size is bigger to hold the _adr_type field.
171 virtual uint hash() const; // Check the type
172 virtual bool cmp( const Node &n ) const;
173 virtual uint size_of() const { return sizeof(*this); }
174
175 // Determine if CMoveNode::is_cmove_id can be used at this join point.
176 Node* is_cmove_id(PhaseTransform* phase, int true_path);
177 bool wait_for_region_igvn(PhaseGVN* phase);
178 bool is_data_loop(RegionNode* r, Node* uin, const PhaseGVN* phase);
179
180 static Node* clone_through_phi(Node* root_phi, const Type* t, uint c, PhaseIterGVN* igvn);
181 static Node* merge_through_phi(Node* root_phi, PhaseIterGVN* igvn);
182
183 bool must_wait_for_region_in_irreducible_loop(PhaseGVN* phase) const;
184
185 public:
186 // Node layout (parallels RegionNode):
187 enum { Region, // Control input is the Phi's region.
188 Input // Input values are [1..len)
189 };
190
191 PhiNode( Node *r, const Type *t, const TypePtr* at = nullptr,
192 const int imid = -1,
193 const int iid = TypeOopPtr::InstanceTop,
194 const int iidx = Compile::AliasIdxTop,
195 const int ioffs = Type::OffsetTop )
196 : TypeNode(t,r->req()),
197 _adr_type(at),
198 _inst_mem_id(imid),
199 _inst_id(iid),
200 _inst_index(iidx),
201 _inst_offset(ioffs)
202 {
203 init_class_id(Class_Phi);
204 init_req(0, r);
238 int is_diamond_phi() const;
239 bool try_clean_memory_phi(PhaseIterGVN* igvn);
240 virtual int Opcode() const;
241 virtual bool pinned() const { return in(0) != nullptr; }
242 virtual const TypePtr *adr_type() const { verify_adr_type(true); return _adr_type; }
243
244 void set_inst_mem_id(int inst_mem_id) { _inst_mem_id = inst_mem_id; }
245 int inst_mem_id() const { return _inst_mem_id; }
246 int inst_id() const { return _inst_id; }
247 int inst_index() const { return _inst_index; }
248 int inst_offset() const { return _inst_offset; }
249 bool is_same_inst_field(const Type* tp, int mem_id, int id, int index, int offset) {
250 return type()->basic_type() == tp->basic_type() &&
251 inst_mem_id() == mem_id &&
252 inst_id() == id &&
253 inst_index() == index &&
254 inst_offset() == offset &&
255 type()->higher_equal(tp);
256 }
257
258 virtual const Type* Value(PhaseGVN* phase) const;
259 virtual Node* Identity(PhaseGVN* phase);
260 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
261 virtual const RegMask &out_RegMask() const;
262 virtual const RegMask &in_RegMask(uint) const;
263 #ifndef PRODUCT
264 virtual void dump_spec(outputStream *st) const;
265 #endif
266 #ifdef ASSERT
267 void verify_adr_type(VectorSet& visited, const TypePtr* at) const;
268 void verify_adr_type(bool recursive = false) const;
269 #else //ASSERT
270 void verify_adr_type(bool recursive = false) const {}
271 #endif //ASSERT
272
273 const TypeTuple* collect_types(PhaseGVN* phase) const;
274 };
275
276 //------------------------------GotoNode---------------------------------------
277 // GotoNodes perform direct branches.
431
432 static IfNode* make_with_same_profile(IfNode* if_node_profile, Node* ctrl, BoolNode* bol);
433
434 virtual int Opcode() const;
435 virtual bool pinned() const { return true; }
436 virtual const Type *bottom_type() const { return TypeTuple::IFBOTH; }
437 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
438 virtual const Type* Value(PhaseGVN* phase) const;
439 virtual int required_outcnt() const { return 2; }
440 virtual const RegMask &out_RegMask() const;
441 Node* fold_compares(PhaseIterGVN* phase);
442 static Node* up_one_dom(Node* curr, bool linear_only = false);
443 bool is_zero_trip_guard() const;
444 Node* dominated_by(Node* prev_dom, PhaseIterGVN* igvn, bool pin_array_access_nodes);
445
446 // Takes the type of val and filters it through the test represented
447 // by if_proj and returns a more refined type if one is produced.
448 // Returns null is it couldn't improve the type.
449 static const TypeInt* filtered_int_type(PhaseGVN* phase, Node* val, Node* if_proj);
450
451 #ifndef PRODUCT
452 virtual void dump_spec(outputStream *st) const;
453 #endif
454
455 bool same_condition(const Node* dom, PhaseIterGVN* igvn) const;
456 };
457
458 class RangeCheckNode : public IfNode {
459 private:
460 int is_range_check(Node*& range, Node*& index, jint& offset);
461
462 public:
463 RangeCheckNode(Node* control, Node* bol, float p, float fcnt) : IfNode(control, bol, p, fcnt) {
464 init_class_id(Class_RangeCheck);
465 }
466
467 #ifndef PRODUCT
468 RangeCheckNode(Node* control, Node* bol, float p, float fcnt, AssertionPredicateType assertion_predicate_type)
469 : IfNode(control, bol, p, fcnt, assertion_predicate_type) {
470 init_class_id(Class_RangeCheck);
702 virtual int Opcode() const;
703 virtual bool pinned() const { return true; };
704 virtual const Type *bottom_type() const { return TypeTuple::IFBOTH; }
705 virtual const Type* Value(PhaseGVN* phase) const;
706 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
707 virtual int required_outcnt() const { return 2; }
708 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
709 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
710 #ifndef PRODUCT
711 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
712 #endif
713 };
714
715 //------------------------------BlackholeNode----------------------------
716 // Blackhole all arguments. This node would survive through the compiler
717 // the effects on its arguments, and would be finally matched to nothing.
718 class BlackholeNode : public MultiNode {
719 public:
720 BlackholeNode(Node* ctrl) : MultiNode(1) {
721 init_req(TypeFunc::Control, ctrl);
722 }
723 virtual int Opcode() const;
724 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
725 virtual const Type* bottom_type() const { return TypeTuple::MEMBAR; }
726
727 const RegMask &in_RegMask(uint idx) const {
728 // Fake the incoming arguments mask for blackholes: accept all registers
729 // and all stack slots. This would avoid any redundant register moves
730 // for blackhole inputs.
731 return RegMask::All;
732 }
733 #ifndef PRODUCT
734 virtual void format(PhaseRegAlloc* ra, outputStream* st) const;
735 #endif
736 };
737
738
739 #endif // SHARE_OPTO_CFGNODE_HPP
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165 int _inst_mem_id; // Instance memory id (node index of the memory Phi)
166 int _inst_id; // Instance id of the memory slice.
167 const int _inst_index; // Alias index of the instance memory slice.
168 // Array elements references have the same alias_idx but different offset.
169 const int _inst_offset; // Offset of the instance memory slice.
170 // Size is bigger to hold the _adr_type field.
171 virtual uint hash() const; // Check the type
172 virtual bool cmp( const Node &n ) const;
173 virtual uint size_of() const { return sizeof(*this); }
174
175 // Determine if CMoveNode::is_cmove_id can be used at this join point.
176 Node* is_cmove_id(PhaseTransform* phase, int true_path);
177 bool wait_for_region_igvn(PhaseGVN* phase);
178 bool is_data_loop(RegionNode* r, Node* uin, const PhaseGVN* phase);
179
180 static Node* clone_through_phi(Node* root_phi, const Type* t, uint c, PhaseIterGVN* igvn);
181 static Node* merge_through_phi(Node* root_phi, PhaseIterGVN* igvn);
182
183 bool must_wait_for_region_in_irreducible_loop(PhaseGVN* phase) const;
184
185 bool can_push_inline_types_down(PhaseGVN* phase, bool can_reshape, ciInlineKlass*& inline_klass);
186 InlineTypeNode* push_inline_types_down(PhaseGVN* phase, bool can_reshape, ciInlineKlass* inline_klass);
187
188 public:
189 // Node layout (parallels RegionNode):
190 enum { Region, // Control input is the Phi's region.
191 Input // Input values are [1..len)
192 };
193
194 PhiNode( Node *r, const Type *t, const TypePtr* at = nullptr,
195 const int imid = -1,
196 const int iid = TypeOopPtr::InstanceTop,
197 const int iidx = Compile::AliasIdxTop,
198 const int ioffs = Type::OffsetTop )
199 : TypeNode(t,r->req()),
200 _adr_type(at),
201 _inst_mem_id(imid),
202 _inst_id(iid),
203 _inst_index(iidx),
204 _inst_offset(ioffs)
205 {
206 init_class_id(Class_Phi);
207 init_req(0, r);
241 int is_diamond_phi() const;
242 bool try_clean_memory_phi(PhaseIterGVN* igvn);
243 virtual int Opcode() const;
244 virtual bool pinned() const { return in(0) != nullptr; }
245 virtual const TypePtr *adr_type() const { verify_adr_type(true); return _adr_type; }
246
247 void set_inst_mem_id(int inst_mem_id) { _inst_mem_id = inst_mem_id; }
248 int inst_mem_id() const { return _inst_mem_id; }
249 int inst_id() const { return _inst_id; }
250 int inst_index() const { return _inst_index; }
251 int inst_offset() const { return _inst_offset; }
252 bool is_same_inst_field(const Type* tp, int mem_id, int id, int index, int offset) {
253 return type()->basic_type() == tp->basic_type() &&
254 inst_mem_id() == mem_id &&
255 inst_id() == id &&
256 inst_index() == index &&
257 inst_offset() == offset &&
258 type()->higher_equal(tp);
259 }
260
261 bool can_be_inline_type() const {
262 return EnableValhalla && _type->isa_instptr() && _type->is_instptr()->can_be_inline_type();
263 }
264
265 Node* try_push_inline_types_down(PhaseGVN* phase, bool can_reshape);
266 DEBUG_ONLY(bool can_push_inline_types_down(PhaseGVN* phase);)
267
268 virtual const Type* Value(PhaseGVN* phase) const;
269 virtual Node* Identity(PhaseGVN* phase);
270 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
271 virtual const RegMask &out_RegMask() const;
272 virtual const RegMask &in_RegMask(uint) const;
273 #ifndef PRODUCT
274 virtual void dump_spec(outputStream *st) const;
275 #endif
276 #ifdef ASSERT
277 void verify_adr_type(VectorSet& visited, const TypePtr* at) const;
278 void verify_adr_type(bool recursive = false) const;
279 #else //ASSERT
280 void verify_adr_type(bool recursive = false) const {}
281 #endif //ASSERT
282
283 const TypeTuple* collect_types(PhaseGVN* phase) const;
284 };
285
286 //------------------------------GotoNode---------------------------------------
287 // GotoNodes perform direct branches.
441
442 static IfNode* make_with_same_profile(IfNode* if_node_profile, Node* ctrl, BoolNode* bol);
443
444 virtual int Opcode() const;
445 virtual bool pinned() const { return true; }
446 virtual const Type *bottom_type() const { return TypeTuple::IFBOTH; }
447 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
448 virtual const Type* Value(PhaseGVN* phase) const;
449 virtual int required_outcnt() const { return 2; }
450 virtual const RegMask &out_RegMask() const;
451 Node* fold_compares(PhaseIterGVN* phase);
452 static Node* up_one_dom(Node* curr, bool linear_only = false);
453 bool is_zero_trip_guard() const;
454 Node* dominated_by(Node* prev_dom, PhaseIterGVN* igvn, bool pin_array_access_nodes);
455
456 // Takes the type of val and filters it through the test represented
457 // by if_proj and returns a more refined type if one is produced.
458 // Returns null is it couldn't improve the type.
459 static const TypeInt* filtered_int_type(PhaseGVN* phase, Node* val, Node* if_proj);
460
461 bool is_flat_array_check(PhaseTransform* phase, Node** array = nullptr);
462
463 #ifndef PRODUCT
464 virtual void dump_spec(outputStream *st) const;
465 #endif
466
467 bool same_condition(const Node* dom, PhaseIterGVN* igvn) const;
468 };
469
470 class RangeCheckNode : public IfNode {
471 private:
472 int is_range_check(Node*& range, Node*& index, jint& offset);
473
474 public:
475 RangeCheckNode(Node* control, Node* bol, float p, float fcnt) : IfNode(control, bol, p, fcnt) {
476 init_class_id(Class_RangeCheck);
477 }
478
479 #ifndef PRODUCT
480 RangeCheckNode(Node* control, Node* bol, float p, float fcnt, AssertionPredicateType assertion_predicate_type)
481 : IfNode(control, bol, p, fcnt, assertion_predicate_type) {
482 init_class_id(Class_RangeCheck);
714 virtual int Opcode() const;
715 virtual bool pinned() const { return true; };
716 virtual const Type *bottom_type() const { return TypeTuple::IFBOTH; }
717 virtual const Type* Value(PhaseGVN* phase) const;
718 virtual Node *Ideal(PhaseGVN *phase, bool can_reshape);
719 virtual int required_outcnt() const { return 2; }
720 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
721 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
722 #ifndef PRODUCT
723 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
724 #endif
725 };
726
727 //------------------------------BlackholeNode----------------------------
728 // Blackhole all arguments. This node would survive through the compiler
729 // the effects on its arguments, and would be finally matched to nothing.
730 class BlackholeNode : public MultiNode {
731 public:
732 BlackholeNode(Node* ctrl) : MultiNode(1) {
733 init_req(TypeFunc::Control, ctrl);
734 init_class_id(Class_Blackhole);
735 }
736 virtual int Opcode() const;
737 virtual uint ideal_reg() const { return 0; } // not matched in the AD file
738 virtual const Type* bottom_type() const { return TypeTuple::MEMBAR; }
739
740 const RegMask &in_RegMask(uint idx) const {
741 // Fake the incoming arguments mask for blackholes: accept all registers
742 // and all stack slots. This would avoid any redundant register moves
743 // for blackhole inputs.
744 return RegMask::All;
745 }
746 #ifndef PRODUCT
747 virtual void format(PhaseRegAlloc* ra, outputStream* st) const;
748 #endif
749 };
750
751
752 #endif // SHARE_OPTO_CFGNODE_HPP
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