1 /*
2 * Copyright (c) 1998, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/shared/gc_globals.hpp"
28 #include "memory/allocation.inline.hpp"
29 #include "oops/compressedOops.hpp"
30 #include "opto/ad.hpp"
31 #include "opto/block.hpp"
32 #include "opto/c2compiler.hpp"
33 #include "opto/callnode.hpp"
34 #include "opto/cfgnode.hpp"
35 #include "opto/machnode.hpp"
36 #include "opto/runtime.hpp"
37 #include "opto/chaitin.hpp"
38 #include "runtime/os.inline.hpp"
39 #include "runtime/sharedRuntime.hpp"
40
41 // Optimization - Graph Style
42
43 // Check whether val is not-null-decoded compressed oop,
44 // i.e. will grab into the base of the heap if it represents null.
45 static bool accesses_heap_base_zone(Node *val) {
46 if (CompressedOops::base() != nullptr) { // Implies UseCompressedOops.
47 if (val && val->is_Mach()) {
48 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
49 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
50 // decode null to point to the heap base (Decode_NN).
51 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
52 return true;
53 }
54 }
55 // Must recognize load operation with Decode matched in memory operand.
56 // We should not reach here except for PPC/AIX, as os::zero_page_read_protected()
57 // returns true everywhere else. On PPC, no such memory operands
58 // exist, therefore we did not yet implement a check for such operands.
59 NOT_AIX(Unimplemented());
60 }
61 }
62 return false;
63 }
64
65 static bool needs_explicit_null_check_for_read(Node *val) {
66 // On some OSes (AIX) the page at address 0 is only write protected.
67 // If so, only Store operations will trap.
68 if (os::zero_page_read_protected()) {
69 return false; // Implicit null check will work.
70 }
71 // Also a read accessing the base of a heap-based compressed heap will trap.
72 if (accesses_heap_base_zone(val) && // Hits the base zone page.
73 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
74 return false;
75 }
76
77 return true;
78 }
79
80 //------------------------------implicit_null_check----------------------------
81 // Detect implicit-null-check opportunities. Basically, find null checks
82 // with suitable memory ops nearby. Use the memory op to do the null check.
83 // I can generate a memory op if there is not one nearby.
84 // The proj is the control projection for the not-null case.
85 // The val is the pointer being checked for nullness or
86 // decodeHeapOop_not_null node if it did not fold into address.
87 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
88 // Assume if null check need for 0 offset then always needed
89 // Intel solaris doesn't support any null checks yet and no
90 // mechanism exists (yet) to set the switches at an os_cpu level
91 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
92
93 // Make sure the ptr-is-null path appears to be uncommon!
94 float f = block->end()->as_MachIf()->_prob;
95 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
96 if( f > PROB_UNLIKELY_MAG(4) ) return;
97
98 uint bidx = 0; // Capture index of value into memop
99 bool was_store; // Memory op is a store op
100
101 // Get the successor block for if the test ptr is non-null
102 Block* not_null_block; // this one goes with the proj
103 Block* null_block;
104 if (block->get_node(block->number_of_nodes()-1) == proj) {
105 null_block = block->_succs[0];
106 not_null_block = block->_succs[1];
107 } else {
108 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
109 not_null_block = block->_succs[0];
110 null_block = block->_succs[1];
111 }
112 while (null_block->is_Empty() == Block::empty_with_goto) {
113 null_block = null_block->_succs[0];
114 }
115
116 // Search the exception block for an uncommon trap.
117 // (See Parse::do_if and Parse::do_ifnull for the reason
118 // we need an uncommon trap. Briefly, we need a way to
119 // detect failure of this optimization, as in 6366351.)
120 {
121 bool found_trap = false;
122 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
123 Node* nn = null_block->get_node(i1);
124 if (nn->is_MachCall() &&
125 nn->as_MachCall()->entry_point() == OptoRuntime::uncommon_trap_blob()->entry_point()) {
126 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
127 if (trtype->isa_int() && trtype->is_int()->is_con()) {
128 jint tr_con = trtype->is_int()->get_con();
129 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
130 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
131 assert((int)reason < (int)BitsPerInt, "recode bit map");
132 if (is_set_nth_bit(allowed_reasons, (int) reason)
133 && action != Deoptimization::Action_none) {
134 // This uncommon trap is sure to recompile, eventually.
135 // When that happens, C->too_many_traps will prevent
136 // this transformation from happening again.
137 found_trap = true;
138 }
139 }
140 break;
141 }
142 }
143 if (!found_trap) {
144 // We did not find an uncommon trap.
145 return;
146 }
147 }
148
149 // Check for decodeHeapOop_not_null node which did not fold into address
150 bool is_decoden = ((intptr_t)val) & 1;
151 val = (Node*)(((intptr_t)val) & ~1);
152
153 assert(!is_decoden ||
154 ((val->in(0) == nullptr) && val->is_Mach() &&
155 (val->as_Mach()->ideal_Opcode() == Op_DecodeN)), "sanity");
156
157 // Search the successor block for a load or store who's base value is also
158 // the tested value. There may be several.
159 MachNode *best = nullptr; // Best found so far
160 for (DUIterator i = val->outs(); val->has_out(i); i++) {
161 Node *m = val->out(i);
162 if( !m->is_Mach() ) continue;
163 MachNode *mach = m->as_Mach();
164 if (mach->barrier_data() != 0) {
165 // Using memory accesses with barriers to perform implicit null checks is
166 // not supported. These operations might expand into multiple assembly
167 // instructions during code emission, including new memory accesses (e.g.
168 // in G1's pre-barrier), which would invalidate the implicit null
169 // exception table.
170 continue;
171 }
172 was_store = false;
173 int iop = mach->ideal_Opcode();
174 switch( iop ) {
175 case Op_LoadB:
176 case Op_LoadUB:
177 case Op_LoadUS:
178 case Op_LoadD:
179 case Op_LoadF:
180 case Op_LoadI:
181 case Op_LoadL:
182 case Op_LoadP:
183 case Op_LoadN:
184 case Op_LoadS:
185 case Op_LoadKlass:
186 case Op_LoadNKlass:
187 case Op_LoadRange:
188 case Op_LoadD_unaligned:
189 case Op_LoadL_unaligned:
190 assert(mach->in(2) == val, "should be address");
191 break;
192 case Op_StoreB:
193 case Op_StoreC:
194 case Op_StoreD:
195 case Op_StoreF:
196 case Op_StoreI:
197 case Op_StoreL:
198 case Op_StoreP:
199 case Op_StoreN:
200 case Op_StoreNKlass:
201 was_store = true; // Memory op is a store op
202 // Stores will have their address in slot 2 (memory in slot 1).
203 // If the value being nul-checked is in another slot, it means we
204 // are storing the checked value, which does NOT check the value!
205 if( mach->in(2) != val ) continue;
206 break; // Found a memory op?
207 case Op_StrComp:
208 case Op_StrEquals:
209 case Op_StrIndexOf:
210 case Op_StrIndexOfChar:
211 case Op_AryEq:
212 case Op_VectorizedHashCode:
213 case Op_StrInflatedCopy:
214 case Op_StrCompressedCopy:
215 case Op_EncodeISOArray:
216 case Op_CountPositives:
217 // Not a legit memory op for implicit null check regardless of
218 // embedded loads
219 continue;
220 default: // Also check for embedded loads
221 if( !mach->needs_anti_dependence_check() )
222 continue; // Not an memory op; skip it
223 if( must_clone[iop] ) {
224 // Do not move nodes which produce flags because
225 // RA will try to clone it to place near branch and
226 // it will cause recompilation, see clone_node().
227 continue;
228 }
229 {
230 // Check that value is used in memory address in
231 // instructions with embedded load (CmpP val1,(val2+off)).
232 Node* base;
233 Node* index;
234 const MachOper* oper = mach->memory_inputs(base, index);
235 if (oper == nullptr || oper == (MachOper*)-1) {
236 continue; // Not an memory op; skip it
237 }
238 if (val == base ||
239 (val == index && val->bottom_type()->isa_narrowoop())) {
240 break; // Found it
241 } else {
242 continue; // Skip it
243 }
244 }
245 break;
246 }
247
248 // On some OSes (AIX) the page at address 0 is only write protected.
249 // If so, only Store operations will trap.
250 // But a read accessing the base of a heap-based compressed heap will trap.
251 if (!was_store && needs_explicit_null_check_for_read(val)) {
252 continue;
253 }
254
255 // Check that node's control edge is not-null block's head or dominates it,
256 // otherwise we can't hoist it because there are other control dependencies.
257 Node* ctrl = mach->in(0);
258 if (ctrl != nullptr && !(ctrl == not_null_block->head() ||
259 get_block_for_node(ctrl)->dominates(not_null_block))) {
260 continue;
261 }
262
263 // check if the offset is not too high for implicit exception
264 {
265 intptr_t offset = 0;
266 const TypePtr *adr_type = nullptr; // Do not need this return value here
267 const Node* base = mach->get_base_and_disp(offset, adr_type);
268 if (base == nullptr || base == NodeSentinel) {
269 // Narrow oop address doesn't have base, only index.
270 // Give up if offset is beyond page size or if heap base is not protected.
271 if (val->bottom_type()->isa_narrowoop() &&
272 (MacroAssembler::needs_explicit_null_check(offset) ||
273 !CompressedOops::use_implicit_null_checks()))
274 continue;
275 // cannot reason about it; is probably not implicit null exception
276 } else {
277 const TypePtr* tptr;
278 if ((UseCompressedOops || UseCompressedClassPointers) &&
279 (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
280 // 32-bits narrow oop can be the base of address expressions
281 tptr = base->get_ptr_type();
282 } else {
283 // only regular oops are expected here
284 tptr = base->bottom_type()->is_ptr();
285 }
286 // Give up if offset is not a compile-time constant.
287 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
288 continue;
289 offset += tptr->_offset; // correct if base is offsetted
290 // Give up if reference is beyond page size.
291 if (MacroAssembler::needs_explicit_null_check(offset))
292 continue;
293 // Give up if base is a decode node and the heap base is not protected.
294 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
295 !CompressedOops::use_implicit_null_checks())
296 continue;
297 }
298 }
299
300 // Check ctrl input to see if the null-check dominates the memory op
301 Block *cb = get_block_for_node(mach);
302 cb = cb->_idom; // Always hoist at least 1 block
303 if( !was_store ) { // Stores can be hoisted only one block
304 while( cb->_dom_depth > (block->_dom_depth + 1))
305 cb = cb->_idom; // Hoist loads as far as we want
306 // The non-null-block should dominate the memory op, too. Live
307 // range spilling will insert a spill in the non-null-block if it is
308 // needs to spill the memory op for an implicit null check.
309 if (cb->_dom_depth == (block->_dom_depth + 1)) {
310 if (cb != not_null_block) continue;
311 cb = cb->_idom;
312 }
313 }
314 if( cb != block ) continue;
315
316 // Found a memory user; see if it can be hoisted to check-block
317 uint vidx = 0; // Capture index of value into memop
318 uint j;
319 for( j = mach->req()-1; j > 0; j-- ) {
320 if( mach->in(j) == val ) {
321 vidx = j;
322 // Ignore DecodeN val which could be hoisted to where needed.
323 if( is_decoden ) continue;
324 }
325 // Block of memory-op input
326 Block *inb = get_block_for_node(mach->in(j));
327 Block *b = block; // Start from nul check
328 while( b != inb && b->_dom_depth > inb->_dom_depth )
329 b = b->_idom; // search upwards for input
330 // See if input dominates null check
331 if( b != inb )
332 break;
333 }
334 if( j > 0 )
335 continue;
336 Block *mb = get_block_for_node(mach);
337 // Hoisting stores requires more checks for the anti-dependence case.
338 // Give up hoisting if we have to move the store past any load.
339 if (was_store) {
340 // Make sure control does not do a merge (would have to check allpaths)
341 if (mb->num_preds() != 2) {
342 continue;
343 }
344 // mach is a store, hence block is the immediate dominator of mb.
345 // Due to the null-check shape of block (where its successors cannot re-join),
346 // block must be the direct predecessor of mb.
347 assert(get_block_for_node(mb->pred(1)) == block, "Unexpected predecessor block");
348 uint k;
349 uint num_nodes = mb->number_of_nodes();
350 for (k = 1; k < num_nodes; k++) {
351 Node *n = mb->get_node(k);
352 if (n->needs_anti_dependence_check() &&
353 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory)) {
354 break; // Found anti-dependent load
355 }
356 }
357 if (k < num_nodes) {
358 continue; // Found anti-dependent load
359 }
360 }
361
362 // Make sure this memory op is not already being used for a NullCheck
363 Node *e = mb->end();
364 if( e->is_MachNullCheck() && e->in(1) == mach )
365 continue; // Already being used as a null check
366
367 // Found a candidate! Pick one with least dom depth - the highest
368 // in the dom tree should be closest to the null check.
369 if (best == nullptr || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
370 best = mach;
371 bidx = vidx;
372 }
373 }
374 // No candidate!
375 if (best == nullptr) {
376 return;
377 }
378
379 // ---- Found an implicit null check
380 #ifndef PRODUCT
381 extern uint implicit_null_checks;
382 implicit_null_checks++;
383 #endif
384
385 if( is_decoden ) {
386 // Check if we need to hoist decodeHeapOop_not_null first.
387 Block *valb = get_block_for_node(val);
388 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
389 // Hoist it up to the end of the test block together with its inputs if they exist.
390 for (uint i = 2; i < val->req(); i++) {
391 // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
392 Node *temp = val->in(i);
393 Block *tempb = get_block_for_node(temp);
394 if (!tempb->dominates(block)) {
395 assert(block->dominates(tempb), "sanity check: temp node placement");
396 // We only expect nodes without further inputs, like MachTemp or load Base.
397 assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
398 "need for recursive hoisting not expected");
399 tempb->find_remove(temp);
400 block->add_inst(temp);
401 map_node_to_block(temp, block);
402 }
403 }
404 valb->find_remove(val);
405 block->add_inst(val);
406 map_node_to_block(val, block);
407 // DecodeN on x86 may kill flags. Check for flag-killing projections
408 // that also need to be hoisted.
409 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
410 Node* n = val->fast_out(j);
411 if( n->is_MachProj() ) {
412 get_block_for_node(n)->find_remove(n);
413 block->add_inst(n);
414 map_node_to_block(n, block);
415 }
416 }
417 }
418 }
419 // Hoist the memory candidate up to the end of the test block.
420 Block *old_block = get_block_for_node(best);
421 old_block->find_remove(best);
422 block->add_inst(best);
423 map_node_to_block(best, block);
424
425 // Move the control dependence if it is pinned to not-null block.
426 // Don't change it in other cases: null or dominating control.
427 Node* ctrl = best->in(0);
428 if (ctrl != nullptr && get_block_for_node(ctrl) == not_null_block) {
429 // Set it to control edge of null check.
430 best->set_req(0, proj->in(0)->in(0));
431 }
432
433 // Check for flag-killing projections that also need to be hoisted
434 // Should be DU safe because no edge updates.
435 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
436 Node* n = best->fast_out(j);
437 if( n->is_MachProj() ) {
438 get_block_for_node(n)->find_remove(n);
439 block->add_inst(n);
440 map_node_to_block(n, block);
441 }
442 }
443
444 // proj==Op_True --> ne test; proj==Op_False --> eq test.
445 // One of two graph shapes got matched:
446 // (IfTrue (If (Bool NE (CmpP ptr null))))
447 // (IfFalse (If (Bool EQ (CmpP ptr null))))
448 // null checks are always branch-if-eq. If we see a IfTrue projection
449 // then we are replacing a 'ne' test with a 'eq' null check test.
450 // We need to flip the projections to keep the same semantics.
451 if( proj->Opcode() == Op_IfTrue ) {
452 // Swap order of projections in basic block to swap branch targets
453 Node *tmp1 = block->get_node(block->end_idx()+1);
454 Node *tmp2 = block->get_node(block->end_idx()+2);
455 block->map_node(tmp2, block->end_idx()+1);
456 block->map_node(tmp1, block->end_idx()+2);
457 Node *tmp = new Node(C->top()); // Use not null input
458 tmp1->replace_by(tmp);
459 tmp2->replace_by(tmp1);
460 tmp->replace_by(tmp2);
461 tmp->destruct(nullptr);
462 }
463
464 // Remove the existing null check; use a new implicit null check instead.
465 // Since schedule-local needs precise def-use info, we need to correct
466 // it as well.
467 Node *old_tst = proj->in(0);
468 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
469 block->map_node(nul_chk, block->end_idx());
470 map_node_to_block(nul_chk, block);
471 // Redirect users of old_test to nul_chk
472 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
473 old_tst->last_out(i2)->set_req(0, nul_chk);
474 // Clean-up any dead code
475 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
476 Node* in = old_tst->in(i3);
477 old_tst->set_req(i3, nullptr);
478 if (in->outcnt() == 0) {
479 // Remove dead input node
480 in->disconnect_inputs(C);
481 block->find_remove(in);
482 }
483 }
484
485 latency_from_uses(nul_chk);
486 latency_from_uses(best);
487
488 // insert anti-dependences to defs in this block
489 if (! best->needs_anti_dependence_check()) {
490 for (uint k = 1; k < block->number_of_nodes(); k++) {
491 Node *n = block->get_node(k);
492 if (n->needs_anti_dependence_check() &&
493 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
494 // Found anti-dependent load
495 insert_anti_dependences(block, n);
496 }
497 }
498 }
499 }
500
501
502 //------------------------------select-----------------------------------------
503 // Select a nice fellow from the worklist to schedule next. If there is only one
504 // choice, then use it. CreateEx nodes that are initially ready must start their
505 // blocks and are given the highest priority, by being placed at the beginning
506 // of the worklist. Next after initially-ready CreateEx nodes are projections,
507 // which must follow their parents, and CreateEx nodes with local input
508 // dependencies. Next are constants and CheckCastPP nodes. There are a number of
509 // other special cases, for instructions that consume condition codes, et al.
510 // These are chosen immediately. Some instructions are required to immediately
511 // precede the last instruction in the block, and these are taken last. Of the
512 // remaining cases (most), choose the instruction with the greatest latency
513 // (that is, the most number of pseudo-cycles required to the end of the
514 // routine). If there is a tie, choose the instruction with the most inputs.
515 Node* PhaseCFG::select(
516 Block* block,
517 Node_List &worklist,
518 GrowableArray<int> &ready_cnt,
519 VectorSet &next_call,
520 uint sched_slot,
521 intptr_t* recalc_pressure_nodes) {
522
523 // If only a single entry on the stack, use it
524 uint cnt = worklist.size();
525 if (cnt == 1) {
526 Node *n = worklist[0];
527 worklist.map(0,worklist.pop());
528 return n;
529 }
530
531 uint choice = 0; // Bigger is most important
532 uint latency = 0; // Bigger is scheduled first
533 uint score = 0; // Bigger is better
534 int idx = -1; // Index in worklist
535 int cand_cnt = 0; // Candidate count
536 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
537
538 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
539 // Order in worklist is used to break ties.
540 // See caller for how this is used to delay scheduling
541 // of induction variable increments to after the other
542 // uses of the phi are scheduled.
543 Node *n = worklist[i]; // Get Node on worklist
544
545 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
546 if (iop == Op_CreateEx || n->is_Proj()) {
547 // CreateEx nodes that are initially ready must start the block (after Phi
548 // and Parm nodes which are pre-scheduled) and get top priority. This is
549 // currently enforced by placing them at the beginning of the initial
550 // worklist and selecting them eagerly here. After these, projections and
551 // other CreateEx nodes are selected with equal priority.
552 worklist.map(i,worklist.pop());
553 return n;
554 }
555
556 if (n->Opcode() == Op_Con || iop == Op_CheckCastPP) {
557 // Constants and CheckCastPP nodes have higher priority than the rest of
558 // the nodes tested below. Record as current winner, but keep looking for
559 // higher-priority nodes in the worklist.
560 choice = 4;
561 // Latency and score are only used to break ties among low-priority nodes.
562 latency = 0;
563 score = 0;
564 idx = i;
565 continue;
566 }
567
568 // Final call in a block must be adjacent to 'catch'
569 Node *e = block->end();
570 if( e->is_Catch() && e->in(0)->in(0) == n )
571 continue;
572
573 // Memory op for an implicit null check has to be at the end of the block
574 if( e->is_MachNullCheck() && e->in(1) == n )
575 continue;
576
577 // Schedule IV increment last.
578 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
579 // Cmp might be matched into CountedLoopEnd node.
580 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
581 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
582 continue;
583 }
584 }
585
586 uint n_choice = 2;
587
588 // See if this instruction is consumed by a branch. If so, then (as the
589 // branch is the last instruction in the basic block) force it to the
590 // end of the basic block
591 if ( must_clone[iop] ) {
592 // See if any use is a branch
593 bool found_machif = false;
594
595 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
596 Node* use = n->fast_out(j);
597
598 // The use is a conditional branch, make them adjacent
599 if (use->is_MachIf() && get_block_for_node(use) == block) {
600 found_machif = true;
601 break;
602 }
603
604 // More than this instruction pending for successor to be ready,
605 // don't choose this if other opportunities are ready
606 if (ready_cnt.at(use->_idx) > 1)
607 n_choice = 1;
608 }
609
610 // loop terminated, prefer not to use this instruction
611 if (found_machif)
612 continue;
613 }
614
615 // See if this has a predecessor that is "must_clone", i.e. sets the
616 // condition code. If so, choose this first
617 for (uint j = 0; j < n->req() ; j++) {
618 Node *inn = n->in(j);
619 if (inn) {
620 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
621 n_choice = 3;
622 break;
623 }
624 }
625 }
626
627 // MachTemps should be scheduled last so they are near their uses
628 if (n->is_MachTemp()) {
629 n_choice = 1;
630 }
631
632 uint n_latency = get_latency_for_node(n);
633 uint n_score = n->req(); // Many inputs get high score to break ties
634
635 if (OptoRegScheduling && block_size_threshold_ok) {
636 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
637 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
638 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
639 // simulate the notion that we just picked this node to schedule
640 n->add_flag(Node::Flag_is_scheduled);
641 // now calculate its effect upon the graph if we did
642 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
643 // return its state for finalize in case somebody else wins
644 n->remove_flag(Node::Flag_is_scheduled);
645 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
646 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
647 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
648 recalc_pressure_nodes[n->_idx] = int_pressure;
649 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
650 }
651
652 if (_scheduling_for_pressure) {
653 latency = n_latency;
654 if (n_choice != 3) {
655 // Now evaluate each register pressure component based on threshold in the score.
656 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
657 // on a single instruction, but we might see it shrink on both banks.
658 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
659 // live ranges that terminate on this instruction.
660 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
661 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
662 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
663 }
664 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
665 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
666 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
667 }
668 } else {
669 // make sure we choose these candidates
670 score = 0;
671 }
672 }
673 }
674
675 // Keep best latency found
676 cand_cnt++;
677 if (choice < n_choice ||
678 (choice == n_choice &&
679 ((StressLCM && C->randomized_select(cand_cnt)) ||
680 (!StressLCM &&
681 (latency < n_latency ||
682 (latency == n_latency &&
683 (score < n_score))))))) {
684 choice = n_choice;
685 latency = n_latency;
686 score = n_score;
687 idx = i; // Also keep index in worklist
688 }
689 } // End of for all ready nodes in worklist
690
691 guarantee(idx >= 0, "index should be set");
692 Node *n = worklist[(uint)idx]; // Get the winner
693
694 worklist.map((uint)idx, worklist.pop()); // Compress worklist
695 return n;
696 }
697
698 //-------------------------adjust_register_pressure----------------------------
699 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
700 PhaseLive* liveinfo = _regalloc->get_live();
701 IndexSet* liveout = liveinfo->live(block);
702 // first adjust the register pressure for the sources
703 for (uint i = 1; i < n->req(); i++) {
704 bool lrg_ends = false;
705 Node *src_n = n->in(i);
706 if (src_n == nullptr) continue;
707 if (!src_n->is_Mach()) continue;
708 uint src = _regalloc->_lrg_map.find(src_n);
709 if (src == 0) continue;
710 LRG& lrg_src = _regalloc->lrgs(src);
711 // detect if the live range ends or not
712 if (liveout->member(src) == false) {
713 lrg_ends = true;
714 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
715 Node* m = src_n->fast_out(j); // Get user
716 if (m == n) continue;
717 if (!m->is_Mach()) continue;
718 MachNode *mach = m->as_Mach();
719 bool src_matches = false;
720 int iop = mach->ideal_Opcode();
721
722 switch (iop) {
723 case Op_StoreB:
724 case Op_StoreC:
725 case Op_StoreD:
726 case Op_StoreF:
727 case Op_StoreI:
728 case Op_StoreL:
729 case Op_StoreP:
730 case Op_StoreN:
731 case Op_StoreVector:
732 case Op_StoreVectorMasked:
733 case Op_StoreVectorScatter:
734 case Op_StoreVectorScatterMasked:
735 case Op_StoreNKlass:
736 for (uint k = 1; k < m->req(); k++) {
737 Node *in = m->in(k);
738 if (in == src_n) {
739 src_matches = true;
740 break;
741 }
742 }
743 break;
744
745 default:
746 src_matches = true;
747 break;
748 }
749
750 // If we have a store as our use, ignore the non source operands
751 if (src_matches == false) continue;
752
753 // Mark every unscheduled use which is not n with a recalculation
754 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
755 if (finalize_mode && !m->is_Phi()) {
756 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
757 }
758 lrg_ends = false;
759 }
760 }
761 }
762 // if none, this live range ends and we can adjust register pressure
763 if (lrg_ends) {
764 if (finalize_mode) {
765 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
766 } else {
767 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
768 }
769 }
770 }
771
772 // now add the register pressure from the dest and evaluate which heuristic we should use:
773 // 1.) The default, latency scheduling
774 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
775 uint dst = _regalloc->_lrg_map.find(n);
776 if (dst != 0) {
777 LRG& lrg_dst = _regalloc->lrgs(dst);
778 if (finalize_mode) {
779 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
780 // check to see if we fall over the register pressure cliff here
781 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
782 _scheduling_for_pressure = true;
783 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
784 _scheduling_for_pressure = true;
785 } else {
786 // restore latency scheduling mode
787 _scheduling_for_pressure = false;
788 }
789 } else {
790 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
791 }
792 }
793 }
794
795 //------------------------------set_next_call----------------------------------
796 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
797 if( next_call.test_set(n->_idx) ) return;
798 for( uint i=0; i<n->len(); i++ ) {
799 Node *m = n->in(i);
800 if( !m ) continue; // must see all nodes in block that precede call
801 if (get_block_for_node(m) == block) {
802 set_next_call(block, m, next_call);
803 }
804 }
805 }
806
807 //------------------------------needed_for_next_call---------------------------
808 // Set the flag 'next_call' for each Node that is needed for the next call to
809 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
810 // next subroutine call get priority - basically it moves things NOT needed
811 // for the next call till after the call. This prevents me from trying to
812 // carry lots of stuff live across a call.
813 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
814 // Find the next control-defining Node in this block
815 Node* call = nullptr;
816 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
817 Node* m = this_call->fast_out(i);
818 if (get_block_for_node(m) == block && // Local-block user
819 m != this_call && // Not self-start node
820 m->is_MachCall()) {
821 call = m;
822 break;
823 }
824 }
825 if (call == nullptr) return; // No next call (e.g., block end is near)
826 // Set next-call for all inputs to this call
827 set_next_call(block, call, next_call);
828 }
829
830 //------------------------------add_call_kills-------------------------------------
831 // helper function that adds caller save registers to MachProjNode
832 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
833 // Fill in the kill mask for the call
834 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
835 if( !regs.Member(r) ) { // Not already defined by the call
836 // Save-on-call register?
837 if ((save_policy[r] == 'C') ||
838 (save_policy[r] == 'A') ||
839 ((save_policy[r] == 'E') && exclude_soe)) {
840 proj->_rout.Insert(r);
841 }
842 }
843 }
844 }
845
846
847 //------------------------------sched_call-------------------------------------
848 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
849 RegMask regs;
850
851 // Schedule all the users of the call right now. All the users are
852 // projection Nodes, so they must be scheduled next to the call.
853 // Collect all the defined registers.
854 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
855 Node* n = mcall->fast_out(i);
856 assert( n->is_MachProj(), "" );
857 int n_cnt = ready_cnt.at(n->_idx)-1;
858 ready_cnt.at_put(n->_idx, n_cnt);
859 assert( n_cnt == 0, "" );
860 // Schedule next to call
861 block->map_node(n, node_cnt++);
862 // Collect defined registers
863 regs.OR(n->out_RegMask());
864 // Check for scheduling the next control-definer
865 if( n->bottom_type() == Type::CONTROL )
866 // Warm up next pile of heuristic bits
867 needed_for_next_call(block, n, next_call);
868
869 // Children of projections are now all ready
870 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
871 Node* m = n->fast_out(j); // Get user
872 if(get_block_for_node(m) != block) {
873 continue;
874 }
875 if( m->is_Phi() ) continue;
876 int m_cnt = ready_cnt.at(m->_idx) - 1;
877 ready_cnt.at_put(m->_idx, m_cnt);
878 if( m_cnt == 0 )
879 worklist.push(m);
880 }
881
882 }
883
884 // Act as if the call defines the Frame Pointer.
885 // Certainly the FP is alive and well after the call.
886 regs.Insert(_matcher.c_frame_pointer());
887
888 // Set all registers killed and not already defined by the call.
889 uint r_cnt = mcall->tf()->range()->cnt();
890 int op = mcall->ideal_Opcode();
891 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
892 map_node_to_block(proj, block);
893 block->insert_node(proj, node_cnt++);
894
895 // Select the right register save policy.
896 const char *save_policy = nullptr;
897 switch (op) {
898 case Op_CallRuntime:
899 case Op_CallLeaf:
900 case Op_CallLeafNoFP:
901 case Op_CallLeafVector:
902 // Calling C code so use C calling convention
903 save_policy = _matcher._c_reg_save_policy;
904 break;
905
906 case Op_CallStaticJava:
907 case Op_CallDynamicJava:
908 // Calling Java code so use Java calling convention
909 save_policy = _matcher._register_save_policy;
910 break;
911
912 default:
913 ShouldNotReachHere();
914 }
915
916 // When using CallRuntime mark SOE registers as killed by the call
917 // so values that could show up in the RegisterMap aren't live in a
918 // callee saved register since the register wouldn't know where to
919 // find them. CallLeaf and CallLeafNoFP are ok because they can't
920 // have debug info on them. Strictly speaking this only needs to be
921 // done for oops since idealreg2debugmask takes care of debug info
922 // references but there no way to handle oops differently than other
923 // pointers as far as the kill mask goes.
924 bool exclude_soe = op == Op_CallRuntime;
925
926 // If the call is a MethodHandle invoke, we need to exclude the
927 // register which is used to save the SP value over MH invokes from
928 // the mask. Otherwise this register could be used for
929 // deoptimization information.
930 if (op == Op_CallStaticJava) {
931 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
932 if (mcallstaticjava->_method_handle_invoke)
933 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
934 }
935
936 add_call_kills(proj, regs, save_policy, exclude_soe);
937
938 return node_cnt;
939 }
940
941
942 //------------------------------schedule_local---------------------------------
943 // Topological sort within a block. Someday become a real scheduler.
944 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
945 // Already "sorted" are the block start Node (as the first entry), and
946 // the block-ending Node and any trailing control projections. We leave
947 // these alone. PhiNodes and ParmNodes are made to follow the block start
948 // Node. Everything else gets topo-sorted.
949
950 #ifndef PRODUCT
951 if (trace_opto_pipelining()) {
952 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
953 for (uint i = 0;i < block->number_of_nodes(); i++) {
954 tty->print("# ");
955 block->get_node(i)->dump();
956 }
957 tty->print_cr("#");
958 }
959 #endif
960
961 // RootNode is already sorted
962 if (block->number_of_nodes() == 1) {
963 return true;
964 }
965
966 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
967
968 // We track the uses of local definitions as input dependences so that
969 // we know when a given instruction is available to be scheduled.
970 uint i;
971 if (OptoRegScheduling && block_size_threshold_ok) {
972 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
973 Node *n = block->get_node(i);
974 n->remove_flag(Node::Flag_is_scheduled);
975 if (!n->is_Phi()) {
976 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
977 }
978 }
979 }
980
981 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
982 uint node_cnt = block->end_idx();
983 uint phi_cnt = 1;
984 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
985 Node *n = block->get_node(i);
986 if( n->is_Phi() || // Found a PhiNode or ParmNode
987 (n->is_Proj() && n->in(0) == block->head()) ) {
988 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
989 block->map_node(block->get_node(phi_cnt), i);
990 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
991 if (OptoRegScheduling && block_size_threshold_ok) {
992 // mark n as scheduled
993 n->add_flag(Node::Flag_is_scheduled);
994 }
995 } else { // All others
996 // Count block-local inputs to 'n'
997 uint cnt = n->len(); // Input count
998 uint local = 0;
999 for( uint j=0; j<cnt; j++ ) {
1000 Node *m = n->in(j);
1001 if( m && get_block_for_node(m) == block && !m->is_top() )
1002 local++; // One more block-local input
1003 }
1004 ready_cnt.at_put(n->_idx, local); // Count em up
1005 // A few node types require changing a required edge to a precedence edge
1006 // before allocation.
1007 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1008 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1009 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1010 // MemBarAcquire could be created without Precedent edge.
1011 // del_req() replaces the specified edge with the last input edge
1012 // and then removes the last edge. If the specified edge > number of
1013 // edges the last edge will be moved outside of the input edges array
1014 // and the edge will be lost. This is why this code should be
1015 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1016 Node *x = n->in(TypeFunc::Parms);
1017 if (x != nullptr && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1018 // Old edge to node within same block will get removed, but no precedence
1019 // edge will get added because it already exists. Update ready count.
1020 int cnt = ready_cnt.at(n->_idx);
1021 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1022 ready_cnt.at_put(n->_idx, cnt-1);
1023 }
1024 n->del_req(TypeFunc::Parms);
1025 n->add_prec(x);
1026 }
1027 }
1028 }
1029 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1030 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1031
1032 // All the prescheduled guys do not hold back internal nodes
1033 uint i3;
1034 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1035 Node *n = block->get_node(i3); // Get pre-scheduled
1036 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1037 Node* m = n->fast_out(j);
1038 if (get_block_for_node(m) == block) { // Local-block user
1039 int m_cnt = ready_cnt.at(m->_idx)-1;
1040 if (OptoRegScheduling && block_size_threshold_ok) {
1041 // mark m as scheduled
1042 if (m_cnt < 0) {
1043 m->add_flag(Node::Flag_is_scheduled);
1044 }
1045 }
1046 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1047 }
1048 }
1049 }
1050
1051 Node_List delay;
1052 // Make a worklist
1053 Node_List worklist;
1054 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1055 Node *m = block->get_node(i4);
1056 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1057 if (m->is_iteratively_computed()) {
1058 // Push induction variable increments last to allow other uses
1059 // of the phi to be scheduled first. The select() method breaks
1060 // ties in scheduling by worklist order.
1061 delay.push(m);
1062 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1063 // Place CreateEx nodes that are initially ready at the beginning of the
1064 // worklist so they are selected first and scheduled at the block start.
1065 worklist.insert(0, m);
1066 } else {
1067 worklist.push(m); // Then on to worklist!
1068 }
1069 }
1070 }
1071 while (delay.size()) {
1072 Node* d = delay.pop();
1073 worklist.push(d);
1074 }
1075
1076 if (OptoRegScheduling && block_size_threshold_ok) {
1077 // To stage register pressure calculations we need to examine the live set variables
1078 // breaking them up by register class to compartmentalize the calculations.
1079 _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1080 _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1081 _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1082 _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1083
1084 _regalloc->compute_entry_block_pressure(block);
1085 }
1086
1087 // Warm up the 'next_call' heuristic bits
1088 needed_for_next_call(block, block->head(), next_call);
1089
1090 #ifndef PRODUCT
1091 if (trace_opto_pipelining()) {
1092 for (uint j=0; j< block->number_of_nodes(); j++) {
1093 Node *n = block->get_node(j);
1094 int idx = n->_idx;
1095 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1096 tty->print("latency:%3d ", get_latency_for_node(n));
1097 tty->print("%4d: %s\n", idx, n->Name());
1098 }
1099 }
1100 #endif
1101
1102 uint max_idx = (uint)ready_cnt.length();
1103 // Pull from worklist and schedule
1104 while( worklist.size() ) { // Worklist is not ready
1105
1106 #ifndef PRODUCT
1107 if (trace_opto_pipelining()) {
1108 tty->print("# ready list:");
1109 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1110 Node *n = worklist[i]; // Get Node on worklist
1111 tty->print(" %d", n->_idx);
1112 }
1113 tty->cr();
1114 }
1115 #endif
1116
1117 // Select and pop a ready guy from worklist
1118 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1119 block->map_node(n, phi_cnt++); // Schedule him next
1120
1121 if (OptoRegScheduling && block_size_threshold_ok) {
1122 n->add_flag(Node::Flag_is_scheduled);
1123
1124 // Now adjust the resister pressure with the node we selected
1125 if (!n->is_Phi()) {
1126 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1127 }
1128 }
1129
1130 #ifndef PRODUCT
1131 if (trace_opto_pipelining()) {
1132 tty->print("# select %d: %s", n->_idx, n->Name());
1133 tty->print(", latency:%d", get_latency_for_node(n));
1134 n->dump();
1135 if (Verbose) {
1136 tty->print("# ready list:");
1137 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1138 Node *n = worklist[i]; // Get Node on worklist
1139 tty->print(" %d", n->_idx);
1140 }
1141 tty->cr();
1142 }
1143 }
1144
1145 #endif
1146 if( n->is_MachCall() ) {
1147 MachCallNode *mcall = n->as_MachCall();
1148 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1149 continue;
1150 }
1151
1152 if (n->is_Mach() && n->as_Mach()->has_call()) {
1153 RegMask regs;
1154 regs.Insert(_matcher.c_frame_pointer());
1155 regs.OR(n->out_RegMask());
1156
1157 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1158 map_node_to_block(proj, block);
1159 block->insert_node(proj, phi_cnt++);
1160
1161 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1162 }
1163
1164 // Children are now all ready
1165 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1166 Node* m = n->fast_out(i5); // Get user
1167 if (get_block_for_node(m) != block) {
1168 continue;
1169 }
1170 if( m->is_Phi() ) continue;
1171 if (m->_idx >= max_idx) { // new node, skip it
1172 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1173 continue;
1174 }
1175 int m_cnt = ready_cnt.at(m->_idx) - 1;
1176 ready_cnt.at_put(m->_idx, m_cnt);
1177 if( m_cnt == 0 )
1178 worklist.push(m);
1179 }
1180 }
1181
1182 if( phi_cnt != block->end_idx() ) {
1183 // did not schedule all. Retry, Bailout, or Die
1184 if (C->subsume_loads() == true && !C->failing()) {
1185 // Retry with subsume_loads == false
1186 // If this is the first failure, the sentinel string will "stick"
1187 // to the Compile object, and the C2Compiler will see it and retry.
1188 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1189 } else {
1190 assert(C->failure_is_artificial(), "graph should be schedulable");
1191 }
1192 // assert( phi_cnt == end_idx(), "did not schedule all" );
1193 return false;
1194 }
1195
1196 if (OptoRegScheduling && block_size_threshold_ok) {
1197 _regalloc->compute_exit_block_pressure(block);
1198 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1199 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1200 }
1201
1202 #ifndef PRODUCT
1203 if (trace_opto_pipelining()) {
1204 tty->print_cr("#");
1205 tty->print_cr("# after schedule_local");
1206 for (uint i = 0;i < block->number_of_nodes();i++) {
1207 tty->print("# ");
1208 block->get_node(i)->dump();
1209 }
1210 tty->print_cr("# ");
1211
1212 if (OptoRegScheduling && block_size_threshold_ok) {
1213 tty->print_cr("# pressure info : %d", block->_pre_order);
1214 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1215 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1216 }
1217 tty->cr();
1218 }
1219 #endif
1220
1221 return true;
1222 }
1223
1224 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1225 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1226 for (uint l = 0; l < use->len(); l++) {
1227 if (use->in(l) == old_def) {
1228 if (l < use->req()) {
1229 use->set_req(l, new_def);
1230 } else {
1231 use->rm_prec(l);
1232 use->add_prec(new_def);
1233 l--;
1234 }
1235 }
1236 }
1237 }
1238
1239 //------------------------------catch_cleanup_find_cloned_def------------------
1240 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1241 assert( use_blk != def_blk, "Inter-block cleanup only");
1242
1243 // The use is some block below the Catch. Find and return the clone of the def
1244 // that dominates the use. If there is no clone in a dominating block, then
1245 // create a phi for the def in a dominating block.
1246
1247 // Find which successor block dominates this use. The successor
1248 // blocks must all be single-entry (from the Catch only; I will have
1249 // split blocks to make this so), hence they all dominate.
1250 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1251 use_blk = use_blk->_idom;
1252
1253 // Find the successor
1254 Node *fixup = nullptr;
1255
1256 uint j;
1257 for( j = 0; j < def_blk->_num_succs; j++ )
1258 if( use_blk == def_blk->_succs[j] )
1259 break;
1260
1261 if( j == def_blk->_num_succs ) {
1262 // Block at same level in dom-tree is not a successor. It needs a
1263 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1264 Node_Array inputs;
1265 for(uint k = 1; k < use_blk->num_preds(); k++) {
1266 Block* block = get_block_for_node(use_blk->pred(k));
1267 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1268 }
1269
1270 // Check to see if the use_blk already has an identical phi inserted.
1271 // If it exists, it will be at the first position since all uses of a
1272 // def are processed together.
1273 Node *phi = use_blk->get_node(1);
1274 if( phi->is_Phi() ) {
1275 fixup = phi;
1276 for (uint k = 1; k < use_blk->num_preds(); k++) {
1277 if (phi->in(k) != inputs[k]) {
1278 // Not a match
1279 fixup = nullptr;
1280 break;
1281 }
1282 }
1283 }
1284
1285 // If an existing PhiNode was not found, make a new one.
1286 if (fixup == nullptr) {
1287 Node *new_phi = PhiNode::make(use_blk->head(), def);
1288 use_blk->insert_node(new_phi, 1);
1289 map_node_to_block(new_phi, use_blk);
1290 for (uint k = 1; k < use_blk->num_preds(); k++) {
1291 new_phi->set_req(k, inputs[k]);
1292 }
1293 fixup = new_phi;
1294 }
1295
1296 } else {
1297 // Found the use just below the Catch. Make it use the clone.
1298 fixup = use_blk->get_node(n_clone_idx);
1299 }
1300
1301 return fixup;
1302 }
1303
1304 //--------------------------catch_cleanup_intra_block--------------------------
1305 // Fix all input edges in use that reference "def". The use is in the same
1306 // block as the def and both have been cloned in each successor block.
1307 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1308
1309 // Both the use and def have been cloned. For each successor block,
1310 // get the clone of the use, and make its input the clone of the def
1311 // found in that block.
1312
1313 uint use_idx = blk->find_node(use);
1314 uint offset_idx = use_idx - beg;
1315 for( uint k = 0; k < blk->_num_succs; k++ ) {
1316 // Get clone in each successor block
1317 Block *sb = blk->_succs[k];
1318 Node *clone = sb->get_node(offset_idx+1);
1319 assert( clone->Opcode() == use->Opcode(), "" );
1320
1321 // Make use-clone reference the def-clone
1322 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1323 }
1324 }
1325
1326 //------------------------------catch_cleanup_inter_block---------------------
1327 // Fix all input edges in use that reference "def". The use is in a different
1328 // block than the def.
1329 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1330 if( !use_blk ) return; // Can happen if the use is a precedence edge
1331
1332 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1333 catch_cleanup_fix_all_inputs(use, def, new_def);
1334 }
1335
1336 //------------------------------call_catch_cleanup-----------------------------
1337 // If we inserted any instructions between a Call and his CatchNode,
1338 // clone the instructions on all paths below the Catch.
1339 void PhaseCFG::call_catch_cleanup(Block* block) {
1340
1341 // End of region to clone
1342 uint end = block->end_idx();
1343 if( !block->get_node(end)->is_Catch() ) return;
1344 // Start of region to clone
1345 uint beg = end;
1346 while(!block->get_node(beg-1)->is_MachProj() ||
1347 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1348 beg--;
1349 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1350 }
1351 // Range of inserted instructions is [beg, end)
1352 if( beg == end ) return;
1353
1354 // Clone along all Catch output paths. Clone area between the 'beg' and
1355 // 'end' indices.
1356 for( uint i = 0; i < block->_num_succs; i++ ) {
1357 Block *sb = block->_succs[i];
1358 // Clone the entire area; ignoring the edge fixup for now.
1359 for( uint j = end; j > beg; j-- ) {
1360 Node *clone = block->get_node(j-1)->clone();
1361 sb->insert_node(clone, 1);
1362 map_node_to_block(clone, sb);
1363 if (clone->needs_anti_dependence_check()) {
1364 insert_anti_dependences(sb, clone);
1365 }
1366 }
1367 }
1368
1369
1370 // Fixup edges. Check the def-use info per cloned Node
1371 for(uint i2 = beg; i2 < end; i2++ ) {
1372 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1373 Node *n = block->get_node(i2); // Node that got cloned
1374 // Need DU safe iterator because of edge manipulation in calls.
1375 Unique_Node_List* out = new Unique_Node_List();
1376 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1377 out->push(n->fast_out(j1));
1378 }
1379 uint max = out->size();
1380 for (uint j = 0; j < max; j++) {// For all users
1381 Node *use = out->pop();
1382 Block *buse = get_block_for_node(use);
1383 if( use->is_Phi() ) {
1384 for( uint k = 1; k < use->req(); k++ )
1385 if( use->in(k) == n ) {
1386 Block* b = get_block_for_node(buse->pred(k));
1387 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1388 use->set_req(k, fixup);
1389 }
1390 } else {
1391 if (block == buse) {
1392 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1393 } else {
1394 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1395 }
1396 }
1397 } // End for all users
1398
1399 } // End of for all Nodes in cloned area
1400
1401 // Remove the now-dead cloned ops
1402 for(uint i3 = beg; i3 < end; i3++ ) {
1403 block->get_node(beg)->disconnect_inputs(C);
1404 block->remove_node(beg);
1405 }
1406
1407 // If the successor blocks have a CreateEx node, move it back to the top
1408 for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1409 Block *sb = block->_succs[i4];
1410 uint new_cnt = end - beg;
1411 // Remove any newly created, but dead, nodes by traversing their schedule
1412 // backwards. Here, a dead node is a node whose only outputs (if any) are
1413 // unused projections.
1414 for (uint j = new_cnt; j > 0; j--) {
1415 Node *n = sb->get_node(j);
1416 // Individual projections are examined together with all siblings when
1417 // their parent is visited.
1418 if (n->is_Proj()) {
1419 continue;
1420 }
1421 bool dead = true;
1422 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1423 Node* out = n->fast_out(i);
1424 // n is live if it has a non-projection output or a used projection.
1425 if (!out->is_Proj() || out->outcnt() > 0) {
1426 dead = false;
1427 break;
1428 }
1429 }
1430 if (dead) {
1431 // n's only outputs (if any) are unused projections scheduled next to n
1432 // (see PhaseCFG::select()). Remove these projections backwards.
1433 for (uint k = j + n->outcnt(); k > j; k--) {
1434 Node* proj = sb->get_node(k);
1435 assert(proj->is_Proj() && proj->in(0) == n,
1436 "projection should correspond to dead node");
1437 proj->disconnect_inputs(C);
1438 sb->remove_node(k);
1439 new_cnt--;
1440 }
1441 // Now remove the node itself.
1442 n->disconnect_inputs(C);
1443 sb->remove_node(j);
1444 new_cnt--;
1445 }
1446 }
1447 // If any newly created nodes remain, move the CreateEx node to the top
1448 if (new_cnt > 0) {
1449 Node *cex = sb->get_node(1+new_cnt);
1450 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1451 sb->remove_node(1+new_cnt);
1452 sb->insert_node(cex, 1);
1453 }
1454 }
1455 }
1456 }