1 /*
2 * Copyright (c) 1998, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/shared/gc_globals.hpp"
28 #include "memory/allocation.inline.hpp"
29 #include "oops/compressedOops.hpp"
30 #include "opto/ad.hpp"
31 #include "opto/block.hpp"
32 #include "opto/c2compiler.hpp"
33 #include "opto/callnode.hpp"
34 #include "opto/cfgnode.hpp"
35 #include "opto/machnode.hpp"
36 #include "opto/runtime.hpp"
37 #include "opto/chaitin.hpp"
38 #include "runtime/os.inline.hpp"
39 #include "runtime/sharedRuntime.hpp"
40
41 // Optimization - Graph Style
42
43 // Check whether val is not-null-decoded compressed oop,
44 // i.e. will grab into the base of the heap if it represents null.
45 static bool accesses_heap_base_zone(Node *val) {
46 if (CompressedOops::base() != nullptr) { // Implies UseCompressedOops.
47 if (val && val->is_Mach()) {
48 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
49 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
50 // decode null to point to the heap base (Decode_NN).
51 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
52 return true;
53 }
54 }
55 // Must recognize load operation with Decode matched in memory operand.
56 // We should not reach here except for PPC/AIX, as os::zero_page_read_protected()
57 // returns true everywhere else. On PPC, no such memory operands
58 // exist, therefore we did not yet implement a check for such operands.
59 NOT_AIX(Unimplemented());
60 }
61 }
62 return false;
63 }
64
65 static bool needs_explicit_null_check_for_read(Node *val) {
66 // On some OSes (AIX) the page at address 0 is only write protected.
67 // If so, only Store operations will trap.
68 if (os::zero_page_read_protected()) {
69 return false; // Implicit null check will work.
70 }
71 // Also a read accessing the base of a heap-based compressed heap will trap.
72 if (accesses_heap_base_zone(val) && // Hits the base zone page.
73 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
74 return false;
75 }
76
77 return true;
78 }
79
80 //------------------------------implicit_null_check----------------------------
81 // Detect implicit-null-check opportunities. Basically, find null checks
82 // with suitable memory ops nearby. Use the memory op to do the null check.
83 // I can generate a memory op if there is not one nearby.
84 // The proj is the control projection for the not-null case.
85 // The val is the pointer being checked for nullness or
86 // decodeHeapOop_not_null node if it did not fold into address.
87 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
88 // Assume if null check need for 0 offset then always needed
89 // Intel solaris doesn't support any null checks yet and no
90 // mechanism exists (yet) to set the switches at an os_cpu level
91 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
92
93 // Make sure the ptr-is-null path appears to be uncommon!
94 float f = block->end()->as_MachIf()->_prob;
95 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
96 if( f > PROB_UNLIKELY_MAG(4) ) return;
97
98 uint bidx = 0; // Capture index of value into memop
99 bool was_store; // Memory op is a store op
100
101 // Get the successor block for if the test ptr is non-null
102 Block* not_null_block; // this one goes with the proj
103 Block* null_block;
104 if (block->get_node(block->number_of_nodes()-1) == proj) {
105 null_block = block->_succs[0];
106 not_null_block = block->_succs[1];
107 } else {
108 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
109 not_null_block = block->_succs[0];
110 null_block = block->_succs[1];
111 }
112 while (null_block->is_Empty() == Block::empty_with_goto) {
113 null_block = null_block->_succs[0];
114 }
115
116 // Search the exception block for an uncommon trap.
117 // (See Parse::do_if and Parse::do_ifnull for the reason
118 // we need an uncommon trap. Briefly, we need a way to
119 // detect failure of this optimization, as in 6366351.)
120 {
121 bool found_trap = false;
122 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
123 Node* nn = null_block->get_node(i1);
124 if (nn->is_MachCall() &&
125 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
126 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
127 if (trtype->isa_int() && trtype->is_int()->is_con()) {
128 jint tr_con = trtype->is_int()->get_con();
129 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
130 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
131 assert((int)reason < (int)BitsPerInt, "recode bit map");
132 if (is_set_nth_bit(allowed_reasons, (int) reason)
133 && action != Deoptimization::Action_none) {
134 // This uncommon trap is sure to recompile, eventually.
135 // When that happens, C->too_many_traps will prevent
136 // this transformation from happening again.
137 found_trap = true;
138 }
139 }
140 break;
141 }
142 }
143 if (!found_trap) {
144 // We did not find an uncommon trap.
145 return;
146 }
147 }
148
149 // Check for decodeHeapOop_not_null node which did not fold into address
150 bool is_decoden = ((intptr_t)val) & 1;
151 val = (Node*)(((intptr_t)val) & ~1);
152
153 assert(!is_decoden || (val->in(0) == nullptr) && val->is_Mach() &&
154 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
155
156 // Search the successor block for a load or store who's base value is also
157 // the tested value. There may be several.
158 MachNode *best = nullptr; // Best found so far
159 for (DUIterator i = val->outs(); val->has_out(i); i++) {
160 Node *m = val->out(i);
161 if( !m->is_Mach() ) continue;
162 MachNode *mach = m->as_Mach();
163 was_store = false;
164 int iop = mach->ideal_Opcode();
165 switch( iop ) {
166 case Op_LoadB:
167 case Op_LoadUB:
168 case Op_LoadUS:
169 case Op_LoadD:
170 case Op_LoadF:
171 case Op_LoadI:
172 case Op_LoadL:
173 case Op_LoadP:
174 case Op_LoadN:
175 case Op_LoadS:
176 case Op_LoadKlass:
177 case Op_LoadNKlass:
178 case Op_LoadRange:
179 case Op_LoadD_unaligned:
180 case Op_LoadL_unaligned:
181 assert(mach->in(2) == val, "should be address");
182 break;
183 case Op_StoreB:
184 case Op_StoreC:
185 case Op_StoreCM:
186 case Op_StoreD:
187 case Op_StoreF:
188 case Op_StoreI:
189 case Op_StoreL:
190 case Op_StoreP:
191 case Op_StoreN:
192 case Op_StoreNKlass:
193 was_store = true; // Memory op is a store op
194 // Stores will have their address in slot 2 (memory in slot 1).
195 // If the value being nul-checked is in another slot, it means we
196 // are storing the checked value, which does NOT check the value!
197 if( mach->in(2) != val ) continue;
198 break; // Found a memory op?
199 case Op_StrComp:
200 case Op_StrEquals:
201 case Op_StrIndexOf:
202 case Op_StrIndexOfChar:
203 case Op_AryEq:
204 case Op_VectorizedHashCode:
205 case Op_StrInflatedCopy:
206 case Op_StrCompressedCopy:
207 case Op_EncodeISOArray:
208 case Op_CountPositives:
209 // Not a legit memory op for implicit null check regardless of
210 // embedded loads
211 continue;
212 default: // Also check for embedded loads
213 if( !mach->needs_anti_dependence_check() )
214 continue; // Not an memory op; skip it
215 if( must_clone[iop] ) {
216 // Do not move nodes which produce flags because
217 // RA will try to clone it to place near branch and
218 // it will cause recompilation, see clone_node().
219 continue;
220 }
221 {
222 // Check that value is used in memory address in
223 // instructions with embedded load (CmpP val1,(val2+off)).
224 Node* base;
225 Node* index;
226 const MachOper* oper = mach->memory_inputs(base, index);
227 if (oper == nullptr || oper == (MachOper*)-1) {
228 continue; // Not an memory op; skip it
229 }
230 if (val == base ||
231 (val == index && val->bottom_type()->isa_narrowoop())) {
232 break; // Found it
233 } else {
234 continue; // Skip it
235 }
236 }
237 break;
238 }
239
240 // On some OSes (AIX) the page at address 0 is only write protected.
241 // If so, only Store operations will trap.
242 // But a read accessing the base of a heap-based compressed heap will trap.
243 if (!was_store && needs_explicit_null_check_for_read(val)) {
244 continue;
245 }
246
247 // Check that node's control edge is not-null block's head or dominates it,
248 // otherwise we can't hoist it because there are other control dependencies.
249 Node* ctrl = mach->in(0);
250 if (ctrl != nullptr && !(ctrl == not_null_block->head() ||
251 get_block_for_node(ctrl)->dominates(not_null_block))) {
252 continue;
253 }
254
255 // check if the offset is not too high for implicit exception
256 {
257 intptr_t offset = 0;
258 const TypePtr *adr_type = nullptr; // Do not need this return value here
259 const Node* base = mach->get_base_and_disp(offset, adr_type);
260 if (base == nullptr || base == NodeSentinel) {
261 // Narrow oop address doesn't have base, only index.
262 // Give up if offset is beyond page size or if heap base is not protected.
263 if (val->bottom_type()->isa_narrowoop() &&
264 (MacroAssembler::needs_explicit_null_check(offset) ||
265 !CompressedOops::use_implicit_null_checks()))
266 continue;
267 // cannot reason about it; is probably not implicit null exception
268 } else {
269 const TypePtr* tptr;
270 if ((UseCompressedOops || UseCompressedClassPointers) &&
271 (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
272 // 32-bits narrow oop can be the base of address expressions
273 tptr = base->get_ptr_type();
274 } else {
275 // only regular oops are expected here
276 tptr = base->bottom_type()->is_ptr();
277 }
278 // Give up if offset is not a compile-time constant.
279 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
280 continue;
281 offset += tptr->_offset; // correct if base is offsetted
282 // Give up if reference is beyond page size.
283 if (MacroAssembler::needs_explicit_null_check(offset))
284 continue;
285 // Give up if base is a decode node and the heap base is not protected.
286 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
287 !CompressedOops::use_implicit_null_checks())
288 continue;
289 }
290 }
291
292 // Check ctrl input to see if the null-check dominates the memory op
293 Block *cb = get_block_for_node(mach);
294 cb = cb->_idom; // Always hoist at least 1 block
295 if( !was_store ) { // Stores can be hoisted only one block
296 while( cb->_dom_depth > (block->_dom_depth + 1))
297 cb = cb->_idom; // Hoist loads as far as we want
298 // The non-null-block should dominate the memory op, too. Live
299 // range spilling will insert a spill in the non-null-block if it is
300 // needs to spill the memory op for an implicit null check.
301 if (cb->_dom_depth == (block->_dom_depth + 1)) {
302 if (cb != not_null_block) continue;
303 cb = cb->_idom;
304 }
305 }
306 if( cb != block ) continue;
307
308 // Found a memory user; see if it can be hoisted to check-block
309 uint vidx = 0; // Capture index of value into memop
310 uint j;
311 for( j = mach->req()-1; j > 0; j-- ) {
312 if( mach->in(j) == val ) {
313 vidx = j;
314 // Ignore DecodeN val which could be hoisted to where needed.
315 if( is_decoden ) continue;
316 }
317 // Block of memory-op input
318 Block *inb = get_block_for_node(mach->in(j));
319 Block *b = block; // Start from nul check
320 while( b != inb && b->_dom_depth > inb->_dom_depth )
321 b = b->_idom; // search upwards for input
322 // See if input dominates null check
323 if( b != inb )
324 break;
325 }
326 if( j > 0 )
327 continue;
328 Block *mb = get_block_for_node(mach);
329 // Hoisting stores requires more checks for the anti-dependence case.
330 // Give up hoisting if we have to move the store past any load.
331 if (was_store) {
332 // Make sure control does not do a merge (would have to check allpaths)
333 if (mb->num_preds() != 2) {
334 continue;
335 }
336 // mach is a store, hence block is the immediate dominator of mb.
337 // Due to the null-check shape of block (where its successors cannot re-join),
338 // block must be the direct predecessor of mb.
339 assert(get_block_for_node(mb->pred(1)) == block, "Unexpected predecessor block");
340 uint k;
341 uint num_nodes = mb->number_of_nodes();
342 for (k = 1; k < num_nodes; k++) {
343 Node *n = mb->get_node(k);
344 if (n->needs_anti_dependence_check() &&
345 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory)) {
346 break; // Found anti-dependent load
347 }
348 }
349 if (k < num_nodes) {
350 continue; // Found anti-dependent load
351 }
352 }
353
354 // Make sure this memory op is not already being used for a NullCheck
355 Node *e = mb->end();
356 if( e->is_MachNullCheck() && e->in(1) == mach )
357 continue; // Already being used as a null check
358
359 // Found a candidate! Pick one with least dom depth - the highest
360 // in the dom tree should be closest to the null check.
361 if (best == nullptr || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
362 best = mach;
363 bidx = vidx;
364 }
365 }
366 // No candidate!
367 if (best == nullptr) {
368 return;
369 }
370
371 // ---- Found an implicit null check
372 #ifndef PRODUCT
373 extern uint implicit_null_checks;
374 implicit_null_checks++;
375 #endif
376
377 if( is_decoden ) {
378 // Check if we need to hoist decodeHeapOop_not_null first.
379 Block *valb = get_block_for_node(val);
380 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
381 // Hoist it up to the end of the test block together with its inputs if they exist.
382 for (uint i = 2; i < val->req(); i++) {
383 // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
384 Node *temp = val->in(i);
385 Block *tempb = get_block_for_node(temp);
386 if (!tempb->dominates(block)) {
387 assert(block->dominates(tempb), "sanity check: temp node placement");
388 // We only expect nodes without further inputs, like MachTemp or load Base.
389 assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
390 "need for recursive hoisting not expected");
391 tempb->find_remove(temp);
392 block->add_inst(temp);
393 map_node_to_block(temp, block);
394 }
395 }
396 valb->find_remove(val);
397 block->add_inst(val);
398 map_node_to_block(val, block);
399 // DecodeN on x86 may kill flags. Check for flag-killing projections
400 // that also need to be hoisted.
401 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
402 Node* n = val->fast_out(j);
403 if( n->is_MachProj() ) {
404 get_block_for_node(n)->find_remove(n);
405 block->add_inst(n);
406 map_node_to_block(n, block);
407 }
408 }
409 }
410 }
411 // Hoist the memory candidate up to the end of the test block.
412 Block *old_block = get_block_for_node(best);
413 old_block->find_remove(best);
414 block->add_inst(best);
415 map_node_to_block(best, block);
416
417 // Move the control dependence if it is pinned to not-null block.
418 // Don't change it in other cases: null or dominating control.
419 Node* ctrl = best->in(0);
420 if (ctrl != nullptr && get_block_for_node(ctrl) == not_null_block) {
421 // Set it to control edge of null check.
422 best->set_req(0, proj->in(0)->in(0));
423 }
424
425 // Check for flag-killing projections that also need to be hoisted
426 // Should be DU safe because no edge updates.
427 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
428 Node* n = best->fast_out(j);
429 if( n->is_MachProj() ) {
430 get_block_for_node(n)->find_remove(n);
431 block->add_inst(n);
432 map_node_to_block(n, block);
433 }
434 }
435
436 // proj==Op_True --> ne test; proj==Op_False --> eq test.
437 // One of two graph shapes got matched:
438 // (IfTrue (If (Bool NE (CmpP ptr null))))
439 // (IfFalse (If (Bool EQ (CmpP ptr null))))
440 // null checks are always branch-if-eq. If we see a IfTrue projection
441 // then we are replacing a 'ne' test with a 'eq' null check test.
442 // We need to flip the projections to keep the same semantics.
443 if( proj->Opcode() == Op_IfTrue ) {
444 // Swap order of projections in basic block to swap branch targets
445 Node *tmp1 = block->get_node(block->end_idx()+1);
446 Node *tmp2 = block->get_node(block->end_idx()+2);
447 block->map_node(tmp2, block->end_idx()+1);
448 block->map_node(tmp1, block->end_idx()+2);
449 Node *tmp = new Node(C->top()); // Use not null input
450 tmp1->replace_by(tmp);
451 tmp2->replace_by(tmp1);
452 tmp->replace_by(tmp2);
453 tmp->destruct(nullptr);
454 }
455
456 // Remove the existing null check; use a new implicit null check instead.
457 // Since schedule-local needs precise def-use info, we need to correct
458 // it as well.
459 Node *old_tst = proj->in(0);
460 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
461 block->map_node(nul_chk, block->end_idx());
462 map_node_to_block(nul_chk, block);
463 // Redirect users of old_test to nul_chk
464 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
465 old_tst->last_out(i2)->set_req(0, nul_chk);
466 // Clean-up any dead code
467 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
468 Node* in = old_tst->in(i3);
469 old_tst->set_req(i3, nullptr);
470 if (in->outcnt() == 0) {
471 // Remove dead input node
472 in->disconnect_inputs(C);
473 block->find_remove(in);
474 }
475 }
476
477 latency_from_uses(nul_chk);
478 latency_from_uses(best);
479
480 // insert anti-dependences to defs in this block
481 if (! best->needs_anti_dependence_check()) {
482 for (uint k = 1; k < block->number_of_nodes(); k++) {
483 Node *n = block->get_node(k);
484 if (n->needs_anti_dependence_check() &&
485 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
486 // Found anti-dependent load
487 insert_anti_dependences(block, n);
488 }
489 }
490 }
491 }
492
493
494 //------------------------------select-----------------------------------------
495 // Select a nice fellow from the worklist to schedule next. If there is only one
496 // choice, then use it. CreateEx nodes that are initially ready must start their
497 // blocks and are given the highest priority, by being placed at the beginning
498 // of the worklist. Next after initially-ready CreateEx nodes are projections,
499 // which must follow their parents, and CreateEx nodes with local input
500 // dependencies. Next are constants and CheckCastPP nodes. There are a number of
501 // other special cases, for instructions that consume condition codes, et al.
502 // These are chosen immediately. Some instructions are required to immediately
503 // precede the last instruction in the block, and these are taken last. Of the
504 // remaining cases (most), choose the instruction with the greatest latency
505 // (that is, the most number of pseudo-cycles required to the end of the
506 // routine). If there is a tie, choose the instruction with the most inputs.
507 Node* PhaseCFG::select(
508 Block* block,
509 Node_List &worklist,
510 GrowableArray<int> &ready_cnt,
511 VectorSet &next_call,
512 uint sched_slot,
513 intptr_t* recalc_pressure_nodes) {
514
515 // If only a single entry on the stack, use it
516 uint cnt = worklist.size();
517 if (cnt == 1) {
518 Node *n = worklist[0];
519 worklist.map(0,worklist.pop());
520 return n;
521 }
522
523 uint choice = 0; // Bigger is most important
524 uint latency = 0; // Bigger is scheduled first
525 uint score = 0; // Bigger is better
526 int idx = -1; // Index in worklist
527 int cand_cnt = 0; // Candidate count
528 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
529
530 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
531 // Order in worklist is used to break ties.
532 // See caller for how this is used to delay scheduling
533 // of induction variable increments to after the other
534 // uses of the phi are scheduled.
535 Node *n = worklist[i]; // Get Node on worklist
536
537 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
538 if (iop == Op_CreateEx || n->is_Proj()) {
539 // CreateEx nodes that are initially ready must start the block (after Phi
540 // and Parm nodes which are pre-scheduled) and get top priority. This is
541 // currently enforced by placing them at the beginning of the initial
542 // worklist and selecting them eagerly here. After these, projections and
543 // other CreateEx nodes are selected with equal priority.
544 worklist.map(i,worklist.pop());
545 return n;
546 }
547
548 if (n->Opcode() == Op_Con || iop == Op_CheckCastPP) {
549 // Constants and CheckCastPP nodes have higher priority than the rest of
550 // the nodes tested below. Record as current winner, but keep looking for
551 // higher-priority nodes in the worklist.
552 choice = 4;
553 // Latency and score are only used to break ties among low-priority nodes.
554 latency = 0;
555 score = 0;
556 idx = i;
557 continue;
558 }
559
560 // Final call in a block must be adjacent to 'catch'
561 Node *e = block->end();
562 if( e->is_Catch() && e->in(0)->in(0) == n )
563 continue;
564
565 // Memory op for an implicit null check has to be at the end of the block
566 if( e->is_MachNullCheck() && e->in(1) == n )
567 continue;
568
569 // Schedule IV increment last.
570 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
571 // Cmp might be matched into CountedLoopEnd node.
572 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
573 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
574 continue;
575 }
576 }
577
578 uint n_choice = 2;
579
580 // See if this instruction is consumed by a branch. If so, then (as the
581 // branch is the last instruction in the basic block) force it to the
582 // end of the basic block
583 if ( must_clone[iop] ) {
584 // See if any use is a branch
585 bool found_machif = false;
586
587 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
588 Node* use = n->fast_out(j);
589
590 // The use is a conditional branch, make them adjacent
591 if (use->is_MachIf() && get_block_for_node(use) == block) {
592 found_machif = true;
593 break;
594 }
595
596 // More than this instruction pending for successor to be ready,
597 // don't choose this if other opportunities are ready
598 if (ready_cnt.at(use->_idx) > 1)
599 n_choice = 1;
600 }
601
602 // loop terminated, prefer not to use this instruction
603 if (found_machif)
604 continue;
605 }
606
607 // See if this has a predecessor that is "must_clone", i.e. sets the
608 // condition code. If so, choose this first
609 for (uint j = 0; j < n->req() ; j++) {
610 Node *inn = n->in(j);
611 if (inn) {
612 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
613 n_choice = 3;
614 break;
615 }
616 }
617 }
618
619 // MachTemps should be scheduled last so they are near their uses
620 if (n->is_MachTemp()) {
621 n_choice = 1;
622 }
623
624 uint n_latency = get_latency_for_node(n);
625 uint n_score = n->req(); // Many inputs get high score to break ties
626
627 if (OptoRegScheduling && block_size_threshold_ok) {
628 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
629 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
630 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
631 // simulate the notion that we just picked this node to schedule
632 n->add_flag(Node::Flag_is_scheduled);
633 // now calculate its effect upon the graph if we did
634 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
635 // return its state for finalize in case somebody else wins
636 n->remove_flag(Node::Flag_is_scheduled);
637 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
638 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
639 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
640 recalc_pressure_nodes[n->_idx] = int_pressure;
641 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
642 }
643
644 if (_scheduling_for_pressure) {
645 latency = n_latency;
646 if (n_choice != 3) {
647 // Now evaluate each register pressure component based on threshold in the score.
648 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
649 // on a single instruction, but we might see it shrink on both banks.
650 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
651 // live ranges that terminate on this instruction.
652 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
653 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
654 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
655 }
656 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
657 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
658 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
659 }
660 } else {
661 // make sure we choose these candidates
662 score = 0;
663 }
664 }
665 }
666
667 // Keep best latency found
668 cand_cnt++;
669 if (choice < n_choice ||
670 (choice == n_choice &&
671 ((StressLCM && C->randomized_select(cand_cnt)) ||
672 (!StressLCM &&
673 (latency < n_latency ||
674 (latency == n_latency &&
675 (score < n_score))))))) {
676 choice = n_choice;
677 latency = n_latency;
678 score = n_score;
679 idx = i; // Also keep index in worklist
680 }
681 } // End of for all ready nodes in worklist
682
683 guarantee(idx >= 0, "index should be set");
684 Node *n = worklist[(uint)idx]; // Get the winner
685
686 worklist.map((uint)idx, worklist.pop()); // Compress worklist
687 return n;
688 }
689
690 //-------------------------adjust_register_pressure----------------------------
691 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
692 PhaseLive* liveinfo = _regalloc->get_live();
693 IndexSet* liveout = liveinfo->live(block);
694 // first adjust the register pressure for the sources
695 for (uint i = 1; i < n->req(); i++) {
696 bool lrg_ends = false;
697 Node *src_n = n->in(i);
698 if (src_n == nullptr) continue;
699 if (!src_n->is_Mach()) continue;
700 uint src = _regalloc->_lrg_map.find(src_n);
701 if (src == 0) continue;
702 LRG& lrg_src = _regalloc->lrgs(src);
703 // detect if the live range ends or not
704 if (liveout->member(src) == false) {
705 lrg_ends = true;
706 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
707 Node* m = src_n->fast_out(j); // Get user
708 if (m == n) continue;
709 if (!m->is_Mach()) continue;
710 MachNode *mach = m->as_Mach();
711 bool src_matches = false;
712 int iop = mach->ideal_Opcode();
713
714 switch (iop) {
715 case Op_StoreB:
716 case Op_StoreC:
717 case Op_StoreCM:
718 case Op_StoreD:
719 case Op_StoreF:
720 case Op_StoreI:
721 case Op_StoreL:
722 case Op_StoreP:
723 case Op_StoreN:
724 case Op_StoreVector:
725 case Op_StoreVectorMasked:
726 case Op_StoreVectorScatter:
727 case Op_StoreVectorScatterMasked:
728 case Op_StoreNKlass:
729 for (uint k = 1; k < m->req(); k++) {
730 Node *in = m->in(k);
731 if (in == src_n) {
732 src_matches = true;
733 break;
734 }
735 }
736 break;
737
738 default:
739 src_matches = true;
740 break;
741 }
742
743 // If we have a store as our use, ignore the non source operands
744 if (src_matches == false) continue;
745
746 // Mark every unscheduled use which is not n with a recalculation
747 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
748 if (finalize_mode && !m->is_Phi()) {
749 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
750 }
751 lrg_ends = false;
752 }
753 }
754 }
755 // if none, this live range ends and we can adjust register pressure
756 if (lrg_ends) {
757 if (finalize_mode) {
758 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
759 } else {
760 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
761 }
762 }
763 }
764
765 // now add the register pressure from the dest and evaluate which heuristic we should use:
766 // 1.) The default, latency scheduling
767 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
768 uint dst = _regalloc->_lrg_map.find(n);
769 if (dst != 0) {
770 LRG& lrg_dst = _regalloc->lrgs(dst);
771 if (finalize_mode) {
772 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
773 // check to see if we fall over the register pressure cliff here
774 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
775 _scheduling_for_pressure = true;
776 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
777 _scheduling_for_pressure = true;
778 } else {
779 // restore latency scheduling mode
780 _scheduling_for_pressure = false;
781 }
782 } else {
783 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
784 }
785 }
786 }
787
788 //------------------------------set_next_call----------------------------------
789 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
790 if( next_call.test_set(n->_idx) ) return;
791 for( uint i=0; i<n->len(); i++ ) {
792 Node *m = n->in(i);
793 if( !m ) continue; // must see all nodes in block that precede call
794 if (get_block_for_node(m) == block) {
795 set_next_call(block, m, next_call);
796 }
797 }
798 }
799
800 //------------------------------needed_for_next_call---------------------------
801 // Set the flag 'next_call' for each Node that is needed for the next call to
802 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
803 // next subroutine call get priority - basically it moves things NOT needed
804 // for the next call till after the call. This prevents me from trying to
805 // carry lots of stuff live across a call.
806 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
807 // Find the next control-defining Node in this block
808 Node* call = nullptr;
809 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
810 Node* m = this_call->fast_out(i);
811 if (get_block_for_node(m) == block && // Local-block user
812 m != this_call && // Not self-start node
813 m->is_MachCall()) {
814 call = m;
815 break;
816 }
817 }
818 if (call == nullptr) return; // No next call (e.g., block end is near)
819 // Set next-call for all inputs to this call
820 set_next_call(block, call, next_call);
821 }
822
823 //------------------------------add_call_kills-------------------------------------
824 // helper function that adds caller save registers to MachProjNode
825 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
826 // Fill in the kill mask for the call
827 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
828 if( !regs.Member(r) ) { // Not already defined by the call
829 // Save-on-call register?
830 if ((save_policy[r] == 'C') ||
831 (save_policy[r] == 'A') ||
832 ((save_policy[r] == 'E') && exclude_soe)) {
833 proj->_rout.Insert(r);
834 }
835 }
836 }
837 }
838
839
840 //------------------------------sched_call-------------------------------------
841 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
842 RegMask regs;
843
844 // Schedule all the users of the call right now. All the users are
845 // projection Nodes, so they must be scheduled next to the call.
846 // Collect all the defined registers.
847 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
848 Node* n = mcall->fast_out(i);
849 assert( n->is_MachProj(), "" );
850 int n_cnt = ready_cnt.at(n->_idx)-1;
851 ready_cnt.at_put(n->_idx, n_cnt);
852 assert( n_cnt == 0, "" );
853 // Schedule next to call
854 block->map_node(n, node_cnt++);
855 // Collect defined registers
856 regs.OR(n->out_RegMask());
857 // Check for scheduling the next control-definer
858 if( n->bottom_type() == Type::CONTROL )
859 // Warm up next pile of heuristic bits
860 needed_for_next_call(block, n, next_call);
861
862 // Children of projections are now all ready
863 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
864 Node* m = n->fast_out(j); // Get user
865 if(get_block_for_node(m) != block) {
866 continue;
867 }
868 if( m->is_Phi() ) continue;
869 int m_cnt = ready_cnt.at(m->_idx) - 1;
870 ready_cnt.at_put(m->_idx, m_cnt);
871 if( m_cnt == 0 )
872 worklist.push(m);
873 }
874
875 }
876
877 // Act as if the call defines the Frame Pointer.
878 // Certainly the FP is alive and well after the call.
879 regs.Insert(_matcher.c_frame_pointer());
880
881 // Set all registers killed and not already defined by the call.
882 uint r_cnt = mcall->tf()->range()->cnt();
883 int op = mcall->ideal_Opcode();
884 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
885 map_node_to_block(proj, block);
886 block->insert_node(proj, node_cnt++);
887
888 // Select the right register save policy.
889 const char *save_policy = nullptr;
890 switch (op) {
891 case Op_CallRuntime:
892 case Op_CallLeaf:
893 case Op_CallLeafNoFP:
894 case Op_CallLeafVector:
895 // Calling C code so use C calling convention
896 save_policy = _matcher._c_reg_save_policy;
897 break;
898
899 case Op_CallStaticJava:
900 case Op_CallDynamicJava:
901 // Calling Java code so use Java calling convention
902 save_policy = _matcher._register_save_policy;
903 break;
904
905 default:
906 ShouldNotReachHere();
907 }
908
909 // When using CallRuntime mark SOE registers as killed by the call
910 // so values that could show up in the RegisterMap aren't live in a
911 // callee saved register since the register wouldn't know where to
912 // find them. CallLeaf and CallLeafNoFP are ok because they can't
913 // have debug info on them. Strictly speaking this only needs to be
914 // done for oops since idealreg2debugmask takes care of debug info
915 // references but there no way to handle oops differently than other
916 // pointers as far as the kill mask goes.
917 bool exclude_soe = op == Op_CallRuntime;
918
919 // If the call is a MethodHandle invoke, we need to exclude the
920 // register which is used to save the SP value over MH invokes from
921 // the mask. Otherwise this register could be used for
922 // deoptimization information.
923 if (op == Op_CallStaticJava) {
924 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
925 if (mcallstaticjava->_method_handle_invoke)
926 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
927 }
928
929 add_call_kills(proj, regs, save_policy, exclude_soe);
930
931 return node_cnt;
932 }
933
934
935 //------------------------------schedule_local---------------------------------
936 // Topological sort within a block. Someday become a real scheduler.
937 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
938 // Already "sorted" are the block start Node (as the first entry), and
939 // the block-ending Node and any trailing control projections. We leave
940 // these alone. PhiNodes and ParmNodes are made to follow the block start
941 // Node. Everything else gets topo-sorted.
942
943 #ifndef PRODUCT
944 if (trace_opto_pipelining()) {
945 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
946 for (uint i = 0;i < block->number_of_nodes(); i++) {
947 tty->print("# ");
948 block->get_node(i)->dump();
949 }
950 tty->print_cr("#");
951 }
952 #endif
953
954 // RootNode is already sorted
955 if (block->number_of_nodes() == 1) {
956 return true;
957 }
958
959 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
960
961 // We track the uses of local definitions as input dependences so that
962 // we know when a given instruction is available to be scheduled.
963 uint i;
964 if (OptoRegScheduling && block_size_threshold_ok) {
965 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
966 Node *n = block->get_node(i);
967 n->remove_flag(Node::Flag_is_scheduled);
968 if (!n->is_Phi()) {
969 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
970 }
971 }
972 }
973
974 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
975 uint node_cnt = block->end_idx();
976 uint phi_cnt = 1;
977 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
978 Node *n = block->get_node(i);
979 if( n->is_Phi() || // Found a PhiNode or ParmNode
980 (n->is_Proj() && n->in(0) == block->head()) ) {
981 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
982 block->map_node(block->get_node(phi_cnt), i);
983 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
984 if (OptoRegScheduling && block_size_threshold_ok) {
985 // mark n as scheduled
986 n->add_flag(Node::Flag_is_scheduled);
987 }
988 } else { // All others
989 // Count block-local inputs to 'n'
990 uint cnt = n->len(); // Input count
991 uint local = 0;
992 for( uint j=0; j<cnt; j++ ) {
993 Node *m = n->in(j);
994 if( m && get_block_for_node(m) == block && !m->is_top() )
995 local++; // One more block-local input
996 }
997 ready_cnt.at_put(n->_idx, local); // Count em up
998
999 #ifdef ASSERT
1000 if (UseG1GC) {
1001 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
1002 // Check the precedence edges
1003 for (uint prec = n->req(); prec < n->len(); prec++) {
1004 Node* oop_store = n->in(prec);
1005 if (oop_store != nullptr) {
1006 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1007 }
1008 }
1009 }
1010 }
1011 #endif
1012
1013 // A few node types require changing a required edge to a precedence edge
1014 // before allocation.
1015 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1016 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1017 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1018 // MemBarAcquire could be created without Precedent edge.
1019 // del_req() replaces the specified edge with the last input edge
1020 // and then removes the last edge. If the specified edge > number of
1021 // edges the last edge will be moved outside of the input edges array
1022 // and the edge will be lost. This is why this code should be
1023 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1024 Node *x = n->in(TypeFunc::Parms);
1025 if (x != nullptr && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1026 // Old edge to node within same block will get removed, but no precedence
1027 // edge will get added because it already exists. Update ready count.
1028 int cnt = ready_cnt.at(n->_idx);
1029 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1030 ready_cnt.at_put(n->_idx, cnt-1);
1031 }
1032 n->del_req(TypeFunc::Parms);
1033 n->add_prec(x);
1034 }
1035 }
1036 }
1037 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1038 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1039
1040 // All the prescheduled guys do not hold back internal nodes
1041 uint i3;
1042 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1043 Node *n = block->get_node(i3); // Get pre-scheduled
1044 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1045 Node* m = n->fast_out(j);
1046 if (get_block_for_node(m) == block) { // Local-block user
1047 int m_cnt = ready_cnt.at(m->_idx)-1;
1048 if (OptoRegScheduling && block_size_threshold_ok) {
1049 // mark m as scheduled
1050 if (m_cnt < 0) {
1051 m->add_flag(Node::Flag_is_scheduled);
1052 }
1053 }
1054 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1055 }
1056 }
1057 }
1058
1059 Node_List delay;
1060 // Make a worklist
1061 Node_List worklist;
1062 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1063 Node *m = block->get_node(i4);
1064 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1065 if (m->is_iteratively_computed()) {
1066 // Push induction variable increments last to allow other uses
1067 // of the phi to be scheduled first. The select() method breaks
1068 // ties in scheduling by worklist order.
1069 delay.push(m);
1070 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1071 // Place CreateEx nodes that are initially ready at the beginning of the
1072 // worklist so they are selected first and scheduled at the block start.
1073 worklist.insert(0, m);
1074 } else {
1075 worklist.push(m); // Then on to worklist!
1076 }
1077 }
1078 }
1079 while (delay.size()) {
1080 Node* d = delay.pop();
1081 worklist.push(d);
1082 }
1083
1084 if (OptoRegScheduling && block_size_threshold_ok) {
1085 // To stage register pressure calculations we need to examine the live set variables
1086 // breaking them up by register class to compartmentalize the calculations.
1087 _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1088 _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1089 _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1090 _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1091
1092 _regalloc->compute_entry_block_pressure(block);
1093 }
1094
1095 // Warm up the 'next_call' heuristic bits
1096 needed_for_next_call(block, block->head(), next_call);
1097
1098 #ifndef PRODUCT
1099 if (trace_opto_pipelining()) {
1100 for (uint j=0; j< block->number_of_nodes(); j++) {
1101 Node *n = block->get_node(j);
1102 int idx = n->_idx;
1103 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1104 tty->print("latency:%3d ", get_latency_for_node(n));
1105 tty->print("%4d: %s\n", idx, n->Name());
1106 }
1107 }
1108 #endif
1109
1110 uint max_idx = (uint)ready_cnt.length();
1111 // Pull from worklist and schedule
1112 while( worklist.size() ) { // Worklist is not ready
1113
1114 #ifndef PRODUCT
1115 if (trace_opto_pipelining()) {
1116 tty->print("# ready list:");
1117 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1118 Node *n = worklist[i]; // Get Node on worklist
1119 tty->print(" %d", n->_idx);
1120 }
1121 tty->cr();
1122 }
1123 #endif
1124
1125 // Select and pop a ready guy from worklist
1126 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1127 block->map_node(n, phi_cnt++); // Schedule him next
1128
1129 if (OptoRegScheduling && block_size_threshold_ok) {
1130 n->add_flag(Node::Flag_is_scheduled);
1131
1132 // Now adjust the resister pressure with the node we selected
1133 if (!n->is_Phi()) {
1134 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1135 }
1136 }
1137
1138 #ifndef PRODUCT
1139 if (trace_opto_pipelining()) {
1140 tty->print("# select %d: %s", n->_idx, n->Name());
1141 tty->print(", latency:%d", get_latency_for_node(n));
1142 n->dump();
1143 if (Verbose) {
1144 tty->print("# ready list:");
1145 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1146 Node *n = worklist[i]; // Get Node on worklist
1147 tty->print(" %d", n->_idx);
1148 }
1149 tty->cr();
1150 }
1151 }
1152
1153 #endif
1154 if( n->is_MachCall() ) {
1155 MachCallNode *mcall = n->as_MachCall();
1156 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1157 continue;
1158 }
1159
1160 if (n->is_Mach() && n->as_Mach()->has_call()) {
1161 RegMask regs;
1162 regs.Insert(_matcher.c_frame_pointer());
1163 regs.OR(n->out_RegMask());
1164
1165 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1166 map_node_to_block(proj, block);
1167 block->insert_node(proj, phi_cnt++);
1168
1169 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1170 }
1171
1172 // Children are now all ready
1173 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1174 Node* m = n->fast_out(i5); // Get user
1175 if (get_block_for_node(m) != block) {
1176 continue;
1177 }
1178 if( m->is_Phi() ) continue;
1179 if (m->_idx >= max_idx) { // new node, skip it
1180 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1181 continue;
1182 }
1183 int m_cnt = ready_cnt.at(m->_idx) - 1;
1184 ready_cnt.at_put(m->_idx, m_cnt);
1185 if( m_cnt == 0 )
1186 worklist.push(m);
1187 }
1188 }
1189
1190 if( phi_cnt != block->end_idx() ) {
1191 // did not schedule all. Retry, Bailout, or Die
1192 if (C->subsume_loads() == true && !C->failing()) {
1193 // Retry with subsume_loads == false
1194 // If this is the first failure, the sentinel string will "stick"
1195 // to the Compile object, and the C2Compiler will see it and retry.
1196 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1197 } else {
1198 assert(false, "graph should be schedulable");
1199 }
1200 // assert( phi_cnt == end_idx(), "did not schedule all" );
1201 return false;
1202 }
1203
1204 if (OptoRegScheduling && block_size_threshold_ok) {
1205 _regalloc->compute_exit_block_pressure(block);
1206 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1207 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1208 }
1209
1210 #ifndef PRODUCT
1211 if (trace_opto_pipelining()) {
1212 tty->print_cr("#");
1213 tty->print_cr("# after schedule_local");
1214 for (uint i = 0;i < block->number_of_nodes();i++) {
1215 tty->print("# ");
1216 block->get_node(i)->dump();
1217 }
1218 tty->print_cr("# ");
1219
1220 if (OptoRegScheduling && block_size_threshold_ok) {
1221 tty->print_cr("# pressure info : %d", block->_pre_order);
1222 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1223 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1224 }
1225 tty->cr();
1226 }
1227 #endif
1228
1229 return true;
1230 }
1231
1232 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1233 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1234 for (uint l = 0; l < use->len(); l++) {
1235 if (use->in(l) == old_def) {
1236 if (l < use->req()) {
1237 use->set_req(l, new_def);
1238 } else {
1239 use->rm_prec(l);
1240 use->add_prec(new_def);
1241 l--;
1242 }
1243 }
1244 }
1245 }
1246
1247 //------------------------------catch_cleanup_find_cloned_def------------------
1248 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1249 assert( use_blk != def_blk, "Inter-block cleanup only");
1250
1251 // The use is some block below the Catch. Find and return the clone of the def
1252 // that dominates the use. If there is no clone in a dominating block, then
1253 // create a phi for the def in a dominating block.
1254
1255 // Find which successor block dominates this use. The successor
1256 // blocks must all be single-entry (from the Catch only; I will have
1257 // split blocks to make this so), hence they all dominate.
1258 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1259 use_blk = use_blk->_idom;
1260
1261 // Find the successor
1262 Node *fixup = nullptr;
1263
1264 uint j;
1265 for( j = 0; j < def_blk->_num_succs; j++ )
1266 if( use_blk == def_blk->_succs[j] )
1267 break;
1268
1269 if( j == def_blk->_num_succs ) {
1270 // Block at same level in dom-tree is not a successor. It needs a
1271 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1272 Node_Array inputs;
1273 for(uint k = 1; k < use_blk->num_preds(); k++) {
1274 Block* block = get_block_for_node(use_blk->pred(k));
1275 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1276 }
1277
1278 // Check to see if the use_blk already has an identical phi inserted.
1279 // If it exists, it will be at the first position since all uses of a
1280 // def are processed together.
1281 Node *phi = use_blk->get_node(1);
1282 if( phi->is_Phi() ) {
1283 fixup = phi;
1284 for (uint k = 1; k < use_blk->num_preds(); k++) {
1285 if (phi->in(k) != inputs[k]) {
1286 // Not a match
1287 fixup = nullptr;
1288 break;
1289 }
1290 }
1291 }
1292
1293 // If an existing PhiNode was not found, make a new one.
1294 if (fixup == nullptr) {
1295 Node *new_phi = PhiNode::make(use_blk->head(), def);
1296 use_blk->insert_node(new_phi, 1);
1297 map_node_to_block(new_phi, use_blk);
1298 for (uint k = 1; k < use_blk->num_preds(); k++) {
1299 new_phi->set_req(k, inputs[k]);
1300 }
1301 fixup = new_phi;
1302 }
1303
1304 } else {
1305 // Found the use just below the Catch. Make it use the clone.
1306 fixup = use_blk->get_node(n_clone_idx);
1307 }
1308
1309 return fixup;
1310 }
1311
1312 //--------------------------catch_cleanup_intra_block--------------------------
1313 // Fix all input edges in use that reference "def". The use is in the same
1314 // block as the def and both have been cloned in each successor block.
1315 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1316
1317 // Both the use and def have been cloned. For each successor block,
1318 // get the clone of the use, and make its input the clone of the def
1319 // found in that block.
1320
1321 uint use_idx = blk->find_node(use);
1322 uint offset_idx = use_idx - beg;
1323 for( uint k = 0; k < blk->_num_succs; k++ ) {
1324 // Get clone in each successor block
1325 Block *sb = blk->_succs[k];
1326 Node *clone = sb->get_node(offset_idx+1);
1327 assert( clone->Opcode() == use->Opcode(), "" );
1328
1329 // Make use-clone reference the def-clone
1330 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1331 }
1332 }
1333
1334 //------------------------------catch_cleanup_inter_block---------------------
1335 // Fix all input edges in use that reference "def". The use is in a different
1336 // block than the def.
1337 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1338 if( !use_blk ) return; // Can happen if the use is a precedence edge
1339
1340 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1341 catch_cleanup_fix_all_inputs(use, def, new_def);
1342 }
1343
1344 //------------------------------call_catch_cleanup-----------------------------
1345 // If we inserted any instructions between a Call and his CatchNode,
1346 // clone the instructions on all paths below the Catch.
1347 void PhaseCFG::call_catch_cleanup(Block* block) {
1348
1349 // End of region to clone
1350 uint end = block->end_idx();
1351 if( !block->get_node(end)->is_Catch() ) return;
1352 // Start of region to clone
1353 uint beg = end;
1354 while(!block->get_node(beg-1)->is_MachProj() ||
1355 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1356 beg--;
1357 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1358 }
1359 // Range of inserted instructions is [beg, end)
1360 if( beg == end ) return;
1361
1362 // Clone along all Catch output paths. Clone area between the 'beg' and
1363 // 'end' indices.
1364 for( uint i = 0; i < block->_num_succs; i++ ) {
1365 Block *sb = block->_succs[i];
1366 // Clone the entire area; ignoring the edge fixup for now.
1367 for( uint j = end; j > beg; j-- ) {
1368 Node *clone = block->get_node(j-1)->clone();
1369 sb->insert_node(clone, 1);
1370 map_node_to_block(clone, sb);
1371 if (clone->needs_anti_dependence_check()) {
1372 insert_anti_dependences(sb, clone);
1373 }
1374 }
1375 }
1376
1377
1378 // Fixup edges. Check the def-use info per cloned Node
1379 for(uint i2 = beg; i2 < end; i2++ ) {
1380 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1381 Node *n = block->get_node(i2); // Node that got cloned
1382 // Need DU safe iterator because of edge manipulation in calls.
1383 Unique_Node_List* out = new Unique_Node_List();
1384 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1385 out->push(n->fast_out(j1));
1386 }
1387 uint max = out->size();
1388 for (uint j = 0; j < max; j++) {// For all users
1389 Node *use = out->pop();
1390 Block *buse = get_block_for_node(use);
1391 if( use->is_Phi() ) {
1392 for( uint k = 1; k < use->req(); k++ )
1393 if( use->in(k) == n ) {
1394 Block* b = get_block_for_node(buse->pred(k));
1395 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1396 use->set_req(k, fixup);
1397 }
1398 } else {
1399 if (block == buse) {
1400 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1401 } else {
1402 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1403 }
1404 }
1405 } // End for all users
1406
1407 } // End of for all Nodes in cloned area
1408
1409 // Remove the now-dead cloned ops
1410 for(uint i3 = beg; i3 < end; i3++ ) {
1411 block->get_node(beg)->disconnect_inputs(C);
1412 block->remove_node(beg);
1413 }
1414
1415 // If the successor blocks have a CreateEx node, move it back to the top
1416 for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1417 Block *sb = block->_succs[i4];
1418 uint new_cnt = end - beg;
1419 // Remove any newly created, but dead, nodes by traversing their schedule
1420 // backwards. Here, a dead node is a node whose only outputs (if any) are
1421 // unused projections.
1422 for (uint j = new_cnt; j > 0; j--) {
1423 Node *n = sb->get_node(j);
1424 // Individual projections are examined together with all siblings when
1425 // their parent is visited.
1426 if (n->is_Proj()) {
1427 continue;
1428 }
1429 bool dead = true;
1430 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1431 Node* out = n->fast_out(i);
1432 // n is live if it has a non-projection output or a used projection.
1433 if (!out->is_Proj() || out->outcnt() > 0) {
1434 dead = false;
1435 break;
1436 }
1437 }
1438 if (dead) {
1439 // n's only outputs (if any) are unused projections scheduled next to n
1440 // (see PhaseCFG::select()). Remove these projections backwards.
1441 for (uint k = j + n->outcnt(); k > j; k--) {
1442 Node* proj = sb->get_node(k);
1443 assert(proj->is_Proj() && proj->in(0) == n,
1444 "projection should correspond to dead node");
1445 proj->disconnect_inputs(C);
1446 sb->remove_node(k);
1447 new_cnt--;
1448 }
1449 // Now remove the node itself.
1450 n->disconnect_inputs(C);
1451 sb->remove_node(j);
1452 new_cnt--;
1453 }
1454 }
1455 // If any newly created nodes remain, move the CreateEx node to the top
1456 if (new_cnt > 0) {
1457 Node *cex = sb->get_node(1+new_cnt);
1458 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1459 sb->remove_node(1+new_cnt);
1460 sb->insert_node(cex, 1);
1461 }
1462 }
1463 }
1464 }