1 /* 2 * Copyright (c) 1998, 2024, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.inline.hpp" 27 #include "gc/shared/gc_globals.hpp" 28 #include "memory/allocation.inline.hpp" 29 #include "oops/compressedOops.hpp" 30 #include "opto/ad.hpp" 31 #include "opto/block.hpp" 32 #include "opto/c2compiler.hpp" 33 #include "opto/callnode.hpp" 34 #include "opto/cfgnode.hpp" 35 #include "opto/machnode.hpp" 36 #include "opto/runtime.hpp" 37 #include "opto/chaitin.hpp" 38 #include "runtime/os.inline.hpp" 39 #include "runtime/sharedRuntime.hpp" 40 41 // Optimization - Graph Style 42 43 // Check whether val is not-null-decoded compressed oop, 44 // i.e. will grab into the base of the heap if it represents null. 45 static bool accesses_heap_base_zone(Node *val) { 46 if (CompressedOops::base() != nullptr) { // Implies UseCompressedOops. 47 if (val && val->is_Mach()) { 48 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) { 49 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that 50 // decode null to point to the heap base (Decode_NN). 51 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) { 52 return true; 53 } 54 } 55 // Must recognize load operation with Decode matched in memory operand. 56 // We should not reach here except for PPC/AIX, as os::zero_page_read_protected() 57 // returns true everywhere else. On PPC, no such memory operands 58 // exist, therefore we did not yet implement a check for such operands. 59 NOT_AIX(Unimplemented()); 60 } 61 } 62 return false; 63 } 64 65 static bool needs_explicit_null_check_for_read(Node *val) { 66 // On some OSes (AIX) the page at address 0 is only write protected. 67 // If so, only Store operations will trap. 68 if (os::zero_page_read_protected()) { 69 return false; // Implicit null check will work. 70 } 71 // Also a read accessing the base of a heap-based compressed heap will trap. 72 if (accesses_heap_base_zone(val) && // Hits the base zone page. 73 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected. 74 return false; 75 } 76 77 return true; 78 } 79 80 //------------------------------implicit_null_check---------------------------- 81 // Detect implicit-null-check opportunities. Basically, find null checks 82 // with suitable memory ops nearby. Use the memory op to do the null check. 83 // I can generate a memory op if there is not one nearby. 84 // The proj is the control projection for the not-null case. 85 // The val is the pointer being checked for nullness or 86 // decodeHeapOop_not_null node if it did not fold into address. 87 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) { 88 // Assume if null check need for 0 offset then always needed 89 // Intel solaris doesn't support any null checks yet and no 90 // mechanism exists (yet) to set the switches at an os_cpu level 91 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return; 92 93 // Make sure the ptr-is-null path appears to be uncommon! 94 float f = block->end()->as_MachIf()->_prob; 95 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f; 96 if( f > PROB_UNLIKELY_MAG(4) ) return; 97 98 uint bidx = 0; // Capture index of value into memop 99 bool was_store; // Memory op is a store op 100 101 // Get the successor block for if the test ptr is non-null 102 Block* not_null_block; // this one goes with the proj 103 Block* null_block; 104 if (block->get_node(block->number_of_nodes()-1) == proj) { 105 null_block = block->_succs[0]; 106 not_null_block = block->_succs[1]; 107 } else { 108 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other"); 109 not_null_block = block->_succs[0]; 110 null_block = block->_succs[1]; 111 } 112 while (null_block->is_Empty() == Block::empty_with_goto) { 113 null_block = null_block->_succs[0]; 114 } 115 116 // Search the exception block for an uncommon trap. 117 // (See Parse::do_if and Parse::do_ifnull for the reason 118 // we need an uncommon trap. Briefly, we need a way to 119 // detect failure of this optimization, as in 6366351.) 120 { 121 bool found_trap = false; 122 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) { 123 Node* nn = null_block->get_node(i1); 124 if (nn->is_MachCall() && 125 nn->as_MachCall()->entry_point() == OptoRuntime::uncommon_trap_blob()->entry_point()) { 126 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type(); 127 if (trtype->isa_int() && trtype->is_int()->is_con()) { 128 jint tr_con = trtype->is_int()->get_con(); 129 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); 130 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); 131 assert((int)reason < (int)BitsPerInt, "recode bit map"); 132 if (is_set_nth_bit(allowed_reasons, (int) reason) 133 && action != Deoptimization::Action_none) { 134 // This uncommon trap is sure to recompile, eventually. 135 // When that happens, C->too_many_traps will prevent 136 // this transformation from happening again. 137 found_trap = true; 138 } 139 } 140 break; 141 } 142 } 143 if (!found_trap) { 144 // We did not find an uncommon trap. 145 return; 146 } 147 } 148 149 // Check for decodeHeapOop_not_null node which did not fold into address 150 bool is_decoden = ((intptr_t)val) & 1; 151 val = (Node*)(((intptr_t)val) & ~1); 152 153 assert(!is_decoden || 154 ((val->in(0) == nullptr) && val->is_Mach() && 155 (val->as_Mach()->ideal_Opcode() == Op_DecodeN)), "sanity"); 156 157 // Search the successor block for a load or store who's base value is also 158 // the tested value. There may be several. 159 MachNode *best = nullptr; // Best found so far 160 for (DUIterator i = val->outs(); val->has_out(i); i++) { 161 Node *m = val->out(i); 162 if( !m->is_Mach() ) continue; 163 MachNode *mach = m->as_Mach(); 164 was_store = false; 165 int iop = mach->ideal_Opcode(); 166 switch( iop ) { 167 case Op_LoadB: 168 case Op_LoadUB: 169 case Op_LoadUS: 170 case Op_LoadD: 171 case Op_LoadF: 172 case Op_LoadI: 173 case Op_LoadL: 174 case Op_LoadP: 175 case Op_LoadN: 176 case Op_LoadS: 177 case Op_LoadKlass: 178 case Op_LoadNKlass: 179 case Op_LoadRange: 180 case Op_LoadD_unaligned: 181 case Op_LoadL_unaligned: 182 assert(mach->in(2) == val, "should be address"); 183 break; 184 case Op_StoreB: 185 case Op_StoreC: 186 case Op_StoreCM: 187 case Op_StoreD: 188 case Op_StoreF: 189 case Op_StoreI: 190 case Op_StoreL: 191 case Op_StoreP: 192 case Op_StoreN: 193 case Op_StoreNKlass: 194 was_store = true; // Memory op is a store op 195 // Stores will have their address in slot 2 (memory in slot 1). 196 // If the value being nul-checked is in another slot, it means we 197 // are storing the checked value, which does NOT check the value! 198 if( mach->in(2) != val ) continue; 199 break; // Found a memory op? 200 case Op_StrComp: 201 case Op_StrEquals: 202 case Op_StrIndexOf: 203 case Op_StrIndexOfChar: 204 case Op_AryEq: 205 case Op_VectorizedHashCode: 206 case Op_StrInflatedCopy: 207 case Op_StrCompressedCopy: 208 case Op_EncodeISOArray: 209 case Op_CountPositives: 210 // Not a legit memory op for implicit null check regardless of 211 // embedded loads 212 continue; 213 default: // Also check for embedded loads 214 if( !mach->needs_anti_dependence_check() ) 215 continue; // Not an memory op; skip it 216 if( must_clone[iop] ) { 217 // Do not move nodes which produce flags because 218 // RA will try to clone it to place near branch and 219 // it will cause recompilation, see clone_node(). 220 continue; 221 } 222 { 223 // Check that value is used in memory address in 224 // instructions with embedded load (CmpP val1,(val2+off)). 225 Node* base; 226 Node* index; 227 const MachOper* oper = mach->memory_inputs(base, index); 228 if (oper == nullptr || oper == (MachOper*)-1) { 229 continue; // Not an memory op; skip it 230 } 231 if (val == base || 232 (val == index && val->bottom_type()->isa_narrowoop())) { 233 break; // Found it 234 } else { 235 continue; // Skip it 236 } 237 } 238 break; 239 } 240 241 // On some OSes (AIX) the page at address 0 is only write protected. 242 // If so, only Store operations will trap. 243 // But a read accessing the base of a heap-based compressed heap will trap. 244 if (!was_store && needs_explicit_null_check_for_read(val)) { 245 continue; 246 } 247 248 // Check that node's control edge is not-null block's head or dominates it, 249 // otherwise we can't hoist it because there are other control dependencies. 250 Node* ctrl = mach->in(0); 251 if (ctrl != nullptr && !(ctrl == not_null_block->head() || 252 get_block_for_node(ctrl)->dominates(not_null_block))) { 253 continue; 254 } 255 256 // check if the offset is not too high for implicit exception 257 { 258 intptr_t offset = 0; 259 const TypePtr *adr_type = nullptr; // Do not need this return value here 260 const Node* base = mach->get_base_and_disp(offset, adr_type); 261 if (base == nullptr || base == NodeSentinel) { 262 // Narrow oop address doesn't have base, only index. 263 // Give up if offset is beyond page size or if heap base is not protected. 264 if (val->bottom_type()->isa_narrowoop() && 265 (MacroAssembler::needs_explicit_null_check(offset) || 266 !CompressedOops::use_implicit_null_checks())) 267 continue; 268 // cannot reason about it; is probably not implicit null exception 269 } else { 270 const TypePtr* tptr; 271 if ((UseCompressedOops || UseCompressedClassPointers) && 272 (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) { 273 // 32-bits narrow oop can be the base of address expressions 274 tptr = base->get_ptr_type(); 275 } else { 276 // only regular oops are expected here 277 tptr = base->bottom_type()->is_ptr(); 278 } 279 // Give up if offset is not a compile-time constant. 280 if (offset == Type::OffsetBot || tptr->offset() == Type::OffsetBot) 281 continue; 282 offset += tptr->offset(); // correct if base is offsetted 283 // Give up if reference is beyond page size. 284 if (MacroAssembler::needs_explicit_null_check(offset)) 285 continue; 286 // Give up if base is a decode node and the heap base is not protected. 287 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN && 288 !CompressedOops::use_implicit_null_checks()) 289 continue; 290 } 291 } 292 293 // Check ctrl input to see if the null-check dominates the memory op 294 Block *cb = get_block_for_node(mach); 295 cb = cb->_idom; // Always hoist at least 1 block 296 if( !was_store ) { // Stores can be hoisted only one block 297 while( cb->_dom_depth > (block->_dom_depth + 1)) 298 cb = cb->_idom; // Hoist loads as far as we want 299 // The non-null-block should dominate the memory op, too. Live 300 // range spilling will insert a spill in the non-null-block if it is 301 // needs to spill the memory op for an implicit null check. 302 if (cb->_dom_depth == (block->_dom_depth + 1)) { 303 if (cb != not_null_block) continue; 304 cb = cb->_idom; 305 } 306 } 307 if( cb != block ) continue; 308 309 // Found a memory user; see if it can be hoisted to check-block 310 uint vidx = 0; // Capture index of value into memop 311 uint j; 312 for( j = mach->req()-1; j > 0; j-- ) { 313 if( mach->in(j) == val ) { 314 vidx = j; 315 // Ignore DecodeN val which could be hoisted to where needed. 316 if( is_decoden ) continue; 317 } 318 // Block of memory-op input 319 Block* inb = get_block_for_node(mach->in(j)); 320 if (mach->in(j)->is_Con() && mach->in(j)->req() == 1 && inb == get_block_for_node(mach)) { 321 // Ignore constant loads scheduled in the same block (we can simply hoist them as well) 322 continue; 323 } 324 Block *b = block; // Start from nul check 325 while( b != inb && b->_dom_depth > inb->_dom_depth ) 326 b = b->_idom; // search upwards for input 327 // See if input dominates null check 328 if( b != inb ) 329 break; 330 } 331 if( j > 0 ) 332 continue; 333 Block *mb = get_block_for_node(mach); 334 // Hoisting stores requires more checks for the anti-dependence case. 335 // Give up hoisting if we have to move the store past any load. 336 if (was_store) { 337 // Make sure control does not do a merge (would have to check allpaths) 338 if (mb->num_preds() != 2) { 339 continue; 340 } 341 // mach is a store, hence block is the immediate dominator of mb. 342 // Due to the null-check shape of block (where its successors cannot re-join), 343 // block must be the direct predecessor of mb. 344 assert(get_block_for_node(mb->pred(1)) == block, "Unexpected predecessor block"); 345 uint k; 346 uint num_nodes = mb->number_of_nodes(); 347 for (k = 1; k < num_nodes; k++) { 348 Node *n = mb->get_node(k); 349 if (n->needs_anti_dependence_check() && 350 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory)) { 351 break; // Found anti-dependent load 352 } 353 } 354 if (k < num_nodes) { 355 continue; // Found anti-dependent load 356 } 357 } 358 359 // Make sure this memory op is not already being used for a NullCheck 360 Node *e = mb->end(); 361 if( e->is_MachNullCheck() && e->in(1) == mach ) 362 continue; // Already being used as a null check 363 364 // Found a candidate! Pick one with least dom depth - the highest 365 // in the dom tree should be closest to the null check. 366 if (best == nullptr || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) { 367 best = mach; 368 bidx = vidx; 369 } 370 } 371 // No candidate! 372 if (best == nullptr) { 373 return; 374 } 375 376 // ---- Found an implicit null check 377 #ifndef PRODUCT 378 extern uint implicit_null_checks; 379 implicit_null_checks++; 380 #endif 381 382 if( is_decoden ) { 383 // Check if we need to hoist decodeHeapOop_not_null first. 384 Block *valb = get_block_for_node(val); 385 if( block != valb && block->_dom_depth < valb->_dom_depth ) { 386 // Hoist it up to the end of the test block together with its inputs if they exist. 387 for (uint i = 2; i < val->req(); i++) { 388 // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs. 389 Node *temp = val->in(i); 390 Block *tempb = get_block_for_node(temp); 391 if (!tempb->dominates(block)) { 392 assert(block->dominates(tempb), "sanity check: temp node placement"); 393 // We only expect nodes without further inputs, like MachTemp or load Base. 394 assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()), 395 "need for recursive hoisting not expected"); 396 tempb->find_remove(temp); 397 block->add_inst(temp); 398 map_node_to_block(temp, block); 399 } 400 } 401 valb->find_remove(val); 402 block->add_inst(val); 403 map_node_to_block(val, block); 404 // DecodeN on x86 may kill flags. Check for flag-killing projections 405 // that also need to be hoisted. 406 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { 407 Node* n = val->fast_out(j); 408 if( n->is_MachProj() ) { 409 get_block_for_node(n)->find_remove(n); 410 block->add_inst(n); 411 map_node_to_block(n, block); 412 } 413 } 414 } 415 } 416 417 // Hoist constant load inputs as well. 418 for (uint i = 1; i < best->req(); ++i) { 419 Node* n = best->in(i); 420 if (n->is_Con() && get_block_for_node(n) == get_block_for_node(best)) { 421 get_block_for_node(n)->find_remove(n); 422 block->add_inst(n); 423 map_node_to_block(n, block); 424 // Constant loads may kill flags (for example, when XORing a register). 425 // Check for flag-killing projections that also need to be hoisted. 426 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 427 Node* proj = n->fast_out(j); 428 if (proj->is_MachProj()) { 429 get_block_for_node(proj)->find_remove(proj); 430 block->add_inst(proj); 431 map_node_to_block(proj, block); 432 } 433 } 434 } 435 } 436 437 // Hoist the memory candidate up to the end of the test block. 438 Block *old_block = get_block_for_node(best); 439 old_block->find_remove(best); 440 block->add_inst(best); 441 map_node_to_block(best, block); 442 443 // Move the control dependence if it is pinned to not-null block. 444 // Don't change it in other cases: null or dominating control. 445 Node* ctrl = best->in(0); 446 if (ctrl != nullptr && get_block_for_node(ctrl) == not_null_block) { 447 // Set it to control edge of null check. 448 best->set_req(0, proj->in(0)->in(0)); 449 } 450 451 // Check for flag-killing projections that also need to be hoisted 452 // Should be DU safe because no edge updates. 453 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { 454 Node* n = best->fast_out(j); 455 if( n->is_MachProj() ) { 456 get_block_for_node(n)->find_remove(n); 457 block->add_inst(n); 458 map_node_to_block(n, block); 459 } 460 } 461 462 // proj==Op_True --> ne test; proj==Op_False --> eq test. 463 // One of two graph shapes got matched: 464 // (IfTrue (If (Bool NE (CmpP ptr null)))) 465 // (IfFalse (If (Bool EQ (CmpP ptr null)))) 466 // null checks are always branch-if-eq. If we see a IfTrue projection 467 // then we are replacing a 'ne' test with a 'eq' null check test. 468 // We need to flip the projections to keep the same semantics. 469 if( proj->Opcode() == Op_IfTrue ) { 470 // Swap order of projections in basic block to swap branch targets 471 Node *tmp1 = block->get_node(block->end_idx()+1); 472 Node *tmp2 = block->get_node(block->end_idx()+2); 473 block->map_node(tmp2, block->end_idx()+1); 474 block->map_node(tmp1, block->end_idx()+2); 475 Node *tmp = new Node(C->top()); // Use not null input 476 tmp1->replace_by(tmp); 477 tmp2->replace_by(tmp1); 478 tmp->replace_by(tmp2); 479 tmp->destruct(nullptr); 480 } 481 482 // Remove the existing null check; use a new implicit null check instead. 483 // Since schedule-local needs precise def-use info, we need to correct 484 // it as well. 485 Node *old_tst = proj->in(0); 486 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx); 487 block->map_node(nul_chk, block->end_idx()); 488 map_node_to_block(nul_chk, block); 489 // Redirect users of old_test to nul_chk 490 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2) 491 old_tst->last_out(i2)->set_req(0, nul_chk); 492 // Clean-up any dead code 493 for (uint i3 = 0; i3 < old_tst->req(); i3++) { 494 Node* in = old_tst->in(i3); 495 old_tst->set_req(i3, nullptr); 496 if (in->outcnt() == 0) { 497 // Remove dead input node 498 in->disconnect_inputs(C); 499 block->find_remove(in); 500 } 501 } 502 503 latency_from_uses(nul_chk); 504 latency_from_uses(best); 505 506 // insert anti-dependences to defs in this block 507 if (! best->needs_anti_dependence_check()) { 508 for (uint k = 1; k < block->number_of_nodes(); k++) { 509 Node *n = block->get_node(k); 510 if (n->needs_anti_dependence_check() && 511 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) { 512 // Found anti-dependent load 513 insert_anti_dependences(block, n); 514 } 515 } 516 } 517 } 518 519 520 //------------------------------select----------------------------------------- 521 // Select a nice fellow from the worklist to schedule next. If there is only one 522 // choice, then use it. CreateEx nodes that are initially ready must start their 523 // blocks and are given the highest priority, by being placed at the beginning 524 // of the worklist. Next after initially-ready CreateEx nodes are projections, 525 // which must follow their parents, and CreateEx nodes with local input 526 // dependencies. Next are constants and CheckCastPP nodes. There are a number of 527 // other special cases, for instructions that consume condition codes, et al. 528 // These are chosen immediately. Some instructions are required to immediately 529 // precede the last instruction in the block, and these are taken last. Of the 530 // remaining cases (most), choose the instruction with the greatest latency 531 // (that is, the most number of pseudo-cycles required to the end of the 532 // routine). If there is a tie, choose the instruction with the most inputs. 533 Node* PhaseCFG::select( 534 Block* block, 535 Node_List &worklist, 536 GrowableArray<int> &ready_cnt, 537 VectorSet &next_call, 538 uint sched_slot, 539 intptr_t* recalc_pressure_nodes) { 540 541 // If only a single entry on the stack, use it 542 uint cnt = worklist.size(); 543 if (cnt == 1) { 544 Node *n = worklist[0]; 545 worklist.map(0,worklist.pop()); 546 return n; 547 } 548 549 uint choice = 0; // Bigger is most important 550 uint latency = 0; // Bigger is scheduled first 551 uint score = 0; // Bigger is better 552 int idx = -1; // Index in worklist 553 int cand_cnt = 0; // Candidate count 554 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10); 555 556 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist 557 // Order in worklist is used to break ties. 558 // See caller for how this is used to delay scheduling 559 // of induction variable increments to after the other 560 // uses of the phi are scheduled. 561 Node *n = worklist[i]; // Get Node on worklist 562 563 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0; 564 if (iop == Op_CreateEx || n->is_Proj()) { 565 // CreateEx nodes that are initially ready must start the block (after Phi 566 // and Parm nodes which are pre-scheduled) and get top priority. This is 567 // currently enforced by placing them at the beginning of the initial 568 // worklist and selecting them eagerly here. After these, projections and 569 // other CreateEx nodes are selected with equal priority. 570 worklist.map(i,worklist.pop()); 571 return n; 572 } 573 574 if (n->Opcode() == Op_Con || iop == Op_CheckCastPP) { 575 // Constants and CheckCastPP nodes have higher priority than the rest of 576 // the nodes tested below. Record as current winner, but keep looking for 577 // higher-priority nodes in the worklist. 578 choice = 4; 579 // Latency and score are only used to break ties among low-priority nodes. 580 latency = 0; 581 score = 0; 582 idx = i; 583 continue; 584 } 585 586 // Final call in a block must be adjacent to 'catch' 587 Node *e = block->end(); 588 if( e->is_Catch() && e->in(0)->in(0) == n ) 589 continue; 590 591 // Memory op for an implicit null check has to be at the end of the block 592 if( e->is_MachNullCheck() && e->in(1) == n ) 593 continue; 594 595 // Schedule IV increment last. 596 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) { 597 // Cmp might be matched into CountedLoopEnd node. 598 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e; 599 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) { 600 continue; 601 } 602 } 603 604 uint n_choice = 2; 605 606 // See if this instruction is consumed by a branch. If so, then (as the 607 // branch is the last instruction in the basic block) force it to the 608 // end of the basic block 609 if ( must_clone[iop] ) { 610 // See if any use is a branch 611 bool found_machif = false; 612 613 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 614 Node* use = n->fast_out(j); 615 616 // The use is a conditional branch, make them adjacent 617 if (use->is_MachIf() && get_block_for_node(use) == block) { 618 found_machif = true; 619 break; 620 } 621 622 // More than this instruction pending for successor to be ready, 623 // don't choose this if other opportunities are ready 624 if (ready_cnt.at(use->_idx) > 1) 625 n_choice = 1; 626 } 627 628 // loop terminated, prefer not to use this instruction 629 if (found_machif) 630 continue; 631 } 632 633 // See if this has a predecessor that is "must_clone", i.e. sets the 634 // condition code. If so, choose this first 635 for (uint j = 0; j < n->req() ; j++) { 636 Node *inn = n->in(j); 637 if (inn) { 638 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) { 639 n_choice = 3; 640 break; 641 } 642 } 643 } 644 645 // MachTemps should be scheduled last so they are near their uses 646 if (n->is_MachTemp()) { 647 n_choice = 1; 648 } 649 650 uint n_latency = get_latency_for_node(n); 651 uint n_score = n->req(); // Many inputs get high score to break ties 652 653 if (OptoRegScheduling && block_size_threshold_ok) { 654 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) { 655 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit()); 656 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); 657 // simulate the notion that we just picked this node to schedule 658 n->add_flag(Node::Flag_is_scheduled); 659 // now calculate its effect upon the graph if we did 660 adjust_register_pressure(n, block, recalc_pressure_nodes, false); 661 // return its state for finalize in case somebody else wins 662 n->remove_flag(Node::Flag_is_scheduled); 663 // now save the two final pressure components of register pressure, limiting pressure calcs to short size 664 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure(); 665 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure(); 666 recalc_pressure_nodes[n->_idx] = int_pressure; 667 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16); 668 } 669 670 if (_scheduling_for_pressure) { 671 latency = n_latency; 672 if (n_choice != 3) { 673 // Now evaluate each register pressure component based on threshold in the score. 674 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks 675 // on a single instruction, but we might see it shrink on both banks. 676 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for 677 // live ranges that terminate on this instruction. 678 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 679 short int_pressure = (short)recalc_pressure_nodes[n->_idx]; 680 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score; 681 } 682 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 683 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16); 684 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score; 685 } 686 } else { 687 // make sure we choose these candidates 688 score = 0; 689 } 690 } 691 } 692 693 // Keep best latency found 694 cand_cnt++; 695 if (choice < n_choice || 696 (choice == n_choice && 697 ((StressLCM && C->randomized_select(cand_cnt)) || 698 (!StressLCM && 699 (latency < n_latency || 700 (latency == n_latency && 701 (score < n_score))))))) { 702 choice = n_choice; 703 latency = n_latency; 704 score = n_score; 705 idx = i; // Also keep index in worklist 706 } 707 } // End of for all ready nodes in worklist 708 709 guarantee(idx >= 0, "index should be set"); 710 Node *n = worklist[(uint)idx]; // Get the winner 711 712 worklist.map((uint)idx, worklist.pop()); // Compress worklist 713 return n; 714 } 715 716 //-------------------------adjust_register_pressure---------------------------- 717 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) { 718 PhaseLive* liveinfo = _regalloc->get_live(); 719 IndexSet* liveout = liveinfo->live(block); 720 // first adjust the register pressure for the sources 721 for (uint i = 1; i < n->req(); i++) { 722 bool lrg_ends = false; 723 Node *src_n = n->in(i); 724 if (src_n == nullptr) continue; 725 if (!src_n->is_Mach()) continue; 726 uint src = _regalloc->_lrg_map.find(src_n); 727 if (src == 0) continue; 728 LRG& lrg_src = _regalloc->lrgs(src); 729 // detect if the live range ends or not 730 if (liveout->member(src) == false) { 731 lrg_ends = true; 732 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) { 733 Node* m = src_n->fast_out(j); // Get user 734 if (m == n) continue; 735 if (!m->is_Mach()) continue; 736 MachNode *mach = m->as_Mach(); 737 bool src_matches = false; 738 int iop = mach->ideal_Opcode(); 739 740 switch (iop) { 741 case Op_StoreB: 742 case Op_StoreC: 743 case Op_StoreCM: 744 case Op_StoreD: 745 case Op_StoreF: 746 case Op_StoreI: 747 case Op_StoreL: 748 case Op_StoreP: 749 case Op_StoreN: 750 case Op_StoreVector: 751 case Op_StoreVectorMasked: 752 case Op_StoreVectorScatter: 753 case Op_StoreVectorScatterMasked: 754 case Op_StoreNKlass: 755 for (uint k = 1; k < m->req(); k++) { 756 Node *in = m->in(k); 757 if (in == src_n) { 758 src_matches = true; 759 break; 760 } 761 } 762 break; 763 764 default: 765 src_matches = true; 766 break; 767 } 768 769 // If we have a store as our use, ignore the non source operands 770 if (src_matches == false) continue; 771 772 // Mark every unscheduled use which is not n with a recalculation 773 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) { 774 if (finalize_mode && !m->is_Phi()) { 775 recalc_pressure_nodes[m->_idx] = 0x7fff7fff; 776 } 777 lrg_ends = false; 778 } 779 } 780 } 781 // if none, this live range ends and we can adjust register pressure 782 if (lrg_ends) { 783 if (finalize_mode) { 784 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 785 } else { 786 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 787 } 788 } 789 } 790 791 // now add the register pressure from the dest and evaluate which heuristic we should use: 792 // 1.) The default, latency scheduling 793 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks 794 uint dst = _regalloc->_lrg_map.find(n); 795 if (dst != 0) { 796 LRG& lrg_dst = _regalloc->lrgs(dst); 797 if (finalize_mode) { 798 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 799 // check to see if we fall over the register pressure cliff here 800 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 801 _scheduling_for_pressure = true; 802 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 803 _scheduling_for_pressure = true; 804 } else { 805 // restore latency scheduling mode 806 _scheduling_for_pressure = false; 807 } 808 } else { 809 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 810 } 811 } 812 } 813 814 //------------------------------set_next_call---------------------------------- 815 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) { 816 if( next_call.test_set(n->_idx) ) return; 817 for( uint i=0; i<n->len(); i++ ) { 818 Node *m = n->in(i); 819 if( !m ) continue; // must see all nodes in block that precede call 820 if (get_block_for_node(m) == block) { 821 set_next_call(block, m, next_call); 822 } 823 } 824 } 825 826 //------------------------------needed_for_next_call--------------------------- 827 // Set the flag 'next_call' for each Node that is needed for the next call to 828 // be scheduled. This flag lets me bias scheduling so Nodes needed for the 829 // next subroutine call get priority - basically it moves things NOT needed 830 // for the next call till after the call. This prevents me from trying to 831 // carry lots of stuff live across a call. 832 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) { 833 // Find the next control-defining Node in this block 834 Node* call = nullptr; 835 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) { 836 Node* m = this_call->fast_out(i); 837 if (get_block_for_node(m) == block && // Local-block user 838 m != this_call && // Not self-start node 839 m->is_MachCall()) { 840 call = m; 841 break; 842 } 843 } 844 if (call == nullptr) return; // No next call (e.g., block end is near) 845 // Set next-call for all inputs to this call 846 set_next_call(block, call, next_call); 847 } 848 849 //------------------------------add_call_kills------------------------------------- 850 // helper function that adds caller save registers to MachProjNode 851 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) { 852 // Fill in the kill mask for the call 853 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) { 854 if( !regs.Member(r) ) { // Not already defined by the call 855 // Save-on-call register? 856 if ((save_policy[r] == 'C') || 857 (save_policy[r] == 'A') || 858 ((save_policy[r] == 'E') && exclude_soe)) { 859 proj->_rout.Insert(r); 860 } 861 } 862 } 863 } 864 865 866 //------------------------------sched_call------------------------------------- 867 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) { 868 RegMask regs; 869 870 // Schedule all the users of the call right now. All the users are 871 // projection Nodes, so they must be scheduled next to the call. 872 // Collect all the defined registers. 873 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { 874 Node* n = mcall->fast_out(i); 875 assert( n->is_MachProj(), "" ); 876 int n_cnt = ready_cnt.at(n->_idx)-1; 877 ready_cnt.at_put(n->_idx, n_cnt); 878 assert( n_cnt == 0, "" ); 879 // Schedule next to call 880 block->map_node(n, node_cnt++); 881 // Collect defined registers 882 regs.OR(n->out_RegMask()); 883 // Check for scheduling the next control-definer 884 if( n->bottom_type() == Type::CONTROL ) 885 // Warm up next pile of heuristic bits 886 needed_for_next_call(block, n, next_call); 887 888 // Children of projections are now all ready 889 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 890 Node* m = n->fast_out(j); // Get user 891 if(get_block_for_node(m) != block) { 892 continue; 893 } 894 if( m->is_Phi() ) continue; 895 int m_cnt = ready_cnt.at(m->_idx) - 1; 896 ready_cnt.at_put(m->_idx, m_cnt); 897 if( m_cnt == 0 ) 898 worklist.push(m); 899 } 900 901 } 902 903 // Act as if the call defines the Frame Pointer. 904 // Certainly the FP is alive and well after the call. 905 regs.Insert(_matcher.c_frame_pointer()); 906 907 // Set all registers killed and not already defined by the call. 908 uint r_cnt = mcall->tf()->range_cc()->cnt(); 909 int op = mcall->ideal_Opcode(); 910 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj ); 911 map_node_to_block(proj, block); 912 block->insert_node(proj, node_cnt++); 913 914 // Select the right register save policy. 915 const char *save_policy = nullptr; 916 switch (op) { 917 case Op_CallRuntime: 918 case Op_CallLeaf: 919 case Op_CallLeafNoFP: 920 case Op_CallLeafVector: 921 // Calling C code so use C calling convention 922 save_policy = _matcher._c_reg_save_policy; 923 break; 924 925 case Op_CallStaticJava: 926 case Op_CallDynamicJava: 927 // Calling Java code so use Java calling convention 928 save_policy = _matcher._register_save_policy; 929 break; 930 931 default: 932 ShouldNotReachHere(); 933 } 934 935 // When using CallRuntime mark SOE registers as killed by the call 936 // so values that could show up in the RegisterMap aren't live in a 937 // callee saved register since the register wouldn't know where to 938 // find them. CallLeaf and CallLeafNoFP are ok because they can't 939 // have debug info on them. Strictly speaking this only needs to be 940 // done for oops since idealreg2debugmask takes care of debug info 941 // references but there no way to handle oops differently than other 942 // pointers as far as the kill mask goes. 943 bool exclude_soe = op == Op_CallRuntime; 944 945 // If the call is a MethodHandle invoke, we need to exclude the 946 // register which is used to save the SP value over MH invokes from 947 // the mask. Otherwise this register could be used for 948 // deoptimization information. 949 if (op == Op_CallStaticJava) { 950 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall; 951 if (mcallstaticjava->_method_handle_invoke) 952 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask()); 953 } 954 955 add_call_kills(proj, regs, save_policy, exclude_soe); 956 957 return node_cnt; 958 } 959 960 961 //------------------------------schedule_local--------------------------------- 962 // Topological sort within a block. Someday become a real scheduler. 963 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) { 964 // Already "sorted" are the block start Node (as the first entry), and 965 // the block-ending Node and any trailing control projections. We leave 966 // these alone. PhiNodes and ParmNodes are made to follow the block start 967 // Node. Everything else gets topo-sorted. 968 969 #ifndef PRODUCT 970 if (trace_opto_pipelining()) { 971 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order); 972 for (uint i = 0;i < block->number_of_nodes(); i++) { 973 tty->print("# "); 974 block->get_node(i)->dump(); 975 } 976 tty->print_cr("#"); 977 } 978 #endif 979 980 // RootNode is already sorted 981 if (block->number_of_nodes() == 1) { 982 return true; 983 } 984 985 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10); 986 987 // We track the uses of local definitions as input dependences so that 988 // we know when a given instruction is available to be scheduled. 989 uint i; 990 if (OptoRegScheduling && block_size_threshold_ok) { 991 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc 992 Node *n = block->get_node(i); 993 n->remove_flag(Node::Flag_is_scheduled); 994 if (!n->is_Phi()) { 995 recalc_pressure_nodes[n->_idx] = 0x7fff7fff; 996 } 997 } 998 } 999 1000 // Move PhiNodes and ParmNodes from 1 to cnt up to the start 1001 uint node_cnt = block->end_idx(); 1002 uint phi_cnt = 1; 1003 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi 1004 Node *n = block->get_node(i); 1005 if( n->is_Phi() || // Found a PhiNode or ParmNode 1006 (n->is_Proj() && n->in(0) == block->head()) ) { 1007 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt 1008 block->map_node(block->get_node(phi_cnt), i); 1009 block->map_node(n, phi_cnt++); // swap Phi/Parm up front 1010 if (OptoRegScheduling && block_size_threshold_ok) { 1011 // mark n as scheduled 1012 n->add_flag(Node::Flag_is_scheduled); 1013 } 1014 } else { // All others 1015 // Count block-local inputs to 'n' 1016 uint cnt = n->len(); // Input count 1017 uint local = 0; 1018 for( uint j=0; j<cnt; j++ ) { 1019 Node *m = n->in(j); 1020 if( m && get_block_for_node(m) == block && !m->is_top() ) 1021 local++; // One more block-local input 1022 } 1023 ready_cnt.at_put(n->_idx, local); // Count em up 1024 1025 #ifdef ASSERT 1026 if (UseG1GC) { 1027 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) { 1028 // Check the precedence edges 1029 for (uint prec = n->req(); prec < n->len(); prec++) { 1030 Node* oop_store = n->in(prec); 1031 if (oop_store != nullptr) { 1032 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark"); 1033 } 1034 } 1035 } 1036 } 1037 #endif 1038 1039 // A few node types require changing a required edge to a precedence edge 1040 // before allocation. 1041 if( n->is_Mach() && n->req() > TypeFunc::Parms && 1042 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire || 1043 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) { 1044 // MemBarAcquire could be created without Precedent edge. 1045 // del_req() replaces the specified edge with the last input edge 1046 // and then removes the last edge. If the specified edge > number of 1047 // edges the last edge will be moved outside of the input edges array 1048 // and the edge will be lost. This is why this code should be 1049 // executed only when Precedent (== TypeFunc::Parms) edge is present. 1050 Node *x = n->in(TypeFunc::Parms); 1051 if (x != nullptr && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) { 1052 // Old edge to node within same block will get removed, but no precedence 1053 // edge will get added because it already exists. Update ready count. 1054 int cnt = ready_cnt.at(n->_idx); 1055 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx); 1056 ready_cnt.at_put(n->_idx, cnt-1); 1057 } 1058 n->del_req(TypeFunc::Parms); 1059 n->add_prec(x); 1060 } 1061 } 1062 } 1063 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count 1064 ready_cnt.at_put(block->get_node(i2)->_idx, 0); 1065 1066 // All the prescheduled guys do not hold back internal nodes 1067 uint i3; 1068 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled 1069 Node *n = block->get_node(i3); // Get pre-scheduled 1070 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 1071 Node* m = n->fast_out(j); 1072 if (get_block_for_node(m) == block) { // Local-block user 1073 int m_cnt = ready_cnt.at(m->_idx)-1; 1074 if (OptoRegScheduling && block_size_threshold_ok) { 1075 // mark m as scheduled 1076 if (m_cnt < 0) { 1077 m->add_flag(Node::Flag_is_scheduled); 1078 } 1079 } 1080 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count 1081 } 1082 } 1083 } 1084 1085 Node_List delay; 1086 // Make a worklist 1087 Node_List worklist; 1088 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist 1089 Node *m = block->get_node(i4); 1090 if( !ready_cnt.at(m->_idx) ) { // Zero ready count? 1091 if (m->is_iteratively_computed()) { 1092 // Push induction variable increments last to allow other uses 1093 // of the phi to be scheduled first. The select() method breaks 1094 // ties in scheduling by worklist order. 1095 delay.push(m); 1096 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) { 1097 // Place CreateEx nodes that are initially ready at the beginning of the 1098 // worklist so they are selected first and scheduled at the block start. 1099 worklist.insert(0, m); 1100 } else { 1101 worklist.push(m); // Then on to worklist! 1102 } 1103 } 1104 } 1105 while (delay.size()) { 1106 Node* d = delay.pop(); 1107 worklist.push(d); 1108 } 1109 1110 if (OptoRegScheduling && block_size_threshold_ok) { 1111 // To stage register pressure calculations we need to examine the live set variables 1112 // breaking them up by register class to compartmentalize the calculations. 1113 _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit()); 1114 _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit()); 1115 _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit()); 1116 _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit()); 1117 1118 _regalloc->compute_entry_block_pressure(block); 1119 } 1120 1121 // Warm up the 'next_call' heuristic bits 1122 needed_for_next_call(block, block->head(), next_call); 1123 1124 #ifndef PRODUCT 1125 if (trace_opto_pipelining()) { 1126 for (uint j=0; j< block->number_of_nodes(); j++) { 1127 Node *n = block->get_node(j); 1128 int idx = n->_idx; 1129 tty->print("# ready cnt:%3d ", ready_cnt.at(idx)); 1130 tty->print("latency:%3d ", get_latency_for_node(n)); 1131 tty->print("%4d: %s\n", idx, n->Name()); 1132 } 1133 } 1134 #endif 1135 1136 uint max_idx = (uint)ready_cnt.length(); 1137 // Pull from worklist and schedule 1138 while( worklist.size() ) { // Worklist is not ready 1139 1140 #ifndef PRODUCT 1141 if (trace_opto_pipelining()) { 1142 tty->print("# ready list:"); 1143 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1144 Node *n = worklist[i]; // Get Node on worklist 1145 tty->print(" %d", n->_idx); 1146 } 1147 tty->cr(); 1148 } 1149 #endif 1150 1151 // Select and pop a ready guy from worklist 1152 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes); 1153 block->map_node(n, phi_cnt++); // Schedule him next 1154 1155 if (OptoRegScheduling && block_size_threshold_ok) { 1156 n->add_flag(Node::Flag_is_scheduled); 1157 1158 // Now adjust the resister pressure with the node we selected 1159 if (!n->is_Phi()) { 1160 adjust_register_pressure(n, block, recalc_pressure_nodes, true); 1161 } 1162 } 1163 1164 #ifndef PRODUCT 1165 if (trace_opto_pipelining()) { 1166 tty->print("# select %d: %s", n->_idx, n->Name()); 1167 tty->print(", latency:%d", get_latency_for_node(n)); 1168 n->dump(); 1169 if (Verbose) { 1170 tty->print("# ready list:"); 1171 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1172 Node *n = worklist[i]; // Get Node on worklist 1173 tty->print(" %d", n->_idx); 1174 } 1175 tty->cr(); 1176 } 1177 } 1178 1179 #endif 1180 if( n->is_MachCall() ) { 1181 MachCallNode *mcall = n->as_MachCall(); 1182 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call); 1183 continue; 1184 } 1185 1186 if (n->is_Mach() && n->as_Mach()->has_call()) { 1187 RegMask regs; 1188 regs.Insert(_matcher.c_frame_pointer()); 1189 regs.OR(n->out_RegMask()); 1190 1191 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj ); 1192 map_node_to_block(proj, block); 1193 block->insert_node(proj, phi_cnt++); 1194 1195 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false); 1196 } 1197 1198 // Children are now all ready 1199 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) { 1200 Node* m = n->fast_out(i5); // Get user 1201 if (get_block_for_node(m) != block) { 1202 continue; 1203 } 1204 if( m->is_Phi() ) continue; 1205 if (m->_idx >= max_idx) { // new node, skip it 1206 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types"); 1207 continue; 1208 } 1209 int m_cnt = ready_cnt.at(m->_idx) - 1; 1210 ready_cnt.at_put(m->_idx, m_cnt); 1211 if( m_cnt == 0 ) 1212 worklist.push(m); 1213 } 1214 } 1215 1216 if( phi_cnt != block->end_idx() ) { 1217 // did not schedule all. Retry, Bailout, or Die 1218 if (C->subsume_loads() == true && !C->failing()) { 1219 // Retry with subsume_loads == false 1220 // If this is the first failure, the sentinel string will "stick" 1221 // to the Compile object, and the C2Compiler will see it and retry. 1222 C->record_failure(C2Compiler::retry_no_subsuming_loads()); 1223 } else { 1224 assert(false, "graph should be schedulable"); 1225 } 1226 // assert( phi_cnt == end_idx(), "did not schedule all" ); 1227 return false; 1228 } 1229 1230 if (OptoRegScheduling && block_size_threshold_ok) { 1231 _regalloc->compute_exit_block_pressure(block); 1232 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure(); 1233 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure(); 1234 } 1235 1236 #ifndef PRODUCT 1237 if (trace_opto_pipelining()) { 1238 tty->print_cr("#"); 1239 tty->print_cr("# after schedule_local"); 1240 for (uint i = 0;i < block->number_of_nodes();i++) { 1241 tty->print("# "); 1242 block->get_node(i)->dump(); 1243 } 1244 tty->print_cr("# "); 1245 1246 if (OptoRegScheduling && block_size_threshold_ok) { 1247 tty->print_cr("# pressure info : %d", block->_pre_order); 1248 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info"); 1249 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info"); 1250 } 1251 tty->cr(); 1252 } 1253 #endif 1254 1255 return true; 1256 } 1257 1258 //--------------------------catch_cleanup_fix_all_inputs----------------------- 1259 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) { 1260 for (uint l = 0; l < use->len(); l++) { 1261 if (use->in(l) == old_def) { 1262 if (l < use->req()) { 1263 use->set_req(l, new_def); 1264 } else { 1265 use->rm_prec(l); 1266 use->add_prec(new_def); 1267 l--; 1268 } 1269 } 1270 } 1271 } 1272 1273 //------------------------------catch_cleanup_find_cloned_def------------------ 1274 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1275 assert( use_blk != def_blk, "Inter-block cleanup only"); 1276 1277 // The use is some block below the Catch. Find and return the clone of the def 1278 // that dominates the use. If there is no clone in a dominating block, then 1279 // create a phi for the def in a dominating block. 1280 1281 // Find which successor block dominates this use. The successor 1282 // blocks must all be single-entry (from the Catch only; I will have 1283 // split blocks to make this so), hence they all dominate. 1284 while( use_blk->_dom_depth > def_blk->_dom_depth+1 ) 1285 use_blk = use_blk->_idom; 1286 1287 // Find the successor 1288 Node *fixup = nullptr; 1289 1290 uint j; 1291 for( j = 0; j < def_blk->_num_succs; j++ ) 1292 if( use_blk == def_blk->_succs[j] ) 1293 break; 1294 1295 if( j == def_blk->_num_succs ) { 1296 // Block at same level in dom-tree is not a successor. It needs a 1297 // PhiNode, the PhiNode uses from the def and IT's uses need fixup. 1298 Node_Array inputs; 1299 for(uint k = 1; k < use_blk->num_preds(); k++) { 1300 Block* block = get_block_for_node(use_blk->pred(k)); 1301 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx)); 1302 } 1303 1304 // Check to see if the use_blk already has an identical phi inserted. 1305 // If it exists, it will be at the first position since all uses of a 1306 // def are processed together. 1307 Node *phi = use_blk->get_node(1); 1308 if( phi->is_Phi() ) { 1309 fixup = phi; 1310 for (uint k = 1; k < use_blk->num_preds(); k++) { 1311 if (phi->in(k) != inputs[k]) { 1312 // Not a match 1313 fixup = nullptr; 1314 break; 1315 } 1316 } 1317 } 1318 1319 // If an existing PhiNode was not found, make a new one. 1320 if (fixup == nullptr) { 1321 Node *new_phi = PhiNode::make(use_blk->head(), def); 1322 use_blk->insert_node(new_phi, 1); 1323 map_node_to_block(new_phi, use_blk); 1324 for (uint k = 1; k < use_blk->num_preds(); k++) { 1325 new_phi->set_req(k, inputs[k]); 1326 } 1327 fixup = new_phi; 1328 } 1329 1330 } else { 1331 // Found the use just below the Catch. Make it use the clone. 1332 fixup = use_blk->get_node(n_clone_idx); 1333 } 1334 1335 return fixup; 1336 } 1337 1338 //--------------------------catch_cleanup_intra_block-------------------------- 1339 // Fix all input edges in use that reference "def". The use is in the same 1340 // block as the def and both have been cloned in each successor block. 1341 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) { 1342 1343 // Both the use and def have been cloned. For each successor block, 1344 // get the clone of the use, and make its input the clone of the def 1345 // found in that block. 1346 1347 uint use_idx = blk->find_node(use); 1348 uint offset_idx = use_idx - beg; 1349 for( uint k = 0; k < blk->_num_succs; k++ ) { 1350 // Get clone in each successor block 1351 Block *sb = blk->_succs[k]; 1352 Node *clone = sb->get_node(offset_idx+1); 1353 assert( clone->Opcode() == use->Opcode(), "" ); 1354 1355 // Make use-clone reference the def-clone 1356 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx)); 1357 } 1358 } 1359 1360 //------------------------------catch_cleanup_inter_block--------------------- 1361 // Fix all input edges in use that reference "def". The use is in a different 1362 // block than the def. 1363 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1364 if( !use_blk ) return; // Can happen if the use is a precedence edge 1365 1366 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx); 1367 catch_cleanup_fix_all_inputs(use, def, new_def); 1368 } 1369 1370 //------------------------------call_catch_cleanup----------------------------- 1371 // If we inserted any instructions between a Call and his CatchNode, 1372 // clone the instructions on all paths below the Catch. 1373 void PhaseCFG::call_catch_cleanup(Block* block) { 1374 1375 // End of region to clone 1376 uint end = block->end_idx(); 1377 if( !block->get_node(end)->is_Catch() ) return; 1378 // Start of region to clone 1379 uint beg = end; 1380 while(!block->get_node(beg-1)->is_MachProj() || 1381 !block->get_node(beg-1)->in(0)->is_MachCall() ) { 1382 beg--; 1383 assert(beg > 0,"Catch cleanup walking beyond block boundary"); 1384 } 1385 // Range of inserted instructions is [beg, end) 1386 if( beg == end ) return; 1387 1388 // Clone along all Catch output paths. Clone area between the 'beg' and 1389 // 'end' indices. 1390 for( uint i = 0; i < block->_num_succs; i++ ) { 1391 Block *sb = block->_succs[i]; 1392 // Clone the entire area; ignoring the edge fixup for now. 1393 for( uint j = end; j > beg; j-- ) { 1394 Node *clone = block->get_node(j-1)->clone(); 1395 sb->insert_node(clone, 1); 1396 map_node_to_block(clone, sb); 1397 if (clone->needs_anti_dependence_check()) { 1398 insert_anti_dependences(sb, clone); 1399 } 1400 } 1401 } 1402 1403 1404 // Fixup edges. Check the def-use info per cloned Node 1405 for(uint i2 = beg; i2 < end; i2++ ) { 1406 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block 1407 Node *n = block->get_node(i2); // Node that got cloned 1408 // Need DU safe iterator because of edge manipulation in calls. 1409 Unique_Node_List* out = new Unique_Node_List(); 1410 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) { 1411 out->push(n->fast_out(j1)); 1412 } 1413 uint max = out->size(); 1414 for (uint j = 0; j < max; j++) {// For all users 1415 Node *use = out->pop(); 1416 Block *buse = get_block_for_node(use); 1417 if( use->is_Phi() ) { 1418 for( uint k = 1; k < use->req(); k++ ) 1419 if( use->in(k) == n ) { 1420 Block* b = get_block_for_node(buse->pred(k)); 1421 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx); 1422 use->set_req(k, fixup); 1423 } 1424 } else { 1425 if (block == buse) { 1426 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx); 1427 } else { 1428 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx); 1429 } 1430 } 1431 } // End for all users 1432 1433 } // End of for all Nodes in cloned area 1434 1435 // Remove the now-dead cloned ops 1436 for(uint i3 = beg; i3 < end; i3++ ) { 1437 block->get_node(beg)->disconnect_inputs(C); 1438 block->remove_node(beg); 1439 } 1440 1441 // If the successor blocks have a CreateEx node, move it back to the top 1442 for (uint i4 = 0; i4 < block->_num_succs; i4++) { 1443 Block *sb = block->_succs[i4]; 1444 uint new_cnt = end - beg; 1445 // Remove any newly created, but dead, nodes by traversing their schedule 1446 // backwards. Here, a dead node is a node whose only outputs (if any) are 1447 // unused projections. 1448 for (uint j = new_cnt; j > 0; j--) { 1449 Node *n = sb->get_node(j); 1450 // Individual projections are examined together with all siblings when 1451 // their parent is visited. 1452 if (n->is_Proj()) { 1453 continue; 1454 } 1455 bool dead = true; 1456 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { 1457 Node* out = n->fast_out(i); 1458 // n is live if it has a non-projection output or a used projection. 1459 if (!out->is_Proj() || out->outcnt() > 0) { 1460 dead = false; 1461 break; 1462 } 1463 } 1464 if (dead) { 1465 // n's only outputs (if any) are unused projections scheduled next to n 1466 // (see PhaseCFG::select()). Remove these projections backwards. 1467 for (uint k = j + n->outcnt(); k > j; k--) { 1468 Node* proj = sb->get_node(k); 1469 assert(proj->is_Proj() && proj->in(0) == n, 1470 "projection should correspond to dead node"); 1471 proj->disconnect_inputs(C); 1472 sb->remove_node(k); 1473 new_cnt--; 1474 } 1475 // Now remove the node itself. 1476 n->disconnect_inputs(C); 1477 sb->remove_node(j); 1478 new_cnt--; 1479 } 1480 } 1481 // If any newly created nodes remain, move the CreateEx node to the top 1482 if (new_cnt > 0) { 1483 Node *cex = sb->get_node(1+new_cnt); 1484 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) { 1485 sb->remove_node(1+new_cnt); 1486 sb->insert_node(cex, 1); 1487 } 1488 } 1489 } 1490 }