1 /*
2 * Copyright (c) 1998, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/shared/gc_globals.hpp"
28 #include "memory/allocation.inline.hpp"
29 #include "oops/compressedOops.hpp"
30 #include "opto/ad.hpp"
31 #include "opto/block.hpp"
32 #include "opto/c2compiler.hpp"
33 #include "opto/callnode.hpp"
34 #include "opto/cfgnode.hpp"
35 #include "opto/machnode.hpp"
36 #include "opto/runtime.hpp"
37 #include "opto/chaitin.hpp"
38 #include "runtime/os.inline.hpp"
39 #include "runtime/sharedRuntime.hpp"
40
41 // Optimization - Graph Style
42
43 // Check whether val is not-null-decoded compressed oop,
44 // i.e. will grab into the base of the heap if it represents null.
45 static bool accesses_heap_base_zone(Node *val) {
46 if (CompressedOops::base() != nullptr) { // Implies UseCompressedOops.
47 if (val && val->is_Mach()) {
48 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
49 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
50 // decode null to point to the heap base (Decode_NN).
51 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
52 return true;
53 }
54 }
55 // Must recognize load operation with Decode matched in memory operand.
56 // We should not reach here except for PPC/AIX, as os::zero_page_read_protected()
57 // returns true everywhere else. On PPC, no such memory operands
58 // exist, therefore we did not yet implement a check for such operands.
59 NOT_AIX(Unimplemented());
60 }
61 }
62 return false;
63 }
64
65 static bool needs_explicit_null_check_for_read(Node *val) {
66 // On some OSes (AIX) the page at address 0 is only write protected.
67 // If so, only Store operations will trap.
68 if (os::zero_page_read_protected()) {
69 return false; // Implicit null check will work.
70 }
71 // Also a read accessing the base of a heap-based compressed heap will trap.
72 if (accesses_heap_base_zone(val) && // Hits the base zone page.
73 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
74 return false;
75 }
76
77 return true;
78 }
79
80 //------------------------------implicit_null_check----------------------------
81 // Detect implicit-null-check opportunities. Basically, find null checks
82 // with suitable memory ops nearby. Use the memory op to do the null check.
83 // I can generate a memory op if there is not one nearby.
84 // The proj is the control projection for the not-null case.
85 // The val is the pointer being checked for nullness or
86 // decodeHeapOop_not_null node if it did not fold into address.
87 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
88 // Assume if null check need for 0 offset then always needed
89 // Intel solaris doesn't support any null checks yet and no
90 // mechanism exists (yet) to set the switches at an os_cpu level
91 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
92
93 // Make sure the ptr-is-null path appears to be uncommon!
94 float f = block->end()->as_MachIf()->_prob;
95 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
96 if( f > PROB_UNLIKELY_MAG(4) ) return;
97
98 uint bidx = 0; // Capture index of value into memop
99 bool was_store; // Memory op is a store op
100
101 // Get the successor block for if the test ptr is non-null
102 Block* not_null_block; // this one goes with the proj
103 Block* null_block;
104 if (block->get_node(block->number_of_nodes()-1) == proj) {
105 null_block = block->_succs[0];
106 not_null_block = block->_succs[1];
107 } else {
108 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
109 not_null_block = block->_succs[0];
110 null_block = block->_succs[1];
111 }
112 while (null_block->is_Empty() == Block::empty_with_goto) {
113 null_block = null_block->_succs[0];
114 }
115
116 // Search the exception block for an uncommon trap.
117 // (See Parse::do_if and Parse::do_ifnull for the reason
118 // we need an uncommon trap. Briefly, we need a way to
119 // detect failure of this optimization, as in 6366351.)
120 {
121 bool found_trap = false;
122 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
123 Node* nn = null_block->get_node(i1);
124 if (nn->is_MachCall() &&
125 nn->as_MachCall()->entry_point() == OptoRuntime::uncommon_trap_blob()->entry_point()) {
126 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
127 if (trtype->isa_int() && trtype->is_int()->is_con()) {
128 jint tr_con = trtype->is_int()->get_con();
129 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
130 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
131 assert((int)reason < (int)BitsPerInt, "recode bit map");
132 if (is_set_nth_bit(allowed_reasons, (int) reason)
133 && action != Deoptimization::Action_none) {
134 // This uncommon trap is sure to recompile, eventually.
135 // When that happens, C->too_many_traps will prevent
136 // this transformation from happening again.
137 found_trap = true;
138 }
139 }
140 break;
141 }
142 }
143 if (!found_trap) {
144 // We did not find an uncommon trap.
145 return;
146 }
147 }
148
149 // Check for decodeHeapOop_not_null node which did not fold into address
150 bool is_decoden = ((intptr_t)val) & 1;
151 val = (Node*)(((intptr_t)val) & ~1);
152
153 assert(!is_decoden ||
154 ((val->in(0) == nullptr) && val->is_Mach() &&
155 (val->as_Mach()->ideal_Opcode() == Op_DecodeN)), "sanity");
156
157 // Search the successor block for a load or store who's base value is also
158 // the tested value. There may be several.
159 MachNode *best = nullptr; // Best found so far
160 for (DUIterator i = val->outs(); val->has_out(i); i++) {
161 Node *m = val->out(i);
162 if( !m->is_Mach() ) continue;
163 MachNode *mach = m->as_Mach();
164 if (mach->barrier_data() != 0) {
165 // Using memory accesses with barriers to perform implicit null checks is
166 // not supported. These operations might expand into multiple assembly
167 // instructions during code emission, including new memory accesses (e.g.
168 // in G1's pre-barrier), which would invalidate the implicit null
169 // exception table.
170 continue;
171 }
172 was_store = false;
173 int iop = mach->ideal_Opcode();
174 switch( iop ) {
175 case Op_LoadB:
176 case Op_LoadUB:
177 case Op_LoadUS:
178 case Op_LoadD:
179 case Op_LoadF:
180 case Op_LoadI:
181 case Op_LoadL:
182 case Op_LoadP:
183 case Op_LoadN:
184 case Op_LoadS:
185 case Op_LoadKlass:
186 case Op_LoadNKlass:
187 case Op_LoadRange:
188 case Op_LoadD_unaligned:
189 case Op_LoadL_unaligned:
190 assert(mach->in(2) == val, "should be address");
191 break;
192 case Op_StoreB:
193 case Op_StoreC:
194 case Op_StoreD:
195 case Op_StoreF:
196 case Op_StoreI:
197 case Op_StoreL:
198 case Op_StoreP:
199 case Op_StoreN:
200 case Op_StoreNKlass:
201 was_store = true; // Memory op is a store op
202 // Stores will have their address in slot 2 (memory in slot 1).
203 // If the value being nul-checked is in another slot, it means we
204 // are storing the checked value, which does NOT check the value!
205 if( mach->in(2) != val ) continue;
206 break; // Found a memory op?
207 case Op_StrComp:
208 case Op_StrEquals:
209 case Op_StrIndexOf:
210 case Op_StrIndexOfChar:
211 case Op_AryEq:
212 case Op_VectorizedHashCode:
213 case Op_StrInflatedCopy:
214 case Op_StrCompressedCopy:
215 case Op_EncodeISOArray:
216 case Op_CountPositives:
217 // Not a legit memory op for implicit null check regardless of
218 // embedded loads
219 continue;
220 default: // Also check for embedded loads
221 if( !mach->needs_anti_dependence_check() )
222 continue; // Not an memory op; skip it
223 if( must_clone[iop] ) {
224 // Do not move nodes which produce flags because
225 // RA will try to clone it to place near branch and
226 // it will cause recompilation, see clone_node().
227 continue;
228 }
229 {
230 // Check that value is used in memory address in
231 // instructions with embedded load (CmpP val1,(val2+off)).
232 Node* base;
233 Node* index;
234 const MachOper* oper = mach->memory_inputs(base, index);
235 if (oper == nullptr || oper == (MachOper*)-1) {
236 continue; // Not an memory op; skip it
237 }
238 if (val == base ||
239 (val == index && val->bottom_type()->isa_narrowoop())) {
240 break; // Found it
241 } else {
242 continue; // Skip it
243 }
244 }
245 break;
246 }
247
248 // On some OSes (AIX) the page at address 0 is only write protected.
249 // If so, only Store operations will trap.
250 // But a read accessing the base of a heap-based compressed heap will trap.
251 if (!was_store && needs_explicit_null_check_for_read(val)) {
252 continue;
253 }
254
255 // Check that node's control edge is not-null block's head or dominates it,
256 // otherwise we can't hoist it because there are other control dependencies.
257 Node* ctrl = mach->in(0);
258 if (ctrl != nullptr && !(ctrl == not_null_block->head() ||
259 get_block_for_node(ctrl)->dominates(not_null_block))) {
260 continue;
261 }
262
263 // check if the offset is not too high for implicit exception
264 {
265 intptr_t offset = 0;
266 const TypePtr *adr_type = nullptr; // Do not need this return value here
267 const Node* base = mach->get_base_and_disp(offset, adr_type);
268 if (base == nullptr || base == NodeSentinel) {
269 // Narrow oop address doesn't have base, only index.
270 // Give up if offset is beyond page size or if heap base is not protected.
271 if (val->bottom_type()->isa_narrowoop() &&
272 (MacroAssembler::needs_explicit_null_check(offset) ||
273 !CompressedOops::use_implicit_null_checks()))
274 continue;
275 // cannot reason about it; is probably not implicit null exception
276 } else {
277 const TypePtr* tptr;
278 if ((UseCompressedOops || UseCompressedClassPointers) &&
279 (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
280 // 32-bits narrow oop can be the base of address expressions
281 tptr = base->get_ptr_type();
282 } else {
283 // only regular oops are expected here
284 tptr = base->bottom_type()->is_ptr();
285 }
286 // Give up if offset is not a compile-time constant.
287 if (offset == Type::OffsetBot || tptr->offset() == Type::OffsetBot)
288 continue;
289 offset += tptr->offset(); // correct if base is offsetted
290 // Give up if reference is beyond page size.
291 if (MacroAssembler::needs_explicit_null_check(offset))
292 continue;
293 // Give up if base is a decode node and the heap base is not protected.
294 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
295 !CompressedOops::use_implicit_null_checks())
296 continue;
297 }
298 }
299
300 // Check ctrl input to see if the null-check dominates the memory op
301 Block *cb = get_block_for_node(mach);
302 cb = cb->_idom; // Always hoist at least 1 block
303 if( !was_store ) { // Stores can be hoisted only one block
304 while( cb->_dom_depth > (block->_dom_depth + 1))
305 cb = cb->_idom; // Hoist loads as far as we want
306 // The non-null-block should dominate the memory op, too. Live
307 // range spilling will insert a spill in the non-null-block if it is
308 // needs to spill the memory op for an implicit null check.
309 if (cb->_dom_depth == (block->_dom_depth + 1)) {
310 if (cb != not_null_block) continue;
311 cb = cb->_idom;
312 }
313 }
314 if( cb != block ) continue;
315
316 // Found a memory user; see if it can be hoisted to check-block
317 uint vidx = 0; // Capture index of value into memop
318 uint j;
319 for( j = mach->req()-1; j > 0; j-- ) {
320 if( mach->in(j) == val ) {
321 vidx = j;
322 // Ignore DecodeN val which could be hoisted to where needed.
323 if( is_decoden ) continue;
324 }
325 // Block of memory-op input
326 Block* inb = get_block_for_node(mach->in(j));
327 if (mach->in(j)->is_Con() && mach->in(j)->req() == 1 && inb == get_block_for_node(mach)) {
328 // Ignore constant loads scheduled in the same block (we can simply hoist them as well)
329 continue;
330 }
331 Block *b = block; // Start from nul check
332 while( b != inb && b->_dom_depth > inb->_dom_depth )
333 b = b->_idom; // search upwards for input
334 // See if input dominates null check
335 if( b != inb )
336 break;
337 }
338 if( j > 0 )
339 continue;
340 Block *mb = get_block_for_node(mach);
341 // Hoisting stores requires more checks for the anti-dependence case.
342 // Give up hoisting if we have to move the store past any load.
343 if (was_store) {
344 // Make sure control does not do a merge (would have to check allpaths)
345 if (mb->num_preds() != 2) {
346 continue;
347 }
348 // mach is a store, hence block is the immediate dominator of mb.
349 // Due to the null-check shape of block (where its successors cannot re-join),
350 // block must be the direct predecessor of mb.
351 assert(get_block_for_node(mb->pred(1)) == block, "Unexpected predecessor block");
352 uint k;
353 uint num_nodes = mb->number_of_nodes();
354 for (k = 1; k < num_nodes; k++) {
355 Node *n = mb->get_node(k);
356 if (n->needs_anti_dependence_check() &&
357 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory)) {
358 break; // Found anti-dependent load
359 }
360 }
361 if (k < num_nodes) {
362 continue; // Found anti-dependent load
363 }
364 }
365
366 // Make sure this memory op is not already being used for a NullCheck
367 Node *e = mb->end();
368 if( e->is_MachNullCheck() && e->in(1) == mach )
369 continue; // Already being used as a null check
370
371 // Found a candidate! Pick one with least dom depth - the highest
372 // in the dom tree should be closest to the null check.
373 if (best == nullptr || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
374 best = mach;
375 bidx = vidx;
376 }
377 }
378 // No candidate!
379 if (best == nullptr) {
380 return;
381 }
382
383 // ---- Found an implicit null check
384 #ifndef PRODUCT
385 extern uint implicit_null_checks;
386 implicit_null_checks++;
387 #endif
388
389 if( is_decoden ) {
390 // Check if we need to hoist decodeHeapOop_not_null first.
391 Block *valb = get_block_for_node(val);
392 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
393 // Hoist it up to the end of the test block together with its inputs if they exist.
394 for (uint i = 2; i < val->req(); i++) {
395 // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
396 Node *temp = val->in(i);
397 Block *tempb = get_block_for_node(temp);
398 if (!tempb->dominates(block)) {
399 assert(block->dominates(tempb), "sanity check: temp node placement");
400 // We only expect nodes without further inputs, like MachTemp or load Base.
401 assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
402 "need for recursive hoisting not expected");
403 tempb->find_remove(temp);
404 block->add_inst(temp);
405 map_node_to_block(temp, block);
406 }
407 }
408 valb->find_remove(val);
409 block->add_inst(val);
410 map_node_to_block(val, block);
411 // DecodeN on x86 may kill flags. Check for flag-killing projections
412 // that also need to be hoisted.
413 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
414 Node* n = val->fast_out(j);
415 if( n->is_MachProj() ) {
416 get_block_for_node(n)->find_remove(n);
417 block->add_inst(n);
418 map_node_to_block(n, block);
419 }
420 }
421 }
422 }
423
424 // Hoist constant load inputs as well.
425 for (uint i = 1; i < best->req(); ++i) {
426 Node* n = best->in(i);
427 if (n->is_Con() && get_block_for_node(n) == get_block_for_node(best)) {
428 get_block_for_node(n)->find_remove(n);
429 block->add_inst(n);
430 map_node_to_block(n, block);
431 // Constant loads may kill flags (for example, when XORing a register).
432 // Check for flag-killing projections that also need to be hoisted.
433 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
434 Node* proj = n->fast_out(j);
435 if (proj->is_MachProj()) {
436 get_block_for_node(proj)->find_remove(proj);
437 block->add_inst(proj);
438 map_node_to_block(proj, block);
439 }
440 }
441 }
442 }
443
444 // Hoist the memory candidate up to the end of the test block.
445 Block *old_block = get_block_for_node(best);
446 old_block->find_remove(best);
447 block->add_inst(best);
448 map_node_to_block(best, block);
449
450 // Move the control dependence if it is pinned to not-null block.
451 // Don't change it in other cases: null or dominating control.
452 Node* ctrl = best->in(0);
453 if (ctrl != nullptr && get_block_for_node(ctrl) == not_null_block) {
454 // Set it to control edge of null check.
455 best->set_req(0, proj->in(0)->in(0));
456 }
457
458 // Check for flag-killing projections that also need to be hoisted
459 // Should be DU safe because no edge updates.
460 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
461 Node* n = best->fast_out(j);
462 if( n->is_MachProj() ) {
463 get_block_for_node(n)->find_remove(n);
464 block->add_inst(n);
465 map_node_to_block(n, block);
466 }
467 }
468
469 // proj==Op_True --> ne test; proj==Op_False --> eq test.
470 // One of two graph shapes got matched:
471 // (IfTrue (If (Bool NE (CmpP ptr null))))
472 // (IfFalse (If (Bool EQ (CmpP ptr null))))
473 // null checks are always branch-if-eq. If we see a IfTrue projection
474 // then we are replacing a 'ne' test with a 'eq' null check test.
475 // We need to flip the projections to keep the same semantics.
476 if( proj->Opcode() == Op_IfTrue ) {
477 // Swap order of projections in basic block to swap branch targets
478 Node *tmp1 = block->get_node(block->end_idx()+1);
479 Node *tmp2 = block->get_node(block->end_idx()+2);
480 block->map_node(tmp2, block->end_idx()+1);
481 block->map_node(tmp1, block->end_idx()+2);
482 Node *tmp = new Node(C->top()); // Use not null input
483 tmp1->replace_by(tmp);
484 tmp2->replace_by(tmp1);
485 tmp->replace_by(tmp2);
486 tmp->destruct(nullptr);
487 }
488
489 // Remove the existing null check; use a new implicit null check instead.
490 // Since schedule-local needs precise def-use info, we need to correct
491 // it as well.
492 Node *old_tst = proj->in(0);
493 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
494 block->map_node(nul_chk, block->end_idx());
495 map_node_to_block(nul_chk, block);
496 // Redirect users of old_test to nul_chk
497 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
498 old_tst->last_out(i2)->set_req(0, nul_chk);
499 // Clean-up any dead code
500 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
501 Node* in = old_tst->in(i3);
502 old_tst->set_req(i3, nullptr);
503 if (in->outcnt() == 0) {
504 // Remove dead input node
505 in->disconnect_inputs(C);
506 block->find_remove(in);
507 }
508 }
509
510 latency_from_uses(nul_chk);
511 latency_from_uses(best);
512
513 // insert anti-dependences to defs in this block
514 if (! best->needs_anti_dependence_check()) {
515 for (uint k = 1; k < block->number_of_nodes(); k++) {
516 Node *n = block->get_node(k);
517 if (n->needs_anti_dependence_check() &&
518 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
519 // Found anti-dependent load
520 insert_anti_dependences(block, n);
521 }
522 }
523 }
524 }
525
526
527 //------------------------------select-----------------------------------------
528 // Select a nice fellow from the worklist to schedule next. If there is only one
529 // choice, then use it. CreateEx nodes that are initially ready must start their
530 // blocks and are given the highest priority, by being placed at the beginning
531 // of the worklist. Next after initially-ready CreateEx nodes are projections,
532 // which must follow their parents, and CreateEx nodes with local input
533 // dependencies. Next are constants and CheckCastPP nodes. There are a number of
534 // other special cases, for instructions that consume condition codes, et al.
535 // These are chosen immediately. Some instructions are required to immediately
536 // precede the last instruction in the block, and these are taken last. Of the
537 // remaining cases (most), choose the instruction with the greatest latency
538 // (that is, the most number of pseudo-cycles required to the end of the
539 // routine). If there is a tie, choose the instruction with the most inputs.
540 Node* PhaseCFG::select(
541 Block* block,
542 Node_List &worklist,
543 GrowableArray<int> &ready_cnt,
544 VectorSet &next_call,
545 uint sched_slot,
546 intptr_t* recalc_pressure_nodes) {
547
548 // If only a single entry on the stack, use it
549 uint cnt = worklist.size();
550 if (cnt == 1) {
551 Node *n = worklist[0];
552 worklist.map(0,worklist.pop());
553 return n;
554 }
555
556 uint choice = 0; // Bigger is most important
557 uint latency = 0; // Bigger is scheduled first
558 uint score = 0; // Bigger is better
559 int idx = -1; // Index in worklist
560 int cand_cnt = 0; // Candidate count
561 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
562
563 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
564 // Order in worklist is used to break ties.
565 // See caller for how this is used to delay scheduling
566 // of induction variable increments to after the other
567 // uses of the phi are scheduled.
568 Node *n = worklist[i]; // Get Node on worklist
569
570 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
571 if (iop == Op_CreateEx || n->is_Proj()) {
572 // CreateEx nodes that are initially ready must start the block (after Phi
573 // and Parm nodes which are pre-scheduled) and get top priority. This is
574 // currently enforced by placing them at the beginning of the initial
575 // worklist and selecting them eagerly here. After these, projections and
576 // other CreateEx nodes are selected with equal priority.
577 worklist.map(i,worklist.pop());
578 return n;
579 }
580
581 if (n->Opcode() == Op_Con || iop == Op_CheckCastPP) {
582 // Constants and CheckCastPP nodes have higher priority than the rest of
583 // the nodes tested below. Record as current winner, but keep looking for
584 // higher-priority nodes in the worklist.
585 choice = 4;
586 // Latency and score are only used to break ties among low-priority nodes.
587 latency = 0;
588 score = 0;
589 idx = i;
590 continue;
591 }
592
593 // Final call in a block must be adjacent to 'catch'
594 Node *e = block->end();
595 if( e->is_Catch() && e->in(0)->in(0) == n )
596 continue;
597
598 // Memory op for an implicit null check has to be at the end of the block
599 if( e->is_MachNullCheck() && e->in(1) == n )
600 continue;
601
602 // Schedule IV increment last.
603 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
604 // Cmp might be matched into CountedLoopEnd node.
605 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
606 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
607 continue;
608 }
609 }
610
611 uint n_choice = 2;
612
613 // See if this instruction is consumed by a branch. If so, then (as the
614 // branch is the last instruction in the basic block) force it to the
615 // end of the basic block
616 if ( must_clone[iop] ) {
617 // See if any use is a branch
618 bool found_machif = false;
619
620 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
621 Node* use = n->fast_out(j);
622
623 // The use is a conditional branch, make them adjacent
624 if (use->is_MachIf() && get_block_for_node(use) == block) {
625 found_machif = true;
626 break;
627 }
628
629 // More than this instruction pending for successor to be ready,
630 // don't choose this if other opportunities are ready
631 if (ready_cnt.at(use->_idx) > 1)
632 n_choice = 1;
633 }
634
635 // loop terminated, prefer not to use this instruction
636 if (found_machif)
637 continue;
638 }
639
640 // See if this has a predecessor that is "must_clone", i.e. sets the
641 // condition code. If so, choose this first
642 for (uint j = 0; j < n->req() ; j++) {
643 Node *inn = n->in(j);
644 if (inn) {
645 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
646 n_choice = 3;
647 break;
648 }
649 }
650 }
651
652 // MachTemps should be scheduled last so they are near their uses
653 if (n->is_MachTemp()) {
654 n_choice = 1;
655 }
656
657 uint n_latency = get_latency_for_node(n);
658 uint n_score = n->req(); // Many inputs get high score to break ties
659
660 if (OptoRegScheduling && block_size_threshold_ok) {
661 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
662 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
663 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
664 // simulate the notion that we just picked this node to schedule
665 n->add_flag(Node::Flag_is_scheduled);
666 // now calculate its effect upon the graph if we did
667 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
668 // return its state for finalize in case somebody else wins
669 n->remove_flag(Node::Flag_is_scheduled);
670 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
671 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
672 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
673 recalc_pressure_nodes[n->_idx] = int_pressure;
674 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
675 }
676
677 if (_scheduling_for_pressure) {
678 latency = n_latency;
679 if (n_choice != 3) {
680 // Now evaluate each register pressure component based on threshold in the score.
681 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
682 // on a single instruction, but we might see it shrink on both banks.
683 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
684 // live ranges that terminate on this instruction.
685 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
686 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
687 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
688 }
689 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
690 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
691 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
692 }
693 } else {
694 // make sure we choose these candidates
695 score = 0;
696 }
697 }
698 }
699
700 // Keep best latency found
701 cand_cnt++;
702 if (choice < n_choice ||
703 (choice == n_choice &&
704 ((StressLCM && C->randomized_select(cand_cnt)) ||
705 (!StressLCM &&
706 (latency < n_latency ||
707 (latency == n_latency &&
708 (score < n_score))))))) {
709 choice = n_choice;
710 latency = n_latency;
711 score = n_score;
712 idx = i; // Also keep index in worklist
713 }
714 } // End of for all ready nodes in worklist
715
716 guarantee(idx >= 0, "index should be set");
717 Node *n = worklist[(uint)idx]; // Get the winner
718
719 worklist.map((uint)idx, worklist.pop()); // Compress worklist
720 return n;
721 }
722
723 //-------------------------adjust_register_pressure----------------------------
724 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
725 PhaseLive* liveinfo = _regalloc->get_live();
726 IndexSet* liveout = liveinfo->live(block);
727 // first adjust the register pressure for the sources
728 for (uint i = 1; i < n->req(); i++) {
729 bool lrg_ends = false;
730 Node *src_n = n->in(i);
731 if (src_n == nullptr) continue;
732 if (!src_n->is_Mach()) continue;
733 uint src = _regalloc->_lrg_map.find(src_n);
734 if (src == 0) continue;
735 LRG& lrg_src = _regalloc->lrgs(src);
736 // detect if the live range ends or not
737 if (liveout->member(src) == false) {
738 lrg_ends = true;
739 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
740 Node* m = src_n->fast_out(j); // Get user
741 if (m == n) continue;
742 if (!m->is_Mach()) continue;
743 MachNode *mach = m->as_Mach();
744 bool src_matches = false;
745 int iop = mach->ideal_Opcode();
746
747 switch (iop) {
748 case Op_StoreB:
749 case Op_StoreC:
750 case Op_StoreD:
751 case Op_StoreF:
752 case Op_StoreI:
753 case Op_StoreL:
754 case Op_StoreP:
755 case Op_StoreN:
756 case Op_StoreVector:
757 case Op_StoreVectorMasked:
758 case Op_StoreVectorScatter:
759 case Op_StoreVectorScatterMasked:
760 case Op_StoreNKlass:
761 for (uint k = 1; k < m->req(); k++) {
762 Node *in = m->in(k);
763 if (in == src_n) {
764 src_matches = true;
765 break;
766 }
767 }
768 break;
769
770 default:
771 src_matches = true;
772 break;
773 }
774
775 // If we have a store as our use, ignore the non source operands
776 if (src_matches == false) continue;
777
778 // Mark every unscheduled use which is not n with a recalculation
779 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
780 if (finalize_mode && !m->is_Phi()) {
781 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
782 }
783 lrg_ends = false;
784 }
785 }
786 }
787 // if none, this live range ends and we can adjust register pressure
788 if (lrg_ends) {
789 if (finalize_mode) {
790 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
791 } else {
792 _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
793 }
794 }
795 }
796
797 // now add the register pressure from the dest and evaluate which heuristic we should use:
798 // 1.) The default, latency scheduling
799 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
800 uint dst = _regalloc->_lrg_map.find(n);
801 if (dst != 0) {
802 LRG& lrg_dst = _regalloc->lrgs(dst);
803 if (finalize_mode) {
804 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
805 // check to see if we fall over the register pressure cliff here
806 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
807 _scheduling_for_pressure = true;
808 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
809 _scheduling_for_pressure = true;
810 } else {
811 // restore latency scheduling mode
812 _scheduling_for_pressure = false;
813 }
814 } else {
815 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
816 }
817 }
818 }
819
820 //------------------------------set_next_call----------------------------------
821 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
822 if( next_call.test_set(n->_idx) ) return;
823 for( uint i=0; i<n->len(); i++ ) {
824 Node *m = n->in(i);
825 if( !m ) continue; // must see all nodes in block that precede call
826 if (get_block_for_node(m) == block) {
827 set_next_call(block, m, next_call);
828 }
829 }
830 }
831
832 //------------------------------needed_for_next_call---------------------------
833 // Set the flag 'next_call' for each Node that is needed for the next call to
834 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
835 // next subroutine call get priority - basically it moves things NOT needed
836 // for the next call till after the call. This prevents me from trying to
837 // carry lots of stuff live across a call.
838 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
839 // Find the next control-defining Node in this block
840 Node* call = nullptr;
841 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
842 Node* m = this_call->fast_out(i);
843 if (get_block_for_node(m) == block && // Local-block user
844 m != this_call && // Not self-start node
845 m->is_MachCall()) {
846 call = m;
847 break;
848 }
849 }
850 if (call == nullptr) return; // No next call (e.g., block end is near)
851 // Set next-call for all inputs to this call
852 set_next_call(block, call, next_call);
853 }
854
855 //------------------------------add_call_kills-------------------------------------
856 // helper function that adds caller save registers to MachProjNode
857 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
858 // Fill in the kill mask for the call
859 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
860 if( !regs.Member(r) ) { // Not already defined by the call
861 // Save-on-call register?
862 if ((save_policy[r] == 'C') ||
863 (save_policy[r] == 'A') ||
864 ((save_policy[r] == 'E') && exclude_soe)) {
865 proj->_rout.Insert(r);
866 }
867 }
868 }
869 }
870
871
872 //------------------------------sched_call-------------------------------------
873 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
874 RegMask regs;
875
876 // Schedule all the users of the call right now. All the users are
877 // projection Nodes, so they must be scheduled next to the call.
878 // Collect all the defined registers.
879 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
880 Node* n = mcall->fast_out(i);
881 assert( n->is_MachProj(), "" );
882 int n_cnt = ready_cnt.at(n->_idx)-1;
883 ready_cnt.at_put(n->_idx, n_cnt);
884 assert( n_cnt == 0, "" );
885 // Schedule next to call
886 block->map_node(n, node_cnt++);
887 // Collect defined registers
888 regs.OR(n->out_RegMask());
889 // Check for scheduling the next control-definer
890 if( n->bottom_type() == Type::CONTROL )
891 // Warm up next pile of heuristic bits
892 needed_for_next_call(block, n, next_call);
893
894 // Children of projections are now all ready
895 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
896 Node* m = n->fast_out(j); // Get user
897 if(get_block_for_node(m) != block) {
898 continue;
899 }
900 if( m->is_Phi() ) continue;
901 int m_cnt = ready_cnt.at(m->_idx) - 1;
902 ready_cnt.at_put(m->_idx, m_cnt);
903 if( m_cnt == 0 )
904 worklist.push(m);
905 }
906
907 }
908
909 // Act as if the call defines the Frame Pointer.
910 // Certainly the FP is alive and well after the call.
911 regs.Insert(_matcher.c_frame_pointer());
912
913 // Set all registers killed and not already defined by the call.
914 uint r_cnt = mcall->tf()->range_cc()->cnt();
915 int op = mcall->ideal_Opcode();
916 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
917 map_node_to_block(proj, block);
918 block->insert_node(proj, node_cnt++);
919
920 // Select the right register save policy.
921 const char *save_policy = nullptr;
922 switch (op) {
923 case Op_CallRuntime:
924 case Op_CallLeaf:
925 case Op_CallLeafNoFP:
926 case Op_CallLeafVector:
927 // Calling C code so use C calling convention
928 save_policy = _matcher._c_reg_save_policy;
929 break;
930
931 case Op_CallStaticJava:
932 case Op_CallDynamicJava:
933 // Calling Java code so use Java calling convention
934 save_policy = _matcher._register_save_policy;
935 break;
936
937 default:
938 ShouldNotReachHere();
939 }
940
941 // When using CallRuntime mark SOE registers as killed by the call
942 // so values that could show up in the RegisterMap aren't live in a
943 // callee saved register since the register wouldn't know where to
944 // find them. CallLeaf and CallLeafNoFP are ok because they can't
945 // have debug info on them. Strictly speaking this only needs to be
946 // done for oops since idealreg2debugmask takes care of debug info
947 // references but there no way to handle oops differently than other
948 // pointers as far as the kill mask goes.
949 bool exclude_soe = op == Op_CallRuntime;
950
951 // If the call is a MethodHandle invoke, we need to exclude the
952 // register which is used to save the SP value over MH invokes from
953 // the mask. Otherwise this register could be used for
954 // deoptimization information.
955 if (op == Op_CallStaticJava) {
956 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
957 if (mcallstaticjava->_method_handle_invoke)
958 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
959 }
960
961 add_call_kills(proj, regs, save_policy, exclude_soe);
962
963 return node_cnt;
964 }
965
966
967 //------------------------------schedule_local---------------------------------
968 // Topological sort within a block. Someday become a real scheduler.
969 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
970 // Already "sorted" are the block start Node (as the first entry), and
971 // the block-ending Node and any trailing control projections. We leave
972 // these alone. PhiNodes and ParmNodes are made to follow the block start
973 // Node. Everything else gets topo-sorted.
974
975 #ifndef PRODUCT
976 if (trace_opto_pipelining()) {
977 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
978 for (uint i = 0;i < block->number_of_nodes(); i++) {
979 tty->print("# ");
980 block->get_node(i)->dump();
981 }
982 tty->print_cr("#");
983 }
984 #endif
985
986 // RootNode is already sorted
987 if (block->number_of_nodes() == 1) {
988 return true;
989 }
990
991 bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
992
993 // We track the uses of local definitions as input dependences so that
994 // we know when a given instruction is available to be scheduled.
995 uint i;
996 if (OptoRegScheduling && block_size_threshold_ok) {
997 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
998 Node *n = block->get_node(i);
999 n->remove_flag(Node::Flag_is_scheduled);
1000 if (!n->is_Phi()) {
1001 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
1002 }
1003 }
1004 }
1005
1006 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
1007 uint node_cnt = block->end_idx();
1008 uint phi_cnt = 1;
1009 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
1010 Node *n = block->get_node(i);
1011 if( n->is_Phi() || // Found a PhiNode or ParmNode
1012 (n->is_Proj() && n->in(0) == block->head()) ) {
1013 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
1014 block->map_node(block->get_node(phi_cnt), i);
1015 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
1016 if (OptoRegScheduling && block_size_threshold_ok) {
1017 // mark n as scheduled
1018 n->add_flag(Node::Flag_is_scheduled);
1019 }
1020 } else { // All others
1021 // Count block-local inputs to 'n'
1022 uint cnt = n->len(); // Input count
1023 uint local = 0;
1024 for( uint j=0; j<cnt; j++ ) {
1025 Node *m = n->in(j);
1026 if( m && get_block_for_node(m) == block && !m->is_top() )
1027 local++; // One more block-local input
1028 }
1029 ready_cnt.at_put(n->_idx, local); // Count em up
1030 // A few node types require changing a required edge to a precedence edge
1031 // before allocation.
1032 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1033 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1034 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1035 // MemBarAcquire could be created without Precedent edge.
1036 // del_req() replaces the specified edge with the last input edge
1037 // and then removes the last edge. If the specified edge > number of
1038 // edges the last edge will be moved outside of the input edges array
1039 // and the edge will be lost. This is why this code should be
1040 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1041 Node *x = n->in(TypeFunc::Parms);
1042 if (x != nullptr && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1043 // Old edge to node within same block will get removed, but no precedence
1044 // edge will get added because it already exists. Update ready count.
1045 int cnt = ready_cnt.at(n->_idx);
1046 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1047 ready_cnt.at_put(n->_idx, cnt-1);
1048 }
1049 n->del_req(TypeFunc::Parms);
1050 n->add_prec(x);
1051 }
1052 }
1053 }
1054 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1055 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1056
1057 // All the prescheduled guys do not hold back internal nodes
1058 uint i3;
1059 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1060 Node *n = block->get_node(i3); // Get pre-scheduled
1061 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1062 Node* m = n->fast_out(j);
1063 if (get_block_for_node(m) == block) { // Local-block user
1064 int m_cnt = ready_cnt.at(m->_idx)-1;
1065 if (OptoRegScheduling && block_size_threshold_ok) {
1066 // mark m as scheduled
1067 if (m_cnt < 0) {
1068 m->add_flag(Node::Flag_is_scheduled);
1069 }
1070 }
1071 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1072 }
1073 }
1074 }
1075
1076 Node_List delay;
1077 // Make a worklist
1078 Node_List worklist;
1079 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1080 Node *m = block->get_node(i4);
1081 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1082 if (m->is_iteratively_computed()) {
1083 // Push induction variable increments last to allow other uses
1084 // of the phi to be scheduled first. The select() method breaks
1085 // ties in scheduling by worklist order.
1086 delay.push(m);
1087 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1088 // Place CreateEx nodes that are initially ready at the beginning of the
1089 // worklist so they are selected first and scheduled at the block start.
1090 worklist.insert(0, m);
1091 } else {
1092 worklist.push(m); // Then on to worklist!
1093 }
1094 }
1095 }
1096 while (delay.size()) {
1097 Node* d = delay.pop();
1098 worklist.push(d);
1099 }
1100
1101 if (OptoRegScheduling && block_size_threshold_ok) {
1102 // To stage register pressure calculations we need to examine the live set variables
1103 // breaking them up by register class to compartmentalize the calculations.
1104 _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1105 _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1106 _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1107 _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1108
1109 _regalloc->compute_entry_block_pressure(block);
1110 }
1111
1112 // Warm up the 'next_call' heuristic bits
1113 needed_for_next_call(block, block->head(), next_call);
1114
1115 #ifndef PRODUCT
1116 if (trace_opto_pipelining()) {
1117 for (uint j=0; j< block->number_of_nodes(); j++) {
1118 Node *n = block->get_node(j);
1119 int idx = n->_idx;
1120 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1121 tty->print("latency:%3d ", get_latency_for_node(n));
1122 tty->print("%4d: %s\n", idx, n->Name());
1123 }
1124 }
1125 #endif
1126
1127 uint max_idx = (uint)ready_cnt.length();
1128 // Pull from worklist and schedule
1129 while( worklist.size() ) { // Worklist is not ready
1130
1131 #ifndef PRODUCT
1132 if (trace_opto_pipelining()) {
1133 tty->print("# ready list:");
1134 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1135 Node *n = worklist[i]; // Get Node on worklist
1136 tty->print(" %d", n->_idx);
1137 }
1138 tty->cr();
1139 }
1140 #endif
1141
1142 // Select and pop a ready guy from worklist
1143 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1144 block->map_node(n, phi_cnt++); // Schedule him next
1145
1146 if (OptoRegScheduling && block_size_threshold_ok) {
1147 n->add_flag(Node::Flag_is_scheduled);
1148
1149 // Now adjust the resister pressure with the node we selected
1150 if (!n->is_Phi()) {
1151 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1152 }
1153 }
1154
1155 #ifndef PRODUCT
1156 if (trace_opto_pipelining()) {
1157 tty->print("# select %d: %s", n->_idx, n->Name());
1158 tty->print(", latency:%d", get_latency_for_node(n));
1159 n->dump();
1160 if (Verbose) {
1161 tty->print("# ready list:");
1162 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1163 Node *n = worklist[i]; // Get Node on worklist
1164 tty->print(" %d", n->_idx);
1165 }
1166 tty->cr();
1167 }
1168 }
1169
1170 #endif
1171 if( n->is_MachCall() ) {
1172 MachCallNode *mcall = n->as_MachCall();
1173 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1174 continue;
1175 }
1176
1177 if (n->is_Mach() && n->as_Mach()->has_call()) {
1178 RegMask regs;
1179 regs.Insert(_matcher.c_frame_pointer());
1180 regs.OR(n->out_RegMask());
1181
1182 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1183 map_node_to_block(proj, block);
1184 block->insert_node(proj, phi_cnt++);
1185
1186 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1187 }
1188
1189 // Children are now all ready
1190 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1191 Node* m = n->fast_out(i5); // Get user
1192 if (get_block_for_node(m) != block) {
1193 continue;
1194 }
1195 if( m->is_Phi() ) continue;
1196 if (m->_idx >= max_idx) { // new node, skip it
1197 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1198 continue;
1199 }
1200 int m_cnt = ready_cnt.at(m->_idx) - 1;
1201 ready_cnt.at_put(m->_idx, m_cnt);
1202 if( m_cnt == 0 )
1203 worklist.push(m);
1204 }
1205 }
1206
1207 if( phi_cnt != block->end_idx() ) {
1208 // did not schedule all. Retry, Bailout, or Die
1209 if (C->subsume_loads() == true && !C->failing()) {
1210 // Retry with subsume_loads == false
1211 // If this is the first failure, the sentinel string will "stick"
1212 // to the Compile object, and the C2Compiler will see it and retry.
1213 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1214 } else {
1215 assert(C->failure_is_artificial(), "graph should be schedulable");
1216 }
1217 // assert( phi_cnt == end_idx(), "did not schedule all" );
1218 return false;
1219 }
1220
1221 if (OptoRegScheduling && block_size_threshold_ok) {
1222 _regalloc->compute_exit_block_pressure(block);
1223 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1224 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1225 }
1226
1227 #ifndef PRODUCT
1228 if (trace_opto_pipelining()) {
1229 tty->print_cr("#");
1230 tty->print_cr("# after schedule_local");
1231 for (uint i = 0;i < block->number_of_nodes();i++) {
1232 tty->print("# ");
1233 block->get_node(i)->dump();
1234 }
1235 tty->print_cr("# ");
1236
1237 if (OptoRegScheduling && block_size_threshold_ok) {
1238 tty->print_cr("# pressure info : %d", block->_pre_order);
1239 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1240 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1241 }
1242 tty->cr();
1243 }
1244 #endif
1245
1246 return true;
1247 }
1248
1249 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1250 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1251 for (uint l = 0; l < use->len(); l++) {
1252 if (use->in(l) == old_def) {
1253 if (l < use->req()) {
1254 use->set_req(l, new_def);
1255 } else {
1256 use->rm_prec(l);
1257 use->add_prec(new_def);
1258 l--;
1259 }
1260 }
1261 }
1262 }
1263
1264 //------------------------------catch_cleanup_find_cloned_def------------------
1265 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1266 assert( use_blk != def_blk, "Inter-block cleanup only");
1267
1268 // The use is some block below the Catch. Find and return the clone of the def
1269 // that dominates the use. If there is no clone in a dominating block, then
1270 // create a phi for the def in a dominating block.
1271
1272 // Find which successor block dominates this use. The successor
1273 // blocks must all be single-entry (from the Catch only; I will have
1274 // split blocks to make this so), hence they all dominate.
1275 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1276 use_blk = use_blk->_idom;
1277
1278 // Find the successor
1279 Node *fixup = nullptr;
1280
1281 uint j;
1282 for( j = 0; j < def_blk->_num_succs; j++ )
1283 if( use_blk == def_blk->_succs[j] )
1284 break;
1285
1286 if( j == def_blk->_num_succs ) {
1287 // Block at same level in dom-tree is not a successor. It needs a
1288 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1289 Node_Array inputs;
1290 for(uint k = 1; k < use_blk->num_preds(); k++) {
1291 Block* block = get_block_for_node(use_blk->pred(k));
1292 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1293 }
1294
1295 // Check to see if the use_blk already has an identical phi inserted.
1296 // If it exists, it will be at the first position since all uses of a
1297 // def are processed together.
1298 Node *phi = use_blk->get_node(1);
1299 if( phi->is_Phi() ) {
1300 fixup = phi;
1301 for (uint k = 1; k < use_blk->num_preds(); k++) {
1302 if (phi->in(k) != inputs[k]) {
1303 // Not a match
1304 fixup = nullptr;
1305 break;
1306 }
1307 }
1308 }
1309
1310 // If an existing PhiNode was not found, make a new one.
1311 if (fixup == nullptr) {
1312 Node *new_phi = PhiNode::make(use_blk->head(), def);
1313 use_blk->insert_node(new_phi, 1);
1314 map_node_to_block(new_phi, use_blk);
1315 for (uint k = 1; k < use_blk->num_preds(); k++) {
1316 new_phi->set_req(k, inputs[k]);
1317 }
1318 fixup = new_phi;
1319 }
1320
1321 } else {
1322 // Found the use just below the Catch. Make it use the clone.
1323 fixup = use_blk->get_node(n_clone_idx);
1324 }
1325
1326 return fixup;
1327 }
1328
1329 //--------------------------catch_cleanup_intra_block--------------------------
1330 // Fix all input edges in use that reference "def". The use is in the same
1331 // block as the def and both have been cloned in each successor block.
1332 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1333
1334 // Both the use and def have been cloned. For each successor block,
1335 // get the clone of the use, and make its input the clone of the def
1336 // found in that block.
1337
1338 uint use_idx = blk->find_node(use);
1339 uint offset_idx = use_idx - beg;
1340 for( uint k = 0; k < blk->_num_succs; k++ ) {
1341 // Get clone in each successor block
1342 Block *sb = blk->_succs[k];
1343 Node *clone = sb->get_node(offset_idx+1);
1344 assert( clone->Opcode() == use->Opcode(), "" );
1345
1346 // Make use-clone reference the def-clone
1347 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1348 }
1349 }
1350
1351 //------------------------------catch_cleanup_inter_block---------------------
1352 // Fix all input edges in use that reference "def". The use is in a different
1353 // block than the def.
1354 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1355 if( !use_blk ) return; // Can happen if the use is a precedence edge
1356
1357 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1358 catch_cleanup_fix_all_inputs(use, def, new_def);
1359 }
1360
1361 //------------------------------call_catch_cleanup-----------------------------
1362 // If we inserted any instructions between a Call and his CatchNode,
1363 // clone the instructions on all paths below the Catch.
1364 void PhaseCFG::call_catch_cleanup(Block* block) {
1365
1366 // End of region to clone
1367 uint end = block->end_idx();
1368 if( !block->get_node(end)->is_Catch() ) return;
1369 // Start of region to clone
1370 uint beg = end;
1371 while(!block->get_node(beg-1)->is_MachProj() ||
1372 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1373 beg--;
1374 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1375 }
1376 // Range of inserted instructions is [beg, end)
1377 if( beg == end ) return;
1378
1379 // Clone along all Catch output paths. Clone area between the 'beg' and
1380 // 'end' indices.
1381 for( uint i = 0; i < block->_num_succs; i++ ) {
1382 Block *sb = block->_succs[i];
1383 // Clone the entire area; ignoring the edge fixup for now.
1384 for( uint j = end; j > beg; j-- ) {
1385 Node *clone = block->get_node(j-1)->clone();
1386 sb->insert_node(clone, 1);
1387 map_node_to_block(clone, sb);
1388 if (clone->needs_anti_dependence_check()) {
1389 insert_anti_dependences(sb, clone);
1390 }
1391 }
1392 }
1393
1394
1395 // Fixup edges. Check the def-use info per cloned Node
1396 for(uint i2 = beg; i2 < end; i2++ ) {
1397 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1398 Node *n = block->get_node(i2); // Node that got cloned
1399 // Need DU safe iterator because of edge manipulation in calls.
1400 Unique_Node_List* out = new Unique_Node_List();
1401 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1402 out->push(n->fast_out(j1));
1403 }
1404 uint max = out->size();
1405 for (uint j = 0; j < max; j++) {// For all users
1406 Node *use = out->pop();
1407 Block *buse = get_block_for_node(use);
1408 if( use->is_Phi() ) {
1409 for( uint k = 1; k < use->req(); k++ )
1410 if( use->in(k) == n ) {
1411 Block* b = get_block_for_node(buse->pred(k));
1412 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1413 use->set_req(k, fixup);
1414 }
1415 } else {
1416 if (block == buse) {
1417 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1418 } else {
1419 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1420 }
1421 }
1422 } // End for all users
1423
1424 } // End of for all Nodes in cloned area
1425
1426 // Remove the now-dead cloned ops
1427 for(uint i3 = beg; i3 < end; i3++ ) {
1428 block->get_node(beg)->disconnect_inputs(C);
1429 block->remove_node(beg);
1430 }
1431
1432 // If the successor blocks have a CreateEx node, move it back to the top
1433 for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1434 Block *sb = block->_succs[i4];
1435 uint new_cnt = end - beg;
1436 // Remove any newly created, but dead, nodes by traversing their schedule
1437 // backwards. Here, a dead node is a node whose only outputs (if any) are
1438 // unused projections.
1439 for (uint j = new_cnt; j > 0; j--) {
1440 Node *n = sb->get_node(j);
1441 // Individual projections are examined together with all siblings when
1442 // their parent is visited.
1443 if (n->is_Proj()) {
1444 continue;
1445 }
1446 bool dead = true;
1447 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1448 Node* out = n->fast_out(i);
1449 // n is live if it has a non-projection output or a used projection.
1450 if (!out->is_Proj() || out->outcnt() > 0) {
1451 dead = false;
1452 break;
1453 }
1454 }
1455 if (dead) {
1456 // n's only outputs (if any) are unused projections scheduled next to n
1457 // (see PhaseCFG::select()). Remove these projections backwards.
1458 for (uint k = j + n->outcnt(); k > j; k--) {
1459 Node* proj = sb->get_node(k);
1460 assert(proj->is_Proj() && proj->in(0) == n,
1461 "projection should correspond to dead node");
1462 proj->disconnect_inputs(C);
1463 sb->remove_node(k);
1464 new_cnt--;
1465 }
1466 // Now remove the node itself.
1467 n->disconnect_inputs(C);
1468 sb->remove_node(j);
1469 new_cnt--;
1470 }
1471 }
1472 // If any newly created nodes remain, move the CreateEx node to the top
1473 if (new_cnt > 0) {
1474 Node *cex = sb->get_node(1+new_cnt);
1475 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1476 sb->remove_node(1+new_cnt);
1477 sb->insert_node(cex, 1);
1478 }
1479 }
1480 }
1481 }