1 /*
2 * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/shared/gc_globals.hpp"
28 #include "memory/allocation.inline.hpp"
29 #include "oops/compressedOops.hpp"
30 #include "opto/ad.hpp"
31 #include "opto/block.hpp"
32 #include "opto/c2compiler.hpp"
33 #include "opto/callnode.hpp"
34 #include "opto/cfgnode.hpp"
35 #include "opto/machnode.hpp"
36 #include "opto/runtime.hpp"
37 #include "opto/chaitin.hpp"
38 #include "runtime/os.inline.hpp"
39 #include "runtime/sharedRuntime.hpp"
40
41 // Optimization - Graph Style
42
43 // Check whether val is not-null-decoded compressed oop,
44 // i.e. will grab into the base of the heap if it represents NULL.
45 static bool accesses_heap_base_zone(Node *val) {
46 if (CompressedOops::base() != NULL) { // Implies UseCompressedOops.
47 if (val && val->is_Mach()) {
48 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
49 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
50 // decode NULL to point to the heap base (Decode_NN).
51 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
52 return true;
53 }
54 }
55 // Must recognize load operation with Decode matched in memory operand.
56 // We should not reach here except for PPC/AIX, as os::zero_page_read_protected()
57 // returns true everywhere else. On PPC, no such memory operands
58 // exist, therefore we did not yet implement a check for such operands.
59 NOT_AIX(Unimplemented());
60 }
61 }
62 return false;
63 }
64
65 static bool needs_explicit_null_check_for_read(Node *val) {
66 // On some OSes (AIX) the page at address 0 is only write protected.
67 // If so, only Store operations will trap.
68 if (os::zero_page_read_protected()) {
69 return false; // Implicit null check will work.
70 }
71 // Also a read accessing the base of a heap-based compressed heap will trap.
72 if (accesses_heap_base_zone(val) && // Hits the base zone page.
73 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
74 return false;
75 }
76
77 return true;
78 }
79
80 //------------------------------implicit_null_check----------------------------
81 // Detect implicit-null-check opportunities. Basically, find NULL checks
82 // with suitable memory ops nearby. Use the memory op to do the NULL check.
83 // I can generate a memory op if there is not one nearby.
84 // The proj is the control projection for the not-null case.
85 // The val is the pointer being checked for nullness or
86 // decodeHeapOop_not_null node if it did not fold into address.
87 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
88 // Assume if null check need for 0 offset then always needed
89 // Intel solaris doesn't support any null checks yet and no
90 // mechanism exists (yet) to set the switches at an os_cpu level
91 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
92
93 // Make sure the ptr-is-null path appears to be uncommon!
94 float f = block->end()->as_MachIf()->_prob;
95 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
96 if( f > PROB_UNLIKELY_MAG(4) ) return;
97
98 uint bidx = 0; // Capture index of value into memop
99 bool was_store; // Memory op is a store op
100
101 // Get the successor block for if the test ptr is non-null
102 Block* not_null_block; // this one goes with the proj
103 Block* null_block;
104 if (block->get_node(block->number_of_nodes()-1) == proj) {
105 null_block = block->_succs[0];
106 not_null_block = block->_succs[1];
107 } else {
108 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
109 not_null_block = block->_succs[0];
110 null_block = block->_succs[1];
111 }
112 while (null_block->is_Empty() == Block::empty_with_goto) {
113 null_block = null_block->_succs[0];
114 }
115
116 // Search the exception block for an uncommon trap.
117 // (See Parse::do_if and Parse::do_ifnull for the reason
118 // we need an uncommon trap. Briefly, we need a way to
119 // detect failure of this optimization, as in 6366351.)
120 {
121 bool found_trap = false;
122 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
123 Node* nn = null_block->get_node(i1);
124 if (nn->is_MachCall() &&
125 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
126 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
127 if (trtype->isa_int() && trtype->is_int()->is_con()) {
128 jint tr_con = trtype->is_int()->get_con();
129 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
130 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
131 assert((int)reason < (int)BitsPerInt, "recode bit map");
132 if (is_set_nth_bit(allowed_reasons, (int) reason)
133 && action != Deoptimization::Action_none) {
134 // This uncommon trap is sure to recompile, eventually.
135 // When that happens, C->too_many_traps will prevent
136 // this transformation from happening again.
137 found_trap = true;
138 }
139 }
140 break;
141 }
142 }
143 if (!found_trap) {
144 // We did not find an uncommon trap.
145 return;
146 }
147 }
148
149 // Check for decodeHeapOop_not_null node which did not fold into address
150 bool is_decoden = ((intptr_t)val) & 1;
151 val = (Node*)(((intptr_t)val) & ~1);
152
153 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
154 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
155
156 // Search the successor block for a load or store who's base value is also
157 // the tested value. There may be several.
158 MachNode *best = NULL; // Best found so far
159 for (DUIterator i = val->outs(); val->has_out(i); i++) {
160 Node *m = val->out(i);
161 if( !m->is_Mach() ) continue;
162 MachNode *mach = m->as_Mach();
163 was_store = false;
164 int iop = mach->ideal_Opcode();
165 switch( iop ) {
166 case Op_LoadB:
167 case Op_LoadUB:
168 case Op_LoadUS:
169 case Op_LoadD:
170 case Op_LoadF:
171 case Op_LoadI:
172 case Op_LoadL:
173 case Op_LoadP:
174 case Op_LoadN:
175 case Op_LoadS:
176 case Op_LoadKlass:
177 case Op_LoadNKlass:
178 case Op_LoadRange:
179 case Op_LoadD_unaligned:
180 case Op_LoadL_unaligned:
181 assert(mach->in(2) == val, "should be address");
182 break;
183 case Op_StoreB:
184 case Op_StoreC:
185 case Op_StoreCM:
186 case Op_StoreD:
187 case Op_StoreF:
188 case Op_StoreI:
189 case Op_StoreL:
190 case Op_StoreP:
191 case Op_StoreN:
192 case Op_StoreNKlass:
193 was_store = true; // Memory op is a store op
194 // Stores will have their address in slot 2 (memory in slot 1).
195 // If the value being nul-checked is in another slot, it means we
196 // are storing the checked value, which does NOT check the value!
197 if( mach->in(2) != val ) continue;
198 break; // Found a memory op?
199 case Op_StrComp:
200 case Op_StrEquals:
201 case Op_StrIndexOf:
202 case Op_StrIndexOfChar:
203 case Op_AryEq:
204 case Op_StrInflatedCopy:
205 case Op_StrCompressedCopy:
206 case Op_EncodeISOArray:
207 case Op_CountPositives:
208 // Not a legit memory op for implicit null check regardless of
209 // embedded loads
210 continue;
211 default: // Also check for embedded loads
212 if( !mach->needs_anti_dependence_check() )
213 continue; // Not an memory op; skip it
214 if( must_clone[iop] ) {
215 // Do not move nodes which produce flags because
216 // RA will try to clone it to place near branch and
217 // it will cause recompilation, see clone_node().
218 continue;
219 }
220 {
221 // Check that value is used in memory address in
222 // instructions with embedded load (CmpP val1,(val2+off)).
223 Node* base;
224 Node* index;
225 const MachOper* oper = mach->memory_inputs(base, index);
226 if (oper == NULL || oper == (MachOper*)-1) {
227 continue; // Not an memory op; skip it
228 }
229 if (val == base ||
230 (val == index && val->bottom_type()->isa_narrowoop())) {
231 break; // Found it
232 } else {
233 continue; // Skip it
234 }
235 }
236 break;
237 }
238
239 // On some OSes (AIX) the page at address 0 is only write protected.
240 // If so, only Store operations will trap.
241 // But a read accessing the base of a heap-based compressed heap will trap.
242 if (!was_store && needs_explicit_null_check_for_read(val)) {
243 continue;
244 }
245
246 // Check that node's control edge is not-null block's head or dominates it,
247 // otherwise we can't hoist it because there are other control dependencies.
248 Node* ctrl = mach->in(0);
249 if (ctrl != NULL && !(ctrl == not_null_block->head() ||
250 get_block_for_node(ctrl)->dominates(not_null_block))) {
251 continue;
252 }
253
254 // check if the offset is not too high for implicit exception
255 {
256 intptr_t offset = 0;
257 const TypePtr *adr_type = NULL; // Do not need this return value here
258 const Node* base = mach->get_base_and_disp(offset, adr_type);
259 if (base == NULL || base == NodeSentinel) {
260 // Narrow oop address doesn't have base, only index.
261 // Give up if offset is beyond page size or if heap base is not protected.
262 if (val->bottom_type()->isa_narrowoop() &&
263 (MacroAssembler::needs_explicit_null_check(offset) ||
264 !CompressedOops::use_implicit_null_checks()))
265 continue;
266 // cannot reason about it; is probably not implicit null exception
267 } else {
268 const TypePtr* tptr;
269 if ((UseCompressedOops || UseCompressedClassPointers) &&
270 (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
271 // 32-bits narrow oop can be the base of address expressions
272 tptr = base->get_ptr_type();
273 } else {
274 // only regular oops are expected here
275 tptr = base->bottom_type()->is_ptr();
276 }
277 // Give up if offset is not a compile-time constant.
278 if (offset == Type::OffsetBot || tptr->offset() == Type::OffsetBot)
279 continue;
280 offset += tptr->offset(); // correct if base is offsetted
281 // Give up if reference is beyond page size.
282 if (MacroAssembler::needs_explicit_null_check(offset))
283 continue;
284 // Give up if base is a decode node and the heap base is not protected.
285 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
286 !CompressedOops::use_implicit_null_checks())
287 continue;
288 }
289 }
290
291 // Check ctrl input to see if the null-check dominates the memory op
292 Block *cb = get_block_for_node(mach);
293 cb = cb->_idom; // Always hoist at least 1 block
294 if( !was_store ) { // Stores can be hoisted only one block
295 while( cb->_dom_depth > (block->_dom_depth + 1))
296 cb = cb->_idom; // Hoist loads as far as we want
297 // The non-null-block should dominate the memory op, too. Live
298 // range spilling will insert a spill in the non-null-block if it is
299 // needs to spill the memory op for an implicit null check.
300 if (cb->_dom_depth == (block->_dom_depth + 1)) {
301 if (cb != not_null_block) continue;
302 cb = cb->_idom;
303 }
304 }
305 if( cb != block ) continue;
306
307 // Found a memory user; see if it can be hoisted to check-block
308 uint vidx = 0; // Capture index of value into memop
309 uint j;
310 for( j = mach->req()-1; j > 0; j-- ) {
311 if( mach->in(j) == val ) {
312 vidx = j;
313 // Ignore DecodeN val which could be hoisted to where needed.
314 if( is_decoden ) continue;
315 }
316 // Block of memory-op input
317 Block* inb = get_block_for_node(mach->in(j));
318 if (mach->in(j)->is_Con() && mach->in(j)->req() == 1 && inb == get_block_for_node(mach)) {
319 // Ignore constant loads scheduled in the same block (we can simply hoist them as well)
320 continue;
321 }
322 Block *b = block; // Start from nul check
323 while( b != inb && b->_dom_depth > inb->_dom_depth )
324 b = b->_idom; // search upwards for input
325 // See if input dominates null check
326 if( b != inb )
327 break;
328 }
329 if( j > 0 )
330 continue;
331 Block *mb = get_block_for_node(mach);
332 // Hoisting stores requires more checks for the anti-dependence case.
333 // Give up hoisting if we have to move the store past any load.
334 if (was_store) {
335 // Make sure control does not do a merge (would have to check allpaths)
336 if (mb->num_preds() != 2) {
337 continue;
338 }
339 // mach is a store, hence block is the immediate dominator of mb.
340 // Due to the null-check shape of block (where its successors cannot re-join),
341 // block must be the direct predecessor of mb.
342 assert(get_block_for_node(mb->pred(1)) == block, "Unexpected predecessor block");
343 uint k;
344 uint num_nodes = mb->number_of_nodes();
345 for (k = 1; k < num_nodes; k++) {
346 Node *n = mb->get_node(k);
347 if (n->needs_anti_dependence_check() &&
348 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory)) {
349 break; // Found anti-dependent load
350 }
351 }
352 if (k < num_nodes) {
353 continue; // Found anti-dependent load
354 }
355 }
356
357 // Make sure this memory op is not already being used for a NullCheck
358 Node *e = mb->end();
359 if( e->is_MachNullCheck() && e->in(1) == mach )
360 continue; // Already being used as a NULL check
361
362 // Found a candidate! Pick one with least dom depth - the highest
363 // in the dom tree should be closest to the null check.
364 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
365 best = mach;
366 bidx = vidx;
367 }
368 }
369 // No candidate!
370 if (best == NULL) {
371 return;
372 }
373
374 // ---- Found an implicit null check
375 #ifndef PRODUCT
376 extern int implicit_null_checks;
377 implicit_null_checks++;
378 #endif
379
380 if( is_decoden ) {
381 // Check if we need to hoist decodeHeapOop_not_null first.
382 Block *valb = get_block_for_node(val);
383 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
384 // Hoist it up to the end of the test block together with its inputs if they exist.
385 for (uint i = 2; i < val->req(); i++) {
386 // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
387 Node *temp = val->in(i);
388 Block *tempb = get_block_for_node(temp);
389 if (!tempb->dominates(block)) {
390 assert(block->dominates(tempb), "sanity check: temp node placement");
391 // We only expect nodes without further inputs, like MachTemp or load Base.
392 assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
393 "need for recursive hoisting not expected");
394 tempb->find_remove(temp);
395 block->add_inst(temp);
396 map_node_to_block(temp, block);
397 }
398 }
399 valb->find_remove(val);
400 block->add_inst(val);
401 map_node_to_block(val, block);
402 // DecodeN on x86 may kill flags. Check for flag-killing projections
403 // that also need to be hoisted.
404 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
405 Node* n = val->fast_out(j);
406 if( n->is_MachProj() ) {
407 get_block_for_node(n)->find_remove(n);
408 block->add_inst(n);
409 map_node_to_block(n, block);
410 }
411 }
412 }
413 }
414
415 // Hoist constant load inputs as well.
416 for (uint i = 1; i < best->req(); ++i) {
417 Node* n = best->in(i);
418 if (n->is_Con() && get_block_for_node(n) == get_block_for_node(best)) {
419 get_block_for_node(n)->find_remove(n);
420 block->add_inst(n);
421 map_node_to_block(n, block);
422 // Constant loads may kill flags (for example, when XORing a register).
423 // Check for flag-killing projections that also need to be hoisted.
424 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
425 Node* proj = n->fast_out(j);
426 if (proj->is_MachProj()) {
427 get_block_for_node(proj)->find_remove(proj);
428 block->add_inst(proj);
429 map_node_to_block(proj, block);
430 }
431 }
432 }
433 }
434
435 // Hoist the memory candidate up to the end of the test block.
436 Block *old_block = get_block_for_node(best);
437 old_block->find_remove(best);
438 block->add_inst(best);
439 map_node_to_block(best, block);
440
441 // Move the control dependence if it is pinned to not-null block.
442 // Don't change it in other cases: NULL or dominating control.
443 Node* ctrl = best->in(0);
444 if (ctrl != NULL && get_block_for_node(ctrl) == not_null_block) {
445 // Set it to control edge of null check.
446 best->set_req(0, proj->in(0)->in(0));
447 }
448
449 // Check for flag-killing projections that also need to be hoisted
450 // Should be DU safe because no edge updates.
451 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
452 Node* n = best->fast_out(j);
453 if( n->is_MachProj() ) {
454 get_block_for_node(n)->find_remove(n);
455 block->add_inst(n);
456 map_node_to_block(n, block);
457 }
458 }
459
460 // proj==Op_True --> ne test; proj==Op_False --> eq test.
461 // One of two graph shapes got matched:
462 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
463 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
464 // NULL checks are always branch-if-eq. If we see a IfTrue projection
465 // then we are replacing a 'ne' test with a 'eq' NULL check test.
466 // We need to flip the projections to keep the same semantics.
467 if( proj->Opcode() == Op_IfTrue ) {
468 // Swap order of projections in basic block to swap branch targets
469 Node *tmp1 = block->get_node(block->end_idx()+1);
470 Node *tmp2 = block->get_node(block->end_idx()+2);
471 block->map_node(tmp2, block->end_idx()+1);
472 block->map_node(tmp1, block->end_idx()+2);
473 Node *tmp = new Node(C->top()); // Use not NULL input
474 tmp1->replace_by(tmp);
475 tmp2->replace_by(tmp1);
476 tmp->replace_by(tmp2);
477 tmp->destruct(NULL);
478 }
479
480 // Remove the existing null check; use a new implicit null check instead.
481 // Since schedule-local needs precise def-use info, we need to correct
482 // it as well.
483 Node *old_tst = proj->in(0);
484 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
485 block->map_node(nul_chk, block->end_idx());
486 map_node_to_block(nul_chk, block);
487 // Redirect users of old_test to nul_chk
488 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
489 old_tst->last_out(i2)->set_req(0, nul_chk);
490 // Clean-up any dead code
491 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
492 Node* in = old_tst->in(i3);
493 old_tst->set_req(i3, NULL);
494 if (in->outcnt() == 0) {
495 // Remove dead input node
496 in->disconnect_inputs(C);
497 block->find_remove(in);
498 }
499 }
500
501 latency_from_uses(nul_chk);
502 latency_from_uses(best);
503
504 // insert anti-dependences to defs in this block
505 if (! best->needs_anti_dependence_check()) {
506 for (uint k = 1; k < block->number_of_nodes(); k++) {
507 Node *n = block->get_node(k);
508 if (n->needs_anti_dependence_check() &&
509 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
510 // Found anti-dependent load
511 insert_anti_dependences(block, n);
512 }
513 }
514 }
515 }
516
517
518 //------------------------------select-----------------------------------------
519 // Select a nice fellow from the worklist to schedule next. If there is only one
520 // choice, then use it. CreateEx nodes that are initially ready must start their
521 // blocks and are given the highest priority, by being placed at the beginning
522 // of the worklist. Next after initially-ready CreateEx nodes are projections,
523 // which must follow their parents, and CreateEx nodes with local input
524 // dependencies. Next are constants and CheckCastPP nodes. There are a number of
525 // other special cases, for instructions that consume condition codes, et al.
526 // These are chosen immediately. Some instructions are required to immediately
527 // precede the last instruction in the block, and these are taken last. Of the
528 // remaining cases (most), choose the instruction with the greatest latency
529 // (that is, the most number of pseudo-cycles required to the end of the
530 // routine). If there is a tie, choose the instruction with the most inputs.
531 Node* PhaseCFG::select(
532 Block* block,
533 Node_List &worklist,
534 GrowableArray<int> &ready_cnt,
535 VectorSet &next_call,
536 uint sched_slot,
537 intptr_t* recalc_pressure_nodes) {
538
539 // If only a single entry on the stack, use it
540 uint cnt = worklist.size();
541 if (cnt == 1) {
542 Node *n = worklist[0];
543 worklist.map(0,worklist.pop());
544 return n;
545 }
546
547 uint choice = 0; // Bigger is most important
548 uint latency = 0; // Bigger is scheduled first
549 uint score = 0; // Bigger is better
550 int idx = -1; // Index in worklist
551 int cand_cnt = 0; // Candidate count
552 bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10);
553
554 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
555 // Order in worklist is used to break ties.
556 // See caller for how this is used to delay scheduling
557 // of induction variable increments to after the other
558 // uses of the phi are scheduled.
559 Node *n = worklist[i]; // Get Node on worklist
560
561 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
562 if (iop == Op_CreateEx || n->is_Proj()) {
563 // CreateEx nodes that are initially ready must start the block (after Phi
564 // and Parm nodes which are pre-scheduled) and get top priority. This is
565 // currently enforced by placing them at the beginning of the initial
566 // worklist and selecting them eagerly here. After these, projections and
567 // other CreateEx nodes are selected with equal priority.
568 worklist.map(i,worklist.pop());
569 return n;
570 }
571
572 if (n->Opcode() == Op_Con || iop == Op_CheckCastPP) {
573 // Constants and CheckCastPP nodes have higher priority than the rest of
574 // the nodes tested below. Record as current winner, but keep looking for
575 // higher-priority nodes in the worklist.
576 choice = 4;
577 // Latency and score are only used to break ties among low-priority nodes.
578 latency = 0;
579 score = 0;
580 idx = i;
581 continue;
582 }
583
584 // Final call in a block must be adjacent to 'catch'
585 Node *e = block->end();
586 if( e->is_Catch() && e->in(0)->in(0) == n )
587 continue;
588
589 // Memory op for an implicit null check has to be at the end of the block
590 if( e->is_MachNullCheck() && e->in(1) == n )
591 continue;
592
593 // Schedule IV increment last.
594 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
595 // Cmp might be matched into CountedLoopEnd node.
596 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
597 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
598 continue;
599 }
600 }
601
602 uint n_choice = 2;
603
604 // See if this instruction is consumed by a branch. If so, then (as the
605 // branch is the last instruction in the basic block) force it to the
606 // end of the basic block
607 if ( must_clone[iop] ) {
608 // See if any use is a branch
609 bool found_machif = false;
610
611 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
612 Node* use = n->fast_out(j);
613
614 // The use is a conditional branch, make them adjacent
615 if (use->is_MachIf() && get_block_for_node(use) == block) {
616 found_machif = true;
617 break;
618 }
619
620 // More than this instruction pending for successor to be ready,
621 // don't choose this if other opportunities are ready
622 if (ready_cnt.at(use->_idx) > 1)
623 n_choice = 1;
624 }
625
626 // loop terminated, prefer not to use this instruction
627 if (found_machif)
628 continue;
629 }
630
631 // See if this has a predecessor that is "must_clone", i.e. sets the
632 // condition code. If so, choose this first
633 for (uint j = 0; j < n->req() ; j++) {
634 Node *inn = n->in(j);
635 if (inn) {
636 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
637 n_choice = 3;
638 break;
639 }
640 }
641 }
642
643 // MachTemps should be scheduled last so they are near their uses
644 if (n->is_MachTemp()) {
645 n_choice = 1;
646 }
647
648 uint n_latency = get_latency_for_node(n);
649 uint n_score = n->req(); // Many inputs get high score to break ties
650
651 if (OptoRegScheduling && block_size_threshold_ok) {
652 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
653 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
654 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
655 // simulate the notion that we just picked this node to schedule
656 n->add_flag(Node::Flag_is_scheduled);
657 // now calculate its effect upon the graph if we did
658 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
659 // return its state for finalize in case somebody else wins
660 n->remove_flag(Node::Flag_is_scheduled);
661 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
662 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
663 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
664 recalc_pressure_nodes[n->_idx] = int_pressure;
665 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
666 }
667
668 if (_scheduling_for_pressure) {
669 latency = n_latency;
670 if (n_choice != 3) {
671 // Now evaluate each register pressure component based on threshold in the score.
672 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
673 // on a single instruction, but we might see it shrink on both banks.
674 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
675 // live ranges that terminate on this instruction.
676 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
677 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
678 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
679 }
680 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
681 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
682 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
683 }
684 } else {
685 // make sure we choose these candidates
686 score = 0;
687 }
688 }
689 }
690
691 // Keep best latency found
692 cand_cnt++;
693 if (choice < n_choice ||
694 (choice == n_choice &&
695 ((StressLCM && C->randomized_select(cand_cnt)) ||
696 (!StressLCM &&
697 (latency < n_latency ||
698 (latency == n_latency &&
699 (score < n_score))))))) {
700 choice = n_choice;
701 latency = n_latency;
702 score = n_score;
703 idx = i; // Also keep index in worklist
704 }
705 } // End of for all ready nodes in worklist
706
707 guarantee(idx >= 0, "index should be set");
708 Node *n = worklist[(uint)idx]; // Get the winner
709
710 worklist.map((uint)idx, worklist.pop()); // Compress worklist
711 return n;
712 }
713
714 //-------------------------adjust_register_pressure----------------------------
715 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
716 PhaseLive* liveinfo = _regalloc->get_live();
717 IndexSet* liveout = liveinfo->live(block);
718 // first adjust the register pressure for the sources
719 for (uint i = 1; i < n->req(); i++) {
720 bool lrg_ends = false;
721 Node *src_n = n->in(i);
722 if (src_n == NULL) continue;
723 if (!src_n->is_Mach()) continue;
724 uint src = _regalloc->_lrg_map.find(src_n);
725 if (src == 0) continue;
726 LRG& lrg_src = _regalloc->lrgs(src);
727 // detect if the live range ends or not
728 if (liveout->member(src) == false) {
729 lrg_ends = true;
730 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
731 Node* m = src_n->fast_out(j); // Get user
732 if (m == n) continue;
733 if (!m->is_Mach()) continue;
734 MachNode *mach = m->as_Mach();
735 bool src_matches = false;
736 int iop = mach->ideal_Opcode();
737
738 switch (iop) {
739 case Op_StoreB:
740 case Op_StoreC:
741 case Op_StoreCM:
742 case Op_StoreD:
743 case Op_StoreF:
744 case Op_StoreI:
745 case Op_StoreL:
746 case Op_StoreP:
747 case Op_StoreN:
748 case Op_StoreVector:
749 case Op_StoreVectorMasked:
750 case Op_StoreVectorScatter:
751 case Op_StoreVectorScatterMasked:
752 case Op_StoreNKlass:
753 for (uint k = 1; k < m->req(); k++) {
754 Node *in = m->in(k);
755 if (in == src_n) {
756 src_matches = true;
757 break;
758 }
759 }
760 break;
761
762 default:
763 src_matches = true;
764 break;
765 }
766
767 // If we have a store as our use, ignore the non source operands
768 if (src_matches == false) continue;
769
770 // Mark every unscheduled use which is not n with a recalculation
771 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
772 if (finalize_mode && !m->is_Phi()) {
773 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
774 }
775 lrg_ends = false;
776 }
777 }
778 }
779 // if none, this live range ends and we can adjust register pressure
780 if (lrg_ends) {
781 if (finalize_mode) {
782 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
783 } else {
784 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
785 }
786 }
787 }
788
789 // now add the register pressure from the dest and evaluate which heuristic we should use:
790 // 1.) The default, latency scheduling
791 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
792 uint dst = _regalloc->_lrg_map.find(n);
793 if (dst != 0) {
794 LRG& lrg_dst = _regalloc->lrgs(dst);
795 if (finalize_mode) {
796 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
797 // check to see if we fall over the register pressure cliff here
798 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
799 _scheduling_for_pressure = true;
800 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
801 _scheduling_for_pressure = true;
802 } else {
803 // restore latency scheduling mode
804 _scheduling_for_pressure = false;
805 }
806 } else {
807 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
808 }
809 }
810 }
811
812 //------------------------------set_next_call----------------------------------
813 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
814 if( next_call.test_set(n->_idx) ) return;
815 for( uint i=0; i<n->len(); i++ ) {
816 Node *m = n->in(i);
817 if( !m ) continue; // must see all nodes in block that precede call
818 if (get_block_for_node(m) == block) {
819 set_next_call(block, m, next_call);
820 }
821 }
822 }
823
824 //------------------------------needed_for_next_call---------------------------
825 // Set the flag 'next_call' for each Node that is needed for the next call to
826 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
827 // next subroutine call get priority - basically it moves things NOT needed
828 // for the next call till after the call. This prevents me from trying to
829 // carry lots of stuff live across a call.
830 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
831 // Find the next control-defining Node in this block
832 Node* call = NULL;
833 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
834 Node* m = this_call->fast_out(i);
835 if (get_block_for_node(m) == block && // Local-block user
836 m != this_call && // Not self-start node
837 m->is_MachCall()) {
838 call = m;
839 break;
840 }
841 }
842 if (call == NULL) return; // No next call (e.g., block end is near)
843 // Set next-call for all inputs to this call
844 set_next_call(block, call, next_call);
845 }
846
847 //------------------------------add_call_kills-------------------------------------
848 // helper function that adds caller save registers to MachProjNode
849 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
850 // Fill in the kill mask for the call
851 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
852 if( !regs.Member(r) ) { // Not already defined by the call
853 // Save-on-call register?
854 if ((save_policy[r] == 'C') ||
855 (save_policy[r] == 'A') ||
856 ((save_policy[r] == 'E') && exclude_soe)) {
857 proj->_rout.Insert(r);
858 }
859 }
860 }
861 }
862
863
864 //------------------------------sched_call-------------------------------------
865 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
866 RegMask regs;
867
868 // Schedule all the users of the call right now. All the users are
869 // projection Nodes, so they must be scheduled next to the call.
870 // Collect all the defined registers.
871 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
872 Node* n = mcall->fast_out(i);
873 assert( n->is_MachProj(), "" );
874 int n_cnt = ready_cnt.at(n->_idx)-1;
875 ready_cnt.at_put(n->_idx, n_cnt);
876 assert( n_cnt == 0, "" );
877 // Schedule next to call
878 block->map_node(n, node_cnt++);
879 // Collect defined registers
880 regs.OR(n->out_RegMask());
881 // Check for scheduling the next control-definer
882 if( n->bottom_type() == Type::CONTROL )
883 // Warm up next pile of heuristic bits
884 needed_for_next_call(block, n, next_call);
885
886 // Children of projections are now all ready
887 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
888 Node* m = n->fast_out(j); // Get user
889 if(get_block_for_node(m) != block) {
890 continue;
891 }
892 if( m->is_Phi() ) continue;
893 int m_cnt = ready_cnt.at(m->_idx) - 1;
894 ready_cnt.at_put(m->_idx, m_cnt);
895 if( m_cnt == 0 )
896 worklist.push(m);
897 }
898
899 }
900
901 // Act as if the call defines the Frame Pointer.
902 // Certainly the FP is alive and well after the call.
903 regs.Insert(_matcher.c_frame_pointer());
904
905 // Set all registers killed and not already defined by the call.
906 uint r_cnt = mcall->tf()->range_cc()->cnt();
907 int op = mcall->ideal_Opcode();
908 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
909 map_node_to_block(proj, block);
910 block->insert_node(proj, node_cnt++);
911
912 // Select the right register save policy.
913 const char *save_policy = NULL;
914 switch (op) {
915 case Op_CallRuntime:
916 case Op_CallLeaf:
917 case Op_CallLeafNoFP:
918 case Op_CallLeafVector:
919 // Calling C code so use C calling convention
920 save_policy = _matcher._c_reg_save_policy;
921 break;
922
923 case Op_CallStaticJava:
924 case Op_CallDynamicJava:
925 // Calling Java code so use Java calling convention
926 save_policy = _matcher._register_save_policy;
927 break;
928
929 default:
930 ShouldNotReachHere();
931 }
932
933 // When using CallRuntime mark SOE registers as killed by the call
934 // so values that could show up in the RegisterMap aren't live in a
935 // callee saved register since the register wouldn't know where to
936 // find them. CallLeaf and CallLeafNoFP are ok because they can't
937 // have debug info on them. Strictly speaking this only needs to be
938 // done for oops since idealreg2debugmask takes care of debug info
939 // references but there no way to handle oops differently than other
940 // pointers as far as the kill mask goes.
941 bool exclude_soe = op == Op_CallRuntime;
942
943 // If the call is a MethodHandle invoke, we need to exclude the
944 // register which is used to save the SP value over MH invokes from
945 // the mask. Otherwise this register could be used for
946 // deoptimization information.
947 if (op == Op_CallStaticJava) {
948 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
949 if (mcallstaticjava->_method_handle_invoke)
950 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
951 }
952
953 add_call_kills(proj, regs, save_policy, exclude_soe);
954
955 return node_cnt;
956 }
957
958
959 //------------------------------schedule_local---------------------------------
960 // Topological sort within a block. Someday become a real scheduler.
961 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
962 // Already "sorted" are the block start Node (as the first entry), and
963 // the block-ending Node and any trailing control projections. We leave
964 // these alone. PhiNodes and ParmNodes are made to follow the block start
965 // Node. Everything else gets topo-sorted.
966
967 #ifndef PRODUCT
968 if (trace_opto_pipelining()) {
969 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
970 for (uint i = 0;i < block->number_of_nodes(); i++) {
971 tty->print("# ");
972 block->get_node(i)->dump();
973 }
974 tty->print_cr("#");
975 }
976 #endif
977
978 // RootNode is already sorted
979 if (block->number_of_nodes() == 1) {
980 return true;
981 }
982
983 bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10);
984
985 // We track the uses of local definitions as input dependences so that
986 // we know when a given instruction is available to be scheduled.
987 uint i;
988 if (OptoRegScheduling && block_size_threshold_ok) {
989 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
990 Node *n = block->get_node(i);
991 n->remove_flag(Node::Flag_is_scheduled);
992 if (!n->is_Phi()) {
993 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
994 }
995 }
996 }
997
998 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
999 uint node_cnt = block->end_idx();
1000 uint phi_cnt = 1;
1001 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
1002 Node *n = block->get_node(i);
1003 if( n->is_Phi() || // Found a PhiNode or ParmNode
1004 (n->is_Proj() && n->in(0) == block->head()) ) {
1005 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
1006 block->map_node(block->get_node(phi_cnt), i);
1007 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
1008 if (OptoRegScheduling && block_size_threshold_ok) {
1009 // mark n as scheduled
1010 n->add_flag(Node::Flag_is_scheduled);
1011 }
1012 } else { // All others
1013 // Count block-local inputs to 'n'
1014 uint cnt = n->len(); // Input count
1015 uint local = 0;
1016 for( uint j=0; j<cnt; j++ ) {
1017 Node *m = n->in(j);
1018 if( m && get_block_for_node(m) == block && !m->is_top() )
1019 local++; // One more block-local input
1020 }
1021 ready_cnt.at_put(n->_idx, local); // Count em up
1022
1023 #ifdef ASSERT
1024 if (UseG1GC) {
1025 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
1026 // Check the precedence edges
1027 for (uint prec = n->req(); prec < n->len(); prec++) {
1028 Node* oop_store = n->in(prec);
1029 if (oop_store != NULL) {
1030 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1031 }
1032 }
1033 }
1034 }
1035 #endif
1036
1037 // A few node types require changing a required edge to a precedence edge
1038 // before allocation.
1039 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1040 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1041 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1042 // MemBarAcquire could be created without Precedent edge.
1043 // del_req() replaces the specified edge with the last input edge
1044 // and then removes the last edge. If the specified edge > number of
1045 // edges the last edge will be moved outside of the input edges array
1046 // and the edge will be lost. This is why this code should be
1047 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1048 Node *x = n->in(TypeFunc::Parms);
1049 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1050 // Old edge to node within same block will get removed, but no precedence
1051 // edge will get added because it already exists. Update ready count.
1052 int cnt = ready_cnt.at(n->_idx);
1053 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1054 ready_cnt.at_put(n->_idx, cnt-1);
1055 }
1056 n->del_req(TypeFunc::Parms);
1057 n->add_prec(x);
1058 }
1059 }
1060 }
1061 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1062 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1063
1064 // All the prescheduled guys do not hold back internal nodes
1065 uint i3;
1066 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1067 Node *n = block->get_node(i3); // Get pre-scheduled
1068 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1069 Node* m = n->fast_out(j);
1070 if (get_block_for_node(m) == block) { // Local-block user
1071 int m_cnt = ready_cnt.at(m->_idx)-1;
1072 if (OptoRegScheduling && block_size_threshold_ok) {
1073 // mark m as scheduled
1074 if (m_cnt < 0) {
1075 m->add_flag(Node::Flag_is_scheduled);
1076 }
1077 }
1078 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1079 }
1080 }
1081 }
1082
1083 Node_List delay;
1084 // Make a worklist
1085 Node_List worklist;
1086 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1087 Node *m = block->get_node(i4);
1088 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1089 if (m->is_iteratively_computed()) {
1090 // Push induction variable increments last to allow other uses
1091 // of the phi to be scheduled first. The select() method breaks
1092 // ties in scheduling by worklist order.
1093 delay.push(m);
1094 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1095 // Place CreateEx nodes that are initially ready at the beginning of the
1096 // worklist so they are selected first and scheduled at the block start.
1097 worklist.insert(0, m);
1098 } else {
1099 worklist.push(m); // Then on to worklist!
1100 }
1101 }
1102 }
1103 while (delay.size()) {
1104 Node* d = delay.pop();
1105 worklist.push(d);
1106 }
1107
1108 if (OptoRegScheduling && block_size_threshold_ok) {
1109 // To stage register pressure calculations we need to examine the live set variables
1110 // breaking them up by register class to compartmentalize the calculations.
1111 _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1112 _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1113 _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1114 _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1115
1116 _regalloc->compute_entry_block_pressure(block);
1117 }
1118
1119 // Warm up the 'next_call' heuristic bits
1120 needed_for_next_call(block, block->head(), next_call);
1121
1122 #ifndef PRODUCT
1123 if (trace_opto_pipelining()) {
1124 for (uint j=0; j< block->number_of_nodes(); j++) {
1125 Node *n = block->get_node(j);
1126 int idx = n->_idx;
1127 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1128 tty->print("latency:%3d ", get_latency_for_node(n));
1129 tty->print("%4d: %s\n", idx, n->Name());
1130 }
1131 }
1132 #endif
1133
1134 uint max_idx = (uint)ready_cnt.length();
1135 // Pull from worklist and schedule
1136 while( worklist.size() ) { // Worklist is not ready
1137
1138 #ifndef PRODUCT
1139 if (trace_opto_pipelining()) {
1140 tty->print("# ready list:");
1141 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1142 Node *n = worklist[i]; // Get Node on worklist
1143 tty->print(" %d", n->_idx);
1144 }
1145 tty->cr();
1146 }
1147 #endif
1148
1149 // Select and pop a ready guy from worklist
1150 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1151 block->map_node(n, phi_cnt++); // Schedule him next
1152
1153 if (OptoRegScheduling && block_size_threshold_ok) {
1154 n->add_flag(Node::Flag_is_scheduled);
1155
1156 // Now adjust the resister pressure with the node we selected
1157 if (!n->is_Phi()) {
1158 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1159 }
1160 }
1161
1162 #ifndef PRODUCT
1163 if (trace_opto_pipelining()) {
1164 tty->print("# select %d: %s", n->_idx, n->Name());
1165 tty->print(", latency:%d", get_latency_for_node(n));
1166 n->dump();
1167 if (Verbose) {
1168 tty->print("# ready list:");
1169 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1170 Node *n = worklist[i]; // Get Node on worklist
1171 tty->print(" %d", n->_idx);
1172 }
1173 tty->cr();
1174 }
1175 }
1176
1177 #endif
1178 if( n->is_MachCall() ) {
1179 MachCallNode *mcall = n->as_MachCall();
1180 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1181 continue;
1182 }
1183
1184 if (n->is_Mach() && n->as_Mach()->has_call()) {
1185 RegMask regs;
1186 regs.Insert(_matcher.c_frame_pointer());
1187 regs.OR(n->out_RegMask());
1188
1189 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1190 map_node_to_block(proj, block);
1191 block->insert_node(proj, phi_cnt++);
1192
1193 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1194 }
1195
1196 // Children are now all ready
1197 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1198 Node* m = n->fast_out(i5); // Get user
1199 if (get_block_for_node(m) != block) {
1200 continue;
1201 }
1202 if( m->is_Phi() ) continue;
1203 if (m->_idx >= max_idx) { // new node, skip it
1204 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1205 continue;
1206 }
1207 int m_cnt = ready_cnt.at(m->_idx) - 1;
1208 ready_cnt.at_put(m->_idx, m_cnt);
1209 if( m_cnt == 0 )
1210 worklist.push(m);
1211 }
1212 }
1213
1214 if( phi_cnt != block->end_idx() ) {
1215 // did not schedule all. Retry, Bailout, or Die
1216 if (C->subsume_loads() == true && !C->failing()) {
1217 // Retry with subsume_loads == false
1218 // If this is the first failure, the sentinel string will "stick"
1219 // to the Compile object, and the C2Compiler will see it and retry.
1220 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1221 } else {
1222 assert(false, "graph should be schedulable");
1223 }
1224 // assert( phi_cnt == end_idx(), "did not schedule all" );
1225 return false;
1226 }
1227
1228 if (OptoRegScheduling && block_size_threshold_ok) {
1229 _regalloc->compute_exit_block_pressure(block);
1230 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1231 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1232 }
1233
1234 #ifndef PRODUCT
1235 if (trace_opto_pipelining()) {
1236 tty->print_cr("#");
1237 tty->print_cr("# after schedule_local");
1238 for (uint i = 0;i < block->number_of_nodes();i++) {
1239 tty->print("# ");
1240 block->get_node(i)->dump();
1241 }
1242 tty->print_cr("# ");
1243
1244 if (OptoRegScheduling && block_size_threshold_ok) {
1245 tty->print_cr("# pressure info : %d", block->_pre_order);
1246 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1247 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1248 }
1249 tty->cr();
1250 }
1251 #endif
1252
1253 return true;
1254 }
1255
1256 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1257 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1258 for (uint l = 0; l < use->len(); l++) {
1259 if (use->in(l) == old_def) {
1260 if (l < use->req()) {
1261 use->set_req(l, new_def);
1262 } else {
1263 use->rm_prec(l);
1264 use->add_prec(new_def);
1265 l--;
1266 }
1267 }
1268 }
1269 }
1270
1271 //------------------------------catch_cleanup_find_cloned_def------------------
1272 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1273 assert( use_blk != def_blk, "Inter-block cleanup only");
1274
1275 // The use is some block below the Catch. Find and return the clone of the def
1276 // that dominates the use. If there is no clone in a dominating block, then
1277 // create a phi for the def in a dominating block.
1278
1279 // Find which successor block dominates this use. The successor
1280 // blocks must all be single-entry (from the Catch only; I will have
1281 // split blocks to make this so), hence they all dominate.
1282 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1283 use_blk = use_blk->_idom;
1284
1285 // Find the successor
1286 Node *fixup = NULL;
1287
1288 uint j;
1289 for( j = 0; j < def_blk->_num_succs; j++ )
1290 if( use_blk == def_blk->_succs[j] )
1291 break;
1292
1293 if( j == def_blk->_num_succs ) {
1294 // Block at same level in dom-tree is not a successor. It needs a
1295 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1296 Node_Array inputs = new Node_List();
1297 for(uint k = 1; k < use_blk->num_preds(); k++) {
1298 Block* block = get_block_for_node(use_blk->pred(k));
1299 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1300 }
1301
1302 // Check to see if the use_blk already has an identical phi inserted.
1303 // If it exists, it will be at the first position since all uses of a
1304 // def are processed together.
1305 Node *phi = use_blk->get_node(1);
1306 if( phi->is_Phi() ) {
1307 fixup = phi;
1308 for (uint k = 1; k < use_blk->num_preds(); k++) {
1309 if (phi->in(k) != inputs[k]) {
1310 // Not a match
1311 fixup = NULL;
1312 break;
1313 }
1314 }
1315 }
1316
1317 // If an existing PhiNode was not found, make a new one.
1318 if (fixup == NULL) {
1319 Node *new_phi = PhiNode::make(use_blk->head(), def);
1320 use_blk->insert_node(new_phi, 1);
1321 map_node_to_block(new_phi, use_blk);
1322 for (uint k = 1; k < use_blk->num_preds(); k++) {
1323 new_phi->set_req(k, inputs[k]);
1324 }
1325 fixup = new_phi;
1326 }
1327
1328 } else {
1329 // Found the use just below the Catch. Make it use the clone.
1330 fixup = use_blk->get_node(n_clone_idx);
1331 }
1332
1333 return fixup;
1334 }
1335
1336 //--------------------------catch_cleanup_intra_block--------------------------
1337 // Fix all input edges in use that reference "def". The use is in the same
1338 // block as the def and both have been cloned in each successor block.
1339 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1340
1341 // Both the use and def have been cloned. For each successor block,
1342 // get the clone of the use, and make its input the clone of the def
1343 // found in that block.
1344
1345 uint use_idx = blk->find_node(use);
1346 uint offset_idx = use_idx - beg;
1347 for( uint k = 0; k < blk->_num_succs; k++ ) {
1348 // Get clone in each successor block
1349 Block *sb = blk->_succs[k];
1350 Node *clone = sb->get_node(offset_idx+1);
1351 assert( clone->Opcode() == use->Opcode(), "" );
1352
1353 // Make use-clone reference the def-clone
1354 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1355 }
1356 }
1357
1358 //------------------------------catch_cleanup_inter_block---------------------
1359 // Fix all input edges in use that reference "def". The use is in a different
1360 // block than the def.
1361 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1362 if( !use_blk ) return; // Can happen if the use is a precedence edge
1363
1364 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1365 catch_cleanup_fix_all_inputs(use, def, new_def);
1366 }
1367
1368 //------------------------------call_catch_cleanup-----------------------------
1369 // If we inserted any instructions between a Call and his CatchNode,
1370 // clone the instructions on all paths below the Catch.
1371 void PhaseCFG::call_catch_cleanup(Block* block) {
1372
1373 // End of region to clone
1374 uint end = block->end_idx();
1375 if( !block->get_node(end)->is_Catch() ) return;
1376 // Start of region to clone
1377 uint beg = end;
1378 while(!block->get_node(beg-1)->is_MachProj() ||
1379 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1380 beg--;
1381 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1382 }
1383 // Range of inserted instructions is [beg, end)
1384 if( beg == end ) return;
1385
1386 // Clone along all Catch output paths. Clone area between the 'beg' and
1387 // 'end' indices.
1388 for( uint i = 0; i < block->_num_succs; i++ ) {
1389 Block *sb = block->_succs[i];
1390 // Clone the entire area; ignoring the edge fixup for now.
1391 for( uint j = end; j > beg; j-- ) {
1392 Node *clone = block->get_node(j-1)->clone();
1393 sb->insert_node(clone, 1);
1394 map_node_to_block(clone, sb);
1395 if (clone->needs_anti_dependence_check()) {
1396 insert_anti_dependences(sb, clone);
1397 }
1398 }
1399 }
1400
1401
1402 // Fixup edges. Check the def-use info per cloned Node
1403 for(uint i2 = beg; i2 < end; i2++ ) {
1404 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1405 Node *n = block->get_node(i2); // Node that got cloned
1406 // Need DU safe iterator because of edge manipulation in calls.
1407 Unique_Node_List* out = new Unique_Node_List();
1408 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1409 out->push(n->fast_out(j1));
1410 }
1411 uint max = out->size();
1412 for (uint j = 0; j < max; j++) {// For all users
1413 Node *use = out->pop();
1414 Block *buse = get_block_for_node(use);
1415 if( use->is_Phi() ) {
1416 for( uint k = 1; k < use->req(); k++ )
1417 if( use->in(k) == n ) {
1418 Block* b = get_block_for_node(buse->pred(k));
1419 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1420 use->set_req(k, fixup);
1421 }
1422 } else {
1423 if (block == buse) {
1424 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1425 } else {
1426 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1427 }
1428 }
1429 } // End for all users
1430
1431 } // End of for all Nodes in cloned area
1432
1433 // Remove the now-dead cloned ops
1434 for(uint i3 = beg; i3 < end; i3++ ) {
1435 block->get_node(beg)->disconnect_inputs(C);
1436 block->remove_node(beg);
1437 }
1438
1439 // If the successor blocks have a CreateEx node, move it back to the top
1440 for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1441 Block *sb = block->_succs[i4];
1442 uint new_cnt = end - beg;
1443 // Remove any newly created, but dead, nodes by traversing their schedule
1444 // backwards. Here, a dead node is a node whose only outputs (if any) are
1445 // unused projections.
1446 for (uint j = new_cnt; j > 0; j--) {
1447 Node *n = sb->get_node(j);
1448 // Individual projections are examined together with all siblings when
1449 // their parent is visited.
1450 if (n->is_Proj()) {
1451 continue;
1452 }
1453 bool dead = true;
1454 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1455 Node* out = n->fast_out(i);
1456 // n is live if it has a non-projection output or a used projection.
1457 if (!out->is_Proj() || out->outcnt() > 0) {
1458 dead = false;
1459 break;
1460 }
1461 }
1462 if (dead) {
1463 // n's only outputs (if any) are unused projections scheduled next to n
1464 // (see PhaseCFG::select()). Remove these projections backwards.
1465 for (uint k = j + n->outcnt(); k > j; k--) {
1466 Node* proj = sb->get_node(k);
1467 assert(proj->is_Proj() && proj->in(0) == n,
1468 "projection should correspond to dead node");
1469 proj->disconnect_inputs(C);
1470 sb->remove_node(k);
1471 new_cnt--;
1472 }
1473 // Now remove the node itself.
1474 n->disconnect_inputs(C);
1475 sb->remove_node(j);
1476 new_cnt--;
1477 }
1478 }
1479 // If any newly created nodes remain, move the CreateEx node to the top
1480 if (new_cnt > 0) {
1481 Node *cex = sb->get_node(1+new_cnt);
1482 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1483 sb->remove_node(1+new_cnt);
1484 sb->insert_node(cex, 1);
1485 }
1486 }
1487 }
1488 }