1 /*
2 * Copyright (c) 1998, 2021, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/shared/gc_globals.hpp"
28 #include "memory/allocation.inline.hpp"
29 #include "oops/compressedOops.hpp"
30 #include "opto/ad.hpp"
31 #include "opto/block.hpp"
32 #include "opto/c2compiler.hpp"
33 #include "opto/callnode.hpp"
34 #include "opto/cfgnode.hpp"
35 #include "opto/machnode.hpp"
36 #include "opto/runtime.hpp"
37 #include "opto/chaitin.hpp"
38 #include "runtime/sharedRuntime.hpp"
39
40 // Optimization - Graph Style
41
42 // Check whether val is not-null-decoded compressed oop,
43 // i.e. will grab into the base of the heap if it represents NULL.
44 static bool accesses_heap_base_zone(Node *val) {
45 if (CompressedOops::base() != NULL) { // Implies UseCompressedOops.
46 if (val && val->is_Mach()) {
47 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
48 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
49 // decode NULL to point to the heap base (Decode_NN).
50 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
51 return true;
52 }
53 }
54 // Must recognize load operation with Decode matched in memory operand.
55 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
56 // returns true everywhere else. On PPC, no such memory operands
57 // exist, therefore we did not yet implement a check for such operands.
58 NOT_AIX(Unimplemented());
59 }
60 }
61 return false;
62 }
63
64 static bool needs_explicit_null_check_for_read(Node *val) {
65 // On some OSes (AIX) the page at address 0 is only write protected.
66 // If so, only Store operations will trap.
67 if (os::zero_page_read_protected()) {
68 return false; // Implicit null check will work.
69 }
70 // Also a read accessing the base of a heap-based compressed heap will trap.
71 if (accesses_heap_base_zone(val) && // Hits the base zone page.
72 CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
73 return false;
74 }
75
76 return true;
77 }
78
79 //------------------------------implicit_null_check----------------------------
80 // Detect implicit-null-check opportunities. Basically, find NULL checks
81 // with suitable memory ops nearby. Use the memory op to do the NULL check.
82 // I can generate a memory op if there is not one nearby.
83 // The proj is the control projection for the not-null case.
84 // The val is the pointer being checked for nullness or
85 // decodeHeapOop_not_null node if it did not fold into address.
86 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
87 // Assume if null check need for 0 offset then always needed
88 // Intel solaris doesn't support any null checks yet and no
89 // mechanism exists (yet) to set the switches at an os_cpu level
90 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
91
92 // Make sure the ptr-is-null path appears to be uncommon!
93 float f = block->end()->as_MachIf()->_prob;
94 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
95 if( f > PROB_UNLIKELY_MAG(4) ) return;
96
97 uint bidx = 0; // Capture index of value into memop
98 bool was_store; // Memory op is a store op
99
100 // Get the successor block for if the test ptr is non-null
101 Block* not_null_block; // this one goes with the proj
102 Block* null_block;
103 if (block->get_node(block->number_of_nodes()-1) == proj) {
104 null_block = block->_succs[0];
105 not_null_block = block->_succs[1];
106 } else {
107 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
108 not_null_block = block->_succs[0];
109 null_block = block->_succs[1];
110 }
111 while (null_block->is_Empty() == Block::empty_with_goto) {
112 null_block = null_block->_succs[0];
113 }
114
115 // Search the exception block for an uncommon trap.
116 // (See Parse::do_if and Parse::do_ifnull for the reason
117 // we need an uncommon trap. Briefly, we need a way to
118 // detect failure of this optimization, as in 6366351.)
119 {
120 bool found_trap = false;
121 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
122 Node* nn = null_block->get_node(i1);
123 if (nn->is_MachCall() &&
124 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
125 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
126 if (trtype->isa_int() && trtype->is_int()->is_con()) {
127 jint tr_con = trtype->is_int()->get_con();
128 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
129 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
130 assert((int)reason < (int)BitsPerInt, "recode bit map");
131 if (is_set_nth_bit(allowed_reasons, (int) reason)
132 && action != Deoptimization::Action_none) {
133 // This uncommon trap is sure to recompile, eventually.
134 // When that happens, C->too_many_traps will prevent
135 // this transformation from happening again.
136 found_trap = true;
137 }
138 }
139 break;
140 }
141 }
142 if (!found_trap) {
143 // We did not find an uncommon trap.
144 return;
145 }
146 }
147
148 // Check for decodeHeapOop_not_null node which did not fold into address
149 bool is_decoden = ((intptr_t)val) & 1;
150 val = (Node*)(((intptr_t)val) & ~1);
151
152 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
153 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
154
155 // Search the successor block for a load or store who's base value is also
156 // the tested value. There may be several.
157 MachNode *best = NULL; // Best found so far
158 for (DUIterator i = val->outs(); val->has_out(i); i++) {
159 Node *m = val->out(i);
160 if( !m->is_Mach() ) continue;
161 MachNode *mach = m->as_Mach();
162 was_store = false;
163 int iop = mach->ideal_Opcode();
164 switch( iop ) {
165 case Op_LoadB:
166 case Op_LoadUB:
167 case Op_LoadUS:
168 case Op_LoadD:
169 case Op_LoadF:
170 case Op_LoadI:
171 case Op_LoadL:
172 case Op_LoadP:
173 case Op_LoadN:
174 case Op_LoadS:
175 case Op_LoadKlass:
176 case Op_LoadNKlass:
177 case Op_LoadRange:
178 case Op_LoadD_unaligned:
179 case Op_LoadL_unaligned:
180 assert(mach->in(2) == val, "should be address");
181 break;
182 case Op_StoreB:
183 case Op_StoreC:
184 case Op_StoreCM:
185 case Op_StoreD:
186 case Op_StoreF:
187 case Op_StoreI:
188 case Op_StoreL:
189 case Op_StoreP:
190 case Op_StoreN:
191 case Op_StoreNKlass:
192 was_store = true; // Memory op is a store op
193 // Stores will have their address in slot 2 (memory in slot 1).
194 // If the value being nul-checked is in another slot, it means we
195 // are storing the checked value, which does NOT check the value!
196 if( mach->in(2) != val ) continue;
197 break; // Found a memory op?
198 case Op_StrComp:
199 case Op_StrEquals:
200 case Op_StrIndexOf:
201 case Op_StrIndexOfChar:
202 case Op_AryEq:
203 case Op_StrInflatedCopy:
204 case Op_StrCompressedCopy:
205 case Op_EncodeISOArray:
206 case Op_CountPositives:
207 // Not a legit memory op for implicit null check regardless of
208 // embedded loads
209 continue;
210 default: // Also check for embedded loads
211 if( !mach->needs_anti_dependence_check() )
212 continue; // Not an memory op; skip it
213 if( must_clone[iop] ) {
214 // Do not move nodes which produce flags because
215 // RA will try to clone it to place near branch and
216 // it will cause recompilation, see clone_node().
217 continue;
218 }
219 {
220 // Check that value is used in memory address in
221 // instructions with embedded load (CmpP val1,(val2+off)).
222 Node* base;
223 Node* index;
224 const MachOper* oper = mach->memory_inputs(base, index);
225 if (oper == NULL || oper == (MachOper*)-1) {
226 continue; // Not an memory op; skip it
227 }
228 if (val == base ||
229 (val == index && val->bottom_type()->isa_narrowoop())) {
230 break; // Found it
231 } else {
232 continue; // Skip it
233 }
234 }
235 break;
236 }
237
238 // On some OSes (AIX) the page at address 0 is only write protected.
239 // If so, only Store operations will trap.
240 // But a read accessing the base of a heap-based compressed heap will trap.
241 if (!was_store && needs_explicit_null_check_for_read(val)) {
242 continue;
243 }
244
245 // Check that node's control edge is not-null block's head or dominates it,
246 // otherwise we can't hoist it because there are other control dependencies.
247 Node* ctrl = mach->in(0);
248 if (ctrl != NULL && !(ctrl == not_null_block->head() ||
249 get_block_for_node(ctrl)->dominates(not_null_block))) {
250 continue;
251 }
252
253 // check if the offset is not too high for implicit exception
254 {
255 intptr_t offset = 0;
256 const TypePtr *adr_type = NULL; // Do not need this return value here
257 const Node* base = mach->get_base_and_disp(offset, adr_type);
258 if (base == NULL || base == NodeSentinel) {
259 // Narrow oop address doesn't have base, only index.
260 // Give up if offset is beyond page size or if heap base is not protected.
261 if (val->bottom_type()->isa_narrowoop() &&
262 (MacroAssembler::needs_explicit_null_check(offset) ||
263 !CompressedOops::use_implicit_null_checks()))
264 continue;
265 // cannot reason about it; is probably not implicit null exception
266 } else {
267 const TypePtr* tptr;
268 if ((UseCompressedOops || UseCompressedClassPointers) &&
269 (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
270 // 32-bits narrow oop can be the base of address expressions
271 tptr = base->get_ptr_type();
272 } else {
273 // only regular oops are expected here
274 tptr = base->bottom_type()->is_ptr();
275 }
276 // Give up if offset is not a compile-time constant.
277 if (offset == Type::OffsetBot || tptr->offset() == Type::OffsetBot)
278 continue;
279 offset += tptr->offset(); // correct if base is offseted
280 // Give up if reference is beyond page size.
281 if (MacroAssembler::needs_explicit_null_check(offset))
282 continue;
283 // Give up if base is a decode node and the heap base is not protected.
284 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
285 !CompressedOops::use_implicit_null_checks())
286 continue;
287 }
288 }
289
290 // Check ctrl input to see if the null-check dominates the memory op
291 Block *cb = get_block_for_node(mach);
292 cb = cb->_idom; // Always hoist at least 1 block
293 if( !was_store ) { // Stores can be hoisted only one block
294 while( cb->_dom_depth > (block->_dom_depth + 1))
295 cb = cb->_idom; // Hoist loads as far as we want
296 // The non-null-block should dominate the memory op, too. Live
297 // range spilling will insert a spill in the non-null-block if it is
298 // needs to spill the memory op for an implicit null check.
299 if (cb->_dom_depth == (block->_dom_depth + 1)) {
300 if (cb != not_null_block) continue;
301 cb = cb->_idom;
302 }
303 }
304 if( cb != block ) continue;
305
306 // Found a memory user; see if it can be hoisted to check-block
307 uint vidx = 0; // Capture index of value into memop
308 uint j;
309 for( j = mach->req()-1; j > 0; j-- ) {
310 if( mach->in(j) == val ) {
311 vidx = j;
312 // Ignore DecodeN val which could be hoisted to where needed.
313 if( is_decoden ) continue;
314 }
315 // Block of memory-op input
316 Block* inb = get_block_for_node(mach->in(j));
317 if (mach->in(j)->is_Con() && mach->in(j)->req() == 1 && inb == get_block_for_node(mach)) {
318 // Ignore constant loads scheduled in the same block (we can simply hoist them as well)
319 continue;
320 }
321 Block *b = block; // Start from nul check
322 while( b != inb && b->_dom_depth > inb->_dom_depth )
323 b = b->_idom; // search upwards for input
324 // See if input dominates null check
325 if( b != inb )
326 break;
327 }
328 if( j > 0 )
329 continue;
330 Block *mb = get_block_for_node(mach);
331 // Hoisting stores requires more checks for the anti-dependence case.
332 // Give up hoisting if we have to move the store past any load.
333 if( was_store ) {
334 Block *b = mb; // Start searching here for a local load
335 // mach use (faulting) trying to hoist
336 // n might be blocker to hoisting
337 while( b != block ) {
338 uint k;
339 for( k = 1; k < b->number_of_nodes(); k++ ) {
340 Node *n = b->get_node(k);
341 if( n->needs_anti_dependence_check() &&
342 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
343 break; // Found anti-dependent load
344 }
345 if( k < b->number_of_nodes() )
346 break; // Found anti-dependent load
347 // Make sure control does not do a merge (would have to check allpaths)
348 if( b->num_preds() != 2 ) break;
349 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
350 }
351 if( b != block ) continue;
352 }
353
354 // Make sure this memory op is not already being used for a NullCheck
355 Node *e = mb->end();
356 if( e->is_MachNullCheck() && e->in(1) == mach )
357 continue; // Already being used as a NULL check
358
359 // Found a candidate! Pick one with least dom depth - the highest
360 // in the dom tree should be closest to the null check.
361 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
362 best = mach;
363 bidx = vidx;
364 }
365 }
366 // No candidate!
367 if (best == NULL) {
368 return;
369 }
370
371 // ---- Found an implicit null check
372 #ifndef PRODUCT
373 extern int implicit_null_checks;
374 implicit_null_checks++;
375 #endif
376
377 if( is_decoden ) {
378 // Check if we need to hoist decodeHeapOop_not_null first.
379 Block *valb = get_block_for_node(val);
380 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
381 // Hoist it up to the end of the test block together with its inputs if they exist.
382 for (uint i = 2; i < val->req(); i++) {
383 // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
384 Node *temp = val->in(i);
385 Block *tempb = get_block_for_node(temp);
386 if (!tempb->dominates(block)) {
387 assert(block->dominates(tempb), "sanity check: temp node placement");
388 // We only expect nodes without further inputs, like MachTemp or load Base.
389 assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
390 "need for recursive hoisting not expected");
391 tempb->find_remove(temp);
392 block->add_inst(temp);
393 map_node_to_block(temp, block);
394 }
395 }
396 valb->find_remove(val);
397 block->add_inst(val);
398 map_node_to_block(val, block);
399 // DecodeN on x86 may kill flags. Check for flag-killing projections
400 // that also need to be hoisted.
401 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
402 Node* n = val->fast_out(j);
403 if( n->is_MachProj() ) {
404 get_block_for_node(n)->find_remove(n);
405 block->add_inst(n);
406 map_node_to_block(n, block);
407 }
408 }
409 }
410 }
411
412 // Hoist constant load inputs as well.
413 for (uint i = 1; i < best->req(); ++i) {
414 Node* n = best->in(i);
415 if (n->is_Con() && get_block_for_node(n) == get_block_for_node(best)) {
416 get_block_for_node(n)->find_remove(n);
417 block->add_inst(n);
418 map_node_to_block(n, block);
419 // Constant loads may kill flags (for example, when XORing a register).
420 // Check for flag-killing projections that also need to be hoisted.
421 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
422 Node* proj = n->fast_out(j);
423 if (proj->is_MachProj()) {
424 get_block_for_node(proj)->find_remove(proj);
425 block->add_inst(proj);
426 map_node_to_block(proj, block);
427 }
428 }
429 }
430 }
431
432 // Hoist the memory candidate up to the end of the test block.
433 Block *old_block = get_block_for_node(best);
434 old_block->find_remove(best);
435 block->add_inst(best);
436 map_node_to_block(best, block);
437
438 // Move the control dependence if it is pinned to not-null block.
439 // Don't change it in other cases: NULL or dominating control.
440 Node* ctrl = best->in(0);
441 if (ctrl != NULL && get_block_for_node(ctrl) == not_null_block) {
442 // Set it to control edge of null check.
443 best->set_req(0, proj->in(0)->in(0));
444 }
445
446 // Check for flag-killing projections that also need to be hoisted
447 // Should be DU safe because no edge updates.
448 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
449 Node* n = best->fast_out(j);
450 if( n->is_MachProj() ) {
451 get_block_for_node(n)->find_remove(n);
452 block->add_inst(n);
453 map_node_to_block(n, block);
454 }
455 }
456
457 // proj==Op_True --> ne test; proj==Op_False --> eq test.
458 // One of two graph shapes got matched:
459 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
460 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
461 // NULL checks are always branch-if-eq. If we see a IfTrue projection
462 // then we are replacing a 'ne' test with a 'eq' NULL check test.
463 // We need to flip the projections to keep the same semantics.
464 if( proj->Opcode() == Op_IfTrue ) {
465 // Swap order of projections in basic block to swap branch targets
466 Node *tmp1 = block->get_node(block->end_idx()+1);
467 Node *tmp2 = block->get_node(block->end_idx()+2);
468 block->map_node(tmp2, block->end_idx()+1);
469 block->map_node(tmp1, block->end_idx()+2);
470 Node *tmp = new Node(C->top()); // Use not NULL input
471 tmp1->replace_by(tmp);
472 tmp2->replace_by(tmp1);
473 tmp->replace_by(tmp2);
474 tmp->destruct(NULL);
475 }
476
477 // Remove the existing null check; use a new implicit null check instead.
478 // Since schedule-local needs precise def-use info, we need to correct
479 // it as well.
480 Node *old_tst = proj->in(0);
481 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
482 block->map_node(nul_chk, block->end_idx());
483 map_node_to_block(nul_chk, block);
484 // Redirect users of old_test to nul_chk
485 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
486 old_tst->last_out(i2)->set_req(0, nul_chk);
487 // Clean-up any dead code
488 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
489 Node* in = old_tst->in(i3);
490 old_tst->set_req(i3, NULL);
491 if (in->outcnt() == 0) {
492 // Remove dead input node
493 in->disconnect_inputs(C);
494 block->find_remove(in);
495 }
496 }
497
498 latency_from_uses(nul_chk);
499 latency_from_uses(best);
500
501 // insert anti-dependences to defs in this block
502 if (! best->needs_anti_dependence_check()) {
503 for (uint k = 1; k < block->number_of_nodes(); k++) {
504 Node *n = block->get_node(k);
505 if (n->needs_anti_dependence_check() &&
506 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
507 // Found anti-dependent load
508 insert_anti_dependences(block, n);
509 }
510 }
511 }
512 }
513
514
515 //------------------------------select-----------------------------------------
516 // Select a nice fellow from the worklist to schedule next. If there is only
517 // one choice, then use it. Projections take top priority for correctness
518 // reasons - if I see a projection, then it is next. There are a number of
519 // other special cases, for instructions that consume condition codes, et al.
520 // These are chosen immediately. Some instructions are required to immediately
521 // precede the last instruction in the block, and these are taken last. Of the
522 // remaining cases (most), choose the instruction with the greatest latency
523 // (that is, the most number of pseudo-cycles required to the end of the
524 // routine). If there is a tie, choose the instruction with the most inputs.
525 Node* PhaseCFG::select(
526 Block* block,
527 Node_List &worklist,
528 GrowableArray<int> &ready_cnt,
529 VectorSet &next_call,
530 uint sched_slot,
531 intptr_t* recalc_pressure_nodes) {
532
533 // If only a single entry on the stack, use it
534 uint cnt = worklist.size();
535 if (cnt == 1) {
536 Node *n = worklist[0];
537 worklist.map(0,worklist.pop());
538 return n;
539 }
540
541 uint choice = 0; // Bigger is most important
542 uint latency = 0; // Bigger is scheduled first
543 uint score = 0; // Bigger is better
544 int idx = -1; // Index in worklist
545 int cand_cnt = 0; // Candidate count
546 bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10);
547
548 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
549 // Order in worklist is used to break ties.
550 // See caller for how this is used to delay scheduling
551 // of induction variable increments to after the other
552 // uses of the phi are scheduled.
553 Node *n = worklist[i]; // Get Node on worklist
554
555 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
556 if( n->is_Proj() || // Projections always win
557 n->Opcode()== Op_Con || // So does constant 'Top'
558 iop == Op_CreateEx || // Create-exception must start block
559 iop == Op_CheckCastPP
560 ) {
561 worklist.map(i,worklist.pop());
562 return n;
563 }
564
565 // Final call in a block must be adjacent to 'catch'
566 Node *e = block->end();
567 if( e->is_Catch() && e->in(0)->in(0) == n )
568 continue;
569
570 // Memory op for an implicit null check has to be at the end of the block
571 if( e->is_MachNullCheck() && e->in(1) == n )
572 continue;
573
574 // Schedule IV increment last.
575 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
576 // Cmp might be matched into CountedLoopEnd node.
577 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
578 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
579 continue;
580 }
581 }
582
583 uint n_choice = 2;
584
585 // See if this instruction is consumed by a branch. If so, then (as the
586 // branch is the last instruction in the basic block) force it to the
587 // end of the basic block
588 if ( must_clone[iop] ) {
589 // See if any use is a branch
590 bool found_machif = false;
591
592 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
593 Node* use = n->fast_out(j);
594
595 // The use is a conditional branch, make them adjacent
596 if (use->is_MachIf() && get_block_for_node(use) == block) {
597 found_machif = true;
598 break;
599 }
600
601 // More than this instruction pending for successor to be ready,
602 // don't choose this if other opportunities are ready
603 if (ready_cnt.at(use->_idx) > 1)
604 n_choice = 1;
605 }
606
607 // loop terminated, prefer not to use this instruction
608 if (found_machif)
609 continue;
610 }
611
612 // See if this has a predecessor that is "must_clone", i.e. sets the
613 // condition code. If so, choose this first
614 for (uint j = 0; j < n->req() ; j++) {
615 Node *inn = n->in(j);
616 if (inn) {
617 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
618 n_choice = 3;
619 break;
620 }
621 }
622 }
623
624 // MachTemps should be scheduled last so they are near their uses
625 if (n->is_MachTemp()) {
626 n_choice = 1;
627 }
628
629 uint n_latency = get_latency_for_node(n);
630 uint n_score = n->req(); // Many inputs get high score to break ties
631
632 if (OptoRegScheduling && block_size_threshold_ok) {
633 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
634 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
635 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
636 // simulate the notion that we just picked this node to schedule
637 n->add_flag(Node::Flag_is_scheduled);
638 // now caculate its effect upon the graph if we did
639 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
640 // return its state for finalize in case somebody else wins
641 n->remove_flag(Node::Flag_is_scheduled);
642 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
643 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
644 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
645 recalc_pressure_nodes[n->_idx] = int_pressure;
646 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
647 }
648
649 if (_scheduling_for_pressure) {
650 latency = n_latency;
651 if (n_choice != 3) {
652 // Now evaluate each register pressure component based on threshold in the score.
653 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
654 // on a single instruction, but we might see it shrink on both banks.
655 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
656 // live ranges that terminate on this instruction.
657 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
658 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
659 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
660 }
661 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
662 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
663 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
664 }
665 } else {
666 // make sure we choose these candidates
667 score = 0;
668 }
669 }
670 }
671
672 // Keep best latency found
673 cand_cnt++;
674 if (choice < n_choice ||
675 (choice == n_choice &&
676 ((StressLCM && C->randomized_select(cand_cnt)) ||
677 (!StressLCM &&
678 (latency < n_latency ||
679 (latency == n_latency &&
680 (score < n_score))))))) {
681 choice = n_choice;
682 latency = n_latency;
683 score = n_score;
684 idx = i; // Also keep index in worklist
685 }
686 } // End of for all ready nodes in worklist
687
688 guarantee(idx >= 0, "index should be set");
689 Node *n = worklist[(uint)idx]; // Get the winner
690
691 worklist.map((uint)idx, worklist.pop()); // Compress worklist
692 return n;
693 }
694
695 //-------------------------adjust_register_pressure----------------------------
696 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
697 PhaseLive* liveinfo = _regalloc->get_live();
698 IndexSet* liveout = liveinfo->live(block);
699 // first adjust the register pressure for the sources
700 for (uint i = 1; i < n->req(); i++) {
701 bool lrg_ends = false;
702 Node *src_n = n->in(i);
703 if (src_n == NULL) continue;
704 if (!src_n->is_Mach()) continue;
705 uint src = _regalloc->_lrg_map.find(src_n);
706 if (src == 0) continue;
707 LRG& lrg_src = _regalloc->lrgs(src);
708 // detect if the live range ends or not
709 if (liveout->member(src) == false) {
710 lrg_ends = true;
711 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
712 Node* m = src_n->fast_out(j); // Get user
713 if (m == n) continue;
714 if (!m->is_Mach()) continue;
715 MachNode *mach = m->as_Mach();
716 bool src_matches = false;
717 int iop = mach->ideal_Opcode();
718
719 switch (iop) {
720 case Op_StoreB:
721 case Op_StoreC:
722 case Op_StoreCM:
723 case Op_StoreD:
724 case Op_StoreF:
725 case Op_StoreI:
726 case Op_StoreL:
727 case Op_StoreP:
728 case Op_StoreN:
729 case Op_StoreVector:
730 case Op_StoreVectorMasked:
731 case Op_StoreVectorScatter:
732 case Op_StoreVectorScatterMasked:
733 case Op_StoreNKlass:
734 for (uint k = 1; k < m->req(); k++) {
735 Node *in = m->in(k);
736 if (in == src_n) {
737 src_matches = true;
738 break;
739 }
740 }
741 break;
742
743 default:
744 src_matches = true;
745 break;
746 }
747
748 // If we have a store as our use, ignore the non source operands
749 if (src_matches == false) continue;
750
751 // Mark every unscheduled use which is not n with a recalculation
752 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
753 if (finalize_mode && !m->is_Phi()) {
754 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
755 }
756 lrg_ends = false;
757 }
758 }
759 }
760 // if none, this live range ends and we can adjust register pressure
761 if (lrg_ends) {
762 if (finalize_mode) {
763 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
764 } else {
765 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
766 }
767 }
768 }
769
770 // now add the register pressure from the dest and evaluate which heuristic we should use:
771 // 1.) The default, latency scheduling
772 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
773 uint dst = _regalloc->_lrg_map.find(n);
774 if (dst != 0) {
775 LRG& lrg_dst = _regalloc->lrgs(dst);
776 if (finalize_mode) {
777 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
778 // check to see if we fall over the register pressure cliff here
779 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
780 _scheduling_for_pressure = true;
781 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
782 _scheduling_for_pressure = true;
783 } else {
784 // restore latency scheduling mode
785 _scheduling_for_pressure = false;
786 }
787 } else {
788 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
789 }
790 }
791 }
792
793 //------------------------------set_next_call----------------------------------
794 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
795 if( next_call.test_set(n->_idx) ) return;
796 for( uint i=0; i<n->len(); i++ ) {
797 Node *m = n->in(i);
798 if( !m ) continue; // must see all nodes in block that precede call
799 if (get_block_for_node(m) == block) {
800 set_next_call(block, m, next_call);
801 }
802 }
803 }
804
805 //------------------------------needed_for_next_call---------------------------
806 // Set the flag 'next_call' for each Node that is needed for the next call to
807 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
808 // next subroutine call get priority - basically it moves things NOT needed
809 // for the next call till after the call. This prevents me from trying to
810 // carry lots of stuff live across a call.
811 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
812 // Find the next control-defining Node in this block
813 Node* call = NULL;
814 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
815 Node* m = this_call->fast_out(i);
816 if (get_block_for_node(m) == block && // Local-block user
817 m != this_call && // Not self-start node
818 m->is_MachCall()) {
819 call = m;
820 break;
821 }
822 }
823 if (call == NULL) return; // No next call (e.g., block end is near)
824 // Set next-call for all inputs to this call
825 set_next_call(block, call, next_call);
826 }
827
828 //------------------------------add_call_kills-------------------------------------
829 // helper function that adds caller save registers to MachProjNode
830 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
831 // Fill in the kill mask for the call
832 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
833 if( !regs.Member(r) ) { // Not already defined by the call
834 // Save-on-call register?
835 if ((save_policy[r] == 'C') ||
836 (save_policy[r] == 'A') ||
837 ((save_policy[r] == 'E') && exclude_soe)) {
838 proj->_rout.Insert(r);
839 }
840 }
841 }
842 }
843
844
845 //------------------------------sched_call-------------------------------------
846 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
847 RegMask regs;
848
849 // Schedule all the users of the call right now. All the users are
850 // projection Nodes, so they must be scheduled next to the call.
851 // Collect all the defined registers.
852 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
853 Node* n = mcall->fast_out(i);
854 assert( n->is_MachProj(), "" );
855 int n_cnt = ready_cnt.at(n->_idx)-1;
856 ready_cnt.at_put(n->_idx, n_cnt);
857 assert( n_cnt == 0, "" );
858 // Schedule next to call
859 block->map_node(n, node_cnt++);
860 // Collect defined registers
861 regs.OR(n->out_RegMask());
862 // Check for scheduling the next control-definer
863 if( n->bottom_type() == Type::CONTROL )
864 // Warm up next pile of heuristic bits
865 needed_for_next_call(block, n, next_call);
866
867 // Children of projections are now all ready
868 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
869 Node* m = n->fast_out(j); // Get user
870 if(get_block_for_node(m) != block) {
871 continue;
872 }
873 if( m->is_Phi() ) continue;
874 int m_cnt = ready_cnt.at(m->_idx) - 1;
875 ready_cnt.at_put(m->_idx, m_cnt);
876 if( m_cnt == 0 )
877 worklist.push(m);
878 }
879
880 }
881
882 // Act as if the call defines the Frame Pointer.
883 // Certainly the FP is alive and well after the call.
884 regs.Insert(_matcher.c_frame_pointer());
885
886 // Set all registers killed and not already defined by the call.
887 uint r_cnt = mcall->tf()->range_cc()->cnt();
888 int op = mcall->ideal_Opcode();
889 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
890 map_node_to_block(proj, block);
891 block->insert_node(proj, node_cnt++);
892
893 // Select the right register save policy.
894 const char *save_policy = NULL;
895 switch (op) {
896 case Op_CallRuntime:
897 case Op_CallLeaf:
898 case Op_CallLeafNoFP:
899 case Op_CallLeafVector:
900 // Calling C code so use C calling convention
901 save_policy = _matcher._c_reg_save_policy;
902 break;
903
904 case Op_CallStaticJava:
905 case Op_CallDynamicJava:
906 // Calling Java code so use Java calling convention
907 save_policy = _matcher._register_save_policy;
908 break;
909 case Op_CallNative:
910 // We use the c reg save policy here since Foreign Linker
911 // only supports the C ABI currently.
912 // TODO compute actual save policy based on nep->abi
913 save_policy = _matcher._c_reg_save_policy;
914 break;
915
916 default:
917 ShouldNotReachHere();
918 }
919
920 // When using CallRuntime mark SOE registers as killed by the call
921 // so values that could show up in the RegisterMap aren't live in a
922 // callee saved register since the register wouldn't know where to
923 // find them. CallLeaf and CallLeafNoFP are ok because they can't
924 // have debug info on them. Strictly speaking this only needs to be
925 // done for oops since idealreg2debugmask takes care of debug info
926 // references but there no way to handle oops differently than other
927 // pointers as far as the kill mask goes.
928 //
929 // Also, native callees can not save oops, so we kill the SOE registers
930 // here in case a native call has a safepoint. This doesn't work for
931 // RBP though, which seems to be special-cased elsewhere to always be
932 // treated as alive, so we instead manually save the location of RBP
933 // before doing the native call (see NativeInvokerGenerator::generate).
934 bool exclude_soe = op == Op_CallRuntime
935 || (op == Op_CallNative && mcall->guaranteed_safepoint());
936
937 // If the call is a MethodHandle invoke, we need to exclude the
938 // register which is used to save the SP value over MH invokes from
939 // the mask. Otherwise this register could be used for
940 // deoptimization information.
941 if (op == Op_CallStaticJava) {
942 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
943 if (mcallstaticjava->_method_handle_invoke)
944 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
945 }
946
947 add_call_kills(proj, regs, save_policy, exclude_soe);
948
949 return node_cnt;
950 }
951
952
953 //------------------------------schedule_local---------------------------------
954 // Topological sort within a block. Someday become a real scheduler.
955 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
956 // Already "sorted" are the block start Node (as the first entry), and
957 // the block-ending Node and any trailing control projections. We leave
958 // these alone. PhiNodes and ParmNodes are made to follow the block start
959 // Node. Everything else gets topo-sorted.
960
961 #ifndef PRODUCT
962 if (trace_opto_pipelining()) {
963 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
964 for (uint i = 0;i < block->number_of_nodes(); i++) {
965 tty->print("# ");
966 block->get_node(i)->fast_dump();
967 }
968 tty->print_cr("#");
969 }
970 #endif
971
972 // RootNode is already sorted
973 if (block->number_of_nodes() == 1) {
974 return true;
975 }
976
977 bool block_size_threshold_ok = (recalc_pressure_nodes != NULL) && (block->number_of_nodes() > 10);
978
979 // We track the uses of local definitions as input dependences so that
980 // we know when a given instruction is avialable to be scheduled.
981 uint i;
982 if (OptoRegScheduling && block_size_threshold_ok) {
983 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
984 Node *n = block->get_node(i);
985 n->remove_flag(Node::Flag_is_scheduled);
986 if (!n->is_Phi()) {
987 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
988 }
989 }
990 }
991
992 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
993 uint node_cnt = block->end_idx();
994 uint phi_cnt = 1;
995 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
996 Node *n = block->get_node(i);
997 if( n->is_Phi() || // Found a PhiNode or ParmNode
998 (n->is_Proj() && n->in(0) == block->head()) ) {
999 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
1000 block->map_node(block->get_node(phi_cnt), i);
1001 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
1002 if (OptoRegScheduling && block_size_threshold_ok) {
1003 // mark n as scheduled
1004 n->add_flag(Node::Flag_is_scheduled);
1005 }
1006 } else { // All others
1007 // Count block-local inputs to 'n'
1008 uint cnt = n->len(); // Input count
1009 uint local = 0;
1010 for( uint j=0; j<cnt; j++ ) {
1011 Node *m = n->in(j);
1012 if( m && get_block_for_node(m) == block && !m->is_top() )
1013 local++; // One more block-local input
1014 }
1015 ready_cnt.at_put(n->_idx, local); // Count em up
1016
1017 #ifdef ASSERT
1018 if (UseG1GC) {
1019 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
1020 // Check the precedence edges
1021 for (uint prec = n->req(); prec < n->len(); prec++) {
1022 Node* oop_store = n->in(prec);
1023 if (oop_store != NULL) {
1024 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1025 }
1026 }
1027 }
1028 }
1029 #endif
1030
1031 // A few node types require changing a required edge to a precedence edge
1032 // before allocation.
1033 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1034 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1035 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1036 // MemBarAcquire could be created without Precedent edge.
1037 // del_req() replaces the specified edge with the last input edge
1038 // and then removes the last edge. If the specified edge > number of
1039 // edges the last edge will be moved outside of the input edges array
1040 // and the edge will be lost. This is why this code should be
1041 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1042 Node *x = n->in(TypeFunc::Parms);
1043 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1044 // Old edge to node within same block will get removed, but no precedence
1045 // edge will get added because it already exists. Update ready count.
1046 int cnt = ready_cnt.at(n->_idx);
1047 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1048 ready_cnt.at_put(n->_idx, cnt-1);
1049 }
1050 n->del_req(TypeFunc::Parms);
1051 n->add_prec(x);
1052 }
1053 }
1054 }
1055 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1056 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1057
1058 // All the prescheduled guys do not hold back internal nodes
1059 uint i3;
1060 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1061 Node *n = block->get_node(i3); // Get pre-scheduled
1062 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1063 Node* m = n->fast_out(j);
1064 if (get_block_for_node(m) == block) { // Local-block user
1065 int m_cnt = ready_cnt.at(m->_idx)-1;
1066 if (OptoRegScheduling && block_size_threshold_ok) {
1067 // mark m as scheduled
1068 if (m_cnt < 0) {
1069 m->add_flag(Node::Flag_is_scheduled);
1070 }
1071 }
1072 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1073 }
1074 }
1075 }
1076
1077 Node_List delay;
1078 // Make a worklist
1079 Node_List worklist;
1080 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1081 Node *m = block->get_node(i4);
1082 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1083 if (m->is_iteratively_computed()) {
1084 // Push induction variable increments last to allow other uses
1085 // of the phi to be scheduled first. The select() method breaks
1086 // ties in scheduling by worklist order.
1087 delay.push(m);
1088 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1089 // Force the CreateEx to the top of the list so it's processed
1090 // first and ends up at the start of the block.
1091 worklist.insert(0, m);
1092 } else {
1093 worklist.push(m); // Then on to worklist!
1094 }
1095 }
1096 }
1097 while (delay.size()) {
1098 Node* d = delay.pop();
1099 worklist.push(d);
1100 }
1101
1102 if (OptoRegScheduling && block_size_threshold_ok) {
1103 // To stage register pressure calculations we need to examine the live set variables
1104 // breaking them up by register class to compartmentalize the calculations.
1105 _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1106 _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1107 _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1108 _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1109
1110 _regalloc->compute_entry_block_pressure(block);
1111 }
1112
1113 // Warm up the 'next_call' heuristic bits
1114 needed_for_next_call(block, block->head(), next_call);
1115
1116 #ifndef PRODUCT
1117 if (trace_opto_pipelining()) {
1118 for (uint j=0; j< block->number_of_nodes(); j++) {
1119 Node *n = block->get_node(j);
1120 int idx = n->_idx;
1121 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1122 tty->print("latency:%3d ", get_latency_for_node(n));
1123 tty->print("%4d: %s\n", idx, n->Name());
1124 }
1125 }
1126 #endif
1127
1128 uint max_idx = (uint)ready_cnt.length();
1129 // Pull from worklist and schedule
1130 while( worklist.size() ) { // Worklist is not ready
1131
1132 #ifndef PRODUCT
1133 if (trace_opto_pipelining()) {
1134 tty->print("# ready list:");
1135 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1136 Node *n = worklist[i]; // Get Node on worklist
1137 tty->print(" %d", n->_idx);
1138 }
1139 tty->cr();
1140 }
1141 #endif
1142
1143 // Select and pop a ready guy from worklist
1144 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1145 block->map_node(n, phi_cnt++); // Schedule him next
1146
1147 if (OptoRegScheduling && block_size_threshold_ok) {
1148 n->add_flag(Node::Flag_is_scheduled);
1149
1150 // Now adjust the resister pressure with the node we selected
1151 if (!n->is_Phi()) {
1152 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1153 }
1154 }
1155
1156 #ifndef PRODUCT
1157 if (trace_opto_pipelining()) {
1158 tty->print("# select %d: %s", n->_idx, n->Name());
1159 tty->print(", latency:%d", get_latency_for_node(n));
1160 n->dump();
1161 if (Verbose) {
1162 tty->print("# ready list:");
1163 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1164 Node *n = worklist[i]; // Get Node on worklist
1165 tty->print(" %d", n->_idx);
1166 }
1167 tty->cr();
1168 }
1169 }
1170
1171 #endif
1172 if( n->is_MachCall() ) {
1173 MachCallNode *mcall = n->as_MachCall();
1174 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1175 continue;
1176 }
1177
1178 if (n->is_Mach() && n->as_Mach()->has_call()) {
1179 RegMask regs;
1180 regs.Insert(_matcher.c_frame_pointer());
1181 regs.OR(n->out_RegMask());
1182
1183 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1184 map_node_to_block(proj, block);
1185 block->insert_node(proj, phi_cnt++);
1186
1187 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1188 }
1189
1190 // Children are now all ready
1191 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1192 Node* m = n->fast_out(i5); // Get user
1193 if (get_block_for_node(m) != block) {
1194 continue;
1195 }
1196 if( m->is_Phi() ) continue;
1197 if (m->_idx >= max_idx) { // new node, skip it
1198 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1199 continue;
1200 }
1201 int m_cnt = ready_cnt.at(m->_idx) - 1;
1202 ready_cnt.at_put(m->_idx, m_cnt);
1203 if( m_cnt == 0 )
1204 worklist.push(m);
1205 }
1206 }
1207
1208 if( phi_cnt != block->end_idx() ) {
1209 // did not schedule all. Retry, Bailout, or Die
1210 if (C->subsume_loads() == true && !C->failing()) {
1211 // Retry with subsume_loads == false
1212 // If this is the first failure, the sentinel string will "stick"
1213 // to the Compile object, and the C2Compiler will see it and retry.
1214 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1215 } else {
1216 assert(false, "graph should be schedulable");
1217 }
1218 // assert( phi_cnt == end_idx(), "did not schedule all" );
1219 return false;
1220 }
1221
1222 if (OptoRegScheduling && block_size_threshold_ok) {
1223 _regalloc->compute_exit_block_pressure(block);
1224 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1225 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1226 }
1227
1228 #ifndef PRODUCT
1229 if (trace_opto_pipelining()) {
1230 tty->print_cr("#");
1231 tty->print_cr("# after schedule_local");
1232 for (uint i = 0;i < block->number_of_nodes();i++) {
1233 tty->print("# ");
1234 block->get_node(i)->fast_dump();
1235 }
1236 tty->print_cr("# ");
1237
1238 if (OptoRegScheduling && block_size_threshold_ok) {
1239 tty->print_cr("# pressure info : %d", block->_pre_order);
1240 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1241 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1242 }
1243 tty->cr();
1244 }
1245 #endif
1246
1247 return true;
1248 }
1249
1250 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1251 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1252 for (uint l = 0; l < use->len(); l++) {
1253 if (use->in(l) == old_def) {
1254 if (l < use->req()) {
1255 use->set_req(l, new_def);
1256 } else {
1257 use->rm_prec(l);
1258 use->add_prec(new_def);
1259 l--;
1260 }
1261 }
1262 }
1263 }
1264
1265 //------------------------------catch_cleanup_find_cloned_def------------------
1266 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1267 assert( use_blk != def_blk, "Inter-block cleanup only");
1268
1269 // The use is some block below the Catch. Find and return the clone of the def
1270 // that dominates the use. If there is no clone in a dominating block, then
1271 // create a phi for the def in a dominating block.
1272
1273 // Find which successor block dominates this use. The successor
1274 // blocks must all be single-entry (from the Catch only; I will have
1275 // split blocks to make this so), hence they all dominate.
1276 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1277 use_blk = use_blk->_idom;
1278
1279 // Find the successor
1280 Node *fixup = NULL;
1281
1282 uint j;
1283 for( j = 0; j < def_blk->_num_succs; j++ )
1284 if( use_blk == def_blk->_succs[j] )
1285 break;
1286
1287 if( j == def_blk->_num_succs ) {
1288 // Block at same level in dom-tree is not a successor. It needs a
1289 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1290 Node_Array inputs = new Node_List();
1291 for(uint k = 1; k < use_blk->num_preds(); k++) {
1292 Block* block = get_block_for_node(use_blk->pred(k));
1293 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1294 }
1295
1296 // Check to see if the use_blk already has an identical phi inserted.
1297 // If it exists, it will be at the first position since all uses of a
1298 // def are processed together.
1299 Node *phi = use_blk->get_node(1);
1300 if( phi->is_Phi() ) {
1301 fixup = phi;
1302 for (uint k = 1; k < use_blk->num_preds(); k++) {
1303 if (phi->in(k) != inputs[k]) {
1304 // Not a match
1305 fixup = NULL;
1306 break;
1307 }
1308 }
1309 }
1310
1311 // If an existing PhiNode was not found, make a new one.
1312 if (fixup == NULL) {
1313 Node *new_phi = PhiNode::make(use_blk->head(), def);
1314 use_blk->insert_node(new_phi, 1);
1315 map_node_to_block(new_phi, use_blk);
1316 for (uint k = 1; k < use_blk->num_preds(); k++) {
1317 new_phi->set_req(k, inputs[k]);
1318 }
1319 fixup = new_phi;
1320 }
1321
1322 } else {
1323 // Found the use just below the Catch. Make it use the clone.
1324 fixup = use_blk->get_node(n_clone_idx);
1325 }
1326
1327 return fixup;
1328 }
1329
1330 //--------------------------catch_cleanup_intra_block--------------------------
1331 // Fix all input edges in use that reference "def". The use is in the same
1332 // block as the def and both have been cloned in each successor block.
1333 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1334
1335 // Both the use and def have been cloned. For each successor block,
1336 // get the clone of the use, and make its input the clone of the def
1337 // found in that block.
1338
1339 uint use_idx = blk->find_node(use);
1340 uint offset_idx = use_idx - beg;
1341 for( uint k = 0; k < blk->_num_succs; k++ ) {
1342 // Get clone in each successor block
1343 Block *sb = blk->_succs[k];
1344 Node *clone = sb->get_node(offset_idx+1);
1345 assert( clone->Opcode() == use->Opcode(), "" );
1346
1347 // Make use-clone reference the def-clone
1348 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1349 }
1350 }
1351
1352 //------------------------------catch_cleanup_inter_block---------------------
1353 // Fix all input edges in use that reference "def". The use is in a different
1354 // block than the def.
1355 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1356 if( !use_blk ) return; // Can happen if the use is a precedence edge
1357
1358 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1359 catch_cleanup_fix_all_inputs(use, def, new_def);
1360 }
1361
1362 //------------------------------call_catch_cleanup-----------------------------
1363 // If we inserted any instructions between a Call and his CatchNode,
1364 // clone the instructions on all paths below the Catch.
1365 void PhaseCFG::call_catch_cleanup(Block* block) {
1366
1367 // End of region to clone
1368 uint end = block->end_idx();
1369 if( !block->get_node(end)->is_Catch() ) return;
1370 // Start of region to clone
1371 uint beg = end;
1372 while(!block->get_node(beg-1)->is_MachProj() ||
1373 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1374 beg--;
1375 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1376 }
1377 // Range of inserted instructions is [beg, end)
1378 if( beg == end ) return;
1379
1380 // Clone along all Catch output paths. Clone area between the 'beg' and
1381 // 'end' indices.
1382 for( uint i = 0; i < block->_num_succs; i++ ) {
1383 Block *sb = block->_succs[i];
1384 // Clone the entire area; ignoring the edge fixup for now.
1385 for( uint j = end; j > beg; j-- ) {
1386 Node *clone = block->get_node(j-1)->clone();
1387 sb->insert_node(clone, 1);
1388 map_node_to_block(clone, sb);
1389 if (clone->needs_anti_dependence_check()) {
1390 insert_anti_dependences(sb, clone);
1391 }
1392 }
1393 }
1394
1395
1396 // Fixup edges. Check the def-use info per cloned Node
1397 for(uint i2 = beg; i2 < end; i2++ ) {
1398 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1399 Node *n = block->get_node(i2); // Node that got cloned
1400 // Need DU safe iterator because of edge manipulation in calls.
1401 Unique_Node_List* out = new Unique_Node_List();
1402 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1403 out->push(n->fast_out(j1));
1404 }
1405 uint max = out->size();
1406 for (uint j = 0; j < max; j++) {// For all users
1407 Node *use = out->pop();
1408 Block *buse = get_block_for_node(use);
1409 if( use->is_Phi() ) {
1410 for( uint k = 1; k < use->req(); k++ )
1411 if( use->in(k) == n ) {
1412 Block* b = get_block_for_node(buse->pred(k));
1413 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1414 use->set_req(k, fixup);
1415 }
1416 } else {
1417 if (block == buse) {
1418 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1419 } else {
1420 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1421 }
1422 }
1423 } // End for all users
1424
1425 } // End of for all Nodes in cloned area
1426
1427 // Remove the now-dead cloned ops
1428 for(uint i3 = beg; i3 < end; i3++ ) {
1429 block->get_node(beg)->disconnect_inputs(C);
1430 block->remove_node(beg);
1431 }
1432
1433 // If the successor blocks have a CreateEx node, move it back to the top
1434 for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1435 Block *sb = block->_succs[i4];
1436 uint new_cnt = end - beg;
1437 // Remove any newly created, but dead, nodes by traversing their schedule
1438 // backwards. Here, a dead node is a node whose only outputs (if any) are
1439 // unused projections.
1440 for (uint j = new_cnt; j > 0; j--) {
1441 Node *n = sb->get_node(j);
1442 // Individual projections are examined together with all siblings when
1443 // their parent is visited.
1444 if (n->is_Proj()) {
1445 continue;
1446 }
1447 bool dead = true;
1448 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1449 Node* out = n->fast_out(i);
1450 // n is live if it has a non-projection output or a used projection.
1451 if (!out->is_Proj() || out->outcnt() > 0) {
1452 dead = false;
1453 break;
1454 }
1455 }
1456 if (dead) {
1457 // n's only outputs (if any) are unused projections scheduled next to n
1458 // (see PhaseCFG::select()). Remove these projections backwards.
1459 for (uint k = j + n->outcnt(); k > j; k--) {
1460 Node* proj = sb->get_node(k);
1461 assert(proj->is_Proj() && proj->in(0) == n,
1462 "projection should correspond to dead node");
1463 proj->disconnect_inputs(C);
1464 sb->remove_node(k);
1465 new_cnt--;
1466 }
1467 // Now remove the node itself.
1468 n->disconnect_inputs(C);
1469 sb->remove_node(j);
1470 new_cnt--;
1471 }
1472 }
1473 // If any newly created nodes remain, move the CreateEx node to the top
1474 if (new_cnt > 0) {
1475 Node *cex = sb->get_node(1+new_cnt);
1476 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1477 sb->remove_node(1+new_cnt);
1478 sb->insert_node(cex, 1);
1479 }
1480 }
1481 }
1482 }