1 /*
  2  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "gc/shared/collectedHeap.hpp"
 27 #include "memory/universe.hpp"
 28 #include "oops/compressedOops.hpp"
 29 #include "opto/machnode.hpp"
 30 #include "opto/output.hpp"
 31 #include "opto/regalloc.hpp"
 32 #include "utilities/vmError.hpp"
 33 
 34 //=============================================================================
 35 // Return the value requested
 36 // result register lookup, corresponding to int_format
 37 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {
 38   return (int)ra_->get_encode(node);
 39 }
 40 // input register lookup, corresponding to ext_format
 41 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 42   return (int)(ra_->get_encode(node->in(idx)));
 43 }
 44 intptr_t  MachOper::constant() const { return 0x00; }
 45 relocInfo::relocType MachOper::constant_reloc() const { return relocInfo::none; }
 46 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }
 47 jfloat  MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }
 48 jlong   MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }
 49 TypeOopPtr *MachOper::oop() const { return NULL; }
 50 int MachOper::ccode() const { return 0x00; }
 51 // A zero, default, indicates this value is not needed.
 52 // May need to lookup the base register, as done in int_ and ext_format
 53 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
 54 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
 55 int MachOper::scale()  const { return 0x00; }
 56 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx)  const { return 0x00; }
 57 int MachOper::constant_disp()  const { return 0; }
 58 int MachOper::base_position()  const { return -1; }  // no base input
 59 int MachOper::index_position() const { return -1; }  // no index input
 60 // Check for PC-Relative displacement
 61 relocInfo::relocType MachOper::disp_reloc() const { return relocInfo::none; }
 62 // Return the label
 63 Label*   MachOper::label()  const { ShouldNotReachHere(); return 0; }
 64 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }
 65 
 66 
 67 //------------------------------negate-----------------------------------------
 68 // Negate conditional branches.  Error for non-branch operands
 69 void MachOper::negate() {
 70   ShouldNotCallThis();
 71 }
 72 
 73 //-----------------------------type--------------------------------------------
 74 const Type *MachOper::type() const {
 75   return Type::BOTTOM;
 76 }
 77 
 78 //------------------------------in_RegMask-------------------------------------
 79 const RegMask *MachOper::in_RegMask(int index) const {
 80   ShouldNotReachHere();
 81   return NULL;
 82 }
 83 
 84 //------------------------------dump_spec--------------------------------------
 85 // Print any per-operand special info
 86 #ifndef PRODUCT
 87 void MachOper::dump_spec(outputStream *st) const { }
 88 #endif
 89 
 90 //------------------------------hash-------------------------------------------
 91 // Print any per-operand special info
 92 uint MachOper::hash() const {
 93   ShouldNotCallThis();
 94   return 5;
 95 }
 96 
 97 //------------------------------cmp--------------------------------------------
 98 // Print any per-operand special info
 99 bool MachOper::cmp( const MachOper &oper ) const {
100   ShouldNotCallThis();
101   return opcode() == oper.opcode();
102 }
103 
104 //------------------------------hash-------------------------------------------
105 // Print any per-operand special info
106 uint labelOper::hash() const {
107   return _block_num;
108 }
109 
110 //------------------------------cmp--------------------------------------------
111 // Print any per-operand special info
112 bool labelOper::cmp( const MachOper &oper ) const {
113   return (opcode() == oper.opcode()) && (_label == oper.label());
114 }
115 
116 //------------------------------hash-------------------------------------------
117 // Print any per-operand special info
118 uint methodOper::hash() const {
119   return (uint)_method;
120 }
121 
122 //------------------------------cmp--------------------------------------------
123 // Print any per-operand special info
124 bool methodOper::cmp( const MachOper &oper ) const {
125   return (opcode() == oper.opcode()) && (_method == oper.method());
126 }
127 
128 
129 //=============================================================================
130 //------------------------------MachNode---------------------------------------
131 
132 //------------------------------emit-------------------------------------------
133 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
134   #ifdef ASSERT
135   tty->print("missing MachNode emit function: ");
136   dump();
137   #endif
138   ShouldNotCallThis();
139 }
140 
141 //---------------------------postalloc_expand----------------------------------
142 // Expand node after register allocation.
143 void MachNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {}
144 
145 //------------------------------size-------------------------------------------
146 // Size of instruction in bytes
147 uint MachNode::size(PhaseRegAlloc *ra_) const {
148   // If a virtual was not defined for this specific instruction,
149   // Call the helper which finds the size by emitting the bits.
150   return MachNode::emit_size(ra_);
151 }
152 
153 //------------------------------size-------------------------------------------
154 // Helper function that computes size by emitting code
155 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {
156   // Emit into a trash buffer and count bytes emitted.
157   assert(ra_ == ra_->C->regalloc(), "sanity");
158   return ra_->C->output()->scratch_emit_size(this);
159 }
160 
161 
162 
163 //------------------------------hash-------------------------------------------
164 uint MachNode::hash() const {
165   uint no = num_opnds();
166   uint sum = rule();
167   for( uint i=0; i<no; i++ )
168     sum += _opnds[i]->hash();
169   return sum+Node::hash();
170 }
171 
172 //-----------------------------cmp---------------------------------------------
173 bool MachNode::cmp( const Node &node ) const {
174   MachNode& n = *((Node&)node).as_Mach();
175   uint no = num_opnds();
176   if( no != n.num_opnds() ) return false;
177   if( rule() != n.rule() ) return false;
178   for( uint i=0; i<no; i++ )    // All operands must match
179     if( !_opnds[i]->cmp( *n._opnds[i] ) )
180       return false;             // mis-matched operands
181   return true;                  // match
182 }
183 
184 // Return an equivalent instruction using memory for cisc_operand position
185 MachNode *MachNode::cisc_version(int offset) {
186   ShouldNotCallThis();
187   return NULL;
188 }
189 
190 void MachNode::use_cisc_RegMask() {
191   ShouldNotReachHere();
192 }
193 
194 
195 //-----------------------------in_RegMask--------------------------------------
196 const RegMask &MachNode::in_RegMask( uint idx ) const {
197   uint numopnds = num_opnds();        // Virtual call for number of operands
198   uint skipped   = oper_input_base(); // Sum of leaves skipped so far
199   if( idx < skipped ) {
200     assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );
201     assert( idx == 1, "expected base ptr here" );
202     // debug info can be anywhere
203     return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];
204   }
205   uint opcnt     = 1;                 // First operand
206   uint num_edges = _opnds[1]->num_edges(); // leaves for first operand
207   while( idx >= skipped+num_edges ) {
208     skipped += num_edges;
209     opcnt++;                          // Bump operand count
210     assert( opcnt < numopnds, "Accessing non-existent operand" );
211     num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand
212   }
213 
214   const RegMask *rm = cisc_RegMask();
215   if( rm == NULL || (int)opcnt != cisc_operand() ) {
216     rm = _opnds[opcnt]->in_RegMask(idx-skipped);
217   }
218   return *rm;
219 }
220 
221 //-----------------------------memory_inputs--------------------------------
222 const MachOper*  MachNode::memory_inputs(Node* &base, Node* &index) const {
223   const MachOper* oper = memory_operand();
224 
225   if (oper == (MachOper*)-1) {
226     base = NodeSentinel;
227     index = NodeSentinel;
228   } else {
229     base = NULL;
230     index = NULL;
231     if (oper != NULL) {
232       // It has a unique memory operand.  Find its index.
233       int oper_idx = num_opnds();
234       while (--oper_idx >= 0) {
235         if (_opnds[oper_idx] == oper)  break;
236       }
237       int oper_pos = operand_index(oper_idx);
238       int base_pos = oper->base_position();
239       if (base_pos >= 0) {
240         base = _in[oper_pos+base_pos];
241       }
242       int index_pos = oper->index_position();
243       if (index_pos >= 0) {
244         index = _in[oper_pos+index_pos];
245       }
246     }
247   }
248 
249   return oper;
250 }
251 
252 //-----------------------------get_base_and_disp----------------------------
253 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {
254 
255   // Find the memory inputs using our helper function
256   Node* base;
257   Node* index;
258   const MachOper* oper = memory_inputs(base, index);
259 
260   if (oper == NULL) {
261     // Base has been set to NULL
262     offset = 0;
263   } else if (oper == (MachOper*)-1) {
264     // Base has been set to NodeSentinel
265     // There is not a unique memory use here.  We will fall to AliasIdxBot.
266     offset = Type::OffsetBot;
267   } else {
268     // Base may be NULL, even if offset turns out to be != 0
269 
270     intptr_t disp = oper->constant_disp();
271     int scale = oper->scale();
272     // Now we have collected every part of the ADLC MEMORY_INTER.
273     // See if it adds up to a base + offset.
274     if (index != NULL) {
275       const Type* t_index = index->bottom_type();
276       if (t_index->isa_narrowoop() || t_index->isa_narrowklass()) { // EncodeN, LoadN, LoadConN, LoadNKlass,
277                                                                     // EncodeNKlass, LoadConNklass.
278         // Memory references through narrow oops have a
279         // funny base so grab the type from the index:
280         // [R12 + narrow_oop_reg<<3 + offset]
281         assert(base == NULL, "Memory references through narrow oops have no base");
282         offset = disp;
283         adr_type = t_index->make_ptr()->add_offset(offset);
284         return NULL;
285       } else if (!index->is_Con()) {
286         disp = Type::OffsetBot;
287       } else if (disp != Type::OffsetBot) {
288         const TypeX* ti = t_index->isa_intptr_t();
289         if (ti == NULL) {
290           disp = Type::OffsetBot;  // a random constant??
291         } else {
292           disp += ti->get_con() << scale;
293         }
294       }
295     }
296     offset = disp;
297 
298     // In x86_32.ad, indOffset32X uses base==RegI and disp==RegP,
299     // this will prevent alias analysis without the following support:
300     // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,
301     // Add the offset determined by the "base", or use Type::OffsetBot.
302     if( adr_type == TYPE_PTR_SENTINAL ) {
303       const TypePtr *t_disp = oper->disp_as_type();  // only !NULL for indOffset32X
304       if (t_disp != NULL) {
305         offset = Type::OffsetBot;
306         const Type* t_base = base->bottom_type();
307         if (t_base->isa_intptr_t()) {
308           const TypeX *t_offset = t_base->is_intptr_t();
309           if( t_offset->is_con() ) {
310             offset = t_offset->get_con();
311           }
312         }
313         adr_type = t_disp->add_offset(offset);
314       } else if( base == NULL && offset != 0 && offset != Type::OffsetBot ) {
315         // Use ideal type if it is oop ptr.
316         const TypePtr *tp = oper->type()->isa_ptr();
317         if( tp != NULL) {
318           adr_type = tp;
319         }
320       }
321     }
322 
323   }
324   return base;
325 }
326 
327 
328 //---------------------------------adr_type---------------------------------
329 const class TypePtr *MachNode::adr_type() const {
330   intptr_t offset = 0;
331   const TypePtr *adr_type = TYPE_PTR_SENTINAL;  // attempt computing adr_type
332   const Node *base = get_base_and_disp(offset, adr_type);
333   if( adr_type != TYPE_PTR_SENTINAL ) {
334     return adr_type;      // get_base_and_disp has the answer
335   }
336 
337   // Direct addressing modes have no base node, simply an indirect
338   // offset, which is always to raw memory.
339   // %%%%% Someday we'd like to allow constant oop offsets which
340   // would let Intel load from static globals in 1 instruction.
341   // Currently Intel requires 2 instructions and a register temp.
342   if (base == NULL) {
343     // NULL base, zero offset means no memory at all (a null pointer!)
344     if (offset == 0) {
345       return NULL;
346     }
347     // NULL base, any offset means any pointer whatever
348     if (offset == Type::OffsetBot) {
349       return TypePtr::BOTTOM;
350     }
351     // %%% make offset be intptr_t
352     assert(!Universe::heap()->is_in(cast_to_oop(offset)), "must be a raw ptr");
353     return TypeRawPtr::BOTTOM;
354   }
355 
356   // base of -1 with no particular offset means all of memory
357   if (base == NodeSentinel)  return TypePtr::BOTTOM;
358 
359   const Type* t = base->bottom_type();
360   if (t->isa_narrowoop() && CompressedOops::shift() == 0) {
361     // 32-bit unscaled narrow oop can be the base of any address expression
362     t = t->make_ptr();
363   }
364   if (t->isa_narrowklass() && CompressedKlassPointers::shift() == 0) {
365     // 32-bit unscaled narrow oop can be the base of any address expression
366     t = t->make_ptr();
367   }
368   if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
369     // We cannot assert that the offset does not look oop-ish here.
370     // Depending on the heap layout the cardmark base could land
371     // inside some oopish region.  It definitely does for Win2K.
372     // The sum of cardmark-base plus shift-by-9-oop lands outside
373     // the oop-ish area but we can't assert for that statically.
374     return TypeRawPtr::BOTTOM;
375   }
376 
377   const TypePtr *tp = t->isa_ptr();
378 
379   // be conservative if we do not recognize the type
380   if (tp == NULL) {
381     assert(false, "this path may produce not optimal code");
382     return TypePtr::BOTTOM;
383   }
384   assert(tp->base() != Type::AnyPtr, "not a bare pointer");
385 
386   return tp->add_offset(offset);
387 }
388 
389 
390 //-----------------------------operand_index---------------------------------
391 int MachNode::operand_index(uint operand) const {
392   if (operand < 1)  return -1;
393   assert(operand < num_opnds(), "oob");
394   if (_opnds[operand]->num_edges() == 0)  return -1;
395 
396   uint skipped   = oper_input_base(); // Sum of leaves skipped so far
397   for (uint opcnt = 1; opcnt < operand; opcnt++) {
398     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
399     skipped += num_edges;
400   }
401   return skipped;
402 }
403 
404 int MachNode::operand_index(const MachOper *oper) const {
405   uint skipped = oper_input_base(); // Sum of leaves skipped so far
406   uint opcnt;
407   for (opcnt = 1; opcnt < num_opnds(); opcnt++) {
408     if (_opnds[opcnt] == oper) break;
409     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
410     skipped += num_edges;
411   }
412   if (_opnds[opcnt] != oper) return -1;
413   return skipped;
414 }
415 
416 int MachNode::operand_index(Node* def) const {
417   uint skipped = oper_input_base(); // Sum of leaves skipped so far
418   for (uint opcnt = 1; opcnt < num_opnds(); opcnt++) {
419     uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
420     for (uint i = 0; i < num_edges; i++) {
421       if (in(skipped + i) == def) {
422         return opcnt;
423       }
424     }
425     skipped += num_edges;
426   }
427   return -1;
428 }
429 
430 //------------------------------peephole---------------------------------------
431 // Apply peephole rule(s) to this instruction
432 MachNode *MachNode::peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted) {
433   return NULL;
434 }
435 
436 //------------------------------add_case_label---------------------------------
437 // Adds the label for the case
438 void MachNode::add_case_label( int index_num, Label* blockLabel) {
439   ShouldNotCallThis();
440 }
441 
442 //------------------------------method_set-------------------------------------
443 // Set the absolute address of a method
444 void MachNode::method_set( intptr_t addr ) {
445   ShouldNotCallThis();
446 }
447 
448 //------------------------------rematerialize----------------------------------
449 bool MachNode::rematerialize() const {
450   // Temps are always rematerializable
451   if (is_MachTemp()) return true;
452 
453   uint r = rule();              // Match rule
454   if (r <  Matcher::_begin_rematerialize ||
455       r >= Matcher::_end_rematerialize) {
456     return false;
457   }
458 
459   // For 2-address instructions, the input live range is also the output
460   // live range. Remateralizing does not make progress on the that live range.
461   if (two_adr()) return false;
462 
463   // Check for rematerializing float constants, or not
464   if (!Matcher::rematerialize_float_constants) {
465     int op = ideal_Opcode();
466     if (op == Op_ConF || op == Op_ConD) {
467       return false;
468     }
469   }
470 
471   // Defining flags - can't spill these! Must remateralize.
472   if (ideal_reg() == Op_RegFlags) {
473     return true;
474   }
475 
476   // Stretching lots of inputs - don't do it.
477   if (req() > 2) {
478     return false;
479   }
480 
481   if (req() == 2 && in(1) && in(1)->ideal_reg() == Op_RegFlags) {
482     // In(1) will be rematerialized, too.
483     // Stretching lots of inputs - don't do it.
484     if (in(1)->req() > 2) {
485       return false;
486     }
487   }
488 
489   // Don't remateralize somebody with bound inputs - it stretches a
490   // fixed register lifetime.
491   uint idx = oper_input_base();
492   if (req() > idx) {
493     const RegMask &rm = in_RegMask(idx);
494     if (rm.is_bound(ideal_reg())) {
495       return false;
496     }
497   }
498 
499   return true;
500 }
501 
502 #ifndef PRODUCT
503 //------------------------------dump_spec--------------------------------------
504 // Print any per-operand special info
505 void MachNode::dump_spec(outputStream *st) const {
506   uint cnt = num_opnds();
507   for( uint i=0; i<cnt; i++ ) {
508     if (_opnds[i] != NULL) {
509       _opnds[i]->dump_spec(st);
510     } else {
511       st->print(" _");
512     }
513   }
514   const TypePtr *t = adr_type();
515   if( t ) {
516     Compile* C = Compile::current();
517     if( C->alias_type(t)->is_volatile() )
518       st->print(" Volatile!");
519   }
520 }
521 
522 //------------------------------dump_format------------------------------------
523 // access to virtual
524 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {
525   format(ra, st); // access to virtual
526 }
527 #endif
528 
529 //=============================================================================
530 #ifndef PRODUCT
531 void MachTypeNode::dump_spec(outputStream *st) const {
532   if (_bottom_type != NULL) {
533     _bottom_type->dump_on(st);
534   } else {
535     st->print(" NULL");
536   }
537 }
538 #endif
539 
540 
541 //=============================================================================
542 int MachConstantNode::constant_offset() {
543   // Bind the offset lazily.
544   if (_constant.offset() == -1) {
545     ConstantTable& constant_table = Compile::current()->output()->constant_table();
546     int offset = constant_table.find_offset(_constant);
547     // If called from Compile::scratch_emit_size return the
548     // pre-calculated offset.
549     // NOTE: If the AD file does some table base offset optimizations
550     // later the AD file needs to take care of this fact.
551     if (Compile::current()->output()->in_scratch_emit_size()) {
552       return constant_table.calculate_table_base_offset() + offset;
553     }
554     _constant.set_offset(constant_table.table_base_offset() + offset);
555   }
556   return _constant.offset();
557 }
558 
559 int MachConstantNode::constant_offset_unchecked() const {
560   return _constant.offset();
561 }
562 
563 //=============================================================================
564 #ifndef PRODUCT
565 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
566   int reg = ra_->get_reg_first(in(1)->in(_vidx));
567   st->print("%s %s", Name(), Matcher::regName[reg]);
568 }
569 #endif
570 
571 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
572   // only emits entries in the null-pointer exception handler table
573 }
574 void MachNullCheckNode::label_set(Label* label, uint block_num) {
575   // Nothing to emit
576 }
577 void MachNullCheckNode::save_label( Label** label, uint* block_num ) {
578   // Nothing to emit
579 }
580 
581 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {
582   if( idx == 0 ) return RegMask::Empty;
583   else return in(1)->as_Mach()->out_RegMask();
584 }
585 
586 //=============================================================================
587 const Type *MachProjNode::bottom_type() const {
588   if( _ideal_reg == fat_proj ) return Type::BOTTOM;
589   // Try the normal mechanism first
590   const Type *t = in(0)->bottom_type();
591   if( t->base() == Type::Tuple ) {
592     const TypeTuple *tt = t->is_tuple();
593     if (_con < tt->cnt())
594       return tt->field_at(_con);
595   }
596   // Else use generic type from ideal register set
597   assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");
598   return Type::mreg2type[_ideal_reg];
599 }
600 
601 const TypePtr *MachProjNode::adr_type() const {
602   if (bottom_type() == Type::MEMORY) {
603     // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM
604     Node* ctrl = in(0);
605     if (ctrl == NULL)  return NULL; // node is dead
606     const TypePtr* adr_type = ctrl->adr_type();
607     #ifdef ASSERT
608     if (!VMError::is_error_reported() && !Node::in_dump())
609       assert(adr_type != NULL, "source must have adr_type");
610     #endif
611     return adr_type;
612   }
613   assert(bottom_type()->base() != Type::Memory, "no other memories?");
614   return NULL;
615 }
616 
617 #ifndef PRODUCT
618 void MachProjNode::dump_spec(outputStream *st) const {
619   ProjNode::dump_spec(st);
620   switch (_ideal_reg) {
621   case unmatched_proj:  st->print("/unmatched");                           break;
622   case fat_proj:        st->print("/fat"); if (WizardMode) _rout.dump(st); break;
623   }
624 }
625 #endif
626 
627 //=============================================================================
628 #ifndef PRODUCT
629 void MachIfNode::dump_spec(outputStream *st) const {
630   st->print("P=%f, C=%f",_prob, _fcnt);
631 }
632 #endif
633 
634 //=============================================================================
635 uint MachReturnNode::size_of() const { return sizeof(*this); }
636 
637 //------------------------------Registers--------------------------------------
638 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {
639   return _in_rms[idx];
640 }
641 
642 const TypePtr *MachReturnNode::adr_type() const {
643   // most returns and calls are assumed to consume & modify all of memory
644   // the matcher will copy non-wide adr_types from ideal originals
645   return _adr_type;
646 }
647 
648 //=============================================================================
649 const Type *MachSafePointNode::bottom_type() const {  return TypeTuple::MEMBAR; }
650 
651 //------------------------------Registers--------------------------------------
652 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {
653   // Values in the domain use the users calling convention, embodied in the
654   // _in_rms array of RegMasks.
655   if( idx < TypeFunc::Parms ) return _in_rms[idx];
656 
657   if (idx == TypeFunc::Parms &&
658       ideal_Opcode() == Op_SafePoint) {
659     return MachNode::in_RegMask(idx);
660   }
661 
662   // Values outside the domain represent debug info
663   assert(in(idx)->ideal_reg() != Op_RegFlags, "flags register is not spillable");
664   return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
665 }
666 
667 
668 //=============================================================================
669 
670 bool MachCallNode::cmp( const Node &n ) const
671 { return _tf == ((MachCallNode&)n)._tf; }
672 const Type *MachCallNode::bottom_type() const { return tf()->range(); }
673 const Type* MachCallNode::Value(PhaseGVN* phase) const { return tf()->range(); }
674 
675 #ifndef PRODUCT
676 void MachCallNode::dump_spec(outputStream *st) const {
677   st->print("# ");
678   if (tf() != NULL)  tf()->dump_on(st);
679   if (_cnt != COUNT_UNKNOWN)  st->print(" C=%f",_cnt);
680   if (jvms() != NULL)  jvms()->dump_spec(st);
681 }
682 #endif
683 
684 #ifndef _LP64
685 bool MachCallNode::return_value_is_used() const {
686   if (tf()->range()->cnt() == TypeFunc::Parms) {
687     // void return
688     return false;
689   }
690 
691   // find the projection corresponding to the return value
692   for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
693     Node *use = fast_out(i);
694     if (!use->is_Proj()) continue;
695     if (use->as_Proj()->_con == TypeFunc::Parms) {
696       return true;
697     }
698   }
699   return false;
700 }
701 #endif
702 
703 // Similar to cousin class CallNode::returns_pointer
704 // Because this is used in deoptimization, we want the type info, not the data
705 // flow info; the interpreter will "use" things that are dead to the optimizer.
706 bool MachCallNode::returns_pointer() const {
707   const TypeTuple *r = tf()->range();
708   return (r->cnt() > TypeFunc::Parms &&
709           r->field_at(TypeFunc::Parms)->isa_ptr());
710 }
711 
712 //------------------------------Registers--------------------------------------
713 const RegMask &MachCallNode::in_RegMask(uint idx) const {
714   // Values in the domain use the users calling convention, embodied in the
715   // _in_rms array of RegMasks.
716   if (idx < tf()->domain()->cnt()) {
717     return _in_rms[idx];
718   }
719   if (idx == mach_constant_base_node_input()) {
720     return MachConstantBaseNode::static_out_RegMask();
721   }
722   // Values outside the domain represent debug info
723   return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];
724 }
725 
726 //=============================================================================
727 uint MachCallJavaNode::size_of() const { return sizeof(*this); }
728 bool MachCallJavaNode::cmp( const Node &n ) const {
729   MachCallJavaNode &call = (MachCallJavaNode&)n;
730   return MachCallNode::cmp(call) && _method->equals(call._method) &&
731          _override_symbolic_info == call._override_symbolic_info;
732 }
733 #ifndef PRODUCT
734 void MachCallJavaNode::dump_spec(outputStream *st) const {
735   if (_method_handle_invoke)
736     st->print("MethodHandle ");
737   if (_method) {
738     _method->print_short_name(st);
739     st->print(" ");
740   }
741   MachCallNode::dump_spec(st);
742 }
743 #endif
744 
745 //------------------------------Registers--------------------------------------
746 const RegMask &MachCallJavaNode::in_RegMask(uint idx) const {
747   // Values in the domain use the users calling convention, embodied in the
748   // _in_rms array of RegMasks.
749   if (idx < tf()->domain()->cnt()) {
750     return _in_rms[idx];
751   }
752   if (idx == mach_constant_base_node_input()) {
753     return MachConstantBaseNode::static_out_RegMask();
754   }
755   // Values outside the domain represent debug info
756   Matcher* m = Compile::current()->matcher();
757   // If this call is a MethodHandle invoke we have to use a different
758   // debugmask which does not include the register we use to save the
759   // SP over MH invokes.
760   RegMask** debugmask = _method_handle_invoke ? m->idealreg2mhdebugmask : m->idealreg2debugmask;
761   return *debugmask[in(idx)->ideal_reg()];
762 }
763 
764 //=============================================================================
765 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }
766 bool MachCallStaticJavaNode::cmp( const Node &n ) const {
767   MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;
768   return MachCallJavaNode::cmp(call) && _name == call._name;
769 }
770 
771 //----------------------------uncommon_trap_request----------------------------
772 // If this is an uncommon trap, return the request code, else zero.
773 int MachCallStaticJavaNode::uncommon_trap_request() const {
774   if (_name != NULL && !strcmp(_name, "uncommon_trap")) {
775     return CallStaticJavaNode::extract_uncommon_trap_request(this);
776   }
777   return 0;
778 }
779 
780 #ifndef PRODUCT
781 // Helper for summarizing uncommon_trap arguments.
782 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {
783   int trap_req = uncommon_trap_request();
784   if (trap_req != 0) {
785     char buf[100];
786     st->print("(%s)",
787                Deoptimization::format_trap_request(buf, sizeof(buf),
788                                                    trap_req));
789   }
790 }
791 
792 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {
793   st->print("Static ");
794   if (_name != NULL) {
795     st->print("wrapper for: %s", _name );
796     dump_trap_args(st);
797     st->print(" ");
798   }
799   MachCallJavaNode::dump_spec(st);
800 }
801 #endif
802 
803 //=============================================================================
804 #ifndef PRODUCT
805 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {
806   st->print("Dynamic ");
807   MachCallJavaNode::dump_spec(st);
808 }
809 #endif
810 //=============================================================================
811 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }
812 bool MachCallRuntimeNode::cmp( const Node &n ) const {
813   MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;
814   return MachCallNode::cmp(call) && !strcmp(_name,call._name);
815 }
816 #ifndef PRODUCT
817 void MachCallRuntimeNode::dump_spec(outputStream *st) const {
818   st->print("%s ",_name);
819   MachCallNode::dump_spec(st);
820 }
821 #endif
822 //=============================================================================
823 uint MachCallNativeNode::size_of() const { return sizeof(*this); }
824 bool MachCallNativeNode::cmp( const Node &n ) const {
825   MachCallNativeNode &call = (MachCallNativeNode&)n;
826   return MachCallNode::cmp(call) && !strcmp(_name,call._name)
827     && _arg_regs == call._arg_regs && _ret_regs == call._ret_regs;
828 }
829 #ifndef PRODUCT
830 void MachCallNativeNode::dump_spec(outputStream *st) const {
831   st->print("%s ",_name);
832   st->print("_arg_regs: ");
833   CallNativeNode::print_regs(_arg_regs, st);
834   st->print("_ret_regs: ");
835   CallNativeNode::print_regs(_ret_regs, st);
836   MachCallNode::dump_spec(st);
837 }
838 #endif
839 //=============================================================================
840 // A shared JVMState for all HaltNodes.  Indicates the start of debug info
841 // is at TypeFunc::Parms.  Only required for SOE register spill handling -
842 // to indicate where the stack-slot-only debug info inputs begin.
843 // There is no other JVM state needed here.
844 JVMState jvms_for_throw(0);
845 JVMState *MachHaltNode::jvms() const {
846   return &jvms_for_throw;
847 }
848 
849 uint MachMemBarNode::size_of() const { return sizeof(*this); }
850 
851 const TypePtr *MachMemBarNode::adr_type() const {
852   return _adr_type;
853 }
854 
855 
856 //=============================================================================
857 #ifndef PRODUCT
858 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
859   st->print("B%d", _block_num);
860 }
861 #endif // PRODUCT
862 
863 //=============================================================================
864 #ifndef PRODUCT
865 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
866   st->print(INTPTR_FORMAT, _method);
867 }
868 #endif // PRODUCT