1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
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20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/c2_MacroAssembler.hpp"
29 #include "opto/callnode.hpp"
30 #include "opto/constantTable.hpp"
31 #include "opto/matcher.hpp"
32 #include "opto/multnode.hpp"
33 #include "opto/node.hpp"
34 #include "opto/regmask.hpp"
35 #include "utilities/growableArray.hpp"
36
37 class BufferBlob;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class Matcher;
55 class PhaseRegAlloc;
56 class RegMask;
57 class State;
58
59 //---------------------------MachOper------------------------------------------
60 class MachOper : public ResourceObj {
61 public:
62 // Allocate right next to the MachNodes in the same arena
63 void *operator new(size_t x) throw() {
64 Compile* C = Compile::current();
65 return C->node_arena()->AmallocWords(x);
66 }
67
68 // Opcode
69 virtual uint opcode() const = 0;
70
71 // Number of input edges.
72 // Generally at least 1
73 virtual uint num_edges() const { return 1; }
74 // Array of Register masks
75 virtual const RegMask *in_RegMask(int index) const;
76
77 // Methods to output the encoding of the operand
78
79 // Negate conditional branches. Error for non-branch Nodes
80 virtual void negate();
81
82 // Return the value requested
83 // result register lookup, corresponding to int_format
84 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
85 // input register lookup, corresponding to ext_format
86 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
87
88 // helpers for MacroAssembler generation from ADLC
89 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
90 return ::as_Register(reg(ra_, node));
91 }
92 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
93 return ::as_Register(reg(ra_, node, idx));
94 }
95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
96 return ::as_FloatRegister(reg(ra_, node));
97 }
98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
99 return ::as_FloatRegister(reg(ra_, node, idx));
100 }
101
102 #if defined(IA32) || defined(AMD64)
103 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
104 return ::as_KRegister(reg(ra_, node));
105 }
106 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
107 return ::as_KRegister(reg(ra_, node, idx));
108 }
109 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
110 return ::as_XMMRegister(reg(ra_, node));
111 }
112 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
113 return ::as_XMMRegister(reg(ra_, node, idx));
114 }
115 #endif
116 // CondRegister reg converter
117 #if defined(PPC64)
118 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
119 return ::as_ConditionRegister(reg(ra_, node));
120 }
121 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
122 return ::as_ConditionRegister(reg(ra_, node, idx));
123 }
124 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
125 return ::as_VectorRegister(reg(ra_, node));
126 }
127 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
128 return ::as_VectorRegister(reg(ra_, node, idx));
129 }
130 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
131 return ::as_VectorSRegister(reg(ra_, node));
132 }
133 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
134 return ::as_VectorSRegister(reg(ra_, node, idx));
135 }
136 #endif
137 #if defined(S390)
138 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
139 return ::as_VectorRegister(reg(ra_, node));
140 }
141 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
142 return ::as_VectorRegister(reg(ra_, node, idx));
143 }
144 #endif
145 #if defined(AARCH64)
146 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
147 return ::as_PRegister(reg(ra_, node));
148 }
149 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
150 return ::as_PRegister(reg(ra_, node, idx));
151 }
152 #endif
153
154 virtual intptr_t constant() const;
155 virtual relocInfo::relocType constant_reloc() const;
156 virtual jdouble constantD() const;
157 virtual jfloat constantF() const;
158 virtual jlong constantL() const;
159 virtual jshort constantH() const;
160 virtual TypeOopPtr *oop() const;
161 virtual int ccode() const;
162 // A zero, default, indicates this value is not needed.
163 // May need to lookup the base register, as done in int_ and ext_format
164 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
165 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
166 virtual int scale() const;
167 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
168 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
169 // Check for PC-Relative displacement
170 virtual relocInfo::relocType disp_reloc() const;
171 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
172 virtual int base_position() const; // base edge position, or -1
173 virtual int index_position() const; // index edge position, or -1
174
175 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
176 // Only returns non-null value for x86_32.ad's indOffset32X
177 virtual const TypePtr *disp_as_type() const { return nullptr; }
178
179 // Return the label
180 virtual Label *label() const;
181
182 // Return the method's address
183 virtual intptr_t method() const;
184
185 // Hash and compare over operands are currently identical
186 virtual uint hash() const;
187 virtual bool cmp( const MachOper &oper ) const;
188
189 // Virtual clone, since I do not know how big the MachOper is.
190 virtual MachOper *clone() const = 0;
191
192 // Return ideal Type from simple operands. Fail for complex operands.
193 virtual const Type *type() const;
194
195 // Set an integer offset if we have one, or error otherwise
196 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
197
198 #ifndef PRODUCT
199 // Return name of operand
200 virtual const char *Name() const { return "???";}
201
202 // Methods to output the text version of the operand
203 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
204 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
205
206 virtual void dump_spec(outputStream *st) const; // Print per-operand info
207
208 // Check whether o is a valid oper.
209 static bool notAnOper(const MachOper *o) {
210 if (o == nullptr) return true;
211 if (((intptr_t)o & 1) != 0) return true;
212 if (*(address*)o == badAddress) return true; // kill by Node::destruct
213 return false;
214 }
215 #endif // !PRODUCT
216 };
217
218 //------------------------------MachNode---------------------------------------
219 // Base type for all machine specific nodes. All node classes generated by the
220 // ADLC inherit from this class.
221 class MachNode : public Node {
222 public:
223 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
224 init_class_id(Class_Mach);
225 }
226 // Required boilerplate
227 virtual uint size_of() const { return sizeof(MachNode); }
228 virtual int Opcode() const; // Always equal to MachNode
229 virtual uint rule() const = 0; // Machine-specific opcode
230 // Number of inputs which come before the first operand.
231 // Generally at least 1, to skip the Control input
232 virtual uint oper_input_base() const { return 1; }
233 // Position of constant base node in node's inputs. -1 if
234 // no constant base node input.
235 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
236
237 uint8_t barrier_data() const { return _barrier; }
238 void set_barrier_data(uint8_t data) { _barrier = data; }
239
240 // Copy index, inputs, and operands to a new version of the instruction.
241 // Called from cisc_version() and short_branch_version().
242 void fill_new_machnode(MachNode *n) const;
243
244 // Return an equivalent instruction using memory for cisc_operand position
245 virtual MachNode *cisc_version(int offset);
246 // Modify this instruction's register mask to use stack version for cisc_operand
247 virtual void use_cisc_RegMask();
248
249 // Support for short branches
250 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
251
252 // Avoid back to back some instructions on some CPUs.
253 enum AvoidBackToBackFlag { AVOID_NONE = 0,
254 AVOID_BEFORE = Flag_avoid_back_to_back_before,
255 AVOID_AFTER = Flag_avoid_back_to_back_after,
256 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
257
258 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
259 return (flags() & flag_value) == flag_value;
260 }
261
262 // instruction implemented with a call
263 bool has_call() const { return (flags() & Flag_has_call) != 0; }
264
265 // First index in _in[] corresponding to operand, or -1 if there is none
266 int operand_index(uint operand) const;
267 int operand_index(const MachOper *oper) const;
268 int operand_index(Node* m) const;
269
270 // Register class input is expected in
271 virtual const RegMask &in_RegMask(uint) const;
272
273 // cisc-spillable instructions redefine for use by in_RegMask
274 virtual const RegMask *cisc_RegMask() const { return nullptr; }
275
276 // If this instruction is a 2-address instruction, then return the
277 // index of the input which must match the output. Not necessary
278 // for instructions which bind the input and output register to the
279 // same singleton register (e.g., Intel IDIV which binds AX to be
280 // both an input and an output). It is necessary when the input and
281 // output have choices - but they must use the same choice.
282 virtual uint two_adr( ) const { return 0; }
283
284 // The GC might require some barrier metadata for machine code emission.
285 uint8_t _barrier;
286
287 // Array of complex operand pointers. Each corresponds to zero or
288 // more leafs. Must be set by MachNode constructor to point to an
289 // internal array of MachOpers. The MachOper array is sized by
290 // specific MachNodes described in the ADL.
291 uint16_t _num_opnds;
292 MachOper **_opnds;
293 uint16_t num_opnds() const { return _num_opnds; }
294
295 // Emit bytes using C2_MacroAssembler
296 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
297 // Expand node after register allocation.
298 // Node is replaced by several nodes in the postalloc expand phase.
299 // Corresponding methods are generated for nodes if they specify
300 // postalloc_expand. See block.cpp for more documentation.
301 virtual bool requires_postalloc_expand() const { return false; }
302 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
303 // Size of instruction in bytes
304 virtual uint size(PhaseRegAlloc *ra_) const;
305 // Helper function that computes size by emitting code
306 virtual uint emit_size(PhaseRegAlloc *ra_) const;
307
308 // Return the alignment required (in units of relocInfo::addr_unit())
309 // for this instruction (must be a power of 2)
310 int pd_alignment_required() const;
311 virtual int alignment_required() const { return pd_alignment_required(); }
312
313 // Return the padding (in bytes) to be emitted before this
314 // instruction to properly align it.
315 virtual int compute_padding(int current_offset) const;
316
317 // Return number of relocatable values contained in this instruction
318 virtual int reloc() const { return 0; }
319
320 // Return number of words used for double constants in this instruction
321 virtual int ins_num_consts() const { return 0; }
322
323 // Hash and compare over operands. Used to do GVN on machine Nodes.
324 virtual uint hash() const;
325 virtual bool cmp( const Node &n ) const;
326
327 // Expand method for MachNode, replaces nodes representing pseudo
328 // instructions with a set of nodes which represent real machine
329 // instructions and compute the same value.
330 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
331
332 // Bottom_type call; value comes from operand0
333 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
334 virtual uint ideal_reg() const {
335 const Type *t = _opnds[0]->type();
336 if (t == TypeInt::CC) {
337 return Op_RegFlags;
338 } else {
339 return t->ideal_reg();
340 }
341 }
342
343 // If this is a memory op, return the base pointer and fixed offset.
344 // If there are no such, return null. If there are multiple addresses
345 // or the address is indeterminate (rare cases) then return (Node*)-1,
346 // which serves as node bottom.
347 // If the offset is not statically determined, set it to Type::OffsetBot.
348 // This method is free to ignore stack slots if that helps.
349 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
350 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
351 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
352
353 // Helper for get_base_and_disp: find the base and index input nodes.
354 // Returns the MachOper as determined by memory_operand(), for use, if
355 // needed by the caller. If (MachOper *)-1 is returned, base and index
356 // are set to NodeSentinel. If null is returned, base and
357 // index are set to null.
358 const MachOper* memory_inputs(Node* &base, Node* &index) const;
359
360 // Helper for memory_inputs: Which operand carries the necessary info?
361 // By default, returns null, which means there is no such operand.
362 // If it returns (MachOper*)-1, this means there are multiple memories.
363 virtual const MachOper* memory_operand() const { return nullptr; }
364
365 // Call "get_base_and_disp" to decide which category of memory is used here.
366 virtual const class TypePtr *adr_type() const;
367
368 // Apply peephole rule(s) to this instruction
369 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
370
371 // Top-level ideal Opcode matched
372 virtual int ideal_Opcode() const { return Op_Node; }
373
374 // Adds the label for the case
375 virtual void add_case_label( int switch_val, Label* blockLabel);
376
377 // Set the absolute address for methods
378 virtual void method_set( intptr_t addr );
379
380 // Should we clone rather than spill this instruction?
381 bool rematerialize() const;
382
383 // Get the pipeline info
384 static const Pipeline *pipeline_class();
385 virtual const Pipeline *pipeline() const;
386
387 // Returns true if this node is a check that can be implemented with a trap.
388 virtual bool is_TrapBasedCheckNode() const { return false; }
389
390 // Whether this node is expanded during code emission into a sequence of
391 // instructions and the first instruction can perform an implicit null check.
392 virtual bool is_late_expanded_null_check_candidate() const {
393 return false;
394 }
395
396 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
397 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
398
399 #ifndef PRODUCT
400 virtual const char *Name() const = 0; // Machine-specific name
401 virtual void dump_spec(outputStream *st) const; // Print per-node info
402 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
403 #endif
404 };
405
406 //------------------------------MachIdealNode----------------------------
407 // Machine specific versions of nodes that must be defined by user.
408 // These are not converted by matcher from ideal nodes to machine nodes
409 // but are inserted into the code by the compiler.
410 class MachIdealNode : public MachNode {
411 public:
412 MachIdealNode( ) {}
413
414 // Define the following defaults for non-matched machine nodes
415 virtual uint oper_input_base() const { return 0; }
416 virtual uint rule() const { return 9999999; }
417 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
418 };
419
420 //------------------------------MachTypeNode----------------------------
421 // Machine Nodes that need to retain a known Type.
422 class MachTypeNode : public MachNode {
423 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
424 public:
425 MachTypeNode( ) {}
426 const Type *_bottom_type;
427
428 virtual const class Type *bottom_type() const { return _bottom_type; }
429 #ifndef PRODUCT
430 virtual void dump_spec(outputStream *st) const;
431 #endif
432 };
433
434 //------------------------------MachBreakpointNode----------------------------
435 // Machine breakpoint or interrupt Node
436 class MachBreakpointNode : public MachIdealNode {
437 public:
438 MachBreakpointNode( ) {}
439 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
440 virtual uint size(PhaseRegAlloc *ra_) const;
441
442 #ifndef PRODUCT
443 virtual const char *Name() const { return "Breakpoint"; }
444 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
445 #endif
446 };
447
448 //------------------------------MachConstantBaseNode--------------------------
449 // Machine node that represents the base address of the constant table.
450 class MachConstantBaseNode : public MachIdealNode {
451 public:
452 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
453
454 public:
455 MachConstantBaseNode() : MachIdealNode() {
456 init_class_id(Class_MachConstantBase);
457 }
458 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
459 virtual uint ideal_reg() const { return Op_RegP; }
460 virtual uint oper_input_base() const { return 1; }
461
462 virtual bool requires_postalloc_expand() const;
463 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
464
465 virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
466 virtual uint size(PhaseRegAlloc* ra_) const;
467
468 static const RegMask& static_out_RegMask() { return _out_RegMask; }
469 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
470
471 #ifndef PRODUCT
472 virtual const char* Name() const { return "MachConstantBaseNode"; }
473 virtual void format(PhaseRegAlloc*, outputStream* st) const;
474 #endif
475 };
476
477 //------------------------------MachConstantNode-------------------------------
478 // Machine node that holds a constant which is stored in the constant table.
479 class MachConstantNode : public MachTypeNode {
480 protected:
481 ConstantTable::Constant _constant; // This node's constant.
482
483 public:
484 MachConstantNode() : MachTypeNode() {
485 init_class_id(Class_MachConstant);
486 }
487
488 virtual void eval_constant(Compile* C) {
489 #ifdef ASSERT
490 tty->print("missing MachConstantNode eval_constant function: ");
491 dump();
492 #endif
493 ShouldNotCallThis();
494 }
495
496 virtual const RegMask &in_RegMask(uint idx) const {
497 if (idx == mach_constant_base_node_input())
498 return MachConstantBaseNode::static_out_RegMask();
499 return MachNode::in_RegMask(idx);
500 }
501
502 // Input edge of MachConstantBaseNode.
503 virtual uint mach_constant_base_node_input() const { return req() - 1; }
504
505 int constant_offset();
506 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
507 // Unchecked version to avoid assertions in debug output.
508 int constant_offset_unchecked() const;
509 virtual uint size_of() const { return sizeof(MachConstantNode); }
510 };
511
512 //------------------------------MachUEPNode-----------------------------------
513 // Machine Unvalidated Entry Point Node
514 class MachUEPNode : public MachIdealNode {
515 public:
516 MachUEPNode( ) {}
517 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
518 virtual uint size(PhaseRegAlloc *ra_) const;
519
520 #ifndef PRODUCT
521 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
522 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
523 #endif
524 };
525
526 //------------------------------MachPrologNode--------------------------------
527 // Machine function Prolog Node
528 class MachPrologNode : public MachIdealNode {
529 public:
530 MachPrologNode( ) {}
531 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
532 virtual uint size(PhaseRegAlloc *ra_) const;
533 virtual int reloc() const;
534
535 #ifndef PRODUCT
536 virtual const char *Name() const { return "Prolog"; }
537 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
538 #endif
539 };
540
541 //------------------------------MachEpilogNode--------------------------------
542 // Machine function Epilog Node
543 class MachEpilogNode : public MachIdealNode {
544 private:
545 bool _do_polling;
546 public:
547 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
548 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
549 virtual uint size(PhaseRegAlloc *ra_) const;
550 virtual int reloc() const;
551 virtual const Pipeline *pipeline() const;
552 virtual uint size_of() const { return sizeof(MachEpilogNode); }
553 bool do_polling() const { return _do_polling; }
554
555 #ifndef PRODUCT
556 virtual const char *Name() const { return "Epilog"; }
557 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
558 #endif
559 };
560
561 //------------------------------MachNopNode-----------------------------------
562 // Machine function Nop Node
563 class MachNopNode : public MachIdealNode {
564 private:
565 int _count;
566 public:
567 MachNopNode( ) : _count(1) {}
568 MachNopNode( int count ) : _count(count) {}
569 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
570 virtual uint size(PhaseRegAlloc *ra_) const;
571
572 virtual const class Type *bottom_type() const { return Type::CONTROL; }
573
574 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
575 virtual const Pipeline *pipeline() const;
576 virtual uint size_of() const { return sizeof(MachNopNode); }
577 #ifndef PRODUCT
578 virtual const char *Name() const { return "Nop"; }
579 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
580 virtual void dump_spec(outputStream *st) const { } // No per-operand info
581 #endif
582 };
583
584 //------------------------------MachSpillCopyNode------------------------------
585 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
586 // location (stack or register).
587 class MachSpillCopyNode : public MachIdealNode {
588 public:
589 enum SpillType {
590 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
591 PhiInput, // Inserted when coalescing of a phi node and its input fails
592 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
593 LoopPhiInput, // Pre-split compares of loop-phis
594 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
595 // if in high pressure region or the lrg is bound
596 RegToReg, // A register to register move
597 RegToMem, // A register to memory move
598 MemToReg, // A memory to register move
599 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
600 // the phi and its input resides at different locations (i.e. reg or mem)
601 BasePointerToMem, // Spill base pointer to memory at safepoint
602 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
603 // stretched beyond a new definition point, therefore we split out new copies instead
604 CallUse, // Spill use at a call
605 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
606 };
607 private:
608 const RegMask *_in; // RegMask for input
609 const RegMask *_out; // RegMask for output
610 const Type *_type;
611 const SpillType _spill_type;
612 public:
613 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
614 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
615 init_class_id(Class_MachSpillCopy);
616 init_flags(Flag_is_Copy);
617 add_req(nullptr);
618 add_req(n);
619 }
620 virtual uint size_of() const { return sizeof(*this); }
621 void set_out_RegMask(const RegMask &out) { _out = &out; }
622 void set_in_RegMask(const RegMask &in) { _in = ∈ }
623 virtual const RegMask &out_RegMask() const { return *_out; }
624 virtual const RegMask &in_RegMask(uint) const { return *_in; }
625 virtual const class Type *bottom_type() const { return _type; }
626 virtual uint ideal_reg() const { return _type->ideal_reg(); }
627 virtual uint oper_input_base() const { return 1; }
628 uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
629
630 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
631 virtual uint size(PhaseRegAlloc *ra_) const;
632
633
634 #ifndef PRODUCT
635 static const char *spill_type(SpillType st) {
636 switch (st) {
637 case TwoAddress:
638 return "TwoAddressSpillCopy";
639 case PhiInput:
640 return "PhiInputSpillCopy";
641 case DebugUse:
642 return "DebugUseSpillCopy";
643 case LoopPhiInput:
644 return "LoopPhiInputSpillCopy";
645 case Definition:
646 return "DefinitionSpillCopy";
647 case RegToReg:
648 return "RegToRegSpillCopy";
649 case RegToMem:
650 return "RegToMemSpillCopy";
651 case MemToReg:
652 return "MemToRegSpillCopy";
653 case PhiLocationDifferToInputLocation:
654 return "PhiLocationDifferToInputLocationSpillCopy";
655 case BasePointerToMem:
656 return "BasePointerToMemSpillCopy";
657 case InputToRematerialization:
658 return "InputToRematerializationSpillCopy";
659 case CallUse:
660 return "CallUseSpillCopy";
661 case Bound:
662 return "BoundSpillCopy";
663 default:
664 assert(false, "Must have valid spill type");
665 return "MachSpillCopy";
666 }
667 }
668
669 virtual const char *Name() const {
670 return spill_type(_spill_type);
671 }
672
673 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
674 #endif
675 };
676
677 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
678 // however it doesn't have a control input and is more like a MergeMem.
679 // It is inserted after the register allocation is done to ensure that nodes use single
680 // definition of a multidef lrg in a block.
681 class MachMergeNode : public MachIdealNode {
682 public:
683 MachMergeNode(Node *n1) {
684 init_class_id(Class_MachMerge);
685 add_req(nullptr);
686 add_req(n1);
687 }
688 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
689 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
690 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
691 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
692 virtual uint oper_input_base() const { return 1; }
693 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
694 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
695 #ifndef PRODUCT
696 virtual const char *Name() const { return "MachMerge"; }
697 #endif
698 };
699
700 //------------------------------MachBranchNode--------------------------------
701 // Abstract machine branch Node
702 class MachBranchNode : public MachIdealNode {
703 public:
704 MachBranchNode() : MachIdealNode() {
705 init_class_id(Class_MachBranch);
706 }
707 virtual void label_set(Label* label, uint block_num) = 0;
708 virtual void save_label(Label** label, uint* block_num) = 0;
709
710 // Support for short branches
711 virtual MachNode *short_branch_version() { return nullptr; }
712
713 virtual bool pinned() const { return true; };
714 };
715
716 //------------------------------MachNullChkNode--------------------------------
717 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
718 // also some kind of memory op. Turns the indicated MachNode into a
719 // conditional branch with good latency on the ptr-not-null path and awful
720 // latency on the pointer-is-null path.
721
722 class MachNullCheckNode : public MachBranchNode {
723 public:
724 const uint _vidx; // Index of memop being tested
725 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
726 init_class_id(Class_MachNullCheck);
727 add_req(ctrl);
728 add_req(memop);
729 }
730 virtual int Opcode() const;
731 virtual uint size_of() const { return sizeof(*this); }
732
733 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
734 virtual void label_set(Label* label, uint block_num);
735 virtual void save_label(Label** label, uint* block_num);
736 virtual void negate() { }
737 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
738 virtual uint ideal_reg() const { return NotAMachineReg; }
739 virtual const RegMask &in_RegMask(uint) const;
740 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
741 #ifndef PRODUCT
742 virtual const char *Name() const { return "NullCheck"; }
743 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
744 #endif
745 };
746
747 //------------------------------MachProjNode----------------------------------
748 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
749 // just MachNodes made by the Ideal world that replicate simple projections
750 // but with machine-dependent input & output register masks. Generally
751 // produced as part of calling conventions. Normally I make MachNodes as part
752 // of the Matcher process, but the Matcher is ill suited to issues involving
753 // frame handling, so frame handling is all done in the Ideal world with
754 // occasional callbacks to the machine model for important info.
755 class MachProjNode : public ProjNode {
756 public:
757 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
758 init_class_id(Class_MachProj);
759 }
760 RegMask _rout;
761 const uint _ideal_reg;
762 enum projType {
763 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
764 fat_proj = 999 // Projs killing many regs, defined by _rout
765 };
766 virtual int Opcode() const;
767 virtual const Type *bottom_type() const;
768 virtual const TypePtr *adr_type() const;
769 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
770 virtual const RegMask &out_RegMask() const { return _rout; }
771 virtual uint ideal_reg() const { return _ideal_reg; }
772 // Need size_of() for virtual ProjNode::clone()
773 virtual uint size_of() const { return sizeof(MachProjNode); }
774 #ifndef PRODUCT
775 virtual void dump_spec(outputStream *st) const;
776 #endif
777 };
778
779 //------------------------------MachIfNode-------------------------------------
780 // Machine-specific versions of IfNodes
781 class MachIfNode : public MachBranchNode {
782 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
783 public:
784 float _prob; // Probability branch goes either way
785 float _fcnt; // Frequency counter
786 MachIfNode() : MachBranchNode() {
787 init_class_id(Class_MachIf);
788 }
789 // Negate conditional branches.
790 virtual void negate() = 0;
791 #ifndef PRODUCT
792 virtual void dump_spec(outputStream *st) const;
793 #endif
794 };
795
796 //------------------------------MachJumpNode-----------------------------------
797 // Machine-specific versions of JumpNodes
798 class MachJumpNode : public MachConstantNode {
799 public:
800 float* _probs;
801 MachJumpNode() : MachConstantNode() {
802 init_class_id(Class_MachJump);
803 }
804 virtual uint size_of() const { return sizeof(MachJumpNode); }
805 };
806
807 //------------------------------MachGotoNode-----------------------------------
808 // Machine-specific versions of GotoNodes
809 class MachGotoNode : public MachBranchNode {
810 public:
811 MachGotoNode() : MachBranchNode() {
812 init_class_id(Class_MachGoto);
813 }
814 };
815
816 //------------------------------MachFastLockNode-------------------------------------
817 // Machine-specific versions of FastLockNodes
818 class MachFastLockNode : public MachNode {
819 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
820 public:
821 MachFastLockNode() : MachNode() {}
822 };
823
824 //------------------------------MachReturnNode--------------------------------
825 // Machine-specific versions of subroutine returns
826 class MachReturnNode : public MachNode {
827 virtual uint size_of() const; // Size is bigger
828 public:
829 RegMask *_in_rms; // Input register masks, set during allocation
830 ReallocMark _nesting; // assertion check for reallocations
831 const TypePtr* _adr_type; // memory effects of call or return
832 MachReturnNode() : MachNode() {
833 init_class_id(Class_MachReturn);
834 _adr_type = TypePtr::BOTTOM; // the default: all of memory
835 }
836
837 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
838
839 virtual const RegMask &in_RegMask(uint) const;
840 virtual bool pinned() const { return true; };
841 virtual const TypePtr *adr_type() const;
842 };
843
844 //------------------------------MachSafePointNode-----------------------------
845 // Machine-specific versions of safepoints
846 class MachSafePointNode : public MachReturnNode {
847 public:
848 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
849 JVMState* _jvms; // Pointer to list of JVM State Objects
850 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
851 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
852 OopMap* oop_map() const { return _oop_map; }
853 void set_oop_map(OopMap* om) { _oop_map = om; }
854
855 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
856 init_class_id(Class_MachSafePoint);
857 }
858
859 virtual JVMState* jvms() const { return _jvms; }
860 void set_jvms(JVMState* s) {
861 _jvms = s;
862 }
863 virtual const Type *bottom_type() const;
864
865 virtual const RegMask &in_RegMask(uint) const;
866
867 // Functionality from old debug nodes
868 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
869 Node *frameptr () const { return in(TypeFunc::FramePtr); }
870
871 Node *local(const JVMState* jvms, uint idx) const {
872 assert(verify_jvms(jvms), "jvms must match");
873 return in(_jvmadj + jvms->locoff() + idx);
874 }
875 Node *stack(const JVMState* jvms, uint idx) const {
876 assert(verify_jvms(jvms), "jvms must match");
877 return in(_jvmadj + jvms->stkoff() + idx);
878 }
879 Node *monitor_obj(const JVMState* jvms, uint idx) const {
880 assert(verify_jvms(jvms), "jvms must match");
881 return in(_jvmadj + jvms->monitor_obj_offset(idx));
882 }
883 Node *monitor_box(const JVMState* jvms, uint idx) const {
884 assert(verify_jvms(jvms), "jvms must match");
885 return in(_jvmadj + jvms->monitor_box_offset(idx));
886 }
887 Node* scalarized_obj(const JVMState* jvms, uint idx) const {
888 assert(verify_jvms(jvms), "jvms must match");
889 return in(_jvmadj + jvms->scloff() + idx);
890 }
891 void set_local(const JVMState* jvms, uint idx, Node *c) {
892 assert(verify_jvms(jvms), "jvms must match");
893 set_req(_jvmadj + jvms->locoff() + idx, c);
894 }
895 void set_stack(const JVMState* jvms, uint idx, Node *c) {
896 assert(verify_jvms(jvms), "jvms must match");
897 set_req(_jvmadj + jvms->stkoff() + idx, c);
898 }
899 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
900 assert(verify_jvms(jvms), "jvms must match");
901 set_req(_jvmadj + jvms->monoff() + idx, c);
902 }
903 virtual uint size_of() const { return sizeof(MachSafePointNode); }
904 };
905
906 //------------------------------MachCallNode----------------------------------
907 // Machine-specific versions of subroutine calls
908 class MachCallNode : public MachSafePointNode {
909 protected:
910 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
911 virtual bool cmp( const Node &n ) const;
912 virtual uint size_of() const = 0; // Size is bigger
913 public:
914 const TypeFunc *_tf; // Function type
915 address _entry_point; // Address of the method being called
916 float _cnt; // Estimate of number of times called
917 bool _guaranteed_safepoint; // Do we need to observe safepoint?
918
919 const TypeFunc* tf() const { return _tf; }
920 address entry_point() const { return _entry_point; }
921 float cnt() const { return _cnt; }
922
923 void set_tf(const TypeFunc* tf) { _tf = tf; }
924 void set_entry_point(address p) { _entry_point = p; }
925 void set_cnt(float c) { _cnt = c; }
926 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
927
928 MachCallNode() : MachSafePointNode() {
929 init_class_id(Class_MachCall);
930 }
931
932 virtual const Type *bottom_type() const;
933 virtual bool pinned() const { return false; }
934 virtual const Type* Value(PhaseGVN* phase) const;
935 virtual const RegMask &in_RegMask(uint) const;
936 virtual int ret_addr_offset() { return 0; }
937
938 NOT_LP64(bool return_value_is_used() const;)
939
940 // Similar to cousin class CallNode::returns_pointer
941 bool returns_pointer() const;
942
943 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
944
945 #ifndef PRODUCT
946 virtual void dump_spec(outputStream *st) const;
947 #endif
948 };
949
950 //------------------------------MachCallJavaNode------------------------------
951 // "Base" class for machine-specific versions of subroutine calls
952 class MachCallJavaNode : public MachCallNode {
953 protected:
954 virtual bool cmp( const Node &n ) const;
955 virtual uint size_of() const; // Size is bigger
956 public:
957 ciMethod* _method; // Method being direct called
958 bool _override_symbolic_info; // Override symbolic call site info from bytecode
959 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
960 bool _method_handle_invoke; // Tells if the call has to preserve SP
961 bool _arg_escape; // ArgEscape in parameter list
962 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
963 init_class_id(Class_MachCallJava);
964 }
965
966 virtual const RegMask &in_RegMask(uint) const;
967
968 int resolved_method_index(C2_MacroAssembler *masm) const {
969 if (_override_symbolic_info) {
970 // Attach corresponding Method* to the call site, so VM can use it during resolution
971 // instead of querying symbolic info from bytecode.
972 assert(_method != nullptr, "method should be set");
973 assert(_method->constant_encoding()->is_method(), "should point to a Method");
974 return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
975 }
976 return 0; // Use symbolic info from bytecode (resolved_method is null).
977 }
978
979 #ifndef PRODUCT
980 virtual void dump_spec(outputStream *st) const;
981 #endif
982 };
983
984 //------------------------------MachCallStaticJavaNode------------------------
985 // Machine-specific versions of monomorphic subroutine calls
986 class MachCallStaticJavaNode : public MachCallJavaNode {
987 virtual bool cmp( const Node &n ) const;
988 virtual uint size_of() const; // Size is bigger
989 public:
990 const char *_name; // Runtime wrapper name
991 MachCallStaticJavaNode() : MachCallJavaNode() {
992 init_class_id(Class_MachCallStaticJava);
993 }
994
995 // If this is an uncommon trap, return the request code, else zero.
996 int uncommon_trap_request() const;
997
998 virtual int ret_addr_offset();
999 #ifndef PRODUCT
1000 virtual void dump_spec(outputStream *st) const;
1001 void dump_trap_args(outputStream *st) const;
1002 #endif
1003 };
1004
1005 //------------------------------MachCallDynamicJavaNode------------------------
1006 // Machine-specific versions of possibly megamorphic subroutine calls
1007 class MachCallDynamicJavaNode : public MachCallJavaNode {
1008 public:
1009 int _vtable_index;
1010 MachCallDynamicJavaNode() : MachCallJavaNode() {
1011 init_class_id(Class_MachCallDynamicJava);
1012 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
1013 }
1014 virtual int ret_addr_offset();
1015 #ifndef PRODUCT
1016 virtual void dump_spec(outputStream *st) const;
1017 #endif
1018 virtual uint size_of() const { return sizeof(MachCallDynamicJavaNode); }
1019 };
1020
1021 //------------------------------MachCallRuntimeNode----------------------------
1022 // Machine-specific versions of subroutine calls
1023 class MachCallRuntimeNode : public MachCallNode {
1024 virtual bool cmp( const Node &n ) const;
1025 virtual uint size_of() const; // Size is bigger
1026 public:
1027 const char *_name; // Printable name, if _method is null
1028 bool _leaf_no_fp; // Is this CallLeafNoFP?
1029 MachCallRuntimeNode() : MachCallNode() {
1030 init_class_id(Class_MachCallRuntime);
1031 }
1032 virtual int ret_addr_offset();
1033 #ifndef PRODUCT
1034 virtual void dump_spec(outputStream *st) const;
1035 #endif
1036 };
1037
1038 class MachCallLeafNode: public MachCallRuntimeNode {
1039 public:
1040 MachCallLeafNode() : MachCallRuntimeNode() {
1041 init_class_id(Class_MachCallLeaf);
1042 }
1043 };
1044
1045 //------------------------------MachHaltNode-----------------------------------
1046 // Machine-specific versions of halt nodes
1047 class MachHaltNode : public MachReturnNode {
1048 public:
1049 bool _reachable;
1050 const char* _halt_reason;
1051 virtual JVMState* jvms() const;
1052 virtual uint size_of() const { return sizeof(MachHaltNode); }
1053 bool is_reachable() const {
1054 return _reachable;
1055 }
1056 };
1057
1058 class MachMemBarNode : public MachNode {
1059 virtual uint size_of() const; // Size is bigger
1060 public:
1061 const TypePtr* _adr_type; // memory effects
1062 MachMemBarNode() : MachNode() {
1063 init_class_id(Class_MachMemBar);
1064 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1065 }
1066
1067 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1068 virtual const TypePtr *adr_type() const;
1069 };
1070
1071
1072 //------------------------------MachTempNode-----------------------------------
1073 // Node used by the adlc to construct inputs to represent temporary registers
1074 class MachTempNode : public MachNode {
1075 private:
1076 MachOper *_opnd_array[1];
1077
1078 public:
1079 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1080 virtual uint rule() const { return 9999999; }
1081 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1082
1083 MachTempNode(MachOper* oper) {
1084 init_class_id(Class_MachTemp);
1085 _num_opnds = 1;
1086 _opnds = _opnd_array;
1087 add_req(nullptr);
1088 _opnds[0] = oper;
1089 }
1090 virtual uint size_of() const { return sizeof(MachTempNode); }
1091
1092 #ifndef PRODUCT
1093 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1094 virtual const char *Name() const { return "MachTemp";}
1095 #endif
1096 };
1097
1098
1099
1100 //------------------------------labelOper--------------------------------------
1101 // Machine-independent version of label operand
1102 class labelOper : public MachOper {
1103 private:
1104 virtual uint num_edges() const { return 0; }
1105 public:
1106 // Supported for fixed size branches
1107 Label* _label; // Label for branch(es)
1108
1109 uint _block_num;
1110
1111 labelOper() : _label(nullptr), _block_num(0) {}
1112
1113 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1114
1115 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1116
1117 virtual MachOper *clone() const;
1118
1119 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1120
1121 virtual uint opcode() const;
1122
1123 virtual uint hash() const;
1124 virtual bool cmp( const MachOper &oper ) const;
1125 #ifndef PRODUCT
1126 virtual const char *Name() const { return "Label";}
1127
1128 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1129 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1130 #endif
1131 };
1132
1133
1134 //------------------------------methodOper--------------------------------------
1135 // Machine-independent version of method operand
1136 class methodOper : public MachOper {
1137 private:
1138 virtual uint num_edges() const { return 0; }
1139 public:
1140 intptr_t _method; // Address of method
1141 methodOper() : _method(0) {}
1142 methodOper(intptr_t method) : _method(method) {}
1143
1144 virtual MachOper *clone() const;
1145
1146 virtual intptr_t method() const { return _method; }
1147
1148 virtual uint opcode() const;
1149
1150 virtual uint hash() const;
1151 virtual bool cmp( const MachOper &oper ) const;
1152 #ifndef PRODUCT
1153 virtual const char *Name() const { return "Method";}
1154
1155 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1156 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1157 #endif
1158 };
1159
1160 #endif // SHARE_OPTO_MACHNODE_HPP