1 /*
2 * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/c2_MacroAssembler.hpp"
29 #include "opto/callnode.hpp"
30 #include "opto/constantTable.hpp"
31 #include "opto/matcher.hpp"
32 #include "opto/multnode.hpp"
33 #include "opto/node.hpp"
34 #include "opto/regmask.hpp"
35 #include "utilities/growableArray.hpp"
36
37 class BufferBlob;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class Matcher;
55 class PhaseRegAlloc;
56 class RegMask;
57 class State;
58
59 //---------------------------MachOper------------------------------------------
60 class MachOper : public ResourceObj {
61 public:
62 // Allocate right next to the MachNodes in the same arena
63 void *operator new(size_t x) throw() {
64 Compile* C = Compile::current();
65 return C->node_arena()->AmallocWords(x);
66 }
67
68 // Opcode
69 virtual uint opcode() const = 0;
70
71 // Number of input edges.
72 // Generally at least 1
73 virtual uint num_edges() const { return 1; }
74 // Array of Register masks
75 virtual const RegMask *in_RegMask(int index) const;
76
77 // Methods to output the encoding of the operand
78
79 // Negate conditional branches. Error for non-branch Nodes
80 virtual void negate();
81
82 // Return the value requested
83 // result register lookup, corresponding to int_format
84 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
85 // input register lookup, corresponding to ext_format
86 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
87
88 // helpers for MacroAssembler generation from ADLC
89 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
90 return ::as_Register(reg(ra_, node));
91 }
92 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
93 return ::as_Register(reg(ra_, node, idx));
94 }
95 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
96 return ::as_FloatRegister(reg(ra_, node));
97 }
98 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
99 return ::as_FloatRegister(reg(ra_, node, idx));
100 }
101
102 #if defined(IA32) || defined(AMD64)
103 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
104 return ::as_KRegister(reg(ra_, node));
105 }
106 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
107 return ::as_KRegister(reg(ra_, node, idx));
108 }
109 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
110 return ::as_XMMRegister(reg(ra_, node));
111 }
112 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
113 return ::as_XMMRegister(reg(ra_, node, idx));
114 }
115 #endif
116 // CondRegister reg converter
117 #if defined(PPC64)
118 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
119 return ::as_ConditionRegister(reg(ra_, node));
120 }
121 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
122 return ::as_ConditionRegister(reg(ra_, node, idx));
123 }
124 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
125 return ::as_VectorRegister(reg(ra_, node));
126 }
127 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
128 return ::as_VectorRegister(reg(ra_, node, idx));
129 }
130 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
131 return ::as_VectorSRegister(reg(ra_, node));
132 }
133 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
134 return ::as_VectorSRegister(reg(ra_, node, idx));
135 }
136 #endif
137 #if defined(AARCH64)
138 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
139 return ::as_PRegister(reg(ra_, node));
140 }
141 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
142 return ::as_PRegister(reg(ra_, node, idx));
143 }
144 #endif
145
146 virtual intptr_t constant() const;
147 virtual relocInfo::relocType constant_reloc() const;
148 virtual jdouble constantD() const;
149 virtual jfloat constantF() const;
150 virtual jlong constantL() const;
151 virtual TypeOopPtr *oop() const;
152 virtual int ccode() const;
153 // A zero, default, indicates this value is not needed.
154 // May need to lookup the base register, as done in int_ and ext_format
155 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
156 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
157 virtual int scale() const;
158 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
159 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
160 // Check for PC-Relative displacement
161 virtual relocInfo::relocType disp_reloc() const;
162 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
163 virtual int base_position() const; // base edge position, or -1
164 virtual int index_position() const; // index edge position, or -1
165
166 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
167 // Only returns non-null value for x86_32.ad's indOffset32X
168 virtual const TypePtr *disp_as_type() const { return nullptr; }
169
170 // Return the label
171 virtual Label *label() const;
172
173 // Return the method's address
174 virtual intptr_t method() const;
175
176 // Hash and compare over operands are currently identical
177 virtual uint hash() const;
178 virtual bool cmp( const MachOper &oper ) const;
179
180 // Virtual clone, since I do not know how big the MachOper is.
181 virtual MachOper *clone() const = 0;
182
183 // Return ideal Type from simple operands. Fail for complex operands.
184 virtual const Type *type() const;
185
186 // Set an integer offset if we have one, or error otherwise
187 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
188
189 #ifndef PRODUCT
190 // Return name of operand
191 virtual const char *Name() const { return "???";}
192
193 // Methods to output the text version of the operand
194 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
195 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
196
197 virtual void dump_spec(outputStream *st) const; // Print per-operand info
198
199 // Check whether o is a valid oper.
200 static bool notAnOper(const MachOper *o) {
201 if (o == nullptr) return true;
202 if (((intptr_t)o & 1) != 0) return true;
203 if (*(address*)o == badAddress) return true; // kill by Node::destruct
204 return false;
205 }
206 #endif // !PRODUCT
207 };
208
209 //------------------------------MachNode---------------------------------------
210 // Base type for all machine specific nodes. All node classes generated by the
211 // ADLC inherit from this class.
212 class MachNode : public Node {
213 public:
214 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
215 init_class_id(Class_Mach);
216 }
217 // Required boilerplate
218 virtual uint size_of() const { return sizeof(MachNode); }
219 virtual int Opcode() const; // Always equal to MachNode
220 virtual uint rule() const = 0; // Machine-specific opcode
221 // Number of inputs which come before the first operand.
222 // Generally at least 1, to skip the Control input
223 virtual uint oper_input_base() const { return 1; }
224 // Position of constant base node in node's inputs. -1 if
225 // no constant base node input.
226 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
227
228 uint8_t barrier_data() const { return _barrier; }
229 void set_barrier_data(uint8_t data) { _barrier = data; }
230
231 // Copy index, inputs, and operands to a new version of the instruction.
232 // Called from cisc_version() and short_branch_version().
233 void fill_new_machnode(MachNode *n) const;
234
235 // Return an equivalent instruction using memory for cisc_operand position
236 virtual MachNode *cisc_version(int offset);
237 // Modify this instruction's register mask to use stack version for cisc_operand
238 virtual void use_cisc_RegMask();
239
240 // Support for short branches
241 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
242
243 // Avoid back to back some instructions on some CPUs.
244 enum AvoidBackToBackFlag { AVOID_NONE = 0,
245 AVOID_BEFORE = Flag_avoid_back_to_back_before,
246 AVOID_AFTER = Flag_avoid_back_to_back_after,
247 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
248
249 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
250 return (flags() & flag_value) == flag_value;
251 }
252
253 // instruction implemented with a call
254 bool has_call() const { return (flags() & Flag_has_call) != 0; }
255
256 // First index in _in[] corresponding to operand, or -1 if there is none
257 int operand_index(uint operand) const;
258 int operand_index(const MachOper *oper) const;
259 int operand_index(Node* m) const;
260
261 // Register class input is expected in
262 virtual const RegMask &in_RegMask(uint) const;
263
264 // cisc-spillable instructions redefine for use by in_RegMask
265 virtual const RegMask *cisc_RegMask() const { return nullptr; }
266
267 // If this instruction is a 2-address instruction, then return the
268 // index of the input which must match the output. Not necessary
269 // for instructions which bind the input and output register to the
270 // same singleton register (e.g., Intel IDIV which binds AX to be
271 // both an input and an output). It is necessary when the input and
272 // output have choices - but they must use the same choice.
273 virtual uint two_adr( ) const { return 0; }
274
275 // The GC might require some barrier metadata for machine code emission.
276 uint8_t _barrier;
277
278 // Array of complex operand pointers. Each corresponds to zero or
279 // more leafs. Must be set by MachNode constructor to point to an
280 // internal array of MachOpers. The MachOper array is sized by
281 // specific MachNodes described in the ADL.
282 uint16_t _num_opnds;
283 MachOper **_opnds;
284 uint16_t num_opnds() const { return _num_opnds; }
285
286 // Emit bytes using C2_MacroAssembler
287 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
288 // Expand node after register allocation.
289 // Node is replaced by several nodes in the postalloc expand phase.
290 // Corresponding methods are generated for nodes if they specify
291 // postalloc_expand. See block.cpp for more documentation.
292 virtual bool requires_postalloc_expand() const { return false; }
293 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
294 // Size of instruction in bytes
295 virtual uint size(PhaseRegAlloc *ra_) const;
296 // Helper function that computes size by emitting code
297 virtual uint emit_size(PhaseRegAlloc *ra_) const;
298
299 // Return the alignment required (in units of relocInfo::addr_unit())
300 // for this instruction (must be a power of 2)
301 int pd_alignment_required() const;
302 virtual int alignment_required() const { return pd_alignment_required(); }
303
304 // Return the padding (in bytes) to be emitted before this
305 // instruction to properly align it.
306 virtual int compute_padding(int current_offset) const;
307
308 // Return number of relocatable values contained in this instruction
309 virtual int reloc() const { return 0; }
310
311 // Return number of words used for double constants in this instruction
312 virtual int ins_num_consts() const { return 0; }
313
314 // Hash and compare over operands. Used to do GVN on machine Nodes.
315 virtual uint hash() const;
316 virtual bool cmp( const Node &n ) const;
317
318 // Expand method for MachNode, replaces nodes representing pseudo
319 // instructions with a set of nodes which represent real machine
320 // instructions and compute the same value.
321 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
322
323 // Bottom_type call; value comes from operand0
324 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
325 virtual uint ideal_reg() const {
326 const Type *t = _opnds[0]->type();
327 if (t == TypeInt::CC) {
328 return Op_RegFlags;
329 } else {
330 return t->ideal_reg();
331 }
332 }
333
334 // If this is a memory op, return the base pointer and fixed offset.
335 // If there are no such, return null. If there are multiple addresses
336 // or the address is indeterminate (rare cases) then return (Node*)-1,
337 // which serves as node bottom.
338 // If the offset is not statically determined, set it to Type::OffsetBot.
339 // This method is free to ignore stack slots if that helps.
340 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
341 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
342 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
343
344 // Helper for get_base_and_disp: find the base and index input nodes.
345 // Returns the MachOper as determined by memory_operand(), for use, if
346 // needed by the caller. If (MachOper *)-1 is returned, base and index
347 // are set to NodeSentinel. If null is returned, base and
348 // index are set to null.
349 const MachOper* memory_inputs(Node* &base, Node* &index) const;
350
351 // Helper for memory_inputs: Which operand carries the necessary info?
352 // By default, returns null, which means there is no such operand.
353 // If it returns (MachOper*)-1, this means there are multiple memories.
354 virtual const MachOper* memory_operand() const { return nullptr; }
355
356 // Call "get_base_and_disp" to decide which category of memory is used here.
357 virtual const class TypePtr *adr_type() const;
358
359 // Apply peephole rule(s) to this instruction
360 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
361
362 // Top-level ideal Opcode matched
363 virtual int ideal_Opcode() const { return Op_Node; }
364
365 // Adds the label for the case
366 virtual void add_case_label( int switch_val, Label* blockLabel);
367
368 // Set the absolute address for methods
369 virtual void method_set( intptr_t addr );
370
371 // Should we clone rather than spill this instruction?
372 bool rematerialize() const;
373
374 // Get the pipeline info
375 static const Pipeline *pipeline_class();
376 virtual const Pipeline *pipeline() const;
377
378 // Returns true if this node is a check that can be implemented with a trap.
379 virtual bool is_TrapBasedCheckNode() const { return false; }
380 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
381 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
382
383 #ifndef PRODUCT
384 virtual const char *Name() const = 0; // Machine-specific name
385 virtual void dump_spec(outputStream *st) const; // Print per-node info
386 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
387 #endif
388 };
389
390 //------------------------------MachIdealNode----------------------------
391 // Machine specific versions of nodes that must be defined by user.
392 // These are not converted by matcher from ideal nodes to machine nodes
393 // but are inserted into the code by the compiler.
394 class MachIdealNode : public MachNode {
395 public:
396 MachIdealNode( ) {}
397
398 // Define the following defaults for non-matched machine nodes
399 virtual uint oper_input_base() const { return 0; }
400 virtual uint rule() const { return 9999999; }
401 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
402 };
403
404 //------------------------------MachTypeNode----------------------------
405 // Machine Nodes that need to retain a known Type.
406 class MachTypeNode : public MachNode {
407 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
408 public:
409 MachTypeNode( ) {}
410 const Type *_bottom_type;
411
412 virtual const class Type *bottom_type() const { return _bottom_type; }
413 #ifndef PRODUCT
414 virtual void dump_spec(outputStream *st) const;
415 #endif
416 };
417
418 //------------------------------MachBreakpointNode----------------------------
419 // Machine breakpoint or interrupt Node
420 class MachBreakpointNode : public MachIdealNode {
421 public:
422 MachBreakpointNode( ) {}
423 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
424 virtual uint size(PhaseRegAlloc *ra_) const;
425
426 #ifndef PRODUCT
427 virtual const char *Name() const { return "Breakpoint"; }
428 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
429 #endif
430 };
431
432 //------------------------------MachConstantBaseNode--------------------------
433 // Machine node that represents the base address of the constant table.
434 class MachConstantBaseNode : public MachIdealNode {
435 public:
436 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
437
438 public:
439 MachConstantBaseNode() : MachIdealNode() {
440 init_class_id(Class_MachConstantBase);
441 }
442 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
443 virtual uint ideal_reg() const { return Op_RegP; }
444 virtual uint oper_input_base() const { return 1; }
445
446 virtual bool requires_postalloc_expand() const;
447 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
448
449 virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
450 virtual uint size(PhaseRegAlloc* ra_) const;
451
452 static const RegMask& static_out_RegMask() { return _out_RegMask; }
453 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
454
455 #ifndef PRODUCT
456 virtual const char* Name() const { return "MachConstantBaseNode"; }
457 virtual void format(PhaseRegAlloc*, outputStream* st) const;
458 #endif
459 };
460
461 //------------------------------MachConstantNode-------------------------------
462 // Machine node that holds a constant which is stored in the constant table.
463 class MachConstantNode : public MachTypeNode {
464 protected:
465 ConstantTable::Constant _constant; // This node's constant.
466
467 public:
468 MachConstantNode() : MachTypeNode() {
469 init_class_id(Class_MachConstant);
470 }
471
472 virtual void eval_constant(Compile* C) {
473 #ifdef ASSERT
474 tty->print("missing MachConstantNode eval_constant function: ");
475 dump();
476 #endif
477 ShouldNotCallThis();
478 }
479
480 virtual const RegMask &in_RegMask(uint idx) const {
481 if (idx == mach_constant_base_node_input())
482 return MachConstantBaseNode::static_out_RegMask();
483 return MachNode::in_RegMask(idx);
484 }
485
486 // Input edge of MachConstantBaseNode.
487 virtual uint mach_constant_base_node_input() const { return req() - 1; }
488
489 int constant_offset();
490 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
491 // Unchecked version to avoid assertions in debug output.
492 int constant_offset_unchecked() const;
493 };
494
495 //------------------------------MachUEPNode-----------------------------------
496 // Machine Unvalidated Entry Point Node
497 class MachUEPNode : public MachIdealNode {
498 public:
499 MachUEPNode( ) {}
500 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
501 virtual uint size(PhaseRegAlloc *ra_) const;
502
503 #ifndef PRODUCT
504 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
505 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
506 #endif
507 };
508
509 //------------------------------MachPrologNode--------------------------------
510 // Machine function Prolog Node
511 class MachPrologNode : public MachIdealNode {
512 public:
513 MachPrologNode( ) {}
514 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
515 virtual uint size(PhaseRegAlloc *ra_) const;
516 virtual int reloc() const;
517
518 #ifndef PRODUCT
519 virtual const char *Name() const { return "Prolog"; }
520 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
521 #endif
522 };
523
524 //------------------------------MachEpilogNode--------------------------------
525 // Machine function Epilog Node
526 class MachEpilogNode : public MachIdealNode {
527 public:
528 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
529 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
530 virtual uint size(PhaseRegAlloc *ra_) const;
531 virtual int reloc() const;
532 virtual const Pipeline *pipeline() const;
533
534 private:
535 bool _do_polling;
536
537 public:
538 bool do_polling() const { return _do_polling; }
539
540 #ifndef PRODUCT
541 virtual const char *Name() const { return "Epilog"; }
542 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
543 #endif
544 };
545
546 //------------------------------MachNopNode-----------------------------------
547 // Machine function Nop Node
548 class MachNopNode : public MachIdealNode {
549 private:
550 int _count;
551 public:
552 MachNopNode( ) : _count(1) {}
553 MachNopNode( int count ) : _count(count) {}
554 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
555 virtual uint size(PhaseRegAlloc *ra_) const;
556
557 virtual const class Type *bottom_type() const { return Type::CONTROL; }
558
559 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
560 virtual const Pipeline *pipeline() const;
561 #ifndef PRODUCT
562 virtual const char *Name() const { return "Nop"; }
563 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
564 virtual void dump_spec(outputStream *st) const { } // No per-operand info
565 #endif
566 };
567
568 //------------------------------MachSpillCopyNode------------------------------
569 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
570 // location (stack or register).
571 class MachSpillCopyNode : public MachIdealNode {
572 public:
573 enum SpillType {
574 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
575 PhiInput, // Inserted when coalescing of a phi node and its input fails
576 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
577 LoopPhiInput, // Pre-split compares of loop-phis
578 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
579 // if in high pressure region or the lrg is bound
580 RegToReg, // A register to register move
581 RegToMem, // A register to memory move
582 MemToReg, // A memory to register move
583 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
584 // the phi and its input resides at different locations (i.e. reg or mem)
585 BasePointerToMem, // Spill base pointer to memory at safepoint
586 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
587 // stretched beyond a new definition point, therefore we split out new copies instead
588 CallUse, // Spill use at a call
589 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
590 };
591 private:
592 const RegMask *_in; // RegMask for input
593 const RegMask *_out; // RegMask for output
594 const Type *_type;
595 const SpillType _spill_type;
596 public:
597 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
598 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
599 init_class_id(Class_MachSpillCopy);
600 init_flags(Flag_is_Copy);
601 add_req(nullptr);
602 add_req(n);
603 }
604 virtual uint size_of() const { return sizeof(*this); }
605 void set_out_RegMask(const RegMask &out) { _out = &out; }
606 void set_in_RegMask(const RegMask &in) { _in = ∈ }
607 virtual const RegMask &out_RegMask() const { return *_out; }
608 virtual const RegMask &in_RegMask(uint) const { return *_in; }
609 virtual const class Type *bottom_type() const { return _type; }
610 virtual uint ideal_reg() const { return _type->ideal_reg(); }
611 virtual uint oper_input_base() const { return 1; }
612 uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
613
614 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
615 virtual uint size(PhaseRegAlloc *ra_) const;
616
617
618 #ifndef PRODUCT
619 static const char *spill_type(SpillType st) {
620 switch (st) {
621 case TwoAddress:
622 return "TwoAddressSpillCopy";
623 case PhiInput:
624 return "PhiInputSpillCopy";
625 case DebugUse:
626 return "DebugUseSpillCopy";
627 case LoopPhiInput:
628 return "LoopPhiInputSpillCopy";
629 case Definition:
630 return "DefinitionSpillCopy";
631 case RegToReg:
632 return "RegToRegSpillCopy";
633 case RegToMem:
634 return "RegToMemSpillCopy";
635 case MemToReg:
636 return "MemToRegSpillCopy";
637 case PhiLocationDifferToInputLocation:
638 return "PhiLocationDifferToInputLocationSpillCopy";
639 case BasePointerToMem:
640 return "BasePointerToMemSpillCopy";
641 case InputToRematerialization:
642 return "InputToRematerializationSpillCopy";
643 case CallUse:
644 return "CallUseSpillCopy";
645 case Bound:
646 return "BoundSpillCopy";
647 default:
648 assert(false, "Must have valid spill type");
649 return "MachSpillCopy";
650 }
651 }
652
653 virtual const char *Name() const {
654 return spill_type(_spill_type);
655 }
656
657 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
658 #endif
659 };
660
661 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
662 // however it doesn't have a control input and is more like a MergeMem.
663 // It is inserted after the register allocation is done to ensure that nodes use single
664 // definition of a multidef lrg in a block.
665 class MachMergeNode : public MachIdealNode {
666 public:
667 MachMergeNode(Node *n1) {
668 init_class_id(Class_MachMerge);
669 add_req(nullptr);
670 add_req(n1);
671 }
672 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
673 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
674 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
675 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
676 virtual uint oper_input_base() const { return 1; }
677 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
678 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
679 #ifndef PRODUCT
680 virtual const char *Name() const { return "MachMerge"; }
681 #endif
682 };
683
684 //------------------------------MachBranchNode--------------------------------
685 // Abstract machine branch Node
686 class MachBranchNode : public MachIdealNode {
687 public:
688 MachBranchNode() : MachIdealNode() {
689 init_class_id(Class_MachBranch);
690 }
691 virtual void label_set(Label* label, uint block_num) = 0;
692 virtual void save_label(Label** label, uint* block_num) = 0;
693
694 // Support for short branches
695 virtual MachNode *short_branch_version() { return nullptr; }
696
697 virtual bool pinned() const { return true; };
698 };
699
700 //------------------------------MachNullChkNode--------------------------------
701 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
702 // also some kind of memory op. Turns the indicated MachNode into a
703 // conditional branch with good latency on the ptr-not-null path and awful
704 // latency on the pointer-is-null path.
705
706 class MachNullCheckNode : public MachBranchNode {
707 public:
708 const uint _vidx; // Index of memop being tested
709 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
710 init_class_id(Class_MachNullCheck);
711 add_req(ctrl);
712 add_req(memop);
713 }
714 virtual int Opcode() const;
715 virtual uint size_of() const { return sizeof(*this); }
716
717 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
718 virtual void label_set(Label* label, uint block_num);
719 virtual void save_label(Label** label, uint* block_num);
720 virtual void negate() { }
721 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
722 virtual uint ideal_reg() const { return NotAMachineReg; }
723 virtual const RegMask &in_RegMask(uint) const;
724 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
725 #ifndef PRODUCT
726 virtual const char *Name() const { return "NullCheck"; }
727 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
728 #endif
729 };
730
731 //------------------------------MachProjNode----------------------------------
732 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
733 // just MachNodes made by the Ideal world that replicate simple projections
734 // but with machine-dependent input & output register masks. Generally
735 // produced as part of calling conventions. Normally I make MachNodes as part
736 // of the Matcher process, but the Matcher is ill suited to issues involving
737 // frame handling, so frame handling is all done in the Ideal world with
738 // occasional callbacks to the machine model for important info.
739 class MachProjNode : public ProjNode {
740 public:
741 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
742 init_class_id(Class_MachProj);
743 }
744 RegMask _rout;
745 const uint _ideal_reg;
746 enum projType {
747 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
748 fat_proj = 999 // Projs killing many regs, defined by _rout
749 };
750 virtual int Opcode() const;
751 virtual const Type *bottom_type() const;
752 virtual const TypePtr *adr_type() const;
753 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
754 virtual const RegMask &out_RegMask() const { return _rout; }
755 virtual uint ideal_reg() const { return _ideal_reg; }
756 // Need size_of() for virtual ProjNode::clone()
757 virtual uint size_of() const { return sizeof(MachProjNode); }
758 #ifndef PRODUCT
759 virtual void dump_spec(outputStream *st) const;
760 #endif
761 };
762
763 //------------------------------MachIfNode-------------------------------------
764 // Machine-specific versions of IfNodes
765 class MachIfNode : public MachBranchNode {
766 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
767 public:
768 float _prob; // Probability branch goes either way
769 float _fcnt; // Frequency counter
770 MachIfNode() : MachBranchNode() {
771 init_class_id(Class_MachIf);
772 }
773 // Negate conditional branches.
774 virtual void negate() = 0;
775 #ifndef PRODUCT
776 virtual void dump_spec(outputStream *st) const;
777 #endif
778 };
779
780 //------------------------------MachJumpNode-----------------------------------
781 // Machine-specific versions of JumpNodes
782 class MachJumpNode : public MachConstantNode {
783 public:
784 float* _probs;
785 MachJumpNode() : MachConstantNode() {
786 init_class_id(Class_MachJump);
787 }
788 };
789
790 //------------------------------MachGotoNode-----------------------------------
791 // Machine-specific versions of GotoNodes
792 class MachGotoNode : public MachBranchNode {
793 public:
794 MachGotoNode() : MachBranchNode() {
795 init_class_id(Class_MachGoto);
796 }
797 };
798
799 //------------------------------MachFastLockNode-------------------------------------
800 // Machine-specific versions of FastLockNodes
801 class MachFastLockNode : public MachNode {
802 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
803 public:
804 MachFastLockNode() : MachNode() {}
805 };
806
807 //------------------------------MachReturnNode--------------------------------
808 // Machine-specific versions of subroutine returns
809 class MachReturnNode : public MachNode {
810 virtual uint size_of() const; // Size is bigger
811 public:
812 RegMask *_in_rms; // Input register masks, set during allocation
813 ReallocMark _nesting; // assertion check for reallocations
814 const TypePtr* _adr_type; // memory effects of call or return
815 MachReturnNode() : MachNode() {
816 init_class_id(Class_MachReturn);
817 _adr_type = TypePtr::BOTTOM; // the default: all of memory
818 }
819
820 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
821
822 virtual const RegMask &in_RegMask(uint) const;
823 virtual bool pinned() const { return true; };
824 virtual const TypePtr *adr_type() const;
825 };
826
827 //------------------------------MachSafePointNode-----------------------------
828 // Machine-specific versions of safepoints
829 class MachSafePointNode : public MachReturnNode {
830 public:
831 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
832 JVMState* _jvms; // Pointer to list of JVM State Objects
833 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
834 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
835 OopMap* oop_map() const { return _oop_map; }
836 void set_oop_map(OopMap* om) { _oop_map = om; }
837
838 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
839 init_class_id(Class_MachSafePoint);
840 }
841
842 virtual JVMState* jvms() const { return _jvms; }
843 void set_jvms(JVMState* s) {
844 _jvms = s;
845 }
846 virtual const Type *bottom_type() const;
847
848 virtual const RegMask &in_RegMask(uint) const;
849
850 // Functionality from old debug nodes
851 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
852 Node *frameptr () const { return in(TypeFunc::FramePtr); }
853
854 Node *local(const JVMState* jvms, uint idx) const {
855 assert(verify_jvms(jvms), "jvms must match");
856 return in(_jvmadj + jvms->locoff() + idx);
857 }
858 Node *stack(const JVMState* jvms, uint idx) const {
859 assert(verify_jvms(jvms), "jvms must match");
860 return in(_jvmadj + jvms->stkoff() + idx);
861 }
862 Node *monitor_obj(const JVMState* jvms, uint idx) const {
863 assert(verify_jvms(jvms), "jvms must match");
864 return in(_jvmadj + jvms->monitor_obj_offset(idx));
865 }
866 Node *monitor_box(const JVMState* jvms, uint idx) const {
867 assert(verify_jvms(jvms), "jvms must match");
868 return in(_jvmadj + jvms->monitor_box_offset(idx));
869 }
870 Node* scalarized_obj(const JVMState* jvms, uint idx) const {
871 assert(verify_jvms(jvms), "jvms must match");
872 return in(_jvmadj + jvms->scloff() + idx);
873 }
874 void set_local(const JVMState* jvms, uint idx, Node *c) {
875 assert(verify_jvms(jvms), "jvms must match");
876 set_req(_jvmadj + jvms->locoff() + idx, c);
877 }
878 void set_stack(const JVMState* jvms, uint idx, Node *c) {
879 assert(verify_jvms(jvms), "jvms must match");
880 set_req(_jvmadj + jvms->stkoff() + idx, c);
881 }
882 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
883 assert(verify_jvms(jvms), "jvms must match");
884 set_req(_jvmadj + jvms->monoff() + idx, c);
885 }
886 };
887
888 //------------------------------MachCallNode----------------------------------
889 // Machine-specific versions of subroutine calls
890 class MachCallNode : public MachSafePointNode {
891 protected:
892 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
893 virtual bool cmp( const Node &n ) const;
894 virtual uint size_of() const = 0; // Size is bigger
895 public:
896 const TypeFunc *_tf; // Function type
897 address _entry_point; // Address of the method being called
898 float _cnt; // Estimate of number of times called
899 bool _guaranteed_safepoint; // Do we need to observe safepoint?
900
901 const TypeFunc* tf() const { return _tf; }
902 address entry_point() const { return _entry_point; }
903 float cnt() const { return _cnt; }
904
905 void set_tf(const TypeFunc* tf) { _tf = tf; }
906 void set_entry_point(address p) { _entry_point = p; }
907 void set_cnt(float c) { _cnt = c; }
908 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
909
910 MachCallNode() : MachSafePointNode() {
911 init_class_id(Class_MachCall);
912 }
913
914 virtual const Type *bottom_type() const;
915 virtual bool pinned() const { return false; }
916 virtual const Type* Value(PhaseGVN* phase) const;
917 virtual const RegMask &in_RegMask(uint) const;
918 virtual int ret_addr_offset() { return 0; }
919
920 NOT_LP64(bool return_value_is_used() const;)
921
922 // Similar to cousin class CallNode::returns_pointer
923 bool returns_pointer() const;
924
925 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
926
927 #ifndef PRODUCT
928 virtual void dump_spec(outputStream *st) const;
929 #endif
930 };
931
932 //------------------------------MachCallJavaNode------------------------------
933 // "Base" class for machine-specific versions of subroutine calls
934 class MachCallJavaNode : public MachCallNode {
935 protected:
936 virtual bool cmp( const Node &n ) const;
937 virtual uint size_of() const; // Size is bigger
938 public:
939 ciMethod* _method; // Method being direct called
940 bool _override_symbolic_info; // Override symbolic call site info from bytecode
941 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
942 bool _method_handle_invoke; // Tells if the call has to preserve SP
943 bool _arg_escape; // ArgEscape in parameter list
944 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
945 init_class_id(Class_MachCallJava);
946 }
947
948 virtual const RegMask &in_RegMask(uint) const;
949
950 int resolved_method_index(C2_MacroAssembler *masm) const {
951 if (_override_symbolic_info) {
952 // Attach corresponding Method* to the call site, so VM can use it during resolution
953 // instead of querying symbolic info from bytecode.
954 assert(_method != nullptr, "method should be set");
955 assert(_method->constant_encoding()->is_method(), "should point to a Method");
956 return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
957 }
958 return 0; // Use symbolic info from bytecode (resolved_method is null).
959 }
960
961 #ifndef PRODUCT
962 virtual void dump_spec(outputStream *st) const;
963 #endif
964 };
965
966 //------------------------------MachCallStaticJavaNode------------------------
967 // Machine-specific versions of monomorphic subroutine calls
968 class MachCallStaticJavaNode : public MachCallJavaNode {
969 virtual bool cmp( const Node &n ) const;
970 virtual uint size_of() const; // Size is bigger
971 public:
972 const char *_name; // Runtime wrapper name
973 MachCallStaticJavaNode() : MachCallJavaNode() {
974 init_class_id(Class_MachCallStaticJava);
975 }
976
977 // If this is an uncommon trap, return the request code, else zero.
978 int uncommon_trap_request() const;
979
980 virtual int ret_addr_offset();
981 #ifndef PRODUCT
982 virtual void dump_spec(outputStream *st) const;
983 void dump_trap_args(outputStream *st) const;
984 #endif
985 };
986
987 //------------------------------MachCallDynamicJavaNode------------------------
988 // Machine-specific versions of possibly megamorphic subroutine calls
989 class MachCallDynamicJavaNode : public MachCallJavaNode {
990 public:
991 int _vtable_index;
992 MachCallDynamicJavaNode() : MachCallJavaNode() {
993 init_class_id(Class_MachCallDynamicJava);
994 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
995 }
996 virtual int ret_addr_offset();
997 #ifndef PRODUCT
998 virtual void dump_spec(outputStream *st) const;
999 #endif
1000 };
1001
1002 //------------------------------MachCallRuntimeNode----------------------------
1003 // Machine-specific versions of subroutine calls
1004 class MachCallRuntimeNode : public MachCallNode {
1005 virtual bool cmp( const Node &n ) const;
1006 virtual uint size_of() const; // Size is bigger
1007 public:
1008 const char *_name; // Printable name, if _method is null
1009 bool _leaf_no_fp; // Is this CallLeafNoFP?
1010 MachCallRuntimeNode() : MachCallNode() {
1011 init_class_id(Class_MachCallRuntime);
1012 }
1013 virtual int ret_addr_offset();
1014 #ifndef PRODUCT
1015 virtual void dump_spec(outputStream *st) const;
1016 #endif
1017 };
1018
1019 class MachCallLeafNode: public MachCallRuntimeNode {
1020 public:
1021 MachCallLeafNode() : MachCallRuntimeNode() {
1022 init_class_id(Class_MachCallLeaf);
1023 }
1024 };
1025
1026 //------------------------------MachHaltNode-----------------------------------
1027 // Machine-specific versions of halt nodes
1028 class MachHaltNode : public MachReturnNode {
1029 public:
1030 bool _reachable;
1031 const char* _halt_reason;
1032 virtual JVMState* jvms() const;
1033 bool is_reachable() const {
1034 return _reachable;
1035 }
1036 };
1037
1038 class MachMemBarNode : public MachNode {
1039 virtual uint size_of() const; // Size is bigger
1040 public:
1041 const TypePtr* _adr_type; // memory effects
1042 MachMemBarNode() : MachNode() {
1043 init_class_id(Class_MachMemBar);
1044 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1045 }
1046
1047 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1048 virtual const TypePtr *adr_type() const;
1049 };
1050
1051
1052 //------------------------------MachTempNode-----------------------------------
1053 // Node used by the adlc to construct inputs to represent temporary registers
1054 class MachTempNode : public MachNode {
1055 private:
1056 MachOper *_opnd_array[1];
1057
1058 public:
1059 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1060 virtual uint rule() const { return 9999999; }
1061 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1062
1063 MachTempNode(MachOper* oper) {
1064 init_class_id(Class_MachTemp);
1065 _num_opnds = 1;
1066 _opnds = _opnd_array;
1067 add_req(nullptr);
1068 _opnds[0] = oper;
1069 }
1070 virtual uint size_of() const { return sizeof(MachTempNode); }
1071
1072 #ifndef PRODUCT
1073 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1074 virtual const char *Name() const { return "MachTemp";}
1075 #endif
1076 };
1077
1078
1079
1080 //------------------------------labelOper--------------------------------------
1081 // Machine-independent version of label operand
1082 class labelOper : public MachOper {
1083 private:
1084 virtual uint num_edges() const { return 0; }
1085 public:
1086 // Supported for fixed size branches
1087 Label* _label; // Label for branch(es)
1088
1089 uint _block_num;
1090
1091 labelOper() : _label(nullptr), _block_num(0) {}
1092
1093 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1094
1095 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1096
1097 virtual MachOper *clone() const;
1098
1099 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1100
1101 virtual uint opcode() const;
1102
1103 virtual uint hash() const;
1104 virtual bool cmp( const MachOper &oper ) const;
1105 #ifndef PRODUCT
1106 virtual const char *Name() const { return "Label";}
1107
1108 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1109 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1110 #endif
1111 };
1112
1113
1114 //------------------------------methodOper--------------------------------------
1115 // Machine-independent version of method operand
1116 class methodOper : public MachOper {
1117 private:
1118 virtual uint num_edges() const { return 0; }
1119 public:
1120 intptr_t _method; // Address of method
1121 methodOper() : _method(0) {}
1122 methodOper(intptr_t method) : _method(method) {}
1123
1124 virtual MachOper *clone() const;
1125
1126 virtual intptr_t method() const { return _method; }
1127
1128 virtual uint opcode() const;
1129
1130 virtual uint hash() const;
1131 virtual bool cmp( const MachOper &oper ) const;
1132 #ifndef PRODUCT
1133 virtual const char *Name() const { return "Method";}
1134
1135 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1136 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1137 #endif
1138 };
1139
1140 #endif // SHARE_OPTO_MACHNODE_HPP