1 /* 2 * Copyright (c) 1997, 2023, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_OPTO_MACHNODE_HPP 26 #define SHARE_OPTO_MACHNODE_HPP 27 28 #include "opto/callnode.hpp" 29 #include "opto/constantTable.hpp" 30 #include "opto/matcher.hpp" 31 #include "opto/multnode.hpp" 32 #include "opto/node.hpp" 33 #include "opto/regmask.hpp" 34 #include "utilities/growableArray.hpp" 35 36 class BufferBlob; 37 class CodeBuffer; 38 class JVMState; 39 class MachCallDynamicJavaNode; 40 class MachCallJavaNode; 41 class MachCallLeafNode; 42 class MachCallNode; 43 class MachCallRuntimeNode; 44 class MachCallStaticJavaNode; 45 class MachEpilogNode; 46 class MachIfNode; 47 class MachNullCheckNode; 48 class MachOper; 49 class MachProjNode; 50 class MachPrologNode; 51 class MachReturnNode; 52 class MachSafePointNode; 53 class MachSpillCopyNode; 54 class Matcher; 55 class PhaseRegAlloc; 56 class RegMask; 57 class RTMLockingCounters; 58 class State; 59 60 //---------------------------MachOper------------------------------------------ 61 class MachOper : public ResourceObj { 62 public: 63 // Allocate right next to the MachNodes in the same arena 64 void *operator new(size_t x) throw() { 65 Compile* C = Compile::current(); 66 return C->node_arena()->AmallocWords(x); 67 } 68 69 // Opcode 70 virtual uint opcode() const = 0; 71 72 // Number of input edges. 73 // Generally at least 1 74 virtual uint num_edges() const { return 1; } 75 // Array of Register masks 76 virtual const RegMask *in_RegMask(int index) const; 77 78 // Methods to output the encoding of the operand 79 80 // Negate conditional branches. Error for non-branch Nodes 81 virtual void negate(); 82 83 // Return the value requested 84 // result register lookup, corresponding to int_format 85 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; 86 // input register lookup, corresponding to ext_format 87 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; 88 89 // helpers for MacroAssembler generation from ADLC 90 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { 91 return ::as_Register(reg(ra_, node)); 92 } 93 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { 94 return ::as_Register(reg(ra_, node, idx)); 95 } 96 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { 97 return ::as_FloatRegister(reg(ra_, node)); 98 } 99 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 100 return ::as_FloatRegister(reg(ra_, node, idx)); 101 } 102 103 #if defined(IA32) || defined(AMD64) 104 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const { 105 return ::as_KRegister(reg(ra_, node)); 106 } 107 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 108 return ::as_KRegister(reg(ra_, node, idx)); 109 } 110 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { 111 return ::as_XMMRegister(reg(ra_, node)); 112 } 113 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 114 return ::as_XMMRegister(reg(ra_, node, idx)); 115 } 116 #endif 117 // CondRegister reg converter 118 #if defined(PPC64) 119 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const { 120 return ::as_ConditionRegister(reg(ra_, node)); 121 } 122 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 123 return ::as_ConditionRegister(reg(ra_, node, idx)); 124 } 125 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const { 126 return ::as_VectorRegister(reg(ra_, node)); 127 } 128 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 129 return ::as_VectorRegister(reg(ra_, node, idx)); 130 } 131 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const { 132 return ::as_VectorSRegister(reg(ra_, node)); 133 } 134 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { 135 return ::as_VectorSRegister(reg(ra_, node, idx)); 136 } 137 #endif 138 #if defined(AARCH64) 139 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const { 140 return ::as_PRegister(reg(ra_, node)); 141 } 142 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const { 143 return ::as_PRegister(reg(ra_, node, idx)); 144 } 145 #endif 146 147 virtual intptr_t constant() const; 148 virtual relocInfo::relocType constant_reloc() const; 149 virtual jdouble constantD() const; 150 virtual jfloat constantF() const; 151 virtual jlong constantL() const; 152 virtual TypeOopPtr *oop() const; 153 virtual int ccode() const; 154 // A zero, default, indicates this value is not needed. 155 // May need to lookup the base register, as done in int_ and ext_format 156 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; 157 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; 158 virtual int scale() const; 159 // Parameters needed to support MEMORY_INTERFACE access to stackSlot 160 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; 161 // Check for PC-Relative displacement 162 virtual relocInfo::relocType disp_reloc() const; 163 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot 164 virtual int base_position() const; // base edge position, or -1 165 virtual int index_position() const; // index edge position, or -1 166 167 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP 168 // Only returns non-null value for x86_32.ad's indOffset32X 169 virtual const TypePtr *disp_as_type() const { return nullptr; } 170 171 // Return the label 172 virtual Label *label() const; 173 174 // Return the method's address 175 virtual intptr_t method() const; 176 177 // Hash and compare over operands are currently identical 178 virtual uint hash() const; 179 virtual bool cmp( const MachOper &oper ) const; 180 181 // Virtual clone, since I do not know how big the MachOper is. 182 virtual MachOper *clone() const = 0; 183 184 // Return ideal Type from simple operands. Fail for complex operands. 185 virtual const Type *type() const; 186 187 // Set an integer offset if we have one, or error otherwise 188 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } 189 190 #ifndef PRODUCT 191 // Return name of operand 192 virtual const char *Name() const { return "???";} 193 194 // Methods to output the text version of the operand 195 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; 196 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; 197 198 virtual void dump_spec(outputStream *st) const; // Print per-operand info 199 200 // Check whether o is a valid oper. 201 static bool notAnOper(const MachOper *o) { 202 if (o == nullptr) return true; 203 if (((intptr_t)o & 1) != 0) return true; 204 if (*(address*)o == badAddress) return true; // kill by Node::destruct 205 return false; 206 } 207 #endif // !PRODUCT 208 }; 209 210 //------------------------------MachNode--------------------------------------- 211 // Base type for all machine specific nodes. All node classes generated by the 212 // ADLC inherit from this class. 213 class MachNode : public Node { 214 public: 215 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) { 216 init_class_id(Class_Mach); 217 } 218 // Required boilerplate 219 virtual uint size_of() const { return sizeof(MachNode); } 220 virtual int Opcode() const; // Always equal to MachNode 221 virtual uint rule() const = 0; // Machine-specific opcode 222 // Number of inputs which come before the first operand. 223 // Generally at least 1, to skip the Control input 224 virtual uint oper_input_base() const { return 1; } 225 // Position of constant base node in node's inputs. -1 if 226 // no constant base node input. 227 virtual uint mach_constant_base_node_input() const { return (uint)-1; } 228 229 uint8_t barrier_data() const { return _barrier; } 230 void set_barrier_data(uint8_t data) { _barrier = data; } 231 232 // Copy index, inputs, and operands to a new version of the instruction. 233 // Called from cisc_version() and short_branch_version(). 234 void fill_new_machnode(MachNode *n) const; 235 236 // Return an equivalent instruction using memory for cisc_operand position 237 virtual MachNode *cisc_version(int offset); 238 // Modify this instruction's register mask to use stack version for cisc_operand 239 virtual void use_cisc_RegMask(); 240 241 // Support for short branches 242 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } 243 244 // Avoid back to back some instructions on some CPUs. 245 enum AvoidBackToBackFlag { AVOID_NONE = 0, 246 AVOID_BEFORE = Flag_avoid_back_to_back_before, 247 AVOID_AFTER = Flag_avoid_back_to_back_after, 248 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER }; 249 250 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const { 251 return (flags() & flag_value) == flag_value; 252 } 253 254 // instruction implemented with a call 255 bool has_call() const { return (flags() & Flag_has_call) != 0; } 256 257 // First index in _in[] corresponding to operand, or -1 if there is none 258 int operand_index(uint operand) const; 259 int operand_index(const MachOper *oper) const; 260 int operand_index(Node* m) const; 261 262 // Register class input is expected in 263 virtual const RegMask &in_RegMask(uint) const; 264 265 // cisc-spillable instructions redefine for use by in_RegMask 266 virtual const RegMask *cisc_RegMask() const { return nullptr; } 267 268 // If this instruction is a 2-address instruction, then return the 269 // index of the input which must match the output. Not necessary 270 // for instructions which bind the input and output register to the 271 // same singleton register (e.g., Intel IDIV which binds AX to be 272 // both an input and an output). It is necessary when the input and 273 // output have choices - but they must use the same choice. 274 virtual uint two_adr( ) const { return 0; } 275 276 // The GC might require some barrier metadata for machine code emission. 277 uint8_t _barrier; 278 279 // Array of complex operand pointers. Each corresponds to zero or 280 // more leafs. Must be set by MachNode constructor to point to an 281 // internal array of MachOpers. The MachOper array is sized by 282 // specific MachNodes described in the ADL. 283 uint16_t _num_opnds; 284 MachOper **_opnds; 285 uint16_t num_opnds() const { return _num_opnds; } 286 287 // Emit bytes into cbuf 288 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 289 // Expand node after register allocation. 290 // Node is replaced by several nodes in the postalloc expand phase. 291 // Corresponding methods are generated for nodes if they specify 292 // postalloc_expand. See block.cpp for more documentation. 293 virtual bool requires_postalloc_expand() const { return false; } 294 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 295 // Size of instruction in bytes 296 virtual uint size(PhaseRegAlloc *ra_) const; 297 // Helper function that computes size by emitting code 298 virtual uint emit_size(PhaseRegAlloc *ra_) const; 299 300 // Return the alignment required (in units of relocInfo::addr_unit()) 301 // for this instruction (must be a power of 2) 302 int pd_alignment_required() const; 303 virtual int alignment_required() const { return pd_alignment_required(); } 304 305 // Return the padding (in bytes) to be emitted before this 306 // instruction to properly align it. 307 virtual int compute_padding(int current_offset) const; 308 309 // Return number of relocatable values contained in this instruction 310 virtual int reloc() const { return 0; } 311 312 // Return number of words used for double constants in this instruction 313 virtual int ins_num_consts() const { return 0; } 314 315 // Hash and compare over operands. Used to do GVN on machine Nodes. 316 virtual uint hash() const; 317 virtual bool cmp( const Node &n ) const; 318 319 // Expand method for MachNode, replaces nodes representing pseudo 320 // instructions with a set of nodes which represent real machine 321 // instructions and compute the same value. 322 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } 323 324 // Bottom_type call; value comes from operand0 325 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } 326 virtual uint ideal_reg() const { 327 const Type *t = _opnds[0]->type(); 328 if (t == TypeInt::CC) { 329 return Op_RegFlags; 330 } else { 331 return t->ideal_reg(); 332 } 333 } 334 335 // If this is a memory op, return the base pointer and fixed offset. 336 // If there are no such, return null. If there are multiple addresses 337 // or the address is indeterminate (rare cases) then return (Node*)-1, 338 // which serves as node bottom. 339 // If the offset is not statically determined, set it to Type::OffsetBot. 340 // This method is free to ignore stack slots if that helps. 341 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) 342 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible 343 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; 344 345 // Helper for get_base_and_disp: find the base and index input nodes. 346 // Returns the MachOper as determined by memory_operand(), for use, if 347 // needed by the caller. If (MachOper *)-1 is returned, base and index 348 // are set to NodeSentinel. If null is returned, base and 349 // index are set to null. 350 const MachOper* memory_inputs(Node* &base, Node* &index) const; 351 352 // Helper for memory_inputs: Which operand carries the necessary info? 353 // By default, returns null, which means there is no such operand. 354 // If it returns (MachOper*)-1, this means there are multiple memories. 355 virtual const MachOper* memory_operand() const { return nullptr; } 356 357 // Call "get_base_and_disp" to decide which category of memory is used here. 358 virtual const class TypePtr *adr_type() const; 359 360 // Apply peephole rule(s) to this instruction 361 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_); 362 363 // Top-level ideal Opcode matched 364 virtual int ideal_Opcode() const { return Op_Node; } 365 366 // Adds the label for the case 367 virtual void add_case_label( int switch_val, Label* blockLabel); 368 369 // Set the absolute address for methods 370 virtual void method_set( intptr_t addr ); 371 372 // Should we clone rather than spill this instruction? 373 bool rematerialize() const; 374 375 // Get the pipeline info 376 static const Pipeline *pipeline_class(); 377 virtual const Pipeline *pipeline() const; 378 379 // Returns true if this node is a check that can be implemented with a trap. 380 virtual bool is_TrapBasedCheckNode() const { return false; } 381 void set_removed() { add_flag(Flag_is_removed_by_peephole); } 382 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; } 383 384 #ifndef PRODUCT 385 virtual const char *Name() const = 0; // Machine-specific name 386 virtual void dump_spec(outputStream *st) const; // Print per-node info 387 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual 388 #endif 389 }; 390 391 //------------------------------MachIdealNode---------------------------- 392 // Machine specific versions of nodes that must be defined by user. 393 // These are not converted by matcher from ideal nodes to machine nodes 394 // but are inserted into the code by the compiler. 395 class MachIdealNode : public MachNode { 396 public: 397 MachIdealNode( ) {} 398 399 // Define the following defaults for non-matched machine nodes 400 virtual uint oper_input_base() const { return 0; } 401 virtual uint rule() const { return 9999999; } 402 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); } 403 }; 404 405 //------------------------------MachTypeNode---------------------------- 406 // Machine Nodes that need to retain a known Type. 407 class MachTypeNode : public MachNode { 408 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 409 public: 410 MachTypeNode( ) {} 411 const Type *_bottom_type; 412 413 virtual const class Type *bottom_type() const { return _bottom_type; } 414 #ifndef PRODUCT 415 virtual void dump_spec(outputStream *st) const; 416 #endif 417 }; 418 419 //------------------------------MachBreakpointNode---------------------------- 420 // Machine breakpoint or interrupt Node 421 class MachBreakpointNode : public MachIdealNode { 422 public: 423 MachBreakpointNode( ) {} 424 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 425 virtual uint size(PhaseRegAlloc *ra_) const; 426 427 #ifndef PRODUCT 428 virtual const char *Name() const { return "Breakpoint"; } 429 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 430 #endif 431 }; 432 433 //------------------------------MachConstantBaseNode-------------------------- 434 // Machine node that represents the base address of the constant table. 435 class MachConstantBaseNode : public MachIdealNode { 436 public: 437 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). 438 439 public: 440 MachConstantBaseNode() : MachIdealNode() { 441 init_class_id(Class_MachConstantBase); 442 } 443 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } 444 virtual uint ideal_reg() const { return Op_RegP; } 445 virtual uint oper_input_base() const { return 1; } 446 447 virtual bool requires_postalloc_expand() const; 448 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); 449 450 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; 451 virtual uint size(PhaseRegAlloc* ra_) const; 452 453 static const RegMask& static_out_RegMask() { return _out_RegMask; } 454 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } 455 456 #ifndef PRODUCT 457 virtual const char* Name() const { return "MachConstantBaseNode"; } 458 virtual void format(PhaseRegAlloc*, outputStream* st) const; 459 #endif 460 }; 461 462 //------------------------------MachConstantNode------------------------------- 463 // Machine node that holds a constant which is stored in the constant table. 464 class MachConstantNode : public MachTypeNode { 465 protected: 466 ConstantTable::Constant _constant; // This node's constant. 467 468 public: 469 MachConstantNode() : MachTypeNode() { 470 init_class_id(Class_MachConstant); 471 } 472 473 virtual void eval_constant(Compile* C) { 474 #ifdef ASSERT 475 tty->print("missing MachConstantNode eval_constant function: "); 476 dump(); 477 #endif 478 ShouldNotCallThis(); 479 } 480 481 virtual const RegMask &in_RegMask(uint idx) const { 482 if (idx == mach_constant_base_node_input()) 483 return MachConstantBaseNode::static_out_RegMask(); 484 return MachNode::in_RegMask(idx); 485 } 486 487 // Input edge of MachConstantBaseNode. 488 virtual uint mach_constant_base_node_input() const { return req() - 1; } 489 490 int constant_offset(); 491 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } 492 // Unchecked version to avoid assertions in debug output. 493 int constant_offset_unchecked() const; 494 }; 495 496 //------------------------------MachUEPNode----------------------------------- 497 // Machine Unvalidated Entry Point Node 498 class MachUEPNode : public MachIdealNode { 499 public: 500 MachUEPNode( ) {} 501 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 502 virtual uint size(PhaseRegAlloc *ra_) const; 503 504 #ifndef PRODUCT 505 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } 506 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 507 #endif 508 }; 509 510 //------------------------------MachPrologNode-------------------------------- 511 // Machine function Prolog Node 512 class MachPrologNode : public MachIdealNode { 513 public: 514 MachPrologNode( ) {} 515 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 516 virtual uint size(PhaseRegAlloc *ra_) const; 517 virtual int reloc() const; 518 519 #ifndef PRODUCT 520 virtual const char *Name() const { return "Prolog"; } 521 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 522 #endif 523 }; 524 525 //------------------------------MachEpilogNode-------------------------------- 526 // Machine function Epilog Node 527 class MachEpilogNode : public MachIdealNode { 528 public: 529 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} 530 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 531 virtual uint size(PhaseRegAlloc *ra_) const; 532 virtual int reloc() const; 533 virtual const Pipeline *pipeline() const; 534 535 private: 536 bool _do_polling; 537 538 public: 539 bool do_polling() const { return _do_polling; } 540 541 #ifndef PRODUCT 542 virtual const char *Name() const { return "Epilog"; } 543 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 544 #endif 545 }; 546 547 //------------------------------MachNopNode----------------------------------- 548 // Machine function Nop Node 549 class MachNopNode : public MachIdealNode { 550 private: 551 int _count; 552 public: 553 MachNopNode( ) : _count(1) {} 554 MachNopNode( int count ) : _count(count) {} 555 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 556 virtual uint size(PhaseRegAlloc *ra_) const; 557 558 virtual const class Type *bottom_type() const { return Type::CONTROL; } 559 560 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp 561 virtual const Pipeline *pipeline() const; 562 #ifndef PRODUCT 563 virtual const char *Name() const { return "Nop"; } 564 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 565 virtual void dump_spec(outputStream *st) const { } // No per-operand info 566 #endif 567 }; 568 569 //------------------------------MachSpillCopyNode------------------------------ 570 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any 571 // location (stack or register). 572 class MachSpillCopyNode : public MachIdealNode { 573 public: 574 enum SpillType { 575 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails 576 PhiInput, // Inserted when coalescing of a phi node and its input fails 577 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks 578 LoopPhiInput, // Pre-split compares of loop-phis 579 Definition, // An lrg marked as spilled will be spilled to memory right after its definition, 580 // if in high pressure region or the lrg is bound 581 RegToReg, // A register to register move 582 RegToMem, // A register to memory move 583 MemToReg, // A memory to register move 584 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if 585 // the phi and its input resides at different locations (i.e. reg or mem) 586 BasePointerToMem, // Spill base pointer to memory at safepoint 587 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be 588 // stretched beyond a new definition point, therefore we split out new copies instead 589 CallUse, // Spill use at a call 590 Bound // An lrg marked as spill that is bound and needs to be spilled at a use 591 }; 592 private: 593 const RegMask *_in; // RegMask for input 594 const RegMask *_out; // RegMask for output 595 const Type *_type; 596 const SpillType _spill_type; 597 public: 598 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) : 599 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) { 600 init_class_id(Class_MachSpillCopy); 601 init_flags(Flag_is_Copy); 602 add_req(nullptr); 603 add_req(n); 604 } 605 virtual uint size_of() const { return sizeof(*this); } 606 void set_out_RegMask(const RegMask &out) { _out = &out; } 607 void set_in_RegMask(const RegMask &in) { _in = ∈ } 608 virtual const RegMask &out_RegMask() const { return *_out; } 609 virtual const RegMask &in_RegMask(uint) const { return *_in; } 610 virtual const class Type *bottom_type() const { return _type; } 611 virtual uint ideal_reg() const { return _type->ideal_reg(); } 612 virtual uint oper_input_base() const { return 1; } 613 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; 614 615 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 616 virtual uint size(PhaseRegAlloc *ra_) const; 617 618 619 #ifndef PRODUCT 620 static const char *spill_type(SpillType st) { 621 switch (st) { 622 case TwoAddress: 623 return "TwoAddressSpillCopy"; 624 case PhiInput: 625 return "PhiInputSpillCopy"; 626 case DebugUse: 627 return "DebugUseSpillCopy"; 628 case LoopPhiInput: 629 return "LoopPhiInputSpillCopy"; 630 case Definition: 631 return "DefinitionSpillCopy"; 632 case RegToReg: 633 return "RegToRegSpillCopy"; 634 case RegToMem: 635 return "RegToMemSpillCopy"; 636 case MemToReg: 637 return "MemToRegSpillCopy"; 638 case PhiLocationDifferToInputLocation: 639 return "PhiLocationDifferToInputLocationSpillCopy"; 640 case BasePointerToMem: 641 return "BasePointerToMemSpillCopy"; 642 case InputToRematerialization: 643 return "InputToRematerializationSpillCopy"; 644 case CallUse: 645 return "CallUseSpillCopy"; 646 case Bound: 647 return "BoundSpillCopy"; 648 default: 649 assert(false, "Must have valid spill type"); 650 return "MachSpillCopy"; 651 } 652 } 653 654 virtual const char *Name() const { 655 return spill_type(_spill_type); 656 } 657 658 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 659 #endif 660 }; 661 662 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values, 663 // however it doesn't have a control input and is more like a MergeMem. 664 // It is inserted after the register allocation is done to ensure that nodes use single 665 // definition of a multidef lrg in a block. 666 class MachMergeNode : public MachIdealNode { 667 public: 668 MachMergeNode(Node *n1) { 669 init_class_id(Class_MachMerge); 670 add_req(nullptr); 671 add_req(n1); 672 } 673 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); } 674 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); } 675 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); } 676 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); } 677 virtual uint oper_input_base() const { return 1; } 678 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { } 679 virtual uint size(PhaseRegAlloc *ra_) const { return 0; } 680 #ifndef PRODUCT 681 virtual const char *Name() const { return "MachMerge"; } 682 #endif 683 }; 684 685 //------------------------------MachBranchNode-------------------------------- 686 // Abstract machine branch Node 687 class MachBranchNode : public MachIdealNode { 688 public: 689 MachBranchNode() : MachIdealNode() { 690 init_class_id(Class_MachBranch); 691 } 692 virtual void label_set(Label* label, uint block_num) = 0; 693 virtual void save_label(Label** label, uint* block_num) = 0; 694 695 // Support for short branches 696 virtual MachNode *short_branch_version() { return nullptr; } 697 698 virtual bool pinned() const { return true; }; 699 }; 700 701 //------------------------------MachNullChkNode-------------------------------- 702 // Machine-dependent null-pointer-check Node. Points a real MachNode that is 703 // also some kind of memory op. Turns the indicated MachNode into a 704 // conditional branch with good latency on the ptr-not-null path and awful 705 // latency on the pointer-is-null path. 706 707 class MachNullCheckNode : public MachBranchNode { 708 public: 709 const uint _vidx; // Index of memop being tested 710 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { 711 init_class_id(Class_MachNullCheck); 712 add_req(ctrl); 713 add_req(memop); 714 } 715 virtual int Opcode() const; 716 virtual uint size_of() const { return sizeof(*this); } 717 718 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; 719 virtual void label_set(Label* label, uint block_num); 720 virtual void save_label(Label** label, uint* block_num); 721 virtual void negate() { } 722 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } 723 virtual uint ideal_reg() const { return NotAMachineReg; } 724 virtual const RegMask &in_RegMask(uint) const; 725 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } 726 #ifndef PRODUCT 727 virtual const char *Name() const { return "NullCheck"; } 728 virtual void format( PhaseRegAlloc *, outputStream *st ) const; 729 #endif 730 }; 731 732 //------------------------------MachProjNode---------------------------------- 733 // Machine-dependent Ideal projections (how is that for an oxymoron). Really 734 // just MachNodes made by the Ideal world that replicate simple projections 735 // but with machine-dependent input & output register masks. Generally 736 // produced as part of calling conventions. Normally I make MachNodes as part 737 // of the Matcher process, but the Matcher is ill suited to issues involving 738 // frame handling, so frame handling is all done in the Ideal world with 739 // occasional callbacks to the machine model for important info. 740 class MachProjNode : public ProjNode { 741 public: 742 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { 743 init_class_id(Class_MachProj); 744 } 745 RegMask _rout; 746 const uint _ideal_reg; 747 enum projType { 748 unmatched_proj = 0, // Projs for Control, I/O, memory not matched 749 fat_proj = 999 // Projs killing many regs, defined by _rout 750 }; 751 virtual int Opcode() const; 752 virtual const Type *bottom_type() const; 753 virtual const TypePtr *adr_type() const; 754 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } 755 virtual const RegMask &out_RegMask() const { return _rout; } 756 virtual uint ideal_reg() const { return _ideal_reg; } 757 // Need size_of() for virtual ProjNode::clone() 758 virtual uint size_of() const { return sizeof(MachProjNode); } 759 #ifndef PRODUCT 760 virtual void dump_spec(outputStream *st) const; 761 #endif 762 }; 763 764 //------------------------------MachIfNode------------------------------------- 765 // Machine-specific versions of IfNodes 766 class MachIfNode : public MachBranchNode { 767 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 768 public: 769 float _prob; // Probability branch goes either way 770 float _fcnt; // Frequency counter 771 MachIfNode() : MachBranchNode() { 772 init_class_id(Class_MachIf); 773 } 774 // Negate conditional branches. 775 virtual void negate() = 0; 776 #ifndef PRODUCT 777 virtual void dump_spec(outputStream *st) const; 778 #endif 779 }; 780 781 //------------------------------MachJumpNode----------------------------------- 782 // Machine-specific versions of JumpNodes 783 class MachJumpNode : public MachConstantNode { 784 public: 785 float* _probs; 786 MachJumpNode() : MachConstantNode() { 787 init_class_id(Class_MachJump); 788 } 789 }; 790 791 //------------------------------MachGotoNode----------------------------------- 792 // Machine-specific versions of GotoNodes 793 class MachGotoNode : public MachBranchNode { 794 public: 795 MachGotoNode() : MachBranchNode() { 796 init_class_id(Class_MachGoto); 797 } 798 }; 799 800 //------------------------------MachFastLockNode------------------------------------- 801 // Machine-specific versions of FastLockNodes 802 class MachFastLockNode : public MachNode { 803 virtual uint size_of() const { return sizeof(*this); } // Size is bigger 804 public: 805 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks 806 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks 807 MachFastLockNode() : MachNode() {} 808 }; 809 810 //------------------------------MachReturnNode-------------------------------- 811 // Machine-specific versions of subroutine returns 812 class MachReturnNode : public MachNode { 813 virtual uint size_of() const; // Size is bigger 814 public: 815 RegMask *_in_rms; // Input register masks, set during allocation 816 ReallocMark _nesting; // assertion check for reallocations 817 const TypePtr* _adr_type; // memory effects of call or return 818 MachReturnNode() : MachNode() { 819 init_class_id(Class_MachReturn); 820 _adr_type = TypePtr::BOTTOM; // the default: all of memory 821 } 822 823 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 824 825 virtual const RegMask &in_RegMask(uint) const; 826 virtual bool pinned() const { return true; }; 827 virtual const TypePtr *adr_type() const; 828 }; 829 830 //------------------------------MachSafePointNode----------------------------- 831 // Machine-specific versions of safepoints 832 class MachSafePointNode : public MachReturnNode { 833 public: 834 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC 835 JVMState* _jvms; // Pointer to list of JVM State Objects 836 uint _jvmadj; // Extra delta to jvms indexes (mach. args) 837 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States 838 OopMap* oop_map() const { return _oop_map; } 839 void set_oop_map(OopMap* om) { _oop_map = om; } 840 841 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) { 842 init_class_id(Class_MachSafePoint); 843 } 844 845 virtual JVMState* jvms() const { return _jvms; } 846 void set_jvms(JVMState* s) { 847 _jvms = s; 848 } 849 virtual const Type *bottom_type() const; 850 851 virtual const RegMask &in_RegMask(uint) const; 852 853 // Functionality from old debug nodes 854 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } 855 Node *frameptr () const { return in(TypeFunc::FramePtr); } 856 857 Node *local(const JVMState* jvms, uint idx) const { 858 assert(verify_jvms(jvms), "jvms must match"); 859 return in(_jvmadj + jvms->locoff() + idx); 860 } 861 Node *stack(const JVMState* jvms, uint idx) const { 862 assert(verify_jvms(jvms), "jvms must match"); 863 return in(_jvmadj + jvms->stkoff() + idx); 864 } 865 Node *monitor_obj(const JVMState* jvms, uint idx) const { 866 assert(verify_jvms(jvms), "jvms must match"); 867 return in(_jvmadj + jvms->monitor_obj_offset(idx)); 868 } 869 Node *monitor_box(const JVMState* jvms, uint idx) const { 870 assert(verify_jvms(jvms), "jvms must match"); 871 return in(_jvmadj + jvms->monitor_box_offset(idx)); 872 } 873 void set_local(const JVMState* jvms, uint idx, Node *c) { 874 assert(verify_jvms(jvms), "jvms must match"); 875 set_req(_jvmadj + jvms->locoff() + idx, c); 876 } 877 void set_stack(const JVMState* jvms, uint idx, Node *c) { 878 assert(verify_jvms(jvms), "jvms must match"); 879 set_req(_jvmadj + jvms->stkoff() + idx, c); 880 } 881 void set_monitor(const JVMState* jvms, uint idx, Node *c) { 882 assert(verify_jvms(jvms), "jvms must match"); 883 set_req(_jvmadj + jvms->monoff() + idx, c); 884 } 885 }; 886 887 //------------------------------MachCallNode---------------------------------- 888 // Machine-specific versions of subroutine calls 889 class MachCallNode : public MachSafePointNode { 890 protected: 891 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash 892 virtual bool cmp( const Node &n ) const; 893 virtual uint size_of() const = 0; // Size is bigger 894 public: 895 const TypeFunc *_tf; // Function type 896 address _entry_point; // Address of the method being called 897 float _cnt; // Estimate of number of times called 898 bool _guaranteed_safepoint; // Do we need to observe safepoint? 899 900 const TypeFunc* tf() const { return _tf; } 901 address entry_point() const { return _entry_point; } 902 float cnt() const { return _cnt; } 903 904 void set_tf(const TypeFunc* tf) { _tf = tf; } 905 void set_entry_point(address p) { _entry_point = p; } 906 void set_cnt(float c) { _cnt = c; } 907 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; } 908 909 MachCallNode() : MachSafePointNode() { 910 init_class_id(Class_MachCall); 911 } 912 913 virtual const Type *bottom_type() const; 914 virtual bool pinned() const { return false; } 915 virtual const Type* Value(PhaseGVN* phase) const; 916 virtual const RegMask &in_RegMask(uint) const; 917 virtual int ret_addr_offset() { return 0; } 918 919 NOT_LP64(bool return_value_is_used() const;) 920 921 // Similar to cousin class CallNode::returns_pointer 922 bool returns_pointer() const; 923 924 bool guaranteed_safepoint() const { return _guaranteed_safepoint; } 925 926 #ifndef PRODUCT 927 virtual void dump_spec(outputStream *st) const; 928 #endif 929 }; 930 931 //------------------------------MachCallJavaNode------------------------------ 932 // "Base" class for machine-specific versions of subroutine calls 933 class MachCallJavaNode : public MachCallNode { 934 protected: 935 virtual bool cmp( const Node &n ) const; 936 virtual uint size_of() const; // Size is bigger 937 public: 938 ciMethod* _method; // Method being direct called 939 bool _override_symbolic_info; // Override symbolic call site info from bytecode 940 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual 941 bool _method_handle_invoke; // Tells if the call has to preserve SP 942 bool _arg_escape; // ArgEscape in parameter list 943 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) { 944 init_class_id(Class_MachCallJava); 945 } 946 947 virtual const RegMask &in_RegMask(uint) const; 948 949 int resolved_method_index(CodeBuffer &cbuf) const { 950 if (_override_symbolic_info) { 951 // Attach corresponding Method* to the call site, so VM can use it during resolution 952 // instead of querying symbolic info from bytecode. 953 assert(_method != nullptr, "method should be set"); 954 assert(_method->constant_encoding()->is_method(), "should point to a Method"); 955 return cbuf.oop_recorder()->find_index(_method->constant_encoding()); 956 } 957 return 0; // Use symbolic info from bytecode (resolved_method is null). 958 } 959 960 #ifndef PRODUCT 961 virtual void dump_spec(outputStream *st) const; 962 #endif 963 }; 964 965 //------------------------------MachCallStaticJavaNode------------------------ 966 // Machine-specific versions of monomorphic subroutine calls 967 class MachCallStaticJavaNode : public MachCallJavaNode { 968 virtual bool cmp( const Node &n ) const; 969 virtual uint size_of() const; // Size is bigger 970 public: 971 const char *_name; // Runtime wrapper name 972 MachCallStaticJavaNode() : MachCallJavaNode() { 973 init_class_id(Class_MachCallStaticJava); 974 } 975 976 // If this is an uncommon trap, return the request code, else zero. 977 int uncommon_trap_request() const; 978 979 virtual int ret_addr_offset(); 980 #ifndef PRODUCT 981 virtual void dump_spec(outputStream *st) const; 982 void dump_trap_args(outputStream *st) const; 983 #endif 984 }; 985 986 //------------------------------MachCallDynamicJavaNode------------------------ 987 // Machine-specific versions of possibly megamorphic subroutine calls 988 class MachCallDynamicJavaNode : public MachCallJavaNode { 989 public: 990 int _vtable_index; 991 MachCallDynamicJavaNode() : MachCallJavaNode() { 992 init_class_id(Class_MachCallDynamicJava); 993 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized 994 } 995 virtual int ret_addr_offset(); 996 #ifndef PRODUCT 997 virtual void dump_spec(outputStream *st) const; 998 #endif 999 }; 1000 1001 //------------------------------MachCallRuntimeNode---------------------------- 1002 // Machine-specific versions of subroutine calls 1003 class MachCallRuntimeNode : public MachCallNode { 1004 virtual bool cmp( const Node &n ) const; 1005 virtual uint size_of() const; // Size is bigger 1006 public: 1007 const char *_name; // Printable name, if _method is null 1008 bool _leaf_no_fp; // Is this CallLeafNoFP? 1009 MachCallRuntimeNode() : MachCallNode() { 1010 init_class_id(Class_MachCallRuntime); 1011 } 1012 virtual int ret_addr_offset(); 1013 #ifndef PRODUCT 1014 virtual void dump_spec(outputStream *st) const; 1015 #endif 1016 }; 1017 1018 class MachCallLeafNode: public MachCallRuntimeNode { 1019 public: 1020 MachCallLeafNode() : MachCallRuntimeNode() { 1021 init_class_id(Class_MachCallLeaf); 1022 } 1023 }; 1024 1025 //------------------------------MachHaltNode----------------------------------- 1026 // Machine-specific versions of halt nodes 1027 class MachHaltNode : public MachReturnNode { 1028 public: 1029 bool _reachable; 1030 const char* _halt_reason; 1031 virtual JVMState* jvms() const; 1032 bool is_reachable() const { 1033 return _reachable; 1034 } 1035 }; 1036 1037 class MachMemBarNode : public MachNode { 1038 virtual uint size_of() const; // Size is bigger 1039 public: 1040 const TypePtr* _adr_type; // memory effects 1041 MachMemBarNode() : MachNode() { 1042 init_class_id(Class_MachMemBar); 1043 _adr_type = TypePtr::BOTTOM; // the default: all of memory 1044 } 1045 1046 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } 1047 virtual const TypePtr *adr_type() const; 1048 }; 1049 1050 1051 //------------------------------MachTempNode----------------------------------- 1052 // Node used by the adlc to construct inputs to represent temporary registers 1053 class MachTempNode : public MachNode { 1054 private: 1055 MachOper *_opnd_array[1]; 1056 1057 public: 1058 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } 1059 virtual uint rule() const { return 9999999; } 1060 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} 1061 1062 MachTempNode(MachOper* oper) { 1063 init_class_id(Class_MachTemp); 1064 _num_opnds = 1; 1065 _opnds = _opnd_array; 1066 add_req(nullptr); 1067 _opnds[0] = oper; 1068 } 1069 virtual uint size_of() const { return sizeof(MachTempNode); } 1070 1071 #ifndef PRODUCT 1072 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} 1073 virtual const char *Name() const { return "MachTemp";} 1074 #endif 1075 }; 1076 1077 1078 1079 //------------------------------labelOper-------------------------------------- 1080 // Machine-independent version of label operand 1081 class labelOper : public MachOper { 1082 private: 1083 virtual uint num_edges() const { return 0; } 1084 public: 1085 // Supported for fixed size branches 1086 Label* _label; // Label for branch(es) 1087 1088 uint _block_num; 1089 1090 labelOper() : _label(0), _block_num(0) {} 1091 1092 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} 1093 1094 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} 1095 1096 virtual MachOper *clone() const; 1097 1098 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; } 1099 1100 virtual uint opcode() const; 1101 1102 virtual uint hash() const; 1103 virtual bool cmp( const MachOper &oper ) const; 1104 #ifndef PRODUCT 1105 virtual const char *Name() const { return "Label";} 1106 1107 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; 1108 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1109 #endif 1110 }; 1111 1112 1113 //------------------------------methodOper-------------------------------------- 1114 // Machine-independent version of method operand 1115 class methodOper : public MachOper { 1116 private: 1117 virtual uint num_edges() const { return 0; } 1118 public: 1119 intptr_t _method; // Address of method 1120 methodOper() : _method(0) {} 1121 methodOper(intptr_t method) : _method(method) {} 1122 1123 virtual MachOper *clone() const; 1124 1125 virtual intptr_t method() const { return _method; } 1126 1127 virtual uint opcode() const; 1128 1129 virtual uint hash() const; 1130 virtual bool cmp( const MachOper &oper ) const; 1131 #ifndef PRODUCT 1132 virtual const char *Name() const { return "Method";} 1133 1134 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; 1135 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } 1136 #endif 1137 }; 1138 1139 #endif // SHARE_OPTO_MACHNODE_HPP