1 /*
   2  * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_OPTO_MACHNODE_HPP
  26 #define SHARE_OPTO_MACHNODE_HPP
  27 
  28 #include "opto/callnode.hpp"
  29 #include "opto/constantTable.hpp"
  30 #include "opto/matcher.hpp"
  31 #include "opto/multnode.hpp"
  32 #include "opto/node.hpp"
  33 #include "opto/regmask.hpp"
  34 #include "utilities/growableArray.hpp"
  35 
  36 class BufferBlob;
  37 class CodeBuffer;
  38 class JVMState;
  39 class MachCallDynamicJavaNode;
  40 class MachCallJavaNode;
  41 class MachCallLeafNode;
  42 class MachCallNativeNode;
  43 class MachCallNode;
  44 class MachCallRuntimeNode;
  45 class MachCallStaticJavaNode;
  46 class MachEpilogNode;
  47 class MachIfNode;
  48 class MachNullCheckNode;
  49 class MachOper;
  50 class MachProjNode;
  51 class MachPrologNode;
  52 class MachReturnNode;
  53 class MachSafePointNode;
  54 class MachSpillCopyNode;
  55 class Matcher;
  56 class PhaseRegAlloc;
  57 class RegMask;
  58 class RTMLockingCounters;
  59 class State;
  60 
  61 //---------------------------MachOper------------------------------------------
  62 class MachOper : public ResourceObj {
  63 public:
  64   // Allocate right next to the MachNodes in the same arena
  65   void *operator new(size_t x) throw() {
  66     Compile* C = Compile::current();
  67     return C->node_arena()->AmallocWords(x);
  68   }
  69 
  70   // Opcode
  71   virtual uint opcode() const = 0;
  72 
  73   // Number of input edges.
  74   // Generally at least 1
  75   virtual uint num_edges() const { return 1; }
  76   // Array of Register masks
  77   virtual const RegMask *in_RegMask(int index) const;
  78 
  79   // Methods to output the encoding of the operand
  80 
  81   // Negate conditional branches.  Error for non-branch Nodes
  82   virtual void negate();
  83 
  84   // Return the value requested
  85   // result register lookup, corresponding to int_format
  86   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  87   // input register lookup, corresponding to ext_format
  88   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  89 
  90   // helpers for MacroAssembler generation from ADLC
  91   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  92     return ::as_Register(reg(ra_, node));
  93   }
  94   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  95     return ::as_Register(reg(ra_, node, idx));
  96   }
  97   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  98     return ::as_FloatRegister(reg(ra_, node));
  99   }
 100   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 101     return ::as_FloatRegister(reg(ra_, node, idx));
 102   }
 103 
 104 #if defined(IA32) || defined(AMD64)
 105   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 106     return ::as_KRegister(reg(ra_, node));
 107   }
 108   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 109     return ::as_KRegister(reg(ra_, node, idx));
 110   }
 111   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 112     return ::as_XMMRegister(reg(ra_, node));
 113   }
 114   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 115     return ::as_XMMRegister(reg(ra_, node, idx));
 116   }
 117 #endif
 118   // CondRegister reg converter
 119 #if defined(PPC64)
 120   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
 121     return ::as_ConditionRegister(reg(ra_, node));
 122   }
 123   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 124     return ::as_ConditionRegister(reg(ra_, node, idx));
 125   }
 126   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
 127     return ::as_VectorRegister(reg(ra_, node));
 128   }
 129   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 130     return ::as_VectorRegister(reg(ra_, node, idx));
 131   }
 132   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
 133     return ::as_VectorSRegister(reg(ra_, node));
 134   }
 135   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 136     return ::as_VectorSRegister(reg(ra_, node, idx));
 137   }
 138 #endif
 139 
 140   virtual intptr_t  constant() const;
 141   virtual relocInfo::relocType constant_reloc() const;
 142   virtual jdouble constantD() const;
 143   virtual jfloat  constantF() const;
 144   virtual jlong   constantL() const;
 145   virtual TypeOopPtr *oop() const;
 146   virtual int  ccode() const;
 147   // A zero, default, indicates this value is not needed.
 148   // May need to lookup the base register, as done in int_ and ext_format
 149   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 150   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 151   virtual int  scale() const;
 152   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 153   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 154   // Check for PC-Relative displacement
 155   virtual relocInfo::relocType disp_reloc() const;
 156   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 157   virtual int  base_position()  const;  // base edge position, or -1
 158   virtual int  index_position() const;  // index edge position, or -1
 159 
 160   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 161   // Only returns non-null value for x86_32.ad's indOffset32X
 162   virtual const TypePtr *disp_as_type() const { return NULL; }
 163 
 164   // Return the label
 165   virtual Label *label() const;
 166 
 167   // Return the method's address
 168   virtual intptr_t  method() const;
 169 
 170   // Hash and compare over operands are currently identical
 171   virtual uint  hash() const;
 172   virtual bool  cmp( const MachOper &oper ) const;
 173 
 174   // Virtual clone, since I do not know how big the MachOper is.
 175   virtual MachOper *clone() const = 0;
 176 
 177   // Return ideal Type from simple operands.  Fail for complex operands.
 178   virtual const Type *type() const;
 179 
 180   // Set an integer offset if we have one, or error otherwise
 181   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 182 
 183 #ifndef PRODUCT
 184   // Return name of operand
 185   virtual const char    *Name() const { return "???";}
 186 
 187   // Methods to output the text version of the operand
 188   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 189   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 190 
 191   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 192 
 193   // Check whether o is a valid oper.
 194   static bool notAnOper(const MachOper *o) {
 195     if (o == NULL)                   return true;
 196     if (((intptr_t)o & 1) != 0)      return true;
 197     if (*(address*)o == badAddress)  return true;  // kill by Node::destruct
 198     return false;
 199   }
 200 #endif // !PRODUCT
 201 };
 202 
 203 //------------------------------MachNode---------------------------------------
 204 // Base type for all machine specific nodes.  All node classes generated by the
 205 // ADLC inherit from this class.
 206 class MachNode : public Node {
 207 private:
 208   bool _removed = false;
 209 
 210 public:
 211   MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(NULL) {
 212     init_class_id(Class_Mach);
 213   }
 214   // Required boilerplate
 215   virtual uint size_of() const { return sizeof(MachNode); }
 216   virtual int  Opcode() const;          // Always equal to MachNode
 217   virtual uint rule() const = 0;        // Machine-specific opcode
 218   // Number of inputs which come before the first operand.
 219   // Generally at least 1, to skip the Control input
 220   virtual uint oper_input_base() const { return 1; }
 221   // Position of constant base node in node's inputs. -1 if
 222   // no constant base node input.
 223   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 224 
 225   uint8_t barrier_data() const { return _barrier; }
 226   void set_barrier_data(uint8_t data) { _barrier = data; }
 227 
 228   // Copy inputs and operands to new node of instruction.
 229   // Called from cisc_version() and short_branch_version().
 230   // !!!! The method's body is defined in ad_<arch>.cpp file.
 231   void fill_new_machnode(MachNode *n) const;
 232 
 233   // Return an equivalent instruction using memory for cisc_operand position
 234   virtual MachNode *cisc_version(int offset);
 235   // Modify this instruction's register mask to use stack version for cisc_operand
 236   virtual void use_cisc_RegMask();
 237 
 238   // Support for short branches
 239   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 240 
 241   // Avoid back to back some instructions on some CPUs.
 242   enum AvoidBackToBackFlag { AVOID_NONE = 0,
 243                              AVOID_BEFORE = Flag_avoid_back_to_back_before,
 244                              AVOID_AFTER = Flag_avoid_back_to_back_after,
 245                              AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
 246 
 247   bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
 248     return (flags() & flag_value) == flag_value;
 249   }
 250 
 251   // instruction implemented with a call
 252   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 253 
 254   // First index in _in[] corresponding to operand, or -1 if there is none
 255   int  operand_index(uint operand) const;
 256   int  operand_index(const MachOper *oper) const;
 257   int  operand_index(Node* m) const;
 258 
 259   // Register class input is expected in
 260   virtual const RegMask &in_RegMask(uint) const;
 261 
 262   // cisc-spillable instructions redefine for use by in_RegMask
 263   virtual const RegMask *cisc_RegMask() const { return NULL; }
 264 
 265   // If this instruction is a 2-address instruction, then return the
 266   // index of the input which must match the output.  Not nessecary
 267   // for instructions which bind the input and output register to the
 268   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 269   // both an input and an output).  It is nessecary when the input and
 270   // output have choices - but they must use the same choice.
 271   virtual uint two_adr( ) const { return 0; }
 272 
 273   // The GC might require some barrier metadata for machine code emission.
 274   uint8_t _barrier;
 275 
 276   // Array of complex operand pointers.  Each corresponds to zero or
 277   // more leafs.  Must be set by MachNode constructor to point to an
 278   // internal array of MachOpers.  The MachOper array is sized by
 279   // specific MachNodes described in the ADL.
 280   uint _num_opnds;
 281   MachOper **_opnds;
 282   uint  num_opnds() const { return _num_opnds; }
 283 
 284   // Emit bytes into cbuf
 285   virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 286   // Expand node after register allocation.
 287   // Node is replaced by several nodes in the postalloc expand phase.
 288   // Corresponding methods are generated for nodes if they specify
 289   // postalloc_expand. See block.cpp for more documentation.
 290   virtual bool requires_postalloc_expand() const { return false; }
 291   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 292   // Size of instruction in bytes
 293   virtual uint  size(PhaseRegAlloc *ra_) const;
 294   // Helper function that computes size by emitting code
 295   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 296 
 297   // Return the alignment required (in units of relocInfo::addr_unit())
 298   // for this instruction (must be a power of 2)
 299   int           pd_alignment_required() const;
 300   virtual int   alignment_required() const { return pd_alignment_required(); }
 301 
 302   // Return the padding (in bytes) to be emitted before this
 303   // instruction to properly align it.
 304   virtual int   compute_padding(int current_offset) const;
 305 
 306   // Return number of relocatable values contained in this instruction
 307   virtual int   reloc() const { return 0; }
 308 
 309   // Return number of words used for double constants in this instruction
 310   virtual int   ins_num_consts() const { return 0; }
 311 
 312   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 313   virtual uint  hash() const;
 314   virtual bool  cmp( const Node &n ) const;
 315 
 316   // Expand method for MachNode, replaces nodes representing pseudo
 317   // instructions with a set of nodes which represent real machine
 318   // instructions and compute the same value.
 319   virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
 320 
 321   // Bottom_type call; value comes from operand0
 322   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 323   virtual uint ideal_reg() const {
 324     const Type *t = _opnds[0]->type();
 325     if (t == TypeInt::CC) {
 326       return Op_RegFlags;
 327     } else {
 328       return t->ideal_reg();
 329     }
 330   }
 331 
 332   // If this is a memory op, return the base pointer and fixed offset.
 333   // If there are no such, return NULL.  If there are multiple addresses
 334   // or the address is indeterminate (rare cases) then return (Node*)-1,
 335   // which serves as node bottom.
 336   // If the offset is not statically determined, set it to Type::OffsetBot.
 337   // This method is free to ignore stack slots if that helps.
 338   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 339   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 340   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 341 
 342   // Helper for get_base_and_disp: find the base and index input nodes.
 343   // Returns the MachOper as determined by memory_operand(), for use, if
 344   // needed by the caller. If (MachOper *)-1 is returned, base and index
 345   // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
 346   // index are set to NULL.
 347   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 348 
 349   // Helper for memory_inputs:  Which operand carries the necessary info?
 350   // By default, returns NULL, which means there is no such operand.
 351   // If it returns (MachOper*)-1, this means there are multiple memories.
 352   virtual const MachOper* memory_operand() const { return NULL; }
 353 
 354   // Call "get_base_and_disp" to decide which category of memory is used here.
 355   virtual const class TypePtr *adr_type() const;
 356 
 357   // Apply peephole rule(s) to this instruction
 358   virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted);
 359 
 360   // Top-level ideal Opcode matched
 361   virtual int ideal_Opcode()     const { return Op_Node; }
 362 
 363   // Adds the label for the case
 364   virtual void add_case_label( int switch_val, Label* blockLabel);
 365 
 366   // Set the absolute address for methods
 367   virtual void method_set( intptr_t addr );
 368 
 369   // Should we clone rather than spill this instruction?
 370   bool rematerialize() const;
 371 
 372   // Get the pipeline info
 373   static const Pipeline *pipeline_class();
 374   virtual const Pipeline *pipeline() const;
 375 
 376   // Returns true if this node is a check that can be implemented with a trap.
 377   virtual bool is_TrapBasedCheckNode() const { return false; }
 378   void set_removed() { _removed = true; }
 379   bool get_removed() { return _removed; }
 380 
 381 #ifndef PRODUCT
 382   virtual const char *Name() const = 0; // Machine-specific name
 383   virtual void dump_spec(outputStream *st) const; // Print per-node info
 384   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 385 #endif
 386 };
 387 
 388 //------------------------------MachIdealNode----------------------------
 389 // Machine specific versions of nodes that must be defined by user.
 390 // These are not converted by matcher from ideal nodes to machine nodes
 391 // but are inserted into the code by the compiler.
 392 class MachIdealNode : public MachNode {
 393 public:
 394   MachIdealNode( ) {}
 395 
 396   // Define the following defaults for non-matched machine nodes
 397   virtual uint oper_input_base() const { return 0; }
 398   virtual uint rule()            const { return 9999999; }
 399   virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
 400 };
 401 
 402 //------------------------------MachTypeNode----------------------------
 403 // Machine Nodes that need to retain a known Type.
 404 class MachTypeNode : public MachNode {
 405   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 406 public:
 407   MachTypeNode( ) {}
 408   const Type *_bottom_type;
 409 
 410   virtual const class Type *bottom_type() const { return _bottom_type; }
 411 #ifndef PRODUCT
 412   virtual void dump_spec(outputStream *st) const;
 413 #endif
 414 };
 415 
 416 //------------------------------MachBreakpointNode----------------------------
 417 // Machine breakpoint or interrupt Node
 418 class MachBreakpointNode : public MachIdealNode {
 419 public:
 420   MachBreakpointNode( ) {}
 421   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 422   virtual uint size(PhaseRegAlloc *ra_) const;
 423 
 424 #ifndef PRODUCT
 425   virtual const char *Name() const { return "Breakpoint"; }
 426   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 427 #endif
 428 };
 429 
 430 //------------------------------MachConstantBaseNode--------------------------
 431 // Machine node that represents the base address of the constant table.
 432 class MachConstantBaseNode : public MachIdealNode {
 433 public:
 434   static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
 435 
 436 public:
 437   MachConstantBaseNode() : MachIdealNode() {
 438     init_class_id(Class_MachConstantBase);
 439   }
 440   virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
 441   virtual uint ideal_reg() const { return Op_RegP; }
 442   virtual uint oper_input_base() const { return 1; }
 443 
 444   virtual bool requires_postalloc_expand() const;
 445   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 446 
 447   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 448   virtual uint size(PhaseRegAlloc* ra_) const;
 449 
 450   static const RegMask& static_out_RegMask() { return _out_RegMask; }
 451   virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
 452 
 453 #ifndef PRODUCT
 454   virtual const char* Name() const { return "MachConstantBaseNode"; }
 455   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 456 #endif
 457 };
 458 
 459 //------------------------------MachConstantNode-------------------------------
 460 // Machine node that holds a constant which is stored in the constant table.
 461 class MachConstantNode : public MachTypeNode {
 462 protected:
 463   ConstantTable::Constant _constant;  // This node's constant.
 464 
 465 public:
 466   MachConstantNode() : MachTypeNode() {
 467     init_class_id(Class_MachConstant);
 468   }
 469 
 470   virtual void eval_constant(Compile* C) {
 471 #ifdef ASSERT
 472     tty->print("missing MachConstantNode eval_constant function: ");
 473     dump();
 474 #endif
 475     ShouldNotCallThis();
 476   }
 477 
 478   virtual const RegMask &in_RegMask(uint idx) const {
 479     if (idx == mach_constant_base_node_input())
 480       return MachConstantBaseNode::static_out_RegMask();
 481     return MachNode::in_RegMask(idx);
 482   }
 483 
 484   // Input edge of MachConstantBaseNode.
 485   virtual uint mach_constant_base_node_input() const { return req() - 1; }
 486 
 487   int  constant_offset();
 488   int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
 489   // Unchecked version to avoid assertions in debug output.
 490   int  constant_offset_unchecked() const;
 491 };
 492 
 493 //------------------------------MachUEPNode-----------------------------------
 494 // Machine Unvalidated Entry Point Node
 495 class MachUEPNode : public MachIdealNode {
 496 public:
 497   MachUEPNode( ) {}
 498   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 499   virtual uint size(PhaseRegAlloc *ra_) const;
 500 
 501 #ifndef PRODUCT
 502   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 503   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 504 #endif
 505 };
 506 
 507 //------------------------------MachPrologNode--------------------------------
 508 // Machine function Prolog Node
 509 class MachPrologNode : public MachIdealNode {
 510 public:
 511   MachPrologNode( ) {}
 512   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 513   virtual uint size(PhaseRegAlloc *ra_) const;
 514   virtual int reloc() const;
 515 
 516 #ifndef PRODUCT
 517   virtual const char *Name() const { return "Prolog"; }
 518   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 519 #endif
 520 };
 521 
 522 //------------------------------MachEpilogNode--------------------------------
 523 // Machine function Epilog Node
 524 class MachEpilogNode : public MachIdealNode {
 525 public:
 526   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 527   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 528   virtual uint size(PhaseRegAlloc *ra_) const;
 529   virtual int reloc() const;
 530   virtual const Pipeline *pipeline() const;
 531 
 532 private:
 533   bool _do_polling;
 534 
 535 public:
 536   bool do_polling() const { return _do_polling; }
 537 
 538 #ifndef PRODUCT
 539   virtual const char *Name() const { return "Epilog"; }
 540   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 541 #endif
 542 };
 543 
 544 //------------------------------MachNopNode-----------------------------------
 545 // Machine function Nop Node
 546 class MachNopNode : public MachIdealNode {
 547 private:
 548   int _count;
 549 public:
 550   MachNopNode( ) : _count(1) {}
 551   MachNopNode( int count ) : _count(count) {}
 552   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 553   virtual uint size(PhaseRegAlloc *ra_) const;
 554 
 555   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 556 
 557   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 558   virtual const Pipeline *pipeline() const;
 559 #ifndef PRODUCT
 560   virtual const char *Name() const { return "Nop"; }
 561   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 562   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 563 #endif
 564 };
 565 
 566 //------------------------------MachSpillCopyNode------------------------------
 567 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 568 // location (stack or register).
 569 class MachSpillCopyNode : public MachIdealNode {
 570 public:
 571   enum SpillType {
 572     TwoAddress,                        // Inserted when coalescing of a two-address-instruction node and its input fails
 573     PhiInput,                          // Inserted when coalescing of a phi node and its input fails
 574     DebugUse,                          // Inserted as debug info spills to safepoints in non-frequent blocks
 575     LoopPhiInput,                      // Pre-split compares of loop-phis
 576     Definition,                        // An lrg marked as spilled will be spilled to memory right after its definition,
 577                                        // if in high pressure region or the lrg is bound
 578     RegToReg,                          // A register to register move
 579     RegToMem,                          // A register to memory move
 580     MemToReg,                          // A memory to register move
 581     PhiLocationDifferToInputLocation,  // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
 582                                        // the phi and its input resides at different locations (i.e. reg or mem)
 583     BasePointerToMem,                  // Spill base pointer to memory at safepoint
 584     InputToRematerialization,          // When rematerializing a node we stretch the inputs live ranges, and they might be
 585                                        // stretched beyond a new definition point, therefore we split out new copies instead
 586     CallUse,                           // Spill use at a call
 587     Bound                              // An lrg marked as spill that is bound and needs to be spilled at a use
 588   };
 589 private:
 590   const RegMask *_in;           // RegMask for input
 591   const RegMask *_out;          // RegMask for output
 592   const Type *_type;
 593   const SpillType _spill_type;
 594 public:
 595   MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
 596     MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
 597     init_class_id(Class_MachSpillCopy);
 598     init_flags(Flag_is_Copy);
 599     add_req(NULL);
 600     add_req(n);
 601   }
 602   virtual uint size_of() const { return sizeof(*this); }
 603   void set_out_RegMask(const RegMask &out) { _out = &out; }
 604   void set_in_RegMask(const RegMask &in) { _in = &in; }
 605   virtual const RegMask &out_RegMask() const { return *_out; }
 606   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 607   virtual const class Type *bottom_type() const { return _type; }
 608   virtual uint ideal_reg() const { return _type->ideal_reg(); }
 609   virtual uint oper_input_base() const { return 1; }
 610   uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 611 
 612   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 613   virtual uint size(PhaseRegAlloc *ra_) const;
 614 
 615 
 616 #ifndef PRODUCT
 617   static const char *spill_type(SpillType st) {
 618     switch (st) {
 619       case TwoAddress:
 620         return "TwoAddressSpillCopy";
 621       case PhiInput:
 622         return "PhiInputSpillCopy";
 623       case DebugUse:
 624         return "DebugUseSpillCopy";
 625       case LoopPhiInput:
 626         return "LoopPhiInputSpillCopy";
 627       case Definition:
 628         return "DefinitionSpillCopy";
 629       case RegToReg:
 630         return "RegToRegSpillCopy";
 631       case RegToMem:
 632         return "RegToMemSpillCopy";
 633       case MemToReg:
 634         return "MemToRegSpillCopy";
 635       case PhiLocationDifferToInputLocation:
 636         return "PhiLocationDifferToInputLocationSpillCopy";
 637       case BasePointerToMem:
 638         return "BasePointerToMemSpillCopy";
 639       case InputToRematerialization:
 640         return "InputToRematerializationSpillCopy";
 641       case CallUse:
 642         return "CallUseSpillCopy";
 643       case Bound:
 644         return "BoundSpillCopy";
 645       default:
 646         assert(false, "Must have valid spill type");
 647         return "MachSpillCopy";
 648     }
 649   }
 650 
 651   virtual const char *Name() const {
 652     return spill_type(_spill_type);
 653   }
 654 
 655   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 656 #endif
 657 };
 658 
 659 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
 660 // however it doesn't have a control input and is more like a MergeMem.
 661 // It is inserted after the register allocation is done to ensure that nodes use single
 662 // definition of a multidef lrg in a block.
 663 class MachMergeNode : public MachIdealNode {
 664 public:
 665   MachMergeNode(Node *n1) {
 666     init_class_id(Class_MachMerge);
 667     add_req(NULL);
 668     add_req(n1);
 669   }
 670   virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
 671   virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
 672   virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
 673   virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
 674   virtual uint oper_input_base() const { return 1; }
 675   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { }
 676   virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
 677 #ifndef PRODUCT
 678   virtual const char *Name() const { return "MachMerge"; }
 679 #endif
 680 };
 681 
 682 //------------------------------MachBranchNode--------------------------------
 683 // Abstract machine branch Node
 684 class MachBranchNode : public MachIdealNode {
 685 public:
 686   MachBranchNode() : MachIdealNode() {
 687     init_class_id(Class_MachBranch);
 688   }
 689   virtual void label_set(Label* label, uint block_num) = 0;
 690   virtual void save_label(Label** label, uint* block_num) = 0;
 691 
 692   // Support for short branches
 693   virtual MachNode *short_branch_version() { return NULL; }
 694 
 695   virtual bool pinned() const { return true; };
 696 };
 697 
 698 //------------------------------MachNullChkNode--------------------------------
 699 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 700 // also some kind of memory op.  Turns the indicated MachNode into a
 701 // conditional branch with good latency on the ptr-not-null path and awful
 702 // latency on the pointer-is-null path.
 703 
 704 class MachNullCheckNode : public MachBranchNode {
 705 public:
 706   const uint _vidx;             // Index of memop being tested
 707   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
 708     init_class_id(Class_MachNullCheck);
 709     add_req(ctrl);
 710     add_req(memop);
 711   }
 712   virtual int Opcode() const;
 713   virtual uint size_of() const { return sizeof(*this); }
 714 
 715   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 716   virtual void label_set(Label* label, uint block_num);
 717   virtual void save_label(Label** label, uint* block_num);
 718   virtual void negate() { }
 719   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 720   virtual uint ideal_reg() const { return NotAMachineReg; }
 721   virtual const RegMask &in_RegMask(uint) const;
 722   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 723 #ifndef PRODUCT
 724   virtual const char *Name() const { return "NullCheck"; }
 725   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 726 #endif
 727 };
 728 
 729 //------------------------------MachProjNode----------------------------------
 730 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 731 // just MachNodes made by the Ideal world that replicate simple projections
 732 // but with machine-dependent input & output register masks.  Generally
 733 // produced as part of calling conventions.  Normally I make MachNodes as part
 734 // of the Matcher process, but the Matcher is ill suited to issues involving
 735 // frame handling, so frame handling is all done in the Ideal world with
 736 // occasional callbacks to the machine model for important info.
 737 class MachProjNode : public ProjNode {
 738 public:
 739   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
 740     init_class_id(Class_MachProj);
 741   }
 742   RegMask _rout;
 743   const uint  _ideal_reg;
 744   enum projType {
 745     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 746     fat_proj       = 999        // Projs killing many regs, defined by _rout
 747   };
 748   virtual int   Opcode() const;
 749   virtual const Type *bottom_type() const;
 750   virtual const TypePtr *adr_type() const;
 751   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 752   virtual const RegMask &out_RegMask() const { return _rout; }
 753   virtual uint  ideal_reg() const { return _ideal_reg; }
 754   // Need size_of() for virtual ProjNode::clone()
 755   virtual uint  size_of() const { return sizeof(MachProjNode); }
 756 #ifndef PRODUCT
 757   virtual void dump_spec(outputStream *st) const;
 758 #endif
 759 };
 760 
 761 //------------------------------MachIfNode-------------------------------------
 762 // Machine-specific versions of IfNodes
 763 class MachIfNode : public MachBranchNode {
 764   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 765 public:
 766   float _prob;                  // Probability branch goes either way
 767   float _fcnt;                  // Frequency counter
 768   MachIfNode() : MachBranchNode() {
 769     init_class_id(Class_MachIf);
 770   }
 771   // Negate conditional branches.
 772   virtual void negate() = 0;
 773 #ifndef PRODUCT
 774   virtual void dump_spec(outputStream *st) const;
 775 #endif
 776 };
 777 
 778 //------------------------------MachJumpNode-----------------------------------
 779 // Machine-specific versions of JumpNodes
 780 class MachJumpNode : public MachConstantNode {
 781 public:
 782   float* _probs;
 783   MachJumpNode() : MachConstantNode() {
 784     init_class_id(Class_MachJump);
 785   }
 786 };
 787 
 788 //------------------------------MachGotoNode-----------------------------------
 789 // Machine-specific versions of GotoNodes
 790 class MachGotoNode : public MachBranchNode {
 791 public:
 792   MachGotoNode() : MachBranchNode() {
 793     init_class_id(Class_MachGoto);
 794   }
 795 };
 796 
 797 //------------------------------MachFastLockNode-------------------------------------
 798 // Machine-specific versions of FastLockNodes
 799 class MachFastLockNode : public MachNode {
 800   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 801 public:
 802   RTMLockingCounters*       _rtm_counters; // RTM lock counters for inflated locks
 803   RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
 804   MachFastLockNode() : MachNode() {}
 805 };
 806 
 807 //------------------------------MachReturnNode--------------------------------
 808 // Machine-specific versions of subroutine returns
 809 class MachReturnNode : public MachNode {
 810   virtual uint size_of() const; // Size is bigger
 811 public:
 812   RegMask *_in_rms;             // Input register masks, set during allocation
 813   ReallocMark _nesting;         // assertion check for reallocations
 814   const TypePtr* _adr_type;     // memory effects of call or return
 815   MachReturnNode() : MachNode() {
 816     init_class_id(Class_MachReturn);
 817     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 818   }
 819 
 820   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 821 
 822   virtual const RegMask &in_RegMask(uint) const;
 823   virtual bool pinned() const { return true; };
 824   virtual const TypePtr *adr_type() const;
 825 };
 826 
 827 //------------------------------MachSafePointNode-----------------------------
 828 // Machine-specific versions of safepoints
 829 class MachSafePointNode : public MachReturnNode {
 830 public:
 831   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 832   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 833   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 834   bool            _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
 835   OopMap*         oop_map() const { return _oop_map; }
 836   void            set_oop_map(OopMap* om) { _oop_map = om; }
 837 
 838   MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0), _has_ea_local_in_scope(false) {
 839     init_class_id(Class_MachSafePoint);
 840   }
 841 
 842   virtual JVMState* jvms() const { return _jvms; }
 843   void set_jvms(JVMState* s) {
 844     _jvms = s;
 845   }
 846   virtual const Type    *bottom_type() const;
 847 
 848   virtual const RegMask &in_RegMask(uint) const;
 849 
 850   // Functionality from old debug nodes
 851   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 852   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 853 
 854   Node *local(const JVMState* jvms, uint idx) const {
 855     assert(verify_jvms(jvms), "jvms must match");
 856     return in(_jvmadj + jvms->locoff() + idx);
 857   }
 858   Node *stack(const JVMState* jvms, uint idx) const {
 859     assert(verify_jvms(jvms), "jvms must match");
 860     return in(_jvmadj + jvms->stkoff() + idx);
 861  }
 862   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 863     assert(verify_jvms(jvms), "jvms must match");
 864     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 865   }
 866   Node *monitor_box(const JVMState* jvms, uint idx) const {
 867     assert(verify_jvms(jvms), "jvms must match");
 868     return in(_jvmadj + jvms->monitor_box_offset(idx));
 869   }
 870   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 871     assert(verify_jvms(jvms), "jvms must match");
 872     set_req(_jvmadj + jvms->locoff() + idx, c);
 873   }
 874   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 875     assert(verify_jvms(jvms), "jvms must match");
 876     set_req(_jvmadj + jvms->stkoff() + idx, c);
 877   }
 878   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 879     assert(verify_jvms(jvms), "jvms must match");
 880     set_req(_jvmadj + jvms->monoff() + idx, c);
 881   }
 882 };
 883 
 884 //------------------------------MachCallNode----------------------------------
 885 // Machine-specific versions of subroutine calls
 886 class MachCallNode : public MachSafePointNode {
 887 protected:
 888   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 889   virtual bool cmp( const Node &n ) const;
 890   virtual uint size_of() const = 0; // Size is bigger
 891 public:
 892   const TypeFunc *_tf;        // Function type
 893   address      _entry_point;  // Address of the method being called
 894   float        _cnt;          // Estimate of number of times called
 895   bool         _guaranteed_safepoint; // Do we need to observe safepoint?
 896 
 897   const TypeFunc* tf()        const { return _tf; }
 898   const address entry_point() const { return _entry_point; }
 899   const float   cnt()         const { return _cnt; }
 900 
 901   void set_tf(const TypeFunc* tf)       { _tf = tf; }
 902   void set_entry_point(address p)       { _entry_point = p; }
 903   void set_cnt(float c)                 { _cnt = c; }
 904   void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
 905 
 906   MachCallNode() : MachSafePointNode() {
 907     init_class_id(Class_MachCall);
 908   }
 909 
 910   virtual const Type *bottom_type() const;
 911   virtual bool  pinned() const { return false; }
 912   virtual const Type* Value(PhaseGVN* phase) const;
 913   virtual const RegMask &in_RegMask(uint) const;
 914   virtual int ret_addr_offset() { return 0; }
 915 
 916   NOT_LP64(bool return_value_is_used() const;)
 917 
 918   // Similar to cousin class CallNode::returns_pointer
 919   bool returns_pointer() const;
 920 
 921   bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
 922 
 923 #ifndef PRODUCT
 924   virtual void dump_spec(outputStream *st) const;
 925 #endif
 926 };
 927 
 928 //------------------------------MachCallJavaNode------------------------------
 929 // "Base" class for machine-specific versions of subroutine calls
 930 class MachCallJavaNode : public MachCallNode {
 931 protected:
 932   virtual bool cmp( const Node &n ) const;
 933   virtual uint size_of() const; // Size is bigger
 934 public:
 935   ciMethod* _method;                 // Method being direct called
 936   bool      _override_symbolic_info; // Override symbolic call site info from bytecode
 937   bool      _optimized_virtual;      // Tells if node is a static call or an optimized virtual
 938   bool      _method_handle_invoke;   // Tells if the call has to preserve SP
 939   bool      _arg_escape;             // ArgEscape in parameter list
 940   MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
 941     init_class_id(Class_MachCallJava);
 942   }
 943 
 944   virtual const RegMask &in_RegMask(uint) const;
 945 
 946   int resolved_method_index(CodeBuffer &cbuf) const {
 947     if (_override_symbolic_info) {
 948       // Attach corresponding Method* to the call site, so VM can use it during resolution
 949       // instead of querying symbolic info from bytecode.
 950       assert(_method != NULL, "method should be set");
 951       assert(_method->constant_encoding()->is_method(), "should point to a Method");
 952       return cbuf.oop_recorder()->find_index(_method->constant_encoding());
 953     }
 954     return 0; // Use symbolic info from bytecode (resolved_method == NULL).
 955   }
 956 
 957 #ifndef PRODUCT
 958   virtual void dump_spec(outputStream *st) const;
 959 #endif
 960 };
 961 
 962 //------------------------------MachCallStaticJavaNode------------------------
 963 // Machine-specific versions of monomorphic subroutine calls
 964 class MachCallStaticJavaNode : public MachCallJavaNode {
 965   virtual bool cmp( const Node &n ) const;
 966   virtual uint size_of() const; // Size is bigger
 967 public:
 968   const char *_name;            // Runtime wrapper name
 969   MachCallStaticJavaNode() : MachCallJavaNode() {
 970     init_class_id(Class_MachCallStaticJava);
 971   }
 972 
 973   // If this is an uncommon trap, return the request code, else zero.
 974   int uncommon_trap_request() const;
 975 
 976   virtual int ret_addr_offset();
 977 #ifndef PRODUCT
 978   virtual void dump_spec(outputStream *st) const;
 979   void dump_trap_args(outputStream *st) const;
 980 #endif
 981 };
 982 
 983 //------------------------------MachCallDynamicJavaNode------------------------
 984 // Machine-specific versions of possibly megamorphic subroutine calls
 985 class MachCallDynamicJavaNode : public MachCallJavaNode {
 986 public:
 987   int _vtable_index;
 988   MachCallDynamicJavaNode() : MachCallJavaNode() {
 989     init_class_id(Class_MachCallDynamicJava);
 990     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
 991   }
 992   virtual int ret_addr_offset();
 993 #ifndef PRODUCT
 994   virtual void dump_spec(outputStream *st) const;
 995 #endif
 996 };
 997 
 998 //------------------------------MachCallRuntimeNode----------------------------
 999 // Machine-specific versions of subroutine calls
1000 class MachCallRuntimeNode : public MachCallNode {
1001   virtual bool cmp( const Node &n ) const;
1002   virtual uint size_of() const; // Size is bigger
1003 public:
1004   const char *_name;            // Printable name, if _method is NULL
1005   bool _leaf_no_fp;             // Is this CallLeafNoFP?
1006   MachCallRuntimeNode() : MachCallNode() {
1007     init_class_id(Class_MachCallRuntime);
1008   }
1009   virtual int ret_addr_offset();
1010 #ifndef PRODUCT
1011   virtual void dump_spec(outputStream *st) const;
1012 #endif
1013 };
1014 
1015 class MachCallLeafNode: public MachCallRuntimeNode {
1016 public:
1017   MachCallLeafNode() : MachCallRuntimeNode() {
1018     init_class_id(Class_MachCallLeaf);
1019   }
1020 };
1021 
1022 class MachCallNativeNode: public MachCallNode {
1023   virtual bool cmp( const Node &n ) const;
1024   virtual uint size_of() const;
1025   void print_regs(const GrowableArray<VMReg>& regs, outputStream* st) const;
1026 public:
1027   const char *_name;
1028   GrowableArray<VMReg> _arg_regs;
1029   GrowableArray<VMReg> _ret_regs;
1030 
1031   MachCallNativeNode() : MachCallNode() {
1032     init_class_id(Class_MachCallNative);
1033   }
1034 
1035   virtual int ret_addr_offset();
1036 #ifndef PRODUCT
1037   virtual void dump_spec(outputStream *st) const;
1038 #endif
1039 };
1040 
1041 //------------------------------MachHaltNode-----------------------------------
1042 // Machine-specific versions of halt nodes
1043 class MachHaltNode : public MachReturnNode {
1044 public:
1045   bool _reachable;
1046   const char* _halt_reason;
1047   virtual JVMState* jvms() const;
1048   bool is_reachable() const {
1049     return _reachable;
1050   }
1051 };
1052 
1053 class MachMemBarNode : public MachNode {
1054   virtual uint size_of() const; // Size is bigger
1055 public:
1056   const TypePtr* _adr_type;     // memory effects
1057   MachMemBarNode() : MachNode() {
1058     init_class_id(Class_MachMemBar);
1059     _adr_type = TypePtr::BOTTOM; // the default: all of memory
1060   }
1061 
1062   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1063   virtual const TypePtr *adr_type() const;
1064 };
1065 
1066 
1067 //------------------------------MachTempNode-----------------------------------
1068 // Node used by the adlc to construct inputs to represent temporary registers
1069 class MachTempNode : public MachNode {
1070 private:
1071   MachOper *_opnd_array[1];
1072 
1073 public:
1074   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1075   virtual uint rule() const { return 9999999; }
1076   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
1077 
1078   MachTempNode(MachOper* oper) {
1079     init_class_id(Class_MachTemp);
1080     _num_opnds = 1;
1081     _opnds = _opnd_array;
1082     add_req(NULL);
1083     _opnds[0] = oper;
1084   }
1085   virtual uint size_of() const { return sizeof(MachTempNode); }
1086 
1087 #ifndef PRODUCT
1088   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1089   virtual const char *Name() const { return "MachTemp";}
1090 #endif
1091 };
1092 
1093 
1094 
1095 //------------------------------labelOper--------------------------------------
1096 // Machine-independent version of label operand
1097 class labelOper : public MachOper {
1098 private:
1099   virtual uint           num_edges() const { return 0; }
1100 public:
1101   // Supported for fixed size branches
1102   Label* _label;                // Label for branch(es)
1103 
1104   uint _block_num;
1105 
1106   labelOper() : _label(0), _block_num(0) {}
1107 
1108   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1109 
1110   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1111 
1112   virtual MachOper *clone() const;
1113 
1114   virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
1115 
1116   virtual uint           opcode() const;
1117 
1118   virtual uint           hash()   const;
1119   virtual bool           cmp( const MachOper &oper ) const;
1120 #ifndef PRODUCT
1121   virtual const char    *Name()   const { return "Label";}
1122 
1123   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1124   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1125 #endif
1126 };
1127 
1128 
1129 //------------------------------methodOper--------------------------------------
1130 // Machine-independent version of method operand
1131 class methodOper : public MachOper {
1132 private:
1133   virtual uint           num_edges() const { return 0; }
1134 public:
1135   intptr_t _method;             // Address of method
1136   methodOper() :   _method(0) {}
1137   methodOper(intptr_t method) : _method(method)  {}
1138 
1139   virtual MachOper *clone() const;
1140 
1141   virtual intptr_t method() const { return _method; }
1142 
1143   virtual uint           opcode() const;
1144 
1145   virtual uint           hash()   const;
1146   virtual bool           cmp( const MachOper &oper ) const;
1147 #ifndef PRODUCT
1148   virtual const char    *Name()   const { return "Method";}
1149 
1150   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1151   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1152 #endif
1153 };
1154 
1155 #endif // SHARE_OPTO_MACHNODE_HPP