1 /*
   2  * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_OPTO_MACHNODE_HPP
  26 #define SHARE_OPTO_MACHNODE_HPP
  27 
  28 #include "opto/callnode.hpp"
  29 #include "opto/constantTable.hpp"
  30 #include "opto/matcher.hpp"
  31 #include "opto/multnode.hpp"
  32 #include "opto/node.hpp"
  33 #include "opto/regmask.hpp"
  34 #include "utilities/growableArray.hpp"
  35 
  36 class BufferBlob;
  37 class CodeBuffer;
  38 class JVMState;
  39 class MachCallDynamicJavaNode;
  40 class MachCallJavaNode;
  41 class MachCallLeafNode;
  42 class MachCallNode;
  43 class MachCallRuntimeNode;
  44 class MachCallStaticJavaNode;
  45 class MachEpilogNode;
  46 class MachIfNode;
  47 class MachNullCheckNode;
  48 class MachOper;
  49 class MachProjNode;
  50 class MachPrologNode;
  51 class MachReturnNode;
  52 class MachSafePointNode;
  53 class MachSpillCopyNode;
  54 class MachVEPNode;
  55 class Matcher;
  56 class PhaseRegAlloc;
  57 class RegMask;
  58 class RTMLockingCounters;
  59 class State;
  60 
  61 //---------------------------MachOper------------------------------------------
  62 class MachOper : public ResourceObj {
  63 public:
  64   // Allocate right next to the MachNodes in the same arena
  65   void *operator new(size_t x) throw() {
  66     Compile* C = Compile::current();
  67     return C->node_arena()->AmallocWords(x);
  68   }
  69 
  70   // Opcode
  71   virtual uint opcode() const = 0;
  72 
  73   // Number of input edges.
  74   // Generally at least 1
  75   virtual uint num_edges() const { return 1; }
  76   // Array of Register masks
  77   virtual const RegMask *in_RegMask(int index) const;
  78 
  79   // Methods to output the encoding of the operand
  80 
  81   // Negate conditional branches.  Error for non-branch Nodes
  82   virtual void negate();
  83 
  84   // Return the value requested
  85   // result register lookup, corresponding to int_format
  86   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  87   // input register lookup, corresponding to ext_format
  88   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  89 
  90   // helpers for MacroAssembler generation from ADLC
  91   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  92     return ::as_Register(reg(ra_, node));
  93   }
  94   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  95     return ::as_Register(reg(ra_, node, idx));
  96   }
  97   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  98     return ::as_FloatRegister(reg(ra_, node));
  99   }
 100   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 101     return ::as_FloatRegister(reg(ra_, node, idx));
 102   }
 103 
 104 #if defined(IA32) || defined(AMD64)
 105   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 106     return ::as_KRegister(reg(ra_, node));
 107   }
 108   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 109     return ::as_KRegister(reg(ra_, node, idx));
 110   }
 111   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 112     return ::as_XMMRegister(reg(ra_, node));
 113   }
 114   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 115     return ::as_XMMRegister(reg(ra_, node, idx));
 116   }
 117 #endif
 118   // CondRegister reg converter
 119 #if defined(PPC64)
 120   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
 121     return ::as_ConditionRegister(reg(ra_, node));
 122   }
 123   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 124     return ::as_ConditionRegister(reg(ra_, node, idx));
 125   }
 126   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
 127     return ::as_VectorRegister(reg(ra_, node));
 128   }
 129   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 130     return ::as_VectorRegister(reg(ra_, node, idx));
 131   }
 132   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
 133     return ::as_VectorSRegister(reg(ra_, node));
 134   }
 135   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 136     return ::as_VectorSRegister(reg(ra_, node, idx));
 137   }
 138 #endif
 139 #if defined(AARCH64)
 140   PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
 141     return ::as_PRegister(reg(ra_, node));
 142   }
 143   PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
 144     return ::as_PRegister(reg(ra_, node, idx));
 145   }
 146 #endif
 147 
 148   virtual intptr_t  constant() const;
 149   virtual relocInfo::relocType constant_reloc() const;
 150   virtual jdouble constantD() const;
 151   virtual jfloat  constantF() const;
 152   virtual jlong   constantL() const;
 153   virtual TypeOopPtr *oop() const;
 154   virtual int  ccode() const;
 155   // A zero, default, indicates this value is not needed.
 156   // May need to lookup the base register, as done in int_ and ext_format
 157   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 158   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 159   virtual int  scale() const;
 160   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 161   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 162   // Check for PC-Relative displacement
 163   virtual relocInfo::relocType disp_reloc() const;
 164   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 165   virtual int  base_position()  const;  // base edge position, or -1
 166   virtual int  index_position() const;  // index edge position, or -1
 167 
 168   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 169   // Only returns non-null value for x86_32.ad's indOffset32X
 170   virtual const TypePtr *disp_as_type() const { return NULL; }
 171 
 172   // Return the label
 173   virtual Label *label() const;
 174 
 175   // Return the method's address
 176   virtual intptr_t  method() const;
 177 
 178   // Hash and compare over operands are currently identical
 179   virtual uint  hash() const;
 180   virtual bool  cmp( const MachOper &oper ) const;
 181 
 182   // Virtual clone, since I do not know how big the MachOper is.
 183   virtual MachOper *clone() const = 0;
 184 
 185   // Return ideal Type from simple operands.  Fail for complex operands.
 186   virtual const Type *type() const;
 187 
 188   // Set an integer offset if we have one, or error otherwise
 189   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 190 
 191 #ifndef PRODUCT
 192   // Return name of operand
 193   virtual const char    *Name() const { return "???";}
 194 
 195   // Methods to output the text version of the operand
 196   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 197   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 198 
 199   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 200 
 201   // Check whether o is a valid oper.
 202   static bool notAnOper(const MachOper *o) {
 203     if (o == NULL)                   return true;
 204     if (((intptr_t)o & 1) != 0)      return true;
 205     if (*(address*)o == badAddress)  return true;  // kill by Node::destruct
 206     return false;
 207   }
 208 #endif // !PRODUCT
 209 };
 210 
 211 //------------------------------MachNode---------------------------------------
 212 // Base type for all machine specific nodes.  All node classes generated by the
 213 // ADLC inherit from this class.
 214 class MachNode : public Node {
 215 public:
 216   MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(NULL) {
 217     init_class_id(Class_Mach);
 218   }
 219   // Required boilerplate
 220   virtual uint size_of() const { return sizeof(MachNode); }
 221   virtual int  Opcode() const;          // Always equal to MachNode
 222   virtual uint rule() const = 0;        // Machine-specific opcode
 223   // Number of inputs which come before the first operand.
 224   // Generally at least 1, to skip the Control input
 225   virtual uint oper_input_base() const { return 1; }
 226   // Position of constant base node in node's inputs. -1 if
 227   // no constant base node input.
 228   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 229 
 230   uint8_t barrier_data() const { return _barrier; }
 231   void set_barrier_data(uint8_t data) { _barrier = data; }
 232 
 233   // Copy inputs and operands to new node of instruction.
 234   // Called from cisc_version() and short_branch_version().
 235   // !!!! The method's body is defined in ad_<arch>.cpp file.
 236   void fill_new_machnode(MachNode *n) const;
 237 
 238   // Return an equivalent instruction using memory for cisc_operand position
 239   virtual MachNode *cisc_version(int offset);
 240   // Modify this instruction's register mask to use stack version for cisc_operand
 241   virtual void use_cisc_RegMask();
 242 
 243   // Support for short branches
 244   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 245 
 246   // Avoid back to back some instructions on some CPUs.
 247   enum AvoidBackToBackFlag { AVOID_NONE = 0,
 248                              AVOID_BEFORE = Flag_avoid_back_to_back_before,
 249                              AVOID_AFTER = Flag_avoid_back_to_back_after,
 250                              AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
 251 
 252   bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
 253     return (flags() & flag_value) == flag_value;
 254   }
 255 
 256   // instruction implemented with a call
 257   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 258 
 259   // First index in _in[] corresponding to operand, or -1 if there is none
 260   int  operand_index(uint operand) const;
 261   int  operand_index(const MachOper *oper) const;
 262   int  operand_index(Node* m) const;
 263 
 264   // Register class input is expected in
 265   virtual const RegMask &in_RegMask(uint) const;
 266 
 267   // cisc-spillable instructions redefine for use by in_RegMask
 268   virtual const RegMask *cisc_RegMask() const { return NULL; }
 269 
 270   // If this instruction is a 2-address instruction, then return the
 271   // index of the input which must match the output.  Not necessary
 272   // for instructions which bind the input and output register to the
 273   // same singleton register (e.g., Intel IDIV which binds AX to be
 274   // both an input and an output).  It is necessary when the input and
 275   // output have choices - but they must use the same choice.
 276   virtual uint two_adr( ) const { return 0; }
 277 
 278   // The GC might require some barrier metadata for machine code emission.
 279   uint8_t _barrier;
 280 
 281   // Array of complex operand pointers.  Each corresponds to zero or
 282   // more leafs.  Must be set by MachNode constructor to point to an
 283   // internal array of MachOpers.  The MachOper array is sized by
 284   // specific MachNodes described in the ADL.
 285   uint16_t _num_opnds;
 286   MachOper **_opnds;
 287   uint16_t num_opnds() const { return _num_opnds; }
 288 
 289   // Emit bytes into cbuf
 290   virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 291   // Expand node after register allocation.
 292   // Node is replaced by several nodes in the postalloc expand phase.
 293   // Corresponding methods are generated for nodes if they specify
 294   // postalloc_expand. See block.cpp for more documentation.
 295   virtual bool requires_postalloc_expand() const { return false; }
 296   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 297   // Size of instruction in bytes
 298   virtual uint  size(PhaseRegAlloc *ra_) const;
 299   // Helper function that computes size by emitting code
 300   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 301 
 302   // Return the alignment required (in units of relocInfo::addr_unit())
 303   // for this instruction (must be a power of 2)
 304   int           pd_alignment_required() const;
 305   virtual int   alignment_required() const { return pd_alignment_required(); }
 306 
 307   // Return the padding (in bytes) to be emitted before this
 308   // instruction to properly align it.
 309   virtual int   compute_padding(int current_offset) const;
 310 
 311   // Return number of relocatable values contained in this instruction
 312   virtual int   reloc() const { return 0; }
 313 
 314   // Return number of words used for double constants in this instruction
 315   virtual int   ins_num_consts() const { return 0; }
 316 
 317   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 318   virtual uint  hash() const;
 319   virtual bool  cmp( const Node &n ) const;
 320 
 321   // Expand method for MachNode, replaces nodes representing pseudo
 322   // instructions with a set of nodes which represent real machine
 323   // instructions and compute the same value.
 324   virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
 325 
 326   // Bottom_type call; value comes from operand0
 327   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 328   virtual uint ideal_reg() const {
 329     const Type *t = _opnds[0]->type();
 330     if (t == TypeInt::CC) {
 331       return Op_RegFlags;
 332     } else {
 333       return t->ideal_reg();
 334     }
 335   }
 336 
 337   // If this is a memory op, return the base pointer and fixed offset.
 338   // If there are no such, return NULL.  If there are multiple addresses
 339   // or the address is indeterminate (rare cases) then return (Node*)-1,
 340   // which serves as node bottom.
 341   // If the offset is not statically determined, set it to Type::OffsetBot.
 342   // This method is free to ignore stack slots if that helps.
 343   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 344   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 345   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 346 
 347   // Helper for get_base_and_disp: find the base and index input nodes.
 348   // Returns the MachOper as determined by memory_operand(), for use, if
 349   // needed by the caller. If (MachOper *)-1 is returned, base and index
 350   // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
 351   // index are set to NULL.
 352   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 353 
 354   // Helper for memory_inputs:  Which operand carries the necessary info?
 355   // By default, returns NULL, which means there is no such operand.
 356   // If it returns (MachOper*)-1, this means there are multiple memories.
 357   virtual const MachOper* memory_operand() const { return NULL; }
 358 
 359   // Call "get_base_and_disp" to decide which category of memory is used here.
 360   virtual const class TypePtr *adr_type() const;
 361 
 362   // Apply peephole rule(s) to this instruction
 363   virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
 364 
 365   // Top-level ideal Opcode matched
 366   virtual int ideal_Opcode()     const { return Op_Node; }
 367 
 368   // Adds the label for the case
 369   virtual void add_case_label( int switch_val, Label* blockLabel);
 370 
 371   // Set the absolute address for methods
 372   virtual void method_set( intptr_t addr );
 373 
 374   // Should we clone rather than spill this instruction?
 375   bool rematerialize() const;
 376 
 377   // Get the pipeline info
 378   static const Pipeline *pipeline_class();
 379   virtual const Pipeline *pipeline() const;
 380 
 381   // Returns true if this node is a check that can be implemented with a trap.
 382   virtual bool is_TrapBasedCheckNode() const { return false; }
 383   void set_removed() { add_flag(Flag_is_removed_by_peephole); }
 384   bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
 385 
 386 #ifndef PRODUCT
 387   virtual const char *Name() const = 0; // Machine-specific name
 388   virtual void dump_spec(outputStream *st) const; // Print per-node info
 389   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 390 #endif
 391 };
 392 
 393 //------------------------------MachIdealNode----------------------------
 394 // Machine specific versions of nodes that must be defined by user.
 395 // These are not converted by matcher from ideal nodes to machine nodes
 396 // but are inserted into the code by the compiler.
 397 class MachIdealNode : public MachNode {
 398 public:
 399   MachIdealNode( ) {}
 400 
 401   // Define the following defaults for non-matched machine nodes
 402   virtual uint oper_input_base() const { return 0; }
 403   virtual uint rule()            const { return 9999999; }
 404   virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
 405 };
 406 
 407 //------------------------------MachTypeNode----------------------------
 408 // Machine Nodes that need to retain a known Type.
 409 class MachTypeNode : public MachNode {
 410   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 411 public:
 412   MachTypeNode( ) {}
 413   const Type *_bottom_type;
 414 
 415   virtual const class Type *bottom_type() const { return _bottom_type; }
 416 #ifndef PRODUCT
 417   virtual void dump_spec(outputStream *st) const;
 418 #endif
 419 };
 420 
 421 //------------------------------MachBreakpointNode----------------------------
 422 // Machine breakpoint or interrupt Node
 423 class MachBreakpointNode : public MachIdealNode {
 424 public:
 425   MachBreakpointNode( ) {}
 426   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 427   virtual uint size(PhaseRegAlloc *ra_) const;
 428 
 429 #ifndef PRODUCT
 430   virtual const char *Name() const { return "Breakpoint"; }
 431   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 432 #endif
 433 };
 434 
 435 //------------------------------MachConstantBaseNode--------------------------
 436 // Machine node that represents the base address of the constant table.
 437 class MachConstantBaseNode : public MachIdealNode {
 438 public:
 439   static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
 440 
 441 public:
 442   MachConstantBaseNode() : MachIdealNode() {
 443     init_class_id(Class_MachConstantBase);
 444   }
 445   virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
 446   virtual uint ideal_reg() const { return Op_RegP; }
 447   virtual uint oper_input_base() const { return 1; }
 448 
 449   virtual bool requires_postalloc_expand() const;
 450   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 451 
 452   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 453   virtual uint size(PhaseRegAlloc* ra_) const;
 454 
 455   static const RegMask& static_out_RegMask() { return _out_RegMask; }
 456   virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
 457 
 458 #ifndef PRODUCT
 459   virtual const char* Name() const { return "MachConstantBaseNode"; }
 460   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 461 #endif
 462 };
 463 
 464 //------------------------------MachConstantNode-------------------------------
 465 // Machine node that holds a constant which is stored in the constant table.
 466 class MachConstantNode : public MachTypeNode {
 467 protected:
 468   ConstantTable::Constant _constant;  // This node's constant.
 469 
 470 public:
 471   MachConstantNode() : MachTypeNode() {
 472     init_class_id(Class_MachConstant);
 473   }
 474 
 475   virtual void eval_constant(Compile* C) {
 476 #ifdef ASSERT
 477     tty->print("missing MachConstantNode eval_constant function: ");
 478     dump();
 479 #endif
 480     ShouldNotCallThis();
 481   }
 482 
 483   virtual const RegMask &in_RegMask(uint idx) const {
 484     if (idx == mach_constant_base_node_input())
 485       return MachConstantBaseNode::static_out_RegMask();
 486     return MachNode::in_RegMask(idx);
 487   }
 488 
 489   // Input edge of MachConstantBaseNode.
 490   virtual uint mach_constant_base_node_input() const { return req() - 1; }
 491 
 492   int  constant_offset();
 493   int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
 494   // Unchecked version to avoid assertions in debug output.
 495   int  constant_offset_unchecked() const;
 496 };
 497 
 498 //------------------------------MachVEPNode-----------------------------------
 499 // Machine Inline Type Entry Point Node
 500 class MachVEPNode : public MachIdealNode {
 501 public:
 502   Label* _verified_entry;
 503 
 504   MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
 505     _verified_entry(verified_entry),
 506     _verified(verified),
 507     _receiver_only(receiver_only) {
 508     init_class_id(Class_MachVEP);
 509   }
 510   virtual bool cmp(const Node &n) const {
 511     return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
 512            (_verified == ((MachVEPNode&)n)._verified) &&
 513            (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
 514            MachIdealNode::cmp(n);
 515   }
 516   virtual uint size_of() const { return sizeof(*this); }
 517   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 518 
 519 #ifndef PRODUCT
 520   virtual const char* Name() const { return "InlineType Entry-Point"; }
 521   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 522 #endif
 523 private:
 524   bool   _verified;
 525   bool   _receiver_only;
 526 };
 527 
 528 //------------------------------MachUEPNode-----------------------------------
 529 // Machine Unvalidated Entry Point Node
 530 class MachUEPNode : public MachIdealNode {
 531 public:
 532   MachUEPNode( ) {}
 533   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 534 
 535 #ifndef PRODUCT
 536   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 537   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 538 #endif
 539 };
 540 
 541 //------------------------------MachPrologNode--------------------------------
 542 // Machine function Prolog Node
 543 class MachPrologNode : public MachIdealNode {
 544 public:
 545   Label* _verified_entry;
 546 
 547   MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
 548     init_class_id(Class_MachProlog);
 549   }
 550   virtual bool cmp(const Node &n) const {
 551     return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
 552   }
 553   virtual uint size_of() const { return sizeof(*this); }
 554   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 555   virtual int reloc() const;
 556 
 557 #ifndef PRODUCT
 558   virtual const char *Name() const { return "Prolog"; }
 559   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 560 #endif
 561 };
 562 
 563 //------------------------------MachEpilogNode--------------------------------
 564 // Machine function Epilog Node
 565 class MachEpilogNode : public MachIdealNode {
 566 public:
 567   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 568   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 569   virtual int reloc() const;
 570   virtual const Pipeline *pipeline() const;
 571 
 572 private:
 573   bool _do_polling;
 574 
 575 public:
 576   bool do_polling() const { return _do_polling; }
 577 
 578 #ifndef PRODUCT
 579   virtual const char *Name() const { return "Epilog"; }
 580   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 581 #endif
 582 };
 583 
 584 //------------------------------MachNopNode-----------------------------------
 585 // Machine function Nop Node
 586 class MachNopNode : public MachIdealNode {
 587 private:
 588   int _count;
 589 public:
 590   MachNopNode( ) : _count(1) {}
 591   MachNopNode( int count ) : _count(count) {}
 592   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 593   virtual uint size(PhaseRegAlloc *ra_) const;
 594 
 595   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 596 
 597   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 598   virtual const Pipeline *pipeline() const;
 599 #ifndef PRODUCT
 600   virtual const char *Name() const { return "Nop"; }
 601   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 602   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 603 #endif
 604 };
 605 
 606 //------------------------------MachSpillCopyNode------------------------------
 607 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 608 // location (stack or register).
 609 class MachSpillCopyNode : public MachIdealNode {
 610 public:
 611   enum SpillType {
 612     TwoAddress,                        // Inserted when coalescing of a two-address-instruction node and its input fails
 613     PhiInput,                          // Inserted when coalescing of a phi node and its input fails
 614     DebugUse,                          // Inserted as debug info spills to safepoints in non-frequent blocks
 615     LoopPhiInput,                      // Pre-split compares of loop-phis
 616     Definition,                        // An lrg marked as spilled will be spilled to memory right after its definition,
 617                                        // if in high pressure region or the lrg is bound
 618     RegToReg,                          // A register to register move
 619     RegToMem,                          // A register to memory move
 620     MemToReg,                          // A memory to register move
 621     PhiLocationDifferToInputLocation,  // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
 622                                        // the phi and its input resides at different locations (i.e. reg or mem)
 623     BasePointerToMem,                  // Spill base pointer to memory at safepoint
 624     InputToRematerialization,          // When rematerializing a node we stretch the inputs live ranges, and they might be
 625                                        // stretched beyond a new definition point, therefore we split out new copies instead
 626     CallUse,                           // Spill use at a call
 627     Bound                              // An lrg marked as spill that is bound and needs to be spilled at a use
 628   };
 629 private:
 630   const RegMask *_in;           // RegMask for input
 631   const RegMask *_out;          // RegMask for output
 632   const Type *_type;
 633   const SpillType _spill_type;
 634 public:
 635   MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
 636     MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
 637     init_class_id(Class_MachSpillCopy);
 638     init_flags(Flag_is_Copy);
 639     add_req(NULL);
 640     add_req(n);
 641   }
 642   virtual uint size_of() const { return sizeof(*this); }
 643   void set_out_RegMask(const RegMask &out) { _out = &out; }
 644   void set_in_RegMask(const RegMask &in) { _in = &in; }
 645   virtual const RegMask &out_RegMask() const { return *_out; }
 646   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 647   virtual const class Type *bottom_type() const { return _type; }
 648   virtual uint ideal_reg() const { return _type->ideal_reg(); }
 649   virtual uint oper_input_base() const { return 1; }
 650   uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 651 
 652   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 653   virtual uint size(PhaseRegAlloc *ra_) const;
 654 
 655 
 656 #ifndef PRODUCT
 657   static const char *spill_type(SpillType st) {
 658     switch (st) {
 659       case TwoAddress:
 660         return "TwoAddressSpillCopy";
 661       case PhiInput:
 662         return "PhiInputSpillCopy";
 663       case DebugUse:
 664         return "DebugUseSpillCopy";
 665       case LoopPhiInput:
 666         return "LoopPhiInputSpillCopy";
 667       case Definition:
 668         return "DefinitionSpillCopy";
 669       case RegToReg:
 670         return "RegToRegSpillCopy";
 671       case RegToMem:
 672         return "RegToMemSpillCopy";
 673       case MemToReg:
 674         return "MemToRegSpillCopy";
 675       case PhiLocationDifferToInputLocation:
 676         return "PhiLocationDifferToInputLocationSpillCopy";
 677       case BasePointerToMem:
 678         return "BasePointerToMemSpillCopy";
 679       case InputToRematerialization:
 680         return "InputToRematerializationSpillCopy";
 681       case CallUse:
 682         return "CallUseSpillCopy";
 683       case Bound:
 684         return "BoundSpillCopy";
 685       default:
 686         assert(false, "Must have valid spill type");
 687         return "MachSpillCopy";
 688     }
 689   }
 690 
 691   virtual const char *Name() const {
 692     return spill_type(_spill_type);
 693   }
 694 
 695   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 696 #endif
 697 };
 698 
 699 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
 700 // however it doesn't have a control input and is more like a MergeMem.
 701 // It is inserted after the register allocation is done to ensure that nodes use single
 702 // definition of a multidef lrg in a block.
 703 class MachMergeNode : public MachIdealNode {
 704 public:
 705   MachMergeNode(Node *n1) {
 706     init_class_id(Class_MachMerge);
 707     add_req(NULL);
 708     add_req(n1);
 709   }
 710   virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
 711   virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
 712   virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
 713   virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
 714   virtual uint oper_input_base() const { return 1; }
 715   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { }
 716   virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
 717 #ifndef PRODUCT
 718   virtual const char *Name() const { return "MachMerge"; }
 719 #endif
 720 };
 721 
 722 //------------------------------MachBranchNode--------------------------------
 723 // Abstract machine branch Node
 724 class MachBranchNode : public MachIdealNode {
 725 public:
 726   MachBranchNode() : MachIdealNode() {
 727     init_class_id(Class_MachBranch);
 728   }
 729   virtual void label_set(Label* label, uint block_num) = 0;
 730   virtual void save_label(Label** label, uint* block_num) = 0;
 731 
 732   // Support for short branches
 733   virtual MachNode *short_branch_version() { return NULL; }
 734 
 735   virtual bool pinned() const { return true; };
 736 };
 737 
 738 //------------------------------MachNullChkNode--------------------------------
 739 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 740 // also some kind of memory op.  Turns the indicated MachNode into a
 741 // conditional branch with good latency on the ptr-not-null path and awful
 742 // latency on the pointer-is-null path.
 743 
 744 class MachNullCheckNode : public MachBranchNode {
 745 public:
 746   const uint _vidx;             // Index of memop being tested
 747   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
 748     init_class_id(Class_MachNullCheck);
 749     add_req(ctrl);
 750     add_req(memop);
 751   }
 752   virtual int Opcode() const;
 753   virtual uint size_of() const { return sizeof(*this); }
 754 
 755   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 756   virtual void label_set(Label* label, uint block_num);
 757   virtual void save_label(Label** label, uint* block_num);
 758   virtual void negate() { }
 759   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 760   virtual uint ideal_reg() const { return NotAMachineReg; }
 761   virtual const RegMask &in_RegMask(uint) const;
 762   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 763 #ifndef PRODUCT
 764   virtual const char *Name() const { return "NullCheck"; }
 765   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 766 #endif
 767 };
 768 
 769 //------------------------------MachProjNode----------------------------------
 770 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 771 // just MachNodes made by the Ideal world that replicate simple projections
 772 // but with machine-dependent input & output register masks.  Generally
 773 // produced as part of calling conventions.  Normally I make MachNodes as part
 774 // of the Matcher process, but the Matcher is ill suited to issues involving
 775 // frame handling, so frame handling is all done in the Ideal world with
 776 // occasional callbacks to the machine model for important info.
 777 class MachProjNode : public ProjNode {
 778 public:
 779   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
 780     init_class_id(Class_MachProj);
 781   }
 782   RegMask _rout;
 783   const uint  _ideal_reg;
 784   enum projType {
 785     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 786     fat_proj       = 999        // Projs killing many regs, defined by _rout
 787   };
 788   virtual int   Opcode() const;
 789   virtual const Type *bottom_type() const;
 790   virtual const TypePtr *adr_type() const;
 791   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 792   virtual const RegMask &out_RegMask() const { return _rout; }
 793   virtual uint  ideal_reg() const { return _ideal_reg; }
 794   // Need size_of() for virtual ProjNode::clone()
 795   virtual uint  size_of() const { return sizeof(MachProjNode); }
 796 #ifndef PRODUCT
 797   virtual void dump_spec(outputStream *st) const;
 798 #endif
 799 };
 800 
 801 //------------------------------MachIfNode-------------------------------------
 802 // Machine-specific versions of IfNodes
 803 class MachIfNode : public MachBranchNode {
 804   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 805 public:
 806   float _prob;                  // Probability branch goes either way
 807   float _fcnt;                  // Frequency counter
 808   MachIfNode() : MachBranchNode() {
 809     init_class_id(Class_MachIf);
 810   }
 811   // Negate conditional branches.
 812   virtual void negate() = 0;
 813 #ifndef PRODUCT
 814   virtual void dump_spec(outputStream *st) const;
 815 #endif
 816 };
 817 
 818 //------------------------------MachJumpNode-----------------------------------
 819 // Machine-specific versions of JumpNodes
 820 class MachJumpNode : public MachConstantNode {
 821 public:
 822   float* _probs;
 823   MachJumpNode() : MachConstantNode() {
 824     init_class_id(Class_MachJump);
 825   }
 826 };
 827 
 828 //------------------------------MachGotoNode-----------------------------------
 829 // Machine-specific versions of GotoNodes
 830 class MachGotoNode : public MachBranchNode {
 831 public:
 832   MachGotoNode() : MachBranchNode() {
 833     init_class_id(Class_MachGoto);
 834   }
 835 };
 836 
 837 //------------------------------MachFastLockNode-------------------------------------
 838 // Machine-specific versions of FastLockNodes
 839 class MachFastLockNode : public MachNode {
 840   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 841 public:
 842   RTMLockingCounters*       _rtm_counters; // RTM lock counters for inflated locks
 843   RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
 844   MachFastLockNode() : MachNode() {}
 845 };
 846 
 847 //------------------------------MachReturnNode--------------------------------
 848 // Machine-specific versions of subroutine returns
 849 class MachReturnNode : public MachNode {
 850   virtual uint size_of() const; // Size is bigger
 851 public:
 852   RegMask *_in_rms;             // Input register masks, set during allocation
 853   ReallocMark _nesting;         // assertion check for reallocations
 854   const TypePtr* _adr_type;     // memory effects of call or return
 855   MachReturnNode() : MachNode() {
 856     init_class_id(Class_MachReturn);
 857     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 858   }
 859 
 860   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 861 
 862   virtual const RegMask &in_RegMask(uint) const;
 863   virtual bool pinned() const { return true; };
 864   virtual const TypePtr *adr_type() const;
 865 };
 866 
 867 //------------------------------MachSafePointNode-----------------------------
 868 // Machine-specific versions of safepoints
 869 class MachSafePointNode : public MachReturnNode {
 870 public:
 871   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 872   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 873   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 874   bool            _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
 875   OopMap*         oop_map() const { return _oop_map; }
 876   void            set_oop_map(OopMap* om) { _oop_map = om; }
 877 
 878   MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0), _has_ea_local_in_scope(false) {
 879     init_class_id(Class_MachSafePoint);
 880   }
 881 
 882   virtual JVMState* jvms() const { return _jvms; }
 883   void set_jvms(JVMState* s) {
 884     _jvms = s;
 885   }
 886   virtual const Type    *bottom_type() const;
 887 
 888   virtual const RegMask &in_RegMask(uint) const;
 889 
 890   // Functionality from old debug nodes
 891   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 892   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 893 
 894   Node *local(const JVMState* jvms, uint idx) const {
 895     assert(verify_jvms(jvms), "jvms must match");
 896     return in(_jvmadj + jvms->locoff() + idx);
 897   }
 898   Node *stack(const JVMState* jvms, uint idx) const {
 899     assert(verify_jvms(jvms), "jvms must match");
 900     return in(_jvmadj + jvms->stkoff() + idx);
 901  }
 902   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 903     assert(verify_jvms(jvms), "jvms must match");
 904     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 905   }
 906   Node *monitor_box(const JVMState* jvms, uint idx) const {
 907     assert(verify_jvms(jvms), "jvms must match");
 908     return in(_jvmadj + jvms->monitor_box_offset(idx));
 909   }
 910   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 911     assert(verify_jvms(jvms), "jvms must match");
 912     set_req(_jvmadj + jvms->locoff() + idx, c);
 913   }
 914   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 915     assert(verify_jvms(jvms), "jvms must match");
 916     set_req(_jvmadj + jvms->stkoff() + idx, c);
 917   }
 918   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 919     assert(verify_jvms(jvms), "jvms must match");
 920     set_req(_jvmadj + jvms->monoff() + idx, c);
 921   }
 922 };
 923 
 924 //------------------------------MachCallNode----------------------------------
 925 // Machine-specific versions of subroutine calls
 926 class MachCallNode : public MachSafePointNode {
 927 protected:
 928   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 929   virtual bool cmp( const Node &n ) const;
 930   virtual uint size_of() const = 0; // Size is bigger
 931 public:
 932   const TypeFunc *_tf;        // Function type
 933   address      _entry_point;  // Address of the method being called
 934   float        _cnt;          // Estimate of number of times called
 935   bool         _guaranteed_safepoint; // Do we need to observe safepoint?
 936 
 937   const TypeFunc* tf()        const { return _tf; }
 938   const address entry_point() const { return _entry_point; }
 939   const float   cnt()         const { return _cnt; }
 940 
 941   void set_tf(const TypeFunc* tf)       { _tf = tf; }
 942   void set_entry_point(address p)       { _entry_point = p; }
 943   void set_cnt(float c)                 { _cnt = c; }
 944   void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
 945 
 946   MachCallNode() : MachSafePointNode() {
 947     init_class_id(Class_MachCall);
 948   }
 949 
 950   virtual const Type *bottom_type() const;
 951   virtual bool  pinned() const { return false; }
 952   virtual const Type* Value(PhaseGVN* phase) const;
 953   virtual const RegMask &in_RegMask(uint) const;
 954   virtual int ret_addr_offset() { return 0; }
 955 
 956   bool return_value_is_used() const;
 957 
 958   // Similar to cousin class CallNode::returns_pointer
 959   bool returns_pointer() const;
 960   bool returns_scalarized() const;
 961 
 962   bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
 963 
 964 #ifndef PRODUCT
 965   virtual void dump_spec(outputStream *st) const;
 966 #endif
 967 };
 968 
 969 //------------------------------MachCallJavaNode------------------------------
 970 // "Base" class for machine-specific versions of subroutine calls
 971 class MachCallJavaNode : public MachCallNode {
 972 protected:
 973   virtual bool cmp( const Node &n ) const;
 974   virtual uint size_of() const; // Size is bigger
 975 public:
 976   ciMethod* _method;                 // Method being direct called
 977   bool      _override_symbolic_info; // Override symbolic call site info from bytecode
 978   bool      _optimized_virtual;      // Tells if node is a static call or an optimized virtual
 979   bool      _method_handle_invoke;   // Tells if the call has to preserve SP
 980   bool      _arg_escape;             // ArgEscape in parameter list
 981   MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
 982     init_class_id(Class_MachCallJava);
 983   }
 984 
 985   virtual const RegMask &in_RegMask(uint) const;
 986 
 987   int resolved_method_index(CodeBuffer &cbuf) const {
 988     if (_override_symbolic_info) {
 989       // Attach corresponding Method* to the call site, so VM can use it during resolution
 990       // instead of querying symbolic info from bytecode.
 991       assert(_method != NULL, "method should be set");
 992       assert(_method->constant_encoding()->is_method(), "should point to a Method");
 993       return cbuf.oop_recorder()->find_index(_method->constant_encoding());
 994     }
 995     return 0; // Use symbolic info from bytecode (resolved_method == NULL).
 996   }
 997 
 998 #ifndef PRODUCT
 999   virtual void dump_spec(outputStream *st) const;
1000 #endif
1001 };
1002 
1003 //------------------------------MachCallStaticJavaNode------------------------
1004 // Machine-specific versions of monomorphic subroutine calls
1005 class MachCallStaticJavaNode : public MachCallJavaNode {
1006   virtual bool cmp( const Node &n ) const;
1007   virtual uint size_of() const; // Size is bigger
1008 public:
1009   const char *_name;            // Runtime wrapper name
1010   MachCallStaticJavaNode() : MachCallJavaNode() {
1011     init_class_id(Class_MachCallStaticJava);
1012   }
1013 
1014   // If this is an uncommon trap, return the request code, else zero.
1015   int uncommon_trap_request() const;
1016 
1017   virtual int ret_addr_offset();
1018 #ifndef PRODUCT
1019   virtual void dump_spec(outputStream *st) const;
1020   void dump_trap_args(outputStream *st) const;
1021 #endif
1022 };
1023 
1024 //------------------------------MachCallDynamicJavaNode------------------------
1025 // Machine-specific versions of possibly megamorphic subroutine calls
1026 class MachCallDynamicJavaNode : public MachCallJavaNode {
1027 public:
1028   int _vtable_index;
1029   MachCallDynamicJavaNode() : MachCallJavaNode() {
1030     init_class_id(Class_MachCallDynamicJava);
1031     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
1032   }
1033   virtual int ret_addr_offset();
1034 #ifndef PRODUCT
1035   virtual void dump_spec(outputStream *st) const;
1036 #endif
1037 };
1038 
1039 //------------------------------MachCallRuntimeNode----------------------------
1040 // Machine-specific versions of subroutine calls
1041 class MachCallRuntimeNode : public MachCallNode {
1042   virtual bool cmp( const Node &n ) const;
1043   virtual uint size_of() const; // Size is bigger
1044 public:
1045   const char *_name;            // Printable name, if _method is NULL
1046   bool _leaf_no_fp;             // Is this CallLeafNoFP?
1047   MachCallRuntimeNode() : MachCallNode() {
1048     init_class_id(Class_MachCallRuntime);
1049   }
1050   virtual int ret_addr_offset();
1051 #ifndef PRODUCT
1052   virtual void dump_spec(outputStream *st) const;
1053 #endif
1054 };
1055 
1056 class MachCallLeafNode: public MachCallRuntimeNode {
1057 public:
1058   MachCallLeafNode() : MachCallRuntimeNode() {
1059     init_class_id(Class_MachCallLeaf);
1060   }
1061 };
1062 
1063 //------------------------------MachHaltNode-----------------------------------
1064 // Machine-specific versions of halt nodes
1065 class MachHaltNode : public MachReturnNode {
1066 public:
1067   bool _reachable;
1068   const char* _halt_reason;
1069   virtual JVMState* jvms() const;
1070   bool is_reachable() const {
1071     return _reachable;
1072   }
1073 };
1074 
1075 class MachMemBarNode : public MachNode {
1076   virtual uint size_of() const; // Size is bigger
1077 public:
1078   const TypePtr* _adr_type;     // memory effects
1079   MachMemBarNode() : MachNode() {
1080     init_class_id(Class_MachMemBar);
1081     _adr_type = TypePtr::BOTTOM; // the default: all of memory
1082   }
1083 
1084   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1085   virtual const TypePtr *adr_type() const;
1086 };
1087 
1088 
1089 //------------------------------MachTempNode-----------------------------------
1090 // Node used by the adlc to construct inputs to represent temporary registers
1091 class MachTempNode : public MachNode {
1092 private:
1093   MachOper *_opnd_array[1];
1094 
1095 public:
1096   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1097   virtual uint rule() const { return 9999999; }
1098   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
1099 
1100   MachTempNode(MachOper* oper) {
1101     init_class_id(Class_MachTemp);
1102     _num_opnds = 1;
1103     _opnds = _opnd_array;
1104     add_req(NULL);
1105     _opnds[0] = oper;
1106   }
1107   virtual uint size_of() const { return sizeof(MachTempNode); }
1108 
1109 #ifndef PRODUCT
1110   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1111   virtual const char *Name() const { return "MachTemp";}
1112 #endif
1113 };
1114 
1115 
1116 
1117 //------------------------------labelOper--------------------------------------
1118 // Machine-independent version of label operand
1119 class labelOper : public MachOper {
1120 private:
1121   virtual uint           num_edges() const { return 0; }
1122 public:
1123   // Supported for fixed size branches
1124   Label* _label;                // Label for branch(es)
1125 
1126   uint _block_num;
1127 
1128   labelOper() : _label(0), _block_num(0) {}
1129 
1130   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1131 
1132   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1133 
1134   virtual MachOper *clone() const;
1135 
1136   virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
1137 
1138   virtual uint           opcode() const;
1139 
1140   virtual uint           hash()   const;
1141   virtual bool           cmp( const MachOper &oper ) const;
1142 #ifndef PRODUCT
1143   virtual const char    *Name()   const { return "Label";}
1144 
1145   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1146   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1147 #endif
1148 };
1149 
1150 
1151 //------------------------------methodOper--------------------------------------
1152 // Machine-independent version of method operand
1153 class methodOper : public MachOper {
1154 private:
1155   virtual uint           num_edges() const { return 0; }
1156 public:
1157   intptr_t _method;             // Address of method
1158   methodOper() :   _method(0) {}
1159   methodOper(intptr_t method) : _method(method)  {}
1160 
1161   virtual MachOper *clone() const;
1162 
1163   virtual intptr_t method() const { return _method; }
1164 
1165   virtual uint           opcode() const;
1166 
1167   virtual uint           hash()   const;
1168   virtual bool           cmp( const MachOper &oper ) const;
1169 #ifndef PRODUCT
1170   virtual const char    *Name()   const { return "Method";}
1171 
1172   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1173   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1174 #endif
1175 };
1176 
1177 #endif // SHARE_OPTO_MACHNODE_HPP