1 /*
2 * Copyright (c) 1997, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/callnode.hpp"
29 #include "opto/constantTable.hpp"
30 #include "opto/matcher.hpp"
31 #include "opto/multnode.hpp"
32 #include "opto/node.hpp"
33 #include "opto/regmask.hpp"
34 #include "utilities/growableArray.hpp"
35
36 class BufferBlob;
37 class CodeBuffer;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class MachVEPNode;
55 class Matcher;
56 class PhaseRegAlloc;
57 class RegMask;
58 class RTMLockingCounters;
59 class State;
60
61 //---------------------------MachOper------------------------------------------
62 class MachOper : public ResourceObj {
63 public:
64 // Allocate right next to the MachNodes in the same arena
65 void *operator new(size_t x) throw() {
66 Compile* C = Compile::current();
67 return C->node_arena()->AmallocWords(x);
68 }
69
70 // Opcode
71 virtual uint opcode() const = 0;
72
73 // Number of input edges.
74 // Generally at least 1
75 virtual uint num_edges() const { return 1; }
76 // Array of Register masks
77 virtual const RegMask *in_RegMask(int index) const;
78
79 // Methods to output the encoding of the operand
80
81 // Negate conditional branches. Error for non-branch Nodes
82 virtual void negate();
83
84 // Return the value requested
85 // result register lookup, corresponding to int_format
86 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
87 // input register lookup, corresponding to ext_format
88 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
89
90 // helpers for MacroAssembler generation from ADLC
91 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
92 return ::as_Register(reg(ra_, node));
93 }
94 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
95 return ::as_Register(reg(ra_, node, idx));
96 }
97 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
98 return ::as_FloatRegister(reg(ra_, node));
99 }
100 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
101 return ::as_FloatRegister(reg(ra_, node, idx));
102 }
103
104 #if defined(IA32) || defined(AMD64)
105 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
106 return ::as_KRegister(reg(ra_, node));
107 }
108 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
109 return ::as_KRegister(reg(ra_, node, idx));
110 }
111 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
112 return ::as_XMMRegister(reg(ra_, node));
113 }
114 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
115 return ::as_XMMRegister(reg(ra_, node, idx));
116 }
117 #endif
118 // CondRegister reg converter
119 #if defined(PPC64)
120 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
121 return ::as_ConditionRegister(reg(ra_, node));
122 }
123 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
124 return ::as_ConditionRegister(reg(ra_, node, idx));
125 }
126 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
127 return ::as_VectorRegister(reg(ra_, node));
128 }
129 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
130 return ::as_VectorRegister(reg(ra_, node, idx));
131 }
132 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
133 return ::as_VectorSRegister(reg(ra_, node));
134 }
135 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
136 return ::as_VectorSRegister(reg(ra_, node, idx));
137 }
138 #endif
139 #if defined(AARCH64)
140 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
141 return ::as_PRegister(reg(ra_, node));
142 }
143 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
144 return ::as_PRegister(reg(ra_, node, idx));
145 }
146 #endif
147
148 virtual intptr_t constant() const;
149 virtual relocInfo::relocType constant_reloc() const;
150 virtual jdouble constantD() const;
151 virtual jfloat constantF() const;
152 virtual jlong constantL() const;
153 virtual TypeOopPtr *oop() const;
154 virtual int ccode() const;
155 // A zero, default, indicates this value is not needed.
156 // May need to lookup the base register, as done in int_ and ext_format
157 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
158 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
159 virtual int scale() const;
160 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
161 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
162 // Check for PC-Relative displacement
163 virtual relocInfo::relocType disp_reloc() const;
164 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
165 virtual int base_position() const; // base edge position, or -1
166 virtual int index_position() const; // index edge position, or -1
167
168 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
169 // Only returns non-null value for x86_32.ad's indOffset32X
170 virtual const TypePtr *disp_as_type() const { return nullptr; }
171
172 // Return the label
173 virtual Label *label() const;
174
175 // Return the method's address
176 virtual intptr_t method() const;
177
178 // Hash and compare over operands are currently identical
179 virtual uint hash() const;
180 virtual bool cmp( const MachOper &oper ) const;
181
182 // Virtual clone, since I do not know how big the MachOper is.
183 virtual MachOper *clone() const = 0;
184
185 // Return ideal Type from simple operands. Fail for complex operands.
186 virtual const Type *type() const;
187
188 // Set an integer offset if we have one, or error otherwise
189 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
190
191 #ifndef PRODUCT
192 // Return name of operand
193 virtual const char *Name() const { return "???";}
194
195 // Methods to output the text version of the operand
196 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
197 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
198
199 virtual void dump_spec(outputStream *st) const; // Print per-operand info
200
201 // Check whether o is a valid oper.
202 static bool notAnOper(const MachOper *o) {
203 if (o == nullptr) return true;
204 if (((intptr_t)o & 1) != 0) return true;
205 if (*(address*)o == badAddress) return true; // kill by Node::destruct
206 return false;
207 }
208 #endif // !PRODUCT
209 };
210
211 //------------------------------MachNode---------------------------------------
212 // Base type for all machine specific nodes. All node classes generated by the
213 // ADLC inherit from this class.
214 class MachNode : public Node {
215 public:
216 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
217 init_class_id(Class_Mach);
218 }
219 // Required boilerplate
220 virtual uint size_of() const { return sizeof(MachNode); }
221 virtual int Opcode() const; // Always equal to MachNode
222 virtual uint rule() const = 0; // Machine-specific opcode
223 // Number of inputs which come before the first operand.
224 // Generally at least 1, to skip the Control input
225 virtual uint oper_input_base() const { return 1; }
226 // Position of constant base node in node's inputs. -1 if
227 // no constant base node input.
228 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
229
230 uint8_t barrier_data() const { return _barrier; }
231 void set_barrier_data(uint8_t data) { _barrier = data; }
232
233 // Copy index, inputs, and operands to a new version of the instruction.
234 // Called from cisc_version() and short_branch_version().
235 void fill_new_machnode(MachNode *n) const;
236
237 // Return an equivalent instruction using memory for cisc_operand position
238 virtual MachNode *cisc_version(int offset);
239 // Modify this instruction's register mask to use stack version for cisc_operand
240 virtual void use_cisc_RegMask();
241
242 // Support for short branches
243 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
244
245 // Avoid back to back some instructions on some CPUs.
246 enum AvoidBackToBackFlag { AVOID_NONE = 0,
247 AVOID_BEFORE = Flag_avoid_back_to_back_before,
248 AVOID_AFTER = Flag_avoid_back_to_back_after,
249 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
250
251 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
252 return (flags() & flag_value) == flag_value;
253 }
254
255 // instruction implemented with a call
256 bool has_call() const { return (flags() & Flag_has_call) != 0; }
257
258 // First index in _in[] corresponding to operand, or -1 if there is none
259 int operand_index(uint operand) const;
260 int operand_index(const MachOper *oper) const;
261 int operand_index(Node* m) const;
262
263 // Register class input is expected in
264 virtual const RegMask &in_RegMask(uint) const;
265
266 // cisc-spillable instructions redefine for use by in_RegMask
267 virtual const RegMask *cisc_RegMask() const { return nullptr; }
268
269 // If this instruction is a 2-address instruction, then return the
270 // index of the input which must match the output. Not necessary
271 // for instructions which bind the input and output register to the
272 // same singleton register (e.g., Intel IDIV which binds AX to be
273 // both an input and an output). It is necessary when the input and
274 // output have choices - but they must use the same choice.
275 virtual uint two_adr( ) const { return 0; }
276
277 // The GC might require some barrier metadata for machine code emission.
278 uint8_t _barrier;
279
280 // Array of complex operand pointers. Each corresponds to zero or
281 // more leafs. Must be set by MachNode constructor to point to an
282 // internal array of MachOpers. The MachOper array is sized by
283 // specific MachNodes described in the ADL.
284 uint16_t _num_opnds;
285 MachOper **_opnds;
286 uint16_t num_opnds() const { return _num_opnds; }
287
288 // Emit bytes into cbuf
289 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
290 // Expand node after register allocation.
291 // Node is replaced by several nodes in the postalloc expand phase.
292 // Corresponding methods are generated for nodes if they specify
293 // postalloc_expand. See block.cpp for more documentation.
294 virtual bool requires_postalloc_expand() const { return false; }
295 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
296 // Size of instruction in bytes
297 virtual uint size(PhaseRegAlloc *ra_) const;
298 // Helper function that computes size by emitting code
299 virtual uint emit_size(PhaseRegAlloc *ra_) const;
300
301 // Return the alignment required (in units of relocInfo::addr_unit())
302 // for this instruction (must be a power of 2)
303 int pd_alignment_required() const;
304 virtual int alignment_required() const { return pd_alignment_required(); }
305
306 // Return the padding (in bytes) to be emitted before this
307 // instruction to properly align it.
308 virtual int compute_padding(int current_offset) const;
309
310 // Return number of relocatable values contained in this instruction
311 virtual int reloc() const { return 0; }
312
313 // Return number of words used for double constants in this instruction
314 virtual int ins_num_consts() const { return 0; }
315
316 // Hash and compare over operands. Used to do GVN on machine Nodes.
317 virtual uint hash() const;
318 virtual bool cmp( const Node &n ) const;
319
320 // Expand method for MachNode, replaces nodes representing pseudo
321 // instructions with a set of nodes which represent real machine
322 // instructions and compute the same value.
323 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
324
325 // Bottom_type call; value comes from operand0
326 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
327 virtual uint ideal_reg() const {
328 const Type *t = _opnds[0]->type();
329 if (t == TypeInt::CC) {
330 return Op_RegFlags;
331 } else {
332 return t->ideal_reg();
333 }
334 }
335
336 // If this is a memory op, return the base pointer and fixed offset.
337 // If there are no such, return null. If there are multiple addresses
338 // or the address is indeterminate (rare cases) then return (Node*)-1,
339 // which serves as node bottom.
340 // If the offset is not statically determined, set it to Type::OffsetBot.
341 // This method is free to ignore stack slots if that helps.
342 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
343 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
344 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
345
346 // Helper for get_base_and_disp: find the base and index input nodes.
347 // Returns the MachOper as determined by memory_operand(), for use, if
348 // needed by the caller. If (MachOper *)-1 is returned, base and index
349 // are set to NodeSentinel. If null is returned, base and
350 // index are set to null.
351 const MachOper* memory_inputs(Node* &base, Node* &index) const;
352
353 // Helper for memory_inputs: Which operand carries the necessary info?
354 // By default, returns null, which means there is no such operand.
355 // If it returns (MachOper*)-1, this means there are multiple memories.
356 virtual const MachOper* memory_operand() const { return nullptr; }
357
358 // Call "get_base_and_disp" to decide which category of memory is used here.
359 virtual const class TypePtr *adr_type() const;
360
361 // Apply peephole rule(s) to this instruction
362 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
363
364 // Top-level ideal Opcode matched
365 virtual int ideal_Opcode() const { return Op_Node; }
366
367 // Adds the label for the case
368 virtual void add_case_label( int switch_val, Label* blockLabel);
369
370 // Set the absolute address for methods
371 virtual void method_set( intptr_t addr );
372
373 // Should we clone rather than spill this instruction?
374 bool rematerialize() const;
375
376 // Get the pipeline info
377 static const Pipeline *pipeline_class();
378 virtual const Pipeline *pipeline() const;
379
380 // Returns true if this node is a check that can be implemented with a trap.
381 virtual bool is_TrapBasedCheckNode() const { return false; }
382 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
383 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
384
385 #ifndef PRODUCT
386 virtual const char *Name() const = 0; // Machine-specific name
387 virtual void dump_spec(outputStream *st) const; // Print per-node info
388 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
389 #endif
390 };
391
392 //------------------------------MachIdealNode----------------------------
393 // Machine specific versions of nodes that must be defined by user.
394 // These are not converted by matcher from ideal nodes to machine nodes
395 // but are inserted into the code by the compiler.
396 class MachIdealNode : public MachNode {
397 public:
398 MachIdealNode( ) {}
399
400 // Define the following defaults for non-matched machine nodes
401 virtual uint oper_input_base() const { return 0; }
402 virtual uint rule() const { return 9999999; }
403 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
404 };
405
406 //------------------------------MachTypeNode----------------------------
407 // Machine Nodes that need to retain a known Type.
408 class MachTypeNode : public MachNode {
409 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
410 public:
411 MachTypeNode( ) {}
412 const Type *_bottom_type;
413
414 virtual const class Type *bottom_type() const { return _bottom_type; }
415 #ifndef PRODUCT
416 virtual void dump_spec(outputStream *st) const;
417 #endif
418 };
419
420 //------------------------------MachBreakpointNode----------------------------
421 // Machine breakpoint or interrupt Node
422 class MachBreakpointNode : public MachIdealNode {
423 public:
424 MachBreakpointNode( ) {}
425 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
426 virtual uint size(PhaseRegAlloc *ra_) const;
427
428 #ifndef PRODUCT
429 virtual const char *Name() const { return "Breakpoint"; }
430 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
431 #endif
432 };
433
434 //------------------------------MachConstantBaseNode--------------------------
435 // Machine node that represents the base address of the constant table.
436 class MachConstantBaseNode : public MachIdealNode {
437 public:
438 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
439
440 public:
441 MachConstantBaseNode() : MachIdealNode() {
442 init_class_id(Class_MachConstantBase);
443 }
444 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
445 virtual uint ideal_reg() const { return Op_RegP; }
446 virtual uint oper_input_base() const { return 1; }
447
448 virtual bool requires_postalloc_expand() const;
449 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
450
451 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
452 virtual uint size(PhaseRegAlloc* ra_) const;
453
454 static const RegMask& static_out_RegMask() { return _out_RegMask; }
455 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
456
457 #ifndef PRODUCT
458 virtual const char* Name() const { return "MachConstantBaseNode"; }
459 virtual void format(PhaseRegAlloc*, outputStream* st) const;
460 #endif
461 };
462
463 //------------------------------MachConstantNode-------------------------------
464 // Machine node that holds a constant which is stored in the constant table.
465 class MachConstantNode : public MachTypeNode {
466 protected:
467 ConstantTable::Constant _constant; // This node's constant.
468
469 public:
470 MachConstantNode() : MachTypeNode() {
471 init_class_id(Class_MachConstant);
472 }
473
474 virtual void eval_constant(Compile* C) {
475 #ifdef ASSERT
476 tty->print("missing MachConstantNode eval_constant function: ");
477 dump();
478 #endif
479 ShouldNotCallThis();
480 }
481
482 virtual const RegMask &in_RegMask(uint idx) const {
483 if (idx == mach_constant_base_node_input())
484 return MachConstantBaseNode::static_out_RegMask();
485 return MachNode::in_RegMask(idx);
486 }
487
488 // Input edge of MachConstantBaseNode.
489 virtual uint mach_constant_base_node_input() const { return req() - 1; }
490
491 int constant_offset();
492 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
493 // Unchecked version to avoid assertions in debug output.
494 int constant_offset_unchecked() const;
495 };
496
497 //------------------------------MachVEPNode-----------------------------------
498 // Machine Inline Type Entry Point Node
499 class MachVEPNode : public MachIdealNode {
500 public:
501 Label* _verified_entry;
502
503 MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
504 _verified_entry(verified_entry),
505 _verified(verified),
506 _receiver_only(receiver_only) {
507 init_class_id(Class_MachVEP);
508 }
509 virtual bool cmp(const Node &n) const {
510 return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
511 (_verified == ((MachVEPNode&)n)._verified) &&
512 (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
513 MachIdealNode::cmp(n);
514 }
515 virtual uint size_of() const { return sizeof(*this); }
516 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
517
518 #ifndef PRODUCT
519 virtual const char* Name() const { return "InlineType Entry-Point"; }
520 virtual void format(PhaseRegAlloc*, outputStream* st) const;
521 #endif
522 private:
523 bool _verified;
524 bool _receiver_only;
525 };
526
527 //------------------------------MachUEPNode-----------------------------------
528 // Machine Unvalidated Entry Point Node
529 class MachUEPNode : public MachIdealNode {
530 public:
531 MachUEPNode( ) {}
532 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
533
534 #ifndef PRODUCT
535 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
536 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
537 #endif
538 };
539
540 //------------------------------MachPrologNode--------------------------------
541 // Machine function Prolog Node
542 class MachPrologNode : public MachIdealNode {
543 public:
544 Label* _verified_entry;
545
546 MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
547 init_class_id(Class_MachProlog);
548 }
549 virtual bool cmp(const Node &n) const {
550 return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
551 }
552 virtual uint size_of() const { return sizeof(*this); }
553 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
554 virtual int reloc() const;
555
556 #ifndef PRODUCT
557 virtual const char *Name() const { return "Prolog"; }
558 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
559 #endif
560 };
561
562 //------------------------------MachEpilogNode--------------------------------
563 // Machine function Epilog Node
564 class MachEpilogNode : public MachIdealNode {
565 public:
566 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
567 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
568 virtual int reloc() const;
569 virtual const Pipeline *pipeline() const;
570
571 private:
572 bool _do_polling;
573
574 public:
575 bool do_polling() const { return _do_polling; }
576
577 #ifndef PRODUCT
578 virtual const char *Name() const { return "Epilog"; }
579 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
580 #endif
581 };
582
583 //------------------------------MachNopNode-----------------------------------
584 // Machine function Nop Node
585 class MachNopNode : public MachIdealNode {
586 private:
587 int _count;
588 public:
589 MachNopNode( ) : _count(1) {}
590 MachNopNode( int count ) : _count(count) {}
591 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
592 virtual uint size(PhaseRegAlloc *ra_) const;
593
594 virtual const class Type *bottom_type() const { return Type::CONTROL; }
595
596 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
597 virtual const Pipeline *pipeline() const;
598 #ifndef PRODUCT
599 virtual const char *Name() const { return "Nop"; }
600 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
601 virtual void dump_spec(outputStream *st) const { } // No per-operand info
602 #endif
603 };
604
605 //------------------------------MachSpillCopyNode------------------------------
606 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
607 // location (stack or register).
608 class MachSpillCopyNode : public MachIdealNode {
609 public:
610 enum SpillType {
611 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
612 PhiInput, // Inserted when coalescing of a phi node and its input fails
613 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
614 LoopPhiInput, // Pre-split compares of loop-phis
615 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
616 // if in high pressure region or the lrg is bound
617 RegToReg, // A register to register move
618 RegToMem, // A register to memory move
619 MemToReg, // A memory to register move
620 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
621 // the phi and its input resides at different locations (i.e. reg or mem)
622 BasePointerToMem, // Spill base pointer to memory at safepoint
623 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
624 // stretched beyond a new definition point, therefore we split out new copies instead
625 CallUse, // Spill use at a call
626 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
627 };
628 private:
629 const RegMask *_in; // RegMask for input
630 const RegMask *_out; // RegMask for output
631 const Type *_type;
632 const SpillType _spill_type;
633 public:
634 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
635 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
636 init_class_id(Class_MachSpillCopy);
637 init_flags(Flag_is_Copy);
638 add_req(nullptr);
639 add_req(n);
640 }
641 virtual uint size_of() const { return sizeof(*this); }
642 void set_out_RegMask(const RegMask &out) { _out = &out; }
643 void set_in_RegMask(const RegMask &in) { _in = ∈ }
644 virtual const RegMask &out_RegMask() const { return *_out; }
645 virtual const RegMask &in_RegMask(uint) const { return *_in; }
646 virtual const class Type *bottom_type() const { return _type; }
647 virtual uint ideal_reg() const { return _type->ideal_reg(); }
648 virtual uint oper_input_base() const { return 1; }
649 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
650
651 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
652 virtual uint size(PhaseRegAlloc *ra_) const;
653
654
655 #ifndef PRODUCT
656 static const char *spill_type(SpillType st) {
657 switch (st) {
658 case TwoAddress:
659 return "TwoAddressSpillCopy";
660 case PhiInput:
661 return "PhiInputSpillCopy";
662 case DebugUse:
663 return "DebugUseSpillCopy";
664 case LoopPhiInput:
665 return "LoopPhiInputSpillCopy";
666 case Definition:
667 return "DefinitionSpillCopy";
668 case RegToReg:
669 return "RegToRegSpillCopy";
670 case RegToMem:
671 return "RegToMemSpillCopy";
672 case MemToReg:
673 return "MemToRegSpillCopy";
674 case PhiLocationDifferToInputLocation:
675 return "PhiLocationDifferToInputLocationSpillCopy";
676 case BasePointerToMem:
677 return "BasePointerToMemSpillCopy";
678 case InputToRematerialization:
679 return "InputToRematerializationSpillCopy";
680 case CallUse:
681 return "CallUseSpillCopy";
682 case Bound:
683 return "BoundSpillCopy";
684 default:
685 assert(false, "Must have valid spill type");
686 return "MachSpillCopy";
687 }
688 }
689
690 virtual const char *Name() const {
691 return spill_type(_spill_type);
692 }
693
694 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
695 #endif
696 };
697
698 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
699 // however it doesn't have a control input and is more like a MergeMem.
700 // It is inserted after the register allocation is done to ensure that nodes use single
701 // definition of a multidef lrg in a block.
702 class MachMergeNode : public MachIdealNode {
703 public:
704 MachMergeNode(Node *n1) {
705 init_class_id(Class_MachMerge);
706 add_req(nullptr);
707 add_req(n1);
708 }
709 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
710 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
711 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
712 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
713 virtual uint oper_input_base() const { return 1; }
714 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { }
715 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
716 #ifndef PRODUCT
717 virtual const char *Name() const { return "MachMerge"; }
718 #endif
719 };
720
721 //------------------------------MachBranchNode--------------------------------
722 // Abstract machine branch Node
723 class MachBranchNode : public MachIdealNode {
724 public:
725 MachBranchNode() : MachIdealNode() {
726 init_class_id(Class_MachBranch);
727 }
728 virtual void label_set(Label* label, uint block_num) = 0;
729 virtual void save_label(Label** label, uint* block_num) = 0;
730
731 // Support for short branches
732 virtual MachNode *short_branch_version() { return nullptr; }
733
734 virtual bool pinned() const { return true; };
735 };
736
737 //------------------------------MachNullChkNode--------------------------------
738 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
739 // also some kind of memory op. Turns the indicated MachNode into a
740 // conditional branch with good latency on the ptr-not-null path and awful
741 // latency on the pointer-is-null path.
742
743 class MachNullCheckNode : public MachBranchNode {
744 public:
745 const uint _vidx; // Index of memop being tested
746 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
747 init_class_id(Class_MachNullCheck);
748 add_req(ctrl);
749 add_req(memop);
750 }
751 virtual int Opcode() const;
752 virtual uint size_of() const { return sizeof(*this); }
753
754 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
755 virtual void label_set(Label* label, uint block_num);
756 virtual void save_label(Label** label, uint* block_num);
757 virtual void negate() { }
758 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
759 virtual uint ideal_reg() const { return NotAMachineReg; }
760 virtual const RegMask &in_RegMask(uint) const;
761 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
762 #ifndef PRODUCT
763 virtual const char *Name() const { return "NullCheck"; }
764 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
765 #endif
766 };
767
768 //------------------------------MachProjNode----------------------------------
769 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
770 // just MachNodes made by the Ideal world that replicate simple projections
771 // but with machine-dependent input & output register masks. Generally
772 // produced as part of calling conventions. Normally I make MachNodes as part
773 // of the Matcher process, but the Matcher is ill suited to issues involving
774 // frame handling, so frame handling is all done in the Ideal world with
775 // occasional callbacks to the machine model for important info.
776 class MachProjNode : public ProjNode {
777 public:
778 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
779 init_class_id(Class_MachProj);
780 }
781 RegMask _rout;
782 const uint _ideal_reg;
783 enum projType {
784 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
785 fat_proj = 999 // Projs killing many regs, defined by _rout
786 };
787 virtual int Opcode() const;
788 virtual const Type *bottom_type() const;
789 virtual const TypePtr *adr_type() const;
790 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
791 virtual const RegMask &out_RegMask() const { return _rout; }
792 virtual uint ideal_reg() const { return _ideal_reg; }
793 // Need size_of() for virtual ProjNode::clone()
794 virtual uint size_of() const { return sizeof(MachProjNode); }
795 #ifndef PRODUCT
796 virtual void dump_spec(outputStream *st) const;
797 #endif
798 };
799
800 //------------------------------MachIfNode-------------------------------------
801 // Machine-specific versions of IfNodes
802 class MachIfNode : public MachBranchNode {
803 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
804 public:
805 float _prob; // Probability branch goes either way
806 float _fcnt; // Frequency counter
807 MachIfNode() : MachBranchNode() {
808 init_class_id(Class_MachIf);
809 }
810 // Negate conditional branches.
811 virtual void negate() = 0;
812 #ifndef PRODUCT
813 virtual void dump_spec(outputStream *st) const;
814 #endif
815 };
816
817 //------------------------------MachJumpNode-----------------------------------
818 // Machine-specific versions of JumpNodes
819 class MachJumpNode : public MachConstantNode {
820 public:
821 float* _probs;
822 MachJumpNode() : MachConstantNode() {
823 init_class_id(Class_MachJump);
824 }
825 };
826
827 //------------------------------MachGotoNode-----------------------------------
828 // Machine-specific versions of GotoNodes
829 class MachGotoNode : public MachBranchNode {
830 public:
831 MachGotoNode() : MachBranchNode() {
832 init_class_id(Class_MachGoto);
833 }
834 };
835
836 //------------------------------MachFastLockNode-------------------------------------
837 // Machine-specific versions of FastLockNodes
838 class MachFastLockNode : public MachNode {
839 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
840 public:
841 RTMLockingCounters* _rtm_counters; // RTM lock counters for inflated locks
842 RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
843 MachFastLockNode() : MachNode() {}
844 };
845
846 //------------------------------MachReturnNode--------------------------------
847 // Machine-specific versions of subroutine returns
848 class MachReturnNode : public MachNode {
849 virtual uint size_of() const; // Size is bigger
850 public:
851 RegMask *_in_rms; // Input register masks, set during allocation
852 ReallocMark _nesting; // assertion check for reallocations
853 const TypePtr* _adr_type; // memory effects of call or return
854 MachReturnNode() : MachNode() {
855 init_class_id(Class_MachReturn);
856 _adr_type = TypePtr::BOTTOM; // the default: all of memory
857 }
858
859 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
860
861 virtual const RegMask &in_RegMask(uint) const;
862 virtual bool pinned() const { return true; };
863 virtual const TypePtr *adr_type() const;
864 };
865
866 //------------------------------MachSafePointNode-----------------------------
867 // Machine-specific versions of safepoints
868 class MachSafePointNode : public MachReturnNode {
869 public:
870 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
871 JVMState* _jvms; // Pointer to list of JVM State Objects
872 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
873 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
874 OopMap* oop_map() const { return _oop_map; }
875 void set_oop_map(OopMap* om) { _oop_map = om; }
876
877 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
878 init_class_id(Class_MachSafePoint);
879 }
880
881 virtual JVMState* jvms() const { return _jvms; }
882 void set_jvms(JVMState* s) {
883 _jvms = s;
884 }
885 virtual const Type *bottom_type() const;
886
887 virtual const RegMask &in_RegMask(uint) const;
888
889 // Functionality from old debug nodes
890 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
891 Node *frameptr () const { return in(TypeFunc::FramePtr); }
892
893 Node *local(const JVMState* jvms, uint idx) const {
894 assert(verify_jvms(jvms), "jvms must match");
895 return in(_jvmadj + jvms->locoff() + idx);
896 }
897 Node *stack(const JVMState* jvms, uint idx) const {
898 assert(verify_jvms(jvms), "jvms must match");
899 return in(_jvmadj + jvms->stkoff() + idx);
900 }
901 Node *monitor_obj(const JVMState* jvms, uint idx) const {
902 assert(verify_jvms(jvms), "jvms must match");
903 return in(_jvmadj + jvms->monitor_obj_offset(idx));
904 }
905 Node *monitor_box(const JVMState* jvms, uint idx) const {
906 assert(verify_jvms(jvms), "jvms must match");
907 return in(_jvmadj + jvms->monitor_box_offset(idx));
908 }
909 void set_local(const JVMState* jvms, uint idx, Node *c) {
910 assert(verify_jvms(jvms), "jvms must match");
911 set_req(_jvmadj + jvms->locoff() + idx, c);
912 }
913 void set_stack(const JVMState* jvms, uint idx, Node *c) {
914 assert(verify_jvms(jvms), "jvms must match");
915 set_req(_jvmadj + jvms->stkoff() + idx, c);
916 }
917 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
918 assert(verify_jvms(jvms), "jvms must match");
919 set_req(_jvmadj + jvms->monoff() + idx, c);
920 }
921 };
922
923 //------------------------------MachCallNode----------------------------------
924 // Machine-specific versions of subroutine calls
925 class MachCallNode : public MachSafePointNode {
926 protected:
927 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
928 virtual bool cmp( const Node &n ) const;
929 virtual uint size_of() const = 0; // Size is bigger
930 public:
931 const TypeFunc *_tf; // Function type
932 address _entry_point; // Address of the method being called
933 float _cnt; // Estimate of number of times called
934 bool _guaranteed_safepoint; // Do we need to observe safepoint?
935
936 const TypeFunc* tf() const { return _tf; }
937 address entry_point() const { return _entry_point; }
938 float cnt() const { return _cnt; }
939
940 void set_tf(const TypeFunc* tf) { _tf = tf; }
941 void set_entry_point(address p) { _entry_point = p; }
942 void set_cnt(float c) { _cnt = c; }
943 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
944
945 MachCallNode() : MachSafePointNode() {
946 init_class_id(Class_MachCall);
947 }
948
949 virtual const Type *bottom_type() const;
950 virtual bool pinned() const { return false; }
951 virtual const Type* Value(PhaseGVN* phase) const;
952 virtual const RegMask &in_RegMask(uint) const;
953 virtual int ret_addr_offset() { return 0; }
954
955 bool return_value_is_used() const;
956
957 // Similar to cousin class CallNode::returns_pointer
958 bool returns_pointer() const;
959 bool returns_scalarized() const;
960
961 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
962
963 #ifndef PRODUCT
964 virtual void dump_spec(outputStream *st) const;
965 #endif
966 };
967
968 //------------------------------MachCallJavaNode------------------------------
969 // "Base" class for machine-specific versions of subroutine calls
970 class MachCallJavaNode : public MachCallNode {
971 protected:
972 virtual bool cmp( const Node &n ) const;
973 virtual uint size_of() const; // Size is bigger
974 public:
975 ciMethod* _method; // Method being direct called
976 bool _override_symbolic_info; // Override symbolic call site info from bytecode
977 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
978 bool _method_handle_invoke; // Tells if the call has to preserve SP
979 bool _arg_escape; // ArgEscape in parameter list
980 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
981 init_class_id(Class_MachCallJava);
982 }
983
984 virtual const RegMask &in_RegMask(uint) const;
985
986 int resolved_method_index(CodeBuffer &cbuf) const {
987 if (_override_symbolic_info) {
988 // Attach corresponding Method* to the call site, so VM can use it during resolution
989 // instead of querying symbolic info from bytecode.
990 assert(_method != nullptr, "method should be set");
991 assert(_method->constant_encoding()->is_method(), "should point to a Method");
992 return cbuf.oop_recorder()->find_index(_method->constant_encoding());
993 }
994 return 0; // Use symbolic info from bytecode (resolved_method is null).
995 }
996
997 #ifndef PRODUCT
998 virtual void dump_spec(outputStream *st) const;
999 #endif
1000 };
1001
1002 //------------------------------MachCallStaticJavaNode------------------------
1003 // Machine-specific versions of monomorphic subroutine calls
1004 class MachCallStaticJavaNode : public MachCallJavaNode {
1005 virtual bool cmp( const Node &n ) const;
1006 virtual uint size_of() const; // Size is bigger
1007 public:
1008 const char *_name; // Runtime wrapper name
1009 MachCallStaticJavaNode() : MachCallJavaNode() {
1010 init_class_id(Class_MachCallStaticJava);
1011 }
1012
1013 // If this is an uncommon trap, return the request code, else zero.
1014 int uncommon_trap_request() const;
1015
1016 virtual int ret_addr_offset();
1017 #ifndef PRODUCT
1018 virtual void dump_spec(outputStream *st) const;
1019 void dump_trap_args(outputStream *st) const;
1020 #endif
1021 };
1022
1023 //------------------------------MachCallDynamicJavaNode------------------------
1024 // Machine-specific versions of possibly megamorphic subroutine calls
1025 class MachCallDynamicJavaNode : public MachCallJavaNode {
1026 public:
1027 int _vtable_index;
1028 MachCallDynamicJavaNode() : MachCallJavaNode() {
1029 init_class_id(Class_MachCallDynamicJava);
1030 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
1031 }
1032 virtual int ret_addr_offset();
1033 #ifndef PRODUCT
1034 virtual void dump_spec(outputStream *st) const;
1035 #endif
1036 };
1037
1038 //------------------------------MachCallRuntimeNode----------------------------
1039 // Machine-specific versions of subroutine calls
1040 class MachCallRuntimeNode : public MachCallNode {
1041 virtual bool cmp( const Node &n ) const;
1042 virtual uint size_of() const; // Size is bigger
1043 public:
1044 const char *_name; // Printable name, if _method is null
1045 bool _leaf_no_fp; // Is this CallLeafNoFP?
1046 MachCallRuntimeNode() : MachCallNode() {
1047 init_class_id(Class_MachCallRuntime);
1048 }
1049 virtual int ret_addr_offset();
1050 #ifndef PRODUCT
1051 virtual void dump_spec(outputStream *st) const;
1052 #endif
1053 };
1054
1055 class MachCallLeafNode: public MachCallRuntimeNode {
1056 public:
1057 MachCallLeafNode() : MachCallRuntimeNode() {
1058 init_class_id(Class_MachCallLeaf);
1059 }
1060 };
1061
1062 //------------------------------MachHaltNode-----------------------------------
1063 // Machine-specific versions of halt nodes
1064 class MachHaltNode : public MachReturnNode {
1065 public:
1066 bool _reachable;
1067 const char* _halt_reason;
1068 virtual JVMState* jvms() const;
1069 bool is_reachable() const {
1070 return _reachable;
1071 }
1072 };
1073
1074 class MachMemBarNode : public MachNode {
1075 virtual uint size_of() const; // Size is bigger
1076 public:
1077 const TypePtr* _adr_type; // memory effects
1078 MachMemBarNode() : MachNode() {
1079 init_class_id(Class_MachMemBar);
1080 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1081 }
1082
1083 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1084 virtual const TypePtr *adr_type() const;
1085 };
1086
1087
1088 //------------------------------MachTempNode-----------------------------------
1089 // Node used by the adlc to construct inputs to represent temporary registers
1090 class MachTempNode : public MachNode {
1091 private:
1092 MachOper *_opnd_array[1];
1093
1094 public:
1095 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1096 virtual uint rule() const { return 9999999; }
1097 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
1098
1099 MachTempNode(MachOper* oper) {
1100 init_class_id(Class_MachTemp);
1101 _num_opnds = 1;
1102 _opnds = _opnd_array;
1103 add_req(nullptr);
1104 _opnds[0] = oper;
1105 }
1106 virtual uint size_of() const { return sizeof(MachTempNode); }
1107
1108 #ifndef PRODUCT
1109 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1110 virtual const char *Name() const { return "MachTemp";}
1111 #endif
1112 };
1113
1114
1115
1116 //------------------------------labelOper--------------------------------------
1117 // Machine-independent version of label operand
1118 class labelOper : public MachOper {
1119 private:
1120 virtual uint num_edges() const { return 0; }
1121 public:
1122 // Supported for fixed size branches
1123 Label* _label; // Label for branch(es)
1124
1125 uint _block_num;
1126
1127 labelOper() : _label(0), _block_num(0) {}
1128
1129 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1130
1131 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1132
1133 virtual MachOper *clone() const;
1134
1135 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1136
1137 virtual uint opcode() const;
1138
1139 virtual uint hash() const;
1140 virtual bool cmp( const MachOper &oper ) const;
1141 #ifndef PRODUCT
1142 virtual const char *Name() const { return "Label";}
1143
1144 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1145 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1146 #endif
1147 };
1148
1149
1150 //------------------------------methodOper--------------------------------------
1151 // Machine-independent version of method operand
1152 class methodOper : public MachOper {
1153 private:
1154 virtual uint num_edges() const { return 0; }
1155 public:
1156 intptr_t _method; // Address of method
1157 methodOper() : _method(0) {}
1158 methodOper(intptr_t method) : _method(method) {}
1159
1160 virtual MachOper *clone() const;
1161
1162 virtual intptr_t method() const { return _method; }
1163
1164 virtual uint opcode() const;
1165
1166 virtual uint hash() const;
1167 virtual bool cmp( const MachOper &oper ) const;
1168 #ifndef PRODUCT
1169 virtual const char *Name() const { return "Method";}
1170
1171 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1172 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1173 #endif
1174 };
1175
1176 #endif // SHARE_OPTO_MACHNODE_HPP