1 /*
2 * Copyright (c) 1997, 2024, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/c2_MacroAssembler.hpp"
29 #include "opto/callnode.hpp"
30 #include "opto/constantTable.hpp"
31 #include "opto/matcher.hpp"
32 #include "opto/multnode.hpp"
33 #include "opto/node.hpp"
34 #include "opto/regmask.hpp"
35 #include "utilities/growableArray.hpp"
36
37 class BufferBlob;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class MachVEPNode;
55 class Matcher;
56 class PhaseRegAlloc;
57 class RegMask;
58 class State;
59
60 //---------------------------MachOper------------------------------------------
61 class MachOper : public ResourceObj {
62 public:
63 // Allocate right next to the MachNodes in the same arena
64 void *operator new(size_t x) throw() {
65 Compile* C = Compile::current();
66 return C->node_arena()->AmallocWords(x);
67 }
68
69 // Opcode
70 virtual uint opcode() const = 0;
71
72 // Number of input edges.
73 // Generally at least 1
74 virtual uint num_edges() const { return 1; }
75 // Array of Register masks
76 virtual const RegMask *in_RegMask(int index) const;
77
78 // Methods to output the encoding of the operand
79
80 // Negate conditional branches. Error for non-branch Nodes
81 virtual void negate();
82
83 // Return the value requested
84 // result register lookup, corresponding to int_format
85 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
86 // input register lookup, corresponding to ext_format
87 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
88
89 // helpers for MacroAssembler generation from ADLC
90 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_Register(reg(ra_, node));
92 }
93 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_Register(reg(ra_, node, idx));
95 }
96 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
97 return ::as_FloatRegister(reg(ra_, node));
98 }
99 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
100 return ::as_FloatRegister(reg(ra_, node, idx));
101 }
102
103 #if defined(IA32) || defined(AMD64)
104 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
105 return ::as_KRegister(reg(ra_, node));
106 }
107 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
108 return ::as_KRegister(reg(ra_, node, idx));
109 }
110 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
111 return ::as_XMMRegister(reg(ra_, node));
112 }
113 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
114 return ::as_XMMRegister(reg(ra_, node, idx));
115 }
116 #endif
117 // CondRegister reg converter
118 #if defined(PPC64)
119 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
120 return ::as_ConditionRegister(reg(ra_, node));
121 }
122 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
123 return ::as_ConditionRegister(reg(ra_, node, idx));
124 }
125 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
126 return ::as_VectorRegister(reg(ra_, node));
127 }
128 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
129 return ::as_VectorRegister(reg(ra_, node, idx));
130 }
131 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
132 return ::as_VectorSRegister(reg(ra_, node));
133 }
134 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
135 return ::as_VectorSRegister(reg(ra_, node, idx));
136 }
137 #endif
138 #if defined(AARCH64)
139 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
140 return ::as_PRegister(reg(ra_, node));
141 }
142 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
143 return ::as_PRegister(reg(ra_, node, idx));
144 }
145 #endif
146
147 virtual intptr_t constant() const;
148 virtual relocInfo::relocType constant_reloc() const;
149 virtual jdouble constantD() const;
150 virtual jfloat constantF() const;
151 virtual jlong constantL() const;
152 virtual TypeOopPtr *oop() const;
153 virtual int ccode() const;
154 // A zero, default, indicates this value is not needed.
155 // May need to lookup the base register, as done in int_ and ext_format
156 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
157 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
158 virtual int scale() const;
159 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
160 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
161 // Check for PC-Relative displacement
162 virtual relocInfo::relocType disp_reloc() const;
163 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
164 virtual int base_position() const; // base edge position, or -1
165 virtual int index_position() const; // index edge position, or -1
166
167 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
168 // Only returns non-null value for x86_32.ad's indOffset32X
169 virtual const TypePtr *disp_as_type() const { return nullptr; }
170
171 // Return the label
172 virtual Label *label() const;
173
174 // Return the method's address
175 virtual intptr_t method() const;
176
177 // Hash and compare over operands are currently identical
178 virtual uint hash() const;
179 virtual bool cmp( const MachOper &oper ) const;
180
181 // Virtual clone, since I do not know how big the MachOper is.
182 virtual MachOper *clone() const = 0;
183
184 // Return ideal Type from simple operands. Fail for complex operands.
185 virtual const Type *type() const;
186
187 // Set an integer offset if we have one, or error otherwise
188 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
189
190 #ifndef PRODUCT
191 // Return name of operand
192 virtual const char *Name() const { return "???";}
193
194 // Methods to output the text version of the operand
195 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
196 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
197
198 virtual void dump_spec(outputStream *st) const; // Print per-operand info
199
200 // Check whether o is a valid oper.
201 static bool notAnOper(const MachOper *o) {
202 if (o == nullptr) return true;
203 if (((intptr_t)o & 1) != 0) return true;
204 if (*(address*)o == badAddress) return true; // kill by Node::destruct
205 return false;
206 }
207 #endif // !PRODUCT
208 };
209
210 //------------------------------MachNode---------------------------------------
211 // Base type for all machine specific nodes. All node classes generated by the
212 // ADLC inherit from this class.
213 class MachNode : public Node {
214 public:
215 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
216 init_class_id(Class_Mach);
217 }
218 // Required boilerplate
219 virtual uint size_of() const { return sizeof(MachNode); }
220 virtual int Opcode() const; // Always equal to MachNode
221 virtual uint rule() const = 0; // Machine-specific opcode
222 // Number of inputs which come before the first operand.
223 // Generally at least 1, to skip the Control input
224 virtual uint oper_input_base() const { return 1; }
225 // Position of constant base node in node's inputs. -1 if
226 // no constant base node input.
227 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
228
229 uint8_t barrier_data() const { return _barrier; }
230 void set_barrier_data(uint8_t data) { _barrier = data; }
231
232 // Copy index, inputs, and operands to a new version of the instruction.
233 // Called from cisc_version() and short_branch_version().
234 void fill_new_machnode(MachNode *n) const;
235
236 // Return an equivalent instruction using memory for cisc_operand position
237 virtual MachNode *cisc_version(int offset);
238 // Modify this instruction's register mask to use stack version for cisc_operand
239 virtual void use_cisc_RegMask();
240
241 // Support for short branches
242 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
243
244 // Avoid back to back some instructions on some CPUs.
245 enum AvoidBackToBackFlag { AVOID_NONE = 0,
246 AVOID_BEFORE = Flag_avoid_back_to_back_before,
247 AVOID_AFTER = Flag_avoid_back_to_back_after,
248 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
249
250 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
251 return (flags() & flag_value) == flag_value;
252 }
253
254 // instruction implemented with a call
255 bool has_call() const { return (flags() & Flag_has_call) != 0; }
256
257 // First index in _in[] corresponding to operand, or -1 if there is none
258 int operand_index(uint operand) const;
259 int operand_index(const MachOper *oper) const;
260 int operand_index(Node* m) const;
261
262 // Register class input is expected in
263 virtual const RegMask &in_RegMask(uint) const;
264
265 // cisc-spillable instructions redefine for use by in_RegMask
266 virtual const RegMask *cisc_RegMask() const { return nullptr; }
267
268 // If this instruction is a 2-address instruction, then return the
269 // index of the input which must match the output. Not necessary
270 // for instructions which bind the input and output register to the
271 // same singleton register (e.g., Intel IDIV which binds AX to be
272 // both an input and an output). It is necessary when the input and
273 // output have choices - but they must use the same choice.
274 virtual uint two_adr( ) const { return 0; }
275
276 // The GC might require some barrier metadata for machine code emission.
277 uint8_t _barrier;
278
279 // Array of complex operand pointers. Each corresponds to zero or
280 // more leafs. Must be set by MachNode constructor to point to an
281 // internal array of MachOpers. The MachOper array is sized by
282 // specific MachNodes described in the ADL.
283 uint16_t _num_opnds;
284 MachOper **_opnds;
285 uint16_t num_opnds() const { return _num_opnds; }
286
287 // Emit bytes using C2_MacroAssembler
288 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
289 // Expand node after register allocation.
290 // Node is replaced by several nodes in the postalloc expand phase.
291 // Corresponding methods are generated for nodes if they specify
292 // postalloc_expand. See block.cpp for more documentation.
293 virtual bool requires_postalloc_expand() const { return false; }
294 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
295 // Size of instruction in bytes
296 virtual uint size(PhaseRegAlloc *ra_) const;
297 // Helper function that computes size by emitting code
298 virtual uint emit_size(PhaseRegAlloc *ra_) const;
299
300 // Return the alignment required (in units of relocInfo::addr_unit())
301 // for this instruction (must be a power of 2)
302 int pd_alignment_required() const;
303 virtual int alignment_required() const { return pd_alignment_required(); }
304
305 // Return the padding (in bytes) to be emitted before this
306 // instruction to properly align it.
307 virtual int compute_padding(int current_offset) const;
308
309 // Return number of relocatable values contained in this instruction
310 virtual int reloc() const { return 0; }
311
312 // Return number of words used for double constants in this instruction
313 virtual int ins_num_consts() const { return 0; }
314
315 // Hash and compare over operands. Used to do GVN on machine Nodes.
316 virtual uint hash() const;
317 virtual bool cmp( const Node &n ) const;
318
319 // Expand method for MachNode, replaces nodes representing pseudo
320 // instructions with a set of nodes which represent real machine
321 // instructions and compute the same value.
322 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
323
324 // Bottom_type call; value comes from operand0
325 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
326 virtual uint ideal_reg() const {
327 const Type *t = _opnds[0]->type();
328 if (t == TypeInt::CC) {
329 return Op_RegFlags;
330 } else {
331 return t->ideal_reg();
332 }
333 }
334
335 // If this is a memory op, return the base pointer and fixed offset.
336 // If there are no such, return null. If there are multiple addresses
337 // or the address is indeterminate (rare cases) then return (Node*)-1,
338 // which serves as node bottom.
339 // If the offset is not statically determined, set it to Type::OffsetBot.
340 // This method is free to ignore stack slots if that helps.
341 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
342 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
343 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
344
345 // Helper for get_base_and_disp: find the base and index input nodes.
346 // Returns the MachOper as determined by memory_operand(), for use, if
347 // needed by the caller. If (MachOper *)-1 is returned, base and index
348 // are set to NodeSentinel. If null is returned, base and
349 // index are set to null.
350 const MachOper* memory_inputs(Node* &base, Node* &index) const;
351
352 // Helper for memory_inputs: Which operand carries the necessary info?
353 // By default, returns null, which means there is no such operand.
354 // If it returns (MachOper*)-1, this means there are multiple memories.
355 virtual const MachOper* memory_operand() const { return nullptr; }
356
357 // Call "get_base_and_disp" to decide which category of memory is used here.
358 virtual const class TypePtr *adr_type() const;
359
360 // Apply peephole rule(s) to this instruction
361 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
362
363 // Top-level ideal Opcode matched
364 virtual int ideal_Opcode() const { return Op_Node; }
365
366 // Adds the label for the case
367 virtual void add_case_label( int switch_val, Label* blockLabel);
368
369 // Set the absolute address for methods
370 virtual void method_set( intptr_t addr );
371
372 // Should we clone rather than spill this instruction?
373 bool rematerialize() const;
374
375 // Get the pipeline info
376 static const Pipeline *pipeline_class();
377 virtual const Pipeline *pipeline() const;
378
379 // Returns true if this node is a check that can be implemented with a trap.
380 virtual bool is_TrapBasedCheckNode() const { return false; }
381 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
382 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
383
384 #ifndef PRODUCT
385 virtual const char *Name() const = 0; // Machine-specific name
386 virtual void dump_spec(outputStream *st) const; // Print per-node info
387 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
388 #endif
389 };
390
391 //------------------------------MachIdealNode----------------------------
392 // Machine specific versions of nodes that must be defined by user.
393 // These are not converted by matcher from ideal nodes to machine nodes
394 // but are inserted into the code by the compiler.
395 class MachIdealNode : public MachNode {
396 public:
397 MachIdealNode( ) {}
398
399 // Define the following defaults for non-matched machine nodes
400 virtual uint oper_input_base() const { return 0; }
401 virtual uint rule() const { return 9999999; }
402 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
403 };
404
405 //------------------------------MachTypeNode----------------------------
406 // Machine Nodes that need to retain a known Type.
407 class MachTypeNode : public MachNode {
408 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
409 public:
410 MachTypeNode( ) {}
411 const Type *_bottom_type;
412
413 virtual const class Type *bottom_type() const { return _bottom_type; }
414 #ifndef PRODUCT
415 virtual void dump_spec(outputStream *st) const;
416 #endif
417 };
418
419 //------------------------------MachBreakpointNode----------------------------
420 // Machine breakpoint or interrupt Node
421 class MachBreakpointNode : public MachIdealNode {
422 public:
423 MachBreakpointNode( ) {}
424 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
425 virtual uint size(PhaseRegAlloc *ra_) const;
426
427 #ifndef PRODUCT
428 virtual const char *Name() const { return "Breakpoint"; }
429 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
430 #endif
431 };
432
433 //------------------------------MachConstantBaseNode--------------------------
434 // Machine node that represents the base address of the constant table.
435 class MachConstantBaseNode : public MachIdealNode {
436 public:
437 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
438
439 public:
440 MachConstantBaseNode() : MachIdealNode() {
441 init_class_id(Class_MachConstantBase);
442 }
443 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
444 virtual uint ideal_reg() const { return Op_RegP; }
445 virtual uint oper_input_base() const { return 1; }
446
447 virtual bool requires_postalloc_expand() const;
448 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
449
450 virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
451 virtual uint size(PhaseRegAlloc* ra_) const;
452
453 static const RegMask& static_out_RegMask() { return _out_RegMask; }
454 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
455
456 #ifndef PRODUCT
457 virtual const char* Name() const { return "MachConstantBaseNode"; }
458 virtual void format(PhaseRegAlloc*, outputStream* st) const;
459 #endif
460 };
461
462 //------------------------------MachConstantNode-------------------------------
463 // Machine node that holds a constant which is stored in the constant table.
464 class MachConstantNode : public MachTypeNode {
465 protected:
466 ConstantTable::Constant _constant; // This node's constant.
467
468 public:
469 MachConstantNode() : MachTypeNode() {
470 init_class_id(Class_MachConstant);
471 }
472
473 virtual void eval_constant(Compile* C) {
474 #ifdef ASSERT
475 tty->print("missing MachConstantNode eval_constant function: ");
476 dump();
477 #endif
478 ShouldNotCallThis();
479 }
480
481 virtual const RegMask &in_RegMask(uint idx) const {
482 if (idx == mach_constant_base_node_input())
483 return MachConstantBaseNode::static_out_RegMask();
484 return MachNode::in_RegMask(idx);
485 }
486
487 // Input edge of MachConstantBaseNode.
488 virtual uint mach_constant_base_node_input() const { return req() - 1; }
489
490 int constant_offset();
491 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
492 // Unchecked version to avoid assertions in debug output.
493 int constant_offset_unchecked() const;
494 };
495
496 //------------------------------MachVEPNode-----------------------------------
497 // Machine Inline Type Entry Point Node
498 class MachVEPNode : public MachIdealNode {
499 public:
500 Label* _verified_entry;
501
502 MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
503 _verified_entry(verified_entry),
504 _verified(verified),
505 _receiver_only(receiver_only) {
506 init_class_id(Class_MachVEP);
507 }
508 virtual bool cmp(const Node &n) const {
509 return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
510 (_verified == ((MachVEPNode&)n)._verified) &&
511 (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
512 MachIdealNode::cmp(n);
513 }
514 virtual uint size_of() const { return sizeof(*this); }
515 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const;
516
517 #ifndef PRODUCT
518 virtual const char* Name() const { return "InlineType Entry-Point"; }
519 virtual void format(PhaseRegAlloc*, outputStream* st) const;
520 #endif
521 private:
522 bool _verified;
523 bool _receiver_only;
524 };
525
526 //------------------------------MachUEPNode-----------------------------------
527 // Machine Unvalidated Entry Point Node
528 class MachUEPNode : public MachIdealNode {
529 public:
530 MachUEPNode( ) {}
531 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
532
533 #ifndef PRODUCT
534 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
535 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
536 #endif
537 };
538
539 //------------------------------MachPrologNode--------------------------------
540 // Machine function Prolog Node
541 class MachPrologNode : public MachIdealNode {
542 public:
543 Label* _verified_entry;
544
545 MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
546 init_class_id(Class_MachProlog);
547 }
548 virtual bool cmp(const Node &n) const {
549 return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
550 }
551 virtual uint size_of() const { return sizeof(*this); }
552 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
553 virtual int reloc() const;
554
555 #ifndef PRODUCT
556 virtual const char *Name() const { return "Prolog"; }
557 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
558 #endif
559 };
560
561 //------------------------------MachEpilogNode--------------------------------
562 // Machine function Epilog Node
563 class MachEpilogNode : public MachIdealNode {
564 public:
565 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
566 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
567 virtual int reloc() const;
568 virtual const Pipeline *pipeline() const;
569
570 private:
571 bool _do_polling;
572
573 public:
574 bool do_polling() const { return _do_polling; }
575
576 #ifndef PRODUCT
577 virtual const char *Name() const { return "Epilog"; }
578 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
579 #endif
580 };
581
582 //------------------------------MachNopNode-----------------------------------
583 // Machine function Nop Node
584 class MachNopNode : public MachIdealNode {
585 private:
586 int _count;
587 public:
588 MachNopNode( ) : _count(1) {}
589 MachNopNode( int count ) : _count(count) {}
590 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
591 virtual uint size(PhaseRegAlloc *ra_) const;
592
593 virtual const class Type *bottom_type() const { return Type::CONTROL; }
594
595 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
596 virtual const Pipeline *pipeline() const;
597 #ifndef PRODUCT
598 virtual const char *Name() const { return "Nop"; }
599 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
600 virtual void dump_spec(outputStream *st) const { } // No per-operand info
601 #endif
602 };
603
604 //------------------------------MachSpillCopyNode------------------------------
605 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
606 // location (stack or register).
607 class MachSpillCopyNode : public MachIdealNode {
608 public:
609 enum SpillType {
610 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
611 PhiInput, // Inserted when coalescing of a phi node and its input fails
612 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
613 LoopPhiInput, // Pre-split compares of loop-phis
614 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
615 // if in high pressure region or the lrg is bound
616 RegToReg, // A register to register move
617 RegToMem, // A register to memory move
618 MemToReg, // A memory to register move
619 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
620 // the phi and its input resides at different locations (i.e. reg or mem)
621 BasePointerToMem, // Spill base pointer to memory at safepoint
622 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
623 // stretched beyond a new definition point, therefore we split out new copies instead
624 CallUse, // Spill use at a call
625 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
626 };
627 private:
628 const RegMask *_in; // RegMask for input
629 const RegMask *_out; // RegMask for output
630 const Type *_type;
631 const SpillType _spill_type;
632 public:
633 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
634 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
635 init_class_id(Class_MachSpillCopy);
636 init_flags(Flag_is_Copy);
637 add_req(nullptr);
638 add_req(n);
639 }
640 virtual uint size_of() const { return sizeof(*this); }
641 void set_out_RegMask(const RegMask &out) { _out = &out; }
642 void set_in_RegMask(const RegMask &in) { _in = ∈ }
643 virtual const RegMask &out_RegMask() const { return *_out; }
644 virtual const RegMask &in_RegMask(uint) const { return *_in; }
645 virtual const class Type *bottom_type() const { return _type; }
646 virtual uint ideal_reg() const { return _type->ideal_reg(); }
647 virtual uint oper_input_base() const { return 1; }
648 uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
649
650 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
651 virtual uint size(PhaseRegAlloc *ra_) const;
652
653
654 #ifndef PRODUCT
655 static const char *spill_type(SpillType st) {
656 switch (st) {
657 case TwoAddress:
658 return "TwoAddressSpillCopy";
659 case PhiInput:
660 return "PhiInputSpillCopy";
661 case DebugUse:
662 return "DebugUseSpillCopy";
663 case LoopPhiInput:
664 return "LoopPhiInputSpillCopy";
665 case Definition:
666 return "DefinitionSpillCopy";
667 case RegToReg:
668 return "RegToRegSpillCopy";
669 case RegToMem:
670 return "RegToMemSpillCopy";
671 case MemToReg:
672 return "MemToRegSpillCopy";
673 case PhiLocationDifferToInputLocation:
674 return "PhiLocationDifferToInputLocationSpillCopy";
675 case BasePointerToMem:
676 return "BasePointerToMemSpillCopy";
677 case InputToRematerialization:
678 return "InputToRematerializationSpillCopy";
679 case CallUse:
680 return "CallUseSpillCopy";
681 case Bound:
682 return "BoundSpillCopy";
683 default:
684 assert(false, "Must have valid spill type");
685 return "MachSpillCopy";
686 }
687 }
688
689 virtual const char *Name() const {
690 return spill_type(_spill_type);
691 }
692
693 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
694 #endif
695 };
696
697 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
698 // however it doesn't have a control input and is more like a MergeMem.
699 // It is inserted after the register allocation is done to ensure that nodes use single
700 // definition of a multidef lrg in a block.
701 class MachMergeNode : public MachIdealNode {
702 public:
703 MachMergeNode(Node *n1) {
704 init_class_id(Class_MachMerge);
705 add_req(nullptr);
706 add_req(n1);
707 }
708 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
709 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
710 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
711 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
712 virtual uint oper_input_base() const { return 1; }
713 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
714 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
715 #ifndef PRODUCT
716 virtual const char *Name() const { return "MachMerge"; }
717 #endif
718 };
719
720 //------------------------------MachBranchNode--------------------------------
721 // Abstract machine branch Node
722 class MachBranchNode : public MachIdealNode {
723 public:
724 MachBranchNode() : MachIdealNode() {
725 init_class_id(Class_MachBranch);
726 }
727 virtual void label_set(Label* label, uint block_num) = 0;
728 virtual void save_label(Label** label, uint* block_num) = 0;
729
730 // Support for short branches
731 virtual MachNode *short_branch_version() { return nullptr; }
732
733 virtual bool pinned() const { return true; };
734 };
735
736 //------------------------------MachNullChkNode--------------------------------
737 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
738 // also some kind of memory op. Turns the indicated MachNode into a
739 // conditional branch with good latency on the ptr-not-null path and awful
740 // latency on the pointer-is-null path.
741
742 class MachNullCheckNode : public MachBranchNode {
743 public:
744 const uint _vidx; // Index of memop being tested
745 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
746 init_class_id(Class_MachNullCheck);
747 add_req(ctrl);
748 add_req(memop);
749 }
750 virtual int Opcode() const;
751 virtual uint size_of() const { return sizeof(*this); }
752
753 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
754 virtual void label_set(Label* label, uint block_num);
755 virtual void save_label(Label** label, uint* block_num);
756 virtual void negate() { }
757 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
758 virtual uint ideal_reg() const { return NotAMachineReg; }
759 virtual const RegMask &in_RegMask(uint) const;
760 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
761 #ifndef PRODUCT
762 virtual const char *Name() const { return "NullCheck"; }
763 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
764 #endif
765 };
766
767 //------------------------------MachProjNode----------------------------------
768 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
769 // just MachNodes made by the Ideal world that replicate simple projections
770 // but with machine-dependent input & output register masks. Generally
771 // produced as part of calling conventions. Normally I make MachNodes as part
772 // of the Matcher process, but the Matcher is ill suited to issues involving
773 // frame handling, so frame handling is all done in the Ideal world with
774 // occasional callbacks to the machine model for important info.
775 class MachProjNode : public ProjNode {
776 public:
777 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
778 init_class_id(Class_MachProj);
779 }
780 RegMask _rout;
781 const uint _ideal_reg;
782 enum projType {
783 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
784 fat_proj = 999 // Projs killing many regs, defined by _rout
785 };
786 virtual int Opcode() const;
787 virtual const Type *bottom_type() const;
788 virtual const TypePtr *adr_type() const;
789 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
790 virtual const RegMask &out_RegMask() const { return _rout; }
791 virtual uint ideal_reg() const { return _ideal_reg; }
792 // Need size_of() for virtual ProjNode::clone()
793 virtual uint size_of() const { return sizeof(MachProjNode); }
794 #ifndef PRODUCT
795 virtual void dump_spec(outputStream *st) const;
796 #endif
797 };
798
799 //------------------------------MachIfNode-------------------------------------
800 // Machine-specific versions of IfNodes
801 class MachIfNode : public MachBranchNode {
802 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
803 public:
804 float _prob; // Probability branch goes either way
805 float _fcnt; // Frequency counter
806 MachIfNode() : MachBranchNode() {
807 init_class_id(Class_MachIf);
808 }
809 // Negate conditional branches.
810 virtual void negate() = 0;
811 #ifndef PRODUCT
812 virtual void dump_spec(outputStream *st) const;
813 #endif
814 };
815
816 //------------------------------MachJumpNode-----------------------------------
817 // Machine-specific versions of JumpNodes
818 class MachJumpNode : public MachConstantNode {
819 public:
820 float* _probs;
821 MachJumpNode() : MachConstantNode() {
822 init_class_id(Class_MachJump);
823 }
824 };
825
826 //------------------------------MachGotoNode-----------------------------------
827 // Machine-specific versions of GotoNodes
828 class MachGotoNode : public MachBranchNode {
829 public:
830 MachGotoNode() : MachBranchNode() {
831 init_class_id(Class_MachGoto);
832 }
833 };
834
835 //------------------------------MachFastLockNode-------------------------------------
836 // Machine-specific versions of FastLockNodes
837 class MachFastLockNode : public MachNode {
838 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
839 public:
840 MachFastLockNode() : MachNode() {}
841 };
842
843 //------------------------------MachReturnNode--------------------------------
844 // Machine-specific versions of subroutine returns
845 class MachReturnNode : public MachNode {
846 virtual uint size_of() const; // Size is bigger
847 public:
848 RegMask *_in_rms; // Input register masks, set during allocation
849 ReallocMark _nesting; // assertion check for reallocations
850 const TypePtr* _adr_type; // memory effects of call or return
851 MachReturnNode() : MachNode() {
852 init_class_id(Class_MachReturn);
853 _adr_type = TypePtr::BOTTOM; // the default: all of memory
854 }
855
856 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
857
858 virtual const RegMask &in_RegMask(uint) const;
859 virtual bool pinned() const { return true; };
860 virtual const TypePtr *adr_type() const;
861 };
862
863 //------------------------------MachSafePointNode-----------------------------
864 // Machine-specific versions of safepoints
865 class MachSafePointNode : public MachReturnNode {
866 public:
867 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
868 JVMState* _jvms; // Pointer to list of JVM State Objects
869 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
870 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
871 OopMap* oop_map() const { return _oop_map; }
872 void set_oop_map(OopMap* om) { _oop_map = om; }
873
874 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
875 init_class_id(Class_MachSafePoint);
876 }
877
878 virtual JVMState* jvms() const { return _jvms; }
879 void set_jvms(JVMState* s) {
880 _jvms = s;
881 }
882 virtual const Type *bottom_type() const;
883
884 virtual const RegMask &in_RegMask(uint) const;
885
886 // Functionality from old debug nodes
887 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
888 Node *frameptr () const { return in(TypeFunc::FramePtr); }
889
890 Node *local(const JVMState* jvms, uint idx) const {
891 assert(verify_jvms(jvms), "jvms must match");
892 return in(_jvmadj + jvms->locoff() + idx);
893 }
894 Node *stack(const JVMState* jvms, uint idx) const {
895 assert(verify_jvms(jvms), "jvms must match");
896 return in(_jvmadj + jvms->stkoff() + idx);
897 }
898 Node *monitor_obj(const JVMState* jvms, uint idx) const {
899 assert(verify_jvms(jvms), "jvms must match");
900 return in(_jvmadj + jvms->monitor_obj_offset(idx));
901 }
902 Node *monitor_box(const JVMState* jvms, uint idx) const {
903 assert(verify_jvms(jvms), "jvms must match");
904 return in(_jvmadj + jvms->monitor_box_offset(idx));
905 }
906 Node* scalarized_obj(const JVMState* jvms, uint idx) const {
907 assert(verify_jvms(jvms), "jvms must match");
908 return in(_jvmadj + jvms->scloff() + idx);
909 }
910 void set_local(const JVMState* jvms, uint idx, Node *c) {
911 assert(verify_jvms(jvms), "jvms must match");
912 set_req(_jvmadj + jvms->locoff() + idx, c);
913 }
914 void set_stack(const JVMState* jvms, uint idx, Node *c) {
915 assert(verify_jvms(jvms), "jvms must match");
916 set_req(_jvmadj + jvms->stkoff() + idx, c);
917 }
918 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
919 assert(verify_jvms(jvms), "jvms must match");
920 set_req(_jvmadj + jvms->monoff() + idx, c);
921 }
922 };
923
924 //------------------------------MachCallNode----------------------------------
925 // Machine-specific versions of subroutine calls
926 class MachCallNode : public MachSafePointNode {
927 protected:
928 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
929 virtual bool cmp( const Node &n ) const;
930 virtual uint size_of() const = 0; // Size is bigger
931 public:
932 const TypeFunc *_tf; // Function type
933 address _entry_point; // Address of the method being called
934 float _cnt; // Estimate of number of times called
935 bool _guaranteed_safepoint; // Do we need to observe safepoint?
936
937 const TypeFunc* tf() const { return _tf; }
938 address entry_point() const { return _entry_point; }
939 float cnt() const { return _cnt; }
940
941 void set_tf(const TypeFunc* tf) { _tf = tf; }
942 void set_entry_point(address p) { _entry_point = p; }
943 void set_cnt(float c) { _cnt = c; }
944 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
945
946 MachCallNode() : MachSafePointNode() {
947 init_class_id(Class_MachCall);
948 }
949
950 virtual const Type *bottom_type() const;
951 virtual bool pinned() const { return false; }
952 virtual const Type* Value(PhaseGVN* phase) const;
953 virtual const RegMask &in_RegMask(uint) const;
954 virtual int ret_addr_offset() { return 0; }
955
956 bool return_value_is_used() const;
957
958 // Similar to cousin class CallNode::returns_pointer
959 bool returns_pointer() const;
960 bool returns_scalarized() const;
961
962 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
963
964 #ifndef PRODUCT
965 virtual void dump_spec(outputStream *st) const;
966 #endif
967 };
968
969 //------------------------------MachCallJavaNode------------------------------
970 // "Base" class for machine-specific versions of subroutine calls
971 class MachCallJavaNode : public MachCallNode {
972 protected:
973 virtual bool cmp( const Node &n ) const;
974 virtual uint size_of() const; // Size is bigger
975 public:
976 ciMethod* _method; // Method being direct called
977 bool _override_symbolic_info; // Override symbolic call site info from bytecode
978 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
979 bool _method_handle_invoke; // Tells if the call has to preserve SP
980 bool _arg_escape; // ArgEscape in parameter list
981 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
982 init_class_id(Class_MachCallJava);
983 }
984
985 virtual const RegMask &in_RegMask(uint) const;
986
987 int resolved_method_index(C2_MacroAssembler *masm) const {
988 if (_override_symbolic_info) {
989 // Attach corresponding Method* to the call site, so VM can use it during resolution
990 // instead of querying symbolic info from bytecode.
991 assert(_method != nullptr, "method should be set");
992 assert(_method->constant_encoding()->is_method(), "should point to a Method");
993 return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
994 }
995 return 0; // Use symbolic info from bytecode (resolved_method is null).
996 }
997
998 #ifndef PRODUCT
999 virtual void dump_spec(outputStream *st) const;
1000 #endif
1001 };
1002
1003 //------------------------------MachCallStaticJavaNode------------------------
1004 // Machine-specific versions of monomorphic subroutine calls
1005 class MachCallStaticJavaNode : public MachCallJavaNode {
1006 virtual bool cmp( const Node &n ) const;
1007 virtual uint size_of() const; // Size is bigger
1008 public:
1009 const char *_name; // Runtime wrapper name
1010 MachCallStaticJavaNode() : MachCallJavaNode() {
1011 init_class_id(Class_MachCallStaticJava);
1012 }
1013
1014 // If this is an uncommon trap, return the request code, else zero.
1015 int uncommon_trap_request() const;
1016
1017 virtual int ret_addr_offset();
1018 #ifndef PRODUCT
1019 virtual void dump_spec(outputStream *st) const;
1020 void dump_trap_args(outputStream *st) const;
1021 #endif
1022 };
1023
1024 //------------------------------MachCallDynamicJavaNode------------------------
1025 // Machine-specific versions of possibly megamorphic subroutine calls
1026 class MachCallDynamicJavaNode : public MachCallJavaNode {
1027 public:
1028 int _vtable_index;
1029 MachCallDynamicJavaNode() : MachCallJavaNode() {
1030 init_class_id(Class_MachCallDynamicJava);
1031 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
1032 }
1033 virtual int ret_addr_offset();
1034 #ifndef PRODUCT
1035 virtual void dump_spec(outputStream *st) const;
1036 #endif
1037 };
1038
1039 //------------------------------MachCallRuntimeNode----------------------------
1040 // Machine-specific versions of subroutine calls
1041 class MachCallRuntimeNode : public MachCallNode {
1042 virtual bool cmp( const Node &n ) const;
1043 virtual uint size_of() const; // Size is bigger
1044 public:
1045 const char *_name; // Printable name, if _method is null
1046 bool _leaf_no_fp; // Is this CallLeafNoFP?
1047 MachCallRuntimeNode() : MachCallNode() {
1048 init_class_id(Class_MachCallRuntime);
1049 }
1050 virtual int ret_addr_offset();
1051 #ifndef PRODUCT
1052 virtual void dump_spec(outputStream *st) const;
1053 #endif
1054 };
1055
1056 class MachCallLeafNode: public MachCallRuntimeNode {
1057 public:
1058 MachCallLeafNode() : MachCallRuntimeNode() {
1059 init_class_id(Class_MachCallLeaf);
1060 }
1061 };
1062
1063 //------------------------------MachHaltNode-----------------------------------
1064 // Machine-specific versions of halt nodes
1065 class MachHaltNode : public MachReturnNode {
1066 public:
1067 bool _reachable;
1068 const char* _halt_reason;
1069 virtual JVMState* jvms() const;
1070 bool is_reachable() const {
1071 return _reachable;
1072 }
1073 };
1074
1075 class MachMemBarNode : public MachNode {
1076 virtual uint size_of() const; // Size is bigger
1077 public:
1078 const TypePtr* _adr_type; // memory effects
1079 MachMemBarNode() : MachNode() {
1080 init_class_id(Class_MachMemBar);
1081 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1082 }
1083
1084 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1085 virtual const TypePtr *adr_type() const;
1086 };
1087
1088
1089 //------------------------------MachTempNode-----------------------------------
1090 // Node used by the adlc to construct inputs to represent temporary registers
1091 class MachTempNode : public MachNode {
1092 private:
1093 MachOper *_opnd_array[1];
1094
1095 public:
1096 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1097 virtual uint rule() const { return 9999999; }
1098 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1099
1100 MachTempNode(MachOper* oper) {
1101 init_class_id(Class_MachTemp);
1102 _num_opnds = 1;
1103 _opnds = _opnd_array;
1104 add_req(nullptr);
1105 _opnds[0] = oper;
1106 }
1107 virtual uint size_of() const { return sizeof(MachTempNode); }
1108
1109 #ifndef PRODUCT
1110 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1111 virtual const char *Name() const { return "MachTemp";}
1112 #endif
1113 };
1114
1115
1116
1117 //------------------------------labelOper--------------------------------------
1118 // Machine-independent version of label operand
1119 class labelOper : public MachOper {
1120 private:
1121 virtual uint num_edges() const { return 0; }
1122 public:
1123 // Supported for fixed size branches
1124 Label* _label; // Label for branch(es)
1125
1126 uint _block_num;
1127
1128 labelOper() : _label(nullptr), _block_num(0) {}
1129
1130 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1131
1132 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1133
1134 virtual MachOper *clone() const;
1135
1136 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1137
1138 virtual uint opcode() const;
1139
1140 virtual uint hash() const;
1141 virtual bool cmp( const MachOper &oper ) const;
1142 #ifndef PRODUCT
1143 virtual const char *Name() const { return "Label";}
1144
1145 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1146 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1147 #endif
1148 };
1149
1150
1151 //------------------------------methodOper--------------------------------------
1152 // Machine-independent version of method operand
1153 class methodOper : public MachOper {
1154 private:
1155 virtual uint num_edges() const { return 0; }
1156 public:
1157 intptr_t _method; // Address of method
1158 methodOper() : _method(0) {}
1159 methodOper(intptr_t method) : _method(method) {}
1160
1161 virtual MachOper *clone() const;
1162
1163 virtual intptr_t method() const { return _method; }
1164
1165 virtual uint opcode() const;
1166
1167 virtual uint hash() const;
1168 virtual bool cmp( const MachOper &oper ) const;
1169 #ifndef PRODUCT
1170 virtual const char *Name() const { return "Method";}
1171
1172 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1173 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1174 #endif
1175 };
1176
1177 #endif // SHARE_OPTO_MACHNODE_HPP