1 /*
   2  * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_OPTO_MACHNODE_HPP
  26 #define SHARE_OPTO_MACHNODE_HPP
  27 
  28 #include "opto/c2_MacroAssembler.hpp"
  29 #include "opto/callnode.hpp"
  30 #include "opto/constantTable.hpp"
  31 #include "opto/matcher.hpp"
  32 #include "opto/multnode.hpp"
  33 #include "opto/node.hpp"
  34 #include "opto/regmask.hpp"
  35 #include "utilities/growableArray.hpp"
  36 
  37 class BufferBlob;
  38 class JVMState;
  39 class MachCallDynamicJavaNode;
  40 class MachCallJavaNode;
  41 class MachCallLeafNode;
  42 class MachCallNode;
  43 class MachCallRuntimeNode;
  44 class MachCallStaticJavaNode;
  45 class MachEpilogNode;
  46 class MachIfNode;
  47 class MachNullCheckNode;
  48 class MachOper;
  49 class MachProjNode;
  50 class MachPrologNode;
  51 class MachReturnNode;
  52 class MachSafePointNode;
  53 class MachSpillCopyNode;
  54 class MachVEPNode;
  55 class Matcher;
  56 class PhaseRegAlloc;
  57 class RegMask;
  58 class State;
  59 
  60 //---------------------------MachOper------------------------------------------
  61 class MachOper : public ResourceObj {
  62 public:
  63   // Allocate right next to the MachNodes in the same arena
  64   void *operator new(size_t x) throw() {
  65     Compile* C = Compile::current();
  66     return C->node_arena()->AmallocWords(x);
  67   }
  68 
  69   // Opcode
  70   virtual uint opcode() const = 0;
  71 
  72   // Number of input edges.
  73   // Generally at least 1
  74   virtual uint num_edges() const { return 1; }
  75   // Array of Register masks
  76   virtual const RegMask *in_RegMask(int index) const;
  77 
  78   // Methods to output the encoding of the operand
  79 
  80   // Negate conditional branches.  Error for non-branch Nodes
  81   virtual void negate();
  82 
  83   // Return the value requested
  84   // result register lookup, corresponding to int_format
  85   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  86   // input register lookup, corresponding to ext_format
  87   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  88 
  89   // helpers for MacroAssembler generation from ADLC
  90   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  91     return ::as_Register(reg(ra_, node));
  92   }
  93   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  94     return ::as_Register(reg(ra_, node, idx));
  95   }
  96   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  97     return ::as_FloatRegister(reg(ra_, node));
  98   }
  99   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 100     return ::as_FloatRegister(reg(ra_, node, idx));
 101   }
 102 
 103 #if defined(IA32) || defined(AMD64)
 104   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 105     return ::as_KRegister(reg(ra_, node));
 106   }
 107   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 108     return ::as_KRegister(reg(ra_, node, idx));
 109   }
 110   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 111     return ::as_XMMRegister(reg(ra_, node));
 112   }
 113   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 114     return ::as_XMMRegister(reg(ra_, node, idx));
 115   }
 116 #endif
 117   // CondRegister reg converter
 118 #if defined(PPC64)
 119   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
 120     return ::as_ConditionRegister(reg(ra_, node));
 121   }
 122   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 123     return ::as_ConditionRegister(reg(ra_, node, idx));
 124   }
 125   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
 126     return ::as_VectorRegister(reg(ra_, node));
 127   }
 128   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 129     return ::as_VectorRegister(reg(ra_, node, idx));
 130   }
 131   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
 132     return ::as_VectorSRegister(reg(ra_, node));
 133   }
 134   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 135     return ::as_VectorSRegister(reg(ra_, node, idx));
 136   }
 137 #endif
 138 #if defined(S390)
 139   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
 140     return ::as_VectorRegister(reg(ra_, node));
 141   }
 142   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 143     return ::as_VectorRegister(reg(ra_, node, idx));
 144  }
 145 #endif
 146 #if defined(AARCH64)
 147   PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
 148     return ::as_PRegister(reg(ra_, node));
 149   }
 150   PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
 151     return ::as_PRegister(reg(ra_, node, idx));
 152   }
 153 #endif
 154 
 155   virtual intptr_t  constant() const;
 156   virtual relocInfo::relocType constant_reloc() const;
 157   virtual jdouble constantD() const;
 158   virtual jfloat  constantF() const;
 159   virtual jlong   constantL() const;
 160   virtual jshort  constantH() const;
 161   virtual TypeOopPtr *oop() const;
 162   virtual int  ccode() const;
 163   // A zero, default, indicates this value is not needed.
 164   // May need to lookup the base register, as done in int_ and ext_format
 165   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 166   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 167   virtual int  scale() const;
 168   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 169   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 170   // Check for PC-Relative displacement
 171   virtual relocInfo::relocType disp_reloc() const;
 172   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 173   virtual int  base_position()  const;  // base edge position, or -1
 174   virtual int  index_position() const;  // index edge position, or -1
 175 
 176   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 177   // Only returns non-null value for x86_32.ad's indOffset32X
 178   virtual const TypePtr *disp_as_type() const { return nullptr; }
 179 
 180   // Return the label
 181   virtual Label *label() const;
 182 
 183   // Return the method's address
 184   virtual intptr_t  method() const;
 185 
 186   // Hash and compare over operands are currently identical
 187   virtual uint  hash() const;
 188   virtual bool  cmp( const MachOper &oper ) const;
 189 
 190   // Virtual clone, since I do not know how big the MachOper is.
 191   virtual MachOper *clone() const = 0;
 192 
 193   // Return ideal Type from simple operands.  Fail for complex operands.
 194   virtual const Type *type() const;
 195 
 196   // Set an integer offset if we have one, or error otherwise
 197   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 198 
 199 #ifndef PRODUCT
 200   // Return name of operand
 201   virtual const char    *Name() const { return "???";}
 202 
 203   // Methods to output the text version of the operand
 204   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 205   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 206 
 207   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 208 
 209   // Check whether o is a valid oper.
 210   static bool notAnOper(const MachOper *o) {
 211     if (o == nullptr)                   return true;
 212     if (((intptr_t)o & 1) != 0)      return true;
 213     if (*(address*)o == badAddress)  return true;  // kill by Node::destruct
 214     return false;
 215   }
 216 #endif // !PRODUCT
 217 };
 218 
 219 //------------------------------MachNode---------------------------------------
 220 // Base type for all machine specific nodes.  All node classes generated by the
 221 // ADLC inherit from this class.
 222 class MachNode : public Node {
 223 public:
 224   MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
 225     init_class_id(Class_Mach);
 226   }
 227   // Required boilerplate
 228   virtual uint size_of() const { return sizeof(MachNode); }
 229   virtual int  Opcode() const;          // Always equal to MachNode
 230   virtual uint rule() const = 0;        // Machine-specific opcode
 231   // Number of inputs which come before the first operand.
 232   // Generally at least 1, to skip the Control input
 233   virtual uint oper_input_base() const { return 1; }
 234   // Position of constant base node in node's inputs. -1 if
 235   // no constant base node input.
 236   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 237 
 238   uint8_t barrier_data() const { return _barrier; }
 239   void set_barrier_data(uint8_t data) { _barrier = data; }
 240 
 241   // Copy index, inputs, and operands to a new version of the instruction.
 242   // Called from cisc_version() and short_branch_version().
 243   void fill_new_machnode(MachNode *n) const;
 244 
 245   // Return an equivalent instruction using memory for cisc_operand position
 246   virtual MachNode *cisc_version(int offset);
 247   // Modify this instruction's register mask to use stack version for cisc_operand
 248   virtual void use_cisc_RegMask();
 249 
 250   // Support for short branches
 251   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 252 
 253   // Avoid back to back some instructions on some CPUs.
 254   enum AvoidBackToBackFlag { AVOID_NONE = 0,
 255                              AVOID_BEFORE = Flag_avoid_back_to_back_before,
 256                              AVOID_AFTER = Flag_avoid_back_to_back_after,
 257                              AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
 258 
 259   bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
 260     return (flags() & flag_value) == flag_value;
 261   }
 262 
 263   // instruction implemented with a call
 264   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 265 
 266   // First index in _in[] corresponding to operand, or -1 if there is none
 267   int  operand_index(uint operand) const;
 268   int  operand_index(const MachOper *oper) const;
 269   int  operand_index(Node* m) const;
 270 
 271   // Register class input is expected in
 272   virtual const RegMask &in_RegMask(uint) const;
 273 
 274   // cisc-spillable instructions redefine for use by in_RegMask
 275   virtual const RegMask *cisc_RegMask() const { return nullptr; }
 276 
 277   // If this instruction is a 2-address instruction, then return the
 278   // index of the input which must match the output.  Not necessary
 279   // for instructions which bind the input and output register to the
 280   // same singleton register (e.g., Intel IDIV which binds AX to be
 281   // both an input and an output).  It is necessary when the input and
 282   // output have choices - but they must use the same choice.
 283   virtual uint two_adr( ) const { return 0; }
 284 
 285   // The GC might require some barrier metadata for machine code emission.
 286   uint8_t _barrier;
 287 
 288   // Array of complex operand pointers.  Each corresponds to zero or
 289   // more leafs.  Must be set by MachNode constructor to point to an
 290   // internal array of MachOpers.  The MachOper array is sized by
 291   // specific MachNodes described in the ADL.
 292   uint16_t _num_opnds;
 293   MachOper **_opnds;
 294   uint16_t num_opnds() const { return _num_opnds; }
 295 
 296   // Emit bytes using C2_MacroAssembler
 297   virtual void  emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 298   // Expand node after register allocation.
 299   // Node is replaced by several nodes in the postalloc expand phase.
 300   // Corresponding methods are generated for nodes if they specify
 301   // postalloc_expand. See block.cpp for more documentation.
 302   virtual bool requires_postalloc_expand() const { return false; }
 303   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 304   // Size of instruction in bytes
 305   virtual uint  size(PhaseRegAlloc *ra_) const;
 306   // Helper function that computes size by emitting code
 307   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 308 
 309   // Return the alignment required (in units of relocInfo::addr_unit())
 310   // for this instruction (must be a power of 2)
 311   int           pd_alignment_required() const;
 312   virtual int   alignment_required() const { return pd_alignment_required(); }
 313 
 314   // Return the padding (in bytes) to be emitted before this
 315   // instruction to properly align it.
 316   virtual int   compute_padding(int current_offset) const;
 317 
 318   // Return number of relocatable values contained in this instruction
 319   virtual int   reloc() const { return 0; }
 320 
 321   // Return number of words used for double constants in this instruction
 322   virtual int   ins_num_consts() const { return 0; }
 323 
 324   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 325   virtual uint  hash() const;
 326   virtual bool  cmp( const Node &n ) const;
 327 
 328   // Expand method for MachNode, replaces nodes representing pseudo
 329   // instructions with a set of nodes which represent real machine
 330   // instructions and compute the same value.
 331   virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
 332 
 333   // Bottom_type call; value comes from operand0
 334   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 335   virtual uint ideal_reg() const {
 336     const Type *t = _opnds[0]->type();
 337     if (t == TypeInt::CC) {
 338       return Op_RegFlags;
 339     } else {
 340       return t->ideal_reg();
 341     }
 342   }
 343 
 344   // If this is a memory op, return the base pointer and fixed offset.
 345   // If there are no such, return null.  If there are multiple addresses
 346   // or the address is indeterminate (rare cases) then return (Node*)-1,
 347   // which serves as node bottom.
 348   // If the offset is not statically determined, set it to Type::OffsetBot.
 349   // This method is free to ignore stack slots if that helps.
 350   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 351   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 352   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 353 
 354   // Helper for get_base_and_disp: find the base and index input nodes.
 355   // Returns the MachOper as determined by memory_operand(), for use, if
 356   // needed by the caller. If (MachOper *)-1 is returned, base and index
 357   // are set to NodeSentinel. If null is returned, base and
 358   // index are set to null.
 359   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 360 
 361   // Helper for memory_inputs:  Which operand carries the necessary info?
 362   // By default, returns null, which means there is no such operand.
 363   // If it returns (MachOper*)-1, this means there are multiple memories.
 364   virtual const MachOper* memory_operand() const { return nullptr; }
 365 
 366   // Call "get_base_and_disp" to decide which category of memory is used here.
 367   virtual const class TypePtr *adr_type() const;
 368 
 369   // Apply peephole rule(s) to this instruction
 370   virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
 371 
 372   // Top-level ideal Opcode matched
 373   virtual int ideal_Opcode()     const { return Op_Node; }
 374 
 375   // Adds the label for the case
 376   virtual void add_case_label( int switch_val, Label* blockLabel);
 377 
 378   // Set the absolute address for methods
 379   virtual void method_set( intptr_t addr );
 380 
 381   // Should we clone rather than spill this instruction?
 382   bool rematerialize() const;
 383 
 384   // Get the pipeline info
 385   static const Pipeline *pipeline_class();
 386   virtual const Pipeline *pipeline() const;
 387 
 388   // Returns true if this node is a check that can be implemented with a trap.
 389   virtual bool is_TrapBasedCheckNode() const { return false; }
 390   void set_removed() { add_flag(Flag_is_removed_by_peephole); }
 391   bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
 392 
 393 #ifndef PRODUCT
 394   virtual const char *Name() const = 0; // Machine-specific name
 395   virtual void dump_spec(outputStream *st) const; // Print per-node info
 396   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 397 #endif
 398 };
 399 
 400 //------------------------------MachIdealNode----------------------------
 401 // Machine specific versions of nodes that must be defined by user.
 402 // These are not converted by matcher from ideal nodes to machine nodes
 403 // but are inserted into the code by the compiler.
 404 class MachIdealNode : public MachNode {
 405 public:
 406   MachIdealNode( ) {}
 407 
 408   // Define the following defaults for non-matched machine nodes
 409   virtual uint oper_input_base() const { return 0; }
 410   virtual uint rule()            const { return 9999999; }
 411   virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
 412 };
 413 
 414 //------------------------------MachTypeNode----------------------------
 415 // Machine Nodes that need to retain a known Type.
 416 class MachTypeNode : public MachNode {
 417   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 418 public:
 419   MachTypeNode( ) {}
 420   const Type *_bottom_type;
 421 
 422   virtual const class Type *bottom_type() const { return _bottom_type; }
 423 #ifndef PRODUCT
 424   virtual void dump_spec(outputStream *st) const;
 425 #endif
 426 };
 427 
 428 //------------------------------MachBreakpointNode----------------------------
 429 // Machine breakpoint or interrupt Node
 430 class MachBreakpointNode : public MachIdealNode {
 431 public:
 432   MachBreakpointNode( ) {}
 433   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 434   virtual uint size(PhaseRegAlloc *ra_) const;
 435 
 436 #ifndef PRODUCT
 437   virtual const char *Name() const { return "Breakpoint"; }
 438   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 439 #endif
 440 };
 441 
 442 //------------------------------MachConstantBaseNode--------------------------
 443 // Machine node that represents the base address of the constant table.
 444 class MachConstantBaseNode : public MachIdealNode {
 445 public:
 446   static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
 447 
 448 public:
 449   MachConstantBaseNode() : MachIdealNode() {
 450     init_class_id(Class_MachConstantBase);
 451   }
 452   virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
 453   virtual uint ideal_reg() const { return Op_RegP; }
 454   virtual uint oper_input_base() const { return 1; }
 455 
 456   virtual bool requires_postalloc_expand() const;
 457   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 458 
 459   virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
 460   virtual uint size(PhaseRegAlloc* ra_) const;
 461 
 462   static const RegMask& static_out_RegMask() { return _out_RegMask; }
 463   virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
 464 
 465 #ifndef PRODUCT
 466   virtual const char* Name() const { return "MachConstantBaseNode"; }
 467   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 468 #endif
 469 };
 470 
 471 //------------------------------MachConstantNode-------------------------------
 472 // Machine node that holds a constant which is stored in the constant table.
 473 class MachConstantNode : public MachTypeNode {
 474 protected:
 475   ConstantTable::Constant _constant;  // This node's constant.
 476 
 477 public:
 478   MachConstantNode() : MachTypeNode() {
 479     init_class_id(Class_MachConstant);
 480   }
 481 
 482   virtual void eval_constant(Compile* C) {
 483 #ifdef ASSERT
 484     tty->print("missing MachConstantNode eval_constant function: ");
 485     dump();
 486 #endif
 487     ShouldNotCallThis();
 488   }
 489 
 490   virtual const RegMask &in_RegMask(uint idx) const {
 491     if (idx == mach_constant_base_node_input())
 492       return MachConstantBaseNode::static_out_RegMask();
 493     return MachNode::in_RegMask(idx);
 494   }
 495 
 496   // Input edge of MachConstantBaseNode.
 497   virtual uint mach_constant_base_node_input() const { return req() - 1; }
 498 
 499   int  constant_offset();
 500   int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
 501   // Unchecked version to avoid assertions in debug output.
 502   int  constant_offset_unchecked() const;
 503 };
 504 
 505 //------------------------------MachVEPNode-----------------------------------
 506 // Machine Inline Type Entry Point Node
 507 class MachVEPNode : public MachIdealNode {
 508 public:
 509   Label* _verified_entry;
 510 
 511   MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
 512     _verified_entry(verified_entry),
 513     _verified(verified),
 514     _receiver_only(receiver_only) {
 515     init_class_id(Class_MachVEP);
 516   }
 517   virtual bool cmp(const Node &n) const {
 518     return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
 519            (_verified == ((MachVEPNode&)n)._verified) &&
 520            (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
 521            MachIdealNode::cmp(n);
 522   }
 523   virtual uint size_of() const { return sizeof(*this); }
 524   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const;
 525 
 526 #ifndef PRODUCT
 527   virtual const char* Name() const { return "InlineType Entry-Point"; }
 528   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 529 #endif
 530 private:
 531   bool   _verified;
 532   bool   _receiver_only;
 533 };
 534 
 535 //------------------------------MachUEPNode-----------------------------------
 536 // Machine Unvalidated Entry Point Node
 537 class MachUEPNode : public MachIdealNode {
 538 public:
 539   MachUEPNode( ) {}
 540   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 541 
 542 #ifndef PRODUCT
 543   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 544   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 545 #endif
 546 };
 547 
 548 //------------------------------MachPrologNode--------------------------------
 549 // Machine function Prolog Node
 550 class MachPrologNode : public MachIdealNode {
 551 public:
 552   Label* _verified_entry;
 553 
 554   MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
 555     init_class_id(Class_MachProlog);
 556   }
 557   virtual bool cmp(const Node &n) const {
 558     return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
 559   }
 560   virtual uint size_of() const { return sizeof(*this); }
 561   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 562   virtual int reloc() const;
 563 
 564 #ifndef PRODUCT
 565   virtual const char *Name() const { return "Prolog"; }
 566   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 567 #endif
 568 };
 569 
 570 //------------------------------MachEpilogNode--------------------------------
 571 // Machine function Epilog Node
 572 class MachEpilogNode : public MachIdealNode {
 573 public:
 574   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 575   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 576   virtual int reloc() const;
 577   virtual const Pipeline *pipeline() const;
 578 
 579 private:
 580   bool _do_polling;
 581 
 582 public:
 583   bool do_polling() const { return _do_polling; }
 584 
 585 #ifndef PRODUCT
 586   virtual const char *Name() const { return "Epilog"; }
 587   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 588 #endif
 589 };
 590 
 591 //------------------------------MachNopNode-----------------------------------
 592 // Machine function Nop Node
 593 class MachNopNode : public MachIdealNode {
 594 private:
 595   int _count;
 596 public:
 597   MachNopNode( ) : _count(1) {}
 598   MachNopNode( int count ) : _count(count) {}
 599   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 600   virtual uint size(PhaseRegAlloc *ra_) const;
 601 
 602   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 603 
 604   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 605   virtual const Pipeline *pipeline() const;
 606 #ifndef PRODUCT
 607   virtual const char *Name() const { return "Nop"; }
 608   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 609   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 610 #endif
 611 };
 612 
 613 //------------------------------MachSpillCopyNode------------------------------
 614 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 615 // location (stack or register).
 616 class MachSpillCopyNode : public MachIdealNode {
 617 public:
 618   enum SpillType {
 619     TwoAddress,                        // Inserted when coalescing of a two-address-instruction node and its input fails
 620     PhiInput,                          // Inserted when coalescing of a phi node and its input fails
 621     DebugUse,                          // Inserted as debug info spills to safepoints in non-frequent blocks
 622     LoopPhiInput,                      // Pre-split compares of loop-phis
 623     Definition,                        // An lrg marked as spilled will be spilled to memory right after its definition,
 624                                        // if in high pressure region or the lrg is bound
 625     RegToReg,                          // A register to register move
 626     RegToMem,                          // A register to memory move
 627     MemToReg,                          // A memory to register move
 628     PhiLocationDifferToInputLocation,  // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
 629                                        // the phi and its input resides at different locations (i.e. reg or mem)
 630     BasePointerToMem,                  // Spill base pointer to memory at safepoint
 631     InputToRematerialization,          // When rematerializing a node we stretch the inputs live ranges, and they might be
 632                                        // stretched beyond a new definition point, therefore we split out new copies instead
 633     CallUse,                           // Spill use at a call
 634     Bound                              // An lrg marked as spill that is bound and needs to be spilled at a use
 635   };
 636 private:
 637   const RegMask *_in;           // RegMask for input
 638   const RegMask *_out;          // RegMask for output
 639   const Type *_type;
 640   const SpillType _spill_type;
 641 public:
 642   MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
 643     MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
 644     init_class_id(Class_MachSpillCopy);
 645     init_flags(Flag_is_Copy);
 646     add_req(nullptr);
 647     add_req(n);
 648   }
 649   virtual uint size_of() const { return sizeof(*this); }
 650   void set_out_RegMask(const RegMask &out) { _out = &out; }
 651   void set_in_RegMask(const RegMask &in) { _in = &in; }
 652   virtual const RegMask &out_RegMask() const { return *_out; }
 653   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 654   virtual const class Type *bottom_type() const { return _type; }
 655   virtual uint ideal_reg() const { return _type->ideal_reg(); }
 656   virtual uint oper_input_base() const { return 1; }
 657   uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 658 
 659   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 660   virtual uint size(PhaseRegAlloc *ra_) const;
 661 
 662 
 663 #ifndef PRODUCT
 664   static const char *spill_type(SpillType st) {
 665     switch (st) {
 666       case TwoAddress:
 667         return "TwoAddressSpillCopy";
 668       case PhiInput:
 669         return "PhiInputSpillCopy";
 670       case DebugUse:
 671         return "DebugUseSpillCopy";
 672       case LoopPhiInput:
 673         return "LoopPhiInputSpillCopy";
 674       case Definition:
 675         return "DefinitionSpillCopy";
 676       case RegToReg:
 677         return "RegToRegSpillCopy";
 678       case RegToMem:
 679         return "RegToMemSpillCopy";
 680       case MemToReg:
 681         return "MemToRegSpillCopy";
 682       case PhiLocationDifferToInputLocation:
 683         return "PhiLocationDifferToInputLocationSpillCopy";
 684       case BasePointerToMem:
 685         return "BasePointerToMemSpillCopy";
 686       case InputToRematerialization:
 687         return "InputToRematerializationSpillCopy";
 688       case CallUse:
 689         return "CallUseSpillCopy";
 690       case Bound:
 691         return "BoundSpillCopy";
 692       default:
 693         assert(false, "Must have valid spill type");
 694         return "MachSpillCopy";
 695     }
 696   }
 697 
 698   virtual const char *Name() const {
 699     return spill_type(_spill_type);
 700   }
 701 
 702   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 703 #endif
 704 };
 705 
 706 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
 707 // however it doesn't have a control input and is more like a MergeMem.
 708 // It is inserted after the register allocation is done to ensure that nodes use single
 709 // definition of a multidef lrg in a block.
 710 class MachMergeNode : public MachIdealNode {
 711 public:
 712   MachMergeNode(Node *n1) {
 713     init_class_id(Class_MachMerge);
 714     add_req(nullptr);
 715     add_req(n1);
 716   }
 717   virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
 718   virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
 719   virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
 720   virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
 721   virtual uint oper_input_base() const { return 1; }
 722   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
 723   virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
 724 #ifndef PRODUCT
 725   virtual const char *Name() const { return "MachMerge"; }
 726 #endif
 727 };
 728 
 729 //------------------------------MachBranchNode--------------------------------
 730 // Abstract machine branch Node
 731 class MachBranchNode : public MachIdealNode {
 732 public:
 733   MachBranchNode() : MachIdealNode() {
 734     init_class_id(Class_MachBranch);
 735   }
 736   virtual void label_set(Label* label, uint block_num) = 0;
 737   virtual void save_label(Label** label, uint* block_num) = 0;
 738 
 739   // Support for short branches
 740   virtual MachNode *short_branch_version() { return nullptr; }
 741 
 742   virtual bool pinned() const { return true; };
 743 };
 744 
 745 //------------------------------MachNullChkNode--------------------------------
 746 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 747 // also some kind of memory op.  Turns the indicated MachNode into a
 748 // conditional branch with good latency on the ptr-not-null path and awful
 749 // latency on the pointer-is-null path.
 750 
 751 class MachNullCheckNode : public MachBranchNode {
 752 public:
 753   const uint _vidx;             // Index of memop being tested
 754   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
 755     init_class_id(Class_MachNullCheck);
 756     add_req(ctrl);
 757     add_req(memop);
 758   }
 759   virtual int Opcode() const;
 760   virtual uint size_of() const { return sizeof(*this); }
 761 
 762   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
 763   virtual void label_set(Label* label, uint block_num);
 764   virtual void save_label(Label** label, uint* block_num);
 765   virtual void negate() { }
 766   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 767   virtual uint ideal_reg() const { return NotAMachineReg; }
 768   virtual const RegMask &in_RegMask(uint) const;
 769   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 770 #ifndef PRODUCT
 771   virtual const char *Name() const { return "NullCheck"; }
 772   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 773 #endif
 774 };
 775 
 776 //------------------------------MachProjNode----------------------------------
 777 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 778 // just MachNodes made by the Ideal world that replicate simple projections
 779 // but with machine-dependent input & output register masks.  Generally
 780 // produced as part of calling conventions.  Normally I make MachNodes as part
 781 // of the Matcher process, but the Matcher is ill suited to issues involving
 782 // frame handling, so frame handling is all done in the Ideal world with
 783 // occasional callbacks to the machine model for important info.
 784 class MachProjNode : public ProjNode {
 785 public:
 786   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
 787     init_class_id(Class_MachProj);
 788   }
 789   RegMask _rout;
 790   const uint  _ideal_reg;
 791   enum projType {
 792     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 793     fat_proj       = 999        // Projs killing many regs, defined by _rout
 794   };
 795   virtual int   Opcode() const;
 796   virtual const Type *bottom_type() const;
 797   virtual const TypePtr *adr_type() const;
 798   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 799   virtual const RegMask &out_RegMask() const { return _rout; }
 800   virtual uint  ideal_reg() const { return _ideal_reg; }
 801   // Need size_of() for virtual ProjNode::clone()
 802   virtual uint  size_of() const { return sizeof(MachProjNode); }
 803 #ifndef PRODUCT
 804   virtual void dump_spec(outputStream *st) const;
 805 #endif
 806 };
 807 
 808 //------------------------------MachIfNode-------------------------------------
 809 // Machine-specific versions of IfNodes
 810 class MachIfNode : public MachBranchNode {
 811   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 812 public:
 813   float _prob;                  // Probability branch goes either way
 814   float _fcnt;                  // Frequency counter
 815   MachIfNode() : MachBranchNode() {
 816     init_class_id(Class_MachIf);
 817   }
 818   // Negate conditional branches.
 819   virtual void negate() = 0;
 820 #ifndef PRODUCT
 821   virtual void dump_spec(outputStream *st) const;
 822 #endif
 823 };
 824 
 825 //------------------------------MachJumpNode-----------------------------------
 826 // Machine-specific versions of JumpNodes
 827 class MachJumpNode : public MachConstantNode {
 828 public:
 829   float* _probs;
 830   MachJumpNode() : MachConstantNode() {
 831     init_class_id(Class_MachJump);
 832   }
 833 };
 834 
 835 //------------------------------MachGotoNode-----------------------------------
 836 // Machine-specific versions of GotoNodes
 837 class MachGotoNode : public MachBranchNode {
 838 public:
 839   MachGotoNode() : MachBranchNode() {
 840     init_class_id(Class_MachGoto);
 841   }
 842 };
 843 
 844 //------------------------------MachFastLockNode-------------------------------------
 845 // Machine-specific versions of FastLockNodes
 846 class MachFastLockNode : public MachNode {
 847   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 848 public:
 849   MachFastLockNode() : MachNode() {}
 850 };
 851 
 852 //------------------------------MachReturnNode--------------------------------
 853 // Machine-specific versions of subroutine returns
 854 class MachReturnNode : public MachNode {
 855   virtual uint size_of() const; // Size is bigger
 856 public:
 857   RegMask *_in_rms;             // Input register masks, set during allocation
 858   ReallocMark _nesting;         // assertion check for reallocations
 859   const TypePtr* _adr_type;     // memory effects of call or return
 860   MachReturnNode() : MachNode() {
 861     init_class_id(Class_MachReturn);
 862     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 863   }
 864 
 865   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 866 
 867   virtual const RegMask &in_RegMask(uint) const;
 868   virtual bool pinned() const { return true; };
 869   virtual const TypePtr *adr_type() const;
 870 };
 871 
 872 //------------------------------MachSafePointNode-----------------------------
 873 // Machine-specific versions of safepoints
 874 class MachSafePointNode : public MachReturnNode {
 875 public:
 876   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 877   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 878   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 879   bool            _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
 880   OopMap*         oop_map() const { return _oop_map; }
 881   void            set_oop_map(OopMap* om) { _oop_map = om; }
 882 
 883   MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
 884     init_class_id(Class_MachSafePoint);
 885   }
 886 
 887   virtual JVMState* jvms() const { return _jvms; }
 888   void set_jvms(JVMState* s) {
 889     _jvms = s;
 890   }
 891   virtual const Type    *bottom_type() const;
 892 
 893   virtual const RegMask &in_RegMask(uint) const;
 894 
 895   // Functionality from old debug nodes
 896   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 897   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 898 
 899   Node *local(const JVMState* jvms, uint idx) const {
 900     assert(verify_jvms(jvms), "jvms must match");
 901     return in(_jvmadj + jvms->locoff() + idx);
 902   }
 903   Node *stack(const JVMState* jvms, uint idx) const {
 904     assert(verify_jvms(jvms), "jvms must match");
 905     return in(_jvmadj + jvms->stkoff() + idx);
 906  }
 907   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 908     assert(verify_jvms(jvms), "jvms must match");
 909     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 910   }
 911   Node *monitor_box(const JVMState* jvms, uint idx) const {
 912     assert(verify_jvms(jvms), "jvms must match");
 913     return in(_jvmadj + jvms->monitor_box_offset(idx));
 914   }
 915   Node* scalarized_obj(const JVMState* jvms, uint idx) const {
 916     assert(verify_jvms(jvms), "jvms must match");
 917     return in(_jvmadj + jvms->scloff() + idx);
 918   }
 919   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 920     assert(verify_jvms(jvms), "jvms must match");
 921     set_req(_jvmadj + jvms->locoff() + idx, c);
 922   }
 923   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 924     assert(verify_jvms(jvms), "jvms must match");
 925     set_req(_jvmadj + jvms->stkoff() + idx, c);
 926   }
 927   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 928     assert(verify_jvms(jvms), "jvms must match");
 929     set_req(_jvmadj + jvms->monoff() + idx, c);
 930   }
 931 };
 932 
 933 //------------------------------MachCallNode----------------------------------
 934 // Machine-specific versions of subroutine calls
 935 class MachCallNode : public MachSafePointNode {
 936 protected:
 937   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 938   virtual bool cmp( const Node &n ) const;
 939   virtual uint size_of() const = 0; // Size is bigger
 940 public:
 941   const TypeFunc *_tf;        // Function type
 942   address      _entry_point;  // Address of the method being called
 943   float        _cnt;          // Estimate of number of times called
 944   bool         _guaranteed_safepoint; // Do we need to observe safepoint?
 945 
 946   const TypeFunc* tf()  const { return _tf; }
 947   address entry_point() const { return _entry_point; }
 948   float   cnt()         const { return _cnt; }
 949 
 950   void set_tf(const TypeFunc* tf)       { _tf = tf; }
 951   void set_entry_point(address p)       { _entry_point = p; }
 952   void set_cnt(float c)                 { _cnt = c; }
 953   void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
 954 
 955   MachCallNode() : MachSafePointNode() {
 956     init_class_id(Class_MachCall);
 957   }
 958 
 959   virtual const Type *bottom_type() const;
 960   virtual bool  pinned() const { return false; }
 961   virtual const Type* Value(PhaseGVN* phase) const;
 962   virtual const RegMask &in_RegMask(uint) const;
 963   virtual int ret_addr_offset() { return 0; }
 964 
 965   bool return_value_is_used() const;
 966 
 967   // Similar to cousin class CallNode::returns_pointer
 968   bool returns_pointer() const;
 969   bool returns_scalarized() const;
 970 
 971   bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
 972 
 973 #ifndef PRODUCT
 974   virtual void dump_spec(outputStream *st) const;
 975 #endif
 976 };
 977 
 978 //------------------------------MachCallJavaNode------------------------------
 979 // "Base" class for machine-specific versions of subroutine calls
 980 class MachCallJavaNode : public MachCallNode {
 981 protected:
 982   virtual bool cmp( const Node &n ) const;
 983   virtual uint size_of() const; // Size is bigger
 984 public:
 985   ciMethod* _method;                 // Method being direct called
 986   bool      _override_symbolic_info; // Override symbolic call site info from bytecode
 987   bool      _optimized_virtual;      // Tells if node is a static call or an optimized virtual
 988   bool      _method_handle_invoke;   // Tells if the call has to preserve SP
 989   bool      _arg_escape;             // ArgEscape in parameter list
 990   MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
 991     init_class_id(Class_MachCallJava);
 992   }
 993 
 994   virtual const RegMask &in_RegMask(uint) const;
 995 
 996   int resolved_method_index(C2_MacroAssembler *masm) const {
 997     if (_override_symbolic_info) {
 998       // Attach corresponding Method* to the call site, so VM can use it during resolution
 999       // instead of querying symbolic info from bytecode.
1000       assert(_method != nullptr, "method should be set");
1001       assert(_method->constant_encoding()->is_method(), "should point to a Method");
1002       return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
1003     }
1004     return 0; // Use symbolic info from bytecode (resolved_method is null).
1005   }
1006 
1007 #ifndef PRODUCT
1008   virtual void dump_spec(outputStream *st) const;
1009 #endif
1010 };
1011 
1012 //------------------------------MachCallStaticJavaNode------------------------
1013 // Machine-specific versions of monomorphic subroutine calls
1014 class MachCallStaticJavaNode : public MachCallJavaNode {
1015   virtual bool cmp( const Node &n ) const;
1016   virtual uint size_of() const; // Size is bigger
1017 public:
1018   const char *_name;            // Runtime wrapper name
1019   MachCallStaticJavaNode() : MachCallJavaNode() {
1020     init_class_id(Class_MachCallStaticJava);
1021   }
1022 
1023   // If this is an uncommon trap, return the request code, else zero.
1024   int uncommon_trap_request() const;
1025 
1026   virtual int ret_addr_offset();
1027 #ifndef PRODUCT
1028   virtual void dump_spec(outputStream *st) const;
1029   void dump_trap_args(outputStream *st) const;
1030 #endif
1031 };
1032 
1033 //------------------------------MachCallDynamicJavaNode------------------------
1034 // Machine-specific versions of possibly megamorphic subroutine calls
1035 class MachCallDynamicJavaNode : public MachCallJavaNode {
1036 public:
1037   int _vtable_index;
1038   MachCallDynamicJavaNode() : MachCallJavaNode() {
1039     init_class_id(Class_MachCallDynamicJava);
1040     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
1041   }
1042   virtual int ret_addr_offset();
1043 #ifndef PRODUCT
1044   virtual void dump_spec(outputStream *st) const;
1045 #endif
1046 };
1047 
1048 //------------------------------MachCallRuntimeNode----------------------------
1049 // Machine-specific versions of subroutine calls
1050 class MachCallRuntimeNode : public MachCallNode {
1051   virtual bool cmp( const Node &n ) const;
1052   virtual uint size_of() const; // Size is bigger
1053 public:
1054   const char *_name;            // Printable name, if _method is null
1055   bool _leaf_no_fp;             // Is this CallLeafNoFP?
1056   MachCallRuntimeNode() : MachCallNode() {
1057     init_class_id(Class_MachCallRuntime);
1058   }
1059   virtual int ret_addr_offset();
1060 #ifndef PRODUCT
1061   virtual void dump_spec(outputStream *st) const;
1062 #endif
1063 };
1064 
1065 class MachCallLeafNode: public MachCallRuntimeNode {
1066 public:
1067   MachCallLeafNode() : MachCallRuntimeNode() {
1068     init_class_id(Class_MachCallLeaf);
1069   }
1070 };
1071 
1072 //------------------------------MachHaltNode-----------------------------------
1073 // Machine-specific versions of halt nodes
1074 class MachHaltNode : public MachReturnNode {
1075 public:
1076   bool _reachable;
1077   const char* _halt_reason;
1078   virtual JVMState* jvms() const;
1079   bool is_reachable() const {
1080     return _reachable;
1081   }
1082 };
1083 
1084 class MachMemBarNode : public MachNode {
1085   virtual uint size_of() const; // Size is bigger
1086 public:
1087   const TypePtr* _adr_type;     // memory effects
1088   MachMemBarNode() : MachNode() {
1089     init_class_id(Class_MachMemBar);
1090     _adr_type = TypePtr::BOTTOM; // the default: all of memory
1091   }
1092 
1093   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1094   virtual const TypePtr *adr_type() const;
1095 };
1096 
1097 
1098 //------------------------------MachTempNode-----------------------------------
1099 // Node used by the adlc to construct inputs to represent temporary registers
1100 class MachTempNode : public MachNode {
1101 private:
1102   MachOper *_opnd_array[1];
1103 
1104 public:
1105   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1106   virtual uint rule() const { return 9999999; }
1107   virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1108 
1109   MachTempNode(MachOper* oper) {
1110     init_class_id(Class_MachTemp);
1111     _num_opnds = 1;
1112     _opnds = _opnd_array;
1113     add_req(nullptr);
1114     _opnds[0] = oper;
1115   }
1116   virtual uint size_of() const { return sizeof(MachTempNode); }
1117 
1118 #ifndef PRODUCT
1119   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1120   virtual const char *Name() const { return "MachTemp";}
1121 #endif
1122 };
1123 
1124 
1125 
1126 //------------------------------labelOper--------------------------------------
1127 // Machine-independent version of label operand
1128 class labelOper : public MachOper {
1129 private:
1130   virtual uint           num_edges() const { return 0; }
1131 public:
1132   // Supported for fixed size branches
1133   Label* _label;                // Label for branch(es)
1134 
1135   uint _block_num;
1136 
1137   labelOper() : _label(nullptr), _block_num(0) {}
1138 
1139   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1140 
1141   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1142 
1143   virtual MachOper *clone() const;
1144 
1145   virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1146 
1147   virtual uint           opcode() const;
1148 
1149   virtual uint           hash()   const;
1150   virtual bool           cmp( const MachOper &oper ) const;
1151 #ifndef PRODUCT
1152   virtual const char    *Name()   const { return "Label";}
1153 
1154   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1155   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1156 #endif
1157 };
1158 
1159 
1160 //------------------------------methodOper--------------------------------------
1161 // Machine-independent version of method operand
1162 class methodOper : public MachOper {
1163 private:
1164   virtual uint           num_edges() const { return 0; }
1165 public:
1166   intptr_t _method;             // Address of method
1167   methodOper() :   _method(0) {}
1168   methodOper(intptr_t method) : _method(method)  {}
1169 
1170   virtual MachOper *clone() const;
1171 
1172   virtual intptr_t method() const { return _method; }
1173 
1174   virtual uint           opcode() const;
1175 
1176   virtual uint           hash()   const;
1177   virtual bool           cmp( const MachOper &oper ) const;
1178 #ifndef PRODUCT
1179   virtual const char    *Name()   const { return "Method";}
1180 
1181   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1182   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1183 #endif
1184 };
1185 
1186 #endif // SHARE_OPTO_MACHNODE_HPP