1 /*
   2  * Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_OPTO_MACHNODE_HPP
  26 #define SHARE_OPTO_MACHNODE_HPP
  27 
  28 #include "opto/callnode.hpp"
  29 #include "opto/constantTable.hpp"
  30 #include "opto/matcher.hpp"
  31 #include "opto/multnode.hpp"
  32 #include "opto/node.hpp"
  33 #include "opto/regmask.hpp"
  34 #include "utilities/growableArray.hpp"
  35 
  36 class BufferBlob;
  37 class CodeBuffer;
  38 class JVMState;
  39 class MachCallDynamicJavaNode;
  40 class MachCallJavaNode;
  41 class MachCallLeafNode;
  42 class MachCallNativeNode;
  43 class MachCallNode;
  44 class MachCallRuntimeNode;
  45 class MachCallStaticJavaNode;
  46 class MachEpilogNode;
  47 class MachIfNode;
  48 class MachNullCheckNode;
  49 class MachOper;
  50 class MachProjNode;
  51 class MachPrologNode;
  52 class MachReturnNode;
  53 class MachSafePointNode;
  54 class MachSpillCopyNode;
  55 class MachVEPNode;
  56 class Matcher;
  57 class PhaseRegAlloc;
  58 class RegMask;
  59 class RTMLockingCounters;
  60 class State;
  61 
  62 //---------------------------MachOper------------------------------------------
  63 class MachOper : public ResourceObj {
  64 public:
  65   // Allocate right next to the MachNodes in the same arena
  66   void *operator new(size_t x) throw() {
  67     Compile* C = Compile::current();
  68     return C->node_arena()->AmallocWords(x);
  69   }
  70 
  71   // Opcode
  72   virtual uint opcode() const = 0;
  73 
  74   // Number of input edges.
  75   // Generally at least 1
  76   virtual uint num_edges() const { return 1; }
  77   // Array of Register masks
  78   virtual const RegMask *in_RegMask(int index) const;
  79 
  80   // Methods to output the encoding of the operand
  81 
  82   // Negate conditional branches.  Error for non-branch Nodes
  83   virtual void negate();
  84 
  85   // Return the value requested
  86   // result register lookup, corresponding to int_format
  87   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  88   // input register lookup, corresponding to ext_format
  89   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  90 
  91   // helpers for MacroAssembler generation from ADLC
  92   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  93     return ::as_Register(reg(ra_, node));
  94   }
  95   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  96     return ::as_Register(reg(ra_, node, idx));
  97   }
  98   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  99     return ::as_FloatRegister(reg(ra_, node));
 100   }
 101   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 102     return ::as_FloatRegister(reg(ra_, node, idx));
 103   }
 104 
 105 #if defined(IA32) || defined(AMD64)
 106   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 107     return ::as_KRegister(reg(ra_, node));
 108   }
 109   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 110     return ::as_KRegister(reg(ra_, node, idx));
 111   }
 112   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 113     return ::as_XMMRegister(reg(ra_, node));
 114   }
 115   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 116     return ::as_XMMRegister(reg(ra_, node, idx));
 117   }
 118 #endif
 119   // CondRegister reg converter
 120 #if defined(PPC64)
 121   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
 122     return ::as_ConditionRegister(reg(ra_, node));
 123   }
 124   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 125     return ::as_ConditionRegister(reg(ra_, node, idx));
 126   }
 127   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
 128     return ::as_VectorRegister(reg(ra_, node));
 129   }
 130   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 131     return ::as_VectorRegister(reg(ra_, node, idx));
 132   }
 133   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
 134     return ::as_VectorSRegister(reg(ra_, node));
 135   }
 136   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 137     return ::as_VectorSRegister(reg(ra_, node, idx));
 138   }
 139 #endif
 140 
 141   virtual intptr_t  constant() const;
 142   virtual relocInfo::relocType constant_reloc() const;
 143   virtual jdouble constantD() const;
 144   virtual jfloat  constantF() const;
 145   virtual jlong   constantL() const;
 146   virtual TypeOopPtr *oop() const;
 147   virtual int  ccode() const;
 148   // A zero, default, indicates this value is not needed.
 149   // May need to lookup the base register, as done in int_ and ext_format
 150   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 151   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 152   virtual int  scale() const;
 153   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 154   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 155   // Check for PC-Relative displacement
 156   virtual relocInfo::relocType disp_reloc() const;
 157   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 158   virtual int  base_position()  const;  // base edge position, or -1
 159   virtual int  index_position() const;  // index edge position, or -1
 160 
 161   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 162   // Only returns non-null value for x86_32.ad's indOffset32X
 163   virtual const TypePtr *disp_as_type() const { return NULL; }
 164 
 165   // Return the label
 166   virtual Label *label() const;
 167 
 168   // Return the method's address
 169   virtual intptr_t  method() const;
 170 
 171   // Hash and compare over operands are currently identical
 172   virtual uint  hash() const;
 173   virtual bool  cmp( const MachOper &oper ) const;
 174 
 175   // Virtual clone, since I do not know how big the MachOper is.
 176   virtual MachOper *clone() const = 0;
 177 
 178   // Return ideal Type from simple operands.  Fail for complex operands.
 179   virtual const Type *type() const;
 180 
 181   // Set an integer offset if we have one, or error otherwise
 182   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 183 
 184 #ifndef PRODUCT
 185   // Return name of operand
 186   virtual const char    *Name() const { return "???";}
 187 
 188   // Methods to output the text version of the operand
 189   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 190   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 191 
 192   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 193 
 194   // Check whether o is a valid oper.
 195   static bool notAnOper(const MachOper *o) {
 196     if (o == NULL)                   return true;
 197     if (((intptr_t)o & 1) != 0)      return true;
 198     if (*(address*)o == badAddress)  return true;  // kill by Node::destruct
 199     return false;
 200   }
 201 #endif // !PRODUCT
 202 };
 203 
 204 //------------------------------MachNode---------------------------------------
 205 // Base type for all machine specific nodes.  All node classes generated by the
 206 // ADLC inherit from this class.
 207 class MachNode : public Node {
 208 private:
 209   bool _removed = false;
 210 
 211 public:
 212   MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(NULL) {
 213     init_class_id(Class_Mach);
 214   }
 215   // Required boilerplate
 216   virtual uint size_of() const { return sizeof(MachNode); }
 217   virtual int  Opcode() const;          // Always equal to MachNode
 218   virtual uint rule() const = 0;        // Machine-specific opcode
 219   // Number of inputs which come before the first operand.
 220   // Generally at least 1, to skip the Control input
 221   virtual uint oper_input_base() const { return 1; }
 222   // Position of constant base node in node's inputs. -1 if
 223   // no constant base node input.
 224   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 225 
 226   uint8_t barrier_data() const { return _barrier; }
 227   void set_barrier_data(uint8_t data) { _barrier = data; }
 228 
 229   // Copy inputs and operands to new node of instruction.
 230   // Called from cisc_version() and short_branch_version().
 231   // !!!! The method's body is defined in ad_<arch>.cpp file.
 232   void fill_new_machnode(MachNode *n) const;
 233 
 234   // Return an equivalent instruction using memory for cisc_operand position
 235   virtual MachNode *cisc_version(int offset);
 236   // Modify this instruction's register mask to use stack version for cisc_operand
 237   virtual void use_cisc_RegMask();
 238 
 239   // Support for short branches
 240   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 241 
 242   // Avoid back to back some instructions on some CPUs.
 243   enum AvoidBackToBackFlag { AVOID_NONE = 0,
 244                              AVOID_BEFORE = Flag_avoid_back_to_back_before,
 245                              AVOID_AFTER = Flag_avoid_back_to_back_after,
 246                              AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
 247 
 248   bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
 249     return (flags() & flag_value) == flag_value;
 250   }
 251 
 252   // instruction implemented with a call
 253   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 254 
 255   // First index in _in[] corresponding to operand, or -1 if there is none
 256   int  operand_index(uint operand) const;
 257   int  operand_index(const MachOper *oper) const;
 258   int  operand_index(Node* m) const;
 259 
 260   // Register class input is expected in
 261   virtual const RegMask &in_RegMask(uint) const;
 262 
 263   // cisc-spillable instructions redefine for use by in_RegMask
 264   virtual const RegMask *cisc_RegMask() const { return NULL; }
 265 
 266   // If this instruction is a 2-address instruction, then return the
 267   // index of the input which must match the output.  Not nessecary
 268   // for instructions which bind the input and output register to the
 269   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 270   // both an input and an output).  It is nessecary when the input and
 271   // output have choices - but they must use the same choice.
 272   virtual uint two_adr( ) const { return 0; }
 273 
 274   // The GC might require some barrier metadata for machine code emission.
 275   uint8_t _barrier;
 276 
 277   // Array of complex operand pointers.  Each corresponds to zero or
 278   // more leafs.  Must be set by MachNode constructor to point to an
 279   // internal array of MachOpers.  The MachOper array is sized by
 280   // specific MachNodes described in the ADL.
 281   uint _num_opnds;
 282   MachOper **_opnds;
 283   uint  num_opnds() const { return _num_opnds; }
 284 
 285   // Emit bytes into cbuf
 286   virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 287   // Expand node after register allocation.
 288   // Node is replaced by several nodes in the postalloc expand phase.
 289   // Corresponding methods are generated for nodes if they specify
 290   // postalloc_expand. See block.cpp for more documentation.
 291   virtual bool requires_postalloc_expand() const { return false; }
 292   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 293   // Size of instruction in bytes
 294   virtual uint  size(PhaseRegAlloc *ra_) const;
 295   // Helper function that computes size by emitting code
 296   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 297 
 298   // Return the alignment required (in units of relocInfo::addr_unit())
 299   // for this instruction (must be a power of 2)
 300   int           pd_alignment_required() const;
 301   virtual int   alignment_required() const { return pd_alignment_required(); }
 302 
 303   // Return the padding (in bytes) to be emitted before this
 304   // instruction to properly align it.
 305   virtual int   compute_padding(int current_offset) const;
 306 
 307   // Return number of relocatable values contained in this instruction
 308   virtual int   reloc() const { return 0; }
 309 
 310   // Return number of words used for double constants in this instruction
 311   virtual int   ins_num_consts() const { return 0; }
 312 
 313   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 314   virtual uint  hash() const;
 315   virtual bool  cmp( const Node &n ) const;
 316 
 317   // Expand method for MachNode, replaces nodes representing pseudo
 318   // instructions with a set of nodes which represent real machine
 319   // instructions and compute the same value.
 320   virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
 321 
 322   // Bottom_type call; value comes from operand0
 323   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 324   virtual uint ideal_reg() const {
 325     const Type *t = _opnds[0]->type();
 326     if (t == TypeInt::CC) {
 327       return Op_RegFlags;
 328     } else {
 329       return t->ideal_reg();
 330     }
 331   }
 332 
 333   // If this is a memory op, return the base pointer and fixed offset.
 334   // If there are no such, return NULL.  If there are multiple addresses
 335   // or the address is indeterminate (rare cases) then return (Node*)-1,
 336   // which serves as node bottom.
 337   // If the offset is not statically determined, set it to Type::OffsetBot.
 338   // This method is free to ignore stack slots if that helps.
 339   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 340   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 341   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 342 
 343   // Helper for get_base_and_disp: find the base and index input nodes.
 344   // Returns the MachOper as determined by memory_operand(), for use, if
 345   // needed by the caller. If (MachOper *)-1 is returned, base and index
 346   // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
 347   // index are set to NULL.
 348   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 349 
 350   // Helper for memory_inputs:  Which operand carries the necessary info?
 351   // By default, returns NULL, which means there is no such operand.
 352   // If it returns (MachOper*)-1, this means there are multiple memories.
 353   virtual const MachOper* memory_operand() const { return NULL; }
 354 
 355   // Call "get_base_and_disp" to decide which category of memory is used here.
 356   virtual const class TypePtr *adr_type() const;
 357 
 358   // Apply peephole rule(s) to this instruction
 359   virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted);
 360 
 361   // Top-level ideal Opcode matched
 362   virtual int ideal_Opcode()     const { return Op_Node; }
 363 
 364   // Adds the label for the case
 365   virtual void add_case_label( int switch_val, Label* blockLabel);
 366 
 367   // Set the absolute address for methods
 368   virtual void method_set( intptr_t addr );
 369 
 370   // Should we clone rather than spill this instruction?
 371   bool rematerialize() const;
 372 
 373   // Get the pipeline info
 374   static const Pipeline *pipeline_class();
 375   virtual const Pipeline *pipeline() const;
 376 
 377   // Returns true if this node is a check that can be implemented with a trap.
 378   virtual bool is_TrapBasedCheckNode() const { return false; }
 379   void set_removed() { _removed = true; }
 380   bool get_removed() { return _removed; }
 381 
 382 #ifndef PRODUCT
 383   virtual const char *Name() const = 0; // Machine-specific name
 384   virtual void dump_spec(outputStream *st) const; // Print per-node info
 385   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 386 #endif
 387 };
 388 
 389 //------------------------------MachIdealNode----------------------------
 390 // Machine specific versions of nodes that must be defined by user.
 391 // These are not converted by matcher from ideal nodes to machine nodes
 392 // but are inserted into the code by the compiler.
 393 class MachIdealNode : public MachNode {
 394 public:
 395   MachIdealNode( ) {}
 396 
 397   // Define the following defaults for non-matched machine nodes
 398   virtual uint oper_input_base() const { return 0; }
 399   virtual uint rule()            const { return 9999999; }
 400   virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
 401 };
 402 
 403 //------------------------------MachTypeNode----------------------------
 404 // Machine Nodes that need to retain a known Type.
 405 class MachTypeNode : public MachNode {
 406   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 407 public:
 408   MachTypeNode( ) {}
 409   const Type *_bottom_type;
 410 
 411   virtual const class Type *bottom_type() const { return _bottom_type; }
 412 #ifndef PRODUCT
 413   virtual void dump_spec(outputStream *st) const;
 414 #endif
 415 };
 416 
 417 //------------------------------MachBreakpointNode----------------------------
 418 // Machine breakpoint or interrupt Node
 419 class MachBreakpointNode : public MachIdealNode {
 420 public:
 421   MachBreakpointNode( ) {}
 422   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 423   virtual uint size(PhaseRegAlloc *ra_) const;
 424 
 425 #ifndef PRODUCT
 426   virtual const char *Name() const { return "Breakpoint"; }
 427   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 428 #endif
 429 };
 430 
 431 //------------------------------MachConstantBaseNode--------------------------
 432 // Machine node that represents the base address of the constant table.
 433 class MachConstantBaseNode : public MachIdealNode {
 434 public:
 435   static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
 436 
 437 public:
 438   MachConstantBaseNode() : MachIdealNode() {
 439     init_class_id(Class_MachConstantBase);
 440   }
 441   virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
 442   virtual uint ideal_reg() const { return Op_RegP; }
 443   virtual uint oper_input_base() const { return 1; }
 444 
 445   virtual bool requires_postalloc_expand() const;
 446   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 447 
 448   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 449   virtual uint size(PhaseRegAlloc* ra_) const;
 450 
 451   static const RegMask& static_out_RegMask() { return _out_RegMask; }
 452   virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
 453 
 454 #ifndef PRODUCT
 455   virtual const char* Name() const { return "MachConstantBaseNode"; }
 456   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 457 #endif
 458 };
 459 
 460 //------------------------------MachConstantNode-------------------------------
 461 // Machine node that holds a constant which is stored in the constant table.
 462 class MachConstantNode : public MachTypeNode {
 463 protected:
 464   ConstantTable::Constant _constant;  // This node's constant.
 465 
 466 public:
 467   MachConstantNode() : MachTypeNode() {
 468     init_class_id(Class_MachConstant);
 469   }
 470 
 471   virtual void eval_constant(Compile* C) {
 472 #ifdef ASSERT
 473     tty->print("missing MachConstantNode eval_constant function: ");
 474     dump();
 475 #endif
 476     ShouldNotCallThis();
 477   }
 478 
 479   virtual const RegMask &in_RegMask(uint idx) const {
 480     if (idx == mach_constant_base_node_input())
 481       return MachConstantBaseNode::static_out_RegMask();
 482     return MachNode::in_RegMask(idx);
 483   }
 484 
 485   // Input edge of MachConstantBaseNode.
 486   virtual uint mach_constant_base_node_input() const { return req() - 1; }
 487 
 488   int  constant_offset();
 489   int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
 490   // Unchecked version to avoid assertions in debug output.
 491   int  constant_offset_unchecked() const;
 492 };
 493 
 494 //------------------------------MachVEPNode-----------------------------------
 495 // Machine Inline Type Entry Point Node
 496 class MachVEPNode : public MachIdealNode {
 497 public:
 498   Label* _verified_entry;
 499 
 500   MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
 501     _verified_entry(verified_entry),
 502     _verified(verified),
 503     _receiver_only(receiver_only) {
 504     init_class_id(Class_MachVEP);
 505   }
 506   virtual bool cmp(const Node &n) const {
 507     return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
 508            (_verified == ((MachVEPNode&)n)._verified) &&
 509            (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
 510            MachIdealNode::cmp(n);
 511   }
 512   virtual uint size_of() const { return sizeof(*this); }
 513   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 514 
 515 #ifndef PRODUCT
 516   virtual const char* Name() const { return "InlineType Entry-Point"; }
 517   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 518 #endif
 519 private:
 520   bool   _verified;
 521   bool   _receiver_only;
 522 };
 523 
 524 //------------------------------MachUEPNode-----------------------------------
 525 // Machine Unvalidated Entry Point Node
 526 class MachUEPNode : public MachIdealNode {
 527 public:
 528   MachUEPNode( ) {}
 529   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 530 
 531 #ifndef PRODUCT
 532   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 533   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 534 #endif
 535 };
 536 
 537 //------------------------------MachPrologNode--------------------------------
 538 // Machine function Prolog Node
 539 class MachPrologNode : public MachIdealNode {
 540 public:
 541   Label* _verified_entry;
 542 
 543   MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
 544     init_class_id(Class_MachProlog);
 545   }
 546   virtual bool cmp(const Node &n) const {
 547     return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
 548   }
 549   virtual uint size_of() const { return sizeof(*this); }
 550   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 551   virtual int reloc() const;
 552 
 553 #ifndef PRODUCT
 554   virtual const char *Name() const { return "Prolog"; }
 555   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 556 #endif
 557 };
 558 
 559 //------------------------------MachEpilogNode--------------------------------
 560 // Machine function Epilog Node
 561 class MachEpilogNode : public MachIdealNode {
 562 public:
 563   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 564   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 565   virtual int reloc() const;
 566   virtual const Pipeline *pipeline() const;
 567 
 568 private:
 569   bool _do_polling;
 570 
 571 public:
 572   bool do_polling() const { return _do_polling; }
 573 
 574 #ifndef PRODUCT
 575   virtual const char *Name() const { return "Epilog"; }
 576   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 577 #endif
 578 };
 579 
 580 //------------------------------MachNopNode-----------------------------------
 581 // Machine function Nop Node
 582 class MachNopNode : public MachIdealNode {
 583 private:
 584   int _count;
 585 public:
 586   MachNopNode( ) : _count(1) {}
 587   MachNopNode( int count ) : _count(count) {}
 588   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 589   virtual uint size(PhaseRegAlloc *ra_) const;
 590 
 591   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 592 
 593   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 594   virtual const Pipeline *pipeline() const;
 595 #ifndef PRODUCT
 596   virtual const char *Name() const { return "Nop"; }
 597   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 598   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 599 #endif
 600 };
 601 
 602 //------------------------------MachSpillCopyNode------------------------------
 603 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 604 // location (stack or register).
 605 class MachSpillCopyNode : public MachIdealNode {
 606 public:
 607   enum SpillType {
 608     TwoAddress,                        // Inserted when coalescing of a two-address-instruction node and its input fails
 609     PhiInput,                          // Inserted when coalescing of a phi node and its input fails
 610     DebugUse,                          // Inserted as debug info spills to safepoints in non-frequent blocks
 611     LoopPhiInput,                      // Pre-split compares of loop-phis
 612     Definition,                        // An lrg marked as spilled will be spilled to memory right after its definition,
 613                                        // if in high pressure region or the lrg is bound
 614     RegToReg,                          // A register to register move
 615     RegToMem,                          // A register to memory move
 616     MemToReg,                          // A memory to register move
 617     PhiLocationDifferToInputLocation,  // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
 618                                        // the phi and its input resides at different locations (i.e. reg or mem)
 619     BasePointerToMem,                  // Spill base pointer to memory at safepoint
 620     InputToRematerialization,          // When rematerializing a node we stretch the inputs live ranges, and they might be
 621                                        // stretched beyond a new definition point, therefore we split out new copies instead
 622     CallUse,                           // Spill use at a call
 623     Bound                              // An lrg marked as spill that is bound and needs to be spilled at a use
 624   };
 625 private:
 626   const RegMask *_in;           // RegMask for input
 627   const RegMask *_out;          // RegMask for output
 628   const Type *_type;
 629   const SpillType _spill_type;
 630 public:
 631   MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
 632     MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
 633     init_class_id(Class_MachSpillCopy);
 634     init_flags(Flag_is_Copy);
 635     add_req(NULL);
 636     add_req(n);
 637   }
 638   virtual uint size_of() const { return sizeof(*this); }
 639   void set_out_RegMask(const RegMask &out) { _out = &out; }
 640   void set_in_RegMask(const RegMask &in) { _in = &in; }
 641   virtual const RegMask &out_RegMask() const { return *_out; }
 642   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 643   virtual const class Type *bottom_type() const { return _type; }
 644   virtual uint ideal_reg() const { return _type->ideal_reg(); }
 645   virtual uint oper_input_base() const { return 1; }
 646   uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 647 
 648   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 649   virtual uint size(PhaseRegAlloc *ra_) const;
 650 
 651 
 652 #ifndef PRODUCT
 653   static const char *spill_type(SpillType st) {
 654     switch (st) {
 655       case TwoAddress:
 656         return "TwoAddressSpillCopy";
 657       case PhiInput:
 658         return "PhiInputSpillCopy";
 659       case DebugUse:
 660         return "DebugUseSpillCopy";
 661       case LoopPhiInput:
 662         return "LoopPhiInputSpillCopy";
 663       case Definition:
 664         return "DefinitionSpillCopy";
 665       case RegToReg:
 666         return "RegToRegSpillCopy";
 667       case RegToMem:
 668         return "RegToMemSpillCopy";
 669       case MemToReg:
 670         return "MemToRegSpillCopy";
 671       case PhiLocationDifferToInputLocation:
 672         return "PhiLocationDifferToInputLocationSpillCopy";
 673       case BasePointerToMem:
 674         return "BasePointerToMemSpillCopy";
 675       case InputToRematerialization:
 676         return "InputToRematerializationSpillCopy";
 677       case CallUse:
 678         return "CallUseSpillCopy";
 679       case Bound:
 680         return "BoundSpillCopy";
 681       default:
 682         assert(false, "Must have valid spill type");
 683         return "MachSpillCopy";
 684     }
 685   }
 686 
 687   virtual const char *Name() const {
 688     return spill_type(_spill_type);
 689   }
 690 
 691   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 692 #endif
 693 };
 694 
 695 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
 696 // however it doesn't have a control input and is more like a MergeMem.
 697 // It is inserted after the register allocation is done to ensure that nodes use single
 698 // definition of a multidef lrg in a block.
 699 class MachMergeNode : public MachIdealNode {
 700 public:
 701   MachMergeNode(Node *n1) {
 702     init_class_id(Class_MachMerge);
 703     add_req(NULL);
 704     add_req(n1);
 705   }
 706   virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
 707   virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
 708   virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
 709   virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
 710   virtual uint oper_input_base() const { return 1; }
 711   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { }
 712   virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
 713 #ifndef PRODUCT
 714   virtual const char *Name() const { return "MachMerge"; }
 715 #endif
 716 };
 717 
 718 //------------------------------MachBranchNode--------------------------------
 719 // Abstract machine branch Node
 720 class MachBranchNode : public MachIdealNode {
 721 public:
 722   MachBranchNode() : MachIdealNode() {
 723     init_class_id(Class_MachBranch);
 724   }
 725   virtual void label_set(Label* label, uint block_num) = 0;
 726   virtual void save_label(Label** label, uint* block_num) = 0;
 727 
 728   // Support for short branches
 729   virtual MachNode *short_branch_version() { return NULL; }
 730 
 731   virtual bool pinned() const { return true; };
 732 };
 733 
 734 //------------------------------MachNullChkNode--------------------------------
 735 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 736 // also some kind of memory op.  Turns the indicated MachNode into a
 737 // conditional branch with good latency on the ptr-not-null path and awful
 738 // latency on the pointer-is-null path.
 739 
 740 class MachNullCheckNode : public MachBranchNode {
 741 public:
 742   const uint _vidx;             // Index of memop being tested
 743   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
 744     init_class_id(Class_MachNullCheck);
 745     add_req(ctrl);
 746     add_req(memop);
 747   }
 748   virtual int Opcode() const;
 749   virtual uint size_of() const { return sizeof(*this); }
 750 
 751   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 752   virtual void label_set(Label* label, uint block_num);
 753   virtual void save_label(Label** label, uint* block_num);
 754   virtual void negate() { }
 755   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 756   virtual uint ideal_reg() const { return NotAMachineReg; }
 757   virtual const RegMask &in_RegMask(uint) const;
 758   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 759 #ifndef PRODUCT
 760   virtual const char *Name() const { return "NullCheck"; }
 761   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 762 #endif
 763 };
 764 
 765 //------------------------------MachProjNode----------------------------------
 766 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 767 // just MachNodes made by the Ideal world that replicate simple projections
 768 // but with machine-dependent input & output register masks.  Generally
 769 // produced as part of calling conventions.  Normally I make MachNodes as part
 770 // of the Matcher process, but the Matcher is ill suited to issues involving
 771 // frame handling, so frame handling is all done in the Ideal world with
 772 // occasional callbacks to the machine model for important info.
 773 class MachProjNode : public ProjNode {
 774 public:
 775   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
 776     init_class_id(Class_MachProj);
 777   }
 778   RegMask _rout;
 779   const uint  _ideal_reg;
 780   enum projType {
 781     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 782     fat_proj       = 999        // Projs killing many regs, defined by _rout
 783   };
 784   virtual int   Opcode() const;
 785   virtual const Type *bottom_type() const;
 786   virtual const TypePtr *adr_type() const;
 787   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 788   virtual const RegMask &out_RegMask() const { return _rout; }
 789   virtual uint  ideal_reg() const { return _ideal_reg; }
 790   // Need size_of() for virtual ProjNode::clone()
 791   virtual uint  size_of() const { return sizeof(MachProjNode); }
 792 #ifndef PRODUCT
 793   virtual void dump_spec(outputStream *st) const;
 794 #endif
 795 };
 796 
 797 //------------------------------MachIfNode-------------------------------------
 798 // Machine-specific versions of IfNodes
 799 class MachIfNode : public MachBranchNode {
 800   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 801 public:
 802   float _prob;                  // Probability branch goes either way
 803   float _fcnt;                  // Frequency counter
 804   MachIfNode() : MachBranchNode() {
 805     init_class_id(Class_MachIf);
 806   }
 807   // Negate conditional branches.
 808   virtual void negate() = 0;
 809 #ifndef PRODUCT
 810   virtual void dump_spec(outputStream *st) const;
 811 #endif
 812 };
 813 
 814 //------------------------------MachJumpNode-----------------------------------
 815 // Machine-specific versions of JumpNodes
 816 class MachJumpNode : public MachConstantNode {
 817 public:
 818   float* _probs;
 819   MachJumpNode() : MachConstantNode() {
 820     init_class_id(Class_MachJump);
 821   }
 822 };
 823 
 824 //------------------------------MachGotoNode-----------------------------------
 825 // Machine-specific versions of GotoNodes
 826 class MachGotoNode : public MachBranchNode {
 827 public:
 828   MachGotoNode() : MachBranchNode() {
 829     init_class_id(Class_MachGoto);
 830   }
 831 };
 832 
 833 //------------------------------MachFastLockNode-------------------------------------
 834 // Machine-specific versions of FastLockNodes
 835 class MachFastLockNode : public MachNode {
 836   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 837 public:
 838   RTMLockingCounters*       _rtm_counters; // RTM lock counters for inflated locks
 839   RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
 840   MachFastLockNode() : MachNode() {}
 841 };
 842 
 843 //------------------------------MachReturnNode--------------------------------
 844 // Machine-specific versions of subroutine returns
 845 class MachReturnNode : public MachNode {
 846   virtual uint size_of() const; // Size is bigger
 847 public:
 848   RegMask *_in_rms;             // Input register masks, set during allocation
 849   ReallocMark _nesting;         // assertion check for reallocations
 850   const TypePtr* _adr_type;     // memory effects of call or return
 851   MachReturnNode() : MachNode() {
 852     init_class_id(Class_MachReturn);
 853     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 854   }
 855 
 856   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 857 
 858   virtual const RegMask &in_RegMask(uint) const;
 859   virtual bool pinned() const { return true; };
 860   virtual const TypePtr *adr_type() const;
 861 };
 862 
 863 //------------------------------MachSafePointNode-----------------------------
 864 // Machine-specific versions of safepoints
 865 class MachSafePointNode : public MachReturnNode {
 866 public:
 867   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 868   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 869   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 870   bool            _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
 871   OopMap*         oop_map() const { return _oop_map; }
 872   void            set_oop_map(OopMap* om) { _oop_map = om; }
 873 
 874   MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0), _has_ea_local_in_scope(false) {
 875     init_class_id(Class_MachSafePoint);
 876   }
 877 
 878   virtual JVMState* jvms() const { return _jvms; }
 879   void set_jvms(JVMState* s) {
 880     _jvms = s;
 881   }
 882   virtual const Type    *bottom_type() const;
 883 
 884   virtual const RegMask &in_RegMask(uint) const;
 885 
 886   // Functionality from old debug nodes
 887   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 888   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 889 
 890   Node *local(const JVMState* jvms, uint idx) const {
 891     assert(verify_jvms(jvms), "jvms must match");
 892     return in(_jvmadj + jvms->locoff() + idx);
 893   }
 894   Node *stack(const JVMState* jvms, uint idx) const {
 895     assert(verify_jvms(jvms), "jvms must match");
 896     return in(_jvmadj + jvms->stkoff() + idx);
 897  }
 898   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 899     assert(verify_jvms(jvms), "jvms must match");
 900     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 901   }
 902   Node *monitor_box(const JVMState* jvms, uint idx) const {
 903     assert(verify_jvms(jvms), "jvms must match");
 904     return in(_jvmadj + jvms->monitor_box_offset(idx));
 905   }
 906   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 907     assert(verify_jvms(jvms), "jvms must match");
 908     set_req(_jvmadj + jvms->locoff() + idx, c);
 909   }
 910   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 911     assert(verify_jvms(jvms), "jvms must match");
 912     set_req(_jvmadj + jvms->stkoff() + idx, c);
 913   }
 914   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 915     assert(verify_jvms(jvms), "jvms must match");
 916     set_req(_jvmadj + jvms->monoff() + idx, c);
 917   }
 918 };
 919 
 920 //------------------------------MachCallNode----------------------------------
 921 // Machine-specific versions of subroutine calls
 922 class MachCallNode : public MachSafePointNode {
 923 protected:
 924   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 925   virtual bool cmp( const Node &n ) const;
 926   virtual uint size_of() const = 0; // Size is bigger
 927 public:
 928   const TypeFunc *_tf;        // Function type
 929   address      _entry_point;  // Address of the method being called
 930   float        _cnt;          // Estimate of number of times called
 931   bool         _guaranteed_safepoint; // Do we need to observe safepoint?
 932 
 933   const TypeFunc* tf()        const { return _tf; }
 934   const address entry_point() const { return _entry_point; }
 935   const float   cnt()         const { return _cnt; }
 936 
 937   void set_tf(const TypeFunc* tf)       { _tf = tf; }
 938   void set_entry_point(address p)       { _entry_point = p; }
 939   void set_cnt(float c)                 { _cnt = c; }
 940   void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
 941 
 942   MachCallNode() : MachSafePointNode() {
 943     init_class_id(Class_MachCall);
 944   }
 945 
 946   virtual const Type *bottom_type() const;
 947   virtual bool  pinned() const { return false; }
 948   virtual const Type* Value(PhaseGVN* phase) const;
 949   virtual const RegMask &in_RegMask(uint) const;
 950   virtual int ret_addr_offset() { return 0; }
 951 
 952   NOT_LP64(bool return_value_is_used() const;)
 953 
 954   // Similar to cousin class CallNode::returns_pointer
 955   bool returns_pointer() const;
 956   bool returns_scalarized() const;
 957 
 958   bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
 959 
 960 #ifndef PRODUCT
 961   virtual void dump_spec(outputStream *st) const;
 962 #endif
 963 };
 964 
 965 //------------------------------MachCallJavaNode------------------------------
 966 // "Base" class for machine-specific versions of subroutine calls
 967 class MachCallJavaNode : public MachCallNode {
 968 protected:
 969   virtual bool cmp( const Node &n ) const;
 970   virtual uint size_of() const; // Size is bigger
 971 public:
 972   ciMethod* _method;                 // Method being direct called
 973   bool      _override_symbolic_info; // Override symbolic call site info from bytecode
 974   bool      _optimized_virtual;      // Tells if node is a static call or an optimized virtual
 975   bool      _method_handle_invoke;   // Tells if the call has to preserve SP
 976   bool      _arg_escape;             // ArgEscape in parameter list
 977   MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
 978     init_class_id(Class_MachCallJava);
 979   }
 980 
 981   virtual const RegMask &in_RegMask(uint) const;
 982 
 983   int resolved_method_index(CodeBuffer &cbuf) const {
 984     if (_override_symbolic_info) {
 985       // Attach corresponding Method* to the call site, so VM can use it during resolution
 986       // instead of querying symbolic info from bytecode.
 987       assert(_method != NULL, "method should be set");
 988       assert(_method->constant_encoding()->is_method(), "should point to a Method");
 989       return cbuf.oop_recorder()->find_index(_method->constant_encoding());
 990     }
 991     return 0; // Use symbolic info from bytecode (resolved_method == NULL).
 992   }
 993 
 994 #ifndef PRODUCT
 995   virtual void dump_spec(outputStream *st) const;
 996 #endif
 997 };
 998 
 999 //------------------------------MachCallStaticJavaNode------------------------
1000 // Machine-specific versions of monomorphic subroutine calls
1001 class MachCallStaticJavaNode : public MachCallJavaNode {
1002   virtual bool cmp( const Node &n ) const;
1003   virtual uint size_of() const; // Size is bigger
1004 public:
1005   const char *_name;            // Runtime wrapper name
1006   MachCallStaticJavaNode() : MachCallJavaNode() {
1007     init_class_id(Class_MachCallStaticJava);
1008   }
1009 
1010   // If this is an uncommon trap, return the request code, else zero.
1011   int uncommon_trap_request() const;
1012 
1013   virtual int ret_addr_offset();
1014 #ifndef PRODUCT
1015   virtual void dump_spec(outputStream *st) const;
1016   void dump_trap_args(outputStream *st) const;
1017 #endif
1018 };
1019 
1020 //------------------------------MachCallDynamicJavaNode------------------------
1021 // Machine-specific versions of possibly megamorphic subroutine calls
1022 class MachCallDynamicJavaNode : public MachCallJavaNode {
1023 public:
1024   int _vtable_index;
1025   MachCallDynamicJavaNode() : MachCallJavaNode() {
1026     init_class_id(Class_MachCallDynamicJava);
1027     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
1028   }
1029   virtual int ret_addr_offset();
1030 #ifndef PRODUCT
1031   virtual void dump_spec(outputStream *st) const;
1032 #endif
1033 };
1034 
1035 //------------------------------MachCallRuntimeNode----------------------------
1036 // Machine-specific versions of subroutine calls
1037 class MachCallRuntimeNode : public MachCallNode {
1038   virtual bool cmp( const Node &n ) const;
1039   virtual uint size_of() const; // Size is bigger
1040 public:
1041   const char *_name;            // Printable name, if _method is NULL
1042   bool _leaf_no_fp;             // Is this CallLeafNoFP?
1043   MachCallRuntimeNode() : MachCallNode() {
1044     init_class_id(Class_MachCallRuntime);
1045   }
1046   virtual int ret_addr_offset();
1047 #ifndef PRODUCT
1048   virtual void dump_spec(outputStream *st) const;
1049 #endif
1050 };
1051 
1052 class MachCallLeafNode: public MachCallRuntimeNode {
1053 public:
1054   MachCallLeafNode() : MachCallRuntimeNode() {
1055     init_class_id(Class_MachCallLeaf);
1056   }
1057 };
1058 
1059 class MachCallNativeNode: public MachCallNode {
1060   virtual bool cmp( const Node &n ) const;
1061   virtual uint size_of() const;
1062   void print_regs(const GrowableArray<VMReg>& regs, outputStream* st) const;
1063 public:
1064   const char *_name;
1065   GrowableArray<VMReg> _arg_regs;
1066   GrowableArray<VMReg> _ret_regs;
1067 
1068   MachCallNativeNode() : MachCallNode() {
1069     init_class_id(Class_MachCallNative);
1070   }
1071 
1072   virtual int ret_addr_offset();
1073 #ifndef PRODUCT
1074   virtual void dump_spec(outputStream *st) const;
1075 #endif
1076 };
1077 
1078 //------------------------------MachHaltNode-----------------------------------
1079 // Machine-specific versions of halt nodes
1080 class MachHaltNode : public MachReturnNode {
1081 public:
1082   bool _reachable;
1083   const char* _halt_reason;
1084   virtual JVMState* jvms() const;
1085   bool is_reachable() const {
1086     return _reachable;
1087   }
1088 };
1089 
1090 class MachMemBarNode : public MachNode {
1091   virtual uint size_of() const; // Size is bigger
1092 public:
1093   const TypePtr* _adr_type;     // memory effects
1094   MachMemBarNode() : MachNode() {
1095     init_class_id(Class_MachMemBar);
1096     _adr_type = TypePtr::BOTTOM; // the default: all of memory
1097   }
1098 
1099   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1100   virtual const TypePtr *adr_type() const;
1101 };
1102 
1103 
1104 //------------------------------MachTempNode-----------------------------------
1105 // Node used by the adlc to construct inputs to represent temporary registers
1106 class MachTempNode : public MachNode {
1107 private:
1108   MachOper *_opnd_array[1];
1109 
1110 public:
1111   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1112   virtual uint rule() const { return 9999999; }
1113   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
1114 
1115   MachTempNode(MachOper* oper) {
1116     init_class_id(Class_MachTemp);
1117     _num_opnds = 1;
1118     _opnds = _opnd_array;
1119     add_req(NULL);
1120     _opnds[0] = oper;
1121   }
1122   virtual uint size_of() const { return sizeof(MachTempNode); }
1123 
1124 #ifndef PRODUCT
1125   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1126   virtual const char *Name() const { return "MachTemp";}
1127 #endif
1128 };
1129 
1130 
1131 
1132 //------------------------------labelOper--------------------------------------
1133 // Machine-independent version of label operand
1134 class labelOper : public MachOper {
1135 private:
1136   virtual uint           num_edges() const { return 0; }
1137 public:
1138   // Supported for fixed size branches
1139   Label* _label;                // Label for branch(es)
1140 
1141   uint _block_num;
1142 
1143   labelOper() : _label(0), _block_num(0) {}
1144 
1145   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1146 
1147   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1148 
1149   virtual MachOper *clone() const;
1150 
1151   virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
1152 
1153   virtual uint           opcode() const;
1154 
1155   virtual uint           hash()   const;
1156   virtual bool           cmp( const MachOper &oper ) const;
1157 #ifndef PRODUCT
1158   virtual const char    *Name()   const { return "Label";}
1159 
1160   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1161   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1162 #endif
1163 };
1164 
1165 
1166 //------------------------------methodOper--------------------------------------
1167 // Machine-independent version of method operand
1168 class methodOper : public MachOper {
1169 private:
1170   virtual uint           num_edges() const { return 0; }
1171 public:
1172   intptr_t _method;             // Address of method
1173   methodOper() :   _method(0) {}
1174   methodOper(intptr_t method) : _method(method)  {}
1175 
1176   virtual MachOper *clone() const;
1177 
1178   virtual intptr_t method() const { return _method; }
1179 
1180   virtual uint           opcode() const;
1181 
1182   virtual uint           hash()   const;
1183   virtual bool           cmp( const MachOper &oper ) const;
1184 #ifndef PRODUCT
1185   virtual const char    *Name()   const { return "Method";}
1186 
1187   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1188   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1189 #endif
1190 };
1191 
1192 #endif // SHARE_OPTO_MACHNODE_HPP