1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
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23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/c2_MacroAssembler.hpp"
29 #include "opto/callnode.hpp"
30 #include "opto/constantTable.hpp"
31 #include "opto/matcher.hpp"
32 #include "opto/multnode.hpp"
33 #include "opto/node.hpp"
34 #include "opto/regmask.hpp"
35 #include "utilities/growableArray.hpp"
36
37 class BufferBlob;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class MachVEPNode;
55 class Matcher;
56 class PhaseRegAlloc;
57 class RegMask;
58 class State;
59
60 //---------------------------MachOper------------------------------------------
61 class MachOper : public ResourceObj {
62 public:
63 // Allocate right next to the MachNodes in the same arena
64 void *operator new(size_t x) throw() {
65 Compile* C = Compile::current();
66 return C->node_arena()->AmallocWords(x);
67 }
68
69 // Opcode
70 virtual uint opcode() const = 0;
71
72 // Number of input edges.
73 // Generally at least 1
74 virtual uint num_edges() const { return 1; }
75 // Array of Register masks
76 virtual const RegMask *in_RegMask(int index) const;
77
78 // Methods to output the encoding of the operand
79
80 // Negate conditional branches. Error for non-branch Nodes
81 virtual void negate();
82
83 // Return the value requested
84 // result register lookup, corresponding to int_format
85 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
86 // input register lookup, corresponding to ext_format
87 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
88
89 // helpers for MacroAssembler generation from ADLC
90 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_Register(reg(ra_, node));
92 }
93 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_Register(reg(ra_, node, idx));
95 }
96 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
97 return ::as_FloatRegister(reg(ra_, node));
98 }
99 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
100 return ::as_FloatRegister(reg(ra_, node, idx));
101 }
102
103 #if defined(AMD64)
104 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
105 return ::as_KRegister(reg(ra_, node));
106 }
107 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
108 return ::as_KRegister(reg(ra_, node, idx));
109 }
110 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
111 return ::as_XMMRegister(reg(ra_, node));
112 }
113 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
114 return ::as_XMMRegister(reg(ra_, node, idx));
115 }
116 #endif
117 // CondRegister reg converter
118 #if defined(PPC64)
119 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
120 return ::as_ConditionRegister(reg(ra_, node));
121 }
122 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
123 return ::as_ConditionRegister(reg(ra_, node, idx));
124 }
125 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
126 return ::as_VectorRegister(reg(ra_, node));
127 }
128 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
129 return ::as_VectorRegister(reg(ra_, node, idx));
130 }
131 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
132 return ::as_VectorSRegister(reg(ra_, node));
133 }
134 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
135 return ::as_VectorSRegister(reg(ra_, node, idx));
136 }
137 #endif
138 #if defined(S390)
139 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
140 return ::as_VectorRegister(reg(ra_, node));
141 }
142 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
143 return ::as_VectorRegister(reg(ra_, node, idx));
144 }
145 #endif
146 #if defined(AARCH64)
147 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
148 return ::as_PRegister(reg(ra_, node));
149 }
150 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
151 return ::as_PRegister(reg(ra_, node, idx));
152 }
153 #endif
154
155 virtual intptr_t constant() const;
156 virtual relocInfo::relocType constant_reloc() const;
157 virtual jdouble constantD() const;
158 virtual jfloat constantF() const;
159 virtual jlong constantL() const;
160 virtual jshort constantH() const;
161 virtual TypeOopPtr *oop() const;
162 virtual int ccode() const;
163 // A zero, default, indicates this value is not needed.
164 // May need to lookup the base register, as done in int_ and ext_format
165 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
166 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
167 virtual int scale() const;
168 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
169 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
170 // Check for PC-Relative displacement
171 virtual relocInfo::relocType disp_reloc() const;
172 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
173 virtual int base_position() const; // base edge position, or -1
174 virtual int index_position() const; // index edge position, or -1
175
176 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
177 // Only returns non-null value for x86_32.ad's indOffset32X
178 virtual const TypePtr *disp_as_type() const { return nullptr; }
179
180 // Return the label
181 virtual Label *label() const;
182
183 // Return the method's address
184 virtual intptr_t method() const;
185
186 // Hash and compare over operands are currently identical
187 virtual uint hash() const;
188 virtual bool cmp( const MachOper &oper ) const;
189
190 // Virtual clone, since I do not know how big the MachOper is.
191 virtual MachOper *clone() const = 0;
192
193 // Return ideal Type from simple operands. Fail for complex operands.
194 virtual const Type *type() const;
195
196 // Set an integer offset if we have one, or error otherwise
197 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
198
199 #ifndef PRODUCT
200 // Return name of operand
201 virtual const char *Name() const { return "???";}
202
203 // Methods to output the text version of the operand
204 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
205 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
206
207 virtual void dump_spec(outputStream *st) const; // Print per-operand info
208
209 // Check whether o is a valid oper.
210 static bool notAnOper(const MachOper *o) {
211 if (o == nullptr) return true;
212 if (((intptr_t)o & 1) != 0) return true;
213 if (*(address*)o == badAddress) return true; // kill by Node::destruct
214 return false;
215 }
216 #endif // !PRODUCT
217 };
218
219 //------------------------------MachNode---------------------------------------
220 // Base type for all machine specific nodes. All node classes generated by the
221 // ADLC inherit from this class.
222 class MachNode : public Node {
223 public:
224 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
225 init_class_id(Class_Mach);
226 }
227 // Required boilerplate
228 virtual uint size_of() const { return sizeof(MachNode); }
229 virtual int Opcode() const; // Always equal to MachNode
230 virtual uint rule() const = 0; // Machine-specific opcode
231 // Number of inputs which come before the first operand.
232 // Generally at least 1, to skip the Control input
233 virtual uint oper_input_base() const { return 1; }
234 // Position of constant base node in node's inputs. -1 if
235 // no constant base node input.
236 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
237
238 uint8_t barrier_data() const { return _barrier; }
239 void set_barrier_data(uint8_t data) { _barrier = data; }
240
241 // Copy index, inputs, and operands to a new version of the instruction.
242 // Called from cisc_version() and short_branch_version().
243 void fill_new_machnode(MachNode *n) const;
244
245 // Return an equivalent instruction using memory for cisc_operand position
246 virtual MachNode *cisc_version(int offset);
247 // Modify this instruction's register mask to use stack version for cisc_operand
248 virtual void use_cisc_RegMask();
249
250 // Support for short branches
251 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
252
253 // Avoid back to back some instructions on some CPUs.
254 enum AvoidBackToBackFlag { AVOID_NONE = 0,
255 AVOID_BEFORE = Flag_avoid_back_to_back_before,
256 AVOID_AFTER = Flag_avoid_back_to_back_after,
257 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
258
259 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
260 return (flags() & flag_value) == flag_value;
261 }
262
263 // instruction implemented with a call
264 bool has_call() const { return (flags() & Flag_has_call) != 0; }
265
266 // First index in _in[] corresponding to operand, or -1 if there is none
267 int operand_index(uint operand) const;
268 int operand_index(const MachOper *oper) const;
269 int operand_index(Node* m) const;
270 int operand_num_edges(uint operand) const;
271
272 // Register class input is expected in
273 virtual const RegMask &in_RegMask(uint) const;
274
275 // cisc-spillable instructions redefine for use by in_RegMask
276 virtual const RegMask *cisc_RegMask() const { return nullptr; }
277
278 // If this instruction is a 2-address instruction, then return the
279 // index of the input which must match the output. Not necessary
280 // for instructions which bind the input and output register to the
281 // same singleton register (e.g., Intel IDIV which binds AX to be
282 // both an input and an output). It is necessary when the input and
283 // output have choices - but they must use the same choice.
284 virtual uint two_adr( ) const { return 0; }
285
286 // The GC might require some barrier metadata for machine code emission.
287 uint8_t _barrier;
288
289 // Array of complex operand pointers. Each corresponds to zero or
290 // more leafs. Must be set by MachNode constructor to point to an
291 // internal array of MachOpers. The MachOper array is sized by
292 // specific MachNodes described in the ADL.
293 uint16_t _num_opnds;
294 MachOper **_opnds;
295 uint16_t num_opnds() const { return _num_opnds; }
296
297 // Emit bytes using C2_MacroAssembler
298 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
299 // Expand node after register allocation.
300 // Node is replaced by several nodes in the postalloc expand phase.
301 // Corresponding methods are generated for nodes if they specify
302 // postalloc_expand. See block.cpp for more documentation.
303 virtual bool requires_postalloc_expand() const { return false; }
304 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
305 // Size of instruction in bytes
306 virtual uint size(PhaseRegAlloc *ra_) const;
307 // Helper function that computes size by emitting code
308 virtual uint emit_size(PhaseRegAlloc *ra_) const;
309
310 // Return the alignment required (in units of relocInfo::addr_unit())
311 // for this instruction (must be a power of 2)
312 int pd_alignment_required() const;
313 virtual int alignment_required() const { return pd_alignment_required(); }
314
315 // Return the padding (in bytes) to be emitted before this
316 // instruction to properly align it.
317 virtual int compute_padding(int current_offset) const;
318
319 // Return number of relocatable values contained in this instruction
320 virtual int reloc() const { return 0; }
321
322 // Return number of words used for double constants in this instruction
323 virtual int ins_num_consts() const { return 0; }
324
325 // Hash and compare over operands. Used to do GVN on machine Nodes.
326 virtual uint hash() const;
327 virtual bool cmp( const Node &n ) const;
328
329 // Expand method for MachNode, replaces nodes representing pseudo
330 // instructions with a set of nodes which represent real machine
331 // instructions and compute the same value.
332 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
333
334 // Bottom_type call; value comes from operand0
335 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
336 virtual uint ideal_reg() const {
337 const Type *t = _opnds[0]->type();
338 if (t == TypeInt::CC) {
339 return Op_RegFlags;
340 } else {
341 return t->ideal_reg();
342 }
343 }
344
345 // If this is a memory op, return the base pointer and fixed offset.
346 // If there are no such, return null. If there are multiple addresses
347 // or the address is indeterminate (rare cases) then return (Node*)-1,
348 // which serves as node bottom.
349 // If the offset is not statically determined, set it to Type::OffsetBot.
350 // This method is free to ignore stack slots if that helps.
351 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
352 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
353 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
354
355 // Helper for get_base_and_disp: find the base and index input nodes.
356 // Returns the MachOper as determined by memory_operand(), for use, if
357 // needed by the caller. If (MachOper *)-1 is returned, base and index
358 // are set to NodeSentinel. If null is returned, base and
359 // index are set to null.
360 const MachOper* memory_inputs(Node* &base, Node* &index) const;
361
362 // Helper for memory_inputs: Which operand carries the necessary info?
363 // By default, returns null, which means there is no such operand.
364 // If it returns (MachOper*)-1, this means there are multiple memories.
365 virtual const MachOper* memory_operand() const { return nullptr; }
366
367 // Call "get_base_and_disp" to decide which category of memory is used here.
368 virtual const class TypePtr *adr_type() const;
369
370 // Apply peephole rule(s) to this instruction
371 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
372
373 // Top-level ideal Opcode matched
374 virtual int ideal_Opcode() const { return Op_Node; }
375
376 // Adds the label for the case
377 virtual void add_case_label( int switch_val, Label* blockLabel);
378
379 // Set the absolute address for methods
380 virtual void method_set( intptr_t addr );
381
382 // Should we clone rather than spill this instruction?
383 bool rematerialize() const;
384
385 // Get the pipeline info
386 static const Pipeline *pipeline_class();
387 virtual const Pipeline *pipeline() const;
388
389 // Returns true if this node is a check that can be implemented with a trap.
390 virtual bool is_TrapBasedCheckNode() const { return false; }
391
392 // Whether this node is expanded during code emission into a sequence of
393 // instructions and the first instruction can perform an implicit null check.
394 virtual bool is_late_expanded_null_check_candidate() const {
395 return false;
396 }
397
398 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
399 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
400
401 #ifndef PRODUCT
402 virtual const char *Name() const = 0; // Machine-specific name
403 virtual void dump_spec(outputStream *st) const; // Print per-node info
404 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
405 #endif
406 };
407
408 //------------------------------MachIdealNode----------------------------
409 // Machine specific versions of nodes that must be defined by user.
410 // These are not converted by matcher from ideal nodes to machine nodes
411 // but are inserted into the code by the compiler.
412 class MachIdealNode : public MachNode {
413 public:
414 MachIdealNode( ) {}
415
416 // Define the following defaults for non-matched machine nodes
417 virtual uint oper_input_base() const { return 0; }
418 virtual uint rule() const { return 9999999; }
419 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
420 };
421
422 //------------------------------MachTypeNode----------------------------
423 // Machine Nodes that need to retain a known Type.
424 class MachTypeNode : public MachNode {
425 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
426 public:
427 MachTypeNode( ) {}
428 const Type *_bottom_type;
429
430 virtual const class Type *bottom_type() const { return _bottom_type; }
431 #ifndef PRODUCT
432 virtual void dump_spec(outputStream *st) const;
433 #endif
434 };
435
436 //------------------------------MachBreakpointNode----------------------------
437 // Machine breakpoint or interrupt Node
438 class MachBreakpointNode : public MachIdealNode {
439 public:
440 MachBreakpointNode( ) {}
441 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
442 virtual uint size(PhaseRegAlloc *ra_) const;
443
444 #ifndef PRODUCT
445 virtual const char *Name() const { return "Breakpoint"; }
446 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
447 #endif
448 };
449
450 //------------------------------MachConstantBaseNode--------------------------
451 // Machine node that represents the base address of the constant table.
452 class MachConstantBaseNode : public MachIdealNode {
453 public:
454 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
455
456 public:
457 MachConstantBaseNode() : MachIdealNode() {
458 init_class_id(Class_MachConstantBase);
459 }
460 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
461 virtual uint ideal_reg() const { return Op_RegP; }
462 virtual uint oper_input_base() const { return 1; }
463
464 virtual bool requires_postalloc_expand() const;
465 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
466
467 virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
468 virtual uint size(PhaseRegAlloc* ra_) const;
469
470 static const RegMask& static_out_RegMask() { return _out_RegMask; }
471 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
472
473 #ifndef PRODUCT
474 virtual const char* Name() const { return "MachConstantBaseNode"; }
475 virtual void format(PhaseRegAlloc*, outputStream* st) const;
476 #endif
477 };
478
479 //------------------------------MachConstantNode-------------------------------
480 // Machine node that holds a constant which is stored in the constant table.
481 class MachConstantNode : public MachTypeNode {
482 protected:
483 ConstantTable::Constant _constant; // This node's constant.
484
485 public:
486 MachConstantNode() : MachTypeNode() {
487 init_class_id(Class_MachConstant);
488 }
489
490 virtual void eval_constant(Compile* C) {
491 #ifdef ASSERT
492 tty->print("missing MachConstantNode eval_constant function: ");
493 dump();
494 #endif
495 ShouldNotCallThis();
496 }
497
498 virtual const RegMask &in_RegMask(uint idx) const {
499 if (idx == mach_constant_base_node_input())
500 return MachConstantBaseNode::static_out_RegMask();
501 return MachNode::in_RegMask(idx);
502 }
503
504 // Input edge of MachConstantBaseNode.
505 virtual uint mach_constant_base_node_input() const { return req() - 1; }
506
507 int constant_offset();
508 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
509 // Unchecked version to avoid assertions in debug output.
510 int constant_offset_unchecked() const;
511 virtual uint size_of() const { return sizeof(MachConstantNode); }
512 };
513
514 //------------------------------MachVEPNode-----------------------------------
515 // Machine Inline Type Entry Point Node
516 class MachVEPNode : public MachIdealNode {
517 public:
518 Label* _verified_entry;
519
520 MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
521 _verified_entry(verified_entry),
522 _verified(verified),
523 _receiver_only(receiver_only) {
524 init_class_id(Class_MachVEP);
525 }
526 virtual bool cmp(const Node &n) const {
527 return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
528 (_verified == ((MachVEPNode&)n)._verified) &&
529 (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
530 MachIdealNode::cmp(n);
531 }
532 virtual uint size_of() const { return sizeof(*this); }
533 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const;
534
535 #ifndef PRODUCT
536 virtual const char* Name() const { return "InlineType Entry-Point"; }
537 virtual void format(PhaseRegAlloc*, outputStream* st) const;
538 #endif
539 private:
540 bool _verified;
541 bool _receiver_only;
542 };
543
544 //------------------------------MachUEPNode-----------------------------------
545 // Machine Unvalidated Entry Point Node
546 class MachUEPNode : public MachIdealNode {
547 public:
548 MachUEPNode( ) {}
549 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
550
551 #ifndef PRODUCT
552 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
553 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
554 #endif
555 };
556
557 //------------------------------MachPrologNode--------------------------------
558 // Machine function Prolog Node
559 class MachPrologNode : public MachIdealNode {
560 public:
561 Label* _verified_entry;
562
563 MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
564 init_class_id(Class_MachProlog);
565 }
566 virtual bool cmp(const Node &n) const {
567 return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
568 }
569 virtual uint size_of() const { return sizeof(*this); }
570 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
571 virtual int reloc() const;
572
573 #ifndef PRODUCT
574 virtual const char *Name() const { return "Prolog"; }
575 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
576 #endif
577 };
578
579 //------------------------------MachEpilogNode--------------------------------
580 // Machine function Epilog Node
581 class MachEpilogNode : public MachIdealNode {
582 private:
583 bool _do_polling;
584 public:
585 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
586 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
587 virtual int reloc() const;
588 virtual const Pipeline *pipeline() const;
589 virtual uint size_of() const { return sizeof(MachEpilogNode); }
590 bool do_polling() const { return _do_polling; }
591
592 #ifndef PRODUCT
593 virtual const char *Name() const { return "Epilog"; }
594 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
595 #endif
596 };
597
598 //------------------------------MachNopNode-----------------------------------
599 // Machine function Nop Node
600 class MachNopNode : public MachIdealNode {
601 private:
602 int _count;
603 public:
604 MachNopNode( ) : _count(1) {}
605 MachNopNode( int count ) : _count(count) {}
606 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
607 virtual uint size(PhaseRegAlloc *ra_) const;
608
609 virtual const class Type *bottom_type() const { return Type::CONTROL; }
610
611 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
612 virtual const Pipeline *pipeline() const;
613 virtual uint size_of() const { return sizeof(MachNopNode); }
614 #ifndef PRODUCT
615 virtual const char *Name() const { return "Nop"; }
616 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
617 virtual void dump_spec(outputStream *st) const { } // No per-operand info
618 #endif
619 };
620
621 //------------------------------MachSpillCopyNode------------------------------
622 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
623 // location (stack or register).
624 class MachSpillCopyNode : public MachIdealNode {
625 public:
626 enum SpillType {
627 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
628 PhiInput, // Inserted when coalescing of a phi node and its input fails
629 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
630 LoopPhiInput, // Pre-split compares of loop-phis
631 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
632 // if in high pressure region or the lrg is bound
633 RegToReg, // A register to register move
634 RegToMem, // A register to memory move
635 MemToReg, // A memory to register move
636 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
637 // the phi and its input resides at different locations (i.e. reg or mem)
638 BasePointerToMem, // Spill base pointer to memory at safepoint
639 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
640 // stretched beyond a new definition point, therefore we split out new copies instead
641 CallUse, // Spill use at a call
642 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
643 };
644 private:
645 const RegMask *_in; // RegMask for input
646 const RegMask *_out; // RegMask for output
647 const Type *_type;
648 const SpillType _spill_type;
649 public:
650 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
651 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
652 init_class_id(Class_MachSpillCopy);
653 init_flags(Flag_is_Copy);
654 add_req(nullptr);
655 add_req(n);
656 }
657 virtual uint size_of() const { return sizeof(*this); }
658 void set_out_RegMask(const RegMask &out) { _out = &out; }
659 void set_in_RegMask(const RegMask &in) { _in = ∈ }
660 virtual const RegMask &out_RegMask() const { return *_out; }
661 virtual const RegMask &in_RegMask(uint) const { return *_in; }
662 virtual const class Type *bottom_type() const { return _type; }
663 virtual uint ideal_reg() const { return _type->ideal_reg(); }
664 virtual uint oper_input_base() const { return 1; }
665 uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
666
667 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
668 virtual uint size(PhaseRegAlloc *ra_) const;
669
670
671 #ifndef PRODUCT
672 static const char *spill_type(SpillType st) {
673 switch (st) {
674 case TwoAddress:
675 return "TwoAddressSpillCopy";
676 case PhiInput:
677 return "PhiInputSpillCopy";
678 case DebugUse:
679 return "DebugUseSpillCopy";
680 case LoopPhiInput:
681 return "LoopPhiInputSpillCopy";
682 case Definition:
683 return "DefinitionSpillCopy";
684 case RegToReg:
685 return "RegToRegSpillCopy";
686 case RegToMem:
687 return "RegToMemSpillCopy";
688 case MemToReg:
689 return "MemToRegSpillCopy";
690 case PhiLocationDifferToInputLocation:
691 return "PhiLocationDifferToInputLocationSpillCopy";
692 case BasePointerToMem:
693 return "BasePointerToMemSpillCopy";
694 case InputToRematerialization:
695 return "InputToRematerializationSpillCopy";
696 case CallUse:
697 return "CallUseSpillCopy";
698 case Bound:
699 return "BoundSpillCopy";
700 default:
701 assert(false, "Must have valid spill type");
702 return "MachSpillCopy";
703 }
704 }
705
706 virtual const char *Name() const {
707 return spill_type(_spill_type);
708 }
709
710 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
711 #endif
712 };
713
714 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
715 // however it doesn't have a control input and is more like a MergeMem.
716 // It is inserted after the register allocation is done to ensure that nodes use single
717 // definition of a multidef lrg in a block.
718 class MachMergeNode : public MachIdealNode {
719 public:
720 MachMergeNode(Node *n1) {
721 init_class_id(Class_MachMerge);
722 add_req(nullptr);
723 add_req(n1);
724 }
725 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
726 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
727 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
728 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
729 virtual uint oper_input_base() const { return 1; }
730 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
731 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
732 #ifndef PRODUCT
733 virtual const char *Name() const { return "MachMerge"; }
734 #endif
735 };
736
737 //------------------------------MachBranchNode--------------------------------
738 // Abstract machine branch Node
739 class MachBranchNode : public MachIdealNode {
740 public:
741 MachBranchNode() : MachIdealNode() {
742 init_class_id(Class_MachBranch);
743 }
744 virtual void label_set(Label* label, uint block_num) = 0;
745 virtual void save_label(Label** label, uint* block_num) = 0;
746
747 // Support for short branches
748 virtual MachNode *short_branch_version() { return nullptr; }
749
750 virtual bool pinned() const { return true; };
751 };
752
753 //------------------------------MachNullChkNode--------------------------------
754 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
755 // also some kind of memory op. Turns the indicated MachNode into a
756 // conditional branch with good latency on the ptr-not-null path and awful
757 // latency on the pointer-is-null path.
758
759 class MachNullCheckNode : public MachBranchNode {
760 public:
761 const uint _vidx; // Index of memop being tested
762 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
763 init_class_id(Class_MachNullCheck);
764 add_req(ctrl);
765 add_req(memop);
766 }
767 virtual int Opcode() const;
768 virtual uint size_of() const { return sizeof(*this); }
769
770 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
771 virtual void label_set(Label* label, uint block_num);
772 virtual void save_label(Label** label, uint* block_num);
773 virtual void negate() { }
774 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
775 virtual uint ideal_reg() const { return NotAMachineReg; }
776 virtual const RegMask &in_RegMask(uint) const;
777 virtual const RegMask& out_RegMask() const { return RegMask::EMPTY; }
778 #ifndef PRODUCT
779 virtual const char *Name() const { return "NullCheck"; }
780 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
781 #endif
782 };
783
784 //------------------------------MachProjNode----------------------------------
785 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
786 // just MachNodes made by the Ideal world that replicate simple projections
787 // but with machine-dependent input & output register masks. Generally
788 // produced as part of calling conventions. Normally I make MachNodes as part
789 // of the Matcher process, but the Matcher is ill suited to issues involving
790 // frame handling, so frame handling is all done in the Ideal world with
791 // occasional callbacks to the machine model for important info.
792 class MachProjNode : public ProjNode {
793 public:
794 MachProjNode(Node* multi, uint con, const RegMask& out, uint ideal_reg)
795 : ProjNode(multi, con),
796 _rout(out, Compile::current()->comp_arena()),
797 _ideal_reg(ideal_reg) {
798 init_class_id(Class_MachProj);
799 }
800 RegMask _rout;
801 const uint _ideal_reg;
802 enum projType {
803 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
804 fat_proj = 999 // Projs killing many regs, defined by _rout
805 };
806 virtual int Opcode() const;
807 virtual const Type *bottom_type() const;
808 virtual const TypePtr *adr_type() const;
809 virtual const RegMask& in_RegMask(uint) const { return RegMask::EMPTY; }
810 virtual const RegMask &out_RegMask() const { return _rout; }
811 virtual uint ideal_reg() const { return _ideal_reg; }
812 // Need size_of() for virtual ProjNode::clone()
813 virtual uint size_of() const { return sizeof(MachProjNode); }
814 #ifndef PRODUCT
815 virtual void dump_spec(outputStream *st) const;
816 #endif
817 };
818
819 //------------------------------MachIfNode-------------------------------------
820 // Machine-specific versions of IfNodes
821 class MachIfNode : public MachBranchNode {
822 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
823 public:
824 float _prob; // Probability branch goes either way
825 float _fcnt; // Frequency counter
826 MachIfNode() : MachBranchNode() {
827 init_class_id(Class_MachIf);
828 }
829 // Negate conditional branches.
830 virtual void negate() = 0;
831 #ifndef PRODUCT
832 virtual void dump_spec(outputStream *st) const;
833 #endif
834 };
835
836 //------------------------------MachJumpNode-----------------------------------
837 // Machine-specific versions of JumpNodes
838 class MachJumpNode : public MachConstantNode {
839 public:
840 float* _probs;
841 MachJumpNode() : MachConstantNode() {
842 init_class_id(Class_MachJump);
843 }
844 virtual uint size_of() const { return sizeof(MachJumpNode); }
845 };
846
847 //------------------------------MachGotoNode-----------------------------------
848 // Machine-specific versions of GotoNodes
849 class MachGotoNode : public MachBranchNode {
850 public:
851 MachGotoNode() : MachBranchNode() {
852 init_class_id(Class_MachGoto);
853 }
854 };
855
856 //------------------------------MachFastLockNode-------------------------------------
857 // Machine-specific versions of FastLockNodes
858 class MachFastLockNode : public MachNode {
859 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
860 public:
861 MachFastLockNode() : MachNode() {}
862 };
863
864 //------------------------------MachReturnNode--------------------------------
865 // Machine-specific versions of subroutine returns
866 class MachReturnNode : public MachNode {
867 virtual uint size_of() const; // Size is bigger
868 public:
869 RegMask *_in_rms; // Input register masks, set during allocation
870 ReallocMark _nesting; // assertion check for reallocations
871 const TypePtr* _adr_type; // memory effects of call or return
872 MachReturnNode() : MachNode() {
873 init_class_id(Class_MachReturn);
874 _adr_type = TypePtr::BOTTOM; // the default: all of memory
875 }
876
877 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
878
879 virtual const RegMask &in_RegMask(uint) const;
880 virtual bool pinned() const { return true; };
881 virtual const TypePtr *adr_type() const;
882 };
883
884 //------------------------------MachSafePointNode-----------------------------
885 // Machine-specific versions of safepoints
886 class MachSafePointNode : public MachReturnNode {
887 public:
888 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
889 JVMState* _jvms; // Pointer to list of JVM State Objects
890 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
891 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
892 OopMap* oop_map() const { return _oop_map; }
893 void set_oop_map(OopMap* om) { _oop_map = om; }
894
895 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
896 init_class_id(Class_MachSafePoint);
897 }
898
899 virtual JVMState* jvms() const { return _jvms; }
900 void set_jvms(JVMState* s) {
901 _jvms = s;
902 }
903 virtual const Type *bottom_type() const;
904
905 virtual const RegMask &in_RegMask(uint) const;
906
907 // Functionality from old debug nodes
908 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
909 Node *frameptr () const { return in(TypeFunc::FramePtr); }
910
911 Node *local(const JVMState* jvms, uint idx) const {
912 assert(verify_jvms(jvms), "jvms must match");
913 return in(_jvmadj + jvms->locoff() + idx);
914 }
915 Node *stack(const JVMState* jvms, uint idx) const {
916 assert(verify_jvms(jvms), "jvms must match");
917 return in(_jvmadj + jvms->stkoff() + idx);
918 }
919 Node *monitor_obj(const JVMState* jvms, uint idx) const {
920 assert(verify_jvms(jvms), "jvms must match");
921 return in(_jvmadj + jvms->monitor_obj_offset(idx));
922 }
923 Node *monitor_box(const JVMState* jvms, uint idx) const {
924 assert(verify_jvms(jvms), "jvms must match");
925 return in(_jvmadj + jvms->monitor_box_offset(idx));
926 }
927 Node* scalarized_obj(const JVMState* jvms, uint idx) const {
928 assert(verify_jvms(jvms), "jvms must match");
929 return in(_jvmadj + jvms->scloff() + idx);
930 }
931 void set_local(const JVMState* jvms, uint idx, Node *c) {
932 assert(verify_jvms(jvms), "jvms must match");
933 set_req(_jvmadj + jvms->locoff() + idx, c);
934 }
935 void set_stack(const JVMState* jvms, uint idx, Node *c) {
936 assert(verify_jvms(jvms), "jvms must match");
937 set_req(_jvmadj + jvms->stkoff() + idx, c);
938 }
939 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
940 assert(verify_jvms(jvms), "jvms must match");
941 set_req(_jvmadj + jvms->monoff() + idx, c);
942 }
943 virtual uint size_of() const { return sizeof(MachSafePointNode); }
944 };
945
946 //------------------------------MachCallNode----------------------------------
947 // Machine-specific versions of subroutine calls
948 class MachCallNode : public MachSafePointNode {
949 protected:
950 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
951 virtual bool cmp( const Node &n ) const;
952 virtual uint size_of() const = 0; // Size is bigger
953 public:
954 const TypeFunc *_tf; // Function type
955 address _entry_point; // Address of the method being called
956 float _cnt; // Estimate of number of times called
957 bool _guaranteed_safepoint; // Do we need to observe safepoint?
958
959 const TypeFunc* tf() const { return _tf; }
960 address entry_point() const { return _entry_point; }
961 float cnt() const { return _cnt; }
962
963 void set_tf(const TypeFunc* tf) { _tf = tf; }
964 void set_entry_point(address p) { _entry_point = p; }
965 void set_cnt(float c) { _cnt = c; }
966 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
967
968 MachCallNode() : MachSafePointNode() {
969 init_class_id(Class_MachCall);
970 }
971
972 virtual const Type *bottom_type() const;
973 virtual bool pinned() const { return false; }
974 virtual const Type* Value(PhaseGVN* phase) const;
975 virtual const RegMask &in_RegMask(uint) const;
976 virtual int ret_addr_offset() { return 0; }
977
978 bool return_value_is_used() const;
979
980 // Similar to cousin class CallNode::returns_pointer
981 bool returns_pointer() const;
982 bool returns_scalarized() const;
983
984 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
985
986 #ifndef PRODUCT
987 virtual void dump_spec(outputStream *st) const;
988 #endif
989 };
990
991 //------------------------------MachCallJavaNode------------------------------
992 // "Base" class for machine-specific versions of subroutine calls
993 class MachCallJavaNode : public MachCallNode {
994 protected:
995 virtual bool cmp( const Node &n ) const;
996 virtual uint size_of() const; // Size is bigger
997 public:
998 ciMethod* _method; // Method being direct called
999 bool _override_symbolic_info; // Override symbolic call site info from bytecode
1000 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
1001 bool _arg_escape; // ArgEscape in parameter list
1002 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
1003 init_class_id(Class_MachCallJava);
1004 }
1005
1006 virtual const RegMask &in_RegMask(uint) const;
1007
1008 int resolved_method_index(C2_MacroAssembler *masm) const {
1009 if (_override_symbolic_info) {
1010 // Attach corresponding Method* to the call site, so VM can use it during resolution
1011 // instead of querying symbolic info from bytecode.
1012 assert(_method != nullptr, "method should be set");
1013 assert(_method->constant_encoding()->is_method(), "should point to a Method");
1014 return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
1015 }
1016 return 0; // Use symbolic info from bytecode (resolved_method is null).
1017 }
1018
1019 #ifndef PRODUCT
1020 virtual void dump_spec(outputStream *st) const;
1021 #endif
1022 };
1023
1024 //------------------------------MachCallStaticJavaNode------------------------
1025 // Machine-specific versions of monomorphic subroutine calls
1026 class MachCallStaticJavaNode : public MachCallJavaNode {
1027 virtual bool cmp( const Node &n ) const;
1028 virtual uint size_of() const; // Size is bigger
1029 public:
1030 const char *_name; // Runtime wrapper name
1031 MachCallStaticJavaNode() : MachCallJavaNode() {
1032 init_class_id(Class_MachCallStaticJava);
1033 }
1034
1035 // If this is an uncommon trap, return the request code, else zero.
1036 int uncommon_trap_request() const;
1037
1038 virtual int ret_addr_offset();
1039 #ifndef PRODUCT
1040 virtual void dump_spec(outputStream *st) const;
1041 void dump_trap_args(outputStream *st) const;
1042 #endif
1043 };
1044
1045 //------------------------------MachCallDynamicJavaNode------------------------
1046 // Machine-specific versions of possibly megamorphic subroutine calls
1047 class MachCallDynamicJavaNode : public MachCallJavaNode {
1048 public:
1049 int _vtable_index;
1050 MachCallDynamicJavaNode() : MachCallJavaNode() {
1051 init_class_id(Class_MachCallDynamicJava);
1052 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
1053 }
1054 virtual int ret_addr_offset();
1055 #ifndef PRODUCT
1056 virtual void dump_spec(outputStream *st) const;
1057 #endif
1058 virtual uint size_of() const { return sizeof(MachCallDynamicJavaNode); }
1059 };
1060
1061 //------------------------------MachCallRuntimeNode----------------------------
1062 // Machine-specific versions of subroutine calls
1063 class MachCallRuntimeNode : public MachCallNode {
1064 virtual bool cmp( const Node &n ) const;
1065 virtual uint size_of() const; // Size is bigger
1066 public:
1067 const char *_name; // Printable name, if _method is null
1068 bool _leaf_no_fp; // Is this CallLeafNoFP?
1069 MachCallRuntimeNode() : MachCallNode() {
1070 init_class_id(Class_MachCallRuntime);
1071 }
1072 virtual int ret_addr_offset();
1073 #ifndef PRODUCT
1074 virtual void dump_spec(outputStream *st) const;
1075 #endif
1076 };
1077
1078 class MachCallLeafNode: public MachCallRuntimeNode {
1079 public:
1080 MachCallLeafNode() : MachCallRuntimeNode() {
1081 init_class_id(Class_MachCallLeaf);
1082 }
1083 };
1084
1085 //------------------------------MachHaltNode-----------------------------------
1086 // Machine-specific versions of halt nodes
1087 class MachHaltNode : public MachReturnNode {
1088 public:
1089 bool _reachable;
1090 const char* _halt_reason;
1091 virtual JVMState* jvms() const;
1092 virtual uint size_of() const { return sizeof(MachHaltNode); }
1093 bool is_reachable() const {
1094 return _reachable;
1095 }
1096 };
1097
1098 class MachMemBarNode : public MachNode {
1099 virtual uint size_of() const; // Size is bigger
1100 public:
1101 const TypePtr* _adr_type; // memory effects
1102 MachMemBarNode() : MachNode() {
1103 init_class_id(Class_MachMemBar);
1104 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1105 }
1106
1107 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1108 virtual const TypePtr *adr_type() const;
1109 };
1110
1111
1112 //------------------------------MachTempNode-----------------------------------
1113 // Node used by the adlc to construct inputs to represent temporary registers
1114 class MachTempNode : public MachNode {
1115 private:
1116 MachOper *_opnd_array[1];
1117
1118 public:
1119 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1120 virtual uint rule() const { return 9999999; }
1121 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1122
1123 MachTempNode(MachOper* oper) {
1124 init_class_id(Class_MachTemp);
1125 _num_opnds = 1;
1126 _opnds = _opnd_array;
1127 add_req(nullptr);
1128 _opnds[0] = oper;
1129 }
1130 virtual uint size_of() const { return sizeof(MachTempNode); }
1131
1132 #ifndef PRODUCT
1133 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1134 virtual const char *Name() const { return "MachTemp";}
1135 #endif
1136 };
1137
1138
1139
1140 //------------------------------labelOper--------------------------------------
1141 // Machine-independent version of label operand
1142 class labelOper : public MachOper {
1143 private:
1144 virtual uint num_edges() const { return 0; }
1145 public:
1146 // Supported for fixed size branches
1147 Label* _label; // Label for branch(es)
1148
1149 uint _block_num;
1150
1151 labelOper() : _label(nullptr), _block_num(0) {}
1152
1153 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1154
1155 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1156
1157 virtual MachOper *clone() const;
1158
1159 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1160
1161 virtual uint opcode() const;
1162
1163 virtual uint hash() const;
1164 virtual bool cmp( const MachOper &oper ) const;
1165 #ifndef PRODUCT
1166 virtual const char *Name() const { return "Label";}
1167
1168 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1169 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1170 #endif
1171 };
1172
1173
1174 //------------------------------methodOper--------------------------------------
1175 // Machine-independent version of method operand
1176 class methodOper : public MachOper {
1177 private:
1178 virtual uint num_edges() const { return 0; }
1179 public:
1180 intptr_t _method; // Address of method
1181 methodOper() : _method(0) {}
1182 methodOper(intptr_t method) : _method(method) {}
1183
1184 virtual MachOper *clone() const;
1185
1186 virtual intptr_t method() const { return _method; }
1187
1188 virtual uint opcode() const;
1189
1190 virtual uint hash() const;
1191 virtual bool cmp( const MachOper &oper ) const;
1192 #ifndef PRODUCT
1193 virtual const char *Name() const { return "Method";}
1194
1195 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1196 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1197 #endif
1198 };
1199
1200 #endif // SHARE_OPTO_MACHNODE_HPP