1 /*
   2  * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_OPTO_MACHNODE_HPP
  26 #define SHARE_OPTO_MACHNODE_HPP
  27 
  28 #include "opto/callnode.hpp"
  29 #include "opto/constantTable.hpp"
  30 #include "opto/matcher.hpp"
  31 #include "opto/multnode.hpp"
  32 #include "opto/node.hpp"
  33 #include "opto/regmask.hpp"
  34 #include "utilities/growableArray.hpp"
  35 
  36 class BufferBlob;
  37 class CodeBuffer;
  38 class JVMState;
  39 class MachCallDynamicJavaNode;
  40 class MachCallJavaNode;
  41 class MachCallLeafNode;
  42 class MachCallNativeNode;
  43 class MachCallNode;
  44 class MachCallRuntimeNode;
  45 class MachCallStaticJavaNode;
  46 class MachEpilogNode;
  47 class MachIfNode;
  48 class MachNullCheckNode;
  49 class MachOper;
  50 class MachProjNode;
  51 class MachPrologNode;
  52 class MachReturnNode;
  53 class MachSafePointNode;
  54 class MachSpillCopyNode;
  55 class MachVEPNode;
  56 class Matcher;
  57 class PhaseRegAlloc;
  58 class RegMask;
  59 class RTMLockingCounters;
  60 class State;
  61 
  62 //---------------------------MachOper------------------------------------------
  63 class MachOper : public ResourceObj {
  64 public:
  65   // Allocate right next to the MachNodes in the same arena
  66   void *operator new(size_t x) throw() {
  67     Compile* C = Compile::current();
  68     return C->node_arena()->AmallocWords(x);
  69   }
  70 
  71   // Opcode
  72   virtual uint opcode() const = 0;
  73 
  74   // Number of input edges.
  75   // Generally at least 1
  76   virtual uint num_edges() const { return 1; }
  77   // Array of Register masks
  78   virtual const RegMask *in_RegMask(int index) const;
  79 
  80   // Methods to output the encoding of the operand
  81 
  82   // Negate conditional branches.  Error for non-branch Nodes
  83   virtual void negate();
  84 
  85   // Return the value requested
  86   // result register lookup, corresponding to int_format
  87   virtual int  reg(PhaseRegAlloc *ra_, const Node *node)   const;
  88   // input register lookup, corresponding to ext_format
  89   virtual int  reg(PhaseRegAlloc *ra_, const Node *node, int idx)   const;
  90 
  91   // helpers for MacroAssembler generation from ADLC
  92   Register  as_Register(PhaseRegAlloc *ra_, const Node *node)   const {
  93     return ::as_Register(reg(ra_, node));
  94   }
  95   Register  as_Register(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
  96     return ::as_Register(reg(ra_, node, idx));
  97   }
  98   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node)   const {
  99     return ::as_FloatRegister(reg(ra_, node));
 100   }
 101   FloatRegister  as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 102     return ::as_FloatRegister(reg(ra_, node, idx));
 103   }
 104 
 105 #if defined(IA32) || defined(AMD64)
 106   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 107     return ::as_KRegister(reg(ra_, node));
 108   }
 109   KRegister  as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 110     return ::as_KRegister(reg(ra_, node, idx));
 111   }
 112   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node)   const {
 113     return ::as_XMMRegister(reg(ra_, node));
 114   }
 115   XMMRegister  as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx)   const {
 116     return ::as_XMMRegister(reg(ra_, node, idx));
 117   }
 118 #endif
 119   // CondRegister reg converter
 120 #if defined(PPC64)
 121   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
 122     return ::as_ConditionRegister(reg(ra_, node));
 123   }
 124   ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 125     return ::as_ConditionRegister(reg(ra_, node, idx));
 126   }
 127   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
 128     return ::as_VectorRegister(reg(ra_, node));
 129   }
 130   VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 131     return ::as_VectorRegister(reg(ra_, node, idx));
 132   }
 133   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
 134     return ::as_VectorSRegister(reg(ra_, node));
 135   }
 136   VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
 137     return ::as_VectorSRegister(reg(ra_, node, idx));
 138   }
 139 #endif
 140 
 141   virtual intptr_t  constant() const;
 142   virtual relocInfo::relocType constant_reloc() const;
 143   virtual jdouble constantD() const;
 144   virtual jfloat  constantF() const;
 145   virtual jlong   constantL() const;
 146   virtual TypeOopPtr *oop() const;
 147   virtual int  ccode() const;
 148   // A zero, default, indicates this value is not needed.
 149   // May need to lookup the base register, as done in int_ and ext_format
 150   virtual int  base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 151   virtual int  index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
 152   virtual int  scale() const;
 153   // Parameters needed to support MEMORY_INTERFACE access to stackSlot
 154   virtual int  disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
 155   // Check for PC-Relative displacement
 156   virtual relocInfo::relocType disp_reloc() const;
 157   virtual int  constant_disp() const;   // usu. 0, may return Type::OffsetBot
 158   virtual int  base_position()  const;  // base edge position, or -1
 159   virtual int  index_position() const;  // index edge position, or -1
 160 
 161   // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
 162   // Only returns non-null value for x86_32.ad's indOffset32X
 163   virtual const TypePtr *disp_as_type() const { return NULL; }
 164 
 165   // Return the label
 166   virtual Label *label() const;
 167 
 168   // Return the method's address
 169   virtual intptr_t  method() const;
 170 
 171   // Hash and compare over operands are currently identical
 172   virtual uint  hash() const;
 173   virtual bool  cmp( const MachOper &oper ) const;
 174 
 175   // Virtual clone, since I do not know how big the MachOper is.
 176   virtual MachOper *clone() const = 0;
 177 
 178   // Return ideal Type from simple operands.  Fail for complex operands.
 179   virtual const Type *type() const;
 180 
 181   // Set an integer offset if we have one, or error otherwise
 182   virtual void set_con( jint c0 ) { ShouldNotReachHere();  }
 183 
 184 #ifndef PRODUCT
 185   // Return name of operand
 186   virtual const char    *Name() const { return "???";}
 187 
 188   // Methods to output the text version of the operand
 189   virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
 190   virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
 191 
 192   virtual void dump_spec(outputStream *st) const; // Print per-operand info
 193 
 194   // Check whether o is a valid oper.
 195   static bool notAnOper(const MachOper *o) {
 196     if (o == NULL)                   return true;
 197     if (((intptr_t)o & 1) != 0)      return true;
 198     if (*(address*)o == badAddress)  return true;  // kill by Node::destruct
 199     return false;
 200   }
 201 #endif // !PRODUCT
 202 };
 203 
 204 //------------------------------MachNode---------------------------------------
 205 // Base type for all machine specific nodes.  All node classes generated by the
 206 // ADLC inherit from this class.
 207 class MachNode : public Node {
 208 public:
 209   MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(NULL) {
 210     init_class_id(Class_Mach);
 211   }
 212   // Required boilerplate
 213   virtual uint size_of() const { return sizeof(MachNode); }
 214   virtual int  Opcode() const;          // Always equal to MachNode
 215   virtual uint rule() const = 0;        // Machine-specific opcode
 216   // Number of inputs which come before the first operand.
 217   // Generally at least 1, to skip the Control input
 218   virtual uint oper_input_base() const { return 1; }
 219   // Position of constant base node in node's inputs. -1 if
 220   // no constant base node input.
 221   virtual uint mach_constant_base_node_input() const { return (uint)-1; }
 222 
 223   uint8_t barrier_data() const { return _barrier; }
 224   void set_barrier_data(uint8_t data) { _barrier = data; }
 225 
 226   // Copy inputs and operands to new node of instruction.
 227   // Called from cisc_version() and short_branch_version().
 228   // !!!! The method's body is defined in ad_<arch>.cpp file.
 229   void fill_new_machnode(MachNode *n) const;
 230 
 231   // Return an equivalent instruction using memory for cisc_operand position
 232   virtual MachNode *cisc_version(int offset);
 233   // Modify this instruction's register mask to use stack version for cisc_operand
 234   virtual void use_cisc_RegMask();
 235 
 236   // Support for short branches
 237   bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
 238 
 239   // Avoid back to back some instructions on some CPUs.
 240   enum AvoidBackToBackFlag { AVOID_NONE = 0,
 241                              AVOID_BEFORE = Flag_avoid_back_to_back_before,
 242                              AVOID_AFTER = Flag_avoid_back_to_back_after,
 243                              AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
 244 
 245   bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
 246     return (flags() & flag_value) == flag_value;
 247   }
 248 
 249   // instruction implemented with a call
 250   bool has_call() const { return (flags() & Flag_has_call) != 0; }
 251 
 252   // First index in _in[] corresponding to operand, or -1 if there is none
 253   int  operand_index(uint operand) const;
 254   int  operand_index(const MachOper *oper) const;
 255   int  operand_index(Node* m) const;
 256 
 257   // Register class input is expected in
 258   virtual const RegMask &in_RegMask(uint) const;
 259 
 260   // cisc-spillable instructions redefine for use by in_RegMask
 261   virtual const RegMask *cisc_RegMask() const { return NULL; }
 262 
 263   // If this instruction is a 2-address instruction, then return the
 264   // index of the input which must match the output.  Not nessecary
 265   // for instructions which bind the input and output register to the
 266   // same singleton regiser (e.g., Intel IDIV which binds AX to be
 267   // both an input and an output).  It is nessecary when the input and
 268   // output have choices - but they must use the same choice.
 269   virtual uint two_adr( ) const { return 0; }
 270 
 271   // The GC might require some barrier metadata for machine code emission.
 272   uint8_t _barrier;
 273 
 274   // Array of complex operand pointers.  Each corresponds to zero or
 275   // more leafs.  Must be set by MachNode constructor to point to an
 276   // internal array of MachOpers.  The MachOper array is sized by
 277   // specific MachNodes described in the ADL.
 278   uint16_t _num_opnds;
 279   MachOper **_opnds;
 280   uint16_t num_opnds() const { return _num_opnds; }
 281 
 282   // Emit bytes into cbuf
 283   virtual void  emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 284   // Expand node after register allocation.
 285   // Node is replaced by several nodes in the postalloc expand phase.
 286   // Corresponding methods are generated for nodes if they specify
 287   // postalloc_expand. See block.cpp for more documentation.
 288   virtual bool requires_postalloc_expand() const { return false; }
 289   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 290   // Size of instruction in bytes
 291   virtual uint  size(PhaseRegAlloc *ra_) const;
 292   // Helper function that computes size by emitting code
 293   virtual uint  emit_size(PhaseRegAlloc *ra_) const;
 294 
 295   // Return the alignment required (in units of relocInfo::addr_unit())
 296   // for this instruction (must be a power of 2)
 297   int           pd_alignment_required() const;
 298   virtual int   alignment_required() const { return pd_alignment_required(); }
 299 
 300   // Return the padding (in bytes) to be emitted before this
 301   // instruction to properly align it.
 302   virtual int   compute_padding(int current_offset) const;
 303 
 304   // Return number of relocatable values contained in this instruction
 305   virtual int   reloc() const { return 0; }
 306 
 307   // Return number of words used for double constants in this instruction
 308   virtual int   ins_num_consts() const { return 0; }
 309 
 310   // Hash and compare over operands.  Used to do GVN on machine Nodes.
 311   virtual uint  hash() const;
 312   virtual bool  cmp( const Node &n ) const;
 313 
 314   // Expand method for MachNode, replaces nodes representing pseudo
 315   // instructions with a set of nodes which represent real machine
 316   // instructions and compute the same value.
 317   virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
 318 
 319   // Bottom_type call; value comes from operand0
 320   virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
 321   virtual uint ideal_reg() const {
 322     const Type *t = _opnds[0]->type();
 323     if (t == TypeInt::CC) {
 324       return Op_RegFlags;
 325     } else {
 326       return t->ideal_reg();
 327     }
 328   }
 329 
 330   // If this is a memory op, return the base pointer and fixed offset.
 331   // If there are no such, return NULL.  If there are multiple addresses
 332   // or the address is indeterminate (rare cases) then return (Node*)-1,
 333   // which serves as node bottom.
 334   // If the offset is not statically determined, set it to Type::OffsetBot.
 335   // This method is free to ignore stack slots if that helps.
 336   #define TYPE_PTR_SENTINAL  ((const TypePtr*)-1)
 337   // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
 338   const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
 339 
 340   // Helper for get_base_and_disp: find the base and index input nodes.
 341   // Returns the MachOper as determined by memory_operand(), for use, if
 342   // needed by the caller. If (MachOper *)-1 is returned, base and index
 343   // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
 344   // index are set to NULL.
 345   const MachOper* memory_inputs(Node* &base, Node* &index) const;
 346 
 347   // Helper for memory_inputs:  Which operand carries the necessary info?
 348   // By default, returns NULL, which means there is no such operand.
 349   // If it returns (MachOper*)-1, this means there are multiple memories.
 350   virtual const MachOper* memory_operand() const { return NULL; }
 351 
 352   // Call "get_base_and_disp" to decide which category of memory is used here.
 353   virtual const class TypePtr *adr_type() const;
 354 
 355   // Apply peephole rule(s) to this instruction
 356   virtual MachNode *peephole(Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted);
 357 
 358   // Top-level ideal Opcode matched
 359   virtual int ideal_Opcode()     const { return Op_Node; }
 360 
 361   // Adds the label for the case
 362   virtual void add_case_label( int switch_val, Label* blockLabel);
 363 
 364   // Set the absolute address for methods
 365   virtual void method_set( intptr_t addr );
 366 
 367   // Should we clone rather than spill this instruction?
 368   bool rematerialize() const;
 369 
 370   // Get the pipeline info
 371   static const Pipeline *pipeline_class();
 372   virtual const Pipeline *pipeline() const;
 373 
 374   // Returns true if this node is a check that can be implemented with a trap.
 375   virtual bool is_TrapBasedCheckNode() const { return false; }
 376   void set_removed() { add_flag(Flag_is_removed_by_peephole); }
 377   bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
 378 
 379 #ifndef PRODUCT
 380   virtual const char *Name() const = 0; // Machine-specific name
 381   virtual void dump_spec(outputStream *st) const; // Print per-node info
 382   void         dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
 383 #endif
 384 };
 385 
 386 //------------------------------MachIdealNode----------------------------
 387 // Machine specific versions of nodes that must be defined by user.
 388 // These are not converted by matcher from ideal nodes to machine nodes
 389 // but are inserted into the code by the compiler.
 390 class MachIdealNode : public MachNode {
 391 public:
 392   MachIdealNode( ) {}
 393 
 394   // Define the following defaults for non-matched machine nodes
 395   virtual uint oper_input_base() const { return 0; }
 396   virtual uint rule()            const { return 9999999; }
 397   virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
 398 };
 399 
 400 //------------------------------MachTypeNode----------------------------
 401 // Machine Nodes that need to retain a known Type.
 402 class MachTypeNode : public MachNode {
 403   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 404 public:
 405   MachTypeNode( ) {}
 406   const Type *_bottom_type;
 407 
 408   virtual const class Type *bottom_type() const { return _bottom_type; }
 409 #ifndef PRODUCT
 410   virtual void dump_spec(outputStream *st) const;
 411 #endif
 412 };
 413 
 414 //------------------------------MachBreakpointNode----------------------------
 415 // Machine breakpoint or interrupt Node
 416 class MachBreakpointNode : public MachIdealNode {
 417 public:
 418   MachBreakpointNode( ) {}
 419   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 420   virtual uint size(PhaseRegAlloc *ra_) const;
 421 
 422 #ifndef PRODUCT
 423   virtual const char *Name() const { return "Breakpoint"; }
 424   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 425 #endif
 426 };
 427 
 428 //------------------------------MachConstantBaseNode--------------------------
 429 // Machine node that represents the base address of the constant table.
 430 class MachConstantBaseNode : public MachIdealNode {
 431 public:
 432   static const RegMask& _out_RegMask;  // We need the out_RegMask statically in MachConstantNode::in_RegMask().
 433 
 434 public:
 435   MachConstantBaseNode() : MachIdealNode() {
 436     init_class_id(Class_MachConstantBase);
 437   }
 438   virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
 439   virtual uint ideal_reg() const { return Op_RegP; }
 440   virtual uint oper_input_base() const { return 1; }
 441 
 442   virtual bool requires_postalloc_expand() const;
 443   virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
 444 
 445   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 446   virtual uint size(PhaseRegAlloc* ra_) const;
 447 
 448   static const RegMask& static_out_RegMask() { return _out_RegMask; }
 449   virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
 450 
 451 #ifndef PRODUCT
 452   virtual const char* Name() const { return "MachConstantBaseNode"; }
 453   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 454 #endif
 455 };
 456 
 457 //------------------------------MachConstantNode-------------------------------
 458 // Machine node that holds a constant which is stored in the constant table.
 459 class MachConstantNode : public MachTypeNode {
 460 protected:
 461   ConstantTable::Constant _constant;  // This node's constant.
 462 
 463 public:
 464   MachConstantNode() : MachTypeNode() {
 465     init_class_id(Class_MachConstant);
 466   }
 467 
 468   virtual void eval_constant(Compile* C) {
 469 #ifdef ASSERT
 470     tty->print("missing MachConstantNode eval_constant function: ");
 471     dump();
 472 #endif
 473     ShouldNotCallThis();
 474   }
 475 
 476   virtual const RegMask &in_RegMask(uint idx) const {
 477     if (idx == mach_constant_base_node_input())
 478       return MachConstantBaseNode::static_out_RegMask();
 479     return MachNode::in_RegMask(idx);
 480   }
 481 
 482   // Input edge of MachConstantBaseNode.
 483   virtual uint mach_constant_base_node_input() const { return req() - 1; }
 484 
 485   int  constant_offset();
 486   int  constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
 487   // Unchecked version to avoid assertions in debug output.
 488   int  constant_offset_unchecked() const;
 489 };
 490 
 491 //------------------------------MachVEPNode-----------------------------------
 492 // Machine Inline Type Entry Point Node
 493 class MachVEPNode : public MachIdealNode {
 494 public:
 495   Label* _verified_entry;
 496 
 497   MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
 498     _verified_entry(verified_entry),
 499     _verified(verified),
 500     _receiver_only(receiver_only) {
 501     init_class_id(Class_MachVEP);
 502   }
 503   virtual bool cmp(const Node &n) const {
 504     return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
 505            (_verified == ((MachVEPNode&)n)._verified) &&
 506            (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
 507            MachIdealNode::cmp(n);
 508   }
 509   virtual uint size_of() const { return sizeof(*this); }
 510   virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
 511 
 512 #ifndef PRODUCT
 513   virtual const char* Name() const { return "InlineType Entry-Point"; }
 514   virtual void format(PhaseRegAlloc*, outputStream* st) const;
 515 #endif
 516 private:
 517   bool   _verified;
 518   bool   _receiver_only;
 519 };
 520 
 521 //------------------------------MachUEPNode-----------------------------------
 522 // Machine Unvalidated Entry Point Node
 523 class MachUEPNode : public MachIdealNode {
 524 public:
 525   MachUEPNode( ) {}
 526   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 527 
 528 #ifndef PRODUCT
 529   virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
 530   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 531 #endif
 532 };
 533 
 534 //------------------------------MachPrologNode--------------------------------
 535 // Machine function Prolog Node
 536 class MachPrologNode : public MachIdealNode {
 537 public:
 538   Label* _verified_entry;
 539 
 540   MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
 541     init_class_id(Class_MachProlog);
 542   }
 543   virtual bool cmp(const Node &n) const {
 544     return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
 545   }
 546   virtual uint size_of() const { return sizeof(*this); }
 547   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 548   virtual int reloc() const;
 549 
 550 #ifndef PRODUCT
 551   virtual const char *Name() const { return "Prolog"; }
 552   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 553 #endif
 554 };
 555 
 556 //------------------------------MachEpilogNode--------------------------------
 557 // Machine function Epilog Node
 558 class MachEpilogNode : public MachIdealNode {
 559 public:
 560   MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
 561   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 562   virtual int reloc() const;
 563   virtual const Pipeline *pipeline() const;
 564 
 565 private:
 566   bool _do_polling;
 567 
 568 public:
 569   bool do_polling() const { return _do_polling; }
 570 
 571 #ifndef PRODUCT
 572   virtual const char *Name() const { return "Epilog"; }
 573   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 574 #endif
 575 };
 576 
 577 //------------------------------MachNopNode-----------------------------------
 578 // Machine function Nop Node
 579 class MachNopNode : public MachIdealNode {
 580 private:
 581   int _count;
 582 public:
 583   MachNopNode( ) : _count(1) {}
 584   MachNopNode( int count ) : _count(count) {}
 585   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 586   virtual uint size(PhaseRegAlloc *ra_) const;
 587 
 588   virtual const class Type *bottom_type() const { return Type::CONTROL; }
 589 
 590   virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
 591   virtual const Pipeline *pipeline() const;
 592 #ifndef PRODUCT
 593   virtual const char *Name() const { return "Nop"; }
 594   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 595   virtual void dump_spec(outputStream *st) const { } // No per-operand info
 596 #endif
 597 };
 598 
 599 //------------------------------MachSpillCopyNode------------------------------
 600 // Machine SpillCopy Node.  Copies 1 or 2 words from any location to any
 601 // location (stack or register).
 602 class MachSpillCopyNode : public MachIdealNode {
 603 public:
 604   enum SpillType {
 605     TwoAddress,                        // Inserted when coalescing of a two-address-instruction node and its input fails
 606     PhiInput,                          // Inserted when coalescing of a phi node and its input fails
 607     DebugUse,                          // Inserted as debug info spills to safepoints in non-frequent blocks
 608     LoopPhiInput,                      // Pre-split compares of loop-phis
 609     Definition,                        // An lrg marked as spilled will be spilled to memory right after its definition,
 610                                        // if in high pressure region or the lrg is bound
 611     RegToReg,                          // A register to register move
 612     RegToMem,                          // A register to memory move
 613     MemToReg,                          // A memory to register move
 614     PhiLocationDifferToInputLocation,  // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
 615                                        // the phi and its input resides at different locations (i.e. reg or mem)
 616     BasePointerToMem,                  // Spill base pointer to memory at safepoint
 617     InputToRematerialization,          // When rematerializing a node we stretch the inputs live ranges, and they might be
 618                                        // stretched beyond a new definition point, therefore we split out new copies instead
 619     CallUse,                           // Spill use at a call
 620     Bound                              // An lrg marked as spill that is bound and needs to be spilled at a use
 621   };
 622 private:
 623   const RegMask *_in;           // RegMask for input
 624   const RegMask *_out;          // RegMask for output
 625   const Type *_type;
 626   const SpillType _spill_type;
 627 public:
 628   MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
 629     MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
 630     init_class_id(Class_MachSpillCopy);
 631     init_flags(Flag_is_Copy);
 632     add_req(NULL);
 633     add_req(n);
 634   }
 635   virtual uint size_of() const { return sizeof(*this); }
 636   void set_out_RegMask(const RegMask &out) { _out = &out; }
 637   void set_in_RegMask(const RegMask &in) { _in = &in; }
 638   virtual const RegMask &out_RegMask() const { return *_out; }
 639   virtual const RegMask &in_RegMask(uint) const { return *_in; }
 640   virtual const class Type *bottom_type() const { return _type; }
 641   virtual uint ideal_reg() const { return _type->ideal_reg(); }
 642   virtual uint oper_input_base() const { return 1; }
 643   uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
 644 
 645   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 646   virtual uint size(PhaseRegAlloc *ra_) const;
 647 
 648 
 649 #ifndef PRODUCT
 650   static const char *spill_type(SpillType st) {
 651     switch (st) {
 652       case TwoAddress:
 653         return "TwoAddressSpillCopy";
 654       case PhiInput:
 655         return "PhiInputSpillCopy";
 656       case DebugUse:
 657         return "DebugUseSpillCopy";
 658       case LoopPhiInput:
 659         return "LoopPhiInputSpillCopy";
 660       case Definition:
 661         return "DefinitionSpillCopy";
 662       case RegToReg:
 663         return "RegToRegSpillCopy";
 664       case RegToMem:
 665         return "RegToMemSpillCopy";
 666       case MemToReg:
 667         return "MemToRegSpillCopy";
 668       case PhiLocationDifferToInputLocation:
 669         return "PhiLocationDifferToInputLocationSpillCopy";
 670       case BasePointerToMem:
 671         return "BasePointerToMemSpillCopy";
 672       case InputToRematerialization:
 673         return "InputToRematerializationSpillCopy";
 674       case CallUse:
 675         return "CallUseSpillCopy";
 676       case Bound:
 677         return "BoundSpillCopy";
 678       default:
 679         assert(false, "Must have valid spill type");
 680         return "MachSpillCopy";
 681     }
 682   }
 683 
 684   virtual const char *Name() const {
 685     return spill_type(_spill_type);
 686   }
 687 
 688   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 689 #endif
 690 };
 691 
 692 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
 693 // however it doesn't have a control input and is more like a MergeMem.
 694 // It is inserted after the register allocation is done to ensure that nodes use single
 695 // definition of a multidef lrg in a block.
 696 class MachMergeNode : public MachIdealNode {
 697 public:
 698   MachMergeNode(Node *n1) {
 699     init_class_id(Class_MachMerge);
 700     add_req(NULL);
 701     add_req(n1);
 702   }
 703   virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
 704   virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
 705   virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
 706   virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
 707   virtual uint oper_input_base() const { return 1; }
 708   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const { }
 709   virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
 710 #ifndef PRODUCT
 711   virtual const char *Name() const { return "MachMerge"; }
 712 #endif
 713 };
 714 
 715 //------------------------------MachBranchNode--------------------------------
 716 // Abstract machine branch Node
 717 class MachBranchNode : public MachIdealNode {
 718 public:
 719   MachBranchNode() : MachIdealNode() {
 720     init_class_id(Class_MachBranch);
 721   }
 722   virtual void label_set(Label* label, uint block_num) = 0;
 723   virtual void save_label(Label** label, uint* block_num) = 0;
 724 
 725   // Support for short branches
 726   virtual MachNode *short_branch_version() { return NULL; }
 727 
 728   virtual bool pinned() const { return true; };
 729 };
 730 
 731 //------------------------------MachNullChkNode--------------------------------
 732 // Machine-dependent null-pointer-check Node.  Points a real MachNode that is
 733 // also some kind of memory op.  Turns the indicated MachNode into a
 734 // conditional branch with good latency on the ptr-not-null path and awful
 735 // latency on the pointer-is-null path.
 736 
 737 class MachNullCheckNode : public MachBranchNode {
 738 public:
 739   const uint _vidx;             // Index of memop being tested
 740   MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
 741     init_class_id(Class_MachNullCheck);
 742     add_req(ctrl);
 743     add_req(memop);
 744   }
 745   virtual int Opcode() const;
 746   virtual uint size_of() const { return sizeof(*this); }
 747 
 748   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
 749   virtual void label_set(Label* label, uint block_num);
 750   virtual void save_label(Label** label, uint* block_num);
 751   virtual void negate() { }
 752   virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
 753   virtual uint ideal_reg() const { return NotAMachineReg; }
 754   virtual const RegMask &in_RegMask(uint) const;
 755   virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
 756 #ifndef PRODUCT
 757   virtual const char *Name() const { return "NullCheck"; }
 758   virtual void format( PhaseRegAlloc *, outputStream *st ) const;
 759 #endif
 760 };
 761 
 762 //------------------------------MachProjNode----------------------------------
 763 // Machine-dependent Ideal projections (how is that for an oxymoron).  Really
 764 // just MachNodes made by the Ideal world that replicate simple projections
 765 // but with machine-dependent input & output register masks.  Generally
 766 // produced as part of calling conventions.  Normally I make MachNodes as part
 767 // of the Matcher process, but the Matcher is ill suited to issues involving
 768 // frame handling, so frame handling is all done in the Ideal world with
 769 // occasional callbacks to the machine model for important info.
 770 class MachProjNode : public ProjNode {
 771 public:
 772   MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
 773     init_class_id(Class_MachProj);
 774   }
 775   RegMask _rout;
 776   const uint  _ideal_reg;
 777   enum projType {
 778     unmatched_proj = 0,         // Projs for Control, I/O, memory not matched
 779     fat_proj       = 999        // Projs killing many regs, defined by _rout
 780   };
 781   virtual int   Opcode() const;
 782   virtual const Type *bottom_type() const;
 783   virtual const TypePtr *adr_type() const;
 784   virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
 785   virtual const RegMask &out_RegMask() const { return _rout; }
 786   virtual uint  ideal_reg() const { return _ideal_reg; }
 787   // Need size_of() for virtual ProjNode::clone()
 788   virtual uint  size_of() const { return sizeof(MachProjNode); }
 789 #ifndef PRODUCT
 790   virtual void dump_spec(outputStream *st) const;
 791 #endif
 792 };
 793 
 794 //------------------------------MachIfNode-------------------------------------
 795 // Machine-specific versions of IfNodes
 796 class MachIfNode : public MachBranchNode {
 797   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 798 public:
 799   float _prob;                  // Probability branch goes either way
 800   float _fcnt;                  // Frequency counter
 801   MachIfNode() : MachBranchNode() {
 802     init_class_id(Class_MachIf);
 803   }
 804   // Negate conditional branches.
 805   virtual void negate() = 0;
 806 #ifndef PRODUCT
 807   virtual void dump_spec(outputStream *st) const;
 808 #endif
 809 };
 810 
 811 //------------------------------MachJumpNode-----------------------------------
 812 // Machine-specific versions of JumpNodes
 813 class MachJumpNode : public MachConstantNode {
 814 public:
 815   float* _probs;
 816   MachJumpNode() : MachConstantNode() {
 817     init_class_id(Class_MachJump);
 818   }
 819 };
 820 
 821 //------------------------------MachGotoNode-----------------------------------
 822 // Machine-specific versions of GotoNodes
 823 class MachGotoNode : public MachBranchNode {
 824 public:
 825   MachGotoNode() : MachBranchNode() {
 826     init_class_id(Class_MachGoto);
 827   }
 828 };
 829 
 830 //------------------------------MachFastLockNode-------------------------------------
 831 // Machine-specific versions of FastLockNodes
 832 class MachFastLockNode : public MachNode {
 833   virtual uint size_of() const { return sizeof(*this); } // Size is bigger
 834 public:
 835   RTMLockingCounters*       _rtm_counters; // RTM lock counters for inflated locks
 836   RTMLockingCounters* _stack_rtm_counters; // RTM lock counters for stack locks
 837   MachFastLockNode() : MachNode() {}
 838 };
 839 
 840 //------------------------------MachReturnNode--------------------------------
 841 // Machine-specific versions of subroutine returns
 842 class MachReturnNode : public MachNode {
 843   virtual uint size_of() const; // Size is bigger
 844 public:
 845   RegMask *_in_rms;             // Input register masks, set during allocation
 846   ReallocMark _nesting;         // assertion check for reallocations
 847   const TypePtr* _adr_type;     // memory effects of call or return
 848   MachReturnNode() : MachNode() {
 849     init_class_id(Class_MachReturn);
 850     _adr_type = TypePtr::BOTTOM; // the default: all of memory
 851   }
 852 
 853   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
 854 
 855   virtual const RegMask &in_RegMask(uint) const;
 856   virtual bool pinned() const { return true; };
 857   virtual const TypePtr *adr_type() const;
 858 };
 859 
 860 //------------------------------MachSafePointNode-----------------------------
 861 // Machine-specific versions of safepoints
 862 class MachSafePointNode : public MachReturnNode {
 863 public:
 864   OopMap*         _oop_map;     // Array of OopMap info (8-bit char) for GC
 865   JVMState*       _jvms;        // Pointer to list of JVM State Objects
 866   uint            _jvmadj;      // Extra delta to jvms indexes (mach. args)
 867   bool            _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
 868   OopMap*         oop_map() const { return _oop_map; }
 869   void            set_oop_map(OopMap* om) { _oop_map = om; }
 870 
 871   MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0), _has_ea_local_in_scope(false) {
 872     init_class_id(Class_MachSafePoint);
 873   }
 874 
 875   virtual JVMState* jvms() const { return _jvms; }
 876   void set_jvms(JVMState* s) {
 877     _jvms = s;
 878   }
 879   virtual const Type    *bottom_type() const;
 880 
 881   virtual const RegMask &in_RegMask(uint) const;
 882 
 883   // Functionality from old debug nodes
 884   Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
 885   Node *frameptr () const { return in(TypeFunc::FramePtr); }
 886 
 887   Node *local(const JVMState* jvms, uint idx) const {
 888     assert(verify_jvms(jvms), "jvms must match");
 889     return in(_jvmadj + jvms->locoff() + idx);
 890   }
 891   Node *stack(const JVMState* jvms, uint idx) const {
 892     assert(verify_jvms(jvms), "jvms must match");
 893     return in(_jvmadj + jvms->stkoff() + idx);
 894  }
 895   Node *monitor_obj(const JVMState* jvms, uint idx) const {
 896     assert(verify_jvms(jvms), "jvms must match");
 897     return in(_jvmadj + jvms->monitor_obj_offset(idx));
 898   }
 899   Node *monitor_box(const JVMState* jvms, uint idx) const {
 900     assert(verify_jvms(jvms), "jvms must match");
 901     return in(_jvmadj + jvms->monitor_box_offset(idx));
 902   }
 903   void  set_local(const JVMState* jvms, uint idx, Node *c) {
 904     assert(verify_jvms(jvms), "jvms must match");
 905     set_req(_jvmadj + jvms->locoff() + idx, c);
 906   }
 907   void  set_stack(const JVMState* jvms, uint idx, Node *c) {
 908     assert(verify_jvms(jvms), "jvms must match");
 909     set_req(_jvmadj + jvms->stkoff() + idx, c);
 910   }
 911   void  set_monitor(const JVMState* jvms, uint idx, Node *c) {
 912     assert(verify_jvms(jvms), "jvms must match");
 913     set_req(_jvmadj + jvms->monoff() + idx, c);
 914   }
 915 };
 916 
 917 //------------------------------MachCallNode----------------------------------
 918 // Machine-specific versions of subroutine calls
 919 class MachCallNode : public MachSafePointNode {
 920 protected:
 921   virtual uint hash() const { return NO_HASH; }  // CFG nodes do not hash
 922   virtual bool cmp( const Node &n ) const;
 923   virtual uint size_of() const = 0; // Size is bigger
 924 public:
 925   const TypeFunc *_tf;        // Function type
 926   address      _entry_point;  // Address of the method being called
 927   float        _cnt;          // Estimate of number of times called
 928   bool         _guaranteed_safepoint; // Do we need to observe safepoint?
 929 
 930   const TypeFunc* tf()        const { return _tf; }
 931   const address entry_point() const { return _entry_point; }
 932   const float   cnt()         const { return _cnt; }
 933 
 934   void set_tf(const TypeFunc* tf)       { _tf = tf; }
 935   void set_entry_point(address p)       { _entry_point = p; }
 936   void set_cnt(float c)                 { _cnt = c; }
 937   void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
 938 
 939   MachCallNode() : MachSafePointNode() {
 940     init_class_id(Class_MachCall);
 941   }
 942 
 943   virtual const Type *bottom_type() const;
 944   virtual bool  pinned() const { return false; }
 945   virtual const Type* Value(PhaseGVN* phase) const;
 946   virtual const RegMask &in_RegMask(uint) const;
 947   virtual int ret_addr_offset() { return 0; }
 948 
 949   bool return_value_is_used() const;
 950 
 951   // Similar to cousin class CallNode::returns_pointer
 952   bool returns_pointer() const;
 953   bool returns_scalarized() const;
 954 
 955   bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
 956 
 957 #ifndef PRODUCT
 958   virtual void dump_spec(outputStream *st) const;
 959 #endif
 960 };
 961 
 962 //------------------------------MachCallJavaNode------------------------------
 963 // "Base" class for machine-specific versions of subroutine calls
 964 class MachCallJavaNode : public MachCallNode {
 965 protected:
 966   virtual bool cmp( const Node &n ) const;
 967   virtual uint size_of() const; // Size is bigger
 968 public:
 969   ciMethod* _method;                 // Method being direct called
 970   bool      _override_symbolic_info; // Override symbolic call site info from bytecode
 971   bool      _optimized_virtual;      // Tells if node is a static call or an optimized virtual
 972   bool      _method_handle_invoke;   // Tells if the call has to preserve SP
 973   bool      _arg_escape;             // ArgEscape in parameter list
 974   MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
 975     init_class_id(Class_MachCallJava);
 976   }
 977 
 978   virtual const RegMask &in_RegMask(uint) const;
 979 
 980   int resolved_method_index(CodeBuffer &cbuf) const {
 981     if (_override_symbolic_info) {
 982       // Attach corresponding Method* to the call site, so VM can use it during resolution
 983       // instead of querying symbolic info from bytecode.
 984       assert(_method != NULL, "method should be set");
 985       assert(_method->constant_encoding()->is_method(), "should point to a Method");
 986       return cbuf.oop_recorder()->find_index(_method->constant_encoding());
 987     }
 988     return 0; // Use symbolic info from bytecode (resolved_method == NULL).
 989   }
 990 
 991 #ifndef PRODUCT
 992   virtual void dump_spec(outputStream *st) const;
 993 #endif
 994 };
 995 
 996 //------------------------------MachCallStaticJavaNode------------------------
 997 // Machine-specific versions of monomorphic subroutine calls
 998 class MachCallStaticJavaNode : public MachCallJavaNode {
 999   virtual bool cmp( const Node &n ) const;
1000   virtual uint size_of() const; // Size is bigger
1001 public:
1002   const char *_name;            // Runtime wrapper name
1003   MachCallStaticJavaNode() : MachCallJavaNode() {
1004     init_class_id(Class_MachCallStaticJava);
1005   }
1006 
1007   // If this is an uncommon trap, return the request code, else zero.
1008   int uncommon_trap_request() const;
1009 
1010   virtual int ret_addr_offset();
1011 #ifndef PRODUCT
1012   virtual void dump_spec(outputStream *st) const;
1013   void dump_trap_args(outputStream *st) const;
1014 #endif
1015 };
1016 
1017 //------------------------------MachCallDynamicJavaNode------------------------
1018 // Machine-specific versions of possibly megamorphic subroutine calls
1019 class MachCallDynamicJavaNode : public MachCallJavaNode {
1020 public:
1021   int _vtable_index;
1022   MachCallDynamicJavaNode() : MachCallJavaNode() {
1023     init_class_id(Class_MachCallDynamicJava);
1024     DEBUG_ONLY(_vtable_index = -99);  // throw an assert if uninitialized
1025   }
1026   virtual int ret_addr_offset();
1027 #ifndef PRODUCT
1028   virtual void dump_spec(outputStream *st) const;
1029 #endif
1030 };
1031 
1032 //------------------------------MachCallRuntimeNode----------------------------
1033 // Machine-specific versions of subroutine calls
1034 class MachCallRuntimeNode : public MachCallNode {
1035   virtual bool cmp( const Node &n ) const;
1036   virtual uint size_of() const; // Size is bigger
1037 public:
1038   const char *_name;            // Printable name, if _method is NULL
1039   bool _leaf_no_fp;             // Is this CallLeafNoFP?
1040   MachCallRuntimeNode() : MachCallNode() {
1041     init_class_id(Class_MachCallRuntime);
1042   }
1043   virtual int ret_addr_offset();
1044 #ifndef PRODUCT
1045   virtual void dump_spec(outputStream *st) const;
1046 #endif
1047 };
1048 
1049 class MachCallLeafNode: public MachCallRuntimeNode {
1050 public:
1051   MachCallLeafNode() : MachCallRuntimeNode() {
1052     init_class_id(Class_MachCallLeaf);
1053   }
1054 };
1055 
1056 class MachCallNativeNode: public MachCallNode {
1057   virtual bool cmp( const Node &n ) const;
1058   virtual uint size_of() const;
1059   void print_regs(const GrowableArray<VMReg>& regs, outputStream* st) const;
1060 public:
1061   const char *_name;
1062   GrowableArray<VMReg> _arg_regs;
1063   GrowableArray<VMReg> _ret_regs;
1064 
1065   MachCallNativeNode() : MachCallNode() {
1066     init_class_id(Class_MachCallNative);
1067   }
1068 
1069   virtual int ret_addr_offset();
1070 #ifndef PRODUCT
1071   virtual void dump_spec(outputStream *st) const;
1072 #endif
1073 };
1074 
1075 //------------------------------MachHaltNode-----------------------------------
1076 // Machine-specific versions of halt nodes
1077 class MachHaltNode : public MachReturnNode {
1078 public:
1079   bool _reachable;
1080   const char* _halt_reason;
1081   virtual JVMState* jvms() const;
1082   bool is_reachable() const {
1083     return _reachable;
1084   }
1085 };
1086 
1087 class MachMemBarNode : public MachNode {
1088   virtual uint size_of() const; // Size is bigger
1089 public:
1090   const TypePtr* _adr_type;     // memory effects
1091   MachMemBarNode() : MachNode() {
1092     init_class_id(Class_MachMemBar);
1093     _adr_type = TypePtr::BOTTOM; // the default: all of memory
1094   }
1095 
1096   void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1097   virtual const TypePtr *adr_type() const;
1098 };
1099 
1100 
1101 //------------------------------MachTempNode-----------------------------------
1102 // Node used by the adlc to construct inputs to represent temporary registers
1103 class MachTempNode : public MachNode {
1104 private:
1105   MachOper *_opnd_array[1];
1106 
1107 public:
1108   virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1109   virtual uint rule() const { return 9999999; }
1110   virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
1111 
1112   MachTempNode(MachOper* oper) {
1113     init_class_id(Class_MachTemp);
1114     _num_opnds = 1;
1115     _opnds = _opnd_array;
1116     add_req(NULL);
1117     _opnds[0] = oper;
1118   }
1119   virtual uint size_of() const { return sizeof(MachTempNode); }
1120 
1121 #ifndef PRODUCT
1122   virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1123   virtual const char *Name() const { return "MachTemp";}
1124 #endif
1125 };
1126 
1127 
1128 
1129 //------------------------------labelOper--------------------------------------
1130 // Machine-independent version of label operand
1131 class labelOper : public MachOper {
1132 private:
1133   virtual uint           num_edges() const { return 0; }
1134 public:
1135   // Supported for fixed size branches
1136   Label* _label;                // Label for branch(es)
1137 
1138   uint _block_num;
1139 
1140   labelOper() : _label(0), _block_num(0) {}
1141 
1142   labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1143 
1144   labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1145 
1146   virtual MachOper *clone() const;
1147 
1148   virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
1149 
1150   virtual uint           opcode() const;
1151 
1152   virtual uint           hash()   const;
1153   virtual bool           cmp( const MachOper &oper ) const;
1154 #ifndef PRODUCT
1155   virtual const char    *Name()   const { return "Label";}
1156 
1157   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1158   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1159 #endif
1160 };
1161 
1162 
1163 //------------------------------methodOper--------------------------------------
1164 // Machine-independent version of method operand
1165 class methodOper : public MachOper {
1166 private:
1167   virtual uint           num_edges() const { return 0; }
1168 public:
1169   intptr_t _method;             // Address of method
1170   methodOper() :   _method(0) {}
1171   methodOper(intptr_t method) : _method(method)  {}
1172 
1173   virtual MachOper *clone() const;
1174 
1175   virtual intptr_t method() const { return _method; }
1176 
1177   virtual uint           opcode() const;
1178 
1179   virtual uint           hash()   const;
1180   virtual bool           cmp( const MachOper &oper ) const;
1181 #ifndef PRODUCT
1182   virtual const char    *Name()   const { return "Method";}
1183 
1184   virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1185   virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1186 #endif
1187 };
1188 
1189 #endif // SHARE_OPTO_MACHNODE_HPP