1 /*
2 * Copyright (c) 1997, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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20 * or visit www.oracle.com if you need additional information or have any
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23 */
24
25 #ifndef SHARE_OPTO_MACHNODE_HPP
26 #define SHARE_OPTO_MACHNODE_HPP
27
28 #include "opto/c2_MacroAssembler.hpp"
29 #include "opto/callnode.hpp"
30 #include "opto/constantTable.hpp"
31 #include "opto/matcher.hpp"
32 #include "opto/multnode.hpp"
33 #include "opto/node.hpp"
34 #include "opto/regmask.hpp"
35 #include "utilities/growableArray.hpp"
36
37 class BufferBlob;
38 class JVMState;
39 class MachCallDynamicJavaNode;
40 class MachCallJavaNode;
41 class MachCallLeafNode;
42 class MachCallNode;
43 class MachCallRuntimeNode;
44 class MachCallStaticJavaNode;
45 class MachEpilogNode;
46 class MachIfNode;
47 class MachNullCheckNode;
48 class MachOper;
49 class MachProjNode;
50 class MachPrologNode;
51 class MachReturnNode;
52 class MachSafePointNode;
53 class MachSpillCopyNode;
54 class MachVEPNode;
55 class Matcher;
56 class PhaseRegAlloc;
57 class RegMask;
58 class State;
59
60 //---------------------------MachOper------------------------------------------
61 class MachOper : public ResourceObj {
62 public:
63 // Allocate right next to the MachNodes in the same arena
64 void *operator new(size_t x) throw() {
65 Compile* C = Compile::current();
66 return C->node_arena()->AmallocWords(x);
67 }
68
69 // Opcode
70 virtual uint opcode() const = 0;
71
72 // Number of input edges.
73 // Generally at least 1
74 virtual uint num_edges() const { return 1; }
75 // Array of Register masks
76 virtual const RegMask *in_RegMask(int index) const;
77
78 // Methods to output the encoding of the operand
79
80 // Negate conditional branches. Error for non-branch Nodes
81 virtual void negate();
82
83 // Return the value requested
84 // result register lookup, corresponding to int_format
85 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
86 // input register lookup, corresponding to ext_format
87 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
88
89 // helpers for MacroAssembler generation from ADLC
90 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_Register(reg(ra_, node));
92 }
93 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_Register(reg(ra_, node, idx));
95 }
96 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
97 return ::as_FloatRegister(reg(ra_, node));
98 }
99 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
100 return ::as_FloatRegister(reg(ra_, node, idx));
101 }
102
103 #if defined(IA32) || defined(AMD64)
104 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node) const {
105 return ::as_KRegister(reg(ra_, node));
106 }
107 KRegister as_KRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
108 return ::as_KRegister(reg(ra_, node, idx));
109 }
110 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
111 return ::as_XMMRegister(reg(ra_, node));
112 }
113 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
114 return ::as_XMMRegister(reg(ra_, node, idx));
115 }
116 #endif
117 // CondRegister reg converter
118 #if defined(PPC64)
119 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node) const {
120 return ::as_ConditionRegister(reg(ra_, node));
121 }
122 ConditionRegister as_ConditionRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
123 return ::as_ConditionRegister(reg(ra_, node, idx));
124 }
125 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
126 return ::as_VectorRegister(reg(ra_, node));
127 }
128 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
129 return ::as_VectorRegister(reg(ra_, node, idx));
130 }
131 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node) const {
132 return ::as_VectorSRegister(reg(ra_, node));
133 }
134 VectorSRegister as_VectorSRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
135 return ::as_VectorSRegister(reg(ra_, node, idx));
136 }
137 #endif
138 #if defined(S390)
139 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node) const {
140 return ::as_VectorRegister(reg(ra_, node));
141 }
142 VectorRegister as_VectorRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
143 return ::as_VectorRegister(reg(ra_, node, idx));
144 }
145 #endif
146 #if defined(AARCH64)
147 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node) const {
148 return ::as_PRegister(reg(ra_, node));
149 }
150 PRegister as_PRegister(PhaseRegAlloc* ra_, const Node* node, int idx) const {
151 return ::as_PRegister(reg(ra_, node, idx));
152 }
153 #endif
154
155 virtual intptr_t constant() const;
156 virtual relocInfo::relocType constant_reloc() const;
157 virtual jdouble constantD() const;
158 virtual jfloat constantF() const;
159 virtual jlong constantL() const;
160 virtual jshort constantH() const;
161 virtual TypeOopPtr *oop() const;
162 virtual int ccode() const;
163 // A zero, default, indicates this value is not needed.
164 // May need to lookup the base register, as done in int_ and ext_format
165 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
166 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
167 virtual int scale() const;
168 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
169 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
170 // Check for PC-Relative displacement
171 virtual relocInfo::relocType disp_reloc() const;
172 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
173 virtual int base_position() const; // base edge position, or -1
174 virtual int index_position() const; // index edge position, or -1
175
176 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
177 // Only returns non-null value for x86_32.ad's indOffset32X
178 virtual const TypePtr *disp_as_type() const { return nullptr; }
179
180 // Return the label
181 virtual Label *label() const;
182
183 // Return the method's address
184 virtual intptr_t method() const;
185
186 // Hash and compare over operands are currently identical
187 virtual uint hash() const;
188 virtual bool cmp( const MachOper &oper ) const;
189
190 // Virtual clone, since I do not know how big the MachOper is.
191 virtual MachOper *clone() const = 0;
192
193 // Return ideal Type from simple operands. Fail for complex operands.
194 virtual const Type *type() const;
195
196 // Set an integer offset if we have one, or error otherwise
197 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
198
199 #ifndef PRODUCT
200 // Return name of operand
201 virtual const char *Name() const { return "???";}
202
203 // Methods to output the text version of the operand
204 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
205 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
206
207 virtual void dump_spec(outputStream *st) const; // Print per-operand info
208
209 // Check whether o is a valid oper.
210 static bool notAnOper(const MachOper *o) {
211 if (o == nullptr) return true;
212 if (((intptr_t)o & 1) != 0) return true;
213 if (*(address*)o == badAddress) return true; // kill by Node::destruct
214 return false;
215 }
216 #endif // !PRODUCT
217 };
218
219 //------------------------------MachNode---------------------------------------
220 // Base type for all machine specific nodes. All node classes generated by the
221 // ADLC inherit from this class.
222 class MachNode : public Node {
223 public:
224 MachNode() : Node((uint)0), _barrier(0), _num_opnds(0), _opnds(nullptr) {
225 init_class_id(Class_Mach);
226 }
227 // Required boilerplate
228 virtual uint size_of() const { return sizeof(MachNode); }
229 virtual int Opcode() const; // Always equal to MachNode
230 virtual uint rule() const = 0; // Machine-specific opcode
231 // Number of inputs which come before the first operand.
232 // Generally at least 1, to skip the Control input
233 virtual uint oper_input_base() const { return 1; }
234 // Position of constant base node in node's inputs. -1 if
235 // no constant base node input.
236 virtual uint mach_constant_base_node_input() const { return (uint)-1; }
237
238 uint8_t barrier_data() const { return _barrier; }
239 void set_barrier_data(uint8_t data) { _barrier = data; }
240
241 // Copy index, inputs, and operands to a new version of the instruction.
242 // Called from cisc_version() and short_branch_version().
243 void fill_new_machnode(MachNode *n) const;
244
245 // Return an equivalent instruction using memory for cisc_operand position
246 virtual MachNode *cisc_version(int offset);
247 // Modify this instruction's register mask to use stack version for cisc_operand
248 virtual void use_cisc_RegMask();
249
250 // Support for short branches
251 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
252
253 // Avoid back to back some instructions on some CPUs.
254 enum AvoidBackToBackFlag { AVOID_NONE = 0,
255 AVOID_BEFORE = Flag_avoid_back_to_back_before,
256 AVOID_AFTER = Flag_avoid_back_to_back_after,
257 AVOID_BEFORE_AND_AFTER = AVOID_BEFORE | AVOID_AFTER };
258
259 bool avoid_back_to_back(AvoidBackToBackFlag flag_value) const {
260 return (flags() & flag_value) == flag_value;
261 }
262
263 // instruction implemented with a call
264 bool has_call() const { return (flags() & Flag_has_call) != 0; }
265
266 // First index in _in[] corresponding to operand, or -1 if there is none
267 int operand_index(uint operand) const;
268 int operand_index(const MachOper *oper) const;
269 int operand_index(Node* m) const;
270
271 // Register class input is expected in
272 virtual const RegMask &in_RegMask(uint) const;
273
274 // cisc-spillable instructions redefine for use by in_RegMask
275 virtual const RegMask *cisc_RegMask() const { return nullptr; }
276
277 // If this instruction is a 2-address instruction, then return the
278 // index of the input which must match the output. Not necessary
279 // for instructions which bind the input and output register to the
280 // same singleton register (e.g., Intel IDIV which binds AX to be
281 // both an input and an output). It is necessary when the input and
282 // output have choices - but they must use the same choice.
283 virtual uint two_adr( ) const { return 0; }
284
285 // The GC might require some barrier metadata for machine code emission.
286 uint8_t _barrier;
287
288 // Array of complex operand pointers. Each corresponds to zero or
289 // more leafs. Must be set by MachNode constructor to point to an
290 // internal array of MachOpers. The MachOper array is sized by
291 // specific MachNodes described in the ADL.
292 uint16_t _num_opnds;
293 MachOper **_opnds;
294 uint16_t num_opnds() const { return _num_opnds; }
295
296 // Emit bytes using C2_MacroAssembler
297 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
298 // Expand node after register allocation.
299 // Node is replaced by several nodes in the postalloc expand phase.
300 // Corresponding methods are generated for nodes if they specify
301 // postalloc_expand. See block.cpp for more documentation.
302 virtual bool requires_postalloc_expand() const { return false; }
303 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
304 // Size of instruction in bytes
305 virtual uint size(PhaseRegAlloc *ra_) const;
306 // Helper function that computes size by emitting code
307 virtual uint emit_size(PhaseRegAlloc *ra_) const;
308
309 // Return the alignment required (in units of relocInfo::addr_unit())
310 // for this instruction (must be a power of 2)
311 int pd_alignment_required() const;
312 virtual int alignment_required() const { return pd_alignment_required(); }
313
314 // Return the padding (in bytes) to be emitted before this
315 // instruction to properly align it.
316 virtual int compute_padding(int current_offset) const;
317
318 // Return number of relocatable values contained in this instruction
319 virtual int reloc() const { return 0; }
320
321 // Return number of words used for double constants in this instruction
322 virtual int ins_num_consts() const { return 0; }
323
324 // Hash and compare over operands. Used to do GVN on machine Nodes.
325 virtual uint hash() const;
326 virtual bool cmp( const Node &n ) const;
327
328 // Expand method for MachNode, replaces nodes representing pseudo
329 // instructions with a set of nodes which represent real machine
330 // instructions and compute the same value.
331 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
332
333 // Bottom_type call; value comes from operand0
334 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
335 virtual uint ideal_reg() const {
336 const Type *t = _opnds[0]->type();
337 if (t == TypeInt::CC) {
338 return Op_RegFlags;
339 } else {
340 return t->ideal_reg();
341 }
342 }
343
344 // If this is a memory op, return the base pointer and fixed offset.
345 // If there are no such, return null. If there are multiple addresses
346 // or the address is indeterminate (rare cases) then return (Node*)-1,
347 // which serves as node bottom.
348 // If the offset is not statically determined, set it to Type::OffsetBot.
349 // This method is free to ignore stack slots if that helps.
350 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
351 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
352 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
353
354 // Helper for get_base_and_disp: find the base and index input nodes.
355 // Returns the MachOper as determined by memory_operand(), for use, if
356 // needed by the caller. If (MachOper *)-1 is returned, base and index
357 // are set to NodeSentinel. If null is returned, base and
358 // index are set to null.
359 const MachOper* memory_inputs(Node* &base, Node* &index) const;
360
361 // Helper for memory_inputs: Which operand carries the necessary info?
362 // By default, returns null, which means there is no such operand.
363 // If it returns (MachOper*)-1, this means there are multiple memories.
364 virtual const MachOper* memory_operand() const { return nullptr; }
365
366 // Call "get_base_and_disp" to decide which category of memory is used here.
367 virtual const class TypePtr *adr_type() const;
368
369 // Apply peephole rule(s) to this instruction
370 virtual int peephole(Block *block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc *ra_);
371
372 // Top-level ideal Opcode matched
373 virtual int ideal_Opcode() const { return Op_Node; }
374
375 // Adds the label for the case
376 virtual void add_case_label( int switch_val, Label* blockLabel);
377
378 // Set the absolute address for methods
379 virtual void method_set( intptr_t addr );
380
381 // Should we clone rather than spill this instruction?
382 bool rematerialize() const;
383
384 // Get the pipeline info
385 static const Pipeline *pipeline_class();
386 virtual const Pipeline *pipeline() const;
387
388 // Returns true if this node is a check that can be implemented with a trap.
389 virtual bool is_TrapBasedCheckNode() const { return false; }
390
391 // Whether this node is expanded during code emission into a sequence of
392 // instructions and the first instruction can perform an implicit null check.
393 virtual bool is_late_expanded_null_check_candidate() const {
394 return false;
395 }
396
397 void set_removed() { add_flag(Flag_is_removed_by_peephole); }
398 bool get_removed() { return (flags() & Flag_is_removed_by_peephole) != 0; }
399
400 #ifndef PRODUCT
401 virtual const char *Name() const = 0; // Machine-specific name
402 virtual void dump_spec(outputStream *st) const; // Print per-node info
403 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
404 #endif
405 };
406
407 //------------------------------MachIdealNode----------------------------
408 // Machine specific versions of nodes that must be defined by user.
409 // These are not converted by matcher from ideal nodes to machine nodes
410 // but are inserted into the code by the compiler.
411 class MachIdealNode : public MachNode {
412 public:
413 MachIdealNode( ) {}
414
415 // Define the following defaults for non-matched machine nodes
416 virtual uint oper_input_base() const { return 0; }
417 virtual uint rule() const { return 9999999; }
418 virtual const class Type *bottom_type() const { return _opnds == nullptr ? Type::CONTROL : MachNode::bottom_type(); }
419 };
420
421 //------------------------------MachTypeNode----------------------------
422 // Machine Nodes that need to retain a known Type.
423 class MachTypeNode : public MachNode {
424 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
425 public:
426 MachTypeNode( ) {}
427 const Type *_bottom_type;
428
429 virtual const class Type *bottom_type() const { return _bottom_type; }
430 #ifndef PRODUCT
431 virtual void dump_spec(outputStream *st) const;
432 #endif
433 };
434
435 //------------------------------MachBreakpointNode----------------------------
436 // Machine breakpoint or interrupt Node
437 class MachBreakpointNode : public MachIdealNode {
438 public:
439 MachBreakpointNode( ) {}
440 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
441 virtual uint size(PhaseRegAlloc *ra_) const;
442
443 #ifndef PRODUCT
444 virtual const char *Name() const { return "Breakpoint"; }
445 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
446 #endif
447 };
448
449 //------------------------------MachConstantBaseNode--------------------------
450 // Machine node that represents the base address of the constant table.
451 class MachConstantBaseNode : public MachIdealNode {
452 public:
453 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
454
455 public:
456 MachConstantBaseNode() : MachIdealNode() {
457 init_class_id(Class_MachConstantBase);
458 }
459 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
460 virtual uint ideal_reg() const { return Op_RegP; }
461 virtual uint oper_input_base() const { return 1; }
462
463 virtual bool requires_postalloc_expand() const;
464 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);
465
466 virtual void emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const;
467 virtual uint size(PhaseRegAlloc* ra_) const;
468
469 static const RegMask& static_out_RegMask() { return _out_RegMask; }
470 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
471
472 #ifndef PRODUCT
473 virtual const char* Name() const { return "MachConstantBaseNode"; }
474 virtual void format(PhaseRegAlloc*, outputStream* st) const;
475 #endif
476 };
477
478 //------------------------------MachConstantNode-------------------------------
479 // Machine node that holds a constant which is stored in the constant table.
480 class MachConstantNode : public MachTypeNode {
481 protected:
482 ConstantTable::Constant _constant; // This node's constant.
483
484 public:
485 MachConstantNode() : MachTypeNode() {
486 init_class_id(Class_MachConstant);
487 }
488
489 virtual void eval_constant(Compile* C) {
490 #ifdef ASSERT
491 tty->print("missing MachConstantNode eval_constant function: ");
492 dump();
493 #endif
494 ShouldNotCallThis();
495 }
496
497 virtual const RegMask &in_RegMask(uint idx) const {
498 if (idx == mach_constant_base_node_input())
499 return MachConstantBaseNode::static_out_RegMask();
500 return MachNode::in_RegMask(idx);
501 }
502
503 // Input edge of MachConstantBaseNode.
504 virtual uint mach_constant_base_node_input() const { return req() - 1; }
505
506 int constant_offset();
507 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
508 // Unchecked version to avoid assertions in debug output.
509 int constant_offset_unchecked() const;
510 virtual uint size_of() const { return sizeof(MachConstantNode); }
511 };
512
513 //------------------------------MachVEPNode-----------------------------------
514 // Machine Inline Type Entry Point Node
515 class MachVEPNode : public MachIdealNode {
516 public:
517 Label* _verified_entry;
518
519 MachVEPNode(Label* verified_entry, bool verified, bool receiver_only) :
520 _verified_entry(verified_entry),
521 _verified(verified),
522 _receiver_only(receiver_only) {
523 init_class_id(Class_MachVEP);
524 }
525 virtual bool cmp(const Node &n) const {
526 return (_verified_entry == ((MachVEPNode&)n)._verified_entry) &&
527 (_verified == ((MachVEPNode&)n)._verified) &&
528 (_receiver_only == ((MachVEPNode&)n)._receiver_only) &&
529 MachIdealNode::cmp(n);
530 }
531 virtual uint size_of() const { return sizeof(*this); }
532 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const;
533
534 #ifndef PRODUCT
535 virtual const char* Name() const { return "InlineType Entry-Point"; }
536 virtual void format(PhaseRegAlloc*, outputStream* st) const;
537 #endif
538 private:
539 bool _verified;
540 bool _receiver_only;
541 };
542
543 //------------------------------MachUEPNode-----------------------------------
544 // Machine Unvalidated Entry Point Node
545 class MachUEPNode : public MachIdealNode {
546 public:
547 MachUEPNode( ) {}
548 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
549
550 #ifndef PRODUCT
551 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
552 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
553 #endif
554 };
555
556 //------------------------------MachPrologNode--------------------------------
557 // Machine function Prolog Node
558 class MachPrologNode : public MachIdealNode {
559 public:
560 Label* _verified_entry;
561
562 MachPrologNode(Label* verified_entry) : _verified_entry(verified_entry) {
563 init_class_id(Class_MachProlog);
564 }
565 virtual bool cmp(const Node &n) const {
566 return (_verified_entry == ((MachPrologNode&)n)._verified_entry) && MachIdealNode::cmp(n);
567 }
568 virtual uint size_of() const { return sizeof(*this); }
569 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
570 virtual int reloc() const;
571
572 #ifndef PRODUCT
573 virtual const char *Name() const { return "Prolog"; }
574 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
575 #endif
576 };
577
578 //------------------------------MachEpilogNode--------------------------------
579 // Machine function Epilog Node
580 class MachEpilogNode : public MachIdealNode {
581 private:
582 bool _do_polling;
583 public:
584 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
585 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
586 virtual int reloc() const;
587 virtual const Pipeline *pipeline() const;
588 virtual uint size_of() const { return sizeof(MachEpilogNode); }
589 bool do_polling() const { return _do_polling; }
590
591 #ifndef PRODUCT
592 virtual const char *Name() const { return "Epilog"; }
593 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
594 #endif
595 };
596
597 //------------------------------MachNopNode-----------------------------------
598 // Machine function Nop Node
599 class MachNopNode : public MachIdealNode {
600 private:
601 int _count;
602 public:
603 MachNopNode( ) : _count(1) {}
604 MachNopNode( int count ) : _count(count) {}
605 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
606 virtual uint size(PhaseRegAlloc *ra_) const;
607
608 virtual const class Type *bottom_type() const { return Type::CONTROL; }
609
610 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
611 virtual const Pipeline *pipeline() const;
612 virtual uint size_of() const { return sizeof(MachNopNode); }
613 #ifndef PRODUCT
614 virtual const char *Name() const { return "Nop"; }
615 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
616 virtual void dump_spec(outputStream *st) const { } // No per-operand info
617 #endif
618 };
619
620 //------------------------------MachSpillCopyNode------------------------------
621 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
622 // location (stack or register).
623 class MachSpillCopyNode : public MachIdealNode {
624 public:
625 enum SpillType {
626 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
627 PhiInput, // Inserted when coalescing of a phi node and its input fails
628 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
629 LoopPhiInput, // Pre-split compares of loop-phis
630 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
631 // if in high pressure region or the lrg is bound
632 RegToReg, // A register to register move
633 RegToMem, // A register to memory move
634 MemToReg, // A memory to register move
635 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
636 // the phi and its input resides at different locations (i.e. reg or mem)
637 BasePointerToMem, // Spill base pointer to memory at safepoint
638 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
639 // stretched beyond a new definition point, therefore we split out new copies instead
640 CallUse, // Spill use at a call
641 Bound // An lrg marked as spill that is bound and needs to be spilled at a use
642 };
643 private:
644 const RegMask *_in; // RegMask for input
645 const RegMask *_out; // RegMask for output
646 const Type *_type;
647 const SpillType _spill_type;
648 public:
649 MachSpillCopyNode(SpillType spill_type, Node *n, const RegMask &in, const RegMask &out ) :
650 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()), _spill_type(spill_type) {
651 init_class_id(Class_MachSpillCopy);
652 init_flags(Flag_is_Copy);
653 add_req(nullptr);
654 add_req(n);
655 }
656 virtual uint size_of() const { return sizeof(*this); }
657 void set_out_RegMask(const RegMask &out) { _out = &out; }
658 void set_in_RegMask(const RegMask &in) { _in = ∈ }
659 virtual const RegMask &out_RegMask() const { return *_out; }
660 virtual const RegMask &in_RegMask(uint) const { return *_in; }
661 virtual const class Type *bottom_type() const { return _type; }
662 virtual uint ideal_reg() const { return _type->ideal_reg(); }
663 virtual uint oper_input_base() const { return 1; }
664 uint implementation( C2_MacroAssembler *masm, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
665
666 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
667 virtual uint size(PhaseRegAlloc *ra_) const;
668
669
670 #ifndef PRODUCT
671 static const char *spill_type(SpillType st) {
672 switch (st) {
673 case TwoAddress:
674 return "TwoAddressSpillCopy";
675 case PhiInput:
676 return "PhiInputSpillCopy";
677 case DebugUse:
678 return "DebugUseSpillCopy";
679 case LoopPhiInput:
680 return "LoopPhiInputSpillCopy";
681 case Definition:
682 return "DefinitionSpillCopy";
683 case RegToReg:
684 return "RegToRegSpillCopy";
685 case RegToMem:
686 return "RegToMemSpillCopy";
687 case MemToReg:
688 return "MemToRegSpillCopy";
689 case PhiLocationDifferToInputLocation:
690 return "PhiLocationDifferToInputLocationSpillCopy";
691 case BasePointerToMem:
692 return "BasePointerToMemSpillCopy";
693 case InputToRematerialization:
694 return "InputToRematerializationSpillCopy";
695 case CallUse:
696 return "CallUseSpillCopy";
697 case Bound:
698 return "BoundSpillCopy";
699 default:
700 assert(false, "Must have valid spill type");
701 return "MachSpillCopy";
702 }
703 }
704
705 virtual const char *Name() const {
706 return spill_type(_spill_type);
707 }
708
709 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
710 #endif
711 };
712
713 // MachMergeNode is similar to a PhiNode in a sense it merges multiple values,
714 // however it doesn't have a control input and is more like a MergeMem.
715 // It is inserted after the register allocation is done to ensure that nodes use single
716 // definition of a multidef lrg in a block.
717 class MachMergeNode : public MachIdealNode {
718 public:
719 MachMergeNode(Node *n1) {
720 init_class_id(Class_MachMerge);
721 add_req(nullptr);
722 add_req(n1);
723 }
724 virtual const RegMask &out_RegMask() const { return in(1)->out_RegMask(); }
725 virtual const RegMask &in_RegMask(uint idx) const { return in(1)->in_RegMask(idx); }
726 virtual const class Type *bottom_type() const { return in(1)->bottom_type(); }
727 virtual uint ideal_reg() const { return bottom_type()->ideal_reg(); }
728 virtual uint oper_input_base() const { return 1; }
729 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const { }
730 virtual uint size(PhaseRegAlloc *ra_) const { return 0; }
731 #ifndef PRODUCT
732 virtual const char *Name() const { return "MachMerge"; }
733 #endif
734 };
735
736 //------------------------------MachBranchNode--------------------------------
737 // Abstract machine branch Node
738 class MachBranchNode : public MachIdealNode {
739 public:
740 MachBranchNode() : MachIdealNode() {
741 init_class_id(Class_MachBranch);
742 }
743 virtual void label_set(Label* label, uint block_num) = 0;
744 virtual void save_label(Label** label, uint* block_num) = 0;
745
746 // Support for short branches
747 virtual MachNode *short_branch_version() { return nullptr; }
748
749 virtual bool pinned() const { return true; };
750 };
751
752 //------------------------------MachNullChkNode--------------------------------
753 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
754 // also some kind of memory op. Turns the indicated MachNode into a
755 // conditional branch with good latency on the ptr-not-null path and awful
756 // latency on the pointer-is-null path.
757
758 class MachNullCheckNode : public MachBranchNode {
759 public:
760 const uint _vidx; // Index of memop being tested
761 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
762 init_class_id(Class_MachNullCheck);
763 add_req(ctrl);
764 add_req(memop);
765 }
766 virtual int Opcode() const;
767 virtual uint size_of() const { return sizeof(*this); }
768
769 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const;
770 virtual void label_set(Label* label, uint block_num);
771 virtual void save_label(Label** label, uint* block_num);
772 virtual void negate() { }
773 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
774 virtual uint ideal_reg() const { return NotAMachineReg; }
775 virtual const RegMask &in_RegMask(uint) const;
776 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
777 #ifndef PRODUCT
778 virtual const char *Name() const { return "NullCheck"; }
779 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
780 #endif
781 };
782
783 //------------------------------MachProjNode----------------------------------
784 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
785 // just MachNodes made by the Ideal world that replicate simple projections
786 // but with machine-dependent input & output register masks. Generally
787 // produced as part of calling conventions. Normally I make MachNodes as part
788 // of the Matcher process, but the Matcher is ill suited to issues involving
789 // frame handling, so frame handling is all done in the Ideal world with
790 // occasional callbacks to the machine model for important info.
791 class MachProjNode : public ProjNode {
792 public:
793 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
794 init_class_id(Class_MachProj);
795 }
796 RegMask _rout;
797 const uint _ideal_reg;
798 enum projType {
799 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
800 fat_proj = 999 // Projs killing many regs, defined by _rout
801 };
802 virtual int Opcode() const;
803 virtual const Type *bottom_type() const;
804 virtual const TypePtr *adr_type() const;
805 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
806 virtual const RegMask &out_RegMask() const { return _rout; }
807 virtual uint ideal_reg() const { return _ideal_reg; }
808 // Need size_of() for virtual ProjNode::clone()
809 virtual uint size_of() const { return sizeof(MachProjNode); }
810 #ifndef PRODUCT
811 virtual void dump_spec(outputStream *st) const;
812 #endif
813 };
814
815 //------------------------------MachIfNode-------------------------------------
816 // Machine-specific versions of IfNodes
817 class MachIfNode : public MachBranchNode {
818 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
819 public:
820 float _prob; // Probability branch goes either way
821 float _fcnt; // Frequency counter
822 MachIfNode() : MachBranchNode() {
823 init_class_id(Class_MachIf);
824 }
825 // Negate conditional branches.
826 virtual void negate() = 0;
827 #ifndef PRODUCT
828 virtual void dump_spec(outputStream *st) const;
829 #endif
830 };
831
832 //------------------------------MachJumpNode-----------------------------------
833 // Machine-specific versions of JumpNodes
834 class MachJumpNode : public MachConstantNode {
835 public:
836 float* _probs;
837 MachJumpNode() : MachConstantNode() {
838 init_class_id(Class_MachJump);
839 }
840 virtual uint size_of() const { return sizeof(MachJumpNode); }
841 };
842
843 //------------------------------MachGotoNode-----------------------------------
844 // Machine-specific versions of GotoNodes
845 class MachGotoNode : public MachBranchNode {
846 public:
847 MachGotoNode() : MachBranchNode() {
848 init_class_id(Class_MachGoto);
849 }
850 };
851
852 //------------------------------MachFastLockNode-------------------------------------
853 // Machine-specific versions of FastLockNodes
854 class MachFastLockNode : public MachNode {
855 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
856 public:
857 MachFastLockNode() : MachNode() {}
858 };
859
860 //------------------------------MachReturnNode--------------------------------
861 // Machine-specific versions of subroutine returns
862 class MachReturnNode : public MachNode {
863 virtual uint size_of() const; // Size is bigger
864 public:
865 RegMask *_in_rms; // Input register masks, set during allocation
866 ReallocMark _nesting; // assertion check for reallocations
867 const TypePtr* _adr_type; // memory effects of call or return
868 MachReturnNode() : MachNode() {
869 init_class_id(Class_MachReturn);
870 _adr_type = TypePtr::BOTTOM; // the default: all of memory
871 }
872
873 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
874
875 virtual const RegMask &in_RegMask(uint) const;
876 virtual bool pinned() const { return true; };
877 virtual const TypePtr *adr_type() const;
878 };
879
880 //------------------------------MachSafePointNode-----------------------------
881 // Machine-specific versions of safepoints
882 class MachSafePointNode : public MachReturnNode {
883 public:
884 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
885 JVMState* _jvms; // Pointer to list of JVM State Objects
886 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
887 bool _has_ea_local_in_scope; // NoEscape or ArgEscape objects in JVM States
888 OopMap* oop_map() const { return _oop_map; }
889 void set_oop_map(OopMap* om) { _oop_map = om; }
890
891 MachSafePointNode() : MachReturnNode(), _oop_map(nullptr), _jvms(nullptr), _jvmadj(0), _has_ea_local_in_scope(false) {
892 init_class_id(Class_MachSafePoint);
893 }
894
895 virtual JVMState* jvms() const { return _jvms; }
896 void set_jvms(JVMState* s) {
897 _jvms = s;
898 }
899 virtual const Type *bottom_type() const;
900
901 virtual const RegMask &in_RegMask(uint) const;
902
903 // Functionality from old debug nodes
904 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
905 Node *frameptr () const { return in(TypeFunc::FramePtr); }
906
907 Node *local(const JVMState* jvms, uint idx) const {
908 assert(verify_jvms(jvms), "jvms must match");
909 return in(_jvmadj + jvms->locoff() + idx);
910 }
911 Node *stack(const JVMState* jvms, uint idx) const {
912 assert(verify_jvms(jvms), "jvms must match");
913 return in(_jvmadj + jvms->stkoff() + idx);
914 }
915 Node *monitor_obj(const JVMState* jvms, uint idx) const {
916 assert(verify_jvms(jvms), "jvms must match");
917 return in(_jvmadj + jvms->monitor_obj_offset(idx));
918 }
919 Node *monitor_box(const JVMState* jvms, uint idx) const {
920 assert(verify_jvms(jvms), "jvms must match");
921 return in(_jvmadj + jvms->monitor_box_offset(idx));
922 }
923 Node* scalarized_obj(const JVMState* jvms, uint idx) const {
924 assert(verify_jvms(jvms), "jvms must match");
925 return in(_jvmadj + jvms->scloff() + idx);
926 }
927 void set_local(const JVMState* jvms, uint idx, Node *c) {
928 assert(verify_jvms(jvms), "jvms must match");
929 set_req(_jvmadj + jvms->locoff() + idx, c);
930 }
931 void set_stack(const JVMState* jvms, uint idx, Node *c) {
932 assert(verify_jvms(jvms), "jvms must match");
933 set_req(_jvmadj + jvms->stkoff() + idx, c);
934 }
935 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
936 assert(verify_jvms(jvms), "jvms must match");
937 set_req(_jvmadj + jvms->monoff() + idx, c);
938 }
939 virtual uint size_of() const { return sizeof(MachSafePointNode); }
940 };
941
942 //------------------------------MachCallNode----------------------------------
943 // Machine-specific versions of subroutine calls
944 class MachCallNode : public MachSafePointNode {
945 protected:
946 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
947 virtual bool cmp( const Node &n ) const;
948 virtual uint size_of() const = 0; // Size is bigger
949 public:
950 const TypeFunc *_tf; // Function type
951 address _entry_point; // Address of the method being called
952 float _cnt; // Estimate of number of times called
953 bool _guaranteed_safepoint; // Do we need to observe safepoint?
954
955 const TypeFunc* tf() const { return _tf; }
956 address entry_point() const { return _entry_point; }
957 float cnt() const { return _cnt; }
958
959 void set_tf(const TypeFunc* tf) { _tf = tf; }
960 void set_entry_point(address p) { _entry_point = p; }
961 void set_cnt(float c) { _cnt = c; }
962 void set_guaranteed_safepoint(bool b) { _guaranteed_safepoint = b; }
963
964 MachCallNode() : MachSafePointNode() {
965 init_class_id(Class_MachCall);
966 }
967
968 virtual const Type *bottom_type() const;
969 virtual bool pinned() const { return false; }
970 virtual const Type* Value(PhaseGVN* phase) const;
971 virtual const RegMask &in_RegMask(uint) const;
972 virtual int ret_addr_offset() { return 0; }
973
974 bool return_value_is_used() const;
975
976 // Similar to cousin class CallNode::returns_pointer
977 bool returns_pointer() const;
978 bool returns_scalarized() const;
979
980 bool guaranteed_safepoint() const { return _guaranteed_safepoint; }
981
982 #ifndef PRODUCT
983 virtual void dump_spec(outputStream *st) const;
984 #endif
985 };
986
987 //------------------------------MachCallJavaNode------------------------------
988 // "Base" class for machine-specific versions of subroutine calls
989 class MachCallJavaNode : public MachCallNode {
990 protected:
991 virtual bool cmp( const Node &n ) const;
992 virtual uint size_of() const; // Size is bigger
993 public:
994 ciMethod* _method; // Method being direct called
995 bool _override_symbolic_info; // Override symbolic call site info from bytecode
996 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
997 bool _method_handle_invoke; // Tells if the call has to preserve SP
998 bool _arg_escape; // ArgEscape in parameter list
999 MachCallJavaNode() : MachCallNode(), _override_symbolic_info(false) {
1000 init_class_id(Class_MachCallJava);
1001 }
1002
1003 virtual const RegMask &in_RegMask(uint) const;
1004
1005 int resolved_method_index(C2_MacroAssembler *masm) const {
1006 if (_override_symbolic_info) {
1007 // Attach corresponding Method* to the call site, so VM can use it during resolution
1008 // instead of querying symbolic info from bytecode.
1009 assert(_method != nullptr, "method should be set");
1010 assert(_method->constant_encoding()->is_method(), "should point to a Method");
1011 return masm->code()->oop_recorder()->find_index(_method->constant_encoding());
1012 }
1013 return 0; // Use symbolic info from bytecode (resolved_method is null).
1014 }
1015
1016 #ifndef PRODUCT
1017 virtual void dump_spec(outputStream *st) const;
1018 #endif
1019 };
1020
1021 //------------------------------MachCallStaticJavaNode------------------------
1022 // Machine-specific versions of monomorphic subroutine calls
1023 class MachCallStaticJavaNode : public MachCallJavaNode {
1024 virtual bool cmp( const Node &n ) const;
1025 virtual uint size_of() const; // Size is bigger
1026 public:
1027 const char *_name; // Runtime wrapper name
1028 MachCallStaticJavaNode() : MachCallJavaNode() {
1029 init_class_id(Class_MachCallStaticJava);
1030 }
1031
1032 // If this is an uncommon trap, return the request code, else zero.
1033 int uncommon_trap_request() const;
1034
1035 virtual int ret_addr_offset();
1036 #ifndef PRODUCT
1037 virtual void dump_spec(outputStream *st) const;
1038 void dump_trap_args(outputStream *st) const;
1039 #endif
1040 };
1041
1042 //------------------------------MachCallDynamicJavaNode------------------------
1043 // Machine-specific versions of possibly megamorphic subroutine calls
1044 class MachCallDynamicJavaNode : public MachCallJavaNode {
1045 public:
1046 int _vtable_index;
1047 MachCallDynamicJavaNode() : MachCallJavaNode() {
1048 init_class_id(Class_MachCallDynamicJava);
1049 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
1050 }
1051 virtual int ret_addr_offset();
1052 #ifndef PRODUCT
1053 virtual void dump_spec(outputStream *st) const;
1054 #endif
1055 virtual uint size_of() const { return sizeof(MachCallDynamicJavaNode); }
1056 };
1057
1058 //------------------------------MachCallRuntimeNode----------------------------
1059 // Machine-specific versions of subroutine calls
1060 class MachCallRuntimeNode : public MachCallNode {
1061 virtual bool cmp( const Node &n ) const;
1062 virtual uint size_of() const; // Size is bigger
1063 public:
1064 const char *_name; // Printable name, if _method is null
1065 bool _leaf_no_fp; // Is this CallLeafNoFP?
1066 MachCallRuntimeNode() : MachCallNode() {
1067 init_class_id(Class_MachCallRuntime);
1068 }
1069 virtual int ret_addr_offset();
1070 #ifndef PRODUCT
1071 virtual void dump_spec(outputStream *st) const;
1072 #endif
1073 };
1074
1075 class MachCallLeafNode: public MachCallRuntimeNode {
1076 public:
1077 MachCallLeafNode() : MachCallRuntimeNode() {
1078 init_class_id(Class_MachCallLeaf);
1079 }
1080 };
1081
1082 //------------------------------MachHaltNode-----------------------------------
1083 // Machine-specific versions of halt nodes
1084 class MachHaltNode : public MachReturnNode {
1085 public:
1086 bool _reachable;
1087 const char* _halt_reason;
1088 virtual JVMState* jvms() const;
1089 virtual uint size_of() const { return sizeof(MachHaltNode); }
1090 bool is_reachable() const {
1091 return _reachable;
1092 }
1093 };
1094
1095 class MachMemBarNode : public MachNode {
1096 virtual uint size_of() const; // Size is bigger
1097 public:
1098 const TypePtr* _adr_type; // memory effects
1099 MachMemBarNode() : MachNode() {
1100 init_class_id(Class_MachMemBar);
1101 _adr_type = TypePtr::BOTTOM; // the default: all of memory
1102 }
1103
1104 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
1105 virtual const TypePtr *adr_type() const;
1106 };
1107
1108
1109 //------------------------------MachTempNode-----------------------------------
1110 // Node used by the adlc to construct inputs to represent temporary registers
1111 class MachTempNode : public MachNode {
1112 private:
1113 MachOper *_opnd_array[1];
1114
1115 public:
1116 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
1117 virtual uint rule() const { return 9999999; }
1118 virtual void emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {}
1119
1120 MachTempNode(MachOper* oper) {
1121 init_class_id(Class_MachTemp);
1122 _num_opnds = 1;
1123 _opnds = _opnd_array;
1124 add_req(nullptr);
1125 _opnds[0] = oper;
1126 }
1127 virtual uint size_of() const { return sizeof(MachTempNode); }
1128
1129 #ifndef PRODUCT
1130 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
1131 virtual const char *Name() const { return "MachTemp";}
1132 #endif
1133 };
1134
1135
1136
1137 //------------------------------labelOper--------------------------------------
1138 // Machine-independent version of label operand
1139 class labelOper : public MachOper {
1140 private:
1141 virtual uint num_edges() const { return 0; }
1142 public:
1143 // Supported for fixed size branches
1144 Label* _label; // Label for branch(es)
1145
1146 uint _block_num;
1147
1148 labelOper() : _label(nullptr), _block_num(0) {}
1149
1150 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
1151
1152 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
1153
1154 virtual MachOper *clone() const;
1155
1156 virtual Label *label() const { assert(_label != nullptr, "need Label"); return _label; }
1157
1158 virtual uint opcode() const;
1159
1160 virtual uint hash() const;
1161 virtual bool cmp( const MachOper &oper ) const;
1162 #ifndef PRODUCT
1163 virtual const char *Name() const { return "Label";}
1164
1165 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1166 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1167 #endif
1168 };
1169
1170
1171 //------------------------------methodOper--------------------------------------
1172 // Machine-independent version of method operand
1173 class methodOper : public MachOper {
1174 private:
1175 virtual uint num_edges() const { return 0; }
1176 public:
1177 intptr_t _method; // Address of method
1178 methodOper() : _method(0) {}
1179 methodOper(intptr_t method) : _method(method) {}
1180
1181 virtual MachOper *clone() const;
1182
1183 virtual intptr_t method() const { return _method; }
1184
1185 virtual uint opcode() const;
1186
1187 virtual uint hash() const;
1188 virtual bool cmp( const MachOper &oper ) const;
1189 #ifndef PRODUCT
1190 virtual const char *Name() const { return "Method";}
1191
1192 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
1193 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
1194 #endif
1195 };
1196
1197 #endif // SHARE_OPTO_MACHNODE_HPP