1 /*
   2  * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/addnode.hpp"
  28 #include "opto/connode.hpp"
  29 #include "opto/convertnode.hpp"
  30 #include "opto/memnode.hpp"
  31 #include "opto/mulnode.hpp"
  32 #include "opto/phaseX.hpp"
  33 #include "opto/subnode.hpp"
  34 #include "utilities/powerOfTwo.hpp"
  35 
  36 // Portions of code courtesy of Clifford Click
  37 
  38 
  39 //=============================================================================
  40 //------------------------------hash-------------------------------------------
  41 // Hash function over MulNodes.  Needs to be commutative; i.e., I swap
  42 // (commute) inputs to MulNodes willy-nilly so the hash function must return
  43 // the same value in the presence of edge swapping.
  44 uint MulNode::hash() const {
  45   return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
  46 }
  47 
  48 //------------------------------Identity---------------------------------------
  49 // Multiplying a one preserves the other argument
  50 Node* MulNode::Identity(PhaseGVN* phase) {
  51   const Type *one = mul_id();  // The multiplicative identity
  52   if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
  53   if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
  54 
  55   return this;
  56 }
  57 
  58 //------------------------------Ideal------------------------------------------
  59 // We also canonicalize the Node, moving constants to the right input,
  60 // and flatten expressions (so that 1+x+2 becomes x+3).
  61 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
  62   Node* in1 = in(1);
  63   Node* in2 = in(2);
  64   Node* progress = NULL;        // Progress flag
  65 
  66   // This code is used by And nodes too, but some conversions are
  67   // only valid for the actual Mul nodes.
  68   uint op = Opcode();
  69   bool real_mul = (op == Op_MulI) || (op == Op_MulL) ||
  70                   (op == Op_MulF) || (op == Op_MulD);
  71 
  72   // Convert "(-a)*(-b)" into "a*b".
  73   if (real_mul && in1->is_Sub() && in2->is_Sub()) {
  74     if (phase->type(in1->in(1))->is_zero_type() &&
  75         phase->type(in2->in(1))->is_zero_type()) {
  76       set_req_X(1, in1->in(2), phase);
  77       set_req_X(2, in2->in(2), phase);
  78       in1 = in(1);
  79       in2 = in(2);
  80       progress = this;
  81     }
  82   }
  83 
  84   // convert "max(a,b) * min(a,b)" into "a*b".
  85   if ((in(1)->Opcode() == max_opcode() && in(2)->Opcode() == min_opcode())
  86       || (in(1)->Opcode() == min_opcode() && in(2)->Opcode() == max_opcode())) {
  87     Node *in11 = in(1)->in(1);
  88     Node *in12 = in(1)->in(2);
  89 
  90     Node *in21 = in(2)->in(1);
  91     Node *in22 = in(2)->in(2);
  92 
  93     if ((in11 == in21 && in12 == in22) ||
  94         (in11 == in22 && in12 == in21)) {
  95       set_req_X(1, in11, phase);
  96       set_req_X(2, in12, phase);
  97       in1 = in(1);
  98       in2 = in(2);
  99       progress = this;
 100     }
 101   }
 102 
 103   const Type* t1 = phase->type(in1);
 104   const Type* t2 = phase->type(in2);
 105 
 106   // We are OK if right is a constant, or right is a load and
 107   // left is a non-constant.
 108   if( !(t2->singleton() ||
 109         (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
 110     if( t1->singleton() ||       // Left input is a constant?
 111         // Otherwise, sort inputs (commutativity) to help value numbering.
 112         (in(1)->_idx > in(2)->_idx) ) {
 113       swap_edges(1, 2);
 114       const Type *t = t1;
 115       t1 = t2;
 116       t2 = t;
 117       progress = this;            // Made progress
 118     }
 119   }
 120 
 121   // If the right input is a constant, and the left input is a product of a
 122   // constant, flatten the expression tree.
 123   if( t2->singleton() &&        // Right input is a constant?
 124       op != Op_MulF &&          // Float & double cannot reassociate
 125       op != Op_MulD ) {
 126     if( t2 == Type::TOP ) return NULL;
 127     Node *mul1 = in(1);
 128 #ifdef ASSERT
 129     // Check for dead loop
 130     int op1 = mul1->Opcode();
 131     if ((mul1 == this) || (in(2) == this) ||
 132         ((op1 == mul_opcode() || op1 == add_opcode()) &&
 133          ((mul1->in(1) == this) || (mul1->in(2) == this) ||
 134           (mul1->in(1) == mul1) || (mul1->in(2) == mul1)))) {
 135       assert(false, "dead loop in MulNode::Ideal");
 136     }
 137 #endif
 138 
 139     if( mul1->Opcode() == mul_opcode() ) {  // Left input is a multiply?
 140       // Mul of a constant?
 141       const Type *t12 = phase->type( mul1->in(2) );
 142       if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
 143         // Compute new constant; check for overflow
 144         const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
 145         if( tcon01->singleton() ) {
 146           // The Mul of the flattened expression
 147           set_req_X(1, mul1->in(1), phase);
 148           set_req_X(2, phase->makecon(tcon01), phase);
 149           t2 = tcon01;
 150           progress = this;      // Made progress
 151         }
 152       }
 153     }
 154     // If the right input is a constant, and the left input is an add of a
 155     // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
 156     const Node *add1 = in(1);
 157     if( add1->Opcode() == add_opcode() ) {      // Left input is an add?
 158       // Add of a constant?
 159       const Type *t12 = phase->type( add1->in(2) );
 160       if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
 161         assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
 162         // Compute new constant; check for overflow
 163         const Type *tcon01 = mul_ring(t2,t12);
 164         if( tcon01->singleton() ) {
 165 
 166         // Convert (X+con1)*con0 into X*con0
 167           Node *mul = clone();    // mul = ()*con0
 168           mul->set_req(1,add1->in(1));  // mul = X*con0
 169           mul = phase->transform(mul);
 170 
 171           Node *add2 = add1->clone();
 172           add2->set_req(1, mul);        // X*con0 + con0*con1
 173           add2->set_req(2, phase->makecon(tcon01) );
 174           progress = add2;
 175         }
 176       }
 177     } // End of is left input an add
 178   } // End of is right input a Mul
 179 
 180   return progress;
 181 }
 182 
 183 //------------------------------Value-----------------------------------------
 184 const Type* MulNode::Value(PhaseGVN* phase) const {
 185   const Type *t1 = phase->type( in(1) );
 186   const Type *t2 = phase->type( in(2) );
 187   // Either input is TOP ==> the result is TOP
 188   if( t1 == Type::TOP ) return Type::TOP;
 189   if( t2 == Type::TOP ) return Type::TOP;
 190 
 191   // Either input is ZERO ==> the result is ZERO.
 192   // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
 193   int op = Opcode();
 194   if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
 195     const Type *zero = add_id();        // The multiplicative zero
 196     if( t1->higher_equal( zero ) ) return zero;
 197     if( t2->higher_equal( zero ) ) return zero;
 198   }
 199 
 200   // Either input is BOTTOM ==> the result is the local BOTTOM
 201   if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
 202     return bottom_type();
 203 
 204 #if defined(IA32)
 205   // Can't trust native compilers to properly fold strict double
 206   // multiplication with round-to-zero on this platform.
 207   if (op == Op_MulD) {
 208     return TypeD::DOUBLE;
 209   }
 210 #endif
 211 
 212   return mul_ring(t1,t2);            // Local flavor of type multiplication
 213 }
 214 
 215 MulNode* MulNode::make(Node* in1, Node* in2, BasicType bt) {
 216   switch (bt) {
 217     case T_INT:
 218       return new MulINode(in1, in2);
 219     case T_LONG:
 220       return new MulLNode(in1, in2);
 221     default:
 222       fatal("Not implemented for %s", type2name(bt));
 223   }
 224   return NULL;
 225 }
 226 
 227 
 228 //=============================================================================
 229 //------------------------------Ideal------------------------------------------
 230 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 231 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 232   const jint con = in(2)->find_int_con(0);
 233   if (con == 0) {
 234     // If in(2) is not a constant, call Ideal() of the parent class to
 235     // try to move constant to the right side.
 236     return MulNode::Ideal(phase, can_reshape);
 237   }
 238 
 239   // Now we have a constant Node on the right and the constant in con.
 240   if (con == 1) {
 241     // By one is handled by Identity call
 242     return NULL;
 243   }
 244 
 245   // Check for negative constant; if so negate the final result
 246   bool sign_flip = false;
 247 
 248   unsigned int abs_con = uabs(con);
 249   if (abs_con != (unsigned int)con) {
 250     sign_flip = true;
 251   }
 252 
 253   // Get low bit; check for being the only bit
 254   Node *res = NULL;
 255   unsigned int bit1 = submultiple_power_of_2(abs_con);
 256   if (bit1 == abs_con) {           // Found a power of 2?
 257     res = new LShiftINode(in(1), phase->intcon(log2i_exact(bit1)));
 258   } else {
 259     // Check for constant with 2 bits set
 260     unsigned int bit2 = abs_con - bit1;
 261     bit2 = bit2 & (0 - bit2);          // Extract 2nd bit
 262     if (bit2 + bit1 == abs_con) {    // Found all bits in con?
 263       Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(bit1))));
 264       Node *n2 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(bit2))));
 265       res = new AddINode(n2, n1);
 266     } else if (is_power_of_2(abs_con + 1)) {
 267       // Sleezy: power-of-2 - 1.  Next time be generic.
 268       unsigned int temp = abs_con + 1;
 269       Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(temp))));
 270       res = new SubINode(n1, in(1));
 271     } else {
 272       return MulNode::Ideal(phase, can_reshape);
 273     }
 274   }
 275 
 276   if (sign_flip) {             // Need to negate result?
 277     res = phase->transform(res);// Transform, before making the zero con
 278     res = new SubINode(phase->intcon(0),res);
 279   }
 280 
 281   return res;                   // Return final result
 282 }
 283 
 284 //------------------------------mul_ring---------------------------------------
 285 // Compute the product type of two integer ranges into this node.
 286 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
 287   const TypeInt *r0 = t0->is_int(); // Handy access
 288   const TypeInt *r1 = t1->is_int();
 289 
 290   // Fetch endpoints of all ranges
 291   jint lo0 = r0->_lo;
 292   double a = (double)lo0;
 293   jint hi0 = r0->_hi;
 294   double b = (double)hi0;
 295   jint lo1 = r1->_lo;
 296   double c = (double)lo1;
 297   jint hi1 = r1->_hi;
 298   double d = (double)hi1;
 299 
 300   // Compute all endpoints & check for overflow
 301   int32_t A = java_multiply(lo0, lo1);
 302   if( (double)A != a*c ) return TypeInt::INT; // Overflow?
 303   int32_t B = java_multiply(lo0, hi1);
 304   if( (double)B != a*d ) return TypeInt::INT; // Overflow?
 305   int32_t C = java_multiply(hi0, lo1);
 306   if( (double)C != b*c ) return TypeInt::INT; // Overflow?
 307   int32_t D = java_multiply(hi0, hi1);
 308   if( (double)D != b*d ) return TypeInt::INT; // Overflow?
 309 
 310   if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
 311   else { lo0 = B; hi0 = A; }
 312   if( C < D ) {
 313     if( C < lo0 ) lo0 = C;
 314     if( D > hi0 ) hi0 = D;
 315   } else {
 316     if( D < lo0 ) lo0 = D;
 317     if( C > hi0 ) hi0 = C;
 318   }
 319   return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
 320 }
 321 
 322 
 323 //=============================================================================
 324 //------------------------------Ideal------------------------------------------
 325 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 326 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 327   const jlong con = in(2)->find_long_con(0);
 328   if (con == 0) {
 329     // If in(2) is not a constant, call Ideal() of the parent class to
 330     // try to move constant to the right side.
 331     return MulNode::Ideal(phase, can_reshape);
 332   }
 333 
 334   // Now we have a constant Node on the right and the constant in con.
 335   if (con == 1) {
 336     // By one is handled by Identity call
 337     return NULL;
 338   }
 339 
 340   // Check for negative constant; if so negate the final result
 341   bool sign_flip = false;
 342   julong abs_con = uabs(con);
 343   if (abs_con != (julong)con) {
 344     sign_flip = true;
 345   }
 346 
 347   // Get low bit; check for being the only bit
 348   Node *res = NULL;
 349   julong bit1 = submultiple_power_of_2(abs_con);
 350   if (bit1 == abs_con) {           // Found a power of 2?
 351     res = new LShiftLNode(in(1), phase->intcon(log2i_exact(bit1)));
 352   } else {
 353 
 354     // Check for constant with 2 bits set
 355     julong bit2 = abs_con-bit1;
 356     bit2 = bit2 & (0-bit2);          // Extract 2nd bit
 357     if (bit2 + bit1 == abs_con) {    // Found all bits in con?
 358       Node *n1 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2i_exact(bit1))));
 359       Node *n2 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2i_exact(bit2))));
 360       res = new AddLNode(n2, n1);
 361 
 362     } else if (is_power_of_2(abs_con+1)) {
 363       // Sleezy: power-of-2 -1.  Next time be generic.
 364       julong temp = abs_con + 1;
 365       Node *n1 = phase->transform( new LShiftLNode(in(1), phase->intcon(log2i_exact(temp))));
 366       res = new SubLNode(n1, in(1));
 367     } else {
 368       return MulNode::Ideal(phase, can_reshape);
 369     }
 370   }
 371 
 372   if (sign_flip) {             // Need to negate result?
 373     res = phase->transform(res);// Transform, before making the zero con
 374     res = new SubLNode(phase->longcon(0),res);
 375   }
 376 
 377   return res;                   // Return final result
 378 }
 379 
 380 //------------------------------mul_ring---------------------------------------
 381 // Compute the product type of two integer ranges into this node.
 382 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
 383   const TypeLong *r0 = t0->is_long(); // Handy access
 384   const TypeLong *r1 = t1->is_long();
 385 
 386   // Fetch endpoints of all ranges
 387   jlong lo0 = r0->_lo;
 388   double a = (double)lo0;
 389   jlong hi0 = r0->_hi;
 390   double b = (double)hi0;
 391   jlong lo1 = r1->_lo;
 392   double c = (double)lo1;
 393   jlong hi1 = r1->_hi;
 394   double d = (double)hi1;
 395 
 396   // Compute all endpoints & check for overflow
 397   jlong A = java_multiply(lo0, lo1);
 398   if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
 399   jlong B = java_multiply(lo0, hi1);
 400   if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
 401   jlong C = java_multiply(hi0, lo1);
 402   if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
 403   jlong D = java_multiply(hi0, hi1);
 404   if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
 405 
 406   if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
 407   else { lo0 = B; hi0 = A; }
 408   if( C < D ) {
 409     if( C < lo0 ) lo0 = C;
 410     if( D > hi0 ) hi0 = D;
 411   } else {
 412     if( D < lo0 ) lo0 = D;
 413     if( C > hi0 ) hi0 = C;
 414   }
 415   return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
 416 }
 417 
 418 //=============================================================================
 419 //------------------------------mul_ring---------------------------------------
 420 // Compute the product type of two double ranges into this node.
 421 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
 422   if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
 423   return TypeF::make( t0->getf() * t1->getf() );
 424 }
 425 
 426 //------------------------------Ideal---------------------------------------
 427 // Check to see if we are multiplying by a constant 2 and convert to add, then try the regular MulNode::Ideal
 428 Node* MulFNode::Ideal(PhaseGVN* phase, bool can_reshape) {
 429   const TypeF *t2 = phase->type(in(2))->isa_float_constant();
 430 
 431   // x * 2 -> x + x
 432   if (t2 != NULL && t2->getf() == 2) {
 433     Node* base = in(1);
 434     return new AddFNode(base, base);
 435   }
 436 
 437   return MulNode::Ideal(phase, can_reshape);
 438 }
 439 
 440 //=============================================================================
 441 //------------------------------mul_ring---------------------------------------
 442 // Compute the product type of two double ranges into this node.
 443 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
 444   if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
 445   // We must be multiplying 2 double constants.
 446   return TypeD::make( t0->getd() * t1->getd() );
 447 }
 448 
 449 //------------------------------Ideal---------------------------------------
 450 // Check to see if we are multiplying by a constant 2 and convert to add, then try the regular MulNode::Ideal
 451 Node* MulDNode::Ideal(PhaseGVN* phase, bool can_reshape) {
 452   const TypeD *t2 = phase->type(in(2))->isa_double_constant();
 453 
 454   // x * 2 -> x + x
 455   if (t2 != NULL && t2->getd() == 2) {
 456     Node* base = in(1);
 457     return new AddDNode(base, base);
 458   }
 459 
 460   return MulNode::Ideal(phase, can_reshape);
 461 }
 462 
 463 //=============================================================================
 464 //------------------------------Value------------------------------------------
 465 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
 466   const Type *t1 = phase->type( in(1) );
 467   const Type *t2 = phase->type( in(2) );
 468   const Type *bot = bottom_type();
 469   return MulHiValue(t1, t2, bot);
 470 }
 471 
 472 const Type* UMulHiLNode::Value(PhaseGVN* phase) const {
 473   const Type *t1 = phase->type( in(1) );
 474   const Type *t2 = phase->type( in(2) );
 475   const Type *bot = bottom_type();
 476   return MulHiValue(t1, t2, bot);
 477 }
 478 
 479 // A common routine used by UMulHiLNode and MulHiLNode
 480 const Type* MulHiValue(const Type *t1, const Type *t2, const Type *bot) {
 481   // Either input is TOP ==> the result is TOP
 482   if( t1 == Type::TOP ) return Type::TOP;
 483   if( t2 == Type::TOP ) return Type::TOP;
 484 
 485   // Either input is BOTTOM ==> the result is the local BOTTOM
 486   if( (t1 == bot) || (t2 == bot) ||
 487       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 488     return bot;
 489 
 490   // It is not worth trying to constant fold this stuff!
 491   return TypeLong::LONG;
 492 }
 493 
 494 //=============================================================================
 495 //------------------------------mul_ring---------------------------------------
 496 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 497 // For the logical operations the ring's MUL is really a logical AND function.
 498 // This also type-checks the inputs for sanity.  Guaranteed never to
 499 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 500 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
 501   const TypeInt *r0 = t0->is_int(); // Handy access
 502   const TypeInt *r1 = t1->is_int();
 503   int widen = MAX2(r0->_widen,r1->_widen);
 504 
 505   // If either input is a constant, might be able to trim cases
 506   if( !r0->is_con() && !r1->is_con() )
 507     return TypeInt::INT;        // No constants to be had
 508 
 509   // Both constants?  Return bits
 510   if( r0->is_con() && r1->is_con() )
 511     return TypeInt::make( r0->get_con() & r1->get_con() );
 512 
 513   if( r0->is_con() && r0->get_con() > 0 )
 514     return TypeInt::make(0, r0->get_con(), widen);
 515 
 516   if( r1->is_con() && r1->get_con() > 0 )
 517     return TypeInt::make(0, r1->get_con(), widen);
 518 
 519   if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
 520     return TypeInt::BOOL;
 521   }
 522 
 523   return TypeInt::INT;          // No constants to be had
 524 }
 525 
 526 const Type* AndINode::Value(PhaseGVN* phase) const {
 527   // patterns similar to (v << 2) & 3
 528   if (AndIL_shift_and_mask_is_always_zero(phase, in(1), in(2), T_INT, true)) {
 529     return TypeInt::ZERO;
 530   }
 531 
 532   return MulNode::Value(phase);
 533 }
 534 
 535 //------------------------------Identity---------------------------------------
 536 // Masking off the high bits of an unsigned load is not required
 537 Node* AndINode::Identity(PhaseGVN* phase) {
 538 
 539   // x & x => x
 540   if (in(1) == in(2)) {
 541     return in(1);
 542   }
 543 
 544   Node* in1 = in(1);
 545   uint op = in1->Opcode();
 546   const TypeInt* t2 = phase->type(in(2))->isa_int();
 547   if (t2 && t2->is_con()) {
 548     int con = t2->get_con();
 549     // Masking off high bits which are always zero is useless.
 550     const TypeInt* t1 = phase->type(in(1))->isa_int();
 551     if (t1 != NULL && t1->_lo >= 0) {
 552       jint t1_support = right_n_bits(1 + log2i_graceful(t1->_hi));
 553       if ((t1_support & con) == t1_support)
 554         return in1;
 555     }
 556     // Masking off the high bits of a unsigned-shift-right is not
 557     // needed either.
 558     if (op == Op_URShiftI) {
 559       const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 560       if (t12 && t12->is_con()) {  // Shift is by a constant
 561         int shift = t12->get_con();
 562         shift &= BitsPerJavaInteger - 1;  // semantics of Java shifts
 563         int mask = max_juint >> shift;
 564         if ((mask & con) == mask)  // If AND is useless, skip it
 565           return in1;
 566       }
 567     }
 568   }
 569   return MulNode::Identity(phase);
 570 }
 571 
 572 //------------------------------Ideal------------------------------------------
 573 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 574   // pattern similar to (v1 + (v2 << 2)) & 3 transformed to v1 & 3
 575   Node* progress = AndIL_add_shift_and_mask(phase, T_INT);
 576   if (progress != NULL) {
 577     return progress;
 578   }
 579 
 580   // Special case constant AND mask
 581   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 582   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 583   const int mask = t2->get_con();
 584   Node *load = in(1);
 585   uint lop = load->Opcode();
 586 
 587   // Masking bits off of a Character?  Hi bits are already zero.
 588   if( lop == Op_LoadUS &&
 589       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 590     return new AndINode(load,phase->intcon(mask&0xFFFF));
 591 
 592   // Masking bits off of a Short?  Loading a Character does some masking
 593   if (can_reshape &&
 594       load->outcnt() == 1 && load->unique_out() == this) {
 595     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 596       Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
 597       ldus = phase->transform(ldus);
 598       return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
 599     }
 600 
 601     // Masking sign bits off of a Byte?  Do an unsigned byte load plus
 602     // an and.
 603     if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
 604       Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
 605       ldub = phase->transform(ldub);
 606       return new AndINode(ldub, phase->intcon(mask));
 607     }
 608   }
 609 
 610   // Masking off sign bits?  Dont make them!
 611   if( lop == Op_RShiftI ) {
 612     const TypeInt *t12 = phase->type(load->in(2))->isa_int();
 613     if( t12 && t12->is_con() ) { // Shift is by a constant
 614       int shift = t12->get_con();
 615       shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 616       const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
 617       // If the AND'ing of the 2 masks has no bits, then only original shifted
 618       // bits survive.  NO sign-extension bits survive the maskings.
 619       if( (sign_bits_mask & mask) == 0 ) {
 620         // Use zero-fill shift instead
 621         Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
 622         return new AndINode( zshift, in(2) );
 623       }
 624     }
 625   }
 626 
 627   // Check for 'negate/and-1', a pattern emitted when someone asks for
 628   // 'mod 2'.  Negate leaves the low order bit unchanged (think: complement
 629   // plus 1) and the mask is of the low order bit.  Skip the negate.
 630   if( lop == Op_SubI && mask == 1 && load->in(1) &&
 631       phase->type(load->in(1)) == TypeInt::ZERO )
 632     return new AndINode( load->in(2), in(2) );
 633 
 634   return MulNode::Ideal(phase, can_reshape);
 635 }
 636 
 637 //=============================================================================
 638 //------------------------------mul_ring---------------------------------------
 639 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 640 // For the logical operations the ring's MUL is really a logical AND function.
 641 // This also type-checks the inputs for sanity.  Guaranteed never to
 642 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 643 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
 644   const TypeLong *r0 = t0->is_long(); // Handy access
 645   const TypeLong *r1 = t1->is_long();
 646   int widen = MAX2(r0->_widen,r1->_widen);
 647 
 648   // If either input is a constant, might be able to trim cases
 649   if( !r0->is_con() && !r1->is_con() )
 650     return TypeLong::LONG;      // No constants to be had
 651 
 652   // Both constants?  Return bits
 653   if( r0->is_con() && r1->is_con() )
 654     return TypeLong::make( r0->get_con() & r1->get_con() );
 655 
 656   if( r0->is_con() && r0->get_con() > 0 )
 657     return TypeLong::make(CONST64(0), r0->get_con(), widen);
 658 
 659   if( r1->is_con() && r1->get_con() > 0 )
 660     return TypeLong::make(CONST64(0), r1->get_con(), widen);
 661 
 662   return TypeLong::LONG;        // No constants to be had
 663 }
 664 
 665 const Type* AndLNode::Value(PhaseGVN* phase) const {
 666   // patterns similar to (v << 2) & 3
 667   if (AndIL_shift_and_mask_is_always_zero(phase, in(1), in(2), T_LONG, true)) {
 668     return TypeLong::ZERO;
 669   }
 670 
 671   return MulNode::Value(phase);
 672 }
 673 
 674 //------------------------------Identity---------------------------------------
 675 // Masking off the high bits of an unsigned load is not required
 676 Node* AndLNode::Identity(PhaseGVN* phase) {
 677 
 678   // x & x => x
 679   if (in(1) == in(2)) {
 680     return in(1);
 681   }
 682 
 683   Node *usr = in(1);
 684   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 685   if( t2 && t2->is_con() ) {
 686     jlong con = t2->get_con();
 687     // Masking off high bits which are always zero is useless.
 688     const TypeLong* t1 = phase->type( in(1) )->isa_long();
 689     if (t1 != NULL && t1->_lo >= 0) {
 690       int bit_count = log2i_graceful(t1->_hi) + 1;
 691       jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
 692       if ((t1_support & con) == t1_support)
 693         return usr;
 694     }
 695     uint lop = usr->Opcode();
 696     // Masking off the high bits of a unsigned-shift-right is not
 697     // needed either.
 698     if( lop == Op_URShiftL ) {
 699       const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
 700       if( t12 && t12->is_con() ) {  // Shift is by a constant
 701         int shift = t12->get_con();
 702         shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 703         jlong mask = max_julong >> shift;
 704         if( (mask&con) == mask )  // If AND is useless, skip it
 705           return usr;
 706       }
 707     }
 708   }
 709   return MulNode::Identity(phase);
 710 }
 711 
 712 //------------------------------Ideal------------------------------------------
 713 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 714   // pattern similar to (v1 + (v2 << 2)) & 3 transformed to v1 & 3
 715   Node* progress = AndIL_add_shift_and_mask(phase, T_LONG);
 716   if (progress != NULL) {
 717     return progress;
 718   }
 719 
 720   // Special case constant AND mask
 721   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 722   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 723   const jlong mask = t2->get_con();
 724 
 725   Node* in1 = in(1);
 726   int op = in1->Opcode();
 727 
 728   // Are we masking a long that was converted from an int with a mask
 729   // that fits in 32-bits?  Commute them and use an AndINode.  Don't
 730   // convert masks which would cause a sign extension of the integer
 731   // value.  This check includes UI2L masks (0x00000000FFFFFFFF) which
 732   // would be optimized away later in Identity.
 733   if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
 734     Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
 735     andi = phase->transform(andi);
 736     return new ConvI2LNode(andi);
 737   }
 738 
 739   // Masking off sign bits?  Dont make them!
 740   if (op == Op_RShiftL) {
 741     const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 742     if( t12 && t12->is_con() ) { // Shift is by a constant
 743       int shift = t12->get_con();
 744       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 745       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 746       // If the AND'ing of the 2 masks has no bits, then only original shifted
 747       // bits survive.  NO sign-extension bits survive the maskings.
 748       if( (sign_bits_mask & mask) == 0 ) {
 749         // Use zero-fill shift instead
 750         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 751         return new AndLNode(zshift, in(2));
 752       }
 753     }
 754   }
 755 
 756   return MulNode::Ideal(phase, can_reshape);
 757 }
 758 
 759 LShiftNode* LShiftNode::make(Node* in1, Node* in2, BasicType bt) {
 760   switch (bt) {
 761     case T_INT:
 762       return new LShiftINode(in1, in2);
 763     case T_LONG:
 764       return new LShiftLNode(in1, in2);
 765     default:
 766       fatal("Not implemented for %s", type2name(bt));
 767   }
 768   return NULL;
 769 }
 770 
 771 //=============================================================================
 772 
 773 static bool const_shift_count(PhaseGVN* phase, Node* shiftNode, int* count) {
 774   const TypeInt* tcount = phase->type(shiftNode->in(2))->isa_int();
 775   if (tcount != NULL && tcount->is_con()) {
 776     *count = tcount->get_con();
 777     return true;
 778   }
 779   return false;
 780 }
 781 
 782 static int maskShiftAmount(PhaseGVN* phase, Node* shiftNode, int nBits) {
 783   int count = 0;
 784   if (const_shift_count(phase, shiftNode, &count)) {
 785     int maskedShift = count & (nBits - 1);
 786     if (maskedShift == 0) {
 787       // Let Identity() handle 0 shift count.
 788       return 0;
 789     }
 790 
 791     if (count != maskedShift) {
 792       shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
 793       PhaseIterGVN* igvn = phase->is_IterGVN();
 794       if (igvn) {
 795         igvn->rehash_node_delayed(shiftNode);
 796       }
 797     }
 798     return maskedShift;
 799   }
 800   return 0;
 801 }
 802 
 803 //------------------------------Identity---------------------------------------
 804 Node* LShiftINode::Identity(PhaseGVN* phase) {
 805   int count = 0;
 806   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaInteger - 1)) == 0) {
 807     // Shift by a multiple of 32 does nothing
 808     return in(1);
 809   }
 810   return this;
 811 }
 812 
 813 //------------------------------Ideal------------------------------------------
 814 // If the right input is a constant, and the left input is an add of a
 815 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 816 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 817   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
 818   if (con == 0) {
 819     return NULL;
 820   }
 821 
 822   // Left input is an add?
 823   Node *add1 = in(1);
 824   int add1_op = add1->Opcode();
 825   if( add1_op == Op_AddI ) {    // Left input is an add?
 826     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 827 
 828     // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 829     // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 830     if( con < 16 ) {
 831       // Left input is an add of the same number?
 832       if (add1->in(1) == add1->in(2)) {
 833         // Convert "(x + x) << c0" into "x << (c0 + 1)"
 834         // In general, this optimization cannot be applied for c0 == 31 since
 835         // 2x << 31 != x << 32 = x << 0 = x (e.g. x = 1: 2 << 31 = 0 != 1)
 836         return new LShiftINode(add1->in(1), phase->intcon(con + 1));
 837       }
 838 
 839       // Left input is an add of a constant?
 840       const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 841       if( t12 && t12->is_con() ){ // Left input is an add of a con?
 842         // Compute X << con0
 843         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 844         // Compute X<<con0 + (con1<<con0)
 845         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 846       }
 847     }
 848   }
 849 
 850   // Check for "(x>>c0)<<c0" which just masks off low bits
 851   if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
 852       add1->in(2) == in(2) )
 853     // Convert to "(x & -(1<<c0))"
 854     return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
 855 
 856   // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
 857   if( add1_op == Op_AndI ) {
 858     Node *add2 = add1->in(1);
 859     int add2_op = add2->Opcode();
 860     if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
 861         add2->in(2) == in(2) ) {
 862       // Convert to "(x & (Y<<c0))"
 863       Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
 864       return new AndINode( add2->in(1), y_sh );
 865     }
 866   }
 867 
 868   // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
 869   // before shifting them away.
 870   const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
 871   if( add1_op == Op_AndI &&
 872       phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
 873     return new LShiftINode( add1->in(1), in(2) );
 874 
 875   return NULL;
 876 }
 877 
 878 //------------------------------Value------------------------------------------
 879 // A LShiftINode shifts its input2 left by input1 amount.
 880 const Type* LShiftINode::Value(PhaseGVN* phase) const {
 881   const Type *t1 = phase->type( in(1) );
 882   const Type *t2 = phase->type( in(2) );
 883   // Either input is TOP ==> the result is TOP
 884   if( t1 == Type::TOP ) return Type::TOP;
 885   if( t2 == Type::TOP ) return Type::TOP;
 886 
 887   // Left input is ZERO ==> the result is ZERO.
 888   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
 889   // Shift by zero does nothing
 890   if( t2 == TypeInt::ZERO ) return t1;
 891 
 892   // Either input is BOTTOM ==> the result is BOTTOM
 893   if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
 894       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 895     return TypeInt::INT;
 896 
 897   const TypeInt *r1 = t1->is_int(); // Handy access
 898   const TypeInt *r2 = t2->is_int(); // Handy access
 899 
 900   if (!r2->is_con())
 901     return TypeInt::INT;
 902 
 903   uint shift = r2->get_con();
 904   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 905   // Shift by a multiple of 32 does nothing:
 906   if (shift == 0)  return t1;
 907 
 908   // If the shift is a constant, shift the bounds of the type,
 909   // unless this could lead to an overflow.
 910   if (!r1->is_con()) {
 911     jint lo = r1->_lo, hi = r1->_hi;
 912     if (((lo << shift) >> shift) == lo &&
 913         ((hi << shift) >> shift) == hi) {
 914       // No overflow.  The range shifts up cleanly.
 915       return TypeInt::make((jint)lo << (jint)shift,
 916                            (jint)hi << (jint)shift,
 917                            MAX2(r1->_widen,r2->_widen));
 918     }
 919     return TypeInt::INT;
 920   }
 921 
 922   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 923 }
 924 
 925 //=============================================================================
 926 //------------------------------Identity---------------------------------------
 927 Node* LShiftLNode::Identity(PhaseGVN* phase) {
 928   int count = 0;
 929   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaLong - 1)) == 0) {
 930     // Shift by a multiple of 64 does nothing
 931     return in(1);
 932   }
 933   return this;
 934 }
 935 
 936 //------------------------------Ideal------------------------------------------
 937 // If the right input is a constant, and the left input is an add of a
 938 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 939 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 940   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
 941   if (con == 0) {
 942     return NULL;
 943   }
 944 
 945   // Left input is an add?
 946   Node *add1 = in(1);
 947   int add1_op = add1->Opcode();
 948   if( add1_op == Op_AddL ) {    // Left input is an add?
 949     // Avoid dead data cycles from dead loops
 950     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 951 
 952     // Left input is an add of the same number?
 953     if (con != (BitsPerJavaLong - 1) && add1->in(1) == add1->in(2)) {
 954       // Convert "(x + x) << c0" into "x << (c0 + 1)"
 955       // Can only be applied if c0 != 63 because:
 956       // (x + x) << 63 = 2x << 63, while
 957       // (x + x) << 63 --transform--> x << 64 = x << 0 = x (!= 2x << 63, for example for x = 1)
 958       // According to the Java spec, chapter 15.19, we only consider the six lowest-order bits of the right-hand operand
 959       // (i.e. "right-hand operand" & 0b111111). Therefore, x << 64 is the same as x << 0 (64 = 0b10000000 & 0b0111111 = 0).
 960       return new LShiftLNode(add1->in(1), phase->intcon(con + 1));
 961     }
 962 
 963     // Left input is an add of a constant?
 964     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 965     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 966       // Compute X << con0
 967       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
 968       // Compute X<<con0 + (con1<<con0)
 969       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
 970     }
 971   }
 972 
 973   // Check for "(x>>c0)<<c0" which just masks off low bits
 974   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 975       add1->in(2) == in(2) )
 976     // Convert to "(x & -(1<<c0))"
 977     return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
 978 
 979   // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
 980   if( add1_op == Op_AndL ) {
 981     Node *add2 = add1->in(1);
 982     int add2_op = add2->Opcode();
 983     if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
 984         add2->in(2) == in(2) ) {
 985       // Convert to "(x & (Y<<c0))"
 986       Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
 987       return new AndLNode( add2->in(1), y_sh );
 988     }
 989   }
 990 
 991   // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
 992   // before shifting them away.
 993   const jlong bits_mask = jlong(max_julong >> con);
 994   if( add1_op == Op_AndL &&
 995       phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
 996     return new LShiftLNode( add1->in(1), in(2) );
 997 
 998   return NULL;
 999 }
1000 
1001 //------------------------------Value------------------------------------------
1002 // A LShiftLNode shifts its input2 left by input1 amount.
1003 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
1004   const Type *t1 = phase->type( in(1) );
1005   const Type *t2 = phase->type( in(2) );
1006   // Either input is TOP ==> the result is TOP
1007   if( t1 == Type::TOP ) return Type::TOP;
1008   if( t2 == Type::TOP ) return Type::TOP;
1009 
1010   // Left input is ZERO ==> the result is ZERO.
1011   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1012   // Shift by zero does nothing
1013   if( t2 == TypeInt::ZERO ) return t1;
1014 
1015   // Either input is BOTTOM ==> the result is BOTTOM
1016   if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
1017       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
1018     return TypeLong::LONG;
1019 
1020   const TypeLong *r1 = t1->is_long(); // Handy access
1021   const TypeInt  *r2 = t2->is_int();  // Handy access
1022 
1023   if (!r2->is_con())
1024     return TypeLong::LONG;
1025 
1026   uint shift = r2->get_con();
1027   shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
1028   // Shift by a multiple of 64 does nothing:
1029   if (shift == 0)  return t1;
1030 
1031   // If the shift is a constant, shift the bounds of the type,
1032   // unless this could lead to an overflow.
1033   if (!r1->is_con()) {
1034     jlong lo = r1->_lo, hi = r1->_hi;
1035     if (((lo << shift) >> shift) == lo &&
1036         ((hi << shift) >> shift) == hi) {
1037       // No overflow.  The range shifts up cleanly.
1038       return TypeLong::make((jlong)lo << (jint)shift,
1039                             (jlong)hi << (jint)shift,
1040                             MAX2(r1->_widen,r2->_widen));
1041     }
1042     return TypeLong::LONG;
1043   }
1044 
1045   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
1046 }
1047 
1048 //=============================================================================
1049 //------------------------------Identity---------------------------------------
1050 Node* RShiftINode::Identity(PhaseGVN* phase) {
1051   int count = 0;
1052   if (const_shift_count(phase, this, &count)) {
1053     if ((count & (BitsPerJavaInteger - 1)) == 0) {
1054       // Shift by a multiple of 32 does nothing
1055       return in(1);
1056     }
1057     // Check for useless sign-masking
1058     if (in(1)->Opcode() == Op_LShiftI &&
1059         in(1)->req() == 3 &&
1060         in(1)->in(2) == in(2)) {
1061       count &= BitsPerJavaInteger-1; // semantics of Java shifts
1062       // Compute masks for which this shifting doesn't change
1063       int lo = (-1 << (BitsPerJavaInteger - ((uint)count)-1)); // FFFF8000
1064       int hi = ~lo;               // 00007FFF
1065       const TypeInt* t11 = phase->type(in(1)->in(1))->isa_int();
1066       if (t11 == NULL) {
1067         return this;
1068       }
1069       // Does actual value fit inside of mask?
1070       if (lo <= t11->_lo && t11->_hi <= hi) {
1071         return in(1)->in(1);      // Then shifting is a nop
1072       }
1073     }
1074   }
1075   return this;
1076 }
1077 
1078 //------------------------------Ideal------------------------------------------
1079 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1080   // Inputs may be TOP if they are dead.
1081   const TypeInt *t1 = phase->type(in(1))->isa_int();
1082   if (!t1) return NULL;        // Left input is an integer
1083   const TypeInt *t3;  // type of in(1).in(2)
1084   int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
1085   if (shift == 0) {
1086     return NULL;
1087   }
1088 
1089   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
1090   // Such expressions arise normally from shift chains like (byte)(x >> 24).
1091   const Node *mask = in(1);
1092   if( mask->Opcode() == Op_AndI &&
1093       (t3 = phase->type(mask->in(2))->isa_int()) &&
1094       t3->is_con() ) {
1095     Node *x = mask->in(1);
1096     jint maskbits = t3->get_con();
1097     // Convert to "(x >> shift) & (mask >> shift)"
1098     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
1099     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
1100   }
1101 
1102   // Check for "(short[i] <<16)>>16" which simply sign-extends
1103   const Node *shl = in(1);
1104   if( shl->Opcode() != Op_LShiftI ) return NULL;
1105 
1106   if( shift == 16 &&
1107       (t3 = phase->type(shl->in(2))->isa_int()) &&
1108       t3->is_con(16) ) {
1109     Node *ld = shl->in(1);
1110     if( ld->Opcode() == Op_LoadS ) {
1111       // Sign extension is just useless here.  Return a RShiftI of zero instead
1112       // returning 'ld' directly.  We cannot return an old Node directly as
1113       // that is the job of 'Identity' calls and Identity calls only work on
1114       // direct inputs ('ld' is an extra Node removed from 'this').  The
1115       // combined optimization requires Identity only return direct inputs.
1116       set_req_X(1, ld, phase);
1117       set_req_X(2, phase->intcon(0), phase);
1118       return this;
1119     }
1120     else if (can_reshape &&
1121              ld->Opcode() == Op_LoadUS &&
1122              ld->outcnt() == 1 && ld->unique_out() == shl)
1123       // Replace zero-extension-load with sign-extension-load
1124       return ld->as_Load()->convert_to_signed_load(*phase);
1125   }
1126 
1127   // Check for "(byte[i] <<24)>>24" which simply sign-extends
1128   if( shift == 24 &&
1129       (t3 = phase->type(shl->in(2))->isa_int()) &&
1130       t3->is_con(24) ) {
1131     Node *ld = shl->in(1);
1132     if (ld->Opcode() == Op_LoadB) {
1133       // Sign extension is just useless here
1134       set_req_X(1, ld, phase);
1135       set_req_X(2, phase->intcon(0), phase);
1136       return this;
1137     }
1138   }
1139 
1140   return NULL;
1141 }
1142 
1143 //------------------------------Value------------------------------------------
1144 // A RShiftINode shifts its input2 right by input1 amount.
1145 const Type* RShiftINode::Value(PhaseGVN* phase) const {
1146   const Type *t1 = phase->type( in(1) );
1147   const Type *t2 = phase->type( in(2) );
1148   // Either input is TOP ==> the result is TOP
1149   if( t1 == Type::TOP ) return Type::TOP;
1150   if( t2 == Type::TOP ) return Type::TOP;
1151 
1152   // Left input is ZERO ==> the result is ZERO.
1153   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1154   // Shift by zero does nothing
1155   if( t2 == TypeInt::ZERO ) return t1;
1156 
1157   // Either input is BOTTOM ==> the result is BOTTOM
1158   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1159     return TypeInt::INT;
1160 
1161   if (t2 == TypeInt::INT)
1162     return TypeInt::INT;
1163 
1164   const TypeInt *r1 = t1->is_int(); // Handy access
1165   const TypeInt *r2 = t2->is_int(); // Handy access
1166 
1167   // If the shift is a constant, just shift the bounds of the type.
1168   // For example, if the shift is 31, we just propagate sign bits.
1169   if (r2->is_con()) {
1170     uint shift = r2->get_con();
1171     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1172     // Shift by a multiple of 32 does nothing:
1173     if (shift == 0)  return t1;
1174     // Calculate reasonably aggressive bounds for the result.
1175     // This is necessary if we are to correctly type things
1176     // like (x<<24>>24) == ((byte)x).
1177     jint lo = (jint)r1->_lo >> (jint)shift;
1178     jint hi = (jint)r1->_hi >> (jint)shift;
1179     assert(lo <= hi, "must have valid bounds");
1180     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1181 #ifdef ASSERT
1182     // Make sure we get the sign-capture idiom correct.
1183     if (shift == BitsPerJavaInteger-1) {
1184       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
1185       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1186     }
1187 #endif
1188     return ti;
1189   }
1190 
1191   if( !r1->is_con() || !r2->is_con() )
1192     return TypeInt::INT;
1193 
1194   // Signed shift right
1195   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1196 }
1197 
1198 //=============================================================================
1199 //------------------------------Identity---------------------------------------
1200 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1201   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1202   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1203 }
1204 
1205 //------------------------------Value------------------------------------------
1206 // A RShiftLNode shifts its input2 right by input1 amount.
1207 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1208   const Type *t1 = phase->type( in(1) );
1209   const Type *t2 = phase->type( in(2) );
1210   // Either input is TOP ==> the result is TOP
1211   if( t1 == Type::TOP ) return Type::TOP;
1212   if( t2 == Type::TOP ) return Type::TOP;
1213 
1214   // Left input is ZERO ==> the result is ZERO.
1215   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1216   // Shift by zero does nothing
1217   if( t2 == TypeInt::ZERO ) return t1;
1218 
1219   // Either input is BOTTOM ==> the result is BOTTOM
1220   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1221     return TypeLong::LONG;
1222 
1223   if (t2 == TypeInt::INT)
1224     return TypeLong::LONG;
1225 
1226   const TypeLong *r1 = t1->is_long(); // Handy access
1227   const TypeInt  *r2 = t2->is_int (); // Handy access
1228 
1229   // If the shift is a constant, just shift the bounds of the type.
1230   // For example, if the shift is 63, we just propagate sign bits.
1231   if (r2->is_con()) {
1232     uint shift = r2->get_con();
1233     shift &= (2*BitsPerJavaInteger)-1;  // semantics of Java shifts
1234     // Shift by a multiple of 64 does nothing:
1235     if (shift == 0)  return t1;
1236     // Calculate reasonably aggressive bounds for the result.
1237     // This is necessary if we are to correctly type things
1238     // like (x<<24>>24) == ((byte)x).
1239     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1240     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1241     assert(lo <= hi, "must have valid bounds");
1242     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1243     #ifdef ASSERT
1244     // Make sure we get the sign-capture idiom correct.
1245     if (shift == (2*BitsPerJavaInteger)-1) {
1246       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1247       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1248     }
1249     #endif
1250     return tl;
1251   }
1252 
1253   return TypeLong::LONG;                // Give up
1254 }
1255 
1256 //=============================================================================
1257 //------------------------------Identity---------------------------------------
1258 Node* URShiftINode::Identity(PhaseGVN* phase) {
1259   int count = 0;
1260   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaInteger - 1)) == 0) {
1261     // Shift by a multiple of 32 does nothing
1262     return in(1);
1263   }
1264 
1265   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1266   // Happens during new-array length computation.
1267   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1268   Node *add = in(1);
1269   if (add->Opcode() == Op_AddI) {
1270     const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1271     if (t2 && t2->is_con(wordSize - 1) &&
1272         add->in(1)->Opcode() == Op_LShiftI) {
1273       // Check that shift_counts are LogBytesPerWord.
1274       Node          *lshift_count   = add->in(1)->in(2);
1275       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1276       if (t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1277           t_lshift_count == phase->type(in(2))) {
1278         Node          *x   = add->in(1)->in(1);
1279         const TypeInt *t_x = phase->type(x)->isa_int();
1280         if (t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord)) {
1281           return x;
1282         }
1283       }
1284     }
1285   }
1286 
1287   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1288 }
1289 
1290 //------------------------------Ideal------------------------------------------
1291 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1292   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1293   if (con == 0) {
1294     return NULL;
1295   }
1296 
1297   // We'll be wanting the right-shift amount as a mask of that many bits
1298   const int mask = right_n_bits(BitsPerJavaInteger - con);
1299 
1300   int in1_op = in(1)->Opcode();
1301 
1302   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1303   if( in1_op == Op_URShiftI ) {
1304     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1305     if( t12 && t12->is_con() ) { // Right input is a constant
1306       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1307       const int con2 = t12->get_con() & 31; // Shift count is always masked
1308       const int con3 = con+con2;
1309       if( con3 < 32 )           // Only merge shifts if total is < 32
1310         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1311     }
1312   }
1313 
1314   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1315   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1316   // If Q is "X << z" the rounding is useless.  Look for patterns like
1317   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1318   Node *add = in(1);
1319   const TypeInt *t2 = phase->type(in(2))->isa_int();
1320   if (in1_op == Op_AddI) {
1321     Node *lshl = add->in(1);
1322     if( lshl->Opcode() == Op_LShiftI &&
1323         phase->type(lshl->in(2)) == t2 ) {
1324       Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1325       Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1326       return new AndINode( sum, phase->intcon(mask) );
1327     }
1328   }
1329 
1330   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1331   // This shortens the mask.  Also, if we are extracting a high byte and
1332   // storing it to a buffer, the mask will be removed completely.
1333   Node *andi = in(1);
1334   if( in1_op == Op_AndI ) {
1335     const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1336     if( t3 && t3->is_con() ) { // Right input is a constant
1337       jint mask2 = t3->get_con();
1338       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1339       Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1340       return new AndINode(newshr, phase->intcon(mask2));
1341       // The negative values are easier to materialize than positive ones.
1342       // A typical case from address arithmetic is ((x & ~15) >> 4).
1343       // It's better to change that to ((x >> 4) & ~0) versus
1344       // ((x >> 4) & 0x0FFFFFFF).  The difference is greatest in LP64.
1345     }
1346   }
1347 
1348   // Check for "(X << z ) >>> z" which simply zero-extends
1349   Node *shl = in(1);
1350   if( in1_op == Op_LShiftI &&
1351       phase->type(shl->in(2)) == t2 )
1352     return new AndINode( shl->in(1), phase->intcon(mask) );
1353 
1354   // Check for (x >> n) >>> 31. Replace with (x >>> 31)
1355   Node *shr = in(1);
1356   if ( in1_op == Op_RShiftI ) {
1357     Node *in11 = shr->in(1);
1358     Node *in12 = shr->in(2);
1359     const TypeInt *t11 = phase->type(in11)->isa_int();
1360     const TypeInt *t12 = phase->type(in12)->isa_int();
1361     if ( t11 && t2 && t2->is_con(31) && t12 && t12->is_con() ) {
1362       return new URShiftINode(in11, phase->intcon(31));
1363     }
1364   }
1365 
1366   return NULL;
1367 }
1368 
1369 //------------------------------Value------------------------------------------
1370 // A URShiftINode shifts its input2 right by input1 amount.
1371 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1372   // (This is a near clone of RShiftINode::Value.)
1373   const Type *t1 = phase->type( in(1) );
1374   const Type *t2 = phase->type( in(2) );
1375   // Either input is TOP ==> the result is TOP
1376   if( t1 == Type::TOP ) return Type::TOP;
1377   if( t2 == Type::TOP ) return Type::TOP;
1378 
1379   // Left input is ZERO ==> the result is ZERO.
1380   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1381   // Shift by zero does nothing
1382   if( t2 == TypeInt::ZERO ) return t1;
1383 
1384   // Either input is BOTTOM ==> the result is BOTTOM
1385   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1386     return TypeInt::INT;
1387 
1388   if (t2 == TypeInt::INT)
1389     return TypeInt::INT;
1390 
1391   const TypeInt *r1 = t1->is_int();     // Handy access
1392   const TypeInt *r2 = t2->is_int();     // Handy access
1393 
1394   if (r2->is_con()) {
1395     uint shift = r2->get_con();
1396     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1397     // Shift by a multiple of 32 does nothing:
1398     if (shift == 0)  return t1;
1399     // Calculate reasonably aggressive bounds for the result.
1400     jint lo = (juint)r1->_lo >> (juint)shift;
1401     jint hi = (juint)r1->_hi >> (juint)shift;
1402     if (r1->_hi >= 0 && r1->_lo < 0) {
1403       // If the type has both negative and positive values,
1404       // there are two separate sub-domains to worry about:
1405       // The positive half and the negative half.
1406       jint neg_lo = lo;
1407       jint neg_hi = (juint)-1 >> (juint)shift;
1408       jint pos_lo = (juint) 0 >> (juint)shift;
1409       jint pos_hi = hi;
1410       lo = MIN2(neg_lo, pos_lo);  // == 0
1411       hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1412     }
1413     assert(lo <= hi, "must have valid bounds");
1414     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1415     #ifdef ASSERT
1416     // Make sure we get the sign-capture idiom correct.
1417     if (shift == BitsPerJavaInteger-1) {
1418       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1419       if (r1->_hi < 0)  assert(ti == TypeInt::ONE,  ">>>31 of - is +1");
1420     }
1421     #endif
1422     return ti;
1423   }
1424 
1425   //
1426   // Do not support shifted oops in info for GC
1427   //
1428   // else if( t1->base() == Type::InstPtr ) {
1429   //
1430   //   const TypeInstPtr *o = t1->is_instptr();
1431   //   if( t1->singleton() )
1432   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1433   // }
1434   // else if( t1->base() == Type::KlassPtr ) {
1435   //   const TypeKlassPtr *o = t1->is_klassptr();
1436   //   if( t1->singleton() )
1437   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1438   // }
1439 
1440   return TypeInt::INT;
1441 }
1442 
1443 //=============================================================================
1444 //------------------------------Identity---------------------------------------
1445 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1446   int count = 0;
1447   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaLong - 1)) == 0) {
1448     // Shift by a multiple of 64 does nothing
1449     return in(1);
1450   }
1451   return this;
1452 }
1453 
1454 //------------------------------Ideal------------------------------------------
1455 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1456   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1457   if (con == 0) {
1458     return NULL;
1459   }
1460 
1461   // We'll be wanting the right-shift amount as a mask of that many bits
1462   const jlong mask = jlong(max_julong >> con);
1463 
1464   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1465   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1466   // If Q is "X << z" the rounding is useless.  Look for patterns like
1467   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1468   Node *add = in(1);
1469   const TypeInt *t2 = phase->type(in(2))->isa_int();
1470   if (add->Opcode() == Op_AddL) {
1471     Node *lshl = add->in(1);
1472     if( lshl->Opcode() == Op_LShiftL &&
1473         phase->type(lshl->in(2)) == t2 ) {
1474       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1475       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1476       return new AndLNode( sum, phase->longcon(mask) );
1477     }
1478   }
1479 
1480   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1481   // This shortens the mask.  Also, if we are extracting a high byte and
1482   // storing it to a buffer, the mask will be removed completely.
1483   Node *andi = in(1);
1484   if( andi->Opcode() == Op_AndL ) {
1485     const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1486     if( t3 && t3->is_con() ) { // Right input is a constant
1487       jlong mask2 = t3->get_con();
1488       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1489       Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1490       return new AndLNode(newshr, phase->longcon(mask2));
1491     }
1492   }
1493 
1494   // Check for "(X << z ) >>> z" which simply zero-extends
1495   Node *shl = in(1);
1496   if( shl->Opcode() == Op_LShiftL &&
1497       phase->type(shl->in(2)) == t2 )
1498     return new AndLNode( shl->in(1), phase->longcon(mask) );
1499 
1500   // Check for (x >> n) >>> 63. Replace with (x >>> 63)
1501   Node *shr = in(1);
1502   if ( shr->Opcode() == Op_RShiftL ) {
1503     Node *in11 = shr->in(1);
1504     Node *in12 = shr->in(2);
1505     const TypeLong *t11 = phase->type(in11)->isa_long();
1506     const TypeInt *t12 = phase->type(in12)->isa_int();
1507     if ( t11 && t2 && t2->is_con(63) && t12 && t12->is_con() ) {
1508       return new URShiftLNode(in11, phase->intcon(63));
1509     }
1510   }
1511   return NULL;
1512 }
1513 
1514 //------------------------------Value------------------------------------------
1515 // A URShiftINode shifts its input2 right by input1 amount.
1516 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1517   // (This is a near clone of RShiftLNode::Value.)
1518   const Type *t1 = phase->type( in(1) );
1519   const Type *t2 = phase->type( in(2) );
1520   // Either input is TOP ==> the result is TOP
1521   if( t1 == Type::TOP ) return Type::TOP;
1522   if( t2 == Type::TOP ) return Type::TOP;
1523 
1524   // Left input is ZERO ==> the result is ZERO.
1525   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1526   // Shift by zero does nothing
1527   if( t2 == TypeInt::ZERO ) return t1;
1528 
1529   // Either input is BOTTOM ==> the result is BOTTOM
1530   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1531     return TypeLong::LONG;
1532 
1533   if (t2 == TypeInt::INT)
1534     return TypeLong::LONG;
1535 
1536   const TypeLong *r1 = t1->is_long(); // Handy access
1537   const TypeInt  *r2 = t2->is_int (); // Handy access
1538 
1539   if (r2->is_con()) {
1540     uint shift = r2->get_con();
1541     shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
1542     // Shift by a multiple of 64 does nothing:
1543     if (shift == 0)  return t1;
1544     // Calculate reasonably aggressive bounds for the result.
1545     jlong lo = (julong)r1->_lo >> (juint)shift;
1546     jlong hi = (julong)r1->_hi >> (juint)shift;
1547     if (r1->_hi >= 0 && r1->_lo < 0) {
1548       // If the type has both negative and positive values,
1549       // there are two separate sub-domains to worry about:
1550       // The positive half and the negative half.
1551       jlong neg_lo = lo;
1552       jlong neg_hi = (julong)-1 >> (juint)shift;
1553       jlong pos_lo = (julong) 0 >> (juint)shift;
1554       jlong pos_hi = hi;
1555       //lo = MIN2(neg_lo, pos_lo);  // == 0
1556       lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1557       //hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1558       hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1559     }
1560     assert(lo <= hi, "must have valid bounds");
1561     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1562     #ifdef ASSERT
1563     // Make sure we get the sign-capture idiom correct.
1564     if (shift == BitsPerJavaLong - 1) {
1565       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1566       if (r1->_hi < 0)  assert(tl == TypeLong::ONE,  ">>>63 of - is +1");
1567     }
1568     #endif
1569     return tl;
1570   }
1571 
1572   return TypeLong::LONG;                // Give up
1573 }
1574 
1575 //=============================================================================
1576 //------------------------------Value------------------------------------------
1577 const Type* FmaDNode::Value(PhaseGVN* phase) const {
1578   const Type *t1 = phase->type(in(1));
1579   if (t1 == Type::TOP) return Type::TOP;
1580   if (t1->base() != Type::DoubleCon) return Type::DOUBLE;
1581   const Type *t2 = phase->type(in(2));
1582   if (t2 == Type::TOP) return Type::TOP;
1583   if (t2->base() != Type::DoubleCon) return Type::DOUBLE;
1584   const Type *t3 = phase->type(in(3));
1585   if (t3 == Type::TOP) return Type::TOP;
1586   if (t3->base() != Type::DoubleCon) return Type::DOUBLE;
1587 #ifndef __STDC_IEC_559__
1588   return Type::DOUBLE;
1589 #else
1590   double d1 = t1->getd();
1591   double d2 = t2->getd();
1592   double d3 = t3->getd();
1593   return TypeD::make(fma(d1, d2, d3));
1594 #endif
1595 }
1596 
1597 //=============================================================================
1598 //------------------------------Value------------------------------------------
1599 const Type* FmaFNode::Value(PhaseGVN* phase) const {
1600   const Type *t1 = phase->type(in(1));
1601   if (t1 == Type::TOP) return Type::TOP;
1602   if (t1->base() != Type::FloatCon) return Type::FLOAT;
1603   const Type *t2 = phase->type(in(2));
1604   if (t2 == Type::TOP) return Type::TOP;
1605   if (t2->base() != Type::FloatCon) return Type::FLOAT;
1606   const Type *t3 = phase->type(in(3));
1607   if (t3 == Type::TOP) return Type::TOP;
1608   if (t3->base() != Type::FloatCon) return Type::FLOAT;
1609 #ifndef __STDC_IEC_559__
1610   return Type::FLOAT;
1611 #else
1612   float f1 = t1->getf();
1613   float f2 = t2->getf();
1614   float f3 = t3->getf();
1615   return TypeF::make(fma(f1, f2, f3));
1616 #endif
1617 }
1618 
1619 //=============================================================================
1620 //------------------------------hash-------------------------------------------
1621 // Hash function for MulAddS2INode.  Operation is commutative with commutative pairs.
1622 // The hash function must return the same value when edge swapping is performed.
1623 uint MulAddS2INode::hash() const {
1624   return (uintptr_t)in(1) + (uintptr_t)in(2) + (uintptr_t)in(3) + (uintptr_t)in(4) + Opcode();
1625 }
1626 
1627 //------------------------------Rotate Operations ------------------------------
1628 
1629 Node* RotateLeftNode::Identity(PhaseGVN* phase) {
1630   const Type* t1 = phase->type(in(1));
1631   if (t1 == Type::TOP) {
1632     return this;
1633   }
1634   int count = 0;
1635   assert(t1->isa_int() || t1->isa_long(), "Unexpected type");
1636   int mask = (t1->isa_int() ? BitsPerJavaInteger : BitsPerJavaLong) - 1;
1637   if (const_shift_count(phase, this, &count) && (count & mask) == 0) {
1638     // Rotate by a multiple of 32/64 does nothing
1639     return in(1);
1640   }
1641   return this;
1642 }
1643 
1644 const Type* RotateLeftNode::Value(PhaseGVN* phase) const {
1645   const Type* t1 = phase->type(in(1));
1646   const Type* t2 = phase->type(in(2));
1647   // Either input is TOP ==> the result is TOP
1648   if (t1 == Type::TOP || t2 == Type::TOP) {
1649     return Type::TOP;
1650   }
1651 
1652   if (t1->isa_int()) {
1653     const TypeInt* r1 = t1->is_int();
1654     const TypeInt* r2 = t2->is_int();
1655 
1656     // Left input is ZERO ==> the result is ZERO.
1657     if (r1 == TypeInt::ZERO) {
1658       return TypeInt::ZERO;
1659     }
1660     // Rotate by zero does nothing
1661     if (r2 == TypeInt::ZERO) {
1662       return r1;
1663     }
1664     if (r1->is_con() && r2->is_con()) {
1665       juint r1_con = (juint)r1->get_con();
1666       juint shift = (juint)(r2->get_con()) & (juint)(BitsPerJavaInteger - 1); // semantics of Java shifts
1667       return TypeInt::make((r1_con << shift) | (r1_con >> (32 - shift)));
1668     }
1669     return TypeInt::INT;
1670   } else {
1671     assert(t1->isa_long(), "Type must be a long");
1672     const TypeLong* r1 = t1->is_long();
1673     const TypeInt*  r2 = t2->is_int();
1674 
1675     // Left input is ZERO ==> the result is ZERO.
1676     if (r1 == TypeLong::ZERO) {
1677       return TypeLong::ZERO;
1678     }
1679     // Rotate by zero does nothing
1680     if (r2 == TypeInt::ZERO) {
1681       return r1;
1682     }
1683     if (r1->is_con() && r2->is_con()) {
1684       julong r1_con = (julong)r1->get_con();
1685       julong shift = (julong)(r2->get_con()) & (julong)(BitsPerJavaLong - 1); // semantics of Java shifts
1686       return TypeLong::make((r1_con << shift) | (r1_con >> (64 - shift)));
1687     }
1688     return TypeLong::LONG;
1689   }
1690 }
1691 
1692 Node* RotateLeftNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1693   const Type* t1 = phase->type(in(1));
1694   const Type* t2 = phase->type(in(2));
1695   if (t2->isa_int() && t2->is_int()->is_con()) {
1696     if (t1->isa_int()) {
1697       int lshift = t2->is_int()->get_con() & 31;
1698       return new RotateRightNode(in(1), phase->intcon(32 - (lshift & 31)), TypeInt::INT);
1699     } else if (t1 != Type::TOP) {
1700       assert(t1->isa_long(), "Type must be a long");
1701       int lshift = t2->is_int()->get_con() & 63;
1702       return new RotateRightNode(in(1), phase->intcon(64 - (lshift & 63)), TypeLong::LONG);
1703     }
1704   }
1705   return NULL;
1706 }
1707 
1708 Node* RotateRightNode::Identity(PhaseGVN* phase) {
1709   const Type* t1 = phase->type(in(1));
1710   if (t1 == Type::TOP) {
1711     return this;
1712   }
1713   int count = 0;
1714   assert(t1->isa_int() || t1->isa_long(), "Unexpected type");
1715   int mask = (t1->isa_int() ? BitsPerJavaInteger : BitsPerJavaLong) - 1;
1716   if (const_shift_count(phase, this, &count) && (count & mask) == 0) {
1717     // Rotate by a multiple of 32/64 does nothing
1718     return in(1);
1719   }
1720   return this;
1721 }
1722 
1723 const Type* RotateRightNode::Value(PhaseGVN* phase) const {
1724   const Type* t1 = phase->type(in(1));
1725   const Type* t2 = phase->type(in(2));
1726   // Either input is TOP ==> the result is TOP
1727   if (t1 == Type::TOP || t2 == Type::TOP) {
1728     return Type::TOP;
1729   }
1730 
1731   if (t1->isa_int()) {
1732     const TypeInt* r1 = t1->is_int();
1733     const TypeInt* r2 = t2->is_int();
1734 
1735     // Left input is ZERO ==> the result is ZERO.
1736     if (r1 == TypeInt::ZERO) {
1737       return TypeInt::ZERO;
1738     }
1739     // Rotate by zero does nothing
1740     if (r2 == TypeInt::ZERO) {
1741       return r1;
1742     }
1743     if (r1->is_con() && r2->is_con()) {
1744       juint r1_con = (juint)r1->get_con();
1745       juint shift = (juint)(r2->get_con()) & (juint)(BitsPerJavaInteger - 1); // semantics of Java shifts
1746       return TypeInt::make((r1_con >> shift) | (r1_con << (32 - shift)));
1747     }
1748     return TypeInt::INT;
1749   } else {
1750     assert(t1->isa_long(), "Type must be a long");
1751     const TypeLong* r1 = t1->is_long();
1752     const TypeInt*  r2 = t2->is_int();
1753     // Left input is ZERO ==> the result is ZERO.
1754     if (r1 == TypeLong::ZERO) {
1755       return TypeLong::ZERO;
1756     }
1757     // Rotate by zero does nothing
1758     if (r2 == TypeInt::ZERO) {
1759       return r1;
1760     }
1761     if (r1->is_con() && r2->is_con()) {
1762       julong r1_con = (julong)r1->get_con();
1763       julong shift = (julong)(r2->get_con()) & (julong)(BitsPerJavaLong - 1); // semantics of Java shifts
1764       return TypeLong::make((r1_con >> shift) | (r1_con << (64 - shift)));
1765     }
1766     return TypeLong::LONG;
1767   }
1768 }
1769 
1770 // Given an expression (AndX shift mask) or (AndX mask shift),
1771 // determine if the AndX must always produce zero, because the
1772 // the shift (x<<N) is bitwise disjoint from the mask #M.
1773 // The X in AndX must be I or L, depending on bt.
1774 // Specifically, the following cases fold to zero,
1775 // when the shift value N is large enough to zero out
1776 // all the set positions of the and-mask M.
1777 //   (AndI (LShiftI _ #N) #M) => #0
1778 //   (AndL (LShiftL _ #N) #M) => #0
1779 //   (AndL (ConvI2L (LShiftI _ #N)) #M) => #0
1780 // The M and N values must satisfy ((-1 << N) & M) == 0.
1781 // Because the optimization might work for a non-constant
1782 // mask M, we check the AndX for both operand orders.
1783 bool MulNode::AndIL_shift_and_mask_is_always_zero(PhaseGVN* phase, Node* shift, Node* mask, BasicType bt, bool check_reverse) {
1784   if (mask == NULL || shift == NULL) {
1785     return false;
1786   }
1787   shift = shift->uncast();
1788   if (shift == NULL) {
1789     return false;
1790   }
1791   const TypeInteger* mask_t = phase->type(mask)->isa_integer(bt);
1792   const TypeInteger* shift_t = phase->type(shift)->isa_integer(bt);
1793   if (mask_t == NULL || shift_t == NULL) {
1794     return false;
1795   }
1796   BasicType shift_bt = bt;
1797   if (bt == T_LONG && shift->Opcode() == Op_ConvI2L) {
1798     bt = T_INT;
1799     Node* val = shift->in(1);
1800     if (val == NULL) {
1801       return false;
1802     }
1803     val = val->uncast();
1804     if (val == NULL) {
1805       return false;
1806     }
1807     if (val->Opcode() == Op_LShiftI) {
1808       shift_bt = T_INT;
1809       shift = val;
1810     }
1811   }
1812   if (shift->Opcode() != Op_LShift(shift_bt)) {
1813     if (check_reverse &&
1814         (mask->Opcode() == Op_LShift(bt) ||
1815          (bt == T_LONG && mask->Opcode() == Op_ConvI2L))) {
1816       // try it the other way around
1817       return AndIL_shift_and_mask_is_always_zero(phase, mask, shift, bt, false);
1818     }
1819     return false;
1820   }
1821   Node* shift2 = shift->in(2);
1822   if (shift2 == NULL) {
1823     return false;
1824   }
1825   const Type* shift2_t = phase->type(shift2);
1826   if (!shift2_t->isa_int() || !shift2_t->is_int()->is_con()) {
1827     return false;
1828   }
1829 
1830   jint shift_con = shift2_t->is_int()->get_con() & ((shift_bt == T_INT ? BitsPerJavaInteger : BitsPerJavaLong) - 1);
1831   if ((((jlong)1) << shift_con) > mask_t->hi_as_long() && mask_t->lo_as_long() >= 0) {
1832     return true;
1833   }
1834 
1835   return false;
1836 }
1837 
1838 // Given an expression (AndX (AddX v1 (LShiftX v2 #N)) #M)
1839 // determine if the AndX must always produce (AndX v1 #M),
1840 // because the shift (v2<<N) is bitwise disjoint from the mask #M.
1841 // The X in AndX will be I or L, depending on bt.
1842 // Specifically, the following cases fold,
1843 // when the shift value N is large enough to zero out
1844 // all the set positions of the and-mask M.
1845 //   (AndI (AddI v1 (LShiftI _ #N)) #M) => (AndI v1 #M)
1846 //   (AndL (AddI v1 (LShiftL _ #N)) #M) => (AndL v1 #M)
1847 //   (AndL (AddL v1 (ConvI2L (LShiftI _ #N))) #M) => (AndL v1 #M)
1848 // The M and N values must satisfy ((-1 << N) & M) == 0.
1849 // Because the optimization might work for a non-constant
1850 // mask M, and because the AddX operands can come in either
1851 // order, we check for every operand order.
1852 Node* MulNode::AndIL_add_shift_and_mask(PhaseGVN* phase, BasicType bt) {
1853   Node* add = in(1);
1854   Node* mask = in(2);
1855   if (add == NULL || mask == NULL) {
1856     return NULL;
1857   }
1858   int addidx = 0;
1859   if (add->Opcode() == Op_Add(bt)) {
1860     addidx = 1;
1861   } else if (mask->Opcode() == Op_Add(bt)) {
1862     mask = add;
1863     addidx = 2;
1864     add = in(addidx);
1865   }
1866   if (addidx > 0) {
1867     Node* add1 = add->in(1);
1868     Node* add2 = add->in(2);
1869     if (add1 != NULL && add2 != NULL) {
1870       if (AndIL_shift_and_mask_is_always_zero(phase, add1, mask, bt, false)) {
1871         set_req_X(addidx, add2, phase);
1872         return this;
1873       } else if (AndIL_shift_and_mask_is_always_zero(phase, add2, mask, bt, false)) {
1874         set_req_X(addidx, add1, phase);
1875         return this;
1876       }
1877     }
1878   }
1879   return NULL;
1880 }