1 /*
2 * Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/convertnode.hpp"
30 #include "opto/memnode.hpp"
31 #include "opto/mulnode.hpp"
32 #include "opto/phaseX.hpp"
33 #include "opto/subnode.hpp"
34 #include "utilities/powerOfTwo.hpp"
35
36 // Portions of code courtesy of Clifford Click
37
38
39 //=============================================================================
40 //------------------------------hash-------------------------------------------
41 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
42 // (commute) inputs to MulNodes willy-nilly so the hash function must return
43 // the same value in the presence of edge swapping.
44 uint MulNode::hash() const {
45 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
46 }
47
48 //------------------------------Identity---------------------------------------
49 // Multiplying a one preserves the other argument
50 Node* MulNode::Identity(PhaseGVN* phase) {
51 const Type *one = mul_id(); // The multiplicative identity
52 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
53 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
54
55 return this;
56 }
57
58 //------------------------------Ideal------------------------------------------
59 // We also canonicalize the Node, moving constants to the right input,
60 // and flatten expressions (so that 1+x+2 becomes x+3).
61 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
62 Node* in1 = in(1);
63 Node* in2 = in(2);
64 Node* progress = NULL; // Progress flag
65
66 // This code is used by And nodes too, but some conversions are
67 // only valid for the actual Mul nodes.
68 uint op = Opcode();
69 bool real_mul = (op == Op_MulI) || (op == Op_MulL) ||
70 (op == Op_MulF) || (op == Op_MulD);
71
72 // Convert "(-a)*(-b)" into "a*b".
73 if (real_mul && in1->is_Sub() && in2->is_Sub()) {
74 if (phase->type(in1->in(1))->is_zero_type() &&
75 phase->type(in2->in(1))->is_zero_type()) {
76 set_req_X(1, in1->in(2), phase);
77 set_req_X(2, in2->in(2), phase);
78 in1 = in(1);
79 in2 = in(2);
80 progress = this;
81 }
82 }
83
84 // convert "max(a,b) * min(a,b)" into "a*b".
85 if ((in(1)->Opcode() == max_opcode() && in(2)->Opcode() == min_opcode())
86 || (in(1)->Opcode() == min_opcode() && in(2)->Opcode() == max_opcode())) {
87 Node *in11 = in(1)->in(1);
88 Node *in12 = in(1)->in(2);
89
90 Node *in21 = in(2)->in(1);
91 Node *in22 = in(2)->in(2);
92
93 if ((in11 == in21 && in12 == in22) ||
94 (in11 == in22 && in12 == in21)) {
95 set_req_X(1, in11, phase);
96 set_req_X(2, in12, phase);
97 in1 = in(1);
98 in2 = in(2);
99 progress = this;
100 }
101 }
102
103 const Type* t1 = phase->type(in1);
104 const Type* t2 = phase->type(in2);
105
106 // We are OK if right is a constant, or right is a load and
107 // left is a non-constant.
108 if( !(t2->singleton() ||
109 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
110 if( t1->singleton() || // Left input is a constant?
111 // Otherwise, sort inputs (commutativity) to help value numbering.
112 (in(1)->_idx > in(2)->_idx) ) {
113 swap_edges(1, 2);
114 const Type *t = t1;
115 t1 = t2;
116 t2 = t;
117 progress = this; // Made progress
118 }
119 }
120
121 // If the right input is a constant, and the left input is a product of a
122 // constant, flatten the expression tree.
123 if( t2->singleton() && // Right input is a constant?
124 op != Op_MulF && // Float & double cannot reassociate
125 op != Op_MulD ) {
126 if( t2 == Type::TOP ) return NULL;
127 Node *mul1 = in(1);
128 #ifdef ASSERT
129 // Check for dead loop
130 int op1 = mul1->Opcode();
131 if ((mul1 == this) || (in(2) == this) ||
132 ((op1 == mul_opcode() || op1 == add_opcode()) &&
133 ((mul1->in(1) == this) || (mul1->in(2) == this) ||
134 (mul1->in(1) == mul1) || (mul1->in(2) == mul1)))) {
135 assert(false, "dead loop in MulNode::Ideal");
136 }
137 #endif
138
139 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
140 // Mul of a constant?
141 const Type *t12 = phase->type( mul1->in(2) );
142 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
143 // Compute new constant; check for overflow
144 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
145 if( tcon01->singleton() ) {
146 // The Mul of the flattened expression
147 set_req_X(1, mul1->in(1), phase);
148 set_req_X(2, phase->makecon(tcon01), phase);
149 t2 = tcon01;
150 progress = this; // Made progress
151 }
152 }
153 }
154 // If the right input is a constant, and the left input is an add of a
155 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
156 const Node *add1 = in(1);
157 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
158 // Add of a constant?
159 const Type *t12 = phase->type( add1->in(2) );
160 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
161 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
162 // Compute new constant; check for overflow
163 const Type *tcon01 = mul_ring(t2,t12);
164 if( tcon01->singleton() ) {
165
166 // Convert (X+con1)*con0 into X*con0
167 Node *mul = clone(); // mul = ()*con0
168 mul->set_req(1,add1->in(1)); // mul = X*con0
169 mul = phase->transform(mul);
170
171 Node *add2 = add1->clone();
172 add2->set_req(1, mul); // X*con0 + con0*con1
173 add2->set_req(2, phase->makecon(tcon01) );
174 progress = add2;
175 }
176 }
177 } // End of is left input an add
178 } // End of is right input a Mul
179
180 return progress;
181 }
182
183 //------------------------------Value-----------------------------------------
184 const Type* MulNode::Value(PhaseGVN* phase) const {
185 const Type *t1 = phase->type( in(1) );
186 const Type *t2 = phase->type( in(2) );
187 // Either input is TOP ==> the result is TOP
188 if( t1 == Type::TOP ) return Type::TOP;
189 if( t2 == Type::TOP ) return Type::TOP;
190
191 // Either input is ZERO ==> the result is ZERO.
192 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
193 int op = Opcode();
194 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
195 const Type *zero = add_id(); // The multiplicative zero
196 if( t1->higher_equal( zero ) ) return zero;
197 if( t2->higher_equal( zero ) ) return zero;
198 }
199
200 // Code pattern on return from a call that returns an __Value. Can
201 // be optimized away if the return value turns out to be an oop.
202 if (op == Op_AndX &&
203 in(1) != NULL &&
204 in(1)->Opcode() == Op_CastP2X &&
205 in(1)->in(1) != NULL &&
206 phase->type(in(1)->in(1))->isa_oopptr() &&
207 t2->isa_intptr_t()->_lo >= 0 &&
208 t2->isa_intptr_t()->_hi <= MinObjAlignmentInBytesMask) {
209 return add_id();
210 }
211
212 // Either input is BOTTOM ==> the result is the local BOTTOM
213 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
214 return bottom_type();
215
216 #if defined(IA32)
217 // Can't trust native compilers to properly fold strict double
218 // multiplication with round-to-zero on this platform.
219 if (op == Op_MulD) {
220 return TypeD::DOUBLE;
221 }
222 #endif
223
224 return mul_ring(t1,t2); // Local flavor of type multiplication
225 }
226
227 MulNode* MulNode::make(Node* in1, Node* in2, BasicType bt) {
228 switch (bt) {
229 case T_INT:
230 return new MulINode(in1, in2);
231 case T_LONG:
232 return new MulLNode(in1, in2);
233 default:
234 fatal("Not implemented for %s", type2name(bt));
235 }
236 return NULL;
237 }
238
239
240 //=============================================================================
241 //------------------------------Ideal------------------------------------------
242 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
243 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
244 const jint con = in(2)->find_int_con(0);
245 if (con == 0) {
246 // If in(2) is not a constant, call Ideal() of the parent class to
247 // try to move constant to the right side.
248 return MulNode::Ideal(phase, can_reshape);
249 }
250
251 // Now we have a constant Node on the right and the constant in con.
252 if (con == 1) {
253 // By one is handled by Identity call
254 return NULL;
255 }
256
257 // Check for negative constant; if so negate the final result
258 bool sign_flip = false;
259
260 unsigned int abs_con = uabs(con);
261 if (abs_con != (unsigned int)con) {
262 sign_flip = true;
263 }
264
265 // Get low bit; check for being the only bit
266 Node *res = NULL;
267 unsigned int bit1 = submultiple_power_of_2(abs_con);
268 if (bit1 == abs_con) { // Found a power of 2?
269 res = new LShiftINode(in(1), phase->intcon(log2i_exact(bit1)));
270 } else {
271 // Check for constant with 2 bits set
272 unsigned int bit2 = abs_con - bit1;
273 bit2 = bit2 & (0 - bit2); // Extract 2nd bit
274 if (bit2 + bit1 == abs_con) { // Found all bits in con?
275 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(bit1))));
276 Node *n2 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(bit2))));
277 res = new AddINode(n2, n1);
278 } else if (is_power_of_2(abs_con + 1)) {
279 // Sleezy: power-of-2 - 1. Next time be generic.
280 unsigned int temp = abs_con + 1;
281 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(temp))));
282 res = new SubINode(n1, in(1));
283 } else {
284 return MulNode::Ideal(phase, can_reshape);
285 }
286 }
287
288 if (sign_flip) { // Need to negate result?
289 res = phase->transform(res);// Transform, before making the zero con
290 res = new SubINode(phase->intcon(0),res);
291 }
292
293 return res; // Return final result
294 }
295
296 //------------------------------mul_ring---------------------------------------
297 // Compute the product type of two integer ranges into this node.
298 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
299 const TypeInt *r0 = t0->is_int(); // Handy access
300 const TypeInt *r1 = t1->is_int();
301
302 // Fetch endpoints of all ranges
303 jint lo0 = r0->_lo;
304 double a = (double)lo0;
305 jint hi0 = r0->_hi;
306 double b = (double)hi0;
307 jint lo1 = r1->_lo;
308 double c = (double)lo1;
309 jint hi1 = r1->_hi;
310 double d = (double)hi1;
311
312 // Compute all endpoints & check for overflow
313 int32_t A = java_multiply(lo0, lo1);
314 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
315 int32_t B = java_multiply(lo0, hi1);
316 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
317 int32_t C = java_multiply(hi0, lo1);
318 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
319 int32_t D = java_multiply(hi0, hi1);
320 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
321
322 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
323 else { lo0 = B; hi0 = A; }
324 if( C < D ) {
325 if( C < lo0 ) lo0 = C;
326 if( D > hi0 ) hi0 = D;
327 } else {
328 if( D < lo0 ) lo0 = D;
329 if( C > hi0 ) hi0 = C;
330 }
331 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
332 }
333
334
335 //=============================================================================
336 //------------------------------Ideal------------------------------------------
337 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
338 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
339 const jlong con = in(2)->find_long_con(0);
340 if (con == 0) {
341 // If in(2) is not a constant, call Ideal() of the parent class to
342 // try to move constant to the right side.
343 return MulNode::Ideal(phase, can_reshape);
344 }
345
346 // Now we have a constant Node on the right and the constant in con.
347 if (con == 1) {
348 // By one is handled by Identity call
349 return NULL;
350 }
351
352 // Check for negative constant; if so negate the final result
353 bool sign_flip = false;
354 julong abs_con = uabs(con);
355 if (abs_con != (julong)con) {
356 sign_flip = true;
357 }
358
359 // Get low bit; check for being the only bit
360 Node *res = NULL;
361 julong bit1 = submultiple_power_of_2(abs_con);
362 if (bit1 == abs_con) { // Found a power of 2?
363 res = new LShiftLNode(in(1), phase->intcon(log2i_exact(bit1)));
364 } else {
365
366 // Check for constant with 2 bits set
367 julong bit2 = abs_con-bit1;
368 bit2 = bit2 & (0-bit2); // Extract 2nd bit
369 if (bit2 + bit1 == abs_con) { // Found all bits in con?
370 Node *n1 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2i_exact(bit1))));
371 Node *n2 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2i_exact(bit2))));
372 res = new AddLNode(n2, n1);
373
374 } else if (is_power_of_2(abs_con+1)) {
375 // Sleezy: power-of-2 -1. Next time be generic.
376 julong temp = abs_con + 1;
377 Node *n1 = phase->transform( new LShiftLNode(in(1), phase->intcon(log2i_exact(temp))));
378 res = new SubLNode(n1, in(1));
379 } else {
380 return MulNode::Ideal(phase, can_reshape);
381 }
382 }
383
384 if (sign_flip) { // Need to negate result?
385 res = phase->transform(res);// Transform, before making the zero con
386 res = new SubLNode(phase->longcon(0),res);
387 }
388
389 return res; // Return final result
390 }
391
392 //------------------------------mul_ring---------------------------------------
393 // Compute the product type of two integer ranges into this node.
394 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
395 const TypeLong *r0 = t0->is_long(); // Handy access
396 const TypeLong *r1 = t1->is_long();
397
398 // Fetch endpoints of all ranges
399 jlong lo0 = r0->_lo;
400 double a = (double)lo0;
401 jlong hi0 = r0->_hi;
402 double b = (double)hi0;
403 jlong lo1 = r1->_lo;
404 double c = (double)lo1;
405 jlong hi1 = r1->_hi;
406 double d = (double)hi1;
407
408 // Compute all endpoints & check for overflow
409 jlong A = java_multiply(lo0, lo1);
410 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
411 jlong B = java_multiply(lo0, hi1);
412 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
413 jlong C = java_multiply(hi0, lo1);
414 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
415 jlong D = java_multiply(hi0, hi1);
416 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
417
418 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
419 else { lo0 = B; hi0 = A; }
420 if( C < D ) {
421 if( C < lo0 ) lo0 = C;
422 if( D > hi0 ) hi0 = D;
423 } else {
424 if( D < lo0 ) lo0 = D;
425 if( C > hi0 ) hi0 = C;
426 }
427 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
428 }
429
430 //=============================================================================
431 //------------------------------mul_ring---------------------------------------
432 // Compute the product type of two double ranges into this node.
433 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
434 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
435 return TypeF::make( t0->getf() * t1->getf() );
436 }
437
438 //=============================================================================
439 //------------------------------mul_ring---------------------------------------
440 // Compute the product type of two double ranges into this node.
441 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
442 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
443 // We must be multiplying 2 double constants.
444 return TypeD::make( t0->getd() * t1->getd() );
445 }
446
447 //=============================================================================
448 //------------------------------Value------------------------------------------
449 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
450 const Type *t1 = phase->type( in(1) );
451 const Type *t2 = phase->type( in(2) );
452 const Type *bot = bottom_type();
453 return MulHiValue(t1, t2, bot);
454 }
455
456 const Type* UMulHiLNode::Value(PhaseGVN* phase) const {
457 const Type *t1 = phase->type( in(1) );
458 const Type *t2 = phase->type( in(2) );
459 const Type *bot = bottom_type();
460 return MulHiValue(t1, t2, bot);
461 }
462
463 // A common routine used by UMulHiLNode and MulHiLNode
464 const Type* MulHiValue(const Type *t1, const Type *t2, const Type *bot) {
465 // Either input is TOP ==> the result is TOP
466 if( t1 == Type::TOP ) return Type::TOP;
467 if( t2 == Type::TOP ) return Type::TOP;
468
469 // Either input is BOTTOM ==> the result is the local BOTTOM
470 if( (t1 == bot) || (t2 == bot) ||
471 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
472 return bot;
473
474 // It is not worth trying to constant fold this stuff!
475 return TypeLong::LONG;
476 }
477
478 //=============================================================================
479 //------------------------------mul_ring---------------------------------------
480 // Supplied function returns the product of the inputs IN THE CURRENT RING.
481 // For the logical operations the ring's MUL is really a logical AND function.
482 // This also type-checks the inputs for sanity. Guaranteed never to
483 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
484 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
485 const TypeInt *r0 = t0->is_int(); // Handy access
486 const TypeInt *r1 = t1->is_int();
487 int widen = MAX2(r0->_widen,r1->_widen);
488
489 // If either input is a constant, might be able to trim cases
490 if( !r0->is_con() && !r1->is_con() )
491 return TypeInt::INT; // No constants to be had
492
493 // Both constants? Return bits
494 if( r0->is_con() && r1->is_con() )
495 return TypeInt::make( r0->get_con() & r1->get_con() );
496
497 if( r0->is_con() && r0->get_con() > 0 )
498 return TypeInt::make(0, r0->get_con(), widen);
499
500 if( r1->is_con() && r1->get_con() > 0 )
501 return TypeInt::make(0, r1->get_con(), widen);
502
503 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
504 return TypeInt::BOOL;
505 }
506
507 return TypeInt::INT; // No constants to be had
508 }
509
510 const Type* AndINode::Value(PhaseGVN* phase) const {
511 // patterns similar to (v << 2) & 3
512 if (AndIL_shift_and_mask_is_always_zero(phase, in(1), in(2), T_INT, true)) {
513 return TypeInt::ZERO;
514 }
515
516 return MulNode::Value(phase);
517 }
518
519 //------------------------------Identity---------------------------------------
520 // Masking off the high bits of an unsigned load is not required
521 Node* AndINode::Identity(PhaseGVN* phase) {
522
523 // x & x => x
524 if (in(1) == in(2)) {
525 return in(1);
526 }
527
528 Node* in1 = in(1);
529 uint op = in1->Opcode();
530 const TypeInt* t2 = phase->type(in(2))->isa_int();
531 if (t2 && t2->is_con()) {
532 int con = t2->get_con();
533 // Masking off high bits which are always zero is useless.
534 const TypeInt* t1 = phase->type(in(1))->isa_int();
535 if (t1 != NULL && t1->_lo >= 0) {
536 jint t1_support = right_n_bits(1 + log2i_graceful(t1->_hi));
537 if ((t1_support & con) == t1_support)
538 return in1;
539 }
540 // Masking off the high bits of a unsigned-shift-right is not
541 // needed either.
542 if (op == Op_URShiftI) {
543 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
544 if (t12 && t12->is_con()) { // Shift is by a constant
545 int shift = t12->get_con();
546 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
547 int mask = max_juint >> shift;
548 if ((mask & con) == mask) // If AND is useless, skip it
549 return in1;
550 }
551 }
552 }
553 return MulNode::Identity(phase);
554 }
555
556 //------------------------------Ideal------------------------------------------
557 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
558 // pattern similar to (v1 + (v2 << 2)) & 3 transformed to v1 & 3
559 Node* progress = AndIL_add_shift_and_mask(phase, T_INT);
560 if (progress != NULL) {
561 return progress;
562 }
563
564 // Special case constant AND mask
565 const TypeInt *t2 = phase->type( in(2) )->isa_int();
566 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
567 const int mask = t2->get_con();
568 Node *load = in(1);
569 uint lop = load->Opcode();
570
571 // Masking bits off of a Character? Hi bits are already zero.
572 if( lop == Op_LoadUS &&
573 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
574 return new AndINode(load,phase->intcon(mask&0xFFFF));
575
576 // Masking bits off of a Short? Loading a Character does some masking
577 if (can_reshape &&
578 load->outcnt() == 1 && load->unique_out() == this) {
579 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
580 Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
581 ldus = phase->transform(ldus);
582 return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
583 }
584
585 // Masking sign bits off of a Byte? Do an unsigned byte load plus
586 // an and.
587 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
588 Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
589 ldub = phase->transform(ldub);
590 return new AndINode(ldub, phase->intcon(mask));
591 }
592 }
593
594 // Masking off sign bits? Dont make them!
595 if( lop == Op_RShiftI ) {
596 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
597 if( t12 && t12->is_con() ) { // Shift is by a constant
598 int shift = t12->get_con();
599 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
600 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
601 // If the AND'ing of the 2 masks has no bits, then only original shifted
602 // bits survive. NO sign-extension bits survive the maskings.
603 if( (sign_bits_mask & mask) == 0 ) {
604 // Use zero-fill shift instead
605 Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
606 return new AndINode( zshift, in(2) );
607 }
608 }
609 }
610
611 // Check for 'negate/and-1', a pattern emitted when someone asks for
612 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
613 // plus 1) and the mask is of the low order bit. Skip the negate.
614 if( lop == Op_SubI && mask == 1 && load->in(1) &&
615 phase->type(load->in(1)) == TypeInt::ZERO )
616 return new AndINode( load->in(2), in(2) );
617
618 return MulNode::Ideal(phase, can_reshape);
619 }
620
621 //=============================================================================
622 //------------------------------mul_ring---------------------------------------
623 // Supplied function returns the product of the inputs IN THE CURRENT RING.
624 // For the logical operations the ring's MUL is really a logical AND function.
625 // This also type-checks the inputs for sanity. Guaranteed never to
626 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
627 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
628 const TypeLong *r0 = t0->is_long(); // Handy access
629 const TypeLong *r1 = t1->is_long();
630 int widen = MAX2(r0->_widen,r1->_widen);
631
632 // If either input is a constant, might be able to trim cases
633 if( !r0->is_con() && !r1->is_con() )
634 return TypeLong::LONG; // No constants to be had
635
636 // Both constants? Return bits
637 if( r0->is_con() && r1->is_con() )
638 return TypeLong::make( r0->get_con() & r1->get_con() );
639
640 if( r0->is_con() && r0->get_con() > 0 )
641 return TypeLong::make(CONST64(0), r0->get_con(), widen);
642
643 if( r1->is_con() && r1->get_con() > 0 )
644 return TypeLong::make(CONST64(0), r1->get_con(), widen);
645
646 return TypeLong::LONG; // No constants to be had
647 }
648
649 const Type* AndLNode::Value(PhaseGVN* phase) const {
650 // patterns similar to (v << 2) & 3
651 if (AndIL_shift_and_mask_is_always_zero(phase, in(1), in(2), T_LONG, true)) {
652 return TypeLong::ZERO;
653 }
654
655 return MulNode::Value(phase);
656 }
657
658 //------------------------------Identity---------------------------------------
659 // Masking off the high bits of an unsigned load is not required
660 Node* AndLNode::Identity(PhaseGVN* phase) {
661
662 // x & x => x
663 if (in(1) == in(2)) {
664 return in(1);
665 }
666
667 Node *usr = in(1);
668 const TypeLong *t2 = phase->type( in(2) )->isa_long();
669 if( t2 && t2->is_con() ) {
670 jlong con = t2->get_con();
671 // Masking off high bits which are always zero is useless.
672 const TypeLong* t1 = phase->type( in(1) )->isa_long();
673 if (t1 != NULL && t1->_lo >= 0) {
674 int bit_count = log2i_graceful(t1->_hi) + 1;
675 jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
676 if ((t1_support & con) == t1_support)
677 return usr;
678 }
679 uint lop = usr->Opcode();
680 // Masking off the high bits of a unsigned-shift-right is not
681 // needed either.
682 if( lop == Op_URShiftL ) {
683 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
684 if( t12 && t12->is_con() ) { // Shift is by a constant
685 int shift = t12->get_con();
686 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
687 jlong mask = max_julong >> shift;
688 if( (mask&con) == mask ) // If AND is useless, skip it
689 return usr;
690 }
691 }
692
693 // Check if this is part of an inline type test
694 if (con == markWord::inline_type_pattern && in(1)->is_Load() &&
695 phase->type(in(1)->in(MemNode::Address))->is_inlinetypeptr() &&
696 phase->type(in(1)->in(MemNode::Address))->is_ptr()->offset() == oopDesc::mark_offset_in_bytes()) {
697 assert(EnableValhalla, "should only be used for inline types");
698 return in(2); // Obj is known to be an inline type
699 }
700 }
701 return MulNode::Identity(phase);
702 }
703
704 //------------------------------Ideal------------------------------------------
705 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
706 // pattern similar to (v1 + (v2 << 2)) & 3 transformed to v1 & 3
707 Node* progress = AndIL_add_shift_and_mask(phase, T_LONG);
708 if (progress != NULL) {
709 return progress;
710 }
711
712 // Special case constant AND mask
713 const TypeLong *t2 = phase->type( in(2) )->isa_long();
714 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
715 const jlong mask = t2->get_con();
716
717 Node* in1 = in(1);
718 int op = in1->Opcode();
719
720 // Are we masking a long that was converted from an int with a mask
721 // that fits in 32-bits? Commute them and use an AndINode. Don't
722 // convert masks which would cause a sign extension of the integer
723 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
724 // would be optimized away later in Identity.
725 if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
726 Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
727 andi = phase->transform(andi);
728 return new ConvI2LNode(andi);
729 }
730
731 // Masking off sign bits? Dont make them!
732 if (op == Op_RShiftL) {
733 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
734 if( t12 && t12->is_con() ) { // Shift is by a constant
735 int shift = t12->get_con();
736 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
737 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
738 // If the AND'ing of the 2 masks has no bits, then only original shifted
739 // bits survive. NO sign-extension bits survive the maskings.
740 if( (sign_bits_mask & mask) == 0 ) {
741 // Use zero-fill shift instead
742 Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
743 return new AndLNode(zshift, in(2));
744 }
745 }
746 }
747
748 return MulNode::Ideal(phase, can_reshape);
749 }
750
751 LShiftNode* LShiftNode::make(Node* in1, Node* in2, BasicType bt) {
752 switch (bt) {
753 case T_INT:
754 return new LShiftINode(in1, in2);
755 case T_LONG:
756 return new LShiftLNode(in1, in2);
757 default:
758 fatal("Not implemented for %s", type2name(bt));
759 }
760 return NULL;
761 }
762
763 //=============================================================================
764
765 static bool const_shift_count(PhaseGVN* phase, Node* shiftNode, int* count) {
766 const TypeInt* tcount = phase->type(shiftNode->in(2))->isa_int();
767 if (tcount != NULL && tcount->is_con()) {
768 *count = tcount->get_con();
769 return true;
770 }
771 return false;
772 }
773
774 static int maskShiftAmount(PhaseGVN* phase, Node* shiftNode, int nBits) {
775 int count = 0;
776 if (const_shift_count(phase, shiftNode, &count)) {
777 int maskedShift = count & (nBits - 1);
778 if (maskedShift == 0) {
779 // Let Identity() handle 0 shift count.
780 return 0;
781 }
782
783 if (count != maskedShift) {
784 shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
785 PhaseIterGVN* igvn = phase->is_IterGVN();
786 if (igvn) {
787 igvn->rehash_node_delayed(shiftNode);
788 }
789 }
790 return maskedShift;
791 }
792 return 0;
793 }
794
795 //------------------------------Identity---------------------------------------
796 Node* LShiftINode::Identity(PhaseGVN* phase) {
797 int count = 0;
798 if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaInteger - 1)) == 0) {
799 // Shift by a multiple of 32 does nothing
800 return in(1);
801 }
802 return this;
803 }
804
805 //------------------------------Ideal------------------------------------------
806 // If the right input is a constant, and the left input is an add of a
807 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
808 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
809 int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
810 if (con == 0) {
811 return NULL;
812 }
813
814 // Left input is an add?
815 Node *add1 = in(1);
816 int add1_op = add1->Opcode();
817 if( add1_op == Op_AddI ) { // Left input is an add?
818 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
819
820 // Transform is legal, but check for profit. Avoid breaking 'i2s'
821 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
822 if( con < 16 ) {
823 // Left input is an add of the same number?
824 if (add1->in(1) == add1->in(2)) {
825 // Convert "(x + x) << c0" into "x << (c0 + 1)"
826 // In general, this optimization cannot be applied for c0 == 31 since
827 // 2x << 31 != x << 32 = x << 0 = x (e.g. x = 1: 2 << 31 = 0 != 1)
828 return new LShiftINode(add1->in(1), phase->intcon(con + 1));
829 }
830
831 // Left input is an add of a constant?
832 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
833 if( t12 && t12->is_con() ){ // Left input is an add of a con?
834 // Compute X << con0
835 Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
836 // Compute X<<con0 + (con1<<con0)
837 return new AddINode( lsh, phase->intcon(t12->get_con() << con));
838 }
839 }
840 }
841
842 // Check for "(x>>c0)<<c0" which just masks off low bits
843 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
844 add1->in(2) == in(2) )
845 // Convert to "(x & -(1<<c0))"
846 return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
847
848 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
849 if( add1_op == Op_AndI ) {
850 Node *add2 = add1->in(1);
851 int add2_op = add2->Opcode();
852 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
853 add2->in(2) == in(2) ) {
854 // Convert to "(x & (Y<<c0))"
855 Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
856 return new AndINode( add2->in(1), y_sh );
857 }
858 }
859
860 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
861 // before shifting them away.
862 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
863 if( add1_op == Op_AndI &&
864 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
865 return new LShiftINode( add1->in(1), in(2) );
866
867 return NULL;
868 }
869
870 //------------------------------Value------------------------------------------
871 // A LShiftINode shifts its input2 left by input1 amount.
872 const Type* LShiftINode::Value(PhaseGVN* phase) const {
873 const Type *t1 = phase->type( in(1) );
874 const Type *t2 = phase->type( in(2) );
875 // Either input is TOP ==> the result is TOP
876 if( t1 == Type::TOP ) return Type::TOP;
877 if( t2 == Type::TOP ) return Type::TOP;
878
879 // Left input is ZERO ==> the result is ZERO.
880 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
881 // Shift by zero does nothing
882 if( t2 == TypeInt::ZERO ) return t1;
883
884 // Either input is BOTTOM ==> the result is BOTTOM
885 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
886 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
887 return TypeInt::INT;
888
889 const TypeInt *r1 = t1->is_int(); // Handy access
890 const TypeInt *r2 = t2->is_int(); // Handy access
891
892 if (!r2->is_con())
893 return TypeInt::INT;
894
895 uint shift = r2->get_con();
896 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
897 // Shift by a multiple of 32 does nothing:
898 if (shift == 0) return t1;
899
900 // If the shift is a constant, shift the bounds of the type,
901 // unless this could lead to an overflow.
902 if (!r1->is_con()) {
903 jint lo = r1->_lo, hi = r1->_hi;
904 if (((lo << shift) >> shift) == lo &&
905 ((hi << shift) >> shift) == hi) {
906 // No overflow. The range shifts up cleanly.
907 return TypeInt::make((jint)lo << (jint)shift,
908 (jint)hi << (jint)shift,
909 MAX2(r1->_widen,r2->_widen));
910 }
911 return TypeInt::INT;
912 }
913
914 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
915 }
916
917 //=============================================================================
918 //------------------------------Identity---------------------------------------
919 Node* LShiftLNode::Identity(PhaseGVN* phase) {
920 int count = 0;
921 if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaLong - 1)) == 0) {
922 // Shift by a multiple of 64 does nothing
923 return in(1);
924 }
925 return this;
926 }
927
928 //------------------------------Ideal------------------------------------------
929 // If the right input is a constant, and the left input is an add of a
930 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
931 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
932 int con = maskShiftAmount(phase, this, BitsPerJavaLong);
933 if (con == 0) {
934 return NULL;
935 }
936
937 // Left input is an add?
938 Node *add1 = in(1);
939 int add1_op = add1->Opcode();
940 if( add1_op == Op_AddL ) { // Left input is an add?
941 // Avoid dead data cycles from dead loops
942 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
943
944 // Left input is an add of the same number?
945 if (con != (BitsPerJavaLong - 1) && add1->in(1) == add1->in(2)) {
946 // Convert "(x + x) << c0" into "x << (c0 + 1)"
947 // Can only be applied if c0 != 63 because:
948 // (x + x) << 63 = 2x << 63, while
949 // (x + x) << 63 --transform--> x << 64 = x << 0 = x (!= 2x << 63, for example for x = 1)
950 // According to the Java spec, chapter 15.19, we only consider the six lowest-order bits of the right-hand operand
951 // (i.e. "right-hand operand" & 0b111111). Therefore, x << 64 is the same as x << 0 (64 = 0b10000000 & 0b0111111 = 0).
952 return new LShiftLNode(add1->in(1), phase->intcon(con + 1));
953 }
954
955 // Left input is an add of a constant?
956 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
957 if( t12 && t12->is_con() ){ // Left input is an add of a con?
958 // Compute X << con0
959 Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
960 // Compute X<<con0 + (con1<<con0)
961 return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
962 }
963 }
964
965 // Check for "(x>>c0)<<c0" which just masks off low bits
966 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
967 add1->in(2) == in(2) )
968 // Convert to "(x & -(1<<c0))"
969 return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
970
971 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
972 if( add1_op == Op_AndL ) {
973 Node *add2 = add1->in(1);
974 int add2_op = add2->Opcode();
975 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
976 add2->in(2) == in(2) ) {
977 // Convert to "(x & (Y<<c0))"
978 Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
979 return new AndLNode( add2->in(1), y_sh );
980 }
981 }
982
983 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
984 // before shifting them away.
985 const jlong bits_mask = jlong(max_julong >> con);
986 if( add1_op == Op_AndL &&
987 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
988 return new LShiftLNode( add1->in(1), in(2) );
989
990 return NULL;
991 }
992
993 //------------------------------Value------------------------------------------
994 // A LShiftLNode shifts its input2 left by input1 amount.
995 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
996 const Type *t1 = phase->type( in(1) );
997 const Type *t2 = phase->type( in(2) );
998 // Either input is TOP ==> the result is TOP
999 if( t1 == Type::TOP ) return Type::TOP;
1000 if( t2 == Type::TOP ) return Type::TOP;
1001
1002 // Left input is ZERO ==> the result is ZERO.
1003 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1004 // Shift by zero does nothing
1005 if( t2 == TypeInt::ZERO ) return t1;
1006
1007 // Either input is BOTTOM ==> the result is BOTTOM
1008 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
1009 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
1010 return TypeLong::LONG;
1011
1012 const TypeLong *r1 = t1->is_long(); // Handy access
1013 const TypeInt *r2 = t2->is_int(); // Handy access
1014
1015 if (!r2->is_con())
1016 return TypeLong::LONG;
1017
1018 uint shift = r2->get_con();
1019 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1020 // Shift by a multiple of 64 does nothing:
1021 if (shift == 0) return t1;
1022
1023 // If the shift is a constant, shift the bounds of the type,
1024 // unless this could lead to an overflow.
1025 if (!r1->is_con()) {
1026 jlong lo = r1->_lo, hi = r1->_hi;
1027 if (((lo << shift) >> shift) == lo &&
1028 ((hi << shift) >> shift) == hi) {
1029 // No overflow. The range shifts up cleanly.
1030 return TypeLong::make((jlong)lo << (jint)shift,
1031 (jlong)hi << (jint)shift,
1032 MAX2(r1->_widen,r2->_widen));
1033 }
1034 return TypeLong::LONG;
1035 }
1036
1037 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
1038 }
1039
1040 //=============================================================================
1041 //------------------------------Identity---------------------------------------
1042 Node* RShiftINode::Identity(PhaseGVN* phase) {
1043 int count = 0;
1044 if (const_shift_count(phase, this, &count)) {
1045 if ((count & (BitsPerJavaInteger - 1)) == 0) {
1046 // Shift by a multiple of 32 does nothing
1047 return in(1);
1048 }
1049 // Check for useless sign-masking
1050 if (in(1)->Opcode() == Op_LShiftI &&
1051 in(1)->req() == 3 &&
1052 in(1)->in(2) == in(2)) {
1053 count &= BitsPerJavaInteger-1; // semantics of Java shifts
1054 // Compute masks for which this shifting doesn't change
1055 int lo = (-1 << (BitsPerJavaInteger - ((uint)count)-1)); // FFFF8000
1056 int hi = ~lo; // 00007FFF
1057 const TypeInt* t11 = phase->type(in(1)->in(1))->isa_int();
1058 if (t11 == NULL) {
1059 return this;
1060 }
1061 // Does actual value fit inside of mask?
1062 if (lo <= t11->_lo && t11->_hi <= hi) {
1063 return in(1)->in(1); // Then shifting is a nop
1064 }
1065 }
1066 }
1067 return this;
1068 }
1069
1070 //------------------------------Ideal------------------------------------------
1071 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1072 // Inputs may be TOP if they are dead.
1073 const TypeInt *t1 = phase->type(in(1))->isa_int();
1074 if (!t1) return NULL; // Left input is an integer
1075 const TypeInt *t3; // type of in(1).in(2)
1076 int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
1077 if (shift == 0) {
1078 return NULL;
1079 }
1080
1081 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
1082 // Such expressions arise normally from shift chains like (byte)(x >> 24).
1083 const Node *mask = in(1);
1084 if( mask->Opcode() == Op_AndI &&
1085 (t3 = phase->type(mask->in(2))->isa_int()) &&
1086 t3->is_con() ) {
1087 Node *x = mask->in(1);
1088 jint maskbits = t3->get_con();
1089 // Convert to "(x >> shift) & (mask >> shift)"
1090 Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
1091 return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
1092 }
1093
1094 // Check for "(short[i] <<16)>>16" which simply sign-extends
1095 const Node *shl = in(1);
1096 if( shl->Opcode() != Op_LShiftI ) return NULL;
1097
1098 if( shift == 16 &&
1099 (t3 = phase->type(shl->in(2))->isa_int()) &&
1100 t3->is_con(16) ) {
1101 Node *ld = shl->in(1);
1102 if( ld->Opcode() == Op_LoadS ) {
1103 // Sign extension is just useless here. Return a RShiftI of zero instead
1104 // returning 'ld' directly. We cannot return an old Node directly as
1105 // that is the job of 'Identity' calls and Identity calls only work on
1106 // direct inputs ('ld' is an extra Node removed from 'this'). The
1107 // combined optimization requires Identity only return direct inputs.
1108 set_req_X(1, ld, phase);
1109 set_req_X(2, phase->intcon(0), phase);
1110 return this;
1111 }
1112 else if (can_reshape &&
1113 ld->Opcode() == Op_LoadUS &&
1114 ld->outcnt() == 1 && ld->unique_out() == shl)
1115 // Replace zero-extension-load with sign-extension-load
1116 return ld->as_Load()->convert_to_signed_load(*phase);
1117 }
1118
1119 // Check for "(byte[i] <<24)>>24" which simply sign-extends
1120 if( shift == 24 &&
1121 (t3 = phase->type(shl->in(2))->isa_int()) &&
1122 t3->is_con(24) ) {
1123 Node *ld = shl->in(1);
1124 if (ld->Opcode() == Op_LoadB) {
1125 // Sign extension is just useless here
1126 set_req_X(1, ld, phase);
1127 set_req_X(2, phase->intcon(0), phase);
1128 return this;
1129 }
1130 }
1131
1132 return NULL;
1133 }
1134
1135 //------------------------------Value------------------------------------------
1136 // A RShiftINode shifts its input2 right by input1 amount.
1137 const Type* RShiftINode::Value(PhaseGVN* phase) const {
1138 const Type *t1 = phase->type( in(1) );
1139 const Type *t2 = phase->type( in(2) );
1140 // Either input is TOP ==> the result is TOP
1141 if( t1 == Type::TOP ) return Type::TOP;
1142 if( t2 == Type::TOP ) return Type::TOP;
1143
1144 // Left input is ZERO ==> the result is ZERO.
1145 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1146 // Shift by zero does nothing
1147 if( t2 == TypeInt::ZERO ) return t1;
1148
1149 // Either input is BOTTOM ==> the result is BOTTOM
1150 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1151 return TypeInt::INT;
1152
1153 if (t2 == TypeInt::INT)
1154 return TypeInt::INT;
1155
1156 const TypeInt *r1 = t1->is_int(); // Handy access
1157 const TypeInt *r2 = t2->is_int(); // Handy access
1158
1159 // If the shift is a constant, just shift the bounds of the type.
1160 // For example, if the shift is 31, we just propagate sign bits.
1161 if (r2->is_con()) {
1162 uint shift = r2->get_con();
1163 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1164 // Shift by a multiple of 32 does nothing:
1165 if (shift == 0) return t1;
1166 // Calculate reasonably aggressive bounds for the result.
1167 // This is necessary if we are to correctly type things
1168 // like (x<<24>>24) == ((byte)x).
1169 jint lo = (jint)r1->_lo >> (jint)shift;
1170 jint hi = (jint)r1->_hi >> (jint)shift;
1171 assert(lo <= hi, "must have valid bounds");
1172 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1173 #ifdef ASSERT
1174 // Make sure we get the sign-capture idiom correct.
1175 if (shift == BitsPerJavaInteger-1) {
1176 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1177 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1178 }
1179 #endif
1180 return ti;
1181 }
1182
1183 if( !r1->is_con() || !r2->is_con() )
1184 return TypeInt::INT;
1185
1186 // Signed shift right
1187 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1188 }
1189
1190 //=============================================================================
1191 //------------------------------Identity---------------------------------------
1192 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1193 const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1194 return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1195 }
1196
1197 //------------------------------Value------------------------------------------
1198 // A RShiftLNode shifts its input2 right by input1 amount.
1199 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1200 const Type *t1 = phase->type( in(1) );
1201 const Type *t2 = phase->type( in(2) );
1202 // Either input is TOP ==> the result is TOP
1203 if( t1 == Type::TOP ) return Type::TOP;
1204 if( t2 == Type::TOP ) return Type::TOP;
1205
1206 // Left input is ZERO ==> the result is ZERO.
1207 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1208 // Shift by zero does nothing
1209 if( t2 == TypeInt::ZERO ) return t1;
1210
1211 // Either input is BOTTOM ==> the result is BOTTOM
1212 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1213 return TypeLong::LONG;
1214
1215 if (t2 == TypeInt::INT)
1216 return TypeLong::LONG;
1217
1218 const TypeLong *r1 = t1->is_long(); // Handy access
1219 const TypeInt *r2 = t2->is_int (); // Handy access
1220
1221 // If the shift is a constant, just shift the bounds of the type.
1222 // For example, if the shift is 63, we just propagate sign bits.
1223 if (r2->is_con()) {
1224 uint shift = r2->get_con();
1225 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1226 // Shift by a multiple of 64 does nothing:
1227 if (shift == 0) return t1;
1228 // Calculate reasonably aggressive bounds for the result.
1229 // This is necessary if we are to correctly type things
1230 // like (x<<24>>24) == ((byte)x).
1231 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1232 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1233 assert(lo <= hi, "must have valid bounds");
1234 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1235 #ifdef ASSERT
1236 // Make sure we get the sign-capture idiom correct.
1237 if (shift == (2*BitsPerJavaInteger)-1) {
1238 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1239 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1240 }
1241 #endif
1242 return tl;
1243 }
1244
1245 return TypeLong::LONG; // Give up
1246 }
1247
1248 //=============================================================================
1249 //------------------------------Identity---------------------------------------
1250 Node* URShiftINode::Identity(PhaseGVN* phase) {
1251 int count = 0;
1252 if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaInteger - 1)) == 0) {
1253 // Shift by a multiple of 32 does nothing
1254 return in(1);
1255 }
1256
1257 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1258 // Happens during new-array length computation.
1259 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1260 Node *add = in(1);
1261 if (add->Opcode() == Op_AddI) {
1262 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1263 if (t2 && t2->is_con(wordSize - 1) &&
1264 add->in(1)->Opcode() == Op_LShiftI) {
1265 // Check that shift_counts are LogBytesPerWord.
1266 Node *lshift_count = add->in(1)->in(2);
1267 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1268 if (t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1269 t_lshift_count == phase->type(in(2))) {
1270 Node *x = add->in(1)->in(1);
1271 const TypeInt *t_x = phase->type(x)->isa_int();
1272 if (t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord)) {
1273 return x;
1274 }
1275 }
1276 }
1277 }
1278
1279 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1280 }
1281
1282 //------------------------------Ideal------------------------------------------
1283 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1284 int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1285 if (con == 0) {
1286 return NULL;
1287 }
1288
1289 // We'll be wanting the right-shift amount as a mask of that many bits
1290 const int mask = right_n_bits(BitsPerJavaInteger - con);
1291
1292 int in1_op = in(1)->Opcode();
1293
1294 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1295 if( in1_op == Op_URShiftI ) {
1296 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1297 if( t12 && t12->is_con() ) { // Right input is a constant
1298 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1299 const int con2 = t12->get_con() & 31; // Shift count is always masked
1300 const int con3 = con+con2;
1301 if( con3 < 32 ) // Only merge shifts if total is < 32
1302 return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1303 }
1304 }
1305
1306 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1307 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1308 // If Q is "X << z" the rounding is useless. Look for patterns like
1309 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1310 Node *add = in(1);
1311 const TypeInt *t2 = phase->type(in(2))->isa_int();
1312 if (in1_op == Op_AddI) {
1313 Node *lshl = add->in(1);
1314 if( lshl->Opcode() == Op_LShiftI &&
1315 phase->type(lshl->in(2)) == t2 ) {
1316 Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1317 Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1318 return new AndINode( sum, phase->intcon(mask) );
1319 }
1320 }
1321
1322 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1323 // This shortens the mask. Also, if we are extracting a high byte and
1324 // storing it to a buffer, the mask will be removed completely.
1325 Node *andi = in(1);
1326 if( in1_op == Op_AndI ) {
1327 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1328 if( t3 && t3->is_con() ) { // Right input is a constant
1329 jint mask2 = t3->get_con();
1330 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1331 Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1332 return new AndINode(newshr, phase->intcon(mask2));
1333 // The negative values are easier to materialize than positive ones.
1334 // A typical case from address arithmetic is ((x & ~15) >> 4).
1335 // It's better to change that to ((x >> 4) & ~0) versus
1336 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1337 }
1338 }
1339
1340 // Check for "(X << z ) >>> z" which simply zero-extends
1341 Node *shl = in(1);
1342 if( in1_op == Op_LShiftI &&
1343 phase->type(shl->in(2)) == t2 )
1344 return new AndINode( shl->in(1), phase->intcon(mask) );
1345
1346 // Check for (x >> n) >>> 31. Replace with (x >>> 31)
1347 Node *shr = in(1);
1348 if ( in1_op == Op_RShiftI ) {
1349 Node *in11 = shr->in(1);
1350 Node *in12 = shr->in(2);
1351 const TypeInt *t11 = phase->type(in11)->isa_int();
1352 const TypeInt *t12 = phase->type(in12)->isa_int();
1353 if ( t11 && t2 && t2->is_con(31) && t12 && t12->is_con() ) {
1354 return new URShiftINode(in11, phase->intcon(31));
1355 }
1356 }
1357
1358 return NULL;
1359 }
1360
1361 //------------------------------Value------------------------------------------
1362 // A URShiftINode shifts its input2 right by input1 amount.
1363 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1364 // (This is a near clone of RShiftINode::Value.)
1365 const Type *t1 = phase->type( in(1) );
1366 const Type *t2 = phase->type( in(2) );
1367 // Either input is TOP ==> the result is TOP
1368 if( t1 == Type::TOP ) return Type::TOP;
1369 if( t2 == Type::TOP ) return Type::TOP;
1370
1371 // Left input is ZERO ==> the result is ZERO.
1372 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1373 // Shift by zero does nothing
1374 if( t2 == TypeInt::ZERO ) return t1;
1375
1376 // Either input is BOTTOM ==> the result is BOTTOM
1377 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1378 return TypeInt::INT;
1379
1380 if (t2 == TypeInt::INT)
1381 return TypeInt::INT;
1382
1383 const TypeInt *r1 = t1->is_int(); // Handy access
1384 const TypeInt *r2 = t2->is_int(); // Handy access
1385
1386 if (r2->is_con()) {
1387 uint shift = r2->get_con();
1388 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1389 // Shift by a multiple of 32 does nothing:
1390 if (shift == 0) return t1;
1391 // Calculate reasonably aggressive bounds for the result.
1392 jint lo = (juint)r1->_lo >> (juint)shift;
1393 jint hi = (juint)r1->_hi >> (juint)shift;
1394 if (r1->_hi >= 0 && r1->_lo < 0) {
1395 // If the type has both negative and positive values,
1396 // there are two separate sub-domains to worry about:
1397 // The positive half and the negative half.
1398 jint neg_lo = lo;
1399 jint neg_hi = (juint)-1 >> (juint)shift;
1400 jint pos_lo = (juint) 0 >> (juint)shift;
1401 jint pos_hi = hi;
1402 lo = MIN2(neg_lo, pos_lo); // == 0
1403 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1404 }
1405 assert(lo <= hi, "must have valid bounds");
1406 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1407 #ifdef ASSERT
1408 // Make sure we get the sign-capture idiom correct.
1409 if (shift == BitsPerJavaInteger-1) {
1410 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1411 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1412 }
1413 #endif
1414 return ti;
1415 }
1416
1417 //
1418 // Do not support shifted oops in info for GC
1419 //
1420 // else if( t1->base() == Type::InstPtr ) {
1421 //
1422 // const TypeInstPtr *o = t1->is_instptr();
1423 // if( t1->singleton() )
1424 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1425 // }
1426 // else if( t1->base() == Type::KlassPtr ) {
1427 // const TypeKlassPtr *o = t1->is_klassptr();
1428 // if( t1->singleton() )
1429 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1430 // }
1431
1432 return TypeInt::INT;
1433 }
1434
1435 //=============================================================================
1436 //------------------------------Identity---------------------------------------
1437 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1438 int count = 0;
1439 if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaLong - 1)) == 0) {
1440 // Shift by a multiple of 64 does nothing
1441 return in(1);
1442 }
1443 return this;
1444 }
1445
1446 //------------------------------Ideal------------------------------------------
1447 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1448 int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1449 if (con == 0) {
1450 return NULL;
1451 }
1452
1453 // We'll be wanting the right-shift amount as a mask of that many bits
1454 const jlong mask = jlong(max_julong >> con);
1455
1456 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1457 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1458 // If Q is "X << z" the rounding is useless. Look for patterns like
1459 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1460 Node *add = in(1);
1461 const TypeInt *t2 = phase->type(in(2))->isa_int();
1462 if (add->Opcode() == Op_AddL) {
1463 Node *lshl = add->in(1);
1464 if( lshl->Opcode() == Op_LShiftL &&
1465 phase->type(lshl->in(2)) == t2 ) {
1466 Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1467 Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1468 return new AndLNode( sum, phase->longcon(mask) );
1469 }
1470 }
1471
1472 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1473 // This shortens the mask. Also, if we are extracting a high byte and
1474 // storing it to a buffer, the mask will be removed completely.
1475 Node *andi = in(1);
1476 if( andi->Opcode() == Op_AndL ) {
1477 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1478 if( t3 && t3->is_con() ) { // Right input is a constant
1479 jlong mask2 = t3->get_con();
1480 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1481 Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1482 return new AndLNode(newshr, phase->longcon(mask2));
1483 }
1484 }
1485
1486 // Check for "(X << z ) >>> z" which simply zero-extends
1487 Node *shl = in(1);
1488 if( shl->Opcode() == Op_LShiftL &&
1489 phase->type(shl->in(2)) == t2 )
1490 return new AndLNode( shl->in(1), phase->longcon(mask) );
1491
1492 // Check for (x >> n) >>> 63. Replace with (x >>> 63)
1493 Node *shr = in(1);
1494 if ( shr->Opcode() == Op_RShiftL ) {
1495 Node *in11 = shr->in(1);
1496 Node *in12 = shr->in(2);
1497 const TypeLong *t11 = phase->type(in11)->isa_long();
1498 const TypeInt *t12 = phase->type(in12)->isa_int();
1499 if ( t11 && t2 && t2->is_con(63) && t12 && t12->is_con() ) {
1500 return new URShiftLNode(in11, phase->intcon(63));
1501 }
1502 }
1503 return NULL;
1504 }
1505
1506 //------------------------------Value------------------------------------------
1507 // A URShiftINode shifts its input2 right by input1 amount.
1508 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1509 // (This is a near clone of RShiftLNode::Value.)
1510 const Type *t1 = phase->type( in(1) );
1511 const Type *t2 = phase->type( in(2) );
1512 // Either input is TOP ==> the result is TOP
1513 if( t1 == Type::TOP ) return Type::TOP;
1514 if( t2 == Type::TOP ) return Type::TOP;
1515
1516 // Left input is ZERO ==> the result is ZERO.
1517 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1518 // Shift by zero does nothing
1519 if( t2 == TypeInt::ZERO ) return t1;
1520
1521 // Either input is BOTTOM ==> the result is BOTTOM
1522 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1523 return TypeLong::LONG;
1524
1525 if (t2 == TypeInt::INT)
1526 return TypeLong::LONG;
1527
1528 const TypeLong *r1 = t1->is_long(); // Handy access
1529 const TypeInt *r2 = t2->is_int (); // Handy access
1530
1531 if (r2->is_con()) {
1532 uint shift = r2->get_con();
1533 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1534 // Shift by a multiple of 64 does nothing:
1535 if (shift == 0) return t1;
1536 // Calculate reasonably aggressive bounds for the result.
1537 jlong lo = (julong)r1->_lo >> (juint)shift;
1538 jlong hi = (julong)r1->_hi >> (juint)shift;
1539 if (r1->_hi >= 0 && r1->_lo < 0) {
1540 // If the type has both negative and positive values,
1541 // there are two separate sub-domains to worry about:
1542 // The positive half and the negative half.
1543 jlong neg_lo = lo;
1544 jlong neg_hi = (julong)-1 >> (juint)shift;
1545 jlong pos_lo = (julong) 0 >> (juint)shift;
1546 jlong pos_hi = hi;
1547 //lo = MIN2(neg_lo, pos_lo); // == 0
1548 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1549 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1550 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1551 }
1552 assert(lo <= hi, "must have valid bounds");
1553 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1554 #ifdef ASSERT
1555 // Make sure we get the sign-capture idiom correct.
1556 if (shift == BitsPerJavaLong - 1) {
1557 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1558 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1559 }
1560 #endif
1561 return tl;
1562 }
1563
1564 return TypeLong::LONG; // Give up
1565 }
1566
1567 //=============================================================================
1568 //------------------------------Value------------------------------------------
1569 const Type* FmaDNode::Value(PhaseGVN* phase) const {
1570 const Type *t1 = phase->type(in(1));
1571 if (t1 == Type::TOP) return Type::TOP;
1572 if (t1->base() != Type::DoubleCon) return Type::DOUBLE;
1573 const Type *t2 = phase->type(in(2));
1574 if (t2 == Type::TOP) return Type::TOP;
1575 if (t2->base() != Type::DoubleCon) return Type::DOUBLE;
1576 const Type *t3 = phase->type(in(3));
1577 if (t3 == Type::TOP) return Type::TOP;
1578 if (t3->base() != Type::DoubleCon) return Type::DOUBLE;
1579 #ifndef __STDC_IEC_559__
1580 return Type::DOUBLE;
1581 #else
1582 double d1 = t1->getd();
1583 double d2 = t2->getd();
1584 double d3 = t3->getd();
1585 return TypeD::make(fma(d1, d2, d3));
1586 #endif
1587 }
1588
1589 //=============================================================================
1590 //------------------------------Value------------------------------------------
1591 const Type* FmaFNode::Value(PhaseGVN* phase) const {
1592 const Type *t1 = phase->type(in(1));
1593 if (t1 == Type::TOP) return Type::TOP;
1594 if (t1->base() != Type::FloatCon) return Type::FLOAT;
1595 const Type *t2 = phase->type(in(2));
1596 if (t2 == Type::TOP) return Type::TOP;
1597 if (t2->base() != Type::FloatCon) return Type::FLOAT;
1598 const Type *t3 = phase->type(in(3));
1599 if (t3 == Type::TOP) return Type::TOP;
1600 if (t3->base() != Type::FloatCon) return Type::FLOAT;
1601 #ifndef __STDC_IEC_559__
1602 return Type::FLOAT;
1603 #else
1604 float f1 = t1->getf();
1605 float f2 = t2->getf();
1606 float f3 = t3->getf();
1607 return TypeF::make(fma(f1, f2, f3));
1608 #endif
1609 }
1610
1611 //=============================================================================
1612 //------------------------------hash-------------------------------------------
1613 // Hash function for MulAddS2INode. Operation is commutative with commutative pairs.
1614 // The hash function must return the same value when edge swapping is performed.
1615 uint MulAddS2INode::hash() const {
1616 return (uintptr_t)in(1) + (uintptr_t)in(2) + (uintptr_t)in(3) + (uintptr_t)in(4) + Opcode();
1617 }
1618
1619 //------------------------------Rotate Operations ------------------------------
1620
1621 Node* RotateLeftNode::Identity(PhaseGVN* phase) {
1622 const Type* t1 = phase->type(in(1));
1623 if (t1 == Type::TOP) {
1624 return this;
1625 }
1626 int count = 0;
1627 assert(t1->isa_int() || t1->isa_long(), "Unexpected type");
1628 int mask = (t1->isa_int() ? BitsPerJavaInteger : BitsPerJavaLong) - 1;
1629 if (const_shift_count(phase, this, &count) && (count & mask) == 0) {
1630 // Rotate by a multiple of 32/64 does nothing
1631 return in(1);
1632 }
1633 return this;
1634 }
1635
1636 const Type* RotateLeftNode::Value(PhaseGVN* phase) const {
1637 const Type* t1 = phase->type(in(1));
1638 const Type* t2 = phase->type(in(2));
1639 // Either input is TOP ==> the result is TOP
1640 if (t1 == Type::TOP || t2 == Type::TOP) {
1641 return Type::TOP;
1642 }
1643
1644 if (t1->isa_int()) {
1645 const TypeInt* r1 = t1->is_int();
1646 const TypeInt* r2 = t2->is_int();
1647
1648 // Left input is ZERO ==> the result is ZERO.
1649 if (r1 == TypeInt::ZERO) {
1650 return TypeInt::ZERO;
1651 }
1652 // Rotate by zero does nothing
1653 if (r2 == TypeInt::ZERO) {
1654 return r1;
1655 }
1656 if (r1->is_con() && r2->is_con()) {
1657 juint r1_con = (juint)r1->get_con();
1658 juint shift = (juint)(r2->get_con()) & (juint)(BitsPerJavaInteger - 1); // semantics of Java shifts
1659 return TypeInt::make((r1_con << shift) | (r1_con >> (32 - shift)));
1660 }
1661 return TypeInt::INT;
1662 } else {
1663 assert(t1->isa_long(), "Type must be a long");
1664 const TypeLong* r1 = t1->is_long();
1665 const TypeInt* r2 = t2->is_int();
1666
1667 // Left input is ZERO ==> the result is ZERO.
1668 if (r1 == TypeLong::ZERO) {
1669 return TypeLong::ZERO;
1670 }
1671 // Rotate by zero does nothing
1672 if (r2 == TypeInt::ZERO) {
1673 return r1;
1674 }
1675 if (r1->is_con() && r2->is_con()) {
1676 julong r1_con = (julong)r1->get_con();
1677 julong shift = (julong)(r2->get_con()) & (julong)(BitsPerJavaLong - 1); // semantics of Java shifts
1678 return TypeLong::make((r1_con << shift) | (r1_con >> (64 - shift)));
1679 }
1680 return TypeLong::LONG;
1681 }
1682 }
1683
1684 Node* RotateLeftNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1685 const Type* t1 = phase->type(in(1));
1686 const Type* t2 = phase->type(in(2));
1687 if (t2->isa_int() && t2->is_int()->is_con()) {
1688 if (t1->isa_int()) {
1689 int lshift = t2->is_int()->get_con() & 31;
1690 return new RotateRightNode(in(1), phase->intcon(32 - (lshift & 31)), TypeInt::INT);
1691 } else if (t1 != Type::TOP) {
1692 assert(t1->isa_long(), "Type must be a long");
1693 int lshift = t2->is_int()->get_con() & 63;
1694 return new RotateRightNode(in(1), phase->intcon(64 - (lshift & 63)), TypeLong::LONG);
1695 }
1696 }
1697 return NULL;
1698 }
1699
1700 Node* RotateRightNode::Identity(PhaseGVN* phase) {
1701 const Type* t1 = phase->type(in(1));
1702 if (t1 == Type::TOP) {
1703 return this;
1704 }
1705 int count = 0;
1706 assert(t1->isa_int() || t1->isa_long(), "Unexpected type");
1707 int mask = (t1->isa_int() ? BitsPerJavaInteger : BitsPerJavaLong) - 1;
1708 if (const_shift_count(phase, this, &count) && (count & mask) == 0) {
1709 // Rotate by a multiple of 32/64 does nothing
1710 return in(1);
1711 }
1712 return this;
1713 }
1714
1715 const Type* RotateRightNode::Value(PhaseGVN* phase) const {
1716 const Type* t1 = phase->type(in(1));
1717 const Type* t2 = phase->type(in(2));
1718 // Either input is TOP ==> the result is TOP
1719 if (t1 == Type::TOP || t2 == Type::TOP) {
1720 return Type::TOP;
1721 }
1722
1723 if (t1->isa_int()) {
1724 const TypeInt* r1 = t1->is_int();
1725 const TypeInt* r2 = t2->is_int();
1726
1727 // Left input is ZERO ==> the result is ZERO.
1728 if (r1 == TypeInt::ZERO) {
1729 return TypeInt::ZERO;
1730 }
1731 // Rotate by zero does nothing
1732 if (r2 == TypeInt::ZERO) {
1733 return r1;
1734 }
1735 if (r1->is_con() && r2->is_con()) {
1736 juint r1_con = (juint)r1->get_con();
1737 juint shift = (juint)(r2->get_con()) & (juint)(BitsPerJavaInteger - 1); // semantics of Java shifts
1738 return TypeInt::make((r1_con >> shift) | (r1_con << (32 - shift)));
1739 }
1740 return TypeInt::INT;
1741 } else {
1742 assert(t1->isa_long(), "Type must be a long");
1743 const TypeLong* r1 = t1->is_long();
1744 const TypeInt* r2 = t2->is_int();
1745 // Left input is ZERO ==> the result is ZERO.
1746 if (r1 == TypeLong::ZERO) {
1747 return TypeLong::ZERO;
1748 }
1749 // Rotate by zero does nothing
1750 if (r2 == TypeInt::ZERO) {
1751 return r1;
1752 }
1753 if (r1->is_con() && r2->is_con()) {
1754 julong r1_con = (julong)r1->get_con();
1755 julong shift = (julong)(r2->get_con()) & (julong)(BitsPerJavaLong - 1); // semantics of Java shifts
1756 return TypeLong::make((r1_con >> shift) | (r1_con << (64 - shift)));
1757 }
1758 return TypeLong::LONG;
1759 }
1760 }
1761
1762 // Given an expression (AndX shift mask) or (AndX mask shift),
1763 // determine if the AndX must always produce zero, because the
1764 // the shift (x<<N) is bitwise disjoint from the mask #M.
1765 // The X in AndX must be I or L, depending on bt.
1766 // Specifically, the following cases fold to zero,
1767 // when the shift value N is large enough to zero out
1768 // all the set positions of the and-mask M.
1769 // (AndI (LShiftI _ #N) #M) => #0
1770 // (AndL (LShiftL _ #N) #M) => #0
1771 // (AndL (ConvI2L (LShiftI _ #N)) #M) => #0
1772 // The M and N values must satisfy ((-1 << N) & M) == 0.
1773 // Because the optimization might work for a non-constant
1774 // mask M, we check the AndX for both operand orders.
1775 bool MulNode::AndIL_shift_and_mask_is_always_zero(PhaseGVN* phase, Node* shift, Node* mask, BasicType bt, bool check_reverse) {
1776 if (mask == NULL || shift == NULL) {
1777 return false;
1778 }
1779 shift = shift->uncast();
1780 if (shift == NULL) {
1781 return false;
1782 }
1783 const TypeInteger* mask_t = phase->type(mask)->isa_integer(bt);
1784 const TypeInteger* shift_t = phase->type(shift)->isa_integer(bt);
1785 if (mask_t == NULL || shift_t == NULL) {
1786 return false;
1787 }
1788 BasicType shift_bt = bt;
1789 if (bt == T_LONG && shift->Opcode() == Op_ConvI2L) {
1790 bt = T_INT;
1791 Node* val = shift->in(1);
1792 if (val == NULL) {
1793 return false;
1794 }
1795 val = val->uncast();
1796 if (val == NULL) {
1797 return false;
1798 }
1799 if (val->Opcode() == Op_LShiftI) {
1800 shift_bt = T_INT;
1801 shift = val;
1802 }
1803 }
1804 if (shift->Opcode() != Op_LShift(shift_bt)) {
1805 if (check_reverse &&
1806 (mask->Opcode() == Op_LShift(bt) ||
1807 (bt == T_LONG && mask->Opcode() == Op_ConvI2L))) {
1808 // try it the other way around
1809 return AndIL_shift_and_mask_is_always_zero(phase, mask, shift, bt, false);
1810 }
1811 return false;
1812 }
1813 Node* shift2 = shift->in(2);
1814 if (shift2 == NULL) {
1815 return false;
1816 }
1817 const Type* shift2_t = phase->type(shift2);
1818 if (!shift2_t->isa_int() || !shift2_t->is_int()->is_con()) {
1819 return false;
1820 }
1821
1822 jint shift_con = shift2_t->is_int()->get_con() & ((shift_bt == T_INT ? BitsPerJavaInteger : BitsPerJavaLong) - 1);
1823 if ((((jlong)1) << shift_con) > mask_t->hi_as_long() && mask_t->lo_as_long() >= 0) {
1824 return true;
1825 }
1826
1827 return false;
1828 }
1829
1830 // Given an expression (AndX (AddX v1 (LShiftX v2 #N)) #M)
1831 // determine if the AndX must always produce (AndX v1 #M),
1832 // because the shift (v2<<N) is bitwise disjoint from the mask #M.
1833 // The X in AndX will be I or L, depending on bt.
1834 // Specifically, the following cases fold,
1835 // when the shift value N is large enough to zero out
1836 // all the set positions of the and-mask M.
1837 // (AndI (AddI v1 (LShiftI _ #N)) #M) => (AndI v1 #M)
1838 // (AndL (AddI v1 (LShiftL _ #N)) #M) => (AndL v1 #M)
1839 // (AndL (AddL v1 (ConvI2L (LShiftI _ #N))) #M) => (AndL v1 #M)
1840 // The M and N values must satisfy ((-1 << N) & M) == 0.
1841 // Because the optimization might work for a non-constant
1842 // mask M, and because the AddX operands can come in either
1843 // order, we check for every operand order.
1844 Node* MulNode::AndIL_add_shift_and_mask(PhaseGVN* phase, BasicType bt) {
1845 Node* add = in(1);
1846 Node* mask = in(2);
1847 if (add == NULL || mask == NULL) {
1848 return NULL;
1849 }
1850 int addidx = 0;
1851 if (add->Opcode() == Op_Add(bt)) {
1852 addidx = 1;
1853 } else if (mask->Opcode() == Op_Add(bt)) {
1854 mask = add;
1855 addidx = 2;
1856 add = in(addidx);
1857 }
1858 if (addidx > 0) {
1859 Node* add1 = add->in(1);
1860 Node* add2 = add->in(2);
1861 if (add1 != NULL && add2 != NULL) {
1862 if (AndIL_shift_and_mask_is_always_zero(phase, add1, mask, bt, false)) {
1863 set_req_X(addidx, add2, phase);
1864 return this;
1865 } else if (AndIL_shift_and_mask_is_always_zero(phase, add2, mask, bt, false)) {
1866 set_req_X(addidx, add1, phase);
1867 return this;
1868 }
1869 }
1870 }
1871 return NULL;
1872 }