1 /*
   2  * Copyright (c) 1997, 2023, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
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  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/addnode.hpp"
  28 #include "opto/connode.hpp"
  29 #include "opto/convertnode.hpp"
  30 #include "opto/memnode.hpp"
  31 #include "opto/mulnode.hpp"
  32 #include "opto/phaseX.hpp"
  33 #include "opto/subnode.hpp"
  34 #include "utilities/powerOfTwo.hpp"
  35 
  36 // Portions of code courtesy of Clifford Click
  37 
  38 
  39 //=============================================================================
  40 //------------------------------hash-------------------------------------------
  41 // Hash function over MulNodes.  Needs to be commutative; i.e., I swap
  42 // (commute) inputs to MulNodes willy-nilly so the hash function must return
  43 // the same value in the presence of edge swapping.
  44 uint MulNode::hash() const {
  45   return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
  46 }
  47 
  48 //------------------------------Identity---------------------------------------
  49 // Multiplying a one preserves the other argument
  50 Node* MulNode::Identity(PhaseGVN* phase) {
  51   const Type *one = mul_id();  // The multiplicative identity
  52   if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
  53   if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
  54 
  55   return this;
  56 }
  57 
  58 //------------------------------Ideal------------------------------------------
  59 // We also canonicalize the Node, moving constants to the right input,
  60 // and flatten expressions (so that 1+x+2 becomes x+3).
  61 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
  62   Node* in1 = in(1);
  63   Node* in2 = in(2);
  64   Node* progress = nullptr;        // Progress flag
  65 
  66   // This code is used by And nodes too, but some conversions are
  67   // only valid for the actual Mul nodes.
  68   uint op = Opcode();
  69   bool real_mul = (op == Op_MulI) || (op == Op_MulL) ||
  70                   (op == Op_MulF) || (op == Op_MulD);
  71 
  72   // Convert "(-a)*(-b)" into "a*b".
  73   if (real_mul && in1->is_Sub() && in2->is_Sub()) {
  74     if (phase->type(in1->in(1))->is_zero_type() &&
  75         phase->type(in2->in(1))->is_zero_type()) {
  76       set_req_X(1, in1->in(2), phase);
  77       set_req_X(2, in2->in(2), phase);
  78       in1 = in(1);
  79       in2 = in(2);
  80       progress = this;
  81     }
  82   }
  83 
  84   // convert "max(a,b) * min(a,b)" into "a*b".
  85   if ((in(1)->Opcode() == max_opcode() && in(2)->Opcode() == min_opcode())
  86       || (in(1)->Opcode() == min_opcode() && in(2)->Opcode() == max_opcode())) {
  87     Node *in11 = in(1)->in(1);
  88     Node *in12 = in(1)->in(2);
  89 
  90     Node *in21 = in(2)->in(1);
  91     Node *in22 = in(2)->in(2);
  92 
  93     if ((in11 == in21 && in12 == in22) ||
  94         (in11 == in22 && in12 == in21)) {
  95       set_req_X(1, in11, phase);
  96       set_req_X(2, in12, phase);
  97       in1 = in(1);
  98       in2 = in(2);
  99       progress = this;
 100     }
 101   }
 102 
 103   const Type* t1 = phase->type(in1);
 104   const Type* t2 = phase->type(in2);
 105 
 106   // We are OK if right is a constant, or right is a load and
 107   // left is a non-constant.
 108   if( !(t2->singleton() ||
 109         (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
 110     if( t1->singleton() ||       // Left input is a constant?
 111         // Otherwise, sort inputs (commutativity) to help value numbering.
 112         (in(1)->_idx > in(2)->_idx) ) {
 113       swap_edges(1, 2);
 114       const Type *t = t1;
 115       t1 = t2;
 116       t2 = t;
 117       progress = this;            // Made progress
 118     }
 119   }
 120 
 121   // If the right input is a constant, and the left input is a product of a
 122   // constant, flatten the expression tree.
 123   if( t2->singleton() &&        // Right input is a constant?
 124       op != Op_MulF &&          // Float & double cannot reassociate
 125       op != Op_MulD ) {
 126     if( t2 == Type::TOP ) return nullptr;
 127     Node *mul1 = in(1);
 128 #ifdef ASSERT
 129     // Check for dead loop
 130     int op1 = mul1->Opcode();
 131     if ((mul1 == this) || (in(2) == this) ||
 132         ((op1 == mul_opcode() || op1 == add_opcode()) &&
 133          ((mul1->in(1) == this) || (mul1->in(2) == this) ||
 134           (mul1->in(1) == mul1) || (mul1->in(2) == mul1)))) {
 135       assert(false, "dead loop in MulNode::Ideal");
 136     }
 137 #endif
 138 
 139     if( mul1->Opcode() == mul_opcode() ) {  // Left input is a multiply?
 140       // Mul of a constant?
 141       const Type *t12 = phase->type( mul1->in(2) );
 142       if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
 143         // Compute new constant; check for overflow
 144         const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
 145         if( tcon01->singleton() ) {
 146           // The Mul of the flattened expression
 147           set_req_X(1, mul1->in(1), phase);
 148           set_req_X(2, phase->makecon(tcon01), phase);
 149           t2 = tcon01;
 150           progress = this;      // Made progress
 151         }
 152       }
 153     }
 154     // If the right input is a constant, and the left input is an add of a
 155     // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
 156     const Node *add1 = in(1);
 157     if( add1->Opcode() == add_opcode() ) {      // Left input is an add?
 158       // Add of a constant?
 159       const Type *t12 = phase->type( add1->in(2) );
 160       if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
 161         assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
 162         // Compute new constant; check for overflow
 163         const Type *tcon01 = mul_ring(t2,t12);
 164         if( tcon01->singleton() ) {
 165 
 166         // Convert (X+con1)*con0 into X*con0
 167           Node *mul = clone();    // mul = ()*con0
 168           mul->set_req(1,add1->in(1));  // mul = X*con0
 169           mul = phase->transform(mul);
 170 
 171           Node *add2 = add1->clone();
 172           add2->set_req(1, mul);        // X*con0 + con0*con1
 173           add2->set_req(2, phase->makecon(tcon01) );
 174           progress = add2;
 175         }
 176       }
 177     } // End of is left input an add
 178   } // End of is right input a Mul
 179 
 180   return progress;
 181 }
 182 
 183 //------------------------------Value-----------------------------------------
 184 const Type* MulNode::Value(PhaseGVN* phase) const {
 185   const Type *t1 = phase->type( in(1) );
 186   const Type *t2 = phase->type( in(2) );
 187   // Either input is TOP ==> the result is TOP
 188   if( t1 == Type::TOP ) return Type::TOP;
 189   if( t2 == Type::TOP ) return Type::TOP;
 190 
 191   // Either input is ZERO ==> the result is ZERO.
 192   // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
 193   int op = Opcode();
 194   if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
 195     const Type *zero = add_id();        // The multiplicative zero
 196     if( t1->higher_equal( zero ) ) return zero;
 197     if( t2->higher_equal( zero ) ) return zero;
 198   }
 199 
 200   // Code pattern on return from a call that returns an __Value.  Can
 201   // be optimized away if the return value turns out to be an oop.
 202   if (op == Op_AndX &&
 203       in(1) != NULL &&
 204       in(1)->Opcode() == Op_CastP2X &&
 205       in(1)->in(1) != NULL &&
 206       phase->type(in(1)->in(1))->isa_oopptr() &&
 207       t2->isa_intptr_t()->_lo >= 0 &&
 208       t2->isa_intptr_t()->_hi <= MinObjAlignmentInBytesMask) {
 209     return add_id();
 210   }
 211 
 212   // Either input is BOTTOM ==> the result is the local BOTTOM
 213   if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
 214     return bottom_type();
 215 
 216 #if defined(IA32)
 217   // Can't trust native compilers to properly fold strict double
 218   // multiplication with round-to-zero on this platform.
 219   if (op == Op_MulD) {
 220     return TypeD::DOUBLE;
 221   }
 222 #endif
 223 
 224   return mul_ring(t1,t2);            // Local flavor of type multiplication
 225 }
 226 
 227 MulNode* MulNode::make(Node* in1, Node* in2, BasicType bt) {
 228   switch (bt) {
 229     case T_INT:
 230       return new MulINode(in1, in2);
 231     case T_LONG:
 232       return new MulLNode(in1, in2);
 233     default:
 234       fatal("Not implemented for %s", type2name(bt));
 235   }
 236   return nullptr;
 237 }
 238 
 239 
 240 //=============================================================================
 241 //------------------------------Ideal------------------------------------------
 242 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 243 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 244   const jint con = in(2)->find_int_con(0);
 245   if (con == 0) {
 246     // If in(2) is not a constant, call Ideal() of the parent class to
 247     // try to move constant to the right side.
 248     return MulNode::Ideal(phase, can_reshape);
 249   }
 250 
 251   // Now we have a constant Node on the right and the constant in con.
 252   if (con == 1) {
 253     // By one is handled by Identity call
 254     return nullptr;
 255   }
 256 
 257   // Check for negative constant; if so negate the final result
 258   bool sign_flip = false;
 259 
 260   unsigned int abs_con = uabs(con);
 261   if (abs_con != (unsigned int)con) {
 262     sign_flip = true;
 263   }
 264 
 265   // Get low bit; check for being the only bit
 266   Node *res = nullptr;
 267   unsigned int bit1 = submultiple_power_of_2(abs_con);
 268   if (bit1 == abs_con) {           // Found a power of 2?
 269     res = new LShiftINode(in(1), phase->intcon(log2i_exact(bit1)));
 270   } else {
 271     // Check for constant with 2 bits set
 272     unsigned int bit2 = abs_con - bit1;
 273     bit2 = bit2 & (0 - bit2);          // Extract 2nd bit
 274     if (bit2 + bit1 == abs_con) {    // Found all bits in con?
 275       Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(bit1))));
 276       Node *n2 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(bit2))));
 277       res = new AddINode(n2, n1);
 278     } else if (is_power_of_2(abs_con + 1)) {
 279       // Sleezy: power-of-2 - 1.  Next time be generic.
 280       unsigned int temp = abs_con + 1;
 281       Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2i_exact(temp))));
 282       res = new SubINode(n1, in(1));
 283     } else {
 284       return MulNode::Ideal(phase, can_reshape);
 285     }
 286   }
 287 
 288   if (sign_flip) {             // Need to negate result?
 289     res = phase->transform(res);// Transform, before making the zero con
 290     res = new SubINode(phase->intcon(0),res);
 291   }
 292 
 293   return res;                   // Return final result
 294 }
 295 
 296 // Classes to perform mul_ring() for MulI/MulLNode.
 297 //
 298 // This class checks if all cross products of the left and right input of a multiplication have the same "overflow value".
 299 // Without overflow/underflow:
 300 // Product is positive? High signed multiplication result: 0
 301 // Product is negative? High signed multiplication result: -1
 302 //
 303 // We normalize these values (see normalize_overflow_value()) such that we get the same "overflow value" by adding 1 if
 304 // the product is negative. This allows us to compare all the cross product "overflow values". If one is different,
 305 // compared to the others, then we know that this multiplication has a different number of over- or underflows compared
 306 // to the others. In this case, we need to use bottom type and cannot guarantee a better type. Otherwise, we can take
 307 // the min und max of all computed cross products as type of this Mul node.
 308 template<typename IntegerType>
 309 class IntegerMulRing {
 310   using NativeType = std::conditional_t<std::is_same<TypeInt, IntegerType>::value, jint, jlong>;
 311 
 312   NativeType _lo_left;
 313   NativeType _lo_right;
 314   NativeType _hi_left;
 315   NativeType _hi_right;
 316   NativeType _lo_lo_product;
 317   NativeType _lo_hi_product;
 318   NativeType _hi_lo_product;
 319   NativeType _hi_hi_product;
 320   short _widen_left;
 321   short _widen_right;
 322 
 323   static const Type* overflow_type();
 324   static NativeType multiply_high_signed_overflow_value(NativeType x, NativeType y);
 325 
 326   // Pre-compute cross products which are used at several places
 327   void compute_cross_products() {
 328     _lo_lo_product = java_multiply(_lo_left, _lo_right);
 329     _lo_hi_product = java_multiply(_lo_left, _hi_right);
 330     _hi_lo_product = java_multiply(_hi_left, _lo_right);
 331     _hi_hi_product = java_multiply(_hi_left, _hi_right);
 332   }
 333 
 334   bool cross_products_not_same_overflow() const {
 335     const NativeType lo_lo_high_product = multiply_high_signed_overflow_value(_lo_left, _lo_right);
 336     const NativeType lo_hi_high_product = multiply_high_signed_overflow_value(_lo_left, _hi_right);
 337     const NativeType hi_lo_high_product = multiply_high_signed_overflow_value(_hi_left, _lo_right);
 338     const NativeType hi_hi_high_product = multiply_high_signed_overflow_value(_hi_left, _hi_right);
 339     return lo_lo_high_product != lo_hi_high_product ||
 340            lo_hi_high_product != hi_lo_high_product ||
 341            hi_lo_high_product != hi_hi_high_product;
 342   }
 343 
 344   static NativeType normalize_overflow_value(const NativeType x, const NativeType y, NativeType result) {
 345     return java_multiply(x, y) < 0 ? result + 1 : result;
 346   }
 347 
 348  public:
 349   IntegerMulRing(const IntegerType* left, const IntegerType* right) : _lo_left(left->_lo), _lo_right(right->_lo),
 350     _hi_left(left->_hi), _hi_right(right->_hi), _widen_left(left->_widen), _widen_right(right->_widen)  {
 351     compute_cross_products();
 352   }
 353 
 354   // Compute the product type by multiplying the two input type ranges. We take the minimum and maximum of all possible
 355   // values (requires 4 multiplications of all possible combinations of the two range boundary values). If any of these
 356   // multiplications overflows/underflows, we need to make sure that they all have the same number of overflows/underflows
 357   // If that is not the case, we return the bottom type to cover all values due to the inconsistent overflows/underflows).
 358   const Type* compute() const {
 359     if (cross_products_not_same_overflow()) {
 360       return overflow_type();
 361     }
 362     const NativeType min = MIN4(_lo_lo_product, _lo_hi_product, _hi_lo_product, _hi_hi_product);
 363     const NativeType max = MAX4(_lo_lo_product, _lo_hi_product, _hi_lo_product, _hi_hi_product);
 364     return IntegerType::make(min, max, MAX2(_widen_left, _widen_right));
 365   }
 366 };
 367 
 368 
 369 template <>
 370 const Type* IntegerMulRing<TypeInt>::overflow_type() {
 371   return TypeInt::INT;
 372 }
 373 
 374 template <>
 375 jint IntegerMulRing<TypeInt>::multiply_high_signed_overflow_value(const jint x, const jint y) {
 376   const jlong x_64 = x;
 377   const jlong y_64 = y;
 378   const jlong product = x_64 * y_64;
 379   const jint result = (jint)((uint64_t)product >> 32u);
 380   return normalize_overflow_value(x, y, result);
 381 }
 382 
 383 template <>
 384 const Type* IntegerMulRing<TypeLong>::overflow_type() {
 385   return TypeLong::LONG;
 386 }
 387 
 388 template <>
 389 jlong IntegerMulRing<TypeLong>::multiply_high_signed_overflow_value(const jlong x, const jlong y) {
 390   const jlong result = multiply_high_signed(x, y);
 391   return normalize_overflow_value(x, y, result);
 392 }
 393 
 394 // Compute the product type of two integer ranges into this node.
 395 const Type* MulINode::mul_ring(const Type* type_left, const Type* type_right) const {
 396   const IntegerMulRing<TypeInt> integer_mul_ring(type_left->is_int(), type_right->is_int());
 397   return integer_mul_ring.compute();
 398 }
 399 
 400 // Compute the product type of two long ranges into this node.
 401 const Type* MulLNode::mul_ring(const Type* type_left, const Type* type_right) const {
 402   const IntegerMulRing<TypeLong> integer_mul_ring(type_left->is_long(), type_right->is_long());
 403   return integer_mul_ring.compute();
 404 }
 405 
 406 //=============================================================================
 407 //------------------------------Ideal------------------------------------------
 408 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 409 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 410   const jlong con = in(2)->find_long_con(0);
 411   if (con == 0) {
 412     // If in(2) is not a constant, call Ideal() of the parent class to
 413     // try to move constant to the right side.
 414     return MulNode::Ideal(phase, can_reshape);
 415   }
 416 
 417   // Now we have a constant Node on the right and the constant in con.
 418   if (con == 1) {
 419     // By one is handled by Identity call
 420     return nullptr;
 421   }
 422 
 423   // Check for negative constant; if so negate the final result
 424   bool sign_flip = false;
 425   julong abs_con = uabs(con);
 426   if (abs_con != (julong)con) {
 427     sign_flip = true;
 428   }
 429 
 430   // Get low bit; check for being the only bit
 431   Node *res = nullptr;
 432   julong bit1 = submultiple_power_of_2(abs_con);
 433   if (bit1 == abs_con) {           // Found a power of 2?
 434     res = new LShiftLNode(in(1), phase->intcon(log2i_exact(bit1)));
 435   } else {
 436 
 437     // Check for constant with 2 bits set
 438     julong bit2 = abs_con-bit1;
 439     bit2 = bit2 & (0-bit2);          // Extract 2nd bit
 440     if (bit2 + bit1 == abs_con) {    // Found all bits in con?
 441       Node *n1 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2i_exact(bit1))));
 442       Node *n2 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2i_exact(bit2))));
 443       res = new AddLNode(n2, n1);
 444 
 445     } else if (is_power_of_2(abs_con+1)) {
 446       // Sleezy: power-of-2 -1.  Next time be generic.
 447       julong temp = abs_con + 1;
 448       Node *n1 = phase->transform( new LShiftLNode(in(1), phase->intcon(log2i_exact(temp))));
 449       res = new SubLNode(n1, in(1));
 450     } else {
 451       return MulNode::Ideal(phase, can_reshape);
 452     }
 453   }
 454 
 455   if (sign_flip) {             // Need to negate result?
 456     res = phase->transform(res);// Transform, before making the zero con
 457     res = new SubLNode(phase->longcon(0),res);
 458   }
 459 
 460   return res;                   // Return final result
 461 }
 462 
 463 //=============================================================================
 464 //------------------------------mul_ring---------------------------------------
 465 // Compute the product type of two double ranges into this node.
 466 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
 467   if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
 468   return TypeF::make( t0->getf() * t1->getf() );
 469 }
 470 
 471 //------------------------------Ideal---------------------------------------
 472 // Check to see if we are multiplying by a constant 2 and convert to add, then try the regular MulNode::Ideal
 473 Node* MulFNode::Ideal(PhaseGVN* phase, bool can_reshape) {
 474   const TypeF *t2 = phase->type(in(2))->isa_float_constant();
 475 
 476   // x * 2 -> x + x
 477   if (t2 != nullptr && t2->getf() == 2) {
 478     Node* base = in(1);
 479     return new AddFNode(base, base);
 480   }
 481 
 482   return MulNode::Ideal(phase, can_reshape);
 483 }
 484 
 485 //=============================================================================
 486 //------------------------------mul_ring---------------------------------------
 487 // Compute the product type of two double ranges into this node.
 488 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
 489   if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
 490   // We must be multiplying 2 double constants.
 491   return TypeD::make( t0->getd() * t1->getd() );
 492 }
 493 
 494 //------------------------------Ideal---------------------------------------
 495 // Check to see if we are multiplying by a constant 2 and convert to add, then try the regular MulNode::Ideal
 496 Node* MulDNode::Ideal(PhaseGVN* phase, bool can_reshape) {
 497   const TypeD *t2 = phase->type(in(2))->isa_double_constant();
 498 
 499   // x * 2 -> x + x
 500   if (t2 != nullptr && t2->getd() == 2) {
 501     Node* base = in(1);
 502     return new AddDNode(base, base);
 503   }
 504 
 505   return MulNode::Ideal(phase, can_reshape);
 506 }
 507 
 508 //=============================================================================
 509 //------------------------------Value------------------------------------------
 510 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
 511   const Type *t1 = phase->type( in(1) );
 512   const Type *t2 = phase->type( in(2) );
 513   const Type *bot = bottom_type();
 514   return MulHiValue(t1, t2, bot);
 515 }
 516 
 517 const Type* UMulHiLNode::Value(PhaseGVN* phase) const {
 518   const Type *t1 = phase->type( in(1) );
 519   const Type *t2 = phase->type( in(2) );
 520   const Type *bot = bottom_type();
 521   return MulHiValue(t1, t2, bot);
 522 }
 523 
 524 // A common routine used by UMulHiLNode and MulHiLNode
 525 const Type* MulHiValue(const Type *t1, const Type *t2, const Type *bot) {
 526   // Either input is TOP ==> the result is TOP
 527   if( t1 == Type::TOP ) return Type::TOP;
 528   if( t2 == Type::TOP ) return Type::TOP;
 529 
 530   // Either input is BOTTOM ==> the result is the local BOTTOM
 531   if( (t1 == bot) || (t2 == bot) ||
 532       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 533     return bot;
 534 
 535   // It is not worth trying to constant fold this stuff!
 536   return TypeLong::LONG;
 537 }
 538 
 539 //=============================================================================
 540 //------------------------------mul_ring---------------------------------------
 541 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 542 // For the logical operations the ring's MUL is really a logical AND function.
 543 // This also type-checks the inputs for sanity.  Guaranteed never to
 544 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 545 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
 546   const TypeInt *r0 = t0->is_int(); // Handy access
 547   const TypeInt *r1 = t1->is_int();
 548   int widen = MAX2(r0->_widen,r1->_widen);
 549 
 550   // If either input is a constant, might be able to trim cases
 551   if( !r0->is_con() && !r1->is_con() )
 552     return TypeInt::INT;        // No constants to be had
 553 
 554   // Both constants?  Return bits
 555   if( r0->is_con() && r1->is_con() )
 556     return TypeInt::make( r0->get_con() & r1->get_con() );
 557 
 558   if( r0->is_con() && r0->get_con() > 0 )
 559     return TypeInt::make(0, r0->get_con(), widen);
 560 
 561   if( r1->is_con() && r1->get_con() > 0 )
 562     return TypeInt::make(0, r1->get_con(), widen);
 563 
 564   if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
 565     return TypeInt::BOOL;
 566   }
 567 
 568   return TypeInt::INT;          // No constants to be had
 569 }
 570 
 571 const Type* AndINode::Value(PhaseGVN* phase) const {
 572   // patterns similar to (v << 2) & 3
 573   if (AndIL_shift_and_mask_is_always_zero(phase, in(1), in(2), T_INT, true)) {
 574     return TypeInt::ZERO;
 575   }
 576 
 577   return MulNode::Value(phase);
 578 }
 579 
 580 //------------------------------Identity---------------------------------------
 581 // Masking off the high bits of an unsigned load is not required
 582 Node* AndINode::Identity(PhaseGVN* phase) {
 583 
 584   // x & x => x
 585   if (in(1) == in(2)) {
 586     return in(1);
 587   }
 588 
 589   Node* in1 = in(1);
 590   uint op = in1->Opcode();
 591   const TypeInt* t2 = phase->type(in(2))->isa_int();
 592   if (t2 && t2->is_con()) {
 593     int con = t2->get_con();
 594     // Masking off high bits which are always zero is useless.
 595     const TypeInt* t1 = phase->type(in(1))->isa_int();
 596     if (t1 != nullptr && t1->_lo >= 0) {
 597       jint t1_support = right_n_bits(1 + log2i_graceful(t1->_hi));
 598       if ((t1_support & con) == t1_support)
 599         return in1;
 600     }
 601     // Masking off the high bits of a unsigned-shift-right is not
 602     // needed either.
 603     if (op == Op_URShiftI) {
 604       const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 605       if (t12 && t12->is_con()) {  // Shift is by a constant
 606         int shift = t12->get_con();
 607         shift &= BitsPerJavaInteger - 1;  // semantics of Java shifts
 608         int mask = max_juint >> shift;
 609         if ((mask & con) == mask)  // If AND is useless, skip it
 610           return in1;
 611       }
 612     }
 613   }
 614   return MulNode::Identity(phase);
 615 }
 616 
 617 //------------------------------Ideal------------------------------------------
 618 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 619   // pattern similar to (v1 + (v2 << 2)) & 3 transformed to v1 & 3
 620   Node* progress = AndIL_add_shift_and_mask(phase, T_INT);
 621   if (progress != nullptr) {
 622     return progress;
 623   }
 624 
 625   // Special case constant AND mask
 626   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 627   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 628   const int mask = t2->get_con();
 629   Node *load = in(1);
 630   uint lop = load->Opcode();
 631 
 632   // Masking bits off of a Character?  Hi bits are already zero.
 633   if( lop == Op_LoadUS &&
 634       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 635     return new AndINode(load,phase->intcon(mask&0xFFFF));
 636 
 637   // Masking bits off of a Short?  Loading a Character does some masking
 638   if (can_reshape &&
 639       load->outcnt() == 1 && load->unique_out() == this) {
 640     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 641       Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
 642       ldus = phase->transform(ldus);
 643       return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
 644     }
 645 
 646     // Masking sign bits off of a Byte?  Do an unsigned byte load plus
 647     // an and.
 648     if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
 649       Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
 650       ldub = phase->transform(ldub);
 651       return new AndINode(ldub, phase->intcon(mask));
 652     }
 653   }
 654 
 655   // Masking off sign bits?  Dont make them!
 656   if( lop == Op_RShiftI ) {
 657     const TypeInt *t12 = phase->type(load->in(2))->isa_int();
 658     if( t12 && t12->is_con() ) { // Shift is by a constant
 659       int shift = t12->get_con();
 660       shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 661       const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
 662       // If the AND'ing of the 2 masks has no bits, then only original shifted
 663       // bits survive.  NO sign-extension bits survive the maskings.
 664       if( (sign_bits_mask & mask) == 0 ) {
 665         // Use zero-fill shift instead
 666         Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
 667         return new AndINode( zshift, in(2) );
 668       }
 669     }
 670   }
 671 
 672   // Check for 'negate/and-1', a pattern emitted when someone asks for
 673   // 'mod 2'.  Negate leaves the low order bit unchanged (think: complement
 674   // plus 1) and the mask is of the low order bit.  Skip the negate.
 675   if( lop == Op_SubI && mask == 1 && load->in(1) &&
 676       phase->type(load->in(1)) == TypeInt::ZERO )
 677     return new AndINode( load->in(2), in(2) );
 678 
 679   return MulNode::Ideal(phase, can_reshape);
 680 }
 681 
 682 //=============================================================================
 683 //------------------------------mul_ring---------------------------------------
 684 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 685 // For the logical operations the ring's MUL is really a logical AND function.
 686 // This also type-checks the inputs for sanity.  Guaranteed never to
 687 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 688 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
 689   const TypeLong *r0 = t0->is_long(); // Handy access
 690   const TypeLong *r1 = t1->is_long();
 691   int widen = MAX2(r0->_widen,r1->_widen);
 692 
 693   // If either input is a constant, might be able to trim cases
 694   if( !r0->is_con() && !r1->is_con() )
 695     return TypeLong::LONG;      // No constants to be had
 696 
 697   // Both constants?  Return bits
 698   if( r0->is_con() && r1->is_con() )
 699     return TypeLong::make( r0->get_con() & r1->get_con() );
 700 
 701   if( r0->is_con() && r0->get_con() > 0 )
 702     return TypeLong::make(CONST64(0), r0->get_con(), widen);
 703 
 704   if( r1->is_con() && r1->get_con() > 0 )
 705     return TypeLong::make(CONST64(0), r1->get_con(), widen);
 706 
 707   return TypeLong::LONG;        // No constants to be had
 708 }
 709 
 710 const Type* AndLNode::Value(PhaseGVN* phase) const {
 711   // patterns similar to (v << 2) & 3
 712   if (AndIL_shift_and_mask_is_always_zero(phase, in(1), in(2), T_LONG, true)) {
 713     return TypeLong::ZERO;
 714   }
 715 
 716   return MulNode::Value(phase);
 717 }
 718 
 719 //------------------------------Identity---------------------------------------
 720 // Masking off the high bits of an unsigned load is not required
 721 Node* AndLNode::Identity(PhaseGVN* phase) {
 722 
 723   // x & x => x
 724   if (in(1) == in(2)) {
 725     return in(1);
 726   }
 727 
 728   Node *usr = in(1);
 729   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 730   if( t2 && t2->is_con() ) {
 731     jlong con = t2->get_con();
 732     // Masking off high bits which are always zero is useless.
 733     const TypeLong* t1 = phase->type( in(1) )->isa_long();
 734     if (t1 != nullptr && t1->_lo >= 0) {
 735       int bit_count = log2i_graceful(t1->_hi) + 1;
 736       jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
 737       if ((t1_support & con) == t1_support)
 738         return usr;
 739     }
 740     uint lop = usr->Opcode();
 741     // Masking off the high bits of a unsigned-shift-right is not
 742     // needed either.
 743     if( lop == Op_URShiftL ) {
 744       const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
 745       if( t12 && t12->is_con() ) {  // Shift is by a constant
 746         int shift = t12->get_con();
 747         shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 748         jlong mask = max_julong >> shift;
 749         if( (mask&con) == mask )  // If AND is useless, skip it
 750           return usr;
 751       }
 752     }
 753 
 754     // Check if this is part of an inline type test
 755     if (con == markWord::inline_type_pattern && in(1)->is_Load() &&
 756         phase->type(in(1)->in(MemNode::Address))->is_inlinetypeptr() &&
 757         phase->type(in(1)->in(MemNode::Address))->is_ptr()->offset() == oopDesc::mark_offset_in_bytes()) {
 758       assert(EnableValhalla, "should only be used for inline types");
 759       return in(2); // Obj is known to be an inline type
 760     }
 761   }
 762   return MulNode::Identity(phase);
 763 }
 764 
 765 //------------------------------Ideal------------------------------------------
 766 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 767   // pattern similar to (v1 + (v2 << 2)) & 3 transformed to v1 & 3
 768   Node* progress = AndIL_add_shift_and_mask(phase, T_LONG);
 769   if (progress != nullptr) {
 770     return progress;
 771   }
 772 
 773   // Special case constant AND mask
 774   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 775   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 776   const jlong mask = t2->get_con();
 777 
 778   Node* in1 = in(1);
 779   int op = in1->Opcode();
 780 
 781   // Are we masking a long that was converted from an int with a mask
 782   // that fits in 32-bits?  Commute them and use an AndINode.  Don't
 783   // convert masks which would cause a sign extension of the integer
 784   // value.  This check includes UI2L masks (0x00000000FFFFFFFF) which
 785   // would be optimized away later in Identity.
 786   if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
 787     Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
 788     andi = phase->transform(andi);
 789     return new ConvI2LNode(andi);
 790   }
 791 
 792   // Masking off sign bits?  Dont make them!
 793   if (op == Op_RShiftL) {
 794     const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 795     if( t12 && t12->is_con() ) { // Shift is by a constant
 796       int shift = t12->get_con();
 797       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 798       const julong sign_bits_mask = ~(((julong)CONST64(1) << (julong)(BitsPerJavaLong - shift)) -1);
 799       // If the AND'ing of the 2 masks has no bits, then only original shifted
 800       // bits survive.  NO sign-extension bits survive the maskings.
 801       if( (sign_bits_mask & mask) == 0 ) {
 802         // Use zero-fill shift instead
 803         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 804         return new AndLNode(zshift, in(2));
 805       }
 806     }
 807   }
 808 
 809   return MulNode::Ideal(phase, can_reshape);
 810 }
 811 
 812 LShiftNode* LShiftNode::make(Node* in1, Node* in2, BasicType bt) {
 813   switch (bt) {
 814     case T_INT:
 815       return new LShiftINode(in1, in2);
 816     case T_LONG:
 817       return new LShiftLNode(in1, in2);
 818     default:
 819       fatal("Not implemented for %s", type2name(bt));
 820   }
 821   return nullptr;
 822 }
 823 
 824 //=============================================================================
 825 
 826 static bool const_shift_count(PhaseGVN* phase, Node* shiftNode, int* count) {
 827   const TypeInt* tcount = phase->type(shiftNode->in(2))->isa_int();
 828   if (tcount != nullptr && tcount->is_con()) {
 829     *count = tcount->get_con();
 830     return true;
 831   }
 832   return false;
 833 }
 834 
 835 static int maskShiftAmount(PhaseGVN* phase, Node* shiftNode, int nBits) {
 836   int count = 0;
 837   if (const_shift_count(phase, shiftNode, &count)) {
 838     int maskedShift = count & (nBits - 1);
 839     if (maskedShift == 0) {
 840       // Let Identity() handle 0 shift count.
 841       return 0;
 842     }
 843 
 844     if (count != maskedShift) {
 845       shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
 846       PhaseIterGVN* igvn = phase->is_IterGVN();
 847       if (igvn) {
 848         igvn->rehash_node_delayed(shiftNode);
 849       }
 850     }
 851     return maskedShift;
 852   }
 853   return 0;
 854 }
 855 
 856 //------------------------------Identity---------------------------------------
 857 Node* LShiftINode::Identity(PhaseGVN* phase) {
 858   int count = 0;
 859   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaInteger - 1)) == 0) {
 860     // Shift by a multiple of 32 does nothing
 861     return in(1);
 862   }
 863   return this;
 864 }
 865 
 866 //------------------------------Ideal------------------------------------------
 867 // If the right input is a constant, and the left input is an add of a
 868 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 869 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 870   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
 871   if (con == 0) {
 872     return nullptr;
 873   }
 874 
 875   // Left input is an add?
 876   Node *add1 = in(1);
 877   int add1_op = add1->Opcode();
 878   if( add1_op == Op_AddI ) {    // Left input is an add?
 879     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 880 
 881     // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 882     // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 883     if( con < 16 ) {
 884       // Left input is an add of the same number?
 885       if (add1->in(1) == add1->in(2)) {
 886         // Convert "(x + x) << c0" into "x << (c0 + 1)"
 887         // In general, this optimization cannot be applied for c0 == 31 since
 888         // 2x << 31 != x << 32 = x << 0 = x (e.g. x = 1: 2 << 31 = 0 != 1)
 889         return new LShiftINode(add1->in(1), phase->intcon(con + 1));
 890       }
 891 
 892       // Left input is an add of a constant?
 893       const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 894       if( t12 && t12->is_con() ){ // Left input is an add of a con?
 895         // Compute X << con0
 896         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 897         // Compute X<<con0 + (con1<<con0)
 898         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 899       }
 900     }
 901   }
 902 
 903   // Check for "(x >> C1) << C2"
 904   if (add1_op == Op_RShiftI || add1_op == Op_URShiftI) {
 905     int add1Con = 0;
 906     const_shift_count(phase, add1, &add1Con);
 907 
 908     // Special case C1 == C2, which just masks off low bits
 909     if (add1Con > 0 && con == add1Con) {
 910       // Convert to "(x & -(1 << C2))"
 911       return new AndINode(add1->in(1), phase->intcon(-(1 << con)));
 912     } else {
 913       // Wait until the right shift has been sharpened to the correct count
 914       if (add1Con > 0 && add1Con < BitsPerJavaInteger) {
 915         // As loop parsing can produce LShiftI nodes, we should wait until the graph is fully formed
 916         // to apply optimizations, otherwise we can inadvertently stop vectorization opportunities.
 917         if (phase->is_IterGVN()) {
 918           if (con > add1Con) {
 919             // Creates "(x << (C2 - C1)) & -(1 << C2)"
 920             Node* lshift = phase->transform(new LShiftINode(add1->in(1), phase->intcon(con - add1Con)));
 921             return new AndINode(lshift, phase->intcon(-(1 << con)));
 922           } else {
 923             assert(con < add1Con, "must be (%d < %d)", con, add1Con);
 924             // Creates "(x >> (C1 - C2)) & -(1 << C2)"
 925 
 926             // Handle logical and arithmetic shifts
 927             Node* rshift;
 928             if (add1_op == Op_RShiftI) {
 929               rshift = phase->transform(new RShiftINode(add1->in(1), phase->intcon(add1Con - con)));
 930             } else {
 931               rshift = phase->transform(new URShiftINode(add1->in(1), phase->intcon(add1Con - con)));
 932             }
 933 
 934             return new AndINode(rshift, phase->intcon(-(1 << con)));
 935           }
 936         } else {
 937           phase->record_for_igvn(this);
 938         }
 939       }
 940     }
 941   }
 942 
 943   // Check for "((x >> C1) & Y) << C2"
 944   if (add1_op == Op_AndI) {
 945     Node *add2 = add1->in(1);
 946     int add2_op = add2->Opcode();
 947     if (add2_op == Op_RShiftI || add2_op == Op_URShiftI) {
 948       // Special case C1 == C2, which just masks off low bits
 949       if (add2->in(2) == in(2)) {
 950         // Convert to "(x & (Y << C2))"
 951         Node* y_sh = phase->transform(new LShiftINode(add1->in(2), phase->intcon(con)));
 952         return new AndINode(add2->in(1), y_sh);
 953       }
 954 
 955       int add2Con = 0;
 956       const_shift_count(phase, add2, &add2Con);
 957       if (add2Con > 0 && add2Con < BitsPerJavaInteger) {
 958         if (phase->is_IterGVN()) {
 959           // Convert to "((x >> C1) << C2) & (Y << C2)"
 960 
 961           // Make "(x >> C1) << C2", which will get folded away by the rule above
 962           Node* x_sh = phase->transform(new LShiftINode(add2, phase->intcon(con)));
 963           // Make "Y << C2", which will simplify when Y is a constant
 964           Node* y_sh = phase->transform(new LShiftINode(add1->in(2), phase->intcon(con)));
 965 
 966           return new AndINode(x_sh, y_sh);
 967         } else {
 968           phase->record_for_igvn(this);
 969         }
 970       }
 971     }
 972   }
 973 
 974   // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
 975   // before shifting them away.
 976   const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
 977   if( add1_op == Op_AndI &&
 978       phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
 979     return new LShiftINode( add1->in(1), in(2) );
 980 
 981   return nullptr;
 982 }
 983 
 984 //------------------------------Value------------------------------------------
 985 // A LShiftINode shifts its input2 left by input1 amount.
 986 const Type* LShiftINode::Value(PhaseGVN* phase) const {
 987   const Type *t1 = phase->type( in(1) );
 988   const Type *t2 = phase->type( in(2) );
 989   // Either input is TOP ==> the result is TOP
 990   if( t1 == Type::TOP ) return Type::TOP;
 991   if( t2 == Type::TOP ) return Type::TOP;
 992 
 993   // Left input is ZERO ==> the result is ZERO.
 994   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
 995   // Shift by zero does nothing
 996   if( t2 == TypeInt::ZERO ) return t1;
 997 
 998   // Either input is BOTTOM ==> the result is BOTTOM
 999   if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
1000       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
1001     return TypeInt::INT;
1002 
1003   const TypeInt *r1 = t1->is_int(); // Handy access
1004   const TypeInt *r2 = t2->is_int(); // Handy access
1005 
1006   if (!r2->is_con())
1007     return TypeInt::INT;
1008 
1009   uint shift = r2->get_con();
1010   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1011   // Shift by a multiple of 32 does nothing:
1012   if (shift == 0)  return t1;
1013 
1014   // If the shift is a constant, shift the bounds of the type,
1015   // unless this could lead to an overflow.
1016   if (!r1->is_con()) {
1017     jint lo = r1->_lo, hi = r1->_hi;
1018     if (((lo << shift) >> shift) == lo &&
1019         ((hi << shift) >> shift) == hi) {
1020       // No overflow.  The range shifts up cleanly.
1021       return TypeInt::make((jint)lo << (jint)shift,
1022                            (jint)hi << (jint)shift,
1023                            MAX2(r1->_widen,r2->_widen));
1024     }
1025     return TypeInt::INT;
1026   }
1027 
1028   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
1029 }
1030 
1031 //=============================================================================
1032 //------------------------------Identity---------------------------------------
1033 Node* LShiftLNode::Identity(PhaseGVN* phase) {
1034   int count = 0;
1035   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaLong - 1)) == 0) {
1036     // Shift by a multiple of 64 does nothing
1037     return in(1);
1038   }
1039   return this;
1040 }
1041 
1042 //------------------------------Ideal------------------------------------------
1043 // If the right input is a constant, and the left input is an add of a
1044 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
1045 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1046   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1047   if (con == 0) {
1048     return nullptr;
1049   }
1050 
1051   // Left input is an add?
1052   Node *add1 = in(1);
1053   int add1_op = add1->Opcode();
1054   if( add1_op == Op_AddL ) {    // Left input is an add?
1055     // Avoid dead data cycles from dead loops
1056     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
1057 
1058     // Left input is an add of the same number?
1059     if (con != (BitsPerJavaLong - 1) && add1->in(1) == add1->in(2)) {
1060       // Convert "(x + x) << c0" into "x << (c0 + 1)"
1061       // Can only be applied if c0 != 63 because:
1062       // (x + x) << 63 = 2x << 63, while
1063       // (x + x) << 63 --transform--> x << 64 = x << 0 = x (!= 2x << 63, for example for x = 1)
1064       // According to the Java spec, chapter 15.19, we only consider the six lowest-order bits of the right-hand operand
1065       // (i.e. "right-hand operand" & 0b111111). Therefore, x << 64 is the same as x << 0 (64 = 0b10000000 & 0b0111111 = 0).
1066       return new LShiftLNode(add1->in(1), phase->intcon(con + 1));
1067     }
1068 
1069     // Left input is an add of a constant?
1070     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
1071     if( t12 && t12->is_con() ){ // Left input is an add of a con?
1072       // Compute X << con0
1073       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
1074       // Compute X<<con0 + (con1<<con0)
1075       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
1076     }
1077   }
1078 
1079   // Check for "(x >> C1) << C2"
1080   if (add1_op == Op_RShiftL || add1_op == Op_URShiftL) {
1081     int add1Con = 0;
1082     const_shift_count(phase, add1, &add1Con);
1083 
1084     // Special case C1 == C2, which just masks off low bits
1085     if (add1Con > 0 && con == add1Con) {
1086       // Convert to "(x & -(1 << C2))"
1087       return new AndLNode(add1->in(1), phase->longcon(-(CONST64(1) << con)));
1088     } else {
1089       // Wait until the right shift has been sharpened to the correct count
1090       if (add1Con > 0 && add1Con < BitsPerJavaLong) {
1091         // As loop parsing can produce LShiftI nodes, we should wait until the graph is fully formed
1092         // to apply optimizations, otherwise we can inadvertently stop vectorization opportunities.
1093         if (phase->is_IterGVN()) {
1094           if (con > add1Con) {
1095             // Creates "(x << (C2 - C1)) & -(1 << C2)"
1096             Node* lshift = phase->transform(new LShiftLNode(add1->in(1), phase->intcon(con - add1Con)));
1097             return new AndLNode(lshift, phase->longcon(-(CONST64(1) << con)));
1098           } else {
1099             assert(con < add1Con, "must be (%d < %d)", con, add1Con);
1100             // Creates "(x >> (C1 - C2)) & -(1 << C2)"
1101 
1102             // Handle logical and arithmetic shifts
1103             Node* rshift;
1104             if (add1_op == Op_RShiftL) {
1105               rshift = phase->transform(new RShiftLNode(add1->in(1), phase->intcon(add1Con - con)));
1106             } else {
1107               rshift = phase->transform(new URShiftLNode(add1->in(1), phase->intcon(add1Con - con)));
1108             }
1109 
1110             return new AndLNode(rshift, phase->longcon(-(CONST64(1) << con)));
1111           }
1112         } else {
1113           phase->record_for_igvn(this);
1114         }
1115       }
1116     }
1117   }
1118 
1119   // Check for "((x >> C1) & Y) << C2"
1120   if (add1_op == Op_AndL) {
1121     Node* add2 = add1->in(1);
1122     int add2_op = add2->Opcode();
1123     if (add2_op == Op_RShiftL || add2_op == Op_URShiftL) {
1124       // Special case C1 == C2, which just masks off low bits
1125       if (add2->in(2) == in(2)) {
1126         // Convert to "(x & (Y << C2))"
1127         Node* y_sh = phase->transform(new LShiftLNode(add1->in(2), phase->intcon(con)));
1128         return new AndLNode(add2->in(1), y_sh);
1129       }
1130 
1131       int add2Con = 0;
1132       const_shift_count(phase, add2, &add2Con);
1133       if (add2Con > 0 && add2Con < BitsPerJavaLong) {
1134         if (phase->is_IterGVN()) {
1135           // Convert to "((x >> C1) << C2) & (Y << C2)"
1136 
1137           // Make "(x >> C1) << C2", which will get folded away by the rule above
1138           Node* x_sh = phase->transform(new LShiftLNode(add2, phase->intcon(con)));
1139           // Make "Y << C2", which will simplify when Y is a constant
1140           Node* y_sh = phase->transform(new LShiftLNode(add1->in(2), phase->intcon(con)));
1141 
1142           return new AndLNode(x_sh, y_sh);
1143         } else {
1144           phase->record_for_igvn(this);
1145         }
1146       }
1147     }
1148   }
1149 
1150   // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
1151   // before shifting them away.
1152   const jlong bits_mask = jlong(max_julong >> con);
1153   if( add1_op == Op_AndL &&
1154       phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
1155     return new LShiftLNode( add1->in(1), in(2) );
1156 
1157   return nullptr;
1158 }
1159 
1160 //------------------------------Value------------------------------------------
1161 // A LShiftLNode shifts its input2 left by input1 amount.
1162 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
1163   const Type *t1 = phase->type( in(1) );
1164   const Type *t2 = phase->type( in(2) );
1165   // Either input is TOP ==> the result is TOP
1166   if( t1 == Type::TOP ) return Type::TOP;
1167   if( t2 == Type::TOP ) return Type::TOP;
1168 
1169   // Left input is ZERO ==> the result is ZERO.
1170   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1171   // Shift by zero does nothing
1172   if( t2 == TypeInt::ZERO ) return t1;
1173 
1174   // Either input is BOTTOM ==> the result is BOTTOM
1175   if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
1176       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
1177     return TypeLong::LONG;
1178 
1179   const TypeLong *r1 = t1->is_long(); // Handy access
1180   const TypeInt  *r2 = t2->is_int();  // Handy access
1181 
1182   if (!r2->is_con())
1183     return TypeLong::LONG;
1184 
1185   uint shift = r2->get_con();
1186   shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
1187   // Shift by a multiple of 64 does nothing:
1188   if (shift == 0)  return t1;
1189 
1190   // If the shift is a constant, shift the bounds of the type,
1191   // unless this could lead to an overflow.
1192   if (!r1->is_con()) {
1193     jlong lo = r1->_lo, hi = r1->_hi;
1194     if (((lo << shift) >> shift) == lo &&
1195         ((hi << shift) >> shift) == hi) {
1196       // No overflow.  The range shifts up cleanly.
1197       return TypeLong::make((jlong)lo << (jint)shift,
1198                             (jlong)hi << (jint)shift,
1199                             MAX2(r1->_widen,r2->_widen));
1200     }
1201     return TypeLong::LONG;
1202   }
1203 
1204   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
1205 }
1206 
1207 //=============================================================================
1208 //------------------------------Identity---------------------------------------
1209 Node* RShiftINode::Identity(PhaseGVN* phase) {
1210   int count = 0;
1211   if (const_shift_count(phase, this, &count)) {
1212     if ((count & (BitsPerJavaInteger - 1)) == 0) {
1213       // Shift by a multiple of 32 does nothing
1214       return in(1);
1215     }
1216     // Check for useless sign-masking
1217     if (in(1)->Opcode() == Op_LShiftI &&
1218         in(1)->req() == 3 &&
1219         in(1)->in(2) == in(2)) {
1220       count &= BitsPerJavaInteger-1; // semantics of Java shifts
1221       // Compute masks for which this shifting doesn't change
1222       int lo = (-1 << (BitsPerJavaInteger - ((uint)count)-1)); // FFFF8000
1223       int hi = ~lo;               // 00007FFF
1224       const TypeInt* t11 = phase->type(in(1)->in(1))->isa_int();
1225       if (t11 == nullptr) {
1226         return this;
1227       }
1228       // Does actual value fit inside of mask?
1229       if (lo <= t11->_lo && t11->_hi <= hi) {
1230         return in(1)->in(1);      // Then shifting is a nop
1231       }
1232     }
1233   }
1234   return this;
1235 }
1236 
1237 //------------------------------Ideal------------------------------------------
1238 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1239   // Inputs may be TOP if they are dead.
1240   const TypeInt *t1 = phase->type(in(1))->isa_int();
1241   if (!t1) return nullptr;        // Left input is an integer
1242   const TypeInt *t3;  // type of in(1).in(2)
1243   int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
1244   if (shift == 0) {
1245     return nullptr;
1246   }
1247 
1248   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
1249   // Such expressions arise normally from shift chains like (byte)(x >> 24).
1250   const Node *mask = in(1);
1251   if( mask->Opcode() == Op_AndI &&
1252       (t3 = phase->type(mask->in(2))->isa_int()) &&
1253       t3->is_con() ) {
1254     Node *x = mask->in(1);
1255     jint maskbits = t3->get_con();
1256     // Convert to "(x >> shift) & (mask >> shift)"
1257     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
1258     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
1259   }
1260 
1261   // Check for "(short[i] <<16)>>16" which simply sign-extends
1262   const Node *shl = in(1);
1263   if( shl->Opcode() != Op_LShiftI ) return nullptr;
1264 
1265   if( shift == 16 &&
1266       (t3 = phase->type(shl->in(2))->isa_int()) &&
1267       t3->is_con(16) ) {
1268     Node *ld = shl->in(1);
1269     if( ld->Opcode() == Op_LoadS ) {
1270       // Sign extension is just useless here.  Return a RShiftI of zero instead
1271       // returning 'ld' directly.  We cannot return an old Node directly as
1272       // that is the job of 'Identity' calls and Identity calls only work on
1273       // direct inputs ('ld' is an extra Node removed from 'this').  The
1274       // combined optimization requires Identity only return direct inputs.
1275       set_req_X(1, ld, phase);
1276       set_req_X(2, phase->intcon(0), phase);
1277       return this;
1278     }
1279     else if (can_reshape &&
1280              ld->Opcode() == Op_LoadUS &&
1281              ld->outcnt() == 1 && ld->unique_out() == shl)
1282       // Replace zero-extension-load with sign-extension-load
1283       return ld->as_Load()->convert_to_signed_load(*phase);
1284   }
1285 
1286   // Check for "(byte[i] <<24)>>24" which simply sign-extends
1287   if( shift == 24 &&
1288       (t3 = phase->type(shl->in(2))->isa_int()) &&
1289       t3->is_con(24) ) {
1290     Node *ld = shl->in(1);
1291     if (ld->Opcode() == Op_LoadB) {
1292       // Sign extension is just useless here
1293       set_req_X(1, ld, phase);
1294       set_req_X(2, phase->intcon(0), phase);
1295       return this;
1296     }
1297   }
1298 
1299   return nullptr;
1300 }
1301 
1302 //------------------------------Value------------------------------------------
1303 // A RShiftINode shifts its input2 right by input1 amount.
1304 const Type* RShiftINode::Value(PhaseGVN* phase) const {
1305   const Type *t1 = phase->type( in(1) );
1306   const Type *t2 = phase->type( in(2) );
1307   // Either input is TOP ==> the result is TOP
1308   if( t1 == Type::TOP ) return Type::TOP;
1309   if( t2 == Type::TOP ) return Type::TOP;
1310 
1311   // Left input is ZERO ==> the result is ZERO.
1312   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1313   // Shift by zero does nothing
1314   if( t2 == TypeInt::ZERO ) return t1;
1315 
1316   // Either input is BOTTOM ==> the result is BOTTOM
1317   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1318     return TypeInt::INT;
1319 
1320   if (t2 == TypeInt::INT)
1321     return TypeInt::INT;
1322 
1323   const TypeInt *r1 = t1->is_int(); // Handy access
1324   const TypeInt *r2 = t2->is_int(); // Handy access
1325 
1326   // If the shift is a constant, just shift the bounds of the type.
1327   // For example, if the shift is 31, we just propagate sign bits.
1328   if (r2->is_con()) {
1329     uint shift = r2->get_con();
1330     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1331     // Shift by a multiple of 32 does nothing:
1332     if (shift == 0)  return t1;
1333     // Calculate reasonably aggressive bounds for the result.
1334     // This is necessary if we are to correctly type things
1335     // like (x<<24>>24) == ((byte)x).
1336     jint lo = (jint)r1->_lo >> (jint)shift;
1337     jint hi = (jint)r1->_hi >> (jint)shift;
1338     assert(lo <= hi, "must have valid bounds");
1339     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1340 #ifdef ASSERT
1341     // Make sure we get the sign-capture idiom correct.
1342     if (shift == BitsPerJavaInteger-1) {
1343       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
1344       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1345     }
1346 #endif
1347     return ti;
1348   }
1349 
1350   if( !r1->is_con() || !r2->is_con() )
1351     return TypeInt::INT;
1352 
1353   // Signed shift right
1354   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1355 }
1356 
1357 //=============================================================================
1358 //------------------------------Identity---------------------------------------
1359 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1360   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1361   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1362 }
1363 
1364 //------------------------------Value------------------------------------------
1365 // A RShiftLNode shifts its input2 right by input1 amount.
1366 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1367   const Type *t1 = phase->type( in(1) );
1368   const Type *t2 = phase->type( in(2) );
1369   // Either input is TOP ==> the result is TOP
1370   if( t1 == Type::TOP ) return Type::TOP;
1371   if( t2 == Type::TOP ) return Type::TOP;
1372 
1373   // Left input is ZERO ==> the result is ZERO.
1374   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1375   // Shift by zero does nothing
1376   if( t2 == TypeInt::ZERO ) return t1;
1377 
1378   // Either input is BOTTOM ==> the result is BOTTOM
1379   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1380     return TypeLong::LONG;
1381 
1382   if (t2 == TypeInt::INT)
1383     return TypeLong::LONG;
1384 
1385   const TypeLong *r1 = t1->is_long(); // Handy access
1386   const TypeInt  *r2 = t2->is_int (); // Handy access
1387 
1388   // If the shift is a constant, just shift the bounds of the type.
1389   // For example, if the shift is 63, we just propagate sign bits.
1390   if (r2->is_con()) {
1391     uint shift = r2->get_con();
1392     shift &= (2*BitsPerJavaInteger)-1;  // semantics of Java shifts
1393     // Shift by a multiple of 64 does nothing:
1394     if (shift == 0)  return t1;
1395     // Calculate reasonably aggressive bounds for the result.
1396     // This is necessary if we are to correctly type things
1397     // like (x<<24>>24) == ((byte)x).
1398     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1399     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1400     assert(lo <= hi, "must have valid bounds");
1401     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1402     #ifdef ASSERT
1403     // Make sure we get the sign-capture idiom correct.
1404     if (shift == (2*BitsPerJavaInteger)-1) {
1405       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1406       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1407     }
1408     #endif
1409     return tl;
1410   }
1411 
1412   return TypeLong::LONG;                // Give up
1413 }
1414 
1415 //=============================================================================
1416 //------------------------------Identity---------------------------------------
1417 Node* URShiftINode::Identity(PhaseGVN* phase) {
1418   int count = 0;
1419   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaInteger - 1)) == 0) {
1420     // Shift by a multiple of 32 does nothing
1421     return in(1);
1422   }
1423 
1424   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1425   // Happens during new-array length computation.
1426   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1427   Node *add = in(1);
1428   if (add->Opcode() == Op_AddI) {
1429     const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1430     if (t2 && t2->is_con(wordSize - 1) &&
1431         add->in(1)->Opcode() == Op_LShiftI) {
1432       // Check that shift_counts are LogBytesPerWord.
1433       Node          *lshift_count   = add->in(1)->in(2);
1434       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1435       if (t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1436           t_lshift_count == phase->type(in(2))) {
1437         Node          *x   = add->in(1)->in(1);
1438         const TypeInt *t_x = phase->type(x)->isa_int();
1439         if (t_x != nullptr && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord)) {
1440           return x;
1441         }
1442       }
1443     }
1444   }
1445 
1446   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1447 }
1448 
1449 //------------------------------Ideal------------------------------------------
1450 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1451   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1452   if (con == 0) {
1453     return nullptr;
1454   }
1455 
1456   // We'll be wanting the right-shift amount as a mask of that many bits
1457   const int mask = right_n_bits(BitsPerJavaInteger - con);
1458 
1459   int in1_op = in(1)->Opcode();
1460 
1461   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1462   if( in1_op == Op_URShiftI ) {
1463     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1464     if( t12 && t12->is_con() ) { // Right input is a constant
1465       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1466       const int con2 = t12->get_con() & 31; // Shift count is always masked
1467       const int con3 = con+con2;
1468       if( con3 < 32 )           // Only merge shifts if total is < 32
1469         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1470     }
1471   }
1472 
1473   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1474   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1475   // If Q is "X << z" the rounding is useless.  Look for patterns like
1476   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1477   Node *add = in(1);
1478   const TypeInt *t2 = phase->type(in(2))->isa_int();
1479   if (in1_op == Op_AddI) {
1480     Node *lshl = add->in(1);
1481     if( lshl->Opcode() == Op_LShiftI &&
1482         phase->type(lshl->in(2)) == t2 ) {
1483       Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1484       Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1485       return new AndINode( sum, phase->intcon(mask) );
1486     }
1487   }
1488 
1489   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1490   // This shortens the mask.  Also, if we are extracting a high byte and
1491   // storing it to a buffer, the mask will be removed completely.
1492   Node *andi = in(1);
1493   if( in1_op == Op_AndI ) {
1494     const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1495     if( t3 && t3->is_con() ) { // Right input is a constant
1496       jint mask2 = t3->get_con();
1497       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1498       Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1499       return new AndINode(newshr, phase->intcon(mask2));
1500       // The negative values are easier to materialize than positive ones.
1501       // A typical case from address arithmetic is ((x & ~15) >> 4).
1502       // It's better to change that to ((x >> 4) & ~0) versus
1503       // ((x >> 4) & 0x0FFFFFFF).  The difference is greatest in LP64.
1504     }
1505   }
1506 
1507   // Check for "(X << z ) >>> z" which simply zero-extends
1508   Node *shl = in(1);
1509   if( in1_op == Op_LShiftI &&
1510       phase->type(shl->in(2)) == t2 )
1511     return new AndINode( shl->in(1), phase->intcon(mask) );
1512 
1513   // Check for (x >> n) >>> 31. Replace with (x >>> 31)
1514   Node *shr = in(1);
1515   if ( in1_op == Op_RShiftI ) {
1516     Node *in11 = shr->in(1);
1517     Node *in12 = shr->in(2);
1518     const TypeInt *t11 = phase->type(in11)->isa_int();
1519     const TypeInt *t12 = phase->type(in12)->isa_int();
1520     if ( t11 && t2 && t2->is_con(31) && t12 && t12->is_con() ) {
1521       return new URShiftINode(in11, phase->intcon(31));
1522     }
1523   }
1524 
1525   return nullptr;
1526 }
1527 
1528 //------------------------------Value------------------------------------------
1529 // A URShiftINode shifts its input2 right by input1 amount.
1530 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1531   // (This is a near clone of RShiftINode::Value.)
1532   const Type *t1 = phase->type( in(1) );
1533   const Type *t2 = phase->type( in(2) );
1534   // Either input is TOP ==> the result is TOP
1535   if( t1 == Type::TOP ) return Type::TOP;
1536   if( t2 == Type::TOP ) return Type::TOP;
1537 
1538   // Left input is ZERO ==> the result is ZERO.
1539   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1540   // Shift by zero does nothing
1541   if( t2 == TypeInt::ZERO ) return t1;
1542 
1543   // Either input is BOTTOM ==> the result is BOTTOM
1544   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1545     return TypeInt::INT;
1546 
1547   if (t2 == TypeInt::INT)
1548     return TypeInt::INT;
1549 
1550   const TypeInt *r1 = t1->is_int();     // Handy access
1551   const TypeInt *r2 = t2->is_int();     // Handy access
1552 
1553   if (r2->is_con()) {
1554     uint shift = r2->get_con();
1555     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1556     // Shift by a multiple of 32 does nothing:
1557     if (shift == 0)  return t1;
1558     // Calculate reasonably aggressive bounds for the result.
1559     jint lo = (juint)r1->_lo >> (juint)shift;
1560     jint hi = (juint)r1->_hi >> (juint)shift;
1561     if (r1->_hi >= 0 && r1->_lo < 0) {
1562       // If the type has both negative and positive values,
1563       // there are two separate sub-domains to worry about:
1564       // The positive half and the negative half.
1565       jint neg_lo = lo;
1566       jint neg_hi = (juint)-1 >> (juint)shift;
1567       jint pos_lo = (juint) 0 >> (juint)shift;
1568       jint pos_hi = hi;
1569       lo = MIN2(neg_lo, pos_lo);  // == 0
1570       hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1571     }
1572     assert(lo <= hi, "must have valid bounds");
1573     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1574     #ifdef ASSERT
1575     // Make sure we get the sign-capture idiom correct.
1576     if (shift == BitsPerJavaInteger-1) {
1577       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1578       if (r1->_hi < 0)  assert(ti == TypeInt::ONE,  ">>>31 of - is +1");
1579     }
1580     #endif
1581     return ti;
1582   }
1583 
1584   //
1585   // Do not support shifted oops in info for GC
1586   //
1587   // else if( t1->base() == Type::InstPtr ) {
1588   //
1589   //   const TypeInstPtr *o = t1->is_instptr();
1590   //   if( t1->singleton() )
1591   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1592   // }
1593   // else if( t1->base() == Type::KlassPtr ) {
1594   //   const TypeKlassPtr *o = t1->is_klassptr();
1595   //   if( t1->singleton() )
1596   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1597   // }
1598 
1599   return TypeInt::INT;
1600 }
1601 
1602 //=============================================================================
1603 //------------------------------Identity---------------------------------------
1604 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1605   int count = 0;
1606   if (const_shift_count(phase, this, &count) && (count & (BitsPerJavaLong - 1)) == 0) {
1607     // Shift by a multiple of 64 does nothing
1608     return in(1);
1609   }
1610   return this;
1611 }
1612 
1613 //------------------------------Ideal------------------------------------------
1614 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1615   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1616   if (con == 0) {
1617     return nullptr;
1618   }
1619 
1620   // We'll be wanting the right-shift amount as a mask of that many bits
1621   const jlong mask = jlong(max_julong >> con);
1622 
1623   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1624   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1625   // If Q is "X << z" the rounding is useless.  Look for patterns like
1626   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1627   Node *add = in(1);
1628   const TypeInt *t2 = phase->type(in(2))->isa_int();
1629   if (add->Opcode() == Op_AddL) {
1630     Node *lshl = add->in(1);
1631     if( lshl->Opcode() == Op_LShiftL &&
1632         phase->type(lshl->in(2)) == t2 ) {
1633       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1634       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1635       return new AndLNode( sum, phase->longcon(mask) );
1636     }
1637   }
1638 
1639   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1640   // This shortens the mask.  Also, if we are extracting a high byte and
1641   // storing it to a buffer, the mask will be removed completely.
1642   Node *andi = in(1);
1643   if( andi->Opcode() == Op_AndL ) {
1644     const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1645     if( t3 && t3->is_con() ) { // Right input is a constant
1646       jlong mask2 = t3->get_con();
1647       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1648       Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1649       return new AndLNode(newshr, phase->longcon(mask2));
1650     }
1651   }
1652 
1653   // Check for "(X << z ) >>> z" which simply zero-extends
1654   Node *shl = in(1);
1655   if( shl->Opcode() == Op_LShiftL &&
1656       phase->type(shl->in(2)) == t2 )
1657     return new AndLNode( shl->in(1), phase->longcon(mask) );
1658 
1659   // Check for (x >> n) >>> 63. Replace with (x >>> 63)
1660   Node *shr = in(1);
1661   if ( shr->Opcode() == Op_RShiftL ) {
1662     Node *in11 = shr->in(1);
1663     Node *in12 = shr->in(2);
1664     const TypeLong *t11 = phase->type(in11)->isa_long();
1665     const TypeInt *t12 = phase->type(in12)->isa_int();
1666     if ( t11 && t2 && t2->is_con(63) && t12 && t12->is_con() ) {
1667       return new URShiftLNode(in11, phase->intcon(63));
1668     }
1669   }
1670   return nullptr;
1671 }
1672 
1673 //------------------------------Value------------------------------------------
1674 // A URShiftINode shifts its input2 right by input1 amount.
1675 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1676   // (This is a near clone of RShiftLNode::Value.)
1677   const Type *t1 = phase->type( in(1) );
1678   const Type *t2 = phase->type( in(2) );
1679   // Either input is TOP ==> the result is TOP
1680   if( t1 == Type::TOP ) return Type::TOP;
1681   if( t2 == Type::TOP ) return Type::TOP;
1682 
1683   // Left input is ZERO ==> the result is ZERO.
1684   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1685   // Shift by zero does nothing
1686   if( t2 == TypeInt::ZERO ) return t1;
1687 
1688   // Either input is BOTTOM ==> the result is BOTTOM
1689   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1690     return TypeLong::LONG;
1691 
1692   if (t2 == TypeInt::INT)
1693     return TypeLong::LONG;
1694 
1695   const TypeLong *r1 = t1->is_long(); // Handy access
1696   const TypeInt  *r2 = t2->is_int (); // Handy access
1697 
1698   if (r2->is_con()) {
1699     uint shift = r2->get_con();
1700     shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
1701     // Shift by a multiple of 64 does nothing:
1702     if (shift == 0)  return t1;
1703     // Calculate reasonably aggressive bounds for the result.
1704     jlong lo = (julong)r1->_lo >> (juint)shift;
1705     jlong hi = (julong)r1->_hi >> (juint)shift;
1706     if (r1->_hi >= 0 && r1->_lo < 0) {
1707       // If the type has both negative and positive values,
1708       // there are two separate sub-domains to worry about:
1709       // The positive half and the negative half.
1710       jlong neg_lo = lo;
1711       jlong neg_hi = (julong)-1 >> (juint)shift;
1712       jlong pos_lo = (julong) 0 >> (juint)shift;
1713       jlong pos_hi = hi;
1714       //lo = MIN2(neg_lo, pos_lo);  // == 0
1715       lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1716       //hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1717       hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1718     }
1719     assert(lo <= hi, "must have valid bounds");
1720     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1721     #ifdef ASSERT
1722     // Make sure we get the sign-capture idiom correct.
1723     if (shift == BitsPerJavaLong - 1) {
1724       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1725       if (r1->_hi < 0)  assert(tl == TypeLong::ONE,  ">>>63 of - is +1");
1726     }
1727     #endif
1728     return tl;
1729   }
1730 
1731   return TypeLong::LONG;                // Give up
1732 }
1733 
1734 //=============================================================================
1735 //------------------------------Value------------------------------------------
1736 const Type* FmaDNode::Value(PhaseGVN* phase) const {
1737   const Type *t1 = phase->type(in(1));
1738   if (t1 == Type::TOP) return Type::TOP;
1739   if (t1->base() != Type::DoubleCon) return Type::DOUBLE;
1740   const Type *t2 = phase->type(in(2));
1741   if (t2 == Type::TOP) return Type::TOP;
1742   if (t2->base() != Type::DoubleCon) return Type::DOUBLE;
1743   const Type *t3 = phase->type(in(3));
1744   if (t3 == Type::TOP) return Type::TOP;
1745   if (t3->base() != Type::DoubleCon) return Type::DOUBLE;
1746 #ifndef __STDC_IEC_559__
1747   return Type::DOUBLE;
1748 #else
1749   double d1 = t1->getd();
1750   double d2 = t2->getd();
1751   double d3 = t3->getd();
1752   return TypeD::make(fma(d1, d2, d3));
1753 #endif
1754 }
1755 
1756 //=============================================================================
1757 //------------------------------Value------------------------------------------
1758 const Type* FmaFNode::Value(PhaseGVN* phase) const {
1759   const Type *t1 = phase->type(in(1));
1760   if (t1 == Type::TOP) return Type::TOP;
1761   if (t1->base() != Type::FloatCon) return Type::FLOAT;
1762   const Type *t2 = phase->type(in(2));
1763   if (t2 == Type::TOP) return Type::TOP;
1764   if (t2->base() != Type::FloatCon) return Type::FLOAT;
1765   const Type *t3 = phase->type(in(3));
1766   if (t3 == Type::TOP) return Type::TOP;
1767   if (t3->base() != Type::FloatCon) return Type::FLOAT;
1768 #ifndef __STDC_IEC_559__
1769   return Type::FLOAT;
1770 #else
1771   float f1 = t1->getf();
1772   float f2 = t2->getf();
1773   float f3 = t3->getf();
1774   return TypeF::make(fma(f1, f2, f3));
1775 #endif
1776 }
1777 
1778 //=============================================================================
1779 //------------------------------hash-------------------------------------------
1780 // Hash function for MulAddS2INode.  Operation is commutative with commutative pairs.
1781 // The hash function must return the same value when edge swapping is performed.
1782 uint MulAddS2INode::hash() const {
1783   return (uintptr_t)in(1) + (uintptr_t)in(2) + (uintptr_t)in(3) + (uintptr_t)in(4) + Opcode();
1784 }
1785 
1786 //------------------------------Rotate Operations ------------------------------
1787 
1788 Node* RotateLeftNode::Identity(PhaseGVN* phase) {
1789   const Type* t1 = phase->type(in(1));
1790   if (t1 == Type::TOP) {
1791     return this;
1792   }
1793   int count = 0;
1794   assert(t1->isa_int() || t1->isa_long(), "Unexpected type");
1795   int mask = (t1->isa_int() ? BitsPerJavaInteger : BitsPerJavaLong) - 1;
1796   if (const_shift_count(phase, this, &count) && (count & mask) == 0) {
1797     // Rotate by a multiple of 32/64 does nothing
1798     return in(1);
1799   }
1800   return this;
1801 }
1802 
1803 const Type* RotateLeftNode::Value(PhaseGVN* phase) const {
1804   const Type* t1 = phase->type(in(1));
1805   const Type* t2 = phase->type(in(2));
1806   // Either input is TOP ==> the result is TOP
1807   if (t1 == Type::TOP || t2 == Type::TOP) {
1808     return Type::TOP;
1809   }
1810 
1811   if (t1->isa_int()) {
1812     const TypeInt* r1 = t1->is_int();
1813     const TypeInt* r2 = t2->is_int();
1814 
1815     // Left input is ZERO ==> the result is ZERO.
1816     if (r1 == TypeInt::ZERO) {
1817       return TypeInt::ZERO;
1818     }
1819     // Rotate by zero does nothing
1820     if (r2 == TypeInt::ZERO) {
1821       return r1;
1822     }
1823     if (r1->is_con() && r2->is_con()) {
1824       juint r1_con = (juint)r1->get_con();
1825       juint shift = (juint)(r2->get_con()) & (juint)(BitsPerJavaInteger - 1); // semantics of Java shifts
1826       return TypeInt::make((r1_con << shift) | (r1_con >> (32 - shift)));
1827     }
1828     return TypeInt::INT;
1829   } else {
1830     assert(t1->isa_long(), "Type must be a long");
1831     const TypeLong* r1 = t1->is_long();
1832     const TypeInt*  r2 = t2->is_int();
1833 
1834     // Left input is ZERO ==> the result is ZERO.
1835     if (r1 == TypeLong::ZERO) {
1836       return TypeLong::ZERO;
1837     }
1838     // Rotate by zero does nothing
1839     if (r2 == TypeInt::ZERO) {
1840       return r1;
1841     }
1842     if (r1->is_con() && r2->is_con()) {
1843       julong r1_con = (julong)r1->get_con();
1844       julong shift = (julong)(r2->get_con()) & (julong)(BitsPerJavaLong - 1); // semantics of Java shifts
1845       return TypeLong::make((r1_con << shift) | (r1_con >> (64 - shift)));
1846     }
1847     return TypeLong::LONG;
1848   }
1849 }
1850 
1851 Node* RotateLeftNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1852   const Type* t1 = phase->type(in(1));
1853   const Type* t2 = phase->type(in(2));
1854   if (t2->isa_int() && t2->is_int()->is_con()) {
1855     if (t1->isa_int()) {
1856       int lshift = t2->is_int()->get_con() & 31;
1857       return new RotateRightNode(in(1), phase->intcon(32 - (lshift & 31)), TypeInt::INT);
1858     } else if (t1 != Type::TOP) {
1859       assert(t1->isa_long(), "Type must be a long");
1860       int lshift = t2->is_int()->get_con() & 63;
1861       return new RotateRightNode(in(1), phase->intcon(64 - (lshift & 63)), TypeLong::LONG);
1862     }
1863   }
1864   return nullptr;
1865 }
1866 
1867 Node* RotateRightNode::Identity(PhaseGVN* phase) {
1868   const Type* t1 = phase->type(in(1));
1869   if (t1 == Type::TOP) {
1870     return this;
1871   }
1872   int count = 0;
1873   assert(t1->isa_int() || t1->isa_long(), "Unexpected type");
1874   int mask = (t1->isa_int() ? BitsPerJavaInteger : BitsPerJavaLong) - 1;
1875   if (const_shift_count(phase, this, &count) && (count & mask) == 0) {
1876     // Rotate by a multiple of 32/64 does nothing
1877     return in(1);
1878   }
1879   return this;
1880 }
1881 
1882 const Type* RotateRightNode::Value(PhaseGVN* phase) const {
1883   const Type* t1 = phase->type(in(1));
1884   const Type* t2 = phase->type(in(2));
1885   // Either input is TOP ==> the result is TOP
1886   if (t1 == Type::TOP || t2 == Type::TOP) {
1887     return Type::TOP;
1888   }
1889 
1890   if (t1->isa_int()) {
1891     const TypeInt* r1 = t1->is_int();
1892     const TypeInt* r2 = t2->is_int();
1893 
1894     // Left input is ZERO ==> the result is ZERO.
1895     if (r1 == TypeInt::ZERO) {
1896       return TypeInt::ZERO;
1897     }
1898     // Rotate by zero does nothing
1899     if (r2 == TypeInt::ZERO) {
1900       return r1;
1901     }
1902     if (r1->is_con() && r2->is_con()) {
1903       juint r1_con = (juint)r1->get_con();
1904       juint shift = (juint)(r2->get_con()) & (juint)(BitsPerJavaInteger - 1); // semantics of Java shifts
1905       return TypeInt::make((r1_con >> shift) | (r1_con << (32 - shift)));
1906     }
1907     return TypeInt::INT;
1908   } else {
1909     assert(t1->isa_long(), "Type must be a long");
1910     const TypeLong* r1 = t1->is_long();
1911     const TypeInt*  r2 = t2->is_int();
1912     // Left input is ZERO ==> the result is ZERO.
1913     if (r1 == TypeLong::ZERO) {
1914       return TypeLong::ZERO;
1915     }
1916     // Rotate by zero does nothing
1917     if (r2 == TypeInt::ZERO) {
1918       return r1;
1919     }
1920     if (r1->is_con() && r2->is_con()) {
1921       julong r1_con = (julong)r1->get_con();
1922       julong shift = (julong)(r2->get_con()) & (julong)(BitsPerJavaLong - 1); // semantics of Java shifts
1923       return TypeLong::make((r1_con >> shift) | (r1_con << (64 - shift)));
1924     }
1925     return TypeLong::LONG;
1926   }
1927 }
1928 
1929 // Given an expression (AndX shift mask) or (AndX mask shift),
1930 // determine if the AndX must always produce zero, because the
1931 // the shift (x<<N) is bitwise disjoint from the mask #M.
1932 // The X in AndX must be I or L, depending on bt.
1933 // Specifically, the following cases fold to zero,
1934 // when the shift value N is large enough to zero out
1935 // all the set positions of the and-mask M.
1936 //   (AndI (LShiftI _ #N) #M) => #0
1937 //   (AndL (LShiftL _ #N) #M) => #0
1938 //   (AndL (ConvI2L (LShiftI _ #N)) #M) => #0
1939 // The M and N values must satisfy ((-1 << N) & M) == 0.
1940 // Because the optimization might work for a non-constant
1941 // mask M, we check the AndX for both operand orders.
1942 bool MulNode::AndIL_shift_and_mask_is_always_zero(PhaseGVN* phase, Node* shift, Node* mask, BasicType bt, bool check_reverse) {
1943   if (mask == nullptr || shift == nullptr) {
1944     return false;
1945   }
1946   const TypeInteger* mask_t = phase->type(mask)->isa_integer(bt);
1947   if (mask_t == nullptr || phase->type(shift)->isa_integer(bt) == nullptr) {
1948     return false;
1949   }
1950   shift = shift->uncast();
1951   if (shift == nullptr) {
1952     return false;
1953   }
1954   if (phase->type(shift)->isa_integer(bt) == nullptr) {
1955     return false;
1956   }
1957   BasicType shift_bt = bt;
1958   if (bt == T_LONG && shift->Opcode() == Op_ConvI2L) {
1959     bt = T_INT;
1960     Node* val = shift->in(1);
1961     if (val == nullptr) {
1962       return false;
1963     }
1964     val = val->uncast();
1965     if (val == nullptr) {
1966       return false;
1967     }
1968     if (val->Opcode() == Op_LShiftI) {
1969       shift_bt = T_INT;
1970       shift = val;
1971       if (phase->type(shift)->isa_integer(bt) == nullptr) {
1972         return false;
1973       }
1974     }
1975   }
1976   if (shift->Opcode() != Op_LShift(shift_bt)) {
1977     if (check_reverse &&
1978         (mask->Opcode() == Op_LShift(bt) ||
1979          (bt == T_LONG && mask->Opcode() == Op_ConvI2L))) {
1980       // try it the other way around
1981       return AndIL_shift_and_mask_is_always_zero(phase, mask, shift, bt, false);
1982     }
1983     return false;
1984   }
1985   Node* shift2 = shift->in(2);
1986   if (shift2 == nullptr) {
1987     return false;
1988   }
1989   const Type* shift2_t = phase->type(shift2);
1990   if (!shift2_t->isa_int() || !shift2_t->is_int()->is_con()) {
1991     return false;
1992   }
1993 
1994   jint shift_con = shift2_t->is_int()->get_con() & ((shift_bt == T_INT ? BitsPerJavaInteger : BitsPerJavaLong) - 1);
1995   if ((((jlong)1) << shift_con) > mask_t->hi_as_long() && mask_t->lo_as_long() >= 0) {
1996     return true;
1997   }
1998 
1999   return false;
2000 }
2001 
2002 // Given an expression (AndX (AddX v1 (LShiftX v2 #N)) #M)
2003 // determine if the AndX must always produce (AndX v1 #M),
2004 // because the shift (v2<<N) is bitwise disjoint from the mask #M.
2005 // The X in AndX will be I or L, depending on bt.
2006 // Specifically, the following cases fold,
2007 // when the shift value N is large enough to zero out
2008 // all the set positions of the and-mask M.
2009 //   (AndI (AddI v1 (LShiftI _ #N)) #M) => (AndI v1 #M)
2010 //   (AndL (AddI v1 (LShiftL _ #N)) #M) => (AndL v1 #M)
2011 //   (AndL (AddL v1 (ConvI2L (LShiftI _ #N))) #M) => (AndL v1 #M)
2012 // The M and N values must satisfy ((-1 << N) & M) == 0.
2013 // Because the optimization might work for a non-constant
2014 // mask M, and because the AddX operands can come in either
2015 // order, we check for every operand order.
2016 Node* MulNode::AndIL_add_shift_and_mask(PhaseGVN* phase, BasicType bt) {
2017   Node* add = in(1);
2018   Node* mask = in(2);
2019   if (add == nullptr || mask == nullptr) {
2020     return nullptr;
2021   }
2022   int addidx = 0;
2023   if (add->Opcode() == Op_Add(bt)) {
2024     addidx = 1;
2025   } else if (mask->Opcode() == Op_Add(bt)) {
2026     mask = add;
2027     addidx = 2;
2028     add = in(addidx);
2029   }
2030   if (addidx > 0) {
2031     Node* add1 = add->in(1);
2032     Node* add2 = add->in(2);
2033     if (add1 != nullptr && add2 != nullptr) {
2034       if (AndIL_shift_and_mask_is_always_zero(phase, add1, mask, bt, false)) {
2035         set_req_X(addidx, add2, phase);
2036         return this;
2037       } else if (AndIL_shift_and_mask_is_always_zero(phase, add2, mask, bt, false)) {
2038         set_req_X(addidx, add1, phase);
2039         return this;
2040       }
2041     }
2042   }
2043   return nullptr;
2044 }