1 /* 2 * Copyright (c) 1998, 2024, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/assembler.inline.hpp" 27 #include "asm/macroAssembler.inline.hpp" 28 #include "code/compiledIC.hpp" 29 #include "code/debugInfo.hpp" 30 #include "code/debugInfoRec.hpp" 31 #include "compiler/compileBroker.hpp" 32 #include "compiler/compilerDirectives.hpp" 33 #include "compiler/disassembler.hpp" 34 #include "compiler/oopMap.hpp" 35 #include "gc/shared/barrierSet.hpp" 36 #include "gc/shared/c2/barrierSetC2.hpp" 37 #include "memory/allocation.inline.hpp" 38 #include "memory/allocation.hpp" 39 #include "opto/ad.hpp" 40 #include "opto/block.hpp" 41 #include "opto/c2compiler.hpp" 42 #include "opto/c2_MacroAssembler.hpp" 43 #include "opto/callnode.hpp" 44 #include "opto/cfgnode.hpp" 45 #include "opto/locknode.hpp" 46 #include "opto/machnode.hpp" 47 #include "opto/node.hpp" 48 #include "opto/optoreg.hpp" 49 #include "opto/output.hpp" 50 #include "opto/regalloc.hpp" 51 #include "opto/runtime.hpp" 52 #include "opto/subnode.hpp" 53 #include "opto/type.hpp" 54 #include "runtime/handles.inline.hpp" 55 #include "runtime/sharedRuntime.hpp" 56 #include "utilities/macros.hpp" 57 #include "utilities/powerOfTwo.hpp" 58 #include "utilities/xmlstream.hpp" 59 60 #ifndef PRODUCT 61 #define DEBUG_ARG(x) , x 62 #else 63 #define DEBUG_ARG(x) 64 #endif 65 66 //------------------------------Scheduling---------------------------------- 67 // This class contains all the information necessary to implement instruction 68 // scheduling and bundling. 69 class Scheduling { 70 71 private: 72 // Arena to use 73 Arena *_arena; 74 75 // Control-Flow Graph info 76 PhaseCFG *_cfg; 77 78 // Register Allocation info 79 PhaseRegAlloc *_regalloc; 80 81 // Number of nodes in the method 82 uint _node_bundling_limit; 83 84 // List of scheduled nodes. Generated in reverse order 85 Node_List _scheduled; 86 87 // List of nodes currently available for choosing for scheduling 88 Node_List _available; 89 90 // For each instruction beginning a bundle, the number of following 91 // nodes to be bundled with it. 92 Bundle *_node_bundling_base; 93 94 // Mapping from register to Node 95 Node_List _reg_node; 96 97 // Free list for pinch nodes. 98 Node_List _pinch_free_list; 99 100 // Number of uses of this node within the containing basic block. 101 short *_uses; 102 103 // Schedulable portion of current block. Skips Region/Phi/CreateEx up 104 // front, branch+proj at end. Also skips Catch/CProj (same as 105 // branch-at-end), plus just-prior exception-throwing call. 106 uint _bb_start, _bb_end; 107 108 // Latency from the end of the basic block as scheduled 109 unsigned short *_current_latency; 110 111 // Remember the next node 112 Node *_next_node; 113 114 // Use this for an unconditional branch delay slot 115 Node *_unconditional_delay_slot; 116 117 // Pointer to a Nop 118 MachNopNode *_nop; 119 120 // Length of the current bundle, in instructions 121 uint _bundle_instr_count; 122 123 // Current Cycle number, for computing latencies and bundling 124 uint _bundle_cycle_number; 125 126 // Bundle information 127 Pipeline_Use_Element _bundle_use_elements[resource_count]; 128 Pipeline_Use _bundle_use; 129 130 // Dump the available list 131 void dump_available() const; 132 133 public: 134 Scheduling(Arena *arena, Compile &compile); 135 136 // Destructor 137 NOT_PRODUCT( ~Scheduling(); ) 138 139 // Step ahead "i" cycles 140 void step(uint i); 141 142 // Step ahead 1 cycle, and clear the bundle state (for example, 143 // at a branch target) 144 void step_and_clear(); 145 146 Bundle* node_bundling(const Node *n) { 147 assert(valid_bundle_info(n), "oob"); 148 return (&_node_bundling_base[n->_idx]); 149 } 150 151 bool valid_bundle_info(const Node *n) const { 152 return (_node_bundling_limit > n->_idx); 153 } 154 155 bool starts_bundle(const Node *n) const { 156 return (_node_bundling_limit > n->_idx && _node_bundling_base[n->_idx].starts_bundle()); 157 } 158 159 // Do the scheduling 160 void DoScheduling(); 161 162 // Compute the register antidependencies within a basic block 163 void ComputeRegisterAntidependencies(Block *bb); 164 void verify_do_def( Node *n, OptoReg::Name def, const char *msg ); 165 void verify_good_schedule( Block *b, const char *msg ); 166 void anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ); 167 void anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ); 168 169 // Add a node to the current bundle 170 void AddNodeToBundle(Node *n, const Block *bb); 171 172 // Return an integer less than, equal to, or greater than zero 173 // if the stack offset of the first argument is respectively 174 // less than, equal to, or greater than the second. 175 int compare_two_spill_nodes(Node* first, Node* second); 176 177 // Add a node to the list of available nodes 178 void AddNodeToAvailableList(Node *n); 179 180 // Compute the local use count for the nodes in a block, and compute 181 // the list of instructions with no uses in the block as available 182 void ComputeUseCount(const Block *bb); 183 184 // Choose an instruction from the available list to add to the bundle 185 Node * ChooseNodeToBundle(); 186 187 // See if this Node fits into the currently accumulating bundle 188 bool NodeFitsInBundle(Node *n); 189 190 // Decrement the use count for a node 191 void DecrementUseCounts(Node *n, const Block *bb); 192 193 // Garbage collect pinch nodes for reuse by other blocks. 194 void garbage_collect_pinch_nodes(); 195 // Clean up a pinch node for reuse (helper for above). 196 void cleanup_pinch( Node *pinch ); 197 198 // Information for statistics gathering 199 #ifndef PRODUCT 200 private: 201 // Gather information on size of nops relative to total 202 uint _branches, _unconditional_delays; 203 204 static uint _total_nop_size, _total_method_size; 205 static uint _total_branches, _total_unconditional_delays; 206 static uint _total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1]; 207 208 public: 209 static void print_statistics(); 210 211 static void increment_instructions_per_bundle(uint i) { 212 _total_instructions_per_bundle[i]++; 213 } 214 215 static void increment_nop_size(uint s) { 216 _total_nop_size += s; 217 } 218 219 static void increment_method_size(uint s) { 220 _total_method_size += s; 221 } 222 #endif 223 224 }; 225 226 PhaseOutput::PhaseOutput() 227 : Phase(Phase::Output), 228 _code_buffer("Compile::Fill_buffer"), 229 _first_block_size(0), 230 _handler_table(), 231 _inc_table(), 232 _stub_list(), 233 _oop_map_set(nullptr), 234 _scratch_buffer_blob(nullptr), 235 _scratch_locs_memory(nullptr), 236 _scratch_const_size(-1), 237 _in_scratch_emit_size(false), 238 _frame_slots(0), 239 _code_offsets(), 240 _node_bundling_limit(0), 241 _node_bundling_base(nullptr), 242 _orig_pc_slot(0), 243 _orig_pc_slot_offset_in_bytes(0), 244 _buf_sizes(), 245 _block(nullptr), 246 _index(0) { 247 C->set_output(this); 248 if (C->stub_name() == nullptr) { 249 _orig_pc_slot = C->fixed_slots() - (sizeof(address) / VMRegImpl::stack_slot_size); 250 } 251 } 252 253 PhaseOutput::~PhaseOutput() { 254 C->set_output(nullptr); 255 if (_scratch_buffer_blob != nullptr) { 256 BufferBlob::free(_scratch_buffer_blob); 257 } 258 } 259 260 void PhaseOutput::perform_mach_node_analysis() { 261 // Late barrier analysis must be done after schedule and bundle 262 // Otherwise liveness based spilling will fail 263 BarrierSetC2* bs = BarrierSet::barrier_set()->barrier_set_c2(); 264 bs->late_barrier_analysis(); 265 266 pd_perform_mach_node_analysis(); 267 268 C->print_method(CompilerPhaseType::PHASE_MACH_ANALYSIS, 3); 269 } 270 271 // Convert Nodes to instruction bits and pass off to the VM 272 void PhaseOutput::Output() { 273 // RootNode goes 274 assert( C->cfg()->get_root_block()->number_of_nodes() == 0, "" ); 275 276 // The number of new nodes (mostly MachNop) is proportional to 277 // the number of java calls and inner loops which are aligned. 278 if ( C->check_node_count((NodeLimitFudgeFactor + C->java_calls()*3 + 279 C->inner_loops()*(OptoLoopAlignment-1)), 280 "out of nodes before code generation" ) ) { 281 return; 282 } 283 // Make sure I can find the Start Node 284 Block *entry = C->cfg()->get_block(1); 285 Block *broot = C->cfg()->get_root_block(); 286 287 const StartNode *start = entry->head()->as_Start(); 288 289 // Replace StartNode with prolog 290 MachPrologNode *prolog = new MachPrologNode(); 291 entry->map_node(prolog, 0); 292 C->cfg()->map_node_to_block(prolog, entry); 293 C->cfg()->unmap_node_from_block(start); // start is no longer in any block 294 295 // Virtual methods need an unverified entry point 296 297 if( C->is_osr_compilation() ) { 298 if( PoisonOSREntry ) { 299 // TODO: Should use a ShouldNotReachHereNode... 300 C->cfg()->insert( broot, 0, new MachBreakpointNode() ); 301 } 302 } else { 303 if( C->method() && !C->method()->flags().is_static() ) { 304 // Insert unvalidated entry point 305 C->cfg()->insert( broot, 0, new MachUEPNode() ); 306 } 307 308 } 309 310 // Break before main entry point 311 if ((C->method() && C->directive()->BreakAtExecuteOption) || 312 (OptoBreakpoint && C->is_method_compilation()) || 313 (OptoBreakpointOSR && C->is_osr_compilation()) || 314 (OptoBreakpointC2R && !C->method()) ) { 315 // checking for C->method() means that OptoBreakpoint does not apply to 316 // runtime stubs or frame converters 317 C->cfg()->insert( entry, 1, new MachBreakpointNode() ); 318 } 319 320 // Insert epilogs before every return 321 for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) { 322 Block* block = C->cfg()->get_block(i); 323 if (!block->is_connector() && block->non_connector_successor(0) == C->cfg()->get_root_block()) { // Found a program exit point? 324 Node* m = block->end(); 325 if (m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt) { 326 MachEpilogNode* epilog = new MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return); 327 block->add_inst(epilog); 328 C->cfg()->map_node_to_block(epilog, block); 329 } 330 } 331 } 332 333 // Keeper of sizing aspects 334 _buf_sizes = BufferSizingData(); 335 336 // Initialize code buffer 337 estimate_buffer_size(_buf_sizes._const); 338 if (C->failing()) return; 339 340 // Pre-compute the length of blocks and replace 341 // long branches with short if machine supports it. 342 // Must be done before ScheduleAndBundle due to SPARC delay slots 343 uint* blk_starts = NEW_RESOURCE_ARRAY(uint, C->cfg()->number_of_blocks() + 1); 344 blk_starts[0] = 0; 345 shorten_branches(blk_starts); 346 347 ScheduleAndBundle(); 348 if (C->failing()) { 349 return; 350 } 351 352 perform_mach_node_analysis(); 353 354 // Complete sizing of codebuffer 355 CodeBuffer* cb = init_buffer(); 356 if (cb == nullptr || C->failing()) { 357 return; 358 } 359 360 BuildOopMaps(); 361 362 if (C->failing()) { 363 return; 364 } 365 366 C2_MacroAssembler masm(cb); 367 fill_buffer(&masm, blk_starts); 368 } 369 370 bool PhaseOutput::need_stack_bang(int frame_size_in_bytes) const { 371 // Determine if we need to generate a stack overflow check. 372 // Do it if the method is not a stub function and 373 // has java calls or has frame size > vm_page_size/8. 374 // The debug VM checks that deoptimization doesn't trigger an 375 // unexpected stack overflow (compiled method stack banging should 376 // guarantee it doesn't happen) so we always need the stack bang in 377 // a debug VM. 378 return (C->stub_function() == nullptr && 379 (C->has_java_calls() || frame_size_in_bytes > (int)(os::vm_page_size())>>3 380 DEBUG_ONLY(|| true))); 381 } 382 383 bool PhaseOutput::need_register_stack_bang() const { 384 // Determine if we need to generate a register stack overflow check. 385 // This is only used on architectures which have split register 386 // and memory stacks (ie. IA64). 387 // Bang if the method is not a stub function and has java calls 388 return (C->stub_function() == nullptr && C->has_java_calls()); 389 } 390 391 392 // Compute the size of first NumberOfLoopInstrToAlign instructions at the top 393 // of a loop. When aligning a loop we need to provide enough instructions 394 // in cpu's fetch buffer to feed decoders. The loop alignment could be 395 // avoided if we have enough instructions in fetch buffer at the head of a loop. 396 // By default, the size is set to 999999 by Block's constructor so that 397 // a loop will be aligned if the size is not reset here. 398 // 399 // Note: Mach instructions could contain several HW instructions 400 // so the size is estimated only. 401 // 402 void PhaseOutput::compute_loop_first_inst_sizes() { 403 // The next condition is used to gate the loop alignment optimization. 404 // Don't aligned a loop if there are enough instructions at the head of a loop 405 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad 406 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is 407 // equal to 11 bytes which is the largest address NOP instruction. 408 if (MaxLoopPad < OptoLoopAlignment - 1) { 409 uint last_block = C->cfg()->number_of_blocks() - 1; 410 for (uint i = 1; i <= last_block; i++) { 411 Block* block = C->cfg()->get_block(i); 412 // Check the first loop's block which requires an alignment. 413 if (block->loop_alignment() > (uint)relocInfo::addr_unit()) { 414 uint sum_size = 0; 415 uint inst_cnt = NumberOfLoopInstrToAlign; 416 inst_cnt = block->compute_first_inst_size(sum_size, inst_cnt, C->regalloc()); 417 418 // Check subsequent fallthrough blocks if the loop's first 419 // block(s) does not have enough instructions. 420 Block *nb = block; 421 while(inst_cnt > 0 && 422 i < last_block && 423 !C->cfg()->get_block(i + 1)->has_loop_alignment() && 424 !nb->has_successor(block)) { 425 i++; 426 nb = C->cfg()->get_block(i); 427 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt, C->regalloc()); 428 } // while( inst_cnt > 0 && i < last_block ) 429 430 block->set_first_inst_size(sum_size); 431 } // f( b->head()->is_Loop() ) 432 } // for( i <= last_block ) 433 } // if( MaxLoopPad < OptoLoopAlignment-1 ) 434 } 435 436 // The architecture description provides short branch variants for some long 437 // branch instructions. Replace eligible long branches with short branches. 438 void PhaseOutput::shorten_branches(uint* blk_starts) { 439 440 Compile::TracePhase tp("shorten branches", &timers[_t_shortenBranches]); 441 442 // Compute size of each block, method size, and relocation information size 443 uint nblocks = C->cfg()->number_of_blocks(); 444 445 uint* jmp_offset = NEW_RESOURCE_ARRAY(uint,nblocks); 446 uint* jmp_size = NEW_RESOURCE_ARRAY(uint,nblocks); 447 int* jmp_nidx = NEW_RESOURCE_ARRAY(int ,nblocks); 448 449 // Collect worst case block paddings 450 int* block_worst_case_pad = NEW_RESOURCE_ARRAY(int, nblocks); 451 memset(block_worst_case_pad, 0, nblocks * sizeof(int)); 452 453 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,nblocks); ) 454 DEBUG_ONLY( uint *jmp_rule = NEW_RESOURCE_ARRAY(uint,nblocks); ) 455 456 bool has_short_branch_candidate = false; 457 458 // Initialize the sizes to 0 459 int code_size = 0; // Size in bytes of generated code 460 int stub_size = 0; // Size in bytes of all stub entries 461 // Size in bytes of all relocation entries, including those in local stubs. 462 // Start with 2-bytes of reloc info for the unvalidated entry point 463 int reloc_size = 1; // Number of relocation entries 464 465 // Make three passes. The first computes pessimistic blk_starts, 466 // relative jmp_offset and reloc_size information. The second performs 467 // short branch substitution using the pessimistic sizing. The 468 // third inserts nops where needed. 469 470 // Step one, perform a pessimistic sizing pass. 471 uint last_call_adr = max_juint; 472 uint last_avoid_back_to_back_adr = max_juint; 473 uint nop_size = (new MachNopNode())->size(C->regalloc()); 474 for (uint i = 0; i < nblocks; i++) { // For all blocks 475 Block* block = C->cfg()->get_block(i); 476 _block = block; 477 478 // During short branch replacement, we store the relative (to blk_starts) 479 // offset of jump in jmp_offset, rather than the absolute offset of jump. 480 // This is so that we do not need to recompute sizes of all nodes when 481 // we compute correct blk_starts in our next sizing pass. 482 jmp_offset[i] = 0; 483 jmp_size[i] = 0; 484 jmp_nidx[i] = -1; 485 DEBUG_ONLY( jmp_target[i] = 0; ) 486 DEBUG_ONLY( jmp_rule[i] = 0; ) 487 488 // Sum all instruction sizes to compute block size 489 uint last_inst = block->number_of_nodes(); 490 uint blk_size = 0; 491 for (uint j = 0; j < last_inst; j++) { 492 _index = j; 493 Node* nj = block->get_node(_index); 494 // Handle machine instruction nodes 495 if (nj->is_Mach()) { 496 MachNode* mach = nj->as_Mach(); 497 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding 498 reloc_size += mach->reloc(); 499 if (mach->is_MachCall()) { 500 // add size information for trampoline stub 501 // class CallStubImpl is platform-specific and defined in the *.ad files. 502 stub_size += CallStubImpl::size_call_trampoline(); 503 reloc_size += CallStubImpl::reloc_call_trampoline(); 504 505 MachCallNode *mcall = mach->as_MachCall(); 506 // This destination address is NOT PC-relative 507 508 mcall->method_set((intptr_t)mcall->entry_point()); 509 510 if (mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method) { 511 stub_size += CompiledDirectCall::to_interp_stub_size(); 512 reloc_size += CompiledDirectCall::reloc_to_interp_stub(); 513 } 514 } else if (mach->is_MachSafePoint()) { 515 // If call/safepoint are adjacent, account for possible 516 // nop to disambiguate the two safepoints. 517 // ScheduleAndBundle() can rearrange nodes in a block, 518 // check for all offsets inside this block. 519 if (last_call_adr >= blk_starts[i]) { 520 blk_size += nop_size; 521 } 522 } 523 if (mach->avoid_back_to_back(MachNode::AVOID_BEFORE)) { 524 // Nop is inserted between "avoid back to back" instructions. 525 // ScheduleAndBundle() can rearrange nodes in a block, 526 // check for all offsets inside this block. 527 if (last_avoid_back_to_back_adr >= blk_starts[i]) { 528 blk_size += nop_size; 529 } 530 } 531 if (mach->may_be_short_branch()) { 532 if (!nj->is_MachBranch()) { 533 #ifndef PRODUCT 534 nj->dump(3); 535 #endif 536 Unimplemented(); 537 } 538 assert(jmp_nidx[i] == -1, "block should have only one branch"); 539 jmp_offset[i] = blk_size; 540 jmp_size[i] = nj->size(C->regalloc()); 541 jmp_nidx[i] = j; 542 has_short_branch_candidate = true; 543 } 544 } 545 blk_size += nj->size(C->regalloc()); 546 // Remember end of call offset 547 if (nj->is_MachCall() && !nj->is_MachCallLeaf()) { 548 last_call_adr = blk_starts[i]+blk_size; 549 } 550 // Remember end of avoid_back_to_back offset 551 if (nj->is_Mach() && nj->as_Mach()->avoid_back_to_back(MachNode::AVOID_AFTER)) { 552 last_avoid_back_to_back_adr = blk_starts[i]+blk_size; 553 } 554 } 555 556 // When the next block starts a loop, we may insert pad NOP 557 // instructions. Since we cannot know our future alignment, 558 // assume the worst. 559 if (i < nblocks - 1) { 560 Block* nb = C->cfg()->get_block(i + 1); 561 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit(); 562 if (max_loop_pad > 0) { 563 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), ""); 564 // Adjust last_call_adr and/or last_avoid_back_to_back_adr. 565 // If either is the last instruction in this block, bump by 566 // max_loop_pad in lock-step with blk_size, so sizing 567 // calculations in subsequent blocks still can conservatively 568 // detect that it may the last instruction in this block. 569 if (last_call_adr == blk_starts[i]+blk_size) { 570 last_call_adr += max_loop_pad; 571 } 572 if (last_avoid_back_to_back_adr == blk_starts[i]+blk_size) { 573 last_avoid_back_to_back_adr += max_loop_pad; 574 } 575 blk_size += max_loop_pad; 576 block_worst_case_pad[i + 1] = max_loop_pad; 577 } 578 } 579 580 // Save block size; update total method size 581 blk_starts[i+1] = blk_starts[i]+blk_size; 582 } 583 584 // Step two, replace eligible long jumps. 585 bool progress = true; 586 uint last_may_be_short_branch_adr = max_juint; 587 while (has_short_branch_candidate && progress) { 588 progress = false; 589 has_short_branch_candidate = false; 590 int adjust_block_start = 0; 591 for (uint i = 0; i < nblocks; i++) { 592 Block* block = C->cfg()->get_block(i); 593 int idx = jmp_nidx[i]; 594 MachNode* mach = (idx == -1) ? nullptr: block->get_node(idx)->as_Mach(); 595 if (mach != nullptr && mach->may_be_short_branch()) { 596 #ifdef ASSERT 597 assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity"); 598 int j; 599 // Find the branch; ignore trailing NOPs. 600 for (j = block->number_of_nodes()-1; j>=0; j--) { 601 Node* n = block->get_node(j); 602 if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) 603 break; 604 } 605 assert(j >= 0 && j == idx && block->get_node(j) == (Node*)mach, "sanity"); 606 #endif 607 int br_size = jmp_size[i]; 608 int br_offs = blk_starts[i] + jmp_offset[i]; 609 610 // This requires the TRUE branch target be in succs[0] 611 uint bnum = block->non_connector_successor(0)->_pre_order; 612 int offset = blk_starts[bnum] - br_offs; 613 if (bnum > i) { // adjust following block's offset 614 offset -= adjust_block_start; 615 } 616 617 // This block can be a loop header, account for the padding 618 // in the previous block. 619 int block_padding = block_worst_case_pad[i]; 620 assert(i == 0 || block_padding == 0 || br_offs >= block_padding, "Should have at least a padding on top"); 621 // In the following code a nop could be inserted before 622 // the branch which will increase the backward distance. 623 bool needs_padding = ((uint)(br_offs - block_padding) == last_may_be_short_branch_adr); 624 assert(!needs_padding || jmp_offset[i] == 0, "padding only branches at the beginning of block"); 625 626 if (needs_padding && offset <= 0) 627 offset -= nop_size; 628 629 if (C->matcher()->is_short_branch_offset(mach->rule(), br_size, offset)) { 630 // We've got a winner. Replace this branch. 631 MachNode* replacement = mach->as_MachBranch()->short_branch_version(); 632 633 // Update the jmp_size. 634 int new_size = replacement->size(C->regalloc()); 635 int diff = br_size - new_size; 636 assert(diff >= (int)nop_size, "short_branch size should be smaller"); 637 // Conservatively take into account padding between 638 // avoid_back_to_back branches. Previous branch could be 639 // converted into avoid_back_to_back branch during next 640 // rounds. 641 if (needs_padding && replacement->avoid_back_to_back(MachNode::AVOID_BEFORE)) { 642 jmp_offset[i] += nop_size; 643 diff -= nop_size; 644 } 645 adjust_block_start += diff; 646 block->map_node(replacement, idx); 647 mach->subsume_by(replacement, C); 648 mach = replacement; 649 progress = true; 650 651 jmp_size[i] = new_size; 652 DEBUG_ONLY( jmp_target[i] = bnum; ); 653 DEBUG_ONLY( jmp_rule[i] = mach->rule(); ); 654 } else { 655 // The jump distance is not short, try again during next iteration. 656 has_short_branch_candidate = true; 657 } 658 } // (mach->may_be_short_branch()) 659 if (mach != nullptr && (mach->may_be_short_branch() || 660 mach->avoid_back_to_back(MachNode::AVOID_AFTER))) { 661 last_may_be_short_branch_adr = blk_starts[i] + jmp_offset[i] + jmp_size[i]; 662 } 663 blk_starts[i+1] -= adjust_block_start; 664 } 665 } 666 667 #ifdef ASSERT 668 for (uint i = 0; i < nblocks; i++) { // For all blocks 669 if (jmp_target[i] != 0) { 670 int br_size = jmp_size[i]; 671 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_offset[i]); 672 if (!C->matcher()->is_short_branch_offset(jmp_rule[i], br_size, offset)) { 673 tty->print_cr("target (%d) - jmp_offset(%d) = offset (%d), jump_size(%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_offset[i], offset, br_size, i, jmp_target[i]); 674 } 675 assert(C->matcher()->is_short_branch_offset(jmp_rule[i], br_size, offset), "Displacement too large for short jmp"); 676 } 677 } 678 #endif 679 680 // Step 3, compute the offsets of all blocks, will be done in fill_buffer() 681 // after ScheduleAndBundle(). 682 683 // ------------------ 684 // Compute size for code buffer 685 code_size = blk_starts[nblocks]; 686 687 // Relocation records 688 reloc_size += 1; // Relo entry for exception handler 689 690 // Adjust reloc_size to number of record of relocation info 691 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for 692 // a relocation index. 693 // The CodeBuffer will expand the locs array if this estimate is too low. 694 reloc_size *= 10 / sizeof(relocInfo); 695 696 _buf_sizes._reloc = reloc_size; 697 _buf_sizes._code = code_size; 698 _buf_sizes._stub = stub_size; 699 } 700 701 //------------------------------FillLocArray----------------------------------- 702 // Create a bit of debug info and append it to the array. The mapping is from 703 // Java local or expression stack to constant, register or stack-slot. For 704 // doubles, insert 2 mappings and return 1 (to tell the caller that the next 705 // entry has been taken care of and caller should skip it). 706 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) { 707 // This should never have accepted Bad before 708 assert(OptoReg::is_valid(regnum), "location must be valid"); 709 return (OptoReg::is_reg(regnum)) 710 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) ) 711 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum))); 712 } 713 714 715 ObjectValue* 716 PhaseOutput::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) { 717 for (int i = 0; i < objs->length(); i++) { 718 assert(objs->at(i)->is_object(), "corrupt object cache"); 719 ObjectValue* sv = (ObjectValue*) objs->at(i); 720 if (sv->id() == id) { 721 return sv; 722 } 723 } 724 // Otherwise.. 725 return nullptr; 726 } 727 728 void PhaseOutput::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs, 729 ObjectValue* sv ) { 730 assert(sv_for_node_id(objs, sv->id()) == nullptr, "Precondition"); 731 objs->append(sv); 732 } 733 734 735 void PhaseOutput::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local, 736 GrowableArray<ScopeValue*> *array, 737 GrowableArray<ScopeValue*> *objs ) { 738 assert( local, "use _top instead of null" ); 739 if (array->length() != idx) { 740 assert(array->length() == idx + 1, "Unexpected array count"); 741 // Old functionality: 742 // return 743 // New functionality: 744 // Assert if the local is not top. In product mode let the new node 745 // override the old entry. 746 assert(local == C->top(), "LocArray collision"); 747 if (local == C->top()) { 748 return; 749 } 750 array->pop(); 751 } 752 const Type *t = local->bottom_type(); 753 754 // Is it a safepoint scalar object node? 755 if (local->is_SafePointScalarObject()) { 756 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject(); 757 758 ObjectValue* sv = (ObjectValue*) sv_for_node_id(objs, spobj->_idx); 759 if (sv == nullptr) { 760 ciKlass* cik = t->is_oopptr()->exact_klass(); 761 assert(cik->is_instance_klass() || 762 cik->is_array_klass(), "Not supported allocation."); 763 sv = new ObjectValue(spobj->_idx, 764 new ConstantOopWriteValue(cik->java_mirror()->constant_encoding())); 765 set_sv_for_object_node(objs, sv); 766 767 uint first_ind = spobj->first_index(sfpt->jvms()); 768 for (uint i = 0; i < spobj->n_fields(); i++) { 769 Node* fld_node = sfpt->in(first_ind+i); 770 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs); 771 } 772 } 773 array->append(sv); 774 return; 775 } else if (local->is_SafePointScalarMerge()) { 776 SafePointScalarMergeNode* smerge = local->as_SafePointScalarMerge(); 777 ObjectMergeValue* mv = (ObjectMergeValue*) sv_for_node_id(objs, smerge->_idx); 778 779 if (mv == nullptr) { 780 GrowableArray<ScopeValue*> deps; 781 782 int merge_pointer_idx = smerge->merge_pointer_idx(sfpt->jvms()); 783 (void)FillLocArray(0, sfpt, sfpt->in(merge_pointer_idx), &deps, objs); 784 assert(deps.length() == 1, "missing value"); 785 786 int selector_idx = smerge->selector_idx(sfpt->jvms()); 787 (void)FillLocArray(1, nullptr, sfpt->in(selector_idx), &deps, nullptr); 788 assert(deps.length() == 2, "missing value"); 789 790 mv = new ObjectMergeValue(smerge->_idx, deps.at(0), deps.at(1)); 791 set_sv_for_object_node(objs, mv); 792 793 for (uint i = 1; i < smerge->req(); i++) { 794 Node* obj_node = smerge->in(i); 795 (void)FillLocArray(mv->possible_objects()->length(), sfpt, obj_node, mv->possible_objects(), objs); 796 } 797 } 798 array->append(mv); 799 return; 800 } 801 802 // Grab the register number for the local 803 OptoReg::Name regnum = C->regalloc()->get_reg_first(local); 804 if( OptoReg::is_valid(regnum) ) {// Got a register/stack? 805 // Record the double as two float registers. 806 // The register mask for such a value always specifies two adjacent 807 // float registers, with the lower register number even. 808 // Normally, the allocation of high and low words to these registers 809 // is irrelevant, because nearly all operations on register pairs 810 // (e.g., StoreD) treat them as a single unit. 811 // Here, we assume in addition that the words in these two registers 812 // stored "naturally" (by operations like StoreD and double stores 813 // within the interpreter) such that the lower-numbered register 814 // is written to the lower memory address. This may seem like 815 // a machine dependency, but it is not--it is a requirement on 816 // the author of the <arch>.ad file to ensure that, for every 817 // even/odd double-register pair to which a double may be allocated, 818 // the word in the even single-register is stored to the first 819 // memory word. (Note that register numbers are completely 820 // arbitrary, and are not tied to any machine-level encodings.) 821 #ifdef _LP64 822 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) { 823 array->append(new ConstantIntValue((jint)0)); 824 array->append(new_loc_value( C->regalloc(), regnum, Location::dbl )); 825 } else if ( t->base() == Type::Long ) { 826 array->append(new ConstantIntValue((jint)0)); 827 array->append(new_loc_value( C->regalloc(), regnum, Location::lng )); 828 } else if ( t->base() == Type::RawPtr ) { 829 // jsr/ret return address which must be restored into the full 830 // width 64-bit stack slot. 831 array->append(new_loc_value( C->regalloc(), regnum, Location::lng )); 832 } 833 #else //_LP64 834 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) { 835 // Repack the double/long as two jints. 836 // The convention the interpreter uses is that the second local 837 // holds the first raw word of the native double representation. 838 // This is actually reasonable, since locals and stack arrays 839 // grow downwards in all implementations. 840 // (If, on some machine, the interpreter's Java locals or stack 841 // were to grow upwards, the embedded doubles would be word-swapped.) 842 array->append(new_loc_value( C->regalloc(), OptoReg::add(regnum,1), Location::normal )); 843 array->append(new_loc_value( C->regalloc(), regnum , Location::normal )); 844 } 845 #endif //_LP64 846 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) && 847 OptoReg::is_reg(regnum) ) { 848 array->append(new_loc_value( C->regalloc(), regnum, Matcher::float_in_double() 849 ? Location::float_in_dbl : Location::normal )); 850 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) { 851 array->append(new_loc_value( C->regalloc(), regnum, Matcher::int_in_long 852 ? Location::int_in_long : Location::normal )); 853 } else if( t->base() == Type::NarrowOop ) { 854 array->append(new_loc_value( C->regalloc(), regnum, Location::narrowoop )); 855 } else if (t->base() == Type::VectorA || t->base() == Type::VectorS || 856 t->base() == Type::VectorD || t->base() == Type::VectorX || 857 t->base() == Type::VectorY || t->base() == Type::VectorZ) { 858 array->append(new_loc_value( C->regalloc(), regnum, Location::vector )); 859 } else if (C->regalloc()->is_oop(local)) { 860 assert(t->base() == Type::OopPtr || t->base() == Type::InstPtr || 861 t->base() == Type::AryPtr, 862 "Unexpected type: %s", t->msg()); 863 array->append(new_loc_value( C->regalloc(), regnum, Location::oop )); 864 } else { 865 assert(t->base() == Type::Int || t->base() == Type::Half || 866 t->base() == Type::FloatCon || t->base() == Type::FloatBot, 867 "Unexpected type: %s", t->msg()); 868 array->append(new_loc_value( C->regalloc(), regnum, Location::normal )); 869 } 870 return; 871 } 872 873 // No register. It must be constant data. 874 switch (t->base()) { 875 case Type::Half: // Second half of a double 876 ShouldNotReachHere(); // Caller should skip 2nd halves 877 break; 878 case Type::AnyPtr: 879 array->append(new ConstantOopWriteValue(nullptr)); 880 break; 881 case Type::AryPtr: 882 case Type::InstPtr: // fall through 883 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->constant_encoding())); 884 break; 885 case Type::NarrowOop: 886 if (t == TypeNarrowOop::NULL_PTR) { 887 array->append(new ConstantOopWriteValue(nullptr)); 888 } else { 889 array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->constant_encoding())); 890 } 891 break; 892 case Type::Int: 893 array->append(new ConstantIntValue(t->is_int()->get_con())); 894 break; 895 case Type::RawPtr: 896 // A return address (T_ADDRESS). 897 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI"); 898 #ifdef _LP64 899 // Must be restored to the full-width 64-bit stack slot. 900 array->append(new ConstantLongValue(t->is_ptr()->get_con())); 901 #else 902 array->append(new ConstantIntValue(t->is_ptr()->get_con())); 903 #endif 904 break; 905 case Type::FloatCon: { 906 float f = t->is_float_constant()->getf(); 907 array->append(new ConstantIntValue(jint_cast(f))); 908 break; 909 } 910 case Type::DoubleCon: { 911 jdouble d = t->is_double_constant()->getd(); 912 #ifdef _LP64 913 array->append(new ConstantIntValue((jint)0)); 914 array->append(new ConstantDoubleValue(d)); 915 #else 916 // Repack the double as two jints. 917 // The convention the interpreter uses is that the second local 918 // holds the first raw word of the native double representation. 919 // This is actually reasonable, since locals and stack arrays 920 // grow downwards in all implementations. 921 // (If, on some machine, the interpreter's Java locals or stack 922 // were to grow upwards, the embedded doubles would be word-swapped.) 923 jlong_accessor acc; 924 acc.long_value = jlong_cast(d); 925 array->append(new ConstantIntValue(acc.words[1])); 926 array->append(new ConstantIntValue(acc.words[0])); 927 #endif 928 break; 929 } 930 case Type::Long: { 931 jlong d = t->is_long()->get_con(); 932 #ifdef _LP64 933 array->append(new ConstantIntValue((jint)0)); 934 array->append(new ConstantLongValue(d)); 935 #else 936 // Repack the long as two jints. 937 // The convention the interpreter uses is that the second local 938 // holds the first raw word of the native double representation. 939 // This is actually reasonable, since locals and stack arrays 940 // grow downwards in all implementations. 941 // (If, on some machine, the interpreter's Java locals or stack 942 // were to grow upwards, the embedded doubles would be word-swapped.) 943 jlong_accessor acc; 944 acc.long_value = d; 945 array->append(new ConstantIntValue(acc.words[1])); 946 array->append(new ConstantIntValue(acc.words[0])); 947 #endif 948 break; 949 } 950 case Type::Top: // Add an illegal value here 951 array->append(new LocationValue(Location())); 952 break; 953 default: 954 ShouldNotReachHere(); 955 break; 956 } 957 } 958 959 // Determine if this node starts a bundle 960 bool PhaseOutput::starts_bundle(const Node *n) const { 961 return (_node_bundling_limit > n->_idx && 962 _node_bundling_base[n->_idx].starts_bundle()); 963 } 964 965 // Determine if there is a monitor that has 'ov' as its owner. 966 bool PhaseOutput::contains_as_owner(GrowableArray<MonitorValue*> *monarray, ObjectValue *ov) const { 967 for (int k = 0; k < monarray->length(); k++) { 968 MonitorValue* mv = monarray->at(k); 969 if (mv->owner() == ov) { 970 return true; 971 } 972 } 973 974 return false; 975 } 976 977 //--------------------------Process_OopMap_Node-------------------------------- 978 void PhaseOutput::Process_OopMap_Node(MachNode *mach, int current_offset) { 979 // Handle special safepoint nodes for synchronization 980 MachSafePointNode *sfn = mach->as_MachSafePoint(); 981 MachCallNode *mcall; 982 983 int safepoint_pc_offset = current_offset; 984 bool is_method_handle_invoke = false; 985 bool return_oop = false; 986 bool has_ea_local_in_scope = sfn->_has_ea_local_in_scope; 987 bool arg_escape = false; 988 989 // Add the safepoint in the DebugInfoRecorder 990 if( !mach->is_MachCall() ) { 991 mcall = nullptr; 992 C->debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map); 993 } else { 994 mcall = mach->as_MachCall(); 995 996 // Is the call a MethodHandle call? 997 if (mcall->is_MachCallJava()) { 998 if (mcall->as_MachCallJava()->_method_handle_invoke) { 999 assert(C->has_method_handle_invokes(), "must have been set during call generation"); 1000 is_method_handle_invoke = true; 1001 } 1002 arg_escape = mcall->as_MachCallJava()->_arg_escape; 1003 } 1004 1005 // Check if a call returns an object. 1006 if (mcall->returns_pointer()) { 1007 return_oop = true; 1008 } 1009 safepoint_pc_offset += mcall->ret_addr_offset(); 1010 C->debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map); 1011 } 1012 1013 // Loop over the JVMState list to add scope information 1014 // Do not skip safepoints with a null method, they need monitor info 1015 JVMState* youngest_jvms = sfn->jvms(); 1016 int max_depth = youngest_jvms->depth(); 1017 1018 // Allocate the object pool for scalar-replaced objects -- the map from 1019 // small-integer keys (which can be recorded in the local and ostack 1020 // arrays) to descriptions of the object state. 1021 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>(); 1022 1023 // Visit scopes from oldest to youngest. 1024 for (int depth = 1; depth <= max_depth; depth++) { 1025 JVMState* jvms = youngest_jvms->of_depth(depth); 1026 int idx; 1027 ciMethod* method = jvms->has_method() ? jvms->method() : nullptr; 1028 // Safepoints that do not have method() set only provide oop-map and monitor info 1029 // to support GC; these do not support deoptimization. 1030 int num_locs = (method == nullptr) ? 0 : jvms->loc_size(); 1031 int num_exps = (method == nullptr) ? 0 : jvms->stk_size(); 1032 int num_mon = jvms->nof_monitors(); 1033 assert(method == nullptr || jvms->bci() < 0 || num_locs == method->max_locals(), 1034 "JVMS local count must match that of the method"); 1035 1036 // Add Local and Expression Stack Information 1037 1038 // Insert locals into the locarray 1039 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs); 1040 for( idx = 0; idx < num_locs; idx++ ) { 1041 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs ); 1042 } 1043 1044 // Insert expression stack entries into the exparray 1045 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps); 1046 for( idx = 0; idx < num_exps; idx++ ) { 1047 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs ); 1048 } 1049 1050 // Add in mappings of the monitors 1051 assert( !method || 1052 !method->is_synchronized() || 1053 method->is_native() || 1054 num_mon > 0 || 1055 !GenerateSynchronizationCode, 1056 "monitors must always exist for synchronized methods"); 1057 1058 // Build the growable array of ScopeValues for exp stack 1059 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon); 1060 1061 // Loop over monitors and insert into array 1062 for (idx = 0; idx < num_mon; idx++) { 1063 // Grab the node that defines this monitor 1064 Node* box_node = sfn->monitor_box(jvms, idx); 1065 Node* obj_node = sfn->monitor_obj(jvms, idx); 1066 1067 // Create ScopeValue for object 1068 ScopeValue *scval = nullptr; 1069 1070 if (obj_node->is_SafePointScalarObject()) { 1071 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject(); 1072 scval = PhaseOutput::sv_for_node_id(objs, spobj->_idx); 1073 if (scval == nullptr) { 1074 const Type *t = spobj->bottom_type(); 1075 ciKlass* cik = t->is_oopptr()->exact_klass(); 1076 assert(cik->is_instance_klass() || 1077 cik->is_array_klass(), "Not supported allocation."); 1078 ObjectValue* sv = new ObjectValue(spobj->_idx, 1079 new ConstantOopWriteValue(cik->java_mirror()->constant_encoding())); 1080 PhaseOutput::set_sv_for_object_node(objs, sv); 1081 1082 uint first_ind = spobj->first_index(youngest_jvms); 1083 for (uint i = 0; i < spobj->n_fields(); i++) { 1084 Node* fld_node = sfn->in(first_ind+i); 1085 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs); 1086 } 1087 scval = sv; 1088 } 1089 } else if (obj_node->is_SafePointScalarMerge()) { 1090 SafePointScalarMergeNode* smerge = obj_node->as_SafePointScalarMerge(); 1091 ObjectMergeValue* mv = (ObjectMergeValue*) sv_for_node_id(objs, smerge->_idx); 1092 1093 if (mv == nullptr) { 1094 GrowableArray<ScopeValue*> deps; 1095 1096 int merge_pointer_idx = smerge->merge_pointer_idx(youngest_jvms); 1097 FillLocArray(0, sfn, sfn->in(merge_pointer_idx), &deps, objs); 1098 assert(deps.length() == 1, "missing value"); 1099 1100 int selector_idx = smerge->selector_idx(youngest_jvms); 1101 FillLocArray(1, nullptr, sfn->in(selector_idx), &deps, nullptr); 1102 assert(deps.length() == 2, "missing value"); 1103 1104 mv = new ObjectMergeValue(smerge->_idx, deps.at(0), deps.at(1)); 1105 set_sv_for_object_node(objs, mv); 1106 1107 for (uint i = 1; i < smerge->req(); i++) { 1108 Node* obj_node = smerge->in(i); 1109 FillLocArray(mv->possible_objects()->length(), sfn, obj_node, mv->possible_objects(), objs); 1110 } 1111 } 1112 scval = mv; 1113 } else if (!obj_node->is_Con()) { 1114 OptoReg::Name obj_reg = C->regalloc()->get_reg_first(obj_node); 1115 if( obj_node->bottom_type()->base() == Type::NarrowOop ) { 1116 scval = new_loc_value( C->regalloc(), obj_reg, Location::narrowoop ); 1117 } else { 1118 scval = new_loc_value( C->regalloc(), obj_reg, Location::oop ); 1119 } 1120 } else { 1121 const TypePtr *tp = obj_node->get_ptr_type(); 1122 scval = new ConstantOopWriteValue(tp->is_oopptr()->const_oop()->constant_encoding()); 1123 } 1124 1125 OptoReg::Name box_reg = BoxLockNode::reg(box_node); 1126 Location basic_lock = Location::new_stk_loc(Location::normal,C->regalloc()->reg2offset(box_reg)); 1127 bool eliminated = (box_node->is_BoxLock() && box_node->as_BoxLock()->is_eliminated()); 1128 monarray->append(new MonitorValue(scval, basic_lock, eliminated)); 1129 } 1130 1131 // Mark ObjectValue nodes as root nodes if they are directly 1132 // referenced in the JVMS. 1133 for (int i = 0; i < objs->length(); i++) { 1134 ScopeValue* sv = objs->at(i); 1135 if (sv->is_object_merge()) { 1136 ObjectMergeValue* merge = sv->as_ObjectMergeValue(); 1137 1138 for (int j = 0; j< merge->possible_objects()->length(); j++) { 1139 ObjectValue* ov = merge->possible_objects()->at(j)->as_ObjectValue(); 1140 bool is_root = locarray->contains(ov) || exparray->contains(ov) || contains_as_owner(monarray, ov); 1141 ov->set_root(is_root); 1142 } 1143 } 1144 } 1145 1146 // We dump the object pool first, since deoptimization reads it in first. 1147 C->debug_info()->dump_object_pool(objs); 1148 1149 // Build first class objects to pass to scope 1150 DebugToken *locvals = C->debug_info()->create_scope_values(locarray); 1151 DebugToken *expvals = C->debug_info()->create_scope_values(exparray); 1152 DebugToken *monvals = C->debug_info()->create_monitor_values(monarray); 1153 1154 // Make method available for all Safepoints 1155 ciMethod* scope_method = method ? method : C->method(); 1156 // Describe the scope here 1157 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI"); 1158 assert(!jvms->should_reexecute() || depth == max_depth, "reexecute allowed only for the youngest"); 1159 // Now we can describe the scope. 1160 methodHandle null_mh; 1161 bool rethrow_exception = false; 1162 C->debug_info()->describe_scope( 1163 safepoint_pc_offset, 1164 null_mh, 1165 scope_method, 1166 jvms->bci(), 1167 jvms->should_reexecute(), 1168 rethrow_exception, 1169 is_method_handle_invoke, 1170 return_oop, 1171 has_ea_local_in_scope, 1172 arg_escape, 1173 locvals, 1174 expvals, 1175 monvals 1176 ); 1177 } // End jvms loop 1178 1179 // Mark the end of the scope set. 1180 C->debug_info()->end_safepoint(safepoint_pc_offset); 1181 } 1182 1183 1184 1185 // A simplified version of Process_OopMap_Node, to handle non-safepoints. 1186 class NonSafepointEmitter { 1187 Compile* C; 1188 JVMState* _pending_jvms; 1189 int _pending_offset; 1190 1191 void emit_non_safepoint(); 1192 1193 public: 1194 NonSafepointEmitter(Compile* compile) { 1195 this->C = compile; 1196 _pending_jvms = nullptr; 1197 _pending_offset = 0; 1198 } 1199 1200 void observe_instruction(Node* n, int pc_offset) { 1201 if (!C->debug_info()->recording_non_safepoints()) return; 1202 1203 Node_Notes* nn = C->node_notes_at(n->_idx); 1204 if (nn == nullptr || nn->jvms() == nullptr) return; 1205 if (_pending_jvms != nullptr && 1206 _pending_jvms->same_calls_as(nn->jvms())) { 1207 // Repeated JVMS? Stretch it up here. 1208 _pending_offset = pc_offset; 1209 } else { 1210 if (_pending_jvms != nullptr && 1211 _pending_offset < pc_offset) { 1212 emit_non_safepoint(); 1213 } 1214 _pending_jvms = nullptr; 1215 if (pc_offset > C->debug_info()->last_pc_offset()) { 1216 // This is the only way _pending_jvms can become non-null: 1217 _pending_jvms = nn->jvms(); 1218 _pending_offset = pc_offset; 1219 } 1220 } 1221 } 1222 1223 // Stay out of the way of real safepoints: 1224 void observe_safepoint(JVMState* jvms, int pc_offset) { 1225 if (_pending_jvms != nullptr && 1226 !_pending_jvms->same_calls_as(jvms) && 1227 _pending_offset < pc_offset) { 1228 emit_non_safepoint(); 1229 } 1230 _pending_jvms = nullptr; 1231 } 1232 1233 void flush_at_end() { 1234 if (_pending_jvms != nullptr) { 1235 emit_non_safepoint(); 1236 } 1237 _pending_jvms = nullptr; 1238 } 1239 }; 1240 1241 void NonSafepointEmitter::emit_non_safepoint() { 1242 JVMState* youngest_jvms = _pending_jvms; 1243 int pc_offset = _pending_offset; 1244 1245 // Clear it now: 1246 _pending_jvms = nullptr; 1247 1248 DebugInformationRecorder* debug_info = C->debug_info(); 1249 assert(debug_info->recording_non_safepoints(), "sanity"); 1250 1251 debug_info->add_non_safepoint(pc_offset); 1252 int max_depth = youngest_jvms->depth(); 1253 1254 // Visit scopes from oldest to youngest. 1255 for (int depth = 1; depth <= max_depth; depth++) { 1256 JVMState* jvms = youngest_jvms->of_depth(depth); 1257 ciMethod* method = jvms->has_method() ? jvms->method() : nullptr; 1258 assert(!jvms->should_reexecute() || depth==max_depth, "reexecute allowed only for the youngest"); 1259 methodHandle null_mh; 1260 debug_info->describe_scope(pc_offset, null_mh, method, jvms->bci(), jvms->should_reexecute()); 1261 } 1262 1263 // Mark the end of the scope set. 1264 debug_info->end_non_safepoint(pc_offset); 1265 } 1266 1267 //------------------------------init_buffer------------------------------------ 1268 void PhaseOutput::estimate_buffer_size(int& const_req) { 1269 1270 // Set the initially allocated size 1271 const_req = initial_const_capacity; 1272 1273 // The extra spacing after the code is necessary on some platforms. 1274 // Sometimes we need to patch in a jump after the last instruction, 1275 // if the nmethod has been deoptimized. (See 4932387, 4894843.) 1276 1277 // Compute the byte offset where we can store the deopt pc. 1278 if (C->fixed_slots() != 0) { 1279 _orig_pc_slot_offset_in_bytes = C->regalloc()->reg2offset(OptoReg::stack2reg(_orig_pc_slot)); 1280 } 1281 1282 // Compute prolog code size 1283 _frame_slots = OptoReg::reg2stack(C->matcher()->_old_SP) + C->regalloc()->_framesize; 1284 assert(_frame_slots >= 0 && _frame_slots < 1000000, "sanity check"); 1285 1286 if (C->has_mach_constant_base_node()) { 1287 uint add_size = 0; 1288 // Fill the constant table. 1289 // Note: This must happen before shorten_branches. 1290 for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) { 1291 Block* b = C->cfg()->get_block(i); 1292 1293 for (uint j = 0; j < b->number_of_nodes(); j++) { 1294 Node* n = b->get_node(j); 1295 1296 // If the node is a MachConstantNode evaluate the constant 1297 // value section. 1298 if (n->is_MachConstant()) { 1299 MachConstantNode* machcon = n->as_MachConstant(); 1300 machcon->eval_constant(C); 1301 } else if (n->is_Mach()) { 1302 // On Power there are more nodes that issue constants. 1303 add_size += (n->as_Mach()->ins_num_consts() * 8); 1304 } 1305 } 1306 } 1307 1308 // Calculate the offsets of the constants and the size of the 1309 // constant table (including the padding to the next section). 1310 constant_table().calculate_offsets_and_size(); 1311 const_req = constant_table().size() + add_size; 1312 } 1313 1314 // Initialize the space for the BufferBlob used to find and verify 1315 // instruction size in MachNode::emit_size() 1316 init_scratch_buffer_blob(const_req); 1317 } 1318 1319 CodeBuffer* PhaseOutput::init_buffer() { 1320 int stub_req = _buf_sizes._stub; 1321 int code_req = _buf_sizes._code; 1322 int const_req = _buf_sizes._const; 1323 1324 int pad_req = NativeCall::instruction_size; 1325 1326 BarrierSetC2* bs = BarrierSet::barrier_set()->barrier_set_c2(); 1327 stub_req += bs->estimate_stub_size(); 1328 1329 // nmethod and CodeBuffer count stubs & constants as part of method's code. 1330 // class HandlerImpl is platform-specific and defined in the *.ad files. 1331 int exception_handler_req = HandlerImpl::size_exception_handler() + MAX_stubs_size; // add marginal slop for handler 1332 int deopt_handler_req = HandlerImpl::size_deopt_handler() + MAX_stubs_size; // add marginal slop for handler 1333 stub_req += MAX_stubs_size; // ensure per-stub margin 1334 code_req += MAX_inst_size; // ensure per-instruction margin 1335 1336 if (StressCodeBuffers) 1337 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion 1338 1339 int total_req = 1340 const_req + 1341 code_req + 1342 pad_req + 1343 stub_req + 1344 exception_handler_req + 1345 deopt_handler_req; // deopt handler 1346 1347 if (C->has_method_handle_invokes()) 1348 total_req += deopt_handler_req; // deopt MH handler 1349 1350 CodeBuffer* cb = code_buffer(); 1351 cb->initialize(total_req, _buf_sizes._reloc); 1352 1353 // Have we run out of code space? 1354 if ((cb->blob() == nullptr) || (!CompileBroker::should_compile_new_jobs())) { 1355 C->record_failure("CodeCache is full"); 1356 return nullptr; 1357 } 1358 // Configure the code buffer. 1359 cb->initialize_consts_size(const_req); 1360 cb->initialize_stubs_size(stub_req); 1361 cb->initialize_oop_recorder(C->env()->oop_recorder()); 1362 1363 // fill in the nop array for bundling computations 1364 MachNode *_nop_list[Bundle::_nop_count]; 1365 Bundle::initialize_nops(_nop_list); 1366 1367 return cb; 1368 } 1369 1370 //------------------------------fill_buffer------------------------------------ 1371 void PhaseOutput::fill_buffer(C2_MacroAssembler* masm, uint* blk_starts) { 1372 // blk_starts[] contains offsets calculated during short branches processing, 1373 // offsets should not be increased during following steps. 1374 1375 // Compute the size of first NumberOfLoopInstrToAlign instructions at head 1376 // of a loop. It is used to determine the padding for loop alignment. 1377 Compile::TracePhase tp("fill buffer", &timers[_t_fillBuffer]); 1378 1379 compute_loop_first_inst_sizes(); 1380 1381 // Create oopmap set. 1382 _oop_map_set = new OopMapSet(); 1383 1384 // !!!!! This preserves old handling of oopmaps for now 1385 C->debug_info()->set_oopmaps(_oop_map_set); 1386 1387 uint nblocks = C->cfg()->number_of_blocks(); 1388 // Count and start of implicit null check instructions 1389 uint inct_cnt = 0; 1390 uint* inct_starts = NEW_RESOURCE_ARRAY(uint, nblocks+1); 1391 1392 // Count and start of calls 1393 uint* call_returns = NEW_RESOURCE_ARRAY(uint, nblocks+1); 1394 1395 uint return_offset = 0; 1396 int nop_size = (new MachNopNode())->size(C->regalloc()); 1397 1398 int previous_offset = 0; 1399 int current_offset = 0; 1400 int last_call_offset = -1; 1401 int last_avoid_back_to_back_offset = -1; 1402 #ifdef ASSERT 1403 uint* jmp_target = NEW_RESOURCE_ARRAY(uint,nblocks); 1404 uint* jmp_offset = NEW_RESOURCE_ARRAY(uint,nblocks); 1405 uint* jmp_size = NEW_RESOURCE_ARRAY(uint,nblocks); 1406 uint* jmp_rule = NEW_RESOURCE_ARRAY(uint,nblocks); 1407 #endif 1408 1409 // Create an array of unused labels, one for each basic block, if printing is enabled 1410 #if defined(SUPPORT_OPTO_ASSEMBLY) 1411 int* node_offsets = nullptr; 1412 uint node_offset_limit = C->unique(); 1413 1414 if (C->print_assembly()) { 1415 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit); 1416 } 1417 if (node_offsets != nullptr) { 1418 // We need to initialize. Unused array elements may contain garbage and mess up PrintOptoAssembly. 1419 memset(node_offsets, 0, node_offset_limit*sizeof(int)); 1420 } 1421 #endif 1422 1423 NonSafepointEmitter non_safepoints(C); // emit non-safepoints lazily 1424 1425 // Emit the constant table. 1426 if (C->has_mach_constant_base_node()) { 1427 if (!constant_table().emit(masm)) { 1428 C->record_failure("consts section overflow"); 1429 return; 1430 } 1431 } 1432 1433 // Create an array of labels, one for each basic block 1434 Label* blk_labels = NEW_RESOURCE_ARRAY(Label, nblocks+1); 1435 for (uint i = 0; i <= nblocks; i++) { 1436 blk_labels[i].init(); 1437 } 1438 1439 // Now fill in the code buffer 1440 Node* delay_slot = nullptr; 1441 for (uint i = 0; i < nblocks; i++) { 1442 Block* block = C->cfg()->get_block(i); 1443 _block = block; 1444 Node* head = block->head(); 1445 1446 // If this block needs to start aligned (i.e, can be reached other 1447 // than by falling-thru from the previous block), then force the 1448 // start of a new bundle. 1449 if (Pipeline::requires_bundling() && starts_bundle(head)) { 1450 masm->code()->flush_bundle(true); 1451 } 1452 1453 #ifdef ASSERT 1454 if (!block->is_connector()) { 1455 stringStream st; 1456 block->dump_head(C->cfg(), &st); 1457 masm->block_comment(st.freeze()); 1458 } 1459 jmp_target[i] = 0; 1460 jmp_offset[i] = 0; 1461 jmp_size[i] = 0; 1462 jmp_rule[i] = 0; 1463 #endif 1464 int blk_offset = current_offset; 1465 1466 // Define the label at the beginning of the basic block 1467 masm->bind(blk_labels[block->_pre_order]); 1468 1469 uint last_inst = block->number_of_nodes(); 1470 1471 // Emit block normally, except for last instruction. 1472 // Emit means "dump code bits into code buffer". 1473 for (uint j = 0; j<last_inst; j++) { 1474 _index = j; 1475 1476 // Get the node 1477 Node* n = block->get_node(j); 1478 1479 // See if delay slots are supported 1480 if (valid_bundle_info(n) && node_bundling(n)->used_in_unconditional_delay()) { 1481 assert(delay_slot == nullptr, "no use of delay slot node"); 1482 assert(n->size(C->regalloc()) == Pipeline::instr_unit_size(), "delay slot instruction wrong size"); 1483 1484 delay_slot = n; 1485 continue; 1486 } 1487 1488 // If this starts a new instruction group, then flush the current one 1489 // (but allow split bundles) 1490 if (Pipeline::requires_bundling() && starts_bundle(n)) 1491 masm->code()->flush_bundle(false); 1492 1493 // Special handling for SafePoint/Call Nodes 1494 bool is_mcall = false; 1495 if (n->is_Mach()) { 1496 MachNode *mach = n->as_Mach(); 1497 is_mcall = n->is_MachCall(); 1498 bool is_sfn = n->is_MachSafePoint(); 1499 1500 // If this requires all previous instructions be flushed, then do so 1501 if (is_sfn || is_mcall || mach->alignment_required() != 1) { 1502 masm->code()->flush_bundle(true); 1503 current_offset = masm->offset(); 1504 } 1505 1506 // A padding may be needed again since a previous instruction 1507 // could be moved to delay slot. 1508 1509 // align the instruction if necessary 1510 int padding = mach->compute_padding(current_offset); 1511 // Make sure safepoint node for polling is distinct from a call's 1512 // return by adding a nop if needed. 1513 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset) { 1514 padding = nop_size; 1515 } 1516 if (padding == 0 && mach->avoid_back_to_back(MachNode::AVOID_BEFORE) && 1517 current_offset == last_avoid_back_to_back_offset) { 1518 // Avoid back to back some instructions. 1519 padding = nop_size; 1520 } 1521 1522 if (padding > 0) { 1523 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size"); 1524 int nops_cnt = padding / nop_size; 1525 MachNode *nop = new MachNopNode(nops_cnt); 1526 block->insert_node(nop, j++); 1527 last_inst++; 1528 C->cfg()->map_node_to_block(nop, block); 1529 // Ensure enough space. 1530 masm->code()->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size); 1531 if ((masm->code()->blob() == nullptr) || (!CompileBroker::should_compile_new_jobs())) { 1532 C->record_failure("CodeCache is full"); 1533 return; 1534 } 1535 nop->emit(masm, C->regalloc()); 1536 masm->code()->flush_bundle(true); 1537 current_offset = masm->offset(); 1538 } 1539 1540 bool observe_safepoint = is_sfn; 1541 // Remember the start of the last call in a basic block 1542 if (is_mcall) { 1543 MachCallNode *mcall = mach->as_MachCall(); 1544 1545 // This destination address is NOT PC-relative 1546 mcall->method_set((intptr_t)mcall->entry_point()); 1547 1548 // Save the return address 1549 call_returns[block->_pre_order] = current_offset + mcall->ret_addr_offset(); 1550 1551 observe_safepoint = mcall->guaranteed_safepoint(); 1552 } 1553 1554 // sfn will be valid whenever mcall is valid now because of inheritance 1555 if (observe_safepoint) { 1556 // Handle special safepoint nodes for synchronization 1557 if (!is_mcall) { 1558 MachSafePointNode *sfn = mach->as_MachSafePoint(); 1559 // !!!!! Stubs only need an oopmap right now, so bail out 1560 if (sfn->jvms()->method() == nullptr) { 1561 // Write the oopmap directly to the code blob??!! 1562 continue; 1563 } 1564 } // End synchronization 1565 1566 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(), 1567 current_offset); 1568 Process_OopMap_Node(mach, current_offset); 1569 } // End if safepoint 1570 1571 // If this is a null check, then add the start of the previous instruction to the list 1572 else if( mach->is_MachNullCheck() ) { 1573 inct_starts[inct_cnt++] = previous_offset; 1574 } 1575 1576 // If this is a branch, then fill in the label with the target BB's label 1577 else if (mach->is_MachBranch()) { 1578 // This requires the TRUE branch target be in succs[0] 1579 uint block_num = block->non_connector_successor(0)->_pre_order; 1580 1581 // Try to replace long branch if delay slot is not used, 1582 // it is mostly for back branches since forward branch's 1583 // distance is not updated yet. 1584 bool delay_slot_is_used = valid_bundle_info(n) && 1585 C->output()->node_bundling(n)->use_unconditional_delay(); 1586 if (!delay_slot_is_used && mach->may_be_short_branch()) { 1587 assert(delay_slot == nullptr, "not expecting delay slot node"); 1588 int br_size = n->size(C->regalloc()); 1589 int offset = blk_starts[block_num] - current_offset; 1590 if (block_num >= i) { 1591 // Current and following block's offset are not 1592 // finalized yet, adjust distance by the difference 1593 // between calculated and final offsets of current block. 1594 offset -= (blk_starts[i] - blk_offset); 1595 } 1596 // In the following code a nop could be inserted before 1597 // the branch which will increase the backward distance. 1598 bool needs_padding = (current_offset == last_avoid_back_to_back_offset); 1599 if (needs_padding && offset <= 0) 1600 offset -= nop_size; 1601 1602 if (C->matcher()->is_short_branch_offset(mach->rule(), br_size, offset)) { 1603 // We've got a winner. Replace this branch. 1604 MachNode* replacement = mach->as_MachBranch()->short_branch_version(); 1605 1606 // Update the jmp_size. 1607 int new_size = replacement->size(C->regalloc()); 1608 assert((br_size - new_size) >= (int)nop_size, "short_branch size should be smaller"); 1609 // Insert padding between avoid_back_to_back branches. 1610 if (needs_padding && replacement->avoid_back_to_back(MachNode::AVOID_BEFORE)) { 1611 MachNode *nop = new MachNopNode(); 1612 block->insert_node(nop, j++); 1613 C->cfg()->map_node_to_block(nop, block); 1614 last_inst++; 1615 nop->emit(masm, C->regalloc()); 1616 masm->code()->flush_bundle(true); 1617 current_offset = masm->offset(); 1618 } 1619 #ifdef ASSERT 1620 jmp_target[i] = block_num; 1621 jmp_offset[i] = current_offset - blk_offset; 1622 jmp_size[i] = new_size; 1623 jmp_rule[i] = mach->rule(); 1624 #endif 1625 block->map_node(replacement, j); 1626 mach->subsume_by(replacement, C); 1627 n = replacement; 1628 mach = replacement; 1629 } 1630 } 1631 mach->as_MachBranch()->label_set( &blk_labels[block_num], block_num ); 1632 } else if (mach->ideal_Opcode() == Op_Jump) { 1633 for (uint h = 0; h < block->_num_succs; h++) { 1634 Block* succs_block = block->_succs[h]; 1635 for (uint j = 1; j < succs_block->num_preds(); j++) { 1636 Node* jpn = succs_block->pred(j); 1637 if (jpn->is_JumpProj() && jpn->in(0) == mach) { 1638 uint block_num = succs_block->non_connector()->_pre_order; 1639 Label *blkLabel = &blk_labels[block_num]; 1640 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel); 1641 } 1642 } 1643 } 1644 } 1645 #ifdef ASSERT 1646 // Check that oop-store precedes the card-mark 1647 else if (mach->ideal_Opcode() == Op_StoreCM) { 1648 uint storeCM_idx = j; 1649 int count = 0; 1650 for (uint prec = mach->req(); prec < mach->len(); prec++) { 1651 Node *oop_store = mach->in(prec); // Precedence edge 1652 if (oop_store == nullptr) continue; 1653 count++; 1654 uint i4; 1655 for (i4 = 0; i4 < last_inst; ++i4) { 1656 if (block->get_node(i4) == oop_store) { 1657 break; 1658 } 1659 } 1660 // Note: This test can provide a false failure if other precedence 1661 // edges have been added to the storeCMNode. 1662 assert(i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store"); 1663 } 1664 assert(count > 0, "storeCM expects at least one precedence edge"); 1665 } 1666 #endif 1667 else if (!n->is_Proj()) { 1668 // Remember the beginning of the previous instruction, in case 1669 // it's followed by a flag-kill and a null-check. Happens on 1670 // Intel all the time, with add-to-memory kind of opcodes. 1671 previous_offset = current_offset; 1672 } 1673 1674 // Not an else-if! 1675 // If this is a trap based cmp then add its offset to the list. 1676 if (mach->is_TrapBasedCheckNode()) { 1677 inct_starts[inct_cnt++] = current_offset; 1678 } 1679 } 1680 1681 // Verify that there is sufficient space remaining 1682 masm->code()->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size); 1683 if ((masm->code()->blob() == nullptr) || (!CompileBroker::should_compile_new_jobs())) { 1684 C->record_failure("CodeCache is full"); 1685 return; 1686 } 1687 1688 // Save the offset for the listing 1689 #if defined(SUPPORT_OPTO_ASSEMBLY) 1690 if ((node_offsets != nullptr) && (n->_idx < node_offset_limit)) { 1691 node_offsets[n->_idx] = masm->offset(); 1692 } 1693 #endif 1694 assert(!C->failing(), "Should not reach here if failing."); 1695 1696 // "Normal" instruction case 1697 DEBUG_ONLY(uint instr_offset = masm->offset()); 1698 n->emit(masm, C->regalloc()); 1699 current_offset = masm->offset(); 1700 1701 // Above we only verified that there is enough space in the instruction section. 1702 // However, the instruction may emit stubs that cause code buffer expansion. 1703 // Bail out here if expansion failed due to a lack of code cache space. 1704 if (C->failing()) { 1705 return; 1706 } 1707 1708 assert(!is_mcall || (call_returns[block->_pre_order] <= (uint)current_offset), 1709 "ret_addr_offset() not within emitted code"); 1710 1711 #ifdef ASSERT 1712 uint n_size = n->size(C->regalloc()); 1713 if (n_size < (current_offset-instr_offset)) { 1714 MachNode* mach = n->as_Mach(); 1715 n->dump(); 1716 mach->dump_format(C->regalloc(), tty); 1717 tty->print_cr(" n_size (%d), current_offset (%d), instr_offset (%d)", n_size, current_offset, instr_offset); 1718 Disassembler::decode(masm->code()->insts_begin() + instr_offset, masm->code()->insts_begin() + current_offset + 1, tty); 1719 tty->print_cr(" ------------------- "); 1720 BufferBlob* blob = this->scratch_buffer_blob(); 1721 address blob_begin = blob->content_begin(); 1722 Disassembler::decode(blob_begin, blob_begin + n_size + 1, tty); 1723 assert(false, "wrong size of mach node"); 1724 } 1725 #endif 1726 non_safepoints.observe_instruction(n, current_offset); 1727 1728 // mcall is last "call" that can be a safepoint 1729 // record it so we can see if a poll will directly follow it 1730 // in which case we'll need a pad to make the PcDesc sites unique 1731 // see 5010568. This can be slightly inaccurate but conservative 1732 // in the case that return address is not actually at current_offset. 1733 // This is a small price to pay. 1734 1735 if (is_mcall) { 1736 last_call_offset = current_offset; 1737 } 1738 1739 if (n->is_Mach() && n->as_Mach()->avoid_back_to_back(MachNode::AVOID_AFTER)) { 1740 // Avoid back to back some instructions. 1741 last_avoid_back_to_back_offset = current_offset; 1742 } 1743 1744 // See if this instruction has a delay slot 1745 if (valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) { 1746 guarantee(delay_slot != nullptr, "expecting delay slot node"); 1747 1748 // Back up 1 instruction 1749 masm->code()->set_insts_end(masm->code()->insts_end() - Pipeline::instr_unit_size()); 1750 1751 // Save the offset for the listing 1752 #if defined(SUPPORT_OPTO_ASSEMBLY) 1753 if ((node_offsets != nullptr) && (delay_slot->_idx < node_offset_limit)) { 1754 node_offsets[delay_slot->_idx] = masm->offset(); 1755 } 1756 #endif 1757 1758 // Support a SafePoint in the delay slot 1759 if (delay_slot->is_MachSafePoint()) { 1760 MachNode *mach = delay_slot->as_Mach(); 1761 // !!!!! Stubs only need an oopmap right now, so bail out 1762 if (!mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == nullptr) { 1763 // Write the oopmap directly to the code blob??!! 1764 delay_slot = nullptr; 1765 continue; 1766 } 1767 1768 int adjusted_offset = current_offset - Pipeline::instr_unit_size(); 1769 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(), 1770 adjusted_offset); 1771 // Generate an OopMap entry 1772 Process_OopMap_Node(mach, adjusted_offset); 1773 } 1774 1775 // Insert the delay slot instruction 1776 delay_slot->emit(masm, C->regalloc()); 1777 1778 // Don't reuse it 1779 delay_slot = nullptr; 1780 } 1781 1782 } // End for all instructions in block 1783 1784 // If the next block is the top of a loop, pad this block out to align 1785 // the loop top a little. Helps prevent pipe stalls at loop back branches. 1786 if (i < nblocks-1) { 1787 Block *nb = C->cfg()->get_block(i + 1); 1788 int padding = nb->alignment_padding(current_offset); 1789 if( padding > 0 ) { 1790 MachNode *nop = new MachNopNode(padding / nop_size); 1791 block->insert_node(nop, block->number_of_nodes()); 1792 C->cfg()->map_node_to_block(nop, block); 1793 nop->emit(masm, C->regalloc()); 1794 current_offset = masm->offset(); 1795 } 1796 } 1797 // Verify that the distance for generated before forward 1798 // short branches is still valid. 1799 guarantee((int)(blk_starts[i+1] - blk_starts[i]) >= (current_offset - blk_offset), "shouldn't increase block size"); 1800 1801 // Save new block start offset 1802 blk_starts[i] = blk_offset; 1803 } // End of for all blocks 1804 blk_starts[nblocks] = current_offset; 1805 1806 non_safepoints.flush_at_end(); 1807 1808 // Offset too large? 1809 if (C->failing()) return; 1810 1811 // Define a pseudo-label at the end of the code 1812 masm->bind( blk_labels[nblocks] ); 1813 1814 // Compute the size of the first block 1815 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos(); 1816 1817 #ifdef ASSERT 1818 for (uint i = 0; i < nblocks; i++) { // For all blocks 1819 if (jmp_target[i] != 0) { 1820 int br_size = jmp_size[i]; 1821 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_offset[i]); 1822 if (!C->matcher()->is_short_branch_offset(jmp_rule[i], br_size, offset)) { 1823 tty->print_cr("target (%d) - jmp_offset(%d) = offset (%d), jump_size(%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_offset[i], offset, br_size, i, jmp_target[i]); 1824 assert(false, "Displacement too large for short jmp"); 1825 } 1826 } 1827 } 1828 #endif 1829 1830 if (!masm->code()->finalize_stubs()) { 1831 C->record_failure("CodeCache is full"); 1832 return; 1833 } 1834 1835 BarrierSetC2* bs = BarrierSet::barrier_set()->barrier_set_c2(); 1836 bs->emit_stubs(*masm->code()); 1837 if (C->failing()) return; 1838 1839 // Fill in stubs. 1840 assert(masm->inst_mark() == nullptr, "should be."); 1841 _stub_list.emit(*masm); 1842 if (C->failing()) return; 1843 1844 #ifndef PRODUCT 1845 // Information on the size of the method, without the extraneous code 1846 Scheduling::increment_method_size(masm->offset()); 1847 #endif 1848 1849 // ------------------ 1850 // Fill in exception table entries. 1851 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels); 1852 1853 // Only java methods have exception handlers and deopt handlers 1854 // class HandlerImpl is platform-specific and defined in the *.ad files. 1855 if (C->method()) { 1856 // Emit the exception handler code. 1857 _code_offsets.set_value(CodeOffsets::Exceptions, HandlerImpl::emit_exception_handler(masm)); 1858 if (C->failing()) { 1859 return; // CodeBuffer::expand failed 1860 } 1861 // Emit the deopt handler code. 1862 _code_offsets.set_value(CodeOffsets::Deopt, HandlerImpl::emit_deopt_handler(masm)); 1863 1864 // Emit the MethodHandle deopt handler code (if required). 1865 if (C->has_method_handle_invokes() && !C->failing()) { 1866 // We can use the same code as for the normal deopt handler, we 1867 // just need a different entry point address. 1868 _code_offsets.set_value(CodeOffsets::DeoptMH, HandlerImpl::emit_deopt_handler(masm)); 1869 } 1870 } 1871 1872 // One last check for failed CodeBuffer::expand: 1873 if ((masm->code()->blob() == nullptr) || (!CompileBroker::should_compile_new_jobs())) { 1874 C->record_failure("CodeCache is full"); 1875 return; 1876 } 1877 1878 #if defined(SUPPORT_ABSTRACT_ASSEMBLY) || defined(SUPPORT_ASSEMBLY) || defined(SUPPORT_OPTO_ASSEMBLY) 1879 if (C->print_assembly()) { 1880 tty->cr(); 1881 tty->print_cr("============================= C2-compiled nmethod =============================="); 1882 } 1883 #endif 1884 1885 #if defined(SUPPORT_OPTO_ASSEMBLY) 1886 // Dump the assembly code, including basic-block numbers 1887 if (C->print_assembly()) { 1888 ttyLocker ttyl; // keep the following output all in one block 1889 if (!VMThread::should_terminate()) { // test this under the tty lock 1890 // print_metadata and dump_asm may safepoint which makes us loose the ttylock. 1891 // We call them first and write to a stringStream, then we retake the lock to 1892 // make sure the end tag is coherent, and that xmlStream->pop_tag is done thread safe. 1893 ResourceMark rm; 1894 stringStream method_metadata_str; 1895 if (C->method() != nullptr) { 1896 C->method()->print_metadata(&method_metadata_str); 1897 } 1898 stringStream dump_asm_str; 1899 dump_asm_on(&dump_asm_str, node_offsets, node_offset_limit); 1900 1901 NoSafepointVerifier nsv; 1902 ttyLocker ttyl2; 1903 // This output goes directly to the tty, not the compiler log. 1904 // To enable tools to match it up with the compilation activity, 1905 // be sure to tag this tty output with the compile ID. 1906 if (xtty != nullptr) { 1907 xtty->head("opto_assembly compile_id='%d'%s", C->compile_id(), 1908 C->is_osr_compilation() ? " compile_kind='osr'" : ""); 1909 } 1910 if (C->method() != nullptr) { 1911 tty->print_cr("----------------------- MetaData before Compile_id = %d ------------------------", C->compile_id()); 1912 tty->print_raw(method_metadata_str.freeze()); 1913 } else if (C->stub_name() != nullptr) { 1914 tty->print_cr("----------------------------- RuntimeStub %s -------------------------------", C->stub_name()); 1915 } 1916 tty->cr(); 1917 tty->print_cr("------------------------ OptoAssembly for Compile_id = %d -----------------------", C->compile_id()); 1918 tty->print_raw(dump_asm_str.freeze()); 1919 tty->print_cr("--------------------------------------------------------------------------------"); 1920 if (xtty != nullptr) { 1921 xtty->tail("opto_assembly"); 1922 } 1923 } 1924 } 1925 #endif 1926 } 1927 1928 void PhaseOutput::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) { 1929 _inc_table.set_size(cnt); 1930 1931 uint inct_cnt = 0; 1932 for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) { 1933 Block* block = C->cfg()->get_block(i); 1934 Node *n = nullptr; 1935 int j; 1936 1937 // Find the branch; ignore trailing NOPs. 1938 for (j = block->number_of_nodes() - 1; j >= 0; j--) { 1939 n = block->get_node(j); 1940 if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) { 1941 break; 1942 } 1943 } 1944 1945 // If we didn't find anything, continue 1946 if (j < 0) { 1947 continue; 1948 } 1949 1950 // Compute ExceptionHandlerTable subtable entry and add it 1951 // (skip empty blocks) 1952 if (n->is_Catch()) { 1953 1954 // Get the offset of the return from the call 1955 uint call_return = call_returns[block->_pre_order]; 1956 #ifdef ASSERT 1957 assert( call_return > 0, "no call seen for this basic block" ); 1958 while (block->get_node(--j)->is_MachProj()) ; 1959 assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call"); 1960 #endif 1961 // last instruction is a CatchNode, find it's CatchProjNodes 1962 int nof_succs = block->_num_succs; 1963 // allocate space 1964 GrowableArray<intptr_t> handler_bcis(nof_succs); 1965 GrowableArray<intptr_t> handler_pcos(nof_succs); 1966 // iterate through all successors 1967 for (int j = 0; j < nof_succs; j++) { 1968 Block* s = block->_succs[j]; 1969 bool found_p = false; 1970 for (uint k = 1; k < s->num_preds(); k++) { 1971 Node* pk = s->pred(k); 1972 if (pk->is_CatchProj() && pk->in(0) == n) { 1973 const CatchProjNode* p = pk->as_CatchProj(); 1974 found_p = true; 1975 // add the corresponding handler bci & pco information 1976 if (p->_con != CatchProjNode::fall_through_index) { 1977 // p leads to an exception handler (and is not fall through) 1978 assert(s == C->cfg()->get_block(s->_pre_order), "bad numbering"); 1979 // no duplicates, please 1980 if (!handler_bcis.contains(p->handler_bci())) { 1981 uint block_num = s->non_connector()->_pre_order; 1982 handler_bcis.append(p->handler_bci()); 1983 handler_pcos.append(blk_labels[block_num].loc_pos()); 1984 } 1985 } 1986 } 1987 } 1988 assert(found_p, "no matching predecessor found"); 1989 // Note: Due to empty block removal, one block may have 1990 // several CatchProj inputs, from the same Catch. 1991 } 1992 1993 // Set the offset of the return from the call 1994 assert(handler_bcis.find(-1) != -1, "must have default handler"); 1995 _handler_table.add_subtable(call_return, &handler_bcis, nullptr, &handler_pcos); 1996 continue; 1997 } 1998 1999 // Handle implicit null exception table updates 2000 if (n->is_MachNullCheck()) { 2001 uint block_num = block->non_connector_successor(0)->_pre_order; 2002 _inc_table.append(inct_starts[inct_cnt++], blk_labels[block_num].loc_pos()); 2003 continue; 2004 } 2005 // Handle implicit exception table updates: trap instructions. 2006 if (n->is_Mach() && n->as_Mach()->is_TrapBasedCheckNode()) { 2007 uint block_num = block->non_connector_successor(0)->_pre_order; 2008 _inc_table.append(inct_starts[inct_cnt++], blk_labels[block_num].loc_pos()); 2009 continue; 2010 } 2011 } // End of for all blocks fill in exception table entries 2012 } 2013 2014 // Static Variables 2015 #ifndef PRODUCT 2016 uint Scheduling::_total_nop_size = 0; 2017 uint Scheduling::_total_method_size = 0; 2018 uint Scheduling::_total_branches = 0; 2019 uint Scheduling::_total_unconditional_delays = 0; 2020 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1]; 2021 #endif 2022 2023 // Initializer for class Scheduling 2024 2025 Scheduling::Scheduling(Arena *arena, Compile &compile) 2026 : _arena(arena), 2027 _cfg(compile.cfg()), 2028 _regalloc(compile.regalloc()), 2029 _scheduled(arena), 2030 _available(arena), 2031 _reg_node(arena), 2032 _pinch_free_list(arena), 2033 _next_node(nullptr), 2034 _bundle_instr_count(0), 2035 _bundle_cycle_number(0), 2036 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]) 2037 #ifndef PRODUCT 2038 , _branches(0) 2039 , _unconditional_delays(0) 2040 #endif 2041 { 2042 // Create a MachNopNode 2043 _nop = new MachNopNode(); 2044 2045 // Now that the nops are in the array, save the count 2046 // (but allow entries for the nops) 2047 _node_bundling_limit = compile.unique(); 2048 uint node_max = _regalloc->node_regs_max_index(); 2049 2050 compile.output()->set_node_bundling_limit(_node_bundling_limit); 2051 2052 // This one is persistent within the Compile class 2053 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max); 2054 2055 // Allocate space for fixed-size arrays 2056 _uses = NEW_ARENA_ARRAY(arena, short, node_max); 2057 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max); 2058 2059 // Clear the arrays 2060 for (uint i = 0; i < node_max; i++) { 2061 ::new (&_node_bundling_base[i]) Bundle(); 2062 } 2063 memset(_uses, 0, node_max * sizeof(short)); 2064 memset(_current_latency, 0, node_max * sizeof(unsigned short)); 2065 2066 // Clear the bundling information 2067 memcpy(_bundle_use_elements, Pipeline_Use::elaborated_elements, sizeof(Pipeline_Use::elaborated_elements)); 2068 2069 // Get the last node 2070 Block* block = _cfg->get_block(_cfg->number_of_blocks() - 1); 2071 2072 _next_node = block->get_node(block->number_of_nodes() - 1); 2073 } 2074 2075 #ifndef PRODUCT 2076 // Scheduling destructor 2077 Scheduling::~Scheduling() { 2078 _total_branches += _branches; 2079 _total_unconditional_delays += _unconditional_delays; 2080 } 2081 #endif 2082 2083 // Step ahead "i" cycles 2084 void Scheduling::step(uint i) { 2085 2086 Bundle *bundle = node_bundling(_next_node); 2087 bundle->set_starts_bundle(); 2088 2089 // Update the bundle record, but leave the flags information alone 2090 if (_bundle_instr_count > 0) { 2091 bundle->set_instr_count(_bundle_instr_count); 2092 bundle->set_resources_used(_bundle_use.resourcesUsed()); 2093 } 2094 2095 // Update the state information 2096 _bundle_instr_count = 0; 2097 _bundle_cycle_number += i; 2098 _bundle_use.step(i); 2099 } 2100 2101 void Scheduling::step_and_clear() { 2102 Bundle *bundle = node_bundling(_next_node); 2103 bundle->set_starts_bundle(); 2104 2105 // Update the bundle record 2106 if (_bundle_instr_count > 0) { 2107 bundle->set_instr_count(_bundle_instr_count); 2108 bundle->set_resources_used(_bundle_use.resourcesUsed()); 2109 2110 _bundle_cycle_number += 1; 2111 } 2112 2113 // Clear the bundling information 2114 _bundle_instr_count = 0; 2115 _bundle_use.reset(); 2116 2117 memcpy(_bundle_use_elements, 2118 Pipeline_Use::elaborated_elements, 2119 sizeof(Pipeline_Use::elaborated_elements)); 2120 } 2121 2122 // Perform instruction scheduling and bundling over the sequence of 2123 // instructions in backwards order. 2124 void PhaseOutput::ScheduleAndBundle() { 2125 2126 // Don't optimize this if it isn't a method 2127 if (!C->method()) 2128 return; 2129 2130 // Don't optimize this if scheduling is disabled 2131 if (!C->do_scheduling()) 2132 return; 2133 2134 // Scheduling code works only with pairs (8 bytes) maximum. 2135 // And when the scalable vector register is used, we may spill/unspill 2136 // the whole reg regardless of the max vector size. 2137 if (C->max_vector_size() > 8 || 2138 (C->max_vector_size() > 0 && Matcher::supports_scalable_vector())) { 2139 return; 2140 } 2141 2142 Compile::TracePhase tp("isched", &timers[_t_instrSched]); 2143 2144 // Create a data structure for all the scheduling information 2145 Scheduling scheduling(Thread::current()->resource_area(), *C); 2146 2147 // Walk backwards over each basic block, computing the needed alignment 2148 // Walk over all the basic blocks 2149 scheduling.DoScheduling(); 2150 2151 #ifndef PRODUCT 2152 if (C->trace_opto_output()) { 2153 // Buffer and print all at once 2154 ResourceMark rm; 2155 stringStream ss; 2156 ss.print("\n---- After ScheduleAndBundle ----\n"); 2157 print_scheduling(&ss); 2158 tty->print("%s", ss.as_string()); 2159 } 2160 #endif 2161 } 2162 2163 #ifndef PRODUCT 2164 // Separated out so that it can be called directly from debugger 2165 void PhaseOutput::print_scheduling() { 2166 print_scheduling(tty); 2167 } 2168 2169 void PhaseOutput::print_scheduling(outputStream* output_stream) { 2170 for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) { 2171 output_stream->print("\nBB#%03d:\n", i); 2172 Block* block = C->cfg()->get_block(i); 2173 for (uint j = 0; j < block->number_of_nodes(); j++) { 2174 Node* n = block->get_node(j); 2175 OptoReg::Name reg = C->regalloc()->get_reg_first(n); 2176 output_stream->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : ""); 2177 n->dump("\n", false, output_stream); 2178 } 2179 } 2180 } 2181 #endif 2182 2183 // See if this node fits into the present instruction bundle 2184 bool Scheduling::NodeFitsInBundle(Node *n) { 2185 uint n_idx = n->_idx; 2186 2187 // If this is the unconditional delay instruction, then it fits 2188 if (n == _unconditional_delay_slot) { 2189 #ifndef PRODUCT 2190 if (_cfg->C->trace_opto_output()) 2191 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx); 2192 #endif 2193 return (true); 2194 } 2195 2196 // If the node cannot be scheduled this cycle, skip it 2197 if (_current_latency[n_idx] > _bundle_cycle_number) { 2198 #ifndef PRODUCT 2199 if (_cfg->C->trace_opto_output()) 2200 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n", 2201 n->_idx, _current_latency[n_idx], _bundle_cycle_number); 2202 #endif 2203 return (false); 2204 } 2205 2206 const Pipeline *node_pipeline = n->pipeline(); 2207 2208 uint instruction_count = node_pipeline->instructionCount(); 2209 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0) 2210 instruction_count = 0; 2211 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot) 2212 instruction_count++; 2213 2214 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) { 2215 #ifndef PRODUCT 2216 if (_cfg->C->trace_opto_output()) 2217 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n", 2218 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle); 2219 #endif 2220 return (false); 2221 } 2222 2223 // Don't allow non-machine nodes to be handled this way 2224 if (!n->is_Mach() && instruction_count == 0) 2225 return (false); 2226 2227 // See if there is any overlap 2228 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse()); 2229 2230 if (delay > 0) { 2231 #ifndef PRODUCT 2232 if (_cfg->C->trace_opto_output()) 2233 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx); 2234 #endif 2235 return false; 2236 } 2237 2238 #ifndef PRODUCT 2239 if (_cfg->C->trace_opto_output()) 2240 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx); 2241 #endif 2242 2243 return true; 2244 } 2245 2246 Node * Scheduling::ChooseNodeToBundle() { 2247 uint siz = _available.size(); 2248 2249 if (siz == 0) { 2250 2251 #ifndef PRODUCT 2252 if (_cfg->C->trace_opto_output()) 2253 tty->print("# ChooseNodeToBundle: null\n"); 2254 #endif 2255 return (nullptr); 2256 } 2257 2258 // Fast path, if only 1 instruction in the bundle 2259 if (siz == 1) { 2260 #ifndef PRODUCT 2261 if (_cfg->C->trace_opto_output()) { 2262 tty->print("# ChooseNodeToBundle (only 1): "); 2263 _available[0]->dump(); 2264 } 2265 #endif 2266 return (_available[0]); 2267 } 2268 2269 // Don't bother, if the bundle is already full 2270 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) { 2271 for ( uint i = 0; i < siz; i++ ) { 2272 Node *n = _available[i]; 2273 2274 // Skip projections, we'll handle them another way 2275 if (n->is_Proj()) 2276 continue; 2277 2278 // This presupposed that instructions are inserted into the 2279 // available list in a legality order; i.e. instructions that 2280 // must be inserted first are at the head of the list 2281 if (NodeFitsInBundle(n)) { 2282 #ifndef PRODUCT 2283 if (_cfg->C->trace_opto_output()) { 2284 tty->print("# ChooseNodeToBundle: "); 2285 n->dump(); 2286 } 2287 #endif 2288 return (n); 2289 } 2290 } 2291 } 2292 2293 // Nothing fits in this bundle, choose the highest priority 2294 #ifndef PRODUCT 2295 if (_cfg->C->trace_opto_output()) { 2296 tty->print("# ChooseNodeToBundle: "); 2297 _available[0]->dump(); 2298 } 2299 #endif 2300 2301 return _available[0]; 2302 } 2303 2304 int Scheduling::compare_two_spill_nodes(Node* first, Node* second) { 2305 assert(first->is_MachSpillCopy() && second->is_MachSpillCopy(), ""); 2306 2307 OptoReg::Name first_src_lo = _regalloc->get_reg_first(first->in(1)); 2308 OptoReg::Name first_dst_lo = _regalloc->get_reg_first(first); 2309 OptoReg::Name second_src_lo = _regalloc->get_reg_first(second->in(1)); 2310 OptoReg::Name second_dst_lo = _regalloc->get_reg_first(second); 2311 2312 // Comparison between stack -> reg and stack -> reg 2313 if (OptoReg::is_stack(first_src_lo) && OptoReg::is_stack(second_src_lo) && 2314 OptoReg::is_reg(first_dst_lo) && OptoReg::is_reg(second_dst_lo)) { 2315 return _regalloc->reg2offset(first_src_lo) - _regalloc->reg2offset(second_src_lo); 2316 } 2317 2318 // Comparison between reg -> stack and reg -> stack 2319 if (OptoReg::is_stack(first_dst_lo) && OptoReg::is_stack(second_dst_lo) && 2320 OptoReg::is_reg(first_src_lo) && OptoReg::is_reg(second_src_lo)) { 2321 return _regalloc->reg2offset(first_dst_lo) - _regalloc->reg2offset(second_dst_lo); 2322 } 2323 2324 return 0; // Not comparable 2325 } 2326 2327 void Scheduling::AddNodeToAvailableList(Node *n) { 2328 assert( !n->is_Proj(), "projections never directly made available" ); 2329 #ifndef PRODUCT 2330 if (_cfg->C->trace_opto_output()) { 2331 tty->print("# AddNodeToAvailableList: "); 2332 n->dump(); 2333 } 2334 #endif 2335 2336 int latency = _current_latency[n->_idx]; 2337 2338 // Insert in latency order (insertion sort). If two MachSpillCopyNodes 2339 // for stack spilling or unspilling have the same latency, we sort 2340 // them in the order of stack offset. Some ports (e.g. aarch64) may also 2341 // have more opportunities to do ld/st merging 2342 uint i; 2343 for (i = 0; i < _available.size(); i++) { 2344 if (_current_latency[_available[i]->_idx] > latency) { 2345 break; 2346 } else if (_current_latency[_available[i]->_idx] == latency && 2347 n->is_MachSpillCopy() && _available[i]->is_MachSpillCopy() && 2348 compare_two_spill_nodes(n, _available[i]) > 0) { 2349 break; 2350 } 2351 } 2352 2353 // Special Check for compares following branches 2354 if( n->is_Mach() && _scheduled.size() > 0 ) { 2355 int op = n->as_Mach()->ideal_Opcode(); 2356 Node *last = _scheduled[0]; 2357 if( last->is_MachIf() && last->in(1) == n && 2358 ( op == Op_CmpI || 2359 op == Op_CmpU || 2360 op == Op_CmpUL || 2361 op == Op_CmpP || 2362 op == Op_CmpF || 2363 op == Op_CmpD || 2364 op == Op_CmpL ) ) { 2365 2366 // Recalculate position, moving to front of same latency 2367 for ( i=0 ; i < _available.size(); i++ ) 2368 if (_current_latency[_available[i]->_idx] >= latency) 2369 break; 2370 } 2371 } 2372 2373 // Insert the node in the available list 2374 _available.insert(i, n); 2375 2376 #ifndef PRODUCT 2377 if (_cfg->C->trace_opto_output()) 2378 dump_available(); 2379 #endif 2380 } 2381 2382 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) { 2383 for ( uint i=0; i < n->len(); i++ ) { 2384 Node *def = n->in(i); 2385 if (!def) continue; 2386 if( def->is_Proj() ) // If this is a machine projection, then 2387 def = def->in(0); // propagate usage thru to the base instruction 2388 2389 if(_cfg->get_block_for_node(def) != bb) { // Ignore if not block-local 2390 continue; 2391 } 2392 2393 // Compute the latency 2394 uint l = _bundle_cycle_number + n->latency(i); 2395 if (_current_latency[def->_idx] < l) 2396 _current_latency[def->_idx] = l; 2397 2398 // If this does not have uses then schedule it 2399 if ((--_uses[def->_idx]) == 0) 2400 AddNodeToAvailableList(def); 2401 } 2402 } 2403 2404 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) { 2405 #ifndef PRODUCT 2406 if (_cfg->C->trace_opto_output()) { 2407 tty->print("# AddNodeToBundle: "); 2408 n->dump(); 2409 } 2410 #endif 2411 2412 // Remove this from the available list 2413 uint i; 2414 for (i = 0; i < _available.size(); i++) 2415 if (_available[i] == n) 2416 break; 2417 assert(i < _available.size(), "entry in _available list not found"); 2418 _available.remove(i); 2419 2420 // See if this fits in the current bundle 2421 const Pipeline *node_pipeline = n->pipeline(); 2422 const Pipeline_Use& node_usage = node_pipeline->resourceUse(); 2423 2424 // Check for instructions to be placed in the delay slot. We 2425 // do this before we actually schedule the current instruction, 2426 // because the delay slot follows the current instruction. 2427 if (Pipeline::_branch_has_delay_slot && 2428 node_pipeline->hasBranchDelay() && 2429 !_unconditional_delay_slot) { 2430 2431 uint siz = _available.size(); 2432 2433 // Conditional branches can support an instruction that 2434 // is unconditionally executed and not dependent by the 2435 // branch, OR a conditionally executed instruction if 2436 // the branch is taken. In practice, this means that 2437 // the first instruction at the branch target is 2438 // copied to the delay slot, and the branch goes to 2439 // the instruction after that at the branch target 2440 if ( n->is_MachBranch() ) { 2441 2442 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" ); 2443 assert( !n->is_Catch(), "should not look for delay slot for Catch" ); 2444 2445 #ifndef PRODUCT 2446 _branches++; 2447 #endif 2448 2449 // At least 1 instruction is on the available list 2450 // that is not dependent on the branch 2451 for (uint i = 0; i < siz; i++) { 2452 Node *d = _available[i]; 2453 const Pipeline *avail_pipeline = d->pipeline(); 2454 2455 // Don't allow safepoints in the branch shadow, that will 2456 // cause a number of difficulties 2457 if ( avail_pipeline->instructionCount() == 1 && 2458 !avail_pipeline->hasMultipleBundles() && 2459 !avail_pipeline->hasBranchDelay() && 2460 Pipeline::instr_has_unit_size() && 2461 d->size(_regalloc) == Pipeline::instr_unit_size() && 2462 NodeFitsInBundle(d) && 2463 !node_bundling(d)->used_in_delay()) { 2464 2465 if (d->is_Mach() && !d->is_MachSafePoint()) { 2466 // A node that fits in the delay slot was found, so we need to 2467 // set the appropriate bits in the bundle pipeline information so 2468 // that it correctly indicates resource usage. Later, when we 2469 // attempt to add this instruction to the bundle, we will skip 2470 // setting the resource usage. 2471 _unconditional_delay_slot = d; 2472 node_bundling(n)->set_use_unconditional_delay(); 2473 node_bundling(d)->set_used_in_unconditional_delay(); 2474 _bundle_use.add_usage(avail_pipeline->resourceUse()); 2475 _current_latency[d->_idx] = _bundle_cycle_number; 2476 _next_node = d; 2477 ++_bundle_instr_count; 2478 #ifndef PRODUCT 2479 _unconditional_delays++; 2480 #endif 2481 break; 2482 } 2483 } 2484 } 2485 } 2486 2487 // No delay slot, add a nop to the usage 2488 if (!_unconditional_delay_slot) { 2489 // See if adding an instruction in the delay slot will overflow 2490 // the bundle. 2491 if (!NodeFitsInBundle(_nop)) { 2492 #ifndef PRODUCT 2493 if (_cfg->C->trace_opto_output()) 2494 tty->print("# *** STEP(1 instruction for delay slot) ***\n"); 2495 #endif 2496 step(1); 2497 } 2498 2499 _bundle_use.add_usage(_nop->pipeline()->resourceUse()); 2500 _next_node = _nop; 2501 ++_bundle_instr_count; 2502 } 2503 2504 // See if the instruction in the delay slot requires a 2505 // step of the bundles 2506 if (!NodeFitsInBundle(n)) { 2507 #ifndef PRODUCT 2508 if (_cfg->C->trace_opto_output()) 2509 tty->print("# *** STEP(branch won't fit) ***\n"); 2510 #endif 2511 // Update the state information 2512 _bundle_instr_count = 0; 2513 _bundle_cycle_number += 1; 2514 _bundle_use.step(1); 2515 } 2516 } 2517 2518 // Get the number of instructions 2519 uint instruction_count = node_pipeline->instructionCount(); 2520 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0) 2521 instruction_count = 0; 2522 2523 // Compute the latency information 2524 uint delay = 0; 2525 2526 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) { 2527 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number; 2528 if (relative_latency < 0) 2529 relative_latency = 0; 2530 2531 delay = _bundle_use.full_latency(relative_latency, node_usage); 2532 2533 // Does not fit in this bundle, start a new one 2534 if (delay > 0) { 2535 step(delay); 2536 2537 #ifndef PRODUCT 2538 if (_cfg->C->trace_opto_output()) 2539 tty->print("# *** STEP(%d) ***\n", delay); 2540 #endif 2541 } 2542 } 2543 2544 // If this was placed in the delay slot, ignore it 2545 if (n != _unconditional_delay_slot) { 2546 2547 if (delay == 0) { 2548 if (node_pipeline->hasMultipleBundles()) { 2549 #ifndef PRODUCT 2550 if (_cfg->C->trace_opto_output()) 2551 tty->print("# *** STEP(multiple instructions) ***\n"); 2552 #endif 2553 step(1); 2554 } 2555 2556 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) { 2557 #ifndef PRODUCT 2558 if (_cfg->C->trace_opto_output()) 2559 tty->print("# *** STEP(%d >= %d instructions) ***\n", 2560 instruction_count + _bundle_instr_count, 2561 Pipeline::_max_instrs_per_cycle); 2562 #endif 2563 step(1); 2564 } 2565 } 2566 2567 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot) 2568 _bundle_instr_count++; 2569 2570 // Set the node's latency 2571 _current_latency[n->_idx] = _bundle_cycle_number; 2572 2573 // Now merge the functional unit information 2574 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) 2575 _bundle_use.add_usage(node_usage); 2576 2577 // Increment the number of instructions in this bundle 2578 _bundle_instr_count += instruction_count; 2579 2580 // Remember this node for later 2581 if (n->is_Mach()) 2582 _next_node = n; 2583 } 2584 2585 // It's possible to have a BoxLock in the graph and in the _bbs mapping but 2586 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks. 2587 // 'Schedule' them (basically ignore in the schedule) but do not insert them 2588 // into the block. All other scheduled nodes get put in the schedule here. 2589 int op = n->Opcode(); 2590 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR 2591 (op != Op_Node && // Not an unused antidepedence node and 2592 // not an unallocated boxlock 2593 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) { 2594 2595 // Push any trailing projections 2596 if( bb->get_node(bb->number_of_nodes()-1) != n ) { 2597 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { 2598 Node *foi = n->fast_out(i); 2599 if( foi->is_Proj() ) 2600 _scheduled.push(foi); 2601 } 2602 } 2603 2604 // Put the instruction in the schedule list 2605 _scheduled.push(n); 2606 } 2607 2608 #ifndef PRODUCT 2609 if (_cfg->C->trace_opto_output()) 2610 dump_available(); 2611 #endif 2612 2613 // Walk all the definitions, decrementing use counts, and 2614 // if a definition has a 0 use count, place it in the available list. 2615 DecrementUseCounts(n,bb); 2616 } 2617 2618 // This method sets the use count within a basic block. We will ignore all 2619 // uses outside the current basic block. As we are doing a backwards walk, 2620 // any node we reach that has a use count of 0 may be scheduled. This also 2621 // avoids the problem of cyclic references from phi nodes, as long as phi 2622 // nodes are at the front of the basic block. This method also initializes 2623 // the available list to the set of instructions that have no uses within this 2624 // basic block. 2625 void Scheduling::ComputeUseCount(const Block *bb) { 2626 #ifndef PRODUCT 2627 if (_cfg->C->trace_opto_output()) 2628 tty->print("# -> ComputeUseCount\n"); 2629 #endif 2630 2631 // Clear the list of available and scheduled instructions, just in case 2632 _available.clear(); 2633 _scheduled.clear(); 2634 2635 // No delay slot specified 2636 _unconditional_delay_slot = nullptr; 2637 2638 #ifdef ASSERT 2639 for( uint i=0; i < bb->number_of_nodes(); i++ ) 2640 assert( _uses[bb->get_node(i)->_idx] == 0, "_use array not clean" ); 2641 #endif 2642 2643 // Force the _uses count to never go to zero for unscheduable pieces 2644 // of the block 2645 for( uint k = 0; k < _bb_start; k++ ) 2646 _uses[bb->get_node(k)->_idx] = 1; 2647 for( uint l = _bb_end; l < bb->number_of_nodes(); l++ ) 2648 _uses[bb->get_node(l)->_idx] = 1; 2649 2650 // Iterate backwards over the instructions in the block. Don't count the 2651 // branch projections at end or the block header instructions. 2652 for( uint j = _bb_end-1; j >= _bb_start; j-- ) { 2653 Node *n = bb->get_node(j); 2654 if( n->is_Proj() ) continue; // Projections handled another way 2655 2656 // Account for all uses 2657 for ( uint k = 0; k < n->len(); k++ ) { 2658 Node *inp = n->in(k); 2659 if (!inp) continue; 2660 assert(inp != n, "no cycles allowed" ); 2661 if (_cfg->get_block_for_node(inp) == bb) { // Block-local use? 2662 if (inp->is_Proj()) { // Skip through Proj's 2663 inp = inp->in(0); 2664 } 2665 ++_uses[inp->_idx]; // Count 1 block-local use 2666 } 2667 } 2668 2669 // If this instruction has a 0 use count, then it is available 2670 if (!_uses[n->_idx]) { 2671 _current_latency[n->_idx] = _bundle_cycle_number; 2672 AddNodeToAvailableList(n); 2673 } 2674 2675 #ifndef PRODUCT 2676 if (_cfg->C->trace_opto_output()) { 2677 tty->print("# uses: %3d: ", _uses[n->_idx]); 2678 n->dump(); 2679 } 2680 #endif 2681 } 2682 2683 #ifndef PRODUCT 2684 if (_cfg->C->trace_opto_output()) 2685 tty->print("# <- ComputeUseCount\n"); 2686 #endif 2687 } 2688 2689 // This routine performs scheduling on each basic block in reverse order, 2690 // using instruction latencies and taking into account function unit 2691 // availability. 2692 void Scheduling::DoScheduling() { 2693 #ifndef PRODUCT 2694 if (_cfg->C->trace_opto_output()) 2695 tty->print("# -> DoScheduling\n"); 2696 #endif 2697 2698 Block *succ_bb = nullptr; 2699 Block *bb; 2700 Compile* C = Compile::current(); 2701 2702 // Walk over all the basic blocks in reverse order 2703 for (int i = _cfg->number_of_blocks() - 1; i >= 0; succ_bb = bb, i--) { 2704 bb = _cfg->get_block(i); 2705 2706 #ifndef PRODUCT 2707 if (_cfg->C->trace_opto_output()) { 2708 tty->print("# Schedule BB#%03d (initial)\n", i); 2709 for (uint j = 0; j < bb->number_of_nodes(); j++) { 2710 bb->get_node(j)->dump(); 2711 } 2712 } 2713 #endif 2714 2715 // On the head node, skip processing 2716 if (bb == _cfg->get_root_block()) { 2717 continue; 2718 } 2719 2720 // Skip empty, connector blocks 2721 if (bb->is_connector()) 2722 continue; 2723 2724 // If the following block is not the sole successor of 2725 // this one, then reset the pipeline information 2726 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) { 2727 #ifndef PRODUCT 2728 if (_cfg->C->trace_opto_output()) { 2729 tty->print("*** bundle start of next BB, node %d, for %d instructions\n", 2730 _next_node->_idx, _bundle_instr_count); 2731 } 2732 #endif 2733 step_and_clear(); 2734 } 2735 2736 // Leave untouched the starting instruction, any Phis, a CreateEx node 2737 // or Top. bb->get_node(_bb_start) is the first schedulable instruction. 2738 _bb_end = bb->number_of_nodes()-1; 2739 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) { 2740 Node *n = bb->get_node(_bb_start); 2741 // Things not matched, like Phinodes and ProjNodes don't get scheduled. 2742 // Also, MachIdealNodes do not get scheduled 2743 if( !n->is_Mach() ) continue; // Skip non-machine nodes 2744 MachNode *mach = n->as_Mach(); 2745 int iop = mach->ideal_Opcode(); 2746 if( iop == Op_CreateEx ) continue; // CreateEx is pinned 2747 if( iop == Op_Con ) continue; // Do not schedule Top 2748 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes 2749 mach->pipeline() == MachNode::pipeline_class() && 2750 !n->is_SpillCopy() && !n->is_MachMerge() ) // Breakpoints, Prolog, etc 2751 continue; 2752 break; // Funny loop structure to be sure... 2753 } 2754 // Compute last "interesting" instruction in block - last instruction we 2755 // might schedule. _bb_end points just after last schedulable inst. We 2756 // normally schedule conditional branches (despite them being forced last 2757 // in the block), because they have delay slots we can fill. Calls all 2758 // have their delay slots filled in the template expansions, so we don't 2759 // bother scheduling them. 2760 Node *last = bb->get_node(_bb_end); 2761 // Ignore trailing NOPs. 2762 while (_bb_end > 0 && last->is_Mach() && 2763 last->as_Mach()->ideal_Opcode() == Op_Con) { 2764 last = bb->get_node(--_bb_end); 2765 } 2766 assert(!last->is_Mach() || last->as_Mach()->ideal_Opcode() != Op_Con, ""); 2767 if( last->is_Catch() || 2768 (last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) { 2769 // There might be a prior call. Skip it. 2770 while (_bb_start < _bb_end && bb->get_node(--_bb_end)->is_MachProj()); 2771 } else if( last->is_MachNullCheck() ) { 2772 // Backup so the last null-checked memory instruction is 2773 // outside the schedulable range. Skip over the nullcheck, 2774 // projection, and the memory nodes. 2775 Node *mem = last->in(1); 2776 do { 2777 _bb_end--; 2778 } while (mem != bb->get_node(_bb_end)); 2779 } else { 2780 // Set _bb_end to point after last schedulable inst. 2781 _bb_end++; 2782 } 2783 2784 assert( _bb_start <= _bb_end, "inverted block ends" ); 2785 2786 // Compute the register antidependencies for the basic block 2787 ComputeRegisterAntidependencies(bb); 2788 if (C->failing()) return; // too many D-U pinch points 2789 2790 // Compute the usage within the block, and set the list of all nodes 2791 // in the block that have no uses within the block. 2792 ComputeUseCount(bb); 2793 2794 // Schedule the remaining instructions in the block 2795 while ( _available.size() > 0 ) { 2796 Node *n = ChooseNodeToBundle(); 2797 guarantee(n != nullptr, "no nodes available"); 2798 AddNodeToBundle(n,bb); 2799 } 2800 2801 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" ); 2802 #ifdef ASSERT 2803 for( uint l = _bb_start; l < _bb_end; l++ ) { 2804 Node *n = bb->get_node(l); 2805 uint m; 2806 for( m = 0; m < _bb_end-_bb_start; m++ ) 2807 if( _scheduled[m] == n ) 2808 break; 2809 assert( m < _bb_end-_bb_start, "instruction missing in schedule" ); 2810 } 2811 #endif 2812 2813 // Now copy the instructions (in reverse order) back to the block 2814 for ( uint k = _bb_start; k < _bb_end; k++ ) 2815 bb->map_node(_scheduled[_bb_end-k-1], k); 2816 2817 #ifndef PRODUCT 2818 if (_cfg->C->trace_opto_output()) { 2819 tty->print("# Schedule BB#%03d (final)\n", i); 2820 uint current = 0; 2821 for (uint j = 0; j < bb->number_of_nodes(); j++) { 2822 Node *n = bb->get_node(j); 2823 if( valid_bundle_info(n) ) { 2824 Bundle *bundle = node_bundling(n); 2825 if (bundle->instr_count() > 0 || bundle->flags() > 0) { 2826 tty->print("*** Bundle: "); 2827 bundle->dump(); 2828 } 2829 n->dump(); 2830 } 2831 } 2832 } 2833 #endif 2834 #ifdef ASSERT 2835 verify_good_schedule(bb,"after block local scheduling"); 2836 #endif 2837 } 2838 2839 #ifndef PRODUCT 2840 if (_cfg->C->trace_opto_output()) 2841 tty->print("# <- DoScheduling\n"); 2842 #endif 2843 2844 // Record final node-bundling array location 2845 _regalloc->C->output()->set_node_bundling_base(_node_bundling_base); 2846 2847 } // end DoScheduling 2848 2849 // Verify that no live-range used in the block is killed in the block by a 2850 // wrong DEF. This doesn't verify live-ranges that span blocks. 2851 2852 // Check for edge existence. Used to avoid adding redundant precedence edges. 2853 static bool edge_from_to( Node *from, Node *to ) { 2854 for( uint i=0; i<from->len(); i++ ) 2855 if( from->in(i) == to ) 2856 return true; 2857 return false; 2858 } 2859 2860 #ifdef ASSERT 2861 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) { 2862 // Check for bad kills 2863 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow 2864 Node *prior_use = _reg_node[def]; 2865 if( prior_use && !edge_from_to(prior_use,n) ) { 2866 tty->print("%s = ",OptoReg::as_VMReg(def)->name()); 2867 n->dump(); 2868 tty->print_cr("..."); 2869 prior_use->dump(); 2870 assert(edge_from_to(prior_use,n), "%s", msg); 2871 } 2872 _reg_node.map(def,nullptr); // Kill live USEs 2873 } 2874 } 2875 2876 void Scheduling::verify_good_schedule( Block *b, const char *msg ) { 2877 2878 // Zap to something reasonable for the verify code 2879 _reg_node.clear(); 2880 2881 // Walk over the block backwards. Check to make sure each DEF doesn't 2882 // kill a live value (other than the one it's supposed to). Add each 2883 // USE to the live set. 2884 for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) { 2885 Node *n = b->get_node(i); 2886 int n_op = n->Opcode(); 2887 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) { 2888 // Fat-proj kills a slew of registers 2889 RegMaskIterator rmi(n->out_RegMask()); 2890 while (rmi.has_next()) { 2891 OptoReg::Name kill = rmi.next(); 2892 verify_do_def(n, kill, msg); 2893 } 2894 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes 2895 // Get DEF'd registers the normal way 2896 verify_do_def( n, _regalloc->get_reg_first(n), msg ); 2897 verify_do_def( n, _regalloc->get_reg_second(n), msg ); 2898 } 2899 2900 // Now make all USEs live 2901 for( uint i=1; i<n->req(); i++ ) { 2902 Node *def = n->in(i); 2903 assert(def != 0, "input edge required"); 2904 OptoReg::Name reg_lo = _regalloc->get_reg_first(def); 2905 OptoReg::Name reg_hi = _regalloc->get_reg_second(def); 2906 if( OptoReg::is_valid(reg_lo) ) { 2907 assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), "%s", msg); 2908 _reg_node.map(reg_lo,n); 2909 } 2910 if( OptoReg::is_valid(reg_hi) ) { 2911 assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), "%s", msg); 2912 _reg_node.map(reg_hi,n); 2913 } 2914 } 2915 2916 } 2917 2918 // Zap to something reasonable for the Antidependence code 2919 _reg_node.clear(); 2920 } 2921 #endif 2922 2923 // Conditionally add precedence edges. Avoid putting edges on Projs. 2924 static void add_prec_edge_from_to( Node *from, Node *to ) { 2925 if( from->is_Proj() ) { // Put precedence edge on Proj's input 2926 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" ); 2927 from = from->in(0); 2928 } 2929 if( from != to && // No cycles (for things like LD L0,[L0+4] ) 2930 !edge_from_to( from, to ) ) // Avoid duplicate edge 2931 from->add_prec(to); 2932 } 2933 2934 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) { 2935 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow 2936 return; 2937 2938 if (OptoReg::is_reg(def_reg)) { 2939 VMReg vmreg = OptoReg::as_VMReg(def_reg); 2940 if (vmreg->is_reg() && !vmreg->is_concrete() && !vmreg->prev()->is_concrete()) { 2941 // This is one of the high slots of a vector register. 2942 // ScheduleAndBundle already checked there are no live wide 2943 // vectors in this method so it can be safely ignored. 2944 return; 2945 } 2946 } 2947 2948 Node *pinch = _reg_node[def_reg]; // Get pinch point 2949 if ((pinch == nullptr) || _cfg->get_block_for_node(pinch) != b || // No pinch-point yet? 2950 is_def ) { // Check for a true def (not a kill) 2951 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point 2952 return; 2953 } 2954 2955 Node *kill = def; // Rename 'def' to more descriptive 'kill' 2956 debug_only( def = (Node*)((intptr_t)0xdeadbeef); ) 2957 2958 // After some number of kills there _may_ be a later def 2959 Node *later_def = nullptr; 2960 2961 Compile* C = Compile::current(); 2962 2963 // Finding a kill requires a real pinch-point. 2964 // Check for not already having a pinch-point. 2965 // Pinch points are Op_Node's. 2966 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point? 2967 later_def = pinch; // Must be def/kill as optimistic pinch-point 2968 if ( _pinch_free_list.size() > 0) { 2969 pinch = _pinch_free_list.pop(); 2970 } else { 2971 pinch = new Node(1); // Pinch point to-be 2972 } 2973 if (pinch->_idx >= _regalloc->node_regs_max_index()) { 2974 DEBUG_ONLY( pinch->dump(); ); 2975 assert(false, "too many D-U pinch points: %d >= %d", pinch->_idx, _regalloc->node_regs_max_index()); 2976 _cfg->C->record_method_not_compilable("too many D-U pinch points"); 2977 return; 2978 } 2979 _cfg->map_node_to_block(pinch, b); // Pretend it's valid in this block (lazy init) 2980 _reg_node.map(def_reg,pinch); // Record pinch-point 2981 //regalloc()->set_bad(pinch->_idx); // Already initialized this way. 2982 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill 2983 pinch->init_req(0, C->top()); // set not null for the next call 2984 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch 2985 later_def = nullptr; // and no later def 2986 } 2987 pinch->set_req(0,later_def); // Hook later def so we can find it 2988 } else { // Else have valid pinch point 2989 if( pinch->in(0) ) // If there is a later-def 2990 later_def = pinch->in(0); // Get it 2991 } 2992 2993 // Add output-dependence edge from later def to kill 2994 if( later_def ) // If there is some original def 2995 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill 2996 2997 // See if current kill is also a use, and so is forced to be the pinch-point. 2998 if( pinch->Opcode() == Op_Node ) { 2999 Node *uses = kill->is_Proj() ? kill->in(0) : kill; 3000 for( uint i=1; i<uses->req(); i++ ) { 3001 if( _regalloc->get_reg_first(uses->in(i)) == def_reg || 3002 _regalloc->get_reg_second(uses->in(i)) == def_reg ) { 3003 // Yes, found a use/kill pinch-point 3004 pinch->set_req(0,nullptr); // 3005 pinch->replace_by(kill); // Move anti-dep edges up 3006 pinch = kill; 3007 _reg_node.map(def_reg,pinch); 3008 return; 3009 } 3010 } 3011 } 3012 3013 // Add edge from kill to pinch-point 3014 add_prec_edge_from_to(kill,pinch); 3015 } 3016 3017 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) { 3018 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow 3019 return; 3020 Node *pinch = _reg_node[use_reg]; // Get pinch point 3021 // Check for no later def_reg/kill in block 3022 if ((pinch != nullptr) && _cfg->get_block_for_node(pinch) == b && 3023 // Use has to be block-local as well 3024 _cfg->get_block_for_node(use) == b) { 3025 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?) 3026 pinch->req() == 1 ) { // pinch not yet in block? 3027 pinch->del_req(0); // yank pointer to later-def, also set flag 3028 // Insert the pinch-point in the block just after the last use 3029 b->insert_node(pinch, b->find_node(use) + 1); 3030 _bb_end++; // Increase size scheduled region in block 3031 } 3032 3033 add_prec_edge_from_to(pinch,use); 3034 } 3035 } 3036 3037 // We insert antidependences between the reads and following write of 3038 // allocated registers to prevent illegal code motion. Hopefully, the 3039 // number of added references should be fairly small, especially as we 3040 // are only adding references within the current basic block. 3041 void Scheduling::ComputeRegisterAntidependencies(Block *b) { 3042 3043 #ifdef ASSERT 3044 verify_good_schedule(b,"before block local scheduling"); 3045 #endif 3046 3047 // A valid schedule, for each register independently, is an endless cycle 3048 // of: a def, then some uses (connected to the def by true dependencies), 3049 // then some kills (defs with no uses), finally the cycle repeats with a new 3050 // def. The uses are allowed to float relative to each other, as are the 3051 // kills. No use is allowed to slide past a kill (or def). This requires 3052 // antidependencies between all uses of a single def and all kills that 3053 // follow, up to the next def. More edges are redundant, because later defs 3054 // & kills are already serialized with true or antidependencies. To keep 3055 // the edge count down, we add a 'pinch point' node if there's more than 3056 // one use or more than one kill/def. 3057 3058 // We add dependencies in one bottom-up pass. 3059 3060 // For each instruction we handle it's DEFs/KILLs, then it's USEs. 3061 3062 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this 3063 // register. If not, we record the DEF/KILL in _reg_node, the 3064 // register-to-def mapping. If there is a prior DEF/KILL, we insert a 3065 // "pinch point", a new Node that's in the graph but not in the block. 3066 // We put edges from the prior and current DEF/KILLs to the pinch point. 3067 // We put the pinch point in _reg_node. If there's already a pinch point 3068 // we merely add an edge from the current DEF/KILL to the pinch point. 3069 3070 // After doing the DEF/KILLs, we handle USEs. For each used register, we 3071 // put an edge from the pinch point to the USE. 3072 3073 // To be expedient, the _reg_node array is pre-allocated for the whole 3074 // compilation. _reg_node is lazily initialized; it either contains a null, 3075 // or a valid def/kill/pinch-point, or a leftover node from some prior 3076 // block. Leftover node from some prior block is treated like a null (no 3077 // prior def, so no anti-dependence needed). Valid def is distinguished by 3078 // it being in the current block. 3079 bool fat_proj_seen = false; 3080 uint last_safept = _bb_end-1; 3081 Node* end_node = (_bb_end-1 >= _bb_start) ? b->get_node(last_safept) : nullptr; 3082 Node* last_safept_node = end_node; 3083 for( uint i = _bb_end-1; i >= _bb_start; i-- ) { 3084 Node *n = b->get_node(i); 3085 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges 3086 if( n->is_MachProj() && n->ideal_reg() == MachProjNode::fat_proj ) { 3087 // Fat-proj kills a slew of registers 3088 // This can add edges to 'n' and obscure whether or not it was a def, 3089 // hence the is_def flag. 3090 fat_proj_seen = true; 3091 RegMaskIterator rmi(n->out_RegMask()); 3092 while (rmi.has_next()) { 3093 OptoReg::Name kill = rmi.next(); 3094 anti_do_def(b, n, kill, is_def); 3095 } 3096 } else { 3097 // Get DEF'd registers the normal way 3098 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def ); 3099 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def ); 3100 } 3101 3102 // Kill projections on a branch should appear to occur on the 3103 // branch, not afterwards, so grab the masks from the projections 3104 // and process them. 3105 if (n->is_MachBranch() || (n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_Jump)) { 3106 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { 3107 Node* use = n->fast_out(i); 3108 if (use->is_Proj()) { 3109 RegMaskIterator rmi(use->out_RegMask()); 3110 while (rmi.has_next()) { 3111 OptoReg::Name kill = rmi.next(); 3112 anti_do_def(b, n, kill, false); 3113 } 3114 } 3115 } 3116 } 3117 3118 // Check each register used by this instruction for a following DEF/KILL 3119 // that must occur afterward and requires an anti-dependence edge. 3120 for( uint j=0; j<n->req(); j++ ) { 3121 Node *def = n->in(j); 3122 if( def ) { 3123 assert( !def->is_MachProj() || def->ideal_reg() != MachProjNode::fat_proj, "" ); 3124 anti_do_use( b, n, _regalloc->get_reg_first(def) ); 3125 anti_do_use( b, n, _regalloc->get_reg_second(def) ); 3126 } 3127 } 3128 // Do not allow defs of new derived values to float above GC 3129 // points unless the base is definitely available at the GC point. 3130 3131 Node *m = b->get_node(i); 3132 3133 // Add precedence edge from following safepoint to use of derived pointer 3134 if( last_safept_node != end_node && 3135 m != last_safept_node) { 3136 for (uint k = 1; k < m->req(); k++) { 3137 const Type *t = m->in(k)->bottom_type(); 3138 if( t->isa_oop_ptr() && 3139 t->is_ptr()->offset() != 0 ) { 3140 last_safept_node->add_prec( m ); 3141 break; 3142 } 3143 } 3144 } 3145 3146 if( n->jvms() ) { // Precedence edge from derived to safept 3147 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use() 3148 if( b->get_node(last_safept) != last_safept_node ) { 3149 last_safept = b->find_node(last_safept_node); 3150 } 3151 for( uint j=last_safept; j > i; j-- ) { 3152 Node *mach = b->get_node(j); 3153 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP ) 3154 mach->add_prec( n ); 3155 } 3156 last_safept = i; 3157 last_safept_node = m; 3158 } 3159 } 3160 3161 if (fat_proj_seen) { 3162 // Garbage collect pinch nodes that were not consumed. 3163 // They are usually created by a fat kill MachProj for a call. 3164 garbage_collect_pinch_nodes(); 3165 } 3166 } 3167 3168 // Garbage collect pinch nodes for reuse by other blocks. 3169 // 3170 // The block scheduler's insertion of anti-dependence 3171 // edges creates many pinch nodes when the block contains 3172 // 2 or more Calls. A pinch node is used to prevent a 3173 // combinatorial explosion of edges. If a set of kills for a 3174 // register is anti-dependent on a set of uses (or defs), rather 3175 // than adding an edge in the graph between each pair of kill 3176 // and use (or def), a pinch is inserted between them: 3177 // 3178 // use1 use2 use3 3179 // \ | / 3180 // \ | / 3181 // pinch 3182 // / | \ 3183 // / | \ 3184 // kill1 kill2 kill3 3185 // 3186 // One pinch node is created per register killed when 3187 // the second call is encountered during a backwards pass 3188 // over the block. Most of these pinch nodes are never 3189 // wired into the graph because the register is never 3190 // used or def'ed in the block. 3191 // 3192 void Scheduling::garbage_collect_pinch_nodes() { 3193 #ifndef PRODUCT 3194 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:"); 3195 #endif 3196 int trace_cnt = 0; 3197 for (uint k = 0; k < _reg_node.max(); k++) { 3198 Node* pinch = _reg_node[k]; 3199 if ((pinch != nullptr) && pinch->Opcode() == Op_Node && 3200 // no predecence input edges 3201 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == nullptr) ) { 3202 cleanup_pinch(pinch); 3203 _pinch_free_list.push(pinch); 3204 _reg_node.map(k, nullptr); 3205 #ifndef PRODUCT 3206 if (_cfg->C->trace_opto_output()) { 3207 trace_cnt++; 3208 if (trace_cnt > 40) { 3209 tty->print("\n"); 3210 trace_cnt = 0; 3211 } 3212 tty->print(" %d", pinch->_idx); 3213 } 3214 #endif 3215 } 3216 } 3217 #ifndef PRODUCT 3218 if (_cfg->C->trace_opto_output()) tty->print("\n"); 3219 #endif 3220 } 3221 3222 // Clean up a pinch node for reuse. 3223 void Scheduling::cleanup_pinch( Node *pinch ) { 3224 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking"); 3225 3226 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) { 3227 Node* use = pinch->last_out(i); 3228 uint uses_found = 0; 3229 for (uint j = use->req(); j < use->len(); j++) { 3230 if (use->in(j) == pinch) { 3231 use->rm_prec(j); 3232 uses_found++; 3233 } 3234 } 3235 assert(uses_found > 0, "must be a precedence edge"); 3236 i -= uses_found; // we deleted 1 or more copies of this edge 3237 } 3238 // May have a later_def entry 3239 pinch->set_req(0, nullptr); 3240 } 3241 3242 #ifndef PRODUCT 3243 3244 void Scheduling::dump_available() const { 3245 tty->print("#Availist "); 3246 for (uint i = 0; i < _available.size(); i++) 3247 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]); 3248 tty->cr(); 3249 } 3250 3251 // Print Scheduling Statistics 3252 void Scheduling::print_statistics() { 3253 // Print the size added by nops for bundling 3254 tty->print("Nops added %d bytes to total of %d bytes", 3255 _total_nop_size, _total_method_size); 3256 if (_total_method_size > 0) 3257 tty->print(", for %.2f%%", 3258 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0); 3259 tty->print("\n"); 3260 3261 // Print the number of branch shadows filled 3262 if (Pipeline::_branch_has_delay_slot) { 3263 tty->print("Of %d branches, %d had unconditional delay slots filled", 3264 _total_branches, _total_unconditional_delays); 3265 if (_total_branches > 0) 3266 tty->print(", for %.2f%%", 3267 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0); 3268 tty->print("\n"); 3269 } 3270 3271 uint total_instructions = 0, total_bundles = 0; 3272 3273 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) { 3274 uint bundle_count = _total_instructions_per_bundle[i]; 3275 total_instructions += bundle_count * i; 3276 total_bundles += bundle_count; 3277 } 3278 3279 if (total_bundles > 0) 3280 tty->print("Average ILP (excluding nops) is %.2f\n", 3281 ((double)total_instructions) / ((double)total_bundles)); 3282 } 3283 #endif 3284 3285 //-----------------------init_scratch_buffer_blob------------------------------ 3286 // Construct a temporary BufferBlob and cache it for this compile. 3287 void PhaseOutput::init_scratch_buffer_blob(int const_size) { 3288 // If there is already a scratch buffer blob allocated and the 3289 // constant section is big enough, use it. Otherwise free the 3290 // current and allocate a new one. 3291 BufferBlob* blob = scratch_buffer_blob(); 3292 if ((blob != nullptr) && (const_size <= _scratch_const_size)) { 3293 // Use the current blob. 3294 } else { 3295 if (blob != nullptr) { 3296 BufferBlob::free(blob); 3297 } 3298 3299 ResourceMark rm; 3300 _scratch_const_size = const_size; 3301 int size = C2Compiler::initial_code_buffer_size(const_size); 3302 blob = BufferBlob::create("Compile::scratch_buffer", size); 3303 // Record the buffer blob for next time. 3304 set_scratch_buffer_blob(blob); 3305 // Have we run out of code space? 3306 if (scratch_buffer_blob() == nullptr) { 3307 // Let CompilerBroker disable further compilations. 3308 C->record_failure("Not enough space for scratch buffer in CodeCache"); 3309 return; 3310 } 3311 } 3312 3313 // Initialize the relocation buffers 3314 relocInfo* locs_buf = (relocInfo*) blob->content_end() - MAX_locs_size; 3315 set_scratch_locs_memory(locs_buf); 3316 } 3317 3318 3319 //-----------------------scratch_emit_size------------------------------------- 3320 // Helper function that computes size by emitting code 3321 uint PhaseOutput::scratch_emit_size(const Node* n) { 3322 // Start scratch_emit_size section. 3323 set_in_scratch_emit_size(true); 3324 3325 // Emit into a trash buffer and count bytes emitted. 3326 // This is a pretty expensive way to compute a size, 3327 // but it works well enough if seldom used. 3328 // All common fixed-size instructions are given a size 3329 // method by the AD file. 3330 // Note that the scratch buffer blob and locs memory are 3331 // allocated at the beginning of the compile task, and 3332 // may be shared by several calls to scratch_emit_size. 3333 // The allocation of the scratch buffer blob is particularly 3334 // expensive, since it has to grab the code cache lock. 3335 BufferBlob* blob = this->scratch_buffer_blob(); 3336 assert(blob != nullptr, "Initialize BufferBlob at start"); 3337 assert(blob->size() > MAX_inst_size, "sanity"); 3338 relocInfo* locs_buf = scratch_locs_memory(); 3339 address blob_begin = blob->content_begin(); 3340 address blob_end = (address)locs_buf; 3341 assert(blob->contains(blob_end), "sanity"); 3342 CodeBuffer buf(blob_begin, blob_end - blob_begin); 3343 buf.initialize_consts_size(_scratch_const_size); 3344 buf.initialize_stubs_size(MAX_stubs_size); 3345 assert(locs_buf != nullptr, "sanity"); 3346 int lsize = MAX_locs_size / 3; 3347 buf.consts()->initialize_shared_locs(&locs_buf[lsize * 0], lsize); 3348 buf.insts()->initialize_shared_locs( &locs_buf[lsize * 1], lsize); 3349 buf.stubs()->initialize_shared_locs( &locs_buf[lsize * 2], lsize); 3350 // Mark as scratch buffer. 3351 buf.consts()->set_scratch_emit(); 3352 buf.insts()->set_scratch_emit(); 3353 buf.stubs()->set_scratch_emit(); 3354 3355 // Do the emission. 3356 3357 Label fakeL; // Fake label for branch instructions. 3358 Label* saveL = nullptr; 3359 uint save_bnum = 0; 3360 bool is_branch = n->is_MachBranch(); 3361 C2_MacroAssembler masm(&buf); 3362 masm.bind(fakeL); 3363 if (is_branch) { 3364 n->as_MachBranch()->save_label(&saveL, &save_bnum); 3365 n->as_MachBranch()->label_set(&fakeL, 0); 3366 } 3367 n->emit(&masm, C->regalloc()); 3368 3369 // Emitting into the scratch buffer should not fail 3370 assert (!C->failing(), "Must not have pending failure. Reason is: %s", C->failure_reason()); 3371 3372 if (is_branch) // Restore label. 3373 n->as_MachBranch()->label_set(saveL, save_bnum); 3374 3375 // End scratch_emit_size section. 3376 set_in_scratch_emit_size(false); 3377 3378 return buf.insts_size(); 3379 } 3380 3381 void PhaseOutput::install() { 3382 if (!C->should_install_code()) { 3383 return; 3384 } else if (C->stub_function() != nullptr) { 3385 install_stub(C->stub_name()); 3386 } else { 3387 install_code(C->method(), 3388 C->entry_bci(), 3389 CompileBroker::compiler2(), 3390 C->has_unsafe_access(), 3391 SharedRuntime::is_wide_vector(C->max_vector_size()), 3392 C->rtm_state()); 3393 } 3394 } 3395 3396 void PhaseOutput::install_code(ciMethod* target, 3397 int entry_bci, 3398 AbstractCompiler* compiler, 3399 bool has_unsafe_access, 3400 bool has_wide_vectors, 3401 RTMState rtm_state) { 3402 // Check if we want to skip execution of all compiled code. 3403 { 3404 #ifndef PRODUCT 3405 if (OptoNoExecute) { 3406 C->record_method_not_compilable("+OptoNoExecute"); // Flag as failed 3407 return; 3408 } 3409 #endif 3410 Compile::TracePhase tp("install_code", &timers[_t_registerMethod]); 3411 3412 if (C->is_osr_compilation()) { 3413 _code_offsets.set_value(CodeOffsets::Verified_Entry, 0); 3414 _code_offsets.set_value(CodeOffsets::OSR_Entry, _first_block_size); 3415 } else { 3416 if (!target->is_static()) { 3417 // The UEP of an nmethod ensures that the VEP is padded. However, the padding of the UEP is placed 3418 // before the inline cache check, so we don't have to execute any nop instructions when dispatching 3419 // through the UEP, yet we can ensure that the VEP is aligned appropriately. 3420 _code_offsets.set_value(CodeOffsets::Entry, _first_block_size - MacroAssembler::ic_check_size()); 3421 } 3422 _code_offsets.set_value(CodeOffsets::Verified_Entry, _first_block_size); 3423 _code_offsets.set_value(CodeOffsets::OSR_Entry, 0); 3424 } 3425 3426 C->env()->register_method(target, 3427 entry_bci, 3428 &_code_offsets, 3429 _orig_pc_slot_offset_in_bytes, 3430 code_buffer(), 3431 frame_size_in_words(), 3432 oop_map_set(), 3433 &_handler_table, 3434 inc_table(), 3435 compiler, 3436 has_unsafe_access, 3437 SharedRuntime::is_wide_vector(C->max_vector_size()), 3438 C->has_monitors(), 3439 0, 3440 C->rtm_state()); 3441 3442 if (C->log() != nullptr) { // Print code cache state into compiler log 3443 C->log()->code_cache_state(); 3444 } 3445 } 3446 } 3447 void PhaseOutput::install_stub(const char* stub_name) { 3448 // Entry point will be accessed using stub_entry_point(); 3449 if (code_buffer() == nullptr) { 3450 Matcher::soft_match_failure(); 3451 } else { 3452 if (PrintAssembly && (WizardMode || Verbose)) 3453 tty->print_cr("### Stub::%s", stub_name); 3454 3455 if (!C->failing()) { 3456 assert(C->fixed_slots() == 0, "no fixed slots used for runtime stubs"); 3457 3458 // Make the NMethod 3459 // For now we mark the frame as never safe for profile stackwalking 3460 RuntimeStub *rs = RuntimeStub::new_runtime_stub(stub_name, 3461 code_buffer(), 3462 CodeOffsets::frame_never_safe, 3463 // _code_offsets.value(CodeOffsets::Frame_Complete), 3464 frame_size_in_words(), 3465 oop_map_set(), 3466 false); 3467 assert(rs != nullptr && rs->is_runtime_stub(), "sanity check"); 3468 3469 C->set_stub_entry_point(rs->entry_point()); 3470 } 3471 } 3472 } 3473 3474 // Support for bundling info 3475 Bundle* PhaseOutput::node_bundling(const Node *n) { 3476 assert(valid_bundle_info(n), "oob"); 3477 return &_node_bundling_base[n->_idx]; 3478 } 3479 3480 bool PhaseOutput::valid_bundle_info(const Node *n) { 3481 return (_node_bundling_limit > n->_idx); 3482 } 3483 3484 //------------------------------frame_size_in_words----------------------------- 3485 // frame_slots in units of words 3486 int PhaseOutput::frame_size_in_words() const { 3487 // shift is 0 in LP32 and 1 in LP64 3488 const int shift = (LogBytesPerWord - LogBytesPerInt); 3489 int words = _frame_slots >> shift; 3490 assert( words << shift == _frame_slots, "frame size must be properly aligned in LP64" ); 3491 return words; 3492 } 3493 3494 // To bang the stack of this compiled method we use the stack size 3495 // that the interpreter would need in case of a deoptimization. This 3496 // removes the need to bang the stack in the deoptimization blob which 3497 // in turn simplifies stack overflow handling. 3498 int PhaseOutput::bang_size_in_bytes() const { 3499 return MAX2(frame_size_in_bytes() + os::extra_bang_size_in_bytes(), C->interpreter_frame_size()); 3500 } 3501 3502 //------------------------------dump_asm--------------------------------------- 3503 // Dump formatted assembly 3504 #if defined(SUPPORT_OPTO_ASSEMBLY) 3505 void PhaseOutput::dump_asm_on(outputStream* st, int* pcs, uint pc_limit) { 3506 3507 int pc_digits = 3; // #chars required for pc 3508 int sb_chars = 3; // #chars for "start bundle" indicator 3509 int tab_size = 8; 3510 if (pcs != nullptr) { 3511 int max_pc = 0; 3512 for (uint i = 0; i < pc_limit; i++) { 3513 max_pc = (max_pc < pcs[i]) ? pcs[i] : max_pc; 3514 } 3515 pc_digits = ((max_pc < 4096) ? 3 : ((max_pc < 65536) ? 4 : ((max_pc < 65536*256) ? 6 : 8))); // #chars required for pc 3516 } 3517 int prefix_len = ((pc_digits + sb_chars + tab_size - 1)/tab_size)*tab_size; 3518 3519 bool cut_short = false; 3520 st->print_cr("#"); 3521 st->print("# "); C->tf()->dump_on(st); st->cr(); 3522 st->print_cr("#"); 3523 3524 // For all blocks 3525 int pc = 0x0; // Program counter 3526 char starts_bundle = ' '; 3527 C->regalloc()->dump_frame(); 3528 3529 Node *n = nullptr; 3530 for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) { 3531 if (VMThread::should_terminate()) { 3532 cut_short = true; 3533 break; 3534 } 3535 Block* block = C->cfg()->get_block(i); 3536 if (block->is_connector() && !Verbose) { 3537 continue; 3538 } 3539 n = block->head(); 3540 if ((pcs != nullptr) && (n->_idx < pc_limit)) { 3541 pc = pcs[n->_idx]; 3542 st->print("%*.*x", pc_digits, pc_digits, pc); 3543 } 3544 st->fill_to(prefix_len); 3545 block->dump_head(C->cfg(), st); 3546 if (block->is_connector()) { 3547 st->fill_to(prefix_len); 3548 st->print_cr("# Empty connector block"); 3549 } else if (block->num_preds() == 2 && block->pred(1)->is_CatchProj() && block->pred(1)->as_CatchProj()->_con == CatchProjNode::fall_through_index) { 3550 st->fill_to(prefix_len); 3551 st->print_cr("# Block is sole successor of call"); 3552 } 3553 3554 // For all instructions 3555 Node *delay = nullptr; 3556 for (uint j = 0; j < block->number_of_nodes(); j++) { 3557 if (VMThread::should_terminate()) { 3558 cut_short = true; 3559 break; 3560 } 3561 n = block->get_node(j); 3562 if (valid_bundle_info(n)) { 3563 Bundle* bundle = node_bundling(n); 3564 if (bundle->used_in_unconditional_delay()) { 3565 delay = n; 3566 continue; 3567 } 3568 if (bundle->starts_bundle()) { 3569 starts_bundle = '+'; 3570 } 3571 } 3572 3573 if (WizardMode) { 3574 n->dump(); 3575 } 3576 3577 if( !n->is_Region() && // Dont print in the Assembly 3578 !n->is_Phi() && // a few noisely useless nodes 3579 !n->is_Proj() && 3580 !n->is_MachTemp() && 3581 !n->is_SafePointScalarObject() && 3582 !n->is_Catch() && // Would be nice to print exception table targets 3583 !n->is_MergeMem() && // Not very interesting 3584 !n->is_top() && // Debug info table constants 3585 !(n->is_Con() && !n->is_Mach())// Debug info table constants 3586 ) { 3587 if ((pcs != nullptr) && (n->_idx < pc_limit)) { 3588 pc = pcs[n->_idx]; 3589 st->print("%*.*x", pc_digits, pc_digits, pc); 3590 } else { 3591 st->fill_to(pc_digits); 3592 } 3593 st->print(" %c ", starts_bundle); 3594 starts_bundle = ' '; 3595 st->fill_to(prefix_len); 3596 n->format(C->regalloc(), st); 3597 st->cr(); 3598 } 3599 3600 // If we have an instruction with a delay slot, and have seen a delay, 3601 // then back up and print it 3602 if (valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) { 3603 // Coverity finding - Explicit null dereferenced. 3604 guarantee(delay != nullptr, "no unconditional delay instruction"); 3605 if (WizardMode) delay->dump(); 3606 3607 if (node_bundling(delay)->starts_bundle()) 3608 starts_bundle = '+'; 3609 if ((pcs != nullptr) && (n->_idx < pc_limit)) { 3610 pc = pcs[n->_idx]; 3611 st->print("%*.*x", pc_digits, pc_digits, pc); 3612 } else { 3613 st->fill_to(pc_digits); 3614 } 3615 st->print(" %c ", starts_bundle); 3616 starts_bundle = ' '; 3617 st->fill_to(prefix_len); 3618 delay->format(C->regalloc(), st); 3619 st->cr(); 3620 delay = nullptr; 3621 } 3622 3623 // Dump the exception table as well 3624 if( n->is_Catch() && (Verbose || WizardMode) ) { 3625 // Print the exception table for this offset 3626 _handler_table.print_subtable_for(pc); 3627 } 3628 st->bol(); // Make sure we start on a new line 3629 } 3630 st->cr(); // one empty line between blocks 3631 assert(cut_short || delay == nullptr, "no unconditional delay branch"); 3632 } // End of per-block dump 3633 3634 if (cut_short) st->print_cr("*** disassembly is cut short ***"); 3635 } 3636 #endif 3637 3638 #ifndef PRODUCT 3639 void PhaseOutput::print_statistics() { 3640 Scheduling::print_statistics(); 3641 } 3642 #endif