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src/hotspot/cpu/aarch64/globals_aarch64.hpp

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100   product(bool, AvoidUnalignedAccesses, false,                          \
101           "Avoid generating unaligned memory accesses")                 \
102   product(bool, UseLSE, false,                                          \
103           "Use LSE instructions")                                       \
104   product(uint, UseSVE, 0,                                              \
105           "Highest supported SVE instruction set version")              \
106           range(0, 2)                                                   \
107   product(bool, UseBlockZeroing, true,                                  \
108           "Use DC ZVA for block zeroing")                               \
109   product(intx, BlockZeroingLowLimit, 256,                              \
110           "Minimum size in bytes when block zeroing will be used")      \
111           range(wordSize, max_jint)                                     \
112   product(bool, TraceTraps, false, "Trace all traps the signal handler")\
113   product(int, SoftwarePrefetchHintDistance, -1,                        \
114           "Use prfm hint with specified distance in compiled code."     \
115           "Value -1 means off.")                                        \
116           range(-1, 4096)                                               \
117   product(ccstr, OnSpinWaitInst, "yield", DIAGNOSTIC,                   \
118           "The instruction to use to implement "                        \
119           "java.lang.Thread.onSpinWait()."                              \
120           "Options: none, nop, isb, yield.")                            \

121   product(uint, OnSpinWaitInstCount, 1, DIAGNOSTIC,                     \
122           "The number of OnSpinWaitInst instructions to generate."      \
123           "It cannot be used with OnSpinWaitInst=none.")                \
124           range(1, 99)                                                  \
125   product(ccstr, UseBranchProtection, "none",                           \
126           "Branch Protection to use: none, standard, pac-ret")          \
127   product(bool, AlwaysMergeDMB, true, DIAGNOSTIC,                       \
128           "Always merge DMB instructions in code emission")             \
129 
130 // end of ARCH_FLAGS
131 
132 #endif // CPU_AARCH64_GLOBALS_AARCH64_HPP

100   product(bool, AvoidUnalignedAccesses, false,                          \
101           "Avoid generating unaligned memory accesses")                 \
102   product(bool, UseLSE, false,                                          \
103           "Use LSE instructions")                                       \
104   product(uint, UseSVE, 0,                                              \
105           "Highest supported SVE instruction set version")              \
106           range(0, 2)                                                   \
107   product(bool, UseBlockZeroing, true,                                  \
108           "Use DC ZVA for block zeroing")                               \
109   product(intx, BlockZeroingLowLimit, 256,                              \
110           "Minimum size in bytes when block zeroing will be used")      \
111           range(wordSize, max_jint)                                     \
112   product(bool, TraceTraps, false, "Trace all traps the signal handler")\
113   product(int, SoftwarePrefetchHintDistance, -1,                        \
114           "Use prfm hint with specified distance in compiled code."     \
115           "Value -1 means off.")                                        \
116           range(-1, 4096)                                               \
117   product(ccstr, OnSpinWaitInst, "yield", DIAGNOSTIC,                   \
118           "The instruction to use to implement "                        \
119           "java.lang.Thread.onSpinWait()."                              \
120           "Valid values are: none, nop, isb, yield, sb.")               \
121           constraint(OnSpinWaitInstNameConstraintFunc, AtParse)         \
122   product(uint, OnSpinWaitInstCount, 1, DIAGNOSTIC,                     \
123           "The number of OnSpinWaitInst instructions to generate."      \
124           "It cannot be used with OnSpinWaitInst=none.")                \
125           range(1, 99)                                                  \
126   product(ccstr, UseBranchProtection, "none",                           \
127           "Branch Protection to use: none, standard, pac-ret")          \
128   product(bool, AlwaysMergeDMB, true, DIAGNOSTIC,                       \
129           "Always merge DMB instructions in code emission")             \
130 
131 // end of ARCH_FLAGS
132 
133 #endif // CPU_AARCH64_GLOBALS_AARCH64_HPP
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