34 #include "utilities/macros.hpp"
35
36 int VM_Version::_cpu;
37 int VM_Version::_model;
38 int VM_Version::_model2;
39 int VM_Version::_variant;
40 int VM_Version::_revision;
41 int VM_Version::_stepping;
42
43 int VM_Version::_zva_length;
44 int VM_Version::_dcache_line_size;
45 int VM_Version::_icache_line_size;
46 int VM_Version::_initial_sve_vector_length;
47 int VM_Version::_max_supported_sve_vector_length;
48 bool VM_Version::_rop_protection;
49 uintptr_t VM_Version::_pac_mask;
50
51 SpinWait VM_Version::_spin_wait;
52
53 static SpinWait get_spin_wait_desc() {
54 if (strcmp(OnSpinWaitInst, "nop") == 0) {
55 return SpinWait(SpinWait::NOP, OnSpinWaitInstCount);
56 } else if (strcmp(OnSpinWaitInst, "isb") == 0) {
57 return SpinWait(SpinWait::ISB, OnSpinWaitInstCount);
58 } else if (strcmp(OnSpinWaitInst, "yield") == 0) {
59 return SpinWait(SpinWait::YIELD, OnSpinWaitInstCount);
60 } else if (strcmp(OnSpinWaitInst, "none") != 0) {
61 vm_exit_during_initialization("The options for OnSpinWaitInst are nop, isb, yield, and none", OnSpinWaitInst);
62 }
63
64 if (!FLAG_IS_DEFAULT(OnSpinWaitInstCount) && OnSpinWaitInstCount > 0) {
65 vm_exit_during_initialization("OnSpinWaitInstCount cannot be used for OnSpinWaitInst 'none'");
66 }
67
68 return SpinWait{};
69 }
70
71 void VM_Version::initialize() {
72 _supports_atomic_getset4 = true;
73 _supports_atomic_getadd4 = true;
74 _supports_atomic_getset8 = true;
75 _supports_atomic_getadd8 = true;
76
77 get_os_cpu_info();
78
79 int dcache_line = VM_Version::dcache_line_size();
80
81 // Limit AllocatePrefetchDistance so that it does not exceed the
82 // static constraint of 512 defined in runtime/globals.hpp.
83 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance))
84 FLAG_SET_DEFAULT(AllocatePrefetchDistance, MIN2(512, 3*dcache_line));
85
86 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize))
87 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, dcache_line);
88 if (FLAG_IS_DEFAULT(PrefetchScanIntervalInBytes))
215 FLAG_SET_DEFAULT(SoftwarePrefetchHintDistance, -1);
216 }
217 // A73 is faster with short-and-easy-for-speculative-execution-loop
218 if (FLAG_IS_DEFAULT(UseSimpleArrayEquals)) {
219 FLAG_SET_DEFAULT(UseSimpleArrayEquals, true);
220 }
221 }
222
223 // Neoverse
224 // N1: 0xd0c
225 // N2: 0xd49
226 // V1: 0xd40
227 // V2: 0xd4f
228 if (_cpu == CPU_ARM && (model_is(0xd0c) || model_is(0xd49) ||
229 model_is(0xd40) || model_is(0xd4f))) {
230 if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
231 FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
232 }
233
234 if (FLAG_IS_DEFAULT(OnSpinWaitInst)) {
235 FLAG_SET_DEFAULT(OnSpinWaitInst, "isb");
236 }
237
238 if (FLAG_IS_DEFAULT(OnSpinWaitInstCount)) {
239 FLAG_SET_DEFAULT(OnSpinWaitInstCount, 1);
240 }
241 if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) {
242 FLAG_SET_DEFAULT(AlwaysMergeDMB, false);
243 }
244 }
245
246 if (_features & (CPU_FP | CPU_ASIMD)) {
247 if (FLAG_IS_DEFAULT(UseSignumIntrinsic)) {
248 FLAG_SET_DEFAULT(UseSignumIntrinsic, true);
249 }
250 }
251
252 if (FLAG_IS_DEFAULT(UseCRC32)) {
253 UseCRC32 = VM_Version::supports_crc32();
254 }
255
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34 #include "utilities/macros.hpp"
35
36 int VM_Version::_cpu;
37 int VM_Version::_model;
38 int VM_Version::_model2;
39 int VM_Version::_variant;
40 int VM_Version::_revision;
41 int VM_Version::_stepping;
42
43 int VM_Version::_zva_length;
44 int VM_Version::_dcache_line_size;
45 int VM_Version::_icache_line_size;
46 int VM_Version::_initial_sve_vector_length;
47 int VM_Version::_max_supported_sve_vector_length;
48 bool VM_Version::_rop_protection;
49 uintptr_t VM_Version::_pac_mask;
50
51 SpinWait VM_Version::_spin_wait;
52
53 static SpinWait get_spin_wait_desc() {
54 SpinWait spin_wait(OnSpinWaitInst, OnSpinWaitInstCount);
55 if (spin_wait.inst() == SpinWait::SB && !VM_Version::supports_sb()) {
56 vm_exit_during_initialization("OnSpinWaitInst is SB but current CPU does not support SB instruction");
57 }
58
59 return spin_wait;
60 }
61
62 void VM_Version::initialize() {
63 _supports_atomic_getset4 = true;
64 _supports_atomic_getadd4 = true;
65 _supports_atomic_getset8 = true;
66 _supports_atomic_getadd8 = true;
67
68 get_os_cpu_info();
69
70 int dcache_line = VM_Version::dcache_line_size();
71
72 // Limit AllocatePrefetchDistance so that it does not exceed the
73 // static constraint of 512 defined in runtime/globals.hpp.
74 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance))
75 FLAG_SET_DEFAULT(AllocatePrefetchDistance, MIN2(512, 3*dcache_line));
76
77 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize))
78 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, dcache_line);
79 if (FLAG_IS_DEFAULT(PrefetchScanIntervalInBytes))
206 FLAG_SET_DEFAULT(SoftwarePrefetchHintDistance, -1);
207 }
208 // A73 is faster with short-and-easy-for-speculative-execution-loop
209 if (FLAG_IS_DEFAULT(UseSimpleArrayEquals)) {
210 FLAG_SET_DEFAULT(UseSimpleArrayEquals, true);
211 }
212 }
213
214 // Neoverse
215 // N1: 0xd0c
216 // N2: 0xd49
217 // V1: 0xd40
218 // V2: 0xd4f
219 if (_cpu == CPU_ARM && (model_is(0xd0c) || model_is(0xd49) ||
220 model_is(0xd40) || model_is(0xd4f))) {
221 if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
222 FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
223 }
224
225 if (FLAG_IS_DEFAULT(OnSpinWaitInst)) {
226 if (model_is(0xd4f) && VM_Version::supports_sb()) {
227 FLAG_SET_DEFAULT(OnSpinWaitInst, "sb");
228 } else {
229 FLAG_SET_DEFAULT(OnSpinWaitInst, "isb");
230 }
231 }
232
233 if (FLAG_IS_DEFAULT(OnSpinWaitInstCount)) {
234 FLAG_SET_DEFAULT(OnSpinWaitInstCount, 1);
235 }
236 if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) {
237 FLAG_SET_DEFAULT(AlwaysMergeDMB, false);
238 }
239 }
240
241 if (_features & (CPU_FP | CPU_ASIMD)) {
242 if (FLAG_IS_DEFAULT(UseSignumIntrinsic)) {
243 FLAG_SET_DEFAULT(UseSignumIntrinsic, true);
244 }
245 }
246
247 if (FLAG_IS_DEFAULT(UseCRC32)) {
248 UseCRC32 = VM_Version::supports_crc32();
249 }
250
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