< prev index next >

src/hotspot/cpu/aarch64/vm_version_aarch64.hpp

Print this page

114     CPU_MODEL_AMPERE_1A = 0xac4, /* CPU implementer is CPU_AMPERE */
115     CPU_MODEL_AMPERE_1B = 0xac5  /* AMPERE_1B core Implements ARMv8.7 with CSSC, MTE, SM3/SM4 extensions */
116 };
117 
118 #define CPU_FEATURE_FLAGS(decl)               \
119     decl(FP,            fp,            0)     \
120     decl(ASIMD,         asimd,         1)     \
121     decl(EVTSTRM,       evtstrm,       2)     \
122     decl(AES,           aes,           3)     \
123     decl(PMULL,         pmull,         4)     \
124     decl(SHA1,          sha1,          5)     \
125     decl(SHA2,          sha256,        6)     \
126     decl(CRC32,         crc32,         7)     \
127     decl(LSE,           lse,           8)     \
128     decl(FPHP,          fphp,          9)     \
129     decl(ASIMDHP,       asimdhp,       10)    \
130     decl(DCPOP,         dcpop,         16)    \
131     decl(SHA3,          sha3,          17)    \
132     decl(SHA512,        sha512,        21)    \
133     decl(SVE,           sve,           22)    \

134     decl(PACA,          paca,          30)    \
135     /* flags above must follow Linux HWCAP */ \
136     decl(SVEBITPERM,    svebitperm,    27)    \
137     decl(SVE2,          sve2,          28)    \
138     decl(A53MAC,        a53mac,        31)
139 
140   enum Feature_Flag {
141 #define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (1 << bit),
142     CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG)
143 #undef DECLARE_CPU_FEATURE_FLAG
144   };
145 
146   // Feature identification
147 #define CPU_FEATURE_DETECTION(id, name, bit) \
148   static bool supports_##name() { return (_features & CPU_##id) != 0; };
149   CPU_FEATURE_FLAGS(CPU_FEATURE_DETECTION)
150 #undef CPU_FEATURE_DETECTION
151 
152   static int cpu_family()                     { return _cpu; }
153   static int cpu_model()                      { return _model; }

114     CPU_MODEL_AMPERE_1A = 0xac4, /* CPU implementer is CPU_AMPERE */
115     CPU_MODEL_AMPERE_1B = 0xac5  /* AMPERE_1B core Implements ARMv8.7 with CSSC, MTE, SM3/SM4 extensions */
116 };
117 
118 #define CPU_FEATURE_FLAGS(decl)               \
119     decl(FP,            fp,            0)     \
120     decl(ASIMD,         asimd,         1)     \
121     decl(EVTSTRM,       evtstrm,       2)     \
122     decl(AES,           aes,           3)     \
123     decl(PMULL,         pmull,         4)     \
124     decl(SHA1,          sha1,          5)     \
125     decl(SHA2,          sha256,        6)     \
126     decl(CRC32,         crc32,         7)     \
127     decl(LSE,           lse,           8)     \
128     decl(FPHP,          fphp,          9)     \
129     decl(ASIMDHP,       asimdhp,       10)    \
130     decl(DCPOP,         dcpop,         16)    \
131     decl(SHA3,          sha3,          17)    \
132     decl(SHA512,        sha512,        21)    \
133     decl(SVE,           sve,           22)    \
134     decl(SB,            sb,            29)    \
135     decl(PACA,          paca,          30)    \
136     /* flags above must follow Linux HWCAP */ \
137     decl(SVEBITPERM,    svebitperm,    27)    \
138     decl(SVE2,          sve2,          28)    \
139     decl(A53MAC,        a53mac,        31)
140 
141   enum Feature_Flag {
142 #define DECLARE_CPU_FEATURE_FLAG(id, name, bit) CPU_##id = (1 << bit),
143     CPU_FEATURE_FLAGS(DECLARE_CPU_FEATURE_FLAG)
144 #undef DECLARE_CPU_FEATURE_FLAG
145   };
146 
147   // Feature identification
148 #define CPU_FEATURE_DETECTION(id, name, bit) \
149   static bool supports_##name() { return (_features & CPU_##id) != 0; };
150   CPU_FEATURE_FLAGS(CPU_FEATURE_DETECTION)
151 #undef CPU_FEATURE_DETECTION
152 
153   static int cpu_family()                     { return _cpu; }
154   static int cpu_model()                      { return _model; }
< prev index next >