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src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp

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1545   lep = __ pc(); __ push(ltos); __ b(L);
1546 
1547   if (VerifyOops) {  // can't share atos entry if VerifyOops
1548     aep = __ pc(); __ push(atos); __ b(L);
1549   } else {
1550     aep = __ pc();              // fall through
1551   }
1552 
1553 #ifdef __SOFTFP__
1554   fep = __ pc();                // fall through
1555 #endif // __SOFTFP__
1556 
1557   bep = cep = sep =             // fall through
1558   iep = __ pc(); __ push(itos); // fall through
1559   vep = __ pc(); __ bind(L);    // fall through
1560   generate_and_dispatch(t);
1561 }
1562 
1563 //------------------------------------------------------------------------------------------------------------------------
1564 









1565 // Non-product code
1566 #ifndef PRODUCT
1567 address TemplateInterpreterGenerator::generate_trace_code(TosState state) {
1568   address entry = __ pc();
1569 
1570   // prepare expression stack
1571   __ push(state);       // save tosca
1572 
1573   // pass tosca registers as arguments
1574   __ mov(R2, R0_tos);
1575   __ mov(R3, R1_tos_hi);
1576   __ mov(R1, LR);       // save return address
1577 
1578   // call tracer
1579   __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode), R1, R2, R3);
1580 
1581   __ mov(LR, R0);       // restore return address
1582   __ pop(state);        // restore tosca
1583 
1584   // return
1585   __ ret();
1586 
1587   return entry;
1588 }
1589 
1590 
1591 void TemplateInterpreterGenerator::count_bytecode() {
1592   __ inc_global_counter((address) &BytecodeCounter::_counter_value, 0, Rtemp, R2_tmp, true);
1593 }
1594 
1595 
1596 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) {
1597   __ inc_global_counter((address)&BytecodeHistogram::_counters[0], sizeof(BytecodeHistogram::_counters[0]) * t->bytecode(), Rtemp, R2_tmp, true);
1598 }
1599 
1600 
1601 void TemplateInterpreterGenerator::histogram_bytecode_pair(Template* t) {
1602   const Register Rindex_addr = R2_tmp;
1603   Label Lcontinue;
1604   InlinedAddress Lcounters((address)BytecodePairHistogram::_counters);
1605   InlinedAddress Lindex((address)&BytecodePairHistogram::_index);
1606   const Register Rcounters_addr = R2_tmp;
1607   const Register Rindex = R4_tmp;
1608 
1609   // calculate new index for counter:
1610   // index = (_index >> log2_number_of_codes) | (bytecode << log2_number_of_codes).
1611   // (_index >> log2_number_of_codes) is previous bytecode
1612 
1613   __ ldr_literal(Rindex_addr, Lindex);
1614   __ ldr_s32(Rindex, Address(Rindex_addr));
1615   __ mov_slow(Rtemp, ((int)t->bytecode()) << BytecodePairHistogram::log2_number_of_codes);
1616   __ orr(Rindex, Rtemp, AsmOperand(Rindex, lsr, BytecodePairHistogram::log2_number_of_codes));
1617   __ str_32(Rindex, Address(Rindex_addr));
1618 
1619   // Rindex (R4) contains index of counter
1620 

1545   lep = __ pc(); __ push(ltos); __ b(L);
1546 
1547   if (VerifyOops) {  // can't share atos entry if VerifyOops
1548     aep = __ pc(); __ push(atos); __ b(L);
1549   } else {
1550     aep = __ pc();              // fall through
1551   }
1552 
1553 #ifdef __SOFTFP__
1554   fep = __ pc();                // fall through
1555 #endif // __SOFTFP__
1556 
1557   bep = cep = sep =             // fall through
1558   iep = __ pc(); __ push(itos); // fall through
1559   vep = __ pc(); __ bind(L);    // fall through
1560   generate_and_dispatch(t);
1561 }
1562 
1563 //------------------------------------------------------------------------------------------------------------------------
1564 
1565 void TemplateInterpreterGenerator::count_bytecode() {
1566   __ inc_global_counter((address) &BytecodeCounter::_counter_value, 0, Rtemp, R2_tmp, true);
1567 }
1568 
1569 
1570 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) {
1571   __ inc_global_counter((address)&BytecodeHistogram::_counters[0], sizeof(BytecodeHistogram::_counters[0]) * t->bytecode(), Rtemp, R2_tmp, true);
1572 }
1573 
1574 // Non-product code
1575 #ifndef PRODUCT
1576 address TemplateInterpreterGenerator::generate_trace_code(TosState state) {
1577   address entry = __ pc();
1578 
1579   // prepare expression stack
1580   __ push(state);       // save tosca
1581 
1582   // pass tosca registers as arguments
1583   __ mov(R2, R0_tos);
1584   __ mov(R3, R1_tos_hi);
1585   __ mov(R1, LR);       // save return address
1586 
1587   // call tracer
1588   __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode), R1, R2, R3);
1589 
1590   __ mov(LR, R0);       // restore return address
1591   __ pop(state);        // restore tosca
1592 
1593   // return
1594   __ ret();
1595 
1596   return entry;
1597 }
1598 











1599 void TemplateInterpreterGenerator::histogram_bytecode_pair(Template* t) {
1600   const Register Rindex_addr = R2_tmp;
1601   Label Lcontinue;
1602   InlinedAddress Lcounters((address)BytecodePairHistogram::_counters);
1603   InlinedAddress Lindex((address)&BytecodePairHistogram::_index);
1604   const Register Rcounters_addr = R2_tmp;
1605   const Register Rindex = R4_tmp;
1606 
1607   // calculate new index for counter:
1608   // index = (_index >> log2_number_of_codes) | (bytecode << log2_number_of_codes).
1609   // (_index >> log2_number_of_codes) is previous bytecode
1610 
1611   __ ldr_literal(Rindex_addr, Lindex);
1612   __ ldr_s32(Rindex, Address(Rindex_addr));
1613   __ mov_slow(Rtemp, ((int)t->bytecode()) << BytecodePairHistogram::log2_number_of_codes);
1614   __ orr(Rindex, Rtemp, AsmOperand(Rindex, lsr, BytecodePairHistogram::log2_number_of_codes));
1615   __ str_32(Rindex, Address(Rindex_addr));
1616 
1617   // Rindex (R4) contains index of counter
1618 
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