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src/hotspot/cpu/arm/templateInterpreterGenerator_arm.cpp

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1544   lep = __ pc(); __ push(ltos); __ b(L);
1545 
1546   if (VerifyOops) {  // can't share atos entry if VerifyOops
1547     aep = __ pc(); __ push(atos); __ b(L);
1548   } else {
1549     aep = __ pc();              // fall through
1550   }
1551 
1552 #ifdef __SOFTFP__
1553   fep = __ pc();                // fall through
1554 #endif // __SOFTFP__
1555 
1556   bep = cep = sep =             // fall through
1557   iep = __ pc(); __ push(itos); // fall through
1558   vep = __ pc(); __ bind(L);    // fall through
1559   generate_and_dispatch(t);
1560 }
1561 
1562 //------------------------------------------------------------------------------------------------------------------------
1563 









1564 // Non-product code
1565 #ifndef PRODUCT
1566 address TemplateInterpreterGenerator::generate_trace_code(TosState state) {
1567   address entry = __ pc();
1568 
1569   // prepare expression stack
1570   __ push(state);       // save tosca
1571 
1572   // pass tosca registers as arguments
1573   __ mov(R2, R0_tos);
1574   __ mov(R3, R1_tos_hi);
1575   __ mov(R1, LR);       // save return address
1576 
1577   // call tracer
1578   __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode), R1, R2, R3);
1579 
1580   __ mov(LR, R0);       // restore return address
1581   __ pop(state);        // restore tosca
1582 
1583   // return
1584   __ ret();
1585 
1586   return entry;
1587 }
1588 
1589 
1590 void TemplateInterpreterGenerator::count_bytecode() {
1591   __ inc_global_counter((address) &BytecodeCounter::_counter_value, 0, Rtemp, R2_tmp, true);
1592 }
1593 
1594 
1595 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) {
1596   __ inc_global_counter((address)&BytecodeHistogram::_counters[0], sizeof(BytecodeHistogram::_counters[0]) * t->bytecode(), Rtemp, R2_tmp, true);
1597 }
1598 
1599 
1600 void TemplateInterpreterGenerator::histogram_bytecode_pair(Template* t) {
1601   const Register Rindex_addr = R2_tmp;
1602   Label Lcontinue;
1603   InlinedAddress Lcounters((address)BytecodePairHistogram::_counters);
1604   InlinedAddress Lindex((address)&BytecodePairHistogram::_index);
1605   const Register Rcounters_addr = R2_tmp;
1606   const Register Rindex = R4_tmp;
1607 
1608   // calculate new index for counter:
1609   // index = (_index >> log2_number_of_codes) | (bytecode << log2_number_of_codes).
1610   // (_index >> log2_number_of_codes) is previous bytecode
1611 
1612   __ ldr_literal(Rindex_addr, Lindex);
1613   __ ldr_s32(Rindex, Address(Rindex_addr));
1614   __ mov_slow(Rtemp, ((int)t->bytecode()) << BytecodePairHistogram::log2_number_of_codes);
1615   __ orr(Rindex, Rtemp, AsmOperand(Rindex, lsr, BytecodePairHistogram::log2_number_of_codes));
1616   __ str_32(Rindex, Address(Rindex_addr));
1617 
1618   // Rindex (R4) contains index of counter
1619 

1544   lep = __ pc(); __ push(ltos); __ b(L);
1545 
1546   if (VerifyOops) {  // can't share atos entry if VerifyOops
1547     aep = __ pc(); __ push(atos); __ b(L);
1548   } else {
1549     aep = __ pc();              // fall through
1550   }
1551 
1552 #ifdef __SOFTFP__
1553   fep = __ pc();                // fall through
1554 #endif // __SOFTFP__
1555 
1556   bep = cep = sep =             // fall through
1557   iep = __ pc(); __ push(itos); // fall through
1558   vep = __ pc(); __ bind(L);    // fall through
1559   generate_and_dispatch(t);
1560 }
1561 
1562 //------------------------------------------------------------------------------------------------------------------------
1563 
1564 void TemplateInterpreterGenerator::count_bytecode() {
1565   __ inc_global_counter((address) &BytecodeCounter::_counter_value, 0, Rtemp, R2_tmp, true);
1566 }
1567 
1568 
1569 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) {
1570   __ inc_global_counter((address)&BytecodeHistogram::_counters[0], sizeof(BytecodeHistogram::_counters[0]) * t->bytecode(), Rtemp, R2_tmp, true);
1571 }
1572 
1573 // Non-product code
1574 #ifndef PRODUCT
1575 address TemplateInterpreterGenerator::generate_trace_code(TosState state) {
1576   address entry = __ pc();
1577 
1578   // prepare expression stack
1579   __ push(state);       // save tosca
1580 
1581   // pass tosca registers as arguments
1582   __ mov(R2, R0_tos);
1583   __ mov(R3, R1_tos_hi);
1584   __ mov(R1, LR);       // save return address
1585 
1586   // call tracer
1587   __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::trace_bytecode), R1, R2, R3);
1588 
1589   __ mov(LR, R0);       // restore return address
1590   __ pop(state);        // restore tosca
1591 
1592   // return
1593   __ ret();
1594 
1595   return entry;
1596 }
1597 











1598 void TemplateInterpreterGenerator::histogram_bytecode_pair(Template* t) {
1599   const Register Rindex_addr = R2_tmp;
1600   Label Lcontinue;
1601   InlinedAddress Lcounters((address)BytecodePairHistogram::_counters);
1602   InlinedAddress Lindex((address)&BytecodePairHistogram::_index);
1603   const Register Rcounters_addr = R2_tmp;
1604   const Register Rindex = R4_tmp;
1605 
1606   // calculate new index for counter:
1607   // index = (_index >> log2_number_of_codes) | (bytecode << log2_number_of_codes).
1608   // (_index >> log2_number_of_codes) is previous bytecode
1609 
1610   __ ldr_literal(Rindex_addr, Lindex);
1611   __ ldr_s32(Rindex, Address(Rindex_addr));
1612   __ mov_slow(Rtemp, ((int)t->bytecode()) << BytecodePairHistogram::log2_number_of_codes);
1613   __ orr(Rindex, Rtemp, AsmOperand(Rindex, lsr, BytecodePairHistogram::log2_number_of_codes));
1614   __ str_32(Rindex, Address(Rindex_addr));
1615 
1616   // Rindex (R4) contains index of counter
1617 
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